WO2025237274A1 - 半导体工艺腔室 - Google Patents

半导体工艺腔室

Info

Publication number
WO2025237274A1
WO2025237274A1 PCT/CN2025/094512 CN2025094512W WO2025237274A1 WO 2025237274 A1 WO2025237274 A1 WO 2025237274A1 CN 2025094512 W CN2025094512 W CN 2025094512W WO 2025237274 A1 WO2025237274 A1 WO 2025237274A1
Authority
WO
WIPO (PCT)
Prior art keywords
ring
assembly
retaining ring
support
pressure ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2025/094512
Other languages
English (en)
French (fr)
Inventor
朱超
罗建恒
杨依龙
赵康宁
康广杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Naura Microelectronics Equipment Co Ltd
Original Assignee
Beijing Naura Microelectronics Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Naura Microelectronics Equipment Co Ltd filed Critical Beijing Naura Microelectronics Equipment Co Ltd
Publication of WO2025237274A1 publication Critical patent/WO2025237274A1/zh
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/50—Substrate holders

Definitions

  • This application relates to the field of semiconductor technology, and more particularly to a semiconductor process chamber.
  • a clamping ring is used to hold the outer periphery of the wafer in place.
  • most charged particles fall onto the clamping ring, while a small portion falls onto the wafer.
  • the clamping ring remains suspended, and the continuous falling of charged particles causes charge accumulation.
  • charge transfer between the clamping ring and the wafer becomes difficult. This creates a very large potential difference between the clamping ring and the metal film deposited on the wafer surface, making arcing more likely.
  • This application provides a semiconductor process chamber to address the problems existing in the prior art.
  • the semiconductor process chamber provided in this application includes: a cavity, a shield, a retaining ring, a pressure ring assembly, and a support assembly; the shield is sleeved inside the cavity and grounded through the cavity; the retaining ring and the pressure ring assembly are both sleeved inside the shield; the pressure ring assembly is supported by the shield; the retaining ring is positioned above the pressure ring assembly; the support assembly is used to support the wafer; when the support assembly is raised to the process position, the support assembly lifts the pressure ring assembly; the inner edge of the pressure ring assembly presses against the periphery of the wafer; the pressure ring assembly is insulated and separated from both the retaining ring and the shield.
  • the pressure ring assembly includes a pressure ring and a support ring; the support ring is supported on the shield, the pressure ring is supported on the support ring, and the projection of the pressure ring on the retaining ring in the vertical direction is located inside the projection of the shield on the retaining ring in the vertical direction; when the support assembly is raised to the process position, the support assembly lifts the support ring, and the inner edge of the pressure ring presses against the periphery of the wafer.
  • the shielding member includes a first main body, a first bent portion, and a second bent portion connected in sequence; the first main body and the second bent portion are spaced apart, the second bent portion is sleeved inside the first main body, and both the first main body and the second bent portion protrude upward relative to the first bent portion; the retaining ring includes a second main body and a third bent portion connected together, the second main body covers the top of the pressure ring assembly, the third bent portion protrudes downward relative to the second main body, the third bent portion is spaced between the first main body and the second bent portion, and the end of the third bent portion facing the first bent portion is supported by the first bent portion.
  • the support ring includes a third main body portion and an outer peripheral portion connected to each other.
  • the outer peripheral portion is disposed on the outer periphery of the third main body portion and is sandwiched between the second bent portion and the second main body portion in the vertical direction.
  • the outer peripheral portion is supported by the second bent portion, and the pressure ring is supported by the third main body portion.
  • the support ring further includes a protrusion connected to the third main body portion, the protrusion extending downward relative to the third main body portion, the protrusion being sleeved within the second bent portion, and the third bent portion having an air hole penetrating through the third bent portion along its own thickness direction.
  • the second body portion is provided with a first protruding ring extending toward the pressure ring assembly, the first protruding ring surrounding the axis of the retaining ring; and/or, the pressure ring is provided with a second protruding ring extending toward the second body portion, the second protruding ring surrounding the axis of the pressure ring.
  • the support assembly includes a base and a positioning ring.
  • the base has a bearing area
  • the positioning ring is sleeved outside the bearing area
  • a first positioning post is provided on the upward-facing side of the positioning ring.
  • the support ring has a first positioning hole opposite to the first positioning post
  • the pressure ring has a second positioning hole opposite to the first positioning post.
  • the semiconductor process chamber further includes an insulating support post disposed on the side of the retaining ring assembly facing the retaining ring.
  • the retaining ring assembly supports the retaining ring via the insulating support post, thereby insulatingly separating the retaining ring from the shield.
  • the retaining ring has a mating hole and at least three positioning oval holes on the side facing the pressure ring assembly.
  • the positioning oval holes are circumferentially distributed around the axis of the retaining ring, and the long axis of the positioning oval holes extends radially along the retaining ring.
  • the number of insulating supports is equal to the number of mating holes.
  • the semiconductor process chamber also includes a plurality of insulating positioning posts, the number of which is equal to the number of positioning oval holes. When the support assembly is raised to the process position, the insulating supports are inserted into the mating holes one by one and support the mating holes. The insulating positioning posts are inserted into the positioning oval holes one by one and position and engage with the sidewalls of the positioning oval holes.
  • the semiconductor process chamber further includes a support member disposed on the side of the retaining ring facing the shield, the retaining ring being connected to the shield via the support member, and the retaining ring being grounded sequentially via the support member, the shield, and the chamber.
  • the pressure ring assembly has a first through hole extending vertically through the pressure ring assembly, and the periphery of the first through hole is used to cover the wafer;
  • the retaining ring has a second through hole extending vertically through the retaining ring, and the projection of the inner wall of the second through hole onto the pressure ring assembly in the vertical direction is located around the first through hole.
  • the projection of the inner wall of the second perforation onto the pressure ring assembly in the vertical direction is a first projection ring
  • the area of the upper surface of the pressure ring assembly located inside the first projection ring is a first area
  • the projection of the inner wall of the first perforation onto the support assembly in the vertical direction is a second projection ring
  • the area of the second projection ring is a second area
  • the difference between the first area and the second area is less than a preset value.
  • the support assembly rises to the processing position, and a retaining ring is positioned above the pressure ring assembly.
  • the pressure ring assembly is insulated from both the retaining ring and the shielding component.
  • the retaining ring effectively shields the pressure ring assembly, reducing particle deposition on the pressure ring assembly, decreasing heat transfer from the pressure ring assembly to the wafer, and mitigating the temperature impact of the pressure ring assembly on the wafer, thereby improving the film deposition quality.
  • the retaining ring also shields the pressure ring assembly, reducing the amount of charge accumulated on it, thus mitigating the problem of arcing between the pressure ring assembly and the wafer.
  • the support assembly descends, and the pressure ring assembly also descends to its position supported by the shield.
  • Charged particles accumulated on the pressure ring assembly are released to the grounding terminal through the shield and cavity.
  • the retaining ring can be lifted, after the processing is complete, the retaining ring also descends to its position supported by the shield, and the charged particles accumulated on the retaining ring are also released to the grounding terminal through the shield and cavity; if the retaining ring is always supported by the shield, the charged particles on the retaining ring are continuously released to the grounding terminal through the shield and cavity.
  • charge accumulation on the pressure ring assembly and retaining ring is prevented. This prevents arcing caused by charge accumulation on the pressure ring assembly and retaining ring.
  • Figure 1 is a schematic diagram of a semiconductor process chamber provided in an embodiment of this application, showing the situation where the support component rises to the process position;
  • FIG. 2 is a partial schematic diagram of the semiconductor process chamber shown in Figure 1;
  • Figure 3 is a partial schematic diagram of a semiconductor process chamber provided in an embodiment of this application, showing the situation where the support assembly is lowered to the position separated from the pressure ring assembly;
  • Figure 4 is a partial schematic diagram of another semiconductor process chamber provided in an embodiment of this application, showing the situation where the support component rises to the process position;
  • Figure 5 is a bottom view of a retaining ring provided in an embodiment of this application.
  • Figure 6 is a schematic diagram of a support ring provided in an embodiment of this application.
  • Figure 7 is a schematic diagram of a retaining ring and a pressure ring provided in an embodiment of this application.
  • Figure 8 is a schematic diagram of a base and positioning ring provided in an embodiment of this application.
  • Figure 9 is a schematic diagram of a retaining ring provided in an embodiment of this application.
  • connection should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components.
  • connection can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components.
  • the semiconductor process chamber 100 provided in this application includes: a cavity 110, a shield 120, a retaining ring 130, a pressure ring assembly 140, and a support assembly 150.
  • the semiconductor process chamber 100 is a physical vapor deposition (PVD) process chamber.
  • the shield 120 is fitted inside the cavity 110, for example, supported on the upper end of the cavity 110, and grounded through the cavity 110.
  • the shield 120 is used to conduct away electrons ionized inside the semiconductor process chamber 100 and to protect other components inside the semiconductor process chamber 100.
  • Both the retaining ring 130 and the pressure ring assembly 140 are fitted inside the shielding member 120, with the pressure ring assembly 140 supported by the shielding member 120.
  • the retaining ring 130 covers the pressure ring assembly 140 and is supported by the shielding member 120.
  • the support assembly 150 is used to support the wafer 200.
  • the support assembly 150 When the support assembly 150 is raised to the process position, the support assembly 150 lifts the pressure ring assembly 140, and the inner edge of the pressure ring assembly 140 presses against the periphery of the wafer 200.
  • the pressure ring assembly 140 is insulated and separated from the retaining ring 130 and the shield 120, respectively.
  • the clamping ring assembly 140 is supported by the shielding member 120, but this does not mean that the clamping ring assembly 140 must always remain supported by the shielding member 120.
  • the clamping ring assembly 140 is supported by the shielding member 120.
  • the support assembly 150 rises to the process position, the support assembly 150 can lift the clamping ring assembly 140, thereby separating the clamping ring assembly 140 from the shielding member 120.
  • the clamping ring assembly 140 descends with the support assembly 150 until it is supported by the shielding member 120, after which the support assembly 150 continues to descend and separates from the clamping ring assembly 140.
  • the clamping ring assembly 140 since the clamping ring assembly 140 is detachably supported by the shielding member 120, it can separate from the shielding member 120 when the clamping ring assembly 140 is subjected to a lifting driving force.
  • the fact that the retaining ring 130 is supported by the shielding member 120 does not mean that the retaining ring 130 must always remain supported by the shielding member 120.
  • the retaining ring 130 when the semiconductor process chamber 100 is in a pre-processing preparation state, the retaining ring 130 is supported by the shielding member 120.
  • the support assembly 150 rises to the process position, the support assembly 150 can lift the retaining ring 130 via the retaining ring assembly 140, thereby separating the retaining ring 130 from the shielding member 120.
  • the retaining ring assembly 140 descends with the support assembly 150 until the retaining ring assembly 140 is supported by the shielding member 120.
  • the support assembly 150 continues to descend and separates from the retaining ring assembly 140, and the retaining ring 130 is again supported by the shielding member 120.
  • the retaining ring 130 is detachably supported by the shielding member 120, and the retaining ring 130 can be separated from the shielding member 120 when the retaining ring 130 is subjected to a lifting driving force.
  • the retaining ring 130 may always be supported on the shield 120, regardless of whether the semiconductor process chamber 100 is in a process state.
  • the retaining ring 130 may be supported above and connected to the shield 120, such that the retaining ring 130 is always supported on the shield 120.
  • the support assembly 150 rises to the processing position, and the retaining ring 130 covers the pressure ring assembly 140.
  • the pressure ring assembly 140 is insulated and separated from both the retaining ring 130 and the shielding member 120.
  • the retaining ring 130 can shield the pressure ring assembly 140, thereby reducing the amount of particles deposited on the pressure ring assembly 140, reducing the heat transferred from the pressure ring assembly 140 to the wafer 200, and weakening the temperature effect of the pressure ring assembly 140 on the wafer 200, thereby improving the film quality of the wafer 200.
  • the retaining ring 130 can shield the pressure ring assembly 140, reducing the amount of charge accumulated on the pressure ring assembly 140, thus mitigating the problem of arcing between the pressure ring assembly 140 and the wafer 200.
  • the support assembly 150 descends, and the pressure ring assembly 140 also descends to the position supported by the shield 120. Charged particles accumulated on the pressure ring assembly 140 are released to the grounding terminal via the shield 120 and the cavity 110.
  • the retaining ring 130 can be lifted, after the process is completed, the retaining ring 130 also descends to the position supported by the shield 120, and the charged particles accumulated on the retaining ring 130 are also released to the grounding terminal via the shield 120 and the cavity 110; when the retaining ring 130 is always supported by the shield 120, the charged particles on the retaining ring 130 are continuously released to the grounding terminal via the shield 120 and the cavity 110.
  • the retaining ring assembly 140 includes a retaining ring 141 and a support ring 142.
  • the support ring 142 is supported by the shield 120, and the retaining ring 141 is supported by the support ring 142.
  • the projection of the retaining ring 141 in the vertical direction onto the retaining ring 130 is located inside the projection of the shield 120 in the vertical direction onto the retaining ring 130.
  • the pressure ring assembly 140 is prevented from pressing entirely against the wafer 200, thus avoiding damage to the wafer 200 due to excessive weight. Furthermore, since the projection of the pressure ring 141 along the vertical direction onto the retaining ring 130 is located inside the projection of the shielding member 120 along the vertical direction onto the retaining ring 130, the outer diameter of the pressure ring 141 can be reduced, thereby reducing its weight. This prevents damage to the wafer 200 due to excessive weight of the pressure ring 141.
  • the gas outlet device below wafer 200 can blow gas onto wafer 200 to cool it.
  • the pressure ring 141 presses against the periphery of wafer 200, thereby sealing off the back-blown gas and improving the cooling effect on wafer 200.
  • the shielding member 120 includes a first main body portion 121, a first bent portion 122, and a second bent portion 123 connected in sequence.
  • the first main body portion 121 and the second bent portion 123 are spaced apart, and the second bent portion 123 is sleeved within the first main body portion 121. Both the first main body portion 121 and the second bent portion 123 protrude upward relative to the first bent portion 122.
  • the shielding member 120 has a bent structure, and the shielding member 120 forms a U-shaped groove by bending to support the retaining ring 130 and the pressure ring assembly 140 after the process is completed.
  • the retaining ring 130 includes a second main body portion 131 and a third bent portion 132 connected together.
  • the second main body portion 131 covers the pressure ring assembly 140, and the third bent portion 132 protrudes downward relative to the second main body portion 131.
  • the third bent portion 132 is spaced between the first main body portion 121 and the second bent portion 122, and the end of the third bent portion 132 facing the first bent portion 122 is supported by the first bent portion 122. In this way, the retaining ring 130 can be supported by the first bent portion 122.
  • the support ring 142 includes a third main body portion 1421 and an outer peripheral portion 1422 connected to each other.
  • the outer peripheral portion 1422 is disposed on the outer periphery of the third main body portion 1421.
  • the outer peripheral portion 1422 is sandwiched between the second bend portion 123 and the second main body portion 131 in the vertical direction, and the outer peripheral portion 1422 is supported by the second bend portion 123, while the pressure ring 141 is supported by the third main body portion 1421.
  • the outer peripheral portion 1422 protrudes upward relative to the third main body portion 1421.
  • the pressure ring 141 is fitted inside the outer peripheral portion 1422. In this way, the outer diameter of the pressure ring 141 can be reduced, thereby reducing the weight of the pressure ring 141.
  • the support ring 142 further includes a protrusion 1423 connected to the third main body portion 1421.
  • the protrusion 1423 protrudes downward relative to the third main body portion 1421 and is fitted within the second bent portion 123.
  • a first labyrinthine channel can be formed between the protrusion 1423, the outer peripheral portion 1422, the second bent portion 123, the third bent portion 132, the second bent portion 123, and the first main body portion 121.
  • This first labyrinthine channel is used to transport process gas from the lower cavity 110a to the upper cavity 110b.
  • the first labyrinthine channel prevents target atoms in the upper cavity 110b from moving to the lower cavity 110a via the first labyrinthine channel, thereby contaminating the cavity wall of the lower cavity 110a.
  • the third bend 132 is provided with a vent 1321 extending through it along its own thickness direction.
  • the process gas can flow through the vent 1321, allowing for smoother flow of the process gas.
  • the upper surface of the retaining ring assembly 140 and the lower surface of the retaining ring 130 form a gap region. This gap region is used to insulate and separate the retaining ring assembly 140 and the retaining ring 130 from each other.
  • the second body portion 131 is provided with a first protruding ring 133 protruding toward the retaining ring assembly 140, the first protruding ring 133 surrounding the axis of the retaining ring 130.
  • the number of first protruding rings 133 can be one or at least two.
  • the retaining ring 141 is provided with a second protruding ring 1411 protruding toward the second body portion 131, the second protruding ring 1411 surrounding the axis of the retaining ring 141.
  • This allows a second labyrinth channel to be formed between the upper surface of the retaining ring assembly 140 and the lower surface of the retaining ring 130, preventing target atoms in the upper cavity 110b from moving toward the center of the second labyrinth channel.
  • the distance between the opposing surfaces of the retaining ring 130 and the pressure ring 141 can be approximately 3 mm.
  • those skilled in the art can flexibly adjust the distance between the opposing surfaces of the retaining ring 130 and the pressure ring 141 according to actual needs; these adjustments will not be listed here.
  • the distance between the opposing surfaces of the retaining ring 130 and the support ring 142 can be approximately 3 mm.
  • those skilled in the art can flexibly adjust the distance between the opposing surfaces of the retaining ring 130 and the support ring 142 according to actual needs; these adjustments will not be listed here.
  • the support assembly 150 includes a base 151 and a positioning ring 152.
  • the base 151 has a support area 1511 for supporting the wafer 200.
  • the positioning ring 152 is sleeved outside the support area 1511, and a first positioning post 1521 is provided on the upward-facing side of the positioning ring 152.
  • the support ring 142 has a first positioning hole 1424 opposite to the first positioning post 1521.
  • the pressure ring 141 has a second positioning hole 1412 opposite to the first positioning post 1521.
  • the number of first positioning posts 1521 is at least two.
  • the number of first positioning posts 1521 is three. This prevents misalignment between the pressure ring 141 and the wafer 200 supported on the base 151 by positioning the support assembly 150 with the pressure ring 141.
  • the support assembly 150 can be positioned with the support ring 142, and the support ring 142 can be positioned with the retaining ring 130, thus preventing misalignment between the retaining ring 130 and the pressure ring 141.
  • the inner circumferential surface of the positioning ring 152 is provided with an annular inclined surface 1522.
  • the opening formed by the annular inclined surface 1522 gradually increases in the vertically upward direction.
  • the annular inclined surface 1522 can be used to guide the wafer 200 to be carried on the carrier region 1511.
  • the annular inclined surface 1522 can play a positioning role and can prevent the wafer 200 from deviating from the carrier region 1511.
  • the base 151 is provided with a positioning pin 1512 protruding toward the positioning ring 152, and the positioning ring 152 is provided with a positioning groove.
  • the positioning pin 1512 is positioned and engaged with the positioning groove to prevent the positioning ring 152 from being misaligned relative to the base 151.
  • the support assembly 150 further includes a cooling plate 153, an insulating plate 154, a bellows (not shown), and a column 156.
  • the cooling plate 153 is disposed below the base 151 and is used to cool the base 151, thereby indirectly cooling the wafer 200.
  • the bellows (not shown) is disposed below the insulating plate 154, with one end connected to the insulating plate 154 via a top plate 155, and the other end connected to the column 156 via a bottom plate (not shown).
  • the column 156 is connected to a driver. The driver is used to drive the column 156 to move up and down, thereby causing the entire support assembly 150 to move up and down.
  • the semiconductor process chamber 100 further includes an insulating support 161.
  • the insulating support 161 is disposed on the side of the retaining ring assembly 140 facing the retaining ring 130.
  • the retaining ring assembly 140 supports the retaining ring 130 via the insulating support 161, thereby insulatingly separating the retaining ring 130 from the shield 120.
  • the wafer 200 can be raised to a higher height (i.e., the retaining ring 130 can be raised to different heights to suit different process positions required by different processes), thereby facilitating atomic deposition on the wafer 200.
  • the retaining ring 130 has a mating hole 1341 and at least three positioning oblong holes 1342 on the side facing the retaining ring assembly 140.
  • the positioning oblong holes 1342 are circumferentially distributed around the axis of the retaining ring 130, and the long axis of the positioning oblong holes 1342 extends radially along the retaining ring 130.
  • the number of insulating posts 161 is equal to the number of mating holes 1341.
  • the semiconductor process chamber 100 also includes a plurality of insulating positioning posts 162, the number of which is equal to the number of positioning oblong holes 1342.
  • the insulating pillars 161 are inserted into the docking holes 1341 one by one and support each other in the docking holes 1341.
  • the insulating positioning pillars 162 are inserted into the positioning oblong holes 1342 one by one and position each other in the side wall of the positioning oblong holes 1342.
  • “semicircle” refers to a closed shape formed by dividing a circle into two semicircular arcs through its center and translating them in opposite directions, connecting the endpoints of the two semicircular arcs with two parallel lines of equal length.
  • “Semicircular hole” refers to a hole with a cross-sectional shape of "semicircle” along its depth direction.
  • “Positioning semicircular hole” refers to a semicircular hole used for positioning. Furthermore, the major axis of the positioning semicircular hole 1342 is collinear with the line connecting the two centers of the semicircle.
  • the pressure ring assembly 140 and the retaining ring 130 can be positioned by inserting the insulating positioning posts 162 one-to-one into the positioning oblong holes 1342.
  • the cooperation between the insulating posts 161 and the mating holes 1341 serves to provide auxiliary support for the retaining ring 130.
  • the number of positioning oblong holes 1342 can be three, and the number of mating holes 1341 can be three.
  • the positioning oblong holes 1342 and mating holes 1341 are evenly and alternately distributed along the circumferential direction of the retaining ring 130.
  • the central angle formed by adjacent positioning oblong holes 1342 and mating holes 1341 and the center of the retaining ring 130 is 60 degrees.
  • an insulating support post 161 is provided on the side of the support ring 142 facing the retaining ring 130.
  • the insulating support post 161 may be provided on the outer periphery 1422 of the support ring 142.
  • the semiconductor process chamber 100 further includes a support member 170.
  • the support member 170 is disposed on the side of the retaining ring 130 facing the shield 120.
  • the retaining ring 130 is connected to the shield 120 via the support member 170, and the retaining ring 130 is grounded in sequence via the support member 170, the shield 120, and the chamber 110.
  • the support member 170 is connected to the third bend 132 of the retaining ring 130 and the first bend 122 of the shield 120, respectively.
  • the retaining ring 130 since the retaining ring 130 is connected to the shielding member 120 via the support member 170, the charge on the retaining ring 130 can be released to the ground terminal through the support member 170, the shielding member 120, and the cavity 110 during the processing of the wafer 200. Thus, during high-power processes, the retaining ring 130 is less likely to arc with adjacent components.
  • the upper surface of the pressure ring assembly 140 needs to maintain a certain distance from the retaining ring 130 during the process of processing the wafer 200.
  • the distance between the third bend 132 of the retaining ring 130 and the first bend 122 of the shield 120 may be small. Therefore, by providing a vent 1321 in the third bend 132, the process gas can flow through the vent 1321, which can make the flow of the process gas smoother.
  • the above provides two solutions: one where the retaining ring 130 can be lifted, and another where the retaining ring 130 is connected to the shielding member 120 via the support member 170.
  • the retaining ring 130 In the solution where the retaining ring 130 can be lifted, the retaining ring 130 is grounded when the support assembly 150 descends to a position separated from the pressure ring assembly 140; when the support assembly 150 rises to the process position, the retaining ring 130 separates from the shielding member 120, thus disconnecting the retaining ring 130 from the grounding terminal. That is, in the solution where the retaining ring 130 can be lifted, the retaining ring 130 can switch between a grounded state and a floating state. In the solution where the retaining ring 130 is connected to the shielding member 120 via the support member 170, the retaining ring 130 is always grounded; this solution is suitable for high-power process scenarios.
  • the retaining ring assembly 140 has a first through-hole 141a extending vertically through the retaining ring assembly 140.
  • the periphery of the first through-hole 141a is used to cover the wafer 200.
  • the retaining ring 130 has a second through-hole 130a extending vertically through the retaining ring 130.
  • the projection of the inner wall of the second through-hole 130a onto the retaining ring assembly 140 in the vertical direction is located at the periphery of the first through-hole 141a. In this way, the retaining ring 130 can be prevented from obstructing the wafer 200.
  • the projection of the inner wall of the second perforation 130a onto the pressure ring assembly 140 in the vertical direction is a first projection ring, and the area of the surface of the upper side of the pressure ring assembly 140 located inside the first projection ring is a first area.
  • the projection of the inner wall of the first perforation 141a onto the support assembly 150 in the vertical direction is a second projection ring, and the area of the second projection ring is a second area.
  • the difference between the first area and the second area is less than a preset value. For example, the first area and the second area are substantially equal.
  • the charge accumulated in the retaining ring assembly 140 is made substantially equal to the charge accumulated on the upper surface of the wafer 200, thereby reducing the potential difference between the retaining ring assembly 140 and the wafer 200 and preventing arcing between them.
  • a first through-hole 141a is formed in the retaining ring 141.
  • a first projection ring is formed in the retaining ring 141, and the first area is the area of the region of the top surface of the retaining ring 141 located within the first projection ring.
  • the second area is the area of the top surface of the wafer 200 not obscured by the retaining ring 141. In other words, the second area is the area of the wafer 200 exposed by the first through-hole 141a of the retaining ring 141.
  • the pressure ring assembly 140 mainly provides a scheme in which the pressure ring 141 and the support ring 142 are separately arranged. It can be understood that in other embodiments, the pressure ring 141 and the support ring 142 can also be set as an integral structure. In this way, the integral pressure ring assembly 140 can also be used to cover the wafer 200, and the pressure ring assembly 140 can release the charge through the shield 120 and the cavity 110 after the process is completed. However, it should also be noted that by using a separate pressure ring assembly 140, since the support ring 142 can be supported by the support assembly 150, the load on the wafer 200 can be reduced, and the pressure ring assembly 140 can prevent the wafer 200 from being crushed by the pressure ring assembly 140.
  • the semiconductor process chamber 100 further includes a cavity adapter 111.
  • the cavity adapter 111 is supported at the top end of the cavity 110.
  • a shield 120 is supported on the cavity adapter 111.
  • the semiconductor process chamber 100 also includes an insulating ring 112 and a target assembly 113.
  • the insulating ring 112 is supported on the cavity adapter 111, and the target assembly 113 is supported on the insulating ring 112.
  • the semiconductor process chamber 100 also includes a magnetron 180.
  • the magnetron 180 is disposed above the target assembly 113.

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  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

本公开提供一种半导体工艺腔室，其包括：腔体、屏蔽件、挡环、压环组件和支撑组件；屏蔽件套设于腔体内，且通过腔体接地，挡环和压环组件均套设于屏蔽件内，压环组件承载于屏蔽件，挡环罩设于压环组件上方，挡环承载于屏蔽件，支撑组件用于承载晶圆；在支撑组件上升至工艺位置的情况下，支撑组件托起压环组件，压环组件的内侧边缘压盖于晶圆的周缘，压环组件分别与挡环和屏蔽件绝缘分隔。半导体工艺腔室的挡环可以对压环起到遮挡作用，以防止压环上堆积过多电荷；且压环能够在工艺流程结束后释放电荷，可以避免压环与晶圆之间发生打火现象。

Description

半导体工艺腔室 技术领域
本申请涉及半导体技术领域，尤其涉及一种半导体工艺腔室。
背景技术
在实施半导体工艺的过程中，电荷会逐步在压环上聚集。当压环与晶圆之间的电势差过大的情况下，压环与晶圆会产生打火现象。
例如，在实施物理气相沉积(Physical Vapor Deposition，简称PVD)工艺的过程中，需要利用压环压住晶圆的外周。在工艺进行过程中，会有大部分带电粒子落在压环上，小部分落在晶圆上，而压环处于悬浮态，带电粒子不断的下落会使其产生电荷积累。当晶圆的衬底为导电性差的材料或者晶圆(例如晶圆具体为玻璃晶圆)本身导电性较差的情况下，压环和晶圆的电荷难以转移，压环会与晶圆表面沉积的金属膜之间形成非常大的电势差，从而容易出现打火现象。
此外，粒子沉积在压环上会使得压环的温度上升，压环一方面会通过热辐射向四周传递有限的热量，一方面会通过与晶圆接触区域的热传导传递大量的热量，导致晶圆局部区域的温度较高，这样会使得晶圆温度不均匀，从而影响成膜的质量。
发明内容
本申请实施例提供了一种半导体工艺腔室，以解决背景技术存在的问题。
本申请实施例提供的半导体工艺腔室包括：腔体、屏蔽件、挡环、压环组件和支撑组件；所述屏蔽件套设于所述腔体内，且通过所述腔体接地，所述挡环和所述压环组件均套设于所述屏蔽件内，所述压环组件承载于所述屏蔽件，所述挡环罩设于所述压环组件上方，所述挡环承载于所述屏蔽件，所述支撑组件用于承载晶圆；在所述支撑组件上升至工艺位置的情况下，所述支撑组件托起所述压环组件，所述压环组件的内侧边缘压盖于所述晶圆的周缘，所述压环组件分别与所述挡环和所述屏蔽件绝缘分隔。
在一些实施例中，所述压环组件包括压环和支撑环；所述支撑环承载于所述屏蔽件，所述压环承载于所述支撑环，所述压环沿竖直方向在所述挡环上的投影位于所述屏蔽件沿竖直方向在所述挡环上的投影内侧；在所述支撑组件上升至工艺位置的情况下，所述支撑组件托起所述支撑环，所述压环的内侧边缘压盖于所述晶圆的周缘。
在一些实施例中，所述屏蔽件包括依次连接的第一主体部、第一弯折部和第二弯折部；所述第一主体部与所述第二弯折部间隔分布，所述第二弯折部套设于所述第一主体部内，所述第一主体部和所述第二弯折部均相对所述第一弯折部朝上凸伸；所述挡环包括相连接的第二主体部和第三弯折部，所述第二主体部遮盖于所述压环组件上方，所述第三弯折部相对所述第二主体部朝下凸伸，所述第三弯折部间隔设置于所述第一主体部与所述第二弯折部之间，所述第三弯折部的朝向所述第一弯折部的端部承载于所述第一弯折部。
在一些实施例中，所述支撑环包括相连接的第三主体部和外周部，所述外周部设于所述第三主体部外周，所述外周部在竖直方向上夹于所述第二弯折部和所述第二主体部之间，所述外周部承载于所述第二弯折部，所述压环承载于所述第三主体部。
在一些实施例中，所述支撑环还包括与所述第三主体部连接的凸起部，所述凸起部相对所述第三主体部朝下凸伸，所述凸起部套设于所述第二弯折部内，所述第三弯折部设有沿其自身的厚度方向贯穿所述第三弯折部的气孔。
在一些实施例中，所述第二主体部设有朝所述压环组件凸伸的第一凸环，所述第一凸环沿所述挡环的轴线环绕；和/或，所述压环设有朝向所述第二主体部凸伸的第二凸环，所述第二凸环沿所述压环的轴线环绕。
在一些实施例中，所述支撑组件包括基座和定位环，所述基座设有承载区，所述定位环套设于所述承载区外，所述定位环的朝上的一侧设有第一定位柱，所述支撑环设有与所述第一定位柱相对的第一定位孔，所述压环设有与所述第一定位柱相对的第二定位孔，在所述支撑组件上升至所述工艺位置的情况下，所述第一定位柱插设于所述第一定位孔和所述第二定位孔。
在一些实施例中，所述半导体工艺腔室还包括绝缘支柱，所述绝缘支柱设于所述压环组件的朝向所述挡环的一侧，在所述支撑组件上升至所述工艺位置的情况下，所述压环组件经所述绝缘支柱托起所述挡环，以使所述挡环与所述屏蔽件绝缘分隔。
在一些实施例中，所述挡环的朝向所述压环组件的一侧设有对接孔和至少三个定位腰圆孔，所述定位腰圆孔绕所述挡环的轴线周向分布，所述定位腰圆孔的长轴沿所述挡环的径向延伸，所述绝缘支柱的数量与所述对接孔的数量相等，所述半导体工艺腔室还包括多个绝缘定位柱，所述绝缘定位柱的数量与所述定位腰圆孔的数量相等；在所述支撑组件上升至所述工艺位置的情况下，所述绝缘支柱一一对应地插设于所述对接孔，并与所述对接孔支撑配合，所述绝缘定位柱一一对应地插设于所述定位腰圆孔，并与所述定位腰圆孔的侧壁定位配合。
在一些实施例中，所述半导体工艺腔室还包括支撑件，所述支撑件设于所述挡环的朝向所述屏蔽件的一侧，所述挡环经所述支撑件与所述屏蔽件连接，所述挡环依次经所述支撑件、所述屏蔽件和所述腔体进行接地。
在一些实施例中，所述压环组件设有沿竖直方向贯穿所述压环组件的第一穿孔，所述第一穿孔的周缘部位用于压盖所述晶圆；所述挡环设有沿竖直方向贯穿所述挡环的第二穿孔，所述第二穿孔的内壁沿竖直方向在所述压环组件上的投影位于所述第一穿孔的外围。
在一些实施例中，所述第二穿孔的内壁沿竖直方向在所述压环组件上的投影为第一投影圈，所述压环组件的上侧的位于所述第一投影圈内侧的表面的面积为第一面积，所述第一穿孔的内壁沿竖直方向在所述支撑组件上的投影为第二投影圈，所述第二投影圈的面积为第二面积，所述第一面积与所述第二面积之间的差值小于预设值。
本申请实施例采用的上述至少一个技术方案能够达到以下有益效果：
在本申请的实施例中，在对晶圆进行工艺处理的过程中，支撑组件上升至工艺位置，挡环罩设于压环组件上方，压环组件分别与挡环和屏蔽件绝缘分隔，这样，挡环可以对压环组件起到遮挡效果，从而可以减少粒子在压环组件的沉积量，可以减少压环组件传递至晶圆的热量，可以减弱压环组件对晶圆的温度的影响，因而可以提升晶圆的成膜质量。而且，挡环可以对压环组件起到遮挡效果，可以减少压环组件上积累的电荷量，这样可以改善压环组件与晶圆发生打火现象的问题。
进一步地，在工艺处理完毕后，支撑组件下降，压环组件也随之下降至承载于屏蔽件的位置。压环组件上积累的带电粒子会经屏蔽件和腔体释放至接地端。其中，在挡环可被托起的情况下，在工艺处理完毕后，挡环也下降至承载于屏蔽件的位置，挡环上积累的带电粒子也会经屏蔽件和腔体释放至接地端；在挡环一直承载于屏蔽件的情况下，挡环上的带电粒子实时经屏蔽件和腔体释放至接地端。这样，可以通过对压环组件和挡环进行电荷释放的方式，避免电荷在压环组件和挡环上累积。从而可以防止因电荷累积在压环组件和挡环上，而出现打火现象。
附图说明
为了更清楚地说明本申请实施例或相关技术中的技术方案，下面将对实施例或相关技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请中记载的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的一种半导体工艺腔室的示意图，其示出了支撑组件上升至工艺位置的情形；
图2为图1中示出的半导体工艺腔室的局部示意图；
图3为本申请实施例提供的一种半导体工艺腔室的局部示意图，其示出了支撑组件下降至与压环组件分离位置的情形；
图4为本申请实施例提供的另一种半导体工艺腔室的局部示意图，其示出了支撑组件上升至工艺位置的情形；
图5为本申请实施例提供的一种挡环的仰视图；
图6为本申请实施例提供的一种支撑环的示意图；
图7为本申请实施例提供的一种挡环和压环的示意图；
图8为本申请实施例提供的一种基座和定位环的示意图；
图9为本申请实施例提供的一种挡环的示意图。
附图标记说明：
100-半导体工艺腔室；110-腔体；110a-下方空腔；110b-上方空腔；111-
腔体转接件；112-绝缘环；113-靶材组件；120-屏蔽件；121-第一主体部；122-第一弯折部；123-第二弯折部；130-挡环；130a-第二穿孔；131-第二主体部；132-第三弯折部；1321-气孔；133-第一凸环；1341-对接孔；1342-定位腰圆孔；140-压环组件；141-压环；141a-第一穿孔；1411-第二凸环；1412-第二定位孔；142-支撑环；1421-第三主体部；1422-外周部；1423-凸起部；1424-第一定位孔；150-支撑组件；151-基座；1511-承载区；1512-定位销；152-定位环；1521-第一定位柱；1522-环形斜面；153-冷却盘；154-绝缘盘；155-顶盘；156-立柱；161-绝缘支柱；162-绝缘定位柱；170-支撑件；180-磁控管；200-晶圆。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请具体实施例及相应的附图对本申请技术方案进行清楚、完整地描述。显然，所描述的实施例仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
此外，尽管本申请中所使用的术语是从公知公用的术语中选择的，但是本申请说明书中所提及的一些术语可能是申请人按他或她的判断来选择的，其详细含义在本文的描述的相关部分中说明。
此外，要求不仅仅通过所使用的实际术语，而是还要通过每个术语所蕴含的意义来理解本申请。
以下结合附图，详细说明本申请各实施例提供的技术方案。
本申请实施例提供了一种半导体工艺腔室。参考图1至图9，本申请实施例提供的半导体工艺腔室100包括：腔体110、屏蔽件120、挡环130、压环组件140和支撑组件150。示例性地，半导体工艺腔室100为物理气相沉积(PVD)工艺腔室。
屏蔽件120套设于腔体110内，例如承载于腔体110的上端部，且通过腔体110接地。其中，屏蔽件120用于把半导体工艺腔室100内电离出的电子导走，以及保护半导体工艺腔室100内的其他部件。
挡环130和压环组件140均套设于屏蔽件120内，压环组件140承载于屏蔽件120。挡环130罩设于压环组件140上方，挡环130承载于屏蔽件120。支撑组件150用于承载晶圆200。
在支撑组件150上升至工艺位置的情况下，支撑组件150托起压环组件140，压环组件140的内侧边缘压盖于晶圆200的周缘，压环组件140分别与挡环130和屏蔽件120绝缘分隔。
需要说明的是，在本申请的实施例中，压环组件140承载于屏蔽件120，并不指压环组件140必须一直保持于承载于屏蔽件120的状态。例如，在半导体工艺腔室100处于做工艺前的准备状态的情况下，压环组件140承载于屏蔽件120。在支撑组件150上升至工艺位置的情况下，支撑组件150可以将压环组件140托起，从而使得压环组件140与屏蔽件120分离。在半导体工艺腔室100完成工艺后，压环组件140随支撑组件150下降，直至承载于屏蔽件120，之后支撑组件150继续下降，并与压环组件140分离。换言之，由于压环组件140可分离地承载于屏蔽件120，因而，在压环组件140受托起驱动力的情况下，压环组件140能够与屏蔽件120分离。
此外，挡环130承载于屏蔽件120，并不指挡环130必须一直保持于承载于屏蔽件120的状态。例如，在一些实施例中，在半导体工艺腔室100处于做工艺前的准备状态的情况下，挡环130承载于屏蔽件120。在支撑组件150上升至工艺位置的情况下，支撑组件150可以经压环组件140将挡环130托起，从而使得挡环130与屏蔽件120分离。在半导体工艺腔室100完成工艺后，压环组件140随支撑组件150下降，直至压环组件140承载于屏蔽件120，之后支撑组件150继续下降，并与压环组件140分离，挡环130也承载于屏蔽件120。换言之，在一些实施例中，挡环130可分离地承载于屏蔽件120，在挡环130受托起驱动力的情况下，挡环130能够与屏蔽件120分离。在一些其它的实施例中，无论半导体工艺腔室100是否处于工艺处理状态，挡环130可一直承载于屏蔽件120。例如，挡环130承载于屏蔽件120上方，并与屏蔽件120连接，以使得挡环130一直承载于屏蔽件120。
以此方式，在本申请的实施例中，在对晶圆200进行工艺处理的过程中，支撑组件150上升至工艺位置，挡环130罩设于压环组件140上方，压环组件140分别与挡环130和屏蔽件120绝缘分隔，这样，挡环130可以对压环组件140起到遮挡效果，从而可以减少粒子在压环组件140的沉积量，可以减少压环组件140传递至晶圆200的热量，可以减弱压环组件140对晶圆200的温度的影响，因而可以提升晶圆200的成膜质量。而且，挡环130可以对压环组件140起到遮挡效果，可以减少压环组件140上积累的电荷量，这样可以改善压环组件140与晶圆200发生打火现象的问题。
进一步地，在工艺处理完毕后，支撑组件150下降，压环组件140也随之下降至承载于屏蔽件120的位置。压环组件140上积累的带电粒子会经屏蔽件120和腔体110释放至接地端。其中，在挡环130可被托起的情况下，在工艺处理完毕后，挡环130也下降至承载于屏蔽件120的位置，挡环130上积累的带电粒子也会经屏蔽件120和腔体110释放至接地端；在挡环130一直承载于屏蔽件120的情况下，挡环130上的带电粒子实时经屏蔽件120和腔体110释放至接地端。这样，可以通过对压环组件140和挡环130进行电荷释放的方式，避免电荷在压环组件140和挡环130上累积，从而可以防止因电荷累积在压环组件140和挡环130上而出现打火现象。
参考图1至图3，在一些实施例中，压环组件140包括压环141和支撑环142。支撑环142承载于屏蔽件120，压环141承载于支撑环142。压环141沿竖直方向在挡环130上的投影位于屏蔽件120沿竖直方向在挡环130上的投影内侧。在支撑组件150上升至工艺位置的情况下，支撑组件150托起支撑环142，压环141的内侧边缘压盖于晶圆200的周缘。
这样，可以通过将压环组件140分为压环141和支撑环142，使得压环141压盖于晶圆200，支撑环142托承于支撑组件150的方式，避免压环组件140整体压盖于晶圆200，从而因压环组件140重量过大而使得晶圆200受损。此外，由于压环141沿竖直方向在挡环130上的投影位于屏蔽件120沿竖直方向在挡环130上的投影内侧，这样可以起到减小压环141的外径的效果，以达到减小压环141的重量的效果。从而可以防止因压环141重量过大而使得晶圆200受损。
需说明的是，在对晶圆200进行工艺处理的过程中，晶圆200下方的出气装置可向晶圆200吹出气体，以对晶圆200进行冷却。采用本申请实施例提供的方案，压环141压盖于晶圆200的周缘，从而可以封住背吹气体，能够提升对晶圆200的冷却效果。
虽然，本领域的技术人员可以参考相关技术设计屏蔽件等构件的结构，但是，为便于本领域的技术人员更好地实施本申请实施例提供的方案，以下，提供了较详细的屏蔽件等构件的构造，供本领域的技术人员参考。
参考图2，在一些实施例中，屏蔽件120包括依次连接的第一主体部121、第一弯折部122和第二弯折部123。第一主体部121与第二弯折部123间隔分布，第二弯折部123套设于第一主体部121内，第一主体部121和第二弯折部123均相对第一弯折部122朝上凸伸。换言之，屏蔽件120为弯折式结构，屏蔽件120以弯折的方式，形成U型凹槽，以在工艺处理完毕后，承载挡环130和压环组件140。
参考图1和图2，在一些实施例中，挡环130包括相连接的第二主体部131和第三弯折部132。第二主体部131遮盖于压环组件140上方，第三弯折部132相对第二主体部131朝下凸伸。第三弯折部132间隔设置于第一主体部121与第二弯折部123之间，第三弯折部132的朝向第一弯折部122的端部承载于第一弯折部122。这样，可以利用第一弯折部122承载挡环130。
参考图2，在一些实施例中，支撑环142包括相连接的第三主体部1421和外周部1422。外周部1422设于第三主体部1421外周。外周部1422在竖直方向上夹于第二弯折部123和第二主体部131之间，外周部1422承载于第二弯折部123，压环141承载于第三主体部1421。
进一步地，外周部1422相对第三主体部1421朝上凸起。压环141套设于外周部1422的内侧。这样，可以达到减小压环141的外径的效果，以减小压环141的重量。
参考图1、图2和图4，在一些实施例中，支撑环142还包括与第三主体部1421连接的凸起部1423。凸起部1423相对第三主体部1421朝下凸伸，凸起部1423套设于第二弯折部123内。这样，凸起部1423、外周部1422、第二弯折部123、第三弯折部132、第二弯折部123和第一主体部121之间可形成第一迷宫式通道，第一迷宫式通道用于供工艺气体从下方空腔110a输送至上方空腔110b。此外，第一迷宫式通道可防止上方空腔110b的靶材原子经第一迷宫式通道移动至下方空腔110a，从而污染下方空腔110a的腔壁。
在一些实施例中，参考图2、图4、图7和图9，第三弯折部132设有沿其自身的厚度方向贯穿第三弯折部132的气孔1321。这样，在对晶圆200进行工艺处理的过程中，若第三弯折部132与第一弯折部122的间距较小，则工艺气体可以经气孔1321流动，可以使得工艺气体的流动较为顺畅。
参考图2，在一些实施例中，在支撑组件150上升至工艺位置的情况下，即在对晶圆200进行工艺处理的过程中，压环组件140的上表面与挡环130的下表面形成间隔区。该间隔区用于使得压环组件140与挡环130相互绝缘分隔。
压环组件140的上表面与挡环130的下表面之间的间隔区与第一迷宫式通道连通。因而，上方空腔110b的靶材原子，有可能会经间隔区溅射至压环141的整个上表面。为避免出现该问题，参考图2和图4，在一些实施例中，第二主体部131设有朝压环组件140凸伸的第一凸环133，第一凸环133沿挡环130的轴线环绕。示例性地，第一凸环133的数量可以为一圈或至少两圈。和/或，压环141设有朝向第二主体部131凸伸的第二凸环1411，第二凸环1411沿压环141的轴线环绕。这样，可以使得压环组件140的上表面与挡环130的下表面之间形成第二迷宫式通道，以阻碍上方空腔110b的靶材原子，朝第二迷宫式通道的中心移动。
需要说明的是，为避免挡环130与压环141之间的电势差过大而导致放电，可使得挡环130与压环141的相对的表面的间距在3毫米左右。当然，本领域的技术人员也可以根据实际需求灵活调整挡环130与压环141的相对的表面的间距，这里不再一一列举。为避免挡环130与支撑环142之间的电势差过大而导致放电，可使得挡环130与支撑环142的相对的表面的间距在3毫米左右。当然，本领域的技术人员也可以根据实际需求灵活调整挡环130与支撑环142的相对的表面的间距，这里不再一一列举。
参考图1、图2和图8，在一些实施例中，支撑组件150包括基座151和定位环152。基座151设有承载区1511。承载区1511用于承载晶圆200。定位环152套设于承载区1511外，定位环152的朝上的一侧设有第一定位柱1521。结合图4和图6，支撑环142设有与第一定位柱1521相对的第一定位孔1424。结合图4，压环141设有与第一定位柱1521相对的第二定位孔1412。在支撑组件150上升至工艺位置的情况下，第一定位柱1521插设于第一定位孔1424和第二定位孔1412。第一定位柱1521分别与第一定位孔1424的孔壁和第二定位孔1412的孔壁定位配合。
示例性地，第一定位柱1521的数量为至少两个。例如第一定位柱1521的数量为3个。这样，可以通过支撑组件150与压环141定位配合的方式，防止压环141与承载于基座151的晶圆200错位。此外，支撑组件150可与支撑环142定位配合，支撑环142可与挡环130定位配合，这样，可以防止挡环130与压环141错位。
参考图2，在一些实施例中，定位环152的内周面设有环形斜面1522。环形斜面1522围成的开口沿竖直向上的方向逐渐增大。这样，环形斜面1522可用于引导晶圆200承载于承载区1511。在晶圆200承载于承载区1511的过程中，环形斜面1522可以起到定位作用，可以防止晶圆200相对承载区1511出现位置偏差。
参考图2，在一些实施例中，基座151设有朝向定位环152凸伸的定位销1512，定位环152设有定位凹槽，定位销1512与定位凹槽定位配合，以防止定位环152相对基座151错位。
在一些实施例中，如图1所示，支撑组件150还包括冷却盘153、绝缘盘154、波纹管(未示出)和立柱156。冷却盘153设于基座151下方，冷却盘153用于对基座151进行冷却，进而间接对晶圆200进行冷却。波纹管(未示出)设于绝缘盘154下方，波纹管的一端通过顶盘155与绝缘盘154连接，另一端通过底盘(未示出)与立柱156连接。此外，立柱156用于与驱动器连接。驱动器用于驱动立柱156升降，以使得支撑组件150整体进行升降。
参考图2、图3和图6，在一些实施例中，半导体工艺腔室100还包括绝缘支柱161。绝缘支柱161设于压环组件140的朝向挡环130的一侧，在支撑组件150上升至工艺位置的情况下，压环组件140经绝缘支柱161托起挡环130，以使挡环130与屏蔽件120绝缘分隔。这样，可以通过采用不同高度的绝缘支柱161将挡环130顶起的方式，使得晶圆200能够升高至更高的高度(即挡环130可以上升至不同的高度，适用于不同工艺所要求的不同工艺位置)，从而便于原子在晶圆200上沉积。
参考图2、图3和图5，在一些实施例中，挡环130的朝向压环组件140的一侧设有对接孔1341和至少三个定位腰圆孔1342。定位腰圆孔1342绕挡环130的轴线周向分布，定位腰圆孔1342的长轴沿挡环130的径向延伸。绝缘支柱161的数量与对接孔1341的数量相等。半导体工艺腔室100还包括多个绝缘定位柱162，绝缘定位柱162的数量与定位腰圆孔1342的数量相等。
在支撑组件150上升至工艺位置的情况下，绝缘支柱161一一对应地插设于对接孔1341，并与对接孔1341支撑配合，绝缘定位柱162一一对应地插设于定位腰圆孔1342，并与定位腰圆孔1342的侧壁定位配合。
需说明的是，“腰圆”是指过圆心将一个圆平分成两个半圆弧且相互反向平移，用两根等长平行线将两个半圆弧的端点连接而形成的封闭图形。“腰圆孔”指沿深度方向的横截面形状为“腰圆”的孔。“定位腰圆孔”指腰圆孔起定位作用。此外，定位腰圆孔1342的长轴与腰圆的两个圆心的连线共线。
采用以上方案，可以通过绝缘定位柱162一一对应地插设于定位腰圆孔1342的方式，可以对压环组件140和挡环130进行定位。此外，绝缘支柱161和对接孔1341的配合，起辅助支撑挡环130的作用。
此外，示例性地，定位腰圆孔1342的数量可以为三个，对接孔1341的数量可以为三个，定位腰圆孔1342和对接孔1341沿挡环130的圆周方向均匀交错分布。例如，相邻的定位腰圆孔1342和对接孔1341与挡环130的圆心构成的圆心角为60度。
还需说明的是，在压环组件140包括支撑环142的情况下，绝缘支柱161设于支撑环142的朝向挡环130的一侧。具体地，绝缘支柱161可设于支撑环142的外周部1422。在支撑组件150上升至工艺位置的情况下，支撑环142经绝缘支柱161托起挡环130，以使挡环130与屏蔽件120绝缘分隔。
参考图4，在一些实施例中，半导体工艺腔室100还包括支撑件170。支撑件170设于挡环130的朝向屏蔽件120的一侧。挡环130经支撑件170与屏蔽件120连接，挡环130依次经支撑件170、屏蔽件120和腔体110进行接地。例如，支撑件170分别与挡环130的第三弯折部132和屏蔽件120的第一弯折部122连接。
采用该方案，由于挡环130经支撑件170连接于屏蔽件120，从而，在对晶圆200进行工艺处理的过程中，挡环130上的电荷可以经支撑件170、屏蔽件120和腔体110释放至接地端。这样，在实施高功率工艺的过程中，挡环130不容易与相邻的其它构件出现打火现象。
此外，由于挡环130经支撑件170连接于屏蔽件120，则在对晶圆200进行工艺处理的过程中，压环组件140的上表面需与挡环130保持一定的间距。
另外，需说明的是，在挡环130经支撑件170连接于屏蔽件120的情况下，挡环130的第三弯折部132与屏蔽件120的第一弯折部122的间距可能较小，因而，可以通过在第三弯折部132设置气孔1321的方式，使得工艺气体可以经气孔1321流动，可以使得工艺气体的流动较为顺畅。
以上，分别提供了挡环130能够被顶起的方案以及挡环130经支撑件170连接于屏蔽件120的方案。其中，在挡环130能够被顶起的方案中，在支撑组件150下降至与压环组件140分离的位置的情况下，挡环130处于接地状态；在支撑组件150上升至工艺位置的情况下，挡环130与屏蔽件120分离，从而使得挡环130与接地端断开连接。即，在挡环130能够被顶起的方案中，挡环130能够在接地状态和悬浮状态之间切换。在挡环130经支撑件170连接于屏蔽件120的方案中，挡环130一直处于接地状态，该方案适用于高功率工艺场景。
参考图1、图2和图7，在一些实施例中，压环组件140设有沿竖直方向贯穿压环组件140的第一穿孔141a。第一穿孔141a的周缘部位用于压盖晶圆200。挡环130设有沿竖直方向贯穿挡环130的第二穿孔130a。第二穿孔130a的内壁沿竖直方向在压环组件140上的投影位于第一穿孔141a的外围。这样，可以避免挡环130遮挡晶圆200。
在一些实施例中，第二穿孔130a的内壁沿竖直方向在压环组件140上的投影为第一投影圈，压环组件140的上侧的位于第一投影圈内侧的表面的面积为第一面积。第一穿孔141a的内壁沿竖直方向在支撑组件150上的投影为第二投影圈，第二投影圈的面积为第二面积。第一面积与第二面积之间的差值小于预设值。例如，第一面积与第二面积基本相等。
这样，可以使得压环组件140的内周的部分区域经第二穿孔130a暴露在外，电荷可以在压环组件140的内周的暴露在外的区域聚集；此外，晶圆200的上表面可以经第一穿孔141a暴露在外，电荷还可以在晶圆200的上表面聚集。进而，可以通过使得第一面积与第二面积基本相等的方式，使得压环组件140聚集的电荷与晶圆200的上表面聚集的电荷基本相等，以减小压环组件140与晶圆200之间的电势差，从而防止压环组件140与晶圆200出现打火现象。
在一些实施例中，在压环组件140包括压环141和支撑环142的情况下，第一穿孔141a开设于压环141。第一投影圈形成于压环141，则第一面积为压环141的顶面的位于第一投影圈的区域的面积。此外，第二面积为晶圆200的未被压环141遮挡的顶面的面积。换言之，第二面积为晶圆200的经压环141的第一穿孔141a暴露在外的区域的面积。
需说明的是，在以上的实施例中，主要提供了压环组件140包括分开设置的压环141和支撑环142的方案，可以理解的是，在其它的实施例中，压环141和支撑环142也可以设为一体式结构。这样，也可以利用一体式的压环组件140压盖晶圆200，且可以使得在工艺做完后，压环组件140经屏蔽件120和腔体110释放电荷。但是，还需说明的是，采用分体式的压环组件140，由于支撑环142可承载于支撑组件150，因而可以降低晶圆200的承重，可以防止压环组件140将晶圆200压坏。
参考图1，在一些实施例中，半导体工艺腔室100还包括腔体转接件111。腔体转接件111承载于腔体110的顶端。屏蔽件120承载于腔体转接件111上。进一步地，半导体工艺腔室100还包括绝缘环112和靶材组件113。绝缘环112承载于腔体转接件111，靶材组件113承载于绝缘环112。进一步地，半导体工艺腔室100还包括磁控管180。磁控管180设于靶材组件113上方。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。
尽管已经示出和描述了本申请的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本申请实施例的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本申请实施例的范围由所附权利要求及其等同物限定。

Claims (12)

  1. 一种半导体工艺腔室，其特征在于，包括：腔体、屏蔽件、挡环、压环组件和支撑组件；
    所述屏蔽件套设于所述腔体内，且通过所述腔体接地，所述挡环和所述压环组件均套设于所述屏蔽件内，所述压环组件承载于所述屏蔽件，所述挡环罩设于所述压环组件上方，所述挡环承载于所述屏蔽件，所述支撑组件用于承载晶圆；
    在所述支撑组件上升至工艺位置的情况下，所述支撑组件托起所述压环组件，所述压环组件的内侧边缘压盖于所述晶圆的周缘，所述压环组件分别与所述挡环和所述屏蔽件绝缘分隔。
  2. 根据权利要求1所述的半导体工艺腔室，其特征在于，所述压环组件包括压环和支撑环；所述支撑环承载于所述屏蔽件，所述压环承载于所述支撑环，所述压环沿竖直方向在所述挡环上的投影位于所述屏蔽件沿竖直方向在所述挡环上的投影内侧；
    在所述支撑组件上升至工艺位置的情况下，所述支撑组件托起所述支撑环，所述压环的内侧边缘压盖于所述晶圆的周缘。
  3. 根据权利要求2所述的半导体工艺腔室，其特征在于，所述屏蔽件包括依次连接的第一主体部、第一弯折部和第二弯折部；所述第一主体部与所述第二弯折部间隔分布，所述第二弯折部套设于所述第一主体部内，所述第一主体部和所述第二弯折部均相对所述第一弯折部朝上凸伸；
    所述挡环包括相连接的第二主体部和第三弯折部，所述第二主体部遮盖于所述压环组件上方，所述第三弯折部相对所述第二主体部朝下凸伸，所述第三弯折部间隔设置于所述第一主体部与所述第二弯折部之间，所述第三弯折部的朝向所述第一弯折部的端部承载于所述第一弯折部。
  4. 根据权利要求3所述的半导体工艺腔室，其特征在于，所述支撑环包括相连接的第三主体部和外周部，所述外周部设于所述第三主体部外周，所述外周部在竖直方向上夹于所述第二弯折部和所述第二主体部之间，所述外周部承载于所述第二弯折部，所述压环承载于所述第三主体部。
  5. 根据权利要求4所述的半导体工艺腔室，其特征在于，所述支撑环还包括与所述第三主体部连接的凸起部，所述凸起部相对所述第三主体部朝下凸伸，所述凸起部套设于所述第二弯折部内，所述第三弯折部设有沿其自身的厚度方向贯穿所述第三弯折部的气孔。
  6. 根据权利要求3所述的半导体工艺腔室，其特征在于，所述第二主体部设有朝所述压环组件凸伸的第一凸环，所述第一凸环沿所述挡环的轴线环绕；和/或，所述压环设有朝向所述第二主体部凸伸的第二凸环，所述第二凸环沿所述压环的轴线环绕。
  7. 根据权利要求2所述的半导体工艺腔室，其特征在于，所述支撑组件包括基座和定位环，所述基座设有承载区，所述定位环套设于所述承载区外，所述定位环的朝上的一侧设有第一定位柱，所述支撑环设有与所述第一定位柱相对的第一定位孔，所述压环设有与所述第一定位柱相对的第二定位孔，在所述支撑组件上升至所述工艺位置的情况下，所述第一定位柱插设于所述第一定位孔和所述第二定位孔。
  8. 根据权利要求1所述的半导体工艺腔室，其特征在于，所述半导体工艺腔室还包括绝缘支柱，所述绝缘支柱设于所述压环组件的朝向所述挡环的一侧，在所述支撑组件上升至所述工艺位置的情况下，所述压环组件经所述绝缘支柱托起所述挡环，以使所述挡环与所述屏蔽件绝缘分隔。
  9. 根据权利要求8所述的半导体工艺腔室，其特征在于，所述挡环的朝向所述压环组件的一侧设有对接孔和至少三个定位腰圆孔，所述定位腰圆孔绕所述挡环的轴线周向分布，所述定位腰圆孔的长轴沿所述挡环的径向延伸，所述绝缘支柱的数量与所述对接孔的数量相等，所述半导体工艺腔室还包括多个绝缘定位柱，所述绝缘定位柱的数量与所述定位腰圆孔的数量相等；
    在所述支撑组件上升至所述工艺位置的情况下，所述绝缘支柱一一对应地插设于所述对接孔，并与所述对接孔支撑配合，所述绝缘定位柱一一对应地插设于所述定位腰圆孔，并与所述定位腰圆孔的侧壁定位配合。
  10. 根据权利要求1所述的半导体工艺腔室，其特征在于，所述半导体工艺腔室还包括支撑件，所述支撑件设于所述挡环的朝向所述屏蔽件的一侧，所述挡环经所述支撑件与所述屏蔽件连接，所述挡环依次经所述支撑件、所述屏蔽件和所述腔体进行接地。
  11. 根据权利要求1所述的半导体工艺腔室，其特征在于，所述压环组件设有沿竖直方向贯穿所述压环组件的第一穿孔，所述第一穿孔的周缘部位用于压盖所述晶圆；所述挡环设有沿竖直方向贯穿所述挡环的第二穿孔，所述第二穿孔的内壁沿竖直方向在所述压环组件上的投影位于所述第一穿孔的外围。
  12. 根据权利要求11所述的半导体工艺腔室，其特征在于，所述第二穿孔的内壁沿竖直方向在所述压环组件上的投影为第一投影圈，所述压环组件的上侧的位于所述第一投影圈内侧的表面的面积为第一面积，所述第一穿孔的内壁沿竖直方向在所述支撑组件上的投影为第二投影圈，所述第二投影圈的面积为第二面积，所述第一面积与所述第二面积之间的差值小于预设值。
PCT/CN2025/094512 2024-05-13 2025-05-13 半导体工艺腔室 Pending WO2025237274A1 (zh)

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