WO2025170679A1

WO2025170679A1 - Connection headers

Info

Publication number: WO2025170679A1
Application number: PCT/US2024/061118
Authority: WO
Inventors: Jeng Ping Lu; Christopher Chua
Original assignee: SRI International Inc; Stanford Research Institute
Current assignee: SRI International Inc
Priority date: 2024-02-07
Filing date: 2024-12-19
Publication date: 2025-08-14
Anticipated expiration: 2026-08-07

Abstract

In an example, a connection header includes a substrate and a plurality of electrical traces. The substrate defines a contact end configured to face an external substrate. The plurality of electrical traces are coupled to an upper surface of the substrate. Each electrical trace includes a micro-spring extending beyond the contact end of the substrate. Each micro-spring includes a stress-engineered thin film configured to impart a curvature profile on the micro-spring. Each micro-spring is configured to electrically contact a contact pad of the external substrate and flex in response to the contact with the contact pad.

Description

CONNECTION HEADERS

[0001] This application claims the benefit of U.S. Provisional Application 63/550,936, filed February 7, 2024, the entire contents of which is incorporated by reference.

TECHNICAL FIELD

[0002] The disclosure relates to connection headers, such as for microchip interconnects or interposers.

BACKGROUND

[0003] An interposer is an adapter that provides an electrical interface between a microchip and an electronic substrate, such as a printed circuit board or another microchip. Interposers may include one or more layers of conductive and insulating materials that are stacked to create a compact and efficient means of routing electrical signals through the conductive layers. Through-hole vias can extend through the interposer to electrically connect the conductive layers on one side of the interposer to the other side. A subset of the conductive layers on the interposer connects to a contact pad of the electronic substrate. For example, the interposer may be positioned in-plane with the electronic substrate, and a ball grid array or other connector may extend from the interposer to interface with the contact pad and form an electrical connection.

SUMMARY

[0004] In general, this disclosure describes connection headers, such as for flex cables or interposers, that interface with an electronic substrate out-of-plane and without through- hole vias to enable a high density of interconnections between microchips. A connection header includes a substrate that includes or connects to an electronic component, such as a flex cable or microchip, through various electrical traces on the substrate without through-hole vias. The substrate is configured to orient at an angle with a contact pad of an external substrate, such as a printed circuit board, such that a contact end of the substrate faces the external substrate. To maintain electrical contact between the connection header substrate and the external substrate, each electrical trace includes a micro-spring that extends beyond the contact end of the substrate to contact the contact pad of the external substrate. In contrast to fixed contacts such as micro-ball grid arrays, the unfixed micro-springs are configured to flex in response to contact with the contact pad, such that the micro-springs may maintain contact with the contact pad despite differences in height or temperature of the micro-springs or contact pad, and can be reconfigured without resoldering the connection. The micro-springs are microfabricated using semiconductor thin film processing techniques. The micro-springs incorporate a stress-engineered thin film that imparts a curvature profile on the micro-spring and can be manufactured using high accuracy and high throughput forming techniques, such as photolithography. In one embodiment, the stress engineering is accomplished by sputtering the thin film under low ambient pressure conditions near the surface of the header substrate at the bottom of the film and under high ambient pressure near the top of the film. This process imparts compressive stress at the bottom of the film and tensile stress on top, so the film curls upwards to form springs with a positive radius of curvature when released from the substrate. In another embodiment, the opposite stress gradient, tensile at the bottom and compressive on top, is used to create springs with negative radius of curvature. Unlike macroscopic springs, these micro-fabricated stress-engineered springs can be scaled to microscopic dimensions for interfacing with the microscopic contact pads used in advanced electronics systems. As a result, connection headers described herein may enable a high density of interconnects compared to interposers that are co-planar with the external substrate and/or manufactured through assembly techniques.

[0005] In one example, a connection header includes a substrate and a plurality of electrical traces. The substrate defines a contact end configured to face an external substrate. The plurality of electrical traces are coupled to an upper surface of the substrate. Each electrical trace includes a micro-spring extending beyond the contact end of the substrate. Each micro-spring includes a stress-engineered thin film configured to impart a curvature profile on the micro-spring. Each micro-spring is configured to electrically contact a contact pad of the external substrate and flex in response to the contact with the contact pad.

[0006] In some examples, the electrical traces can be configured as microwave transmission lines, such as coplanar waveguides or microstrip lines to carry high frequency RF signals. For example, coplanar waveguides may be formed by patterning the traces into sets of three lines that form ground-signal-ground transmission lines. Microstrip lines involve structuring electrical traces with separation from a ground plane by a dielectric layer. These structures allow high speed RF signals to be transmitted between multiple external substrates connected via the spring contactors fabricated on the interposers.

[0007] In another example, a flexible connector includes the connection header described above and a flex cable coupled to the plurality of electrical traces. In another example, an electronic system includes a plurality of the flexible connectors described above and the external substrate electrically coupled to the plurality of the flexible connectors via the micro-springs. The external substrate is cryogenically cooled.

[0008] In another example, a pluggable interposer includes the connection header described above and a microchip disposed on the substrate and electrically coupled to at least one of the plurality of electrical traces. In another example, an electronics system includes one or more of the pluggable interposers described above and the external substrate electrically coupled to the one or more pluggable interposers via the microsprings.

[0009] In another example, a method of fabricating a connection header includes depositing a stress-engineered thin film on an upper surface of a substrate. The film possesses an intrinsic stress profile across a thickness of the film. The method further includes patterning the film into a plurality of electrical traces. The method further includes patterning the substrate to define a contact end configured to face an external substrate and etching the substrate to form the contact end in the substrate. Each electrical trace includes a micro-spring extending beyond the contact end of the substrate. Each micro-spring is configured to electrically contact a contact pad of the external substrate and flex in response to the contact with the contact pad.

[0010] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.

BRIEF DESCRIPTION OF DRAWINGS

[0011] FIG. 1 A is a front view diagram of a connection header contacting an external substrate, in which micro-springs have a positive radius of curvature, in accordance with techniques of this disclosure.

[0012] FIG. IB is a side view diagram of the connection header of FIG. 1A.

[0013] FIG. 1C is a front view diagram of a connection header contacting an external substrate, in which micro-springs have a negative radius of curvature, in accordance with techniques of this disclosure. [0014] FIG. ID is a side view diagram of the connection header of FIG. 1C.

[0015] FIG. 2A is a side view diagram of a flexible connector that includes a connection header and a flex cable, in accordance with techniques of this disclosure.

[0016] FIG. 2B is a side view diagram of a cryogenic electronics system that includes a plurality of the flexible connectors of FIG. 2A and an external substrate, in accordance with techniques of this disclosure.

[0017] FIG. 3 A is a front view diagram of a connection header and external substrate that include lateral projections for alignment, in accordance with techniques of this disclosure. [0018] FIG. 3B is a front view diagram of a connection header and external substrate that include lateral projections and an alignment element, in accordance with techniques of this disclosure.

[0019] FIG. 3C is a front view diagram of a connection header and external substrate that include lateral projections and an alignment feature, in accordance with techniques of this disclosure.

[0020] FIG. 3D is a front view diagram of a connection header and external substrate that include lateral projections and an attachment mechanism, in accordance with techniques of this disclosure.

[0021] FIG. 4A is a side view diagram of a pluggable interposer that includes a connection header and a microchip, in accordance with techniques of this disclosure. [0022] FIG. 4B is a side view diagram of an electronics system that includes a plurality of the pluggable interposers of FIG. 4A and an external substrate, in accordance with techniques of this disclosure.

[0023] FIG. 5 A includes side and top view diagrams of a stress-engineered thin film on an upper surface of a substrate, in accordance with techniques of this disclosure.

[0024] FIG. 5B includes side and top view diagrams of a plurality of electrical traces patterned from the stress-engineered thin film, in accordance with techniques of this disclosure.

[0025] FIG. 5C includes side and top view diagrams of a substrate patterned to define a contact end, in accordance with techniques of this disclosure.

[0026] FIG. 5D includes side and top view diagrams of a substrate etched to from the contact end, in accordance with techniques of this disclosure.

[0027] FIG. 5E includes side and top view diagrams of photosensitive layers removed from the substrate, in accordance with techniques of this disclosure. [0028] FIG. 5F includes side and top view diagrams of a flex cable coupled to a connection header, in accordance with techniques of this disclosure.

[0029] FIG. 6 is a flowchart of a method of fabricating a connection header, in accordance with techniques of this disclosure.

DETAILED DESCRIPTION

[0030] Conventional high-density microchip interconnects rely heavily on multi-layer interposers with through-hole vias. The approach requires intricate microfabrication processes for fabricating the interposer and lacks a direct means for interfacing with flex cables to connect to external systems. Furthermore, the approach is not easily adaptable to specialized application such as cryogenic interconnects, where on end operates at extremely low temperatures while the other end functions at room temperature.

[0031] Connection headers described herein enable high-density interconnects without relying on through-hole vias for routing electronic signals to external systems. They also enable connections between external systems that are physically separated by large distances or between external systems under very different operating environments. One system, for example, can be inside a cryogenic environment, while the other system can be at room temperature. The connection headers may directly interface with flex cables or microchips and may be compatible with cryogenic interconnects. Unlike conventional interposers, in which two-dimensional (2D) electrical contacting elements such as solder ball grid arrays are fabricated within the substrate plane, connection headers described herein may use electrical traces that are arranged in a one-dimensional (ID) linear array along one edge of the substrate. The electrical traces include micro-fabricated springs (“micro-springs”) formed along a contact edge of the substrate facing a contact pad such that free portions of the micro-springs extend beyond the contact edge and into the air. An anchor portion of the electrical trace connects to an electronic component, such as flex cables or microchips. The flexibility and orientation of the micro-springs enable the connection header to connect with an external substrate at an off-plane angle, such as perpendicular, as the micro-springs press against contact pads of the external substrate and the contact edge functions as a mechanical stop. Several such connection headers can be stacked to form a dense 2D array of electrical contacting elements at the contact edge. As a result, connection headers described herein may enable higher interconnect densities (e.g., up to 100 times higher) than conventional interconnects. [0032] FIGS. 1 A and 1C are a front view diagrams of a respective connection header 100A and 100B contacting an external substrate 110, while FIGS. IB and ID are a side view diagrams of respective connection headers 100A of FIG. 1A or 100B of FIG. 1C. Unless otherwise stated, similarly numbered components of FIGS. 1A-1D will be described generically without a suffix.

[0033] Connection header 100 is configured to electrically couple one or more devices to external substrate 110. External substrate 110 may include a printed circuit board, a microchip, or any other electronic device. External substrate 110 includes a contact pad 112 configured to provide a surface for electrically connecting to connection header 100. While contact pad 112 may be generally planar, contact pad 112 may have irregularities in height that may result in non-uniform contacting surface for contact with connection header 100.

[0034] Each connection header 100A or 100B includes a substrate 102A or 102B.

Substrate 102 may be configured to provide a platform for a plurality of electrical traces 106 and any other devices that may be electrically coupled to electrical traces 106, such as flex cables or microchips. While illustrated in FIG. 1 A as a monolithic layer, substrate 102 may include multiple layers, such as a release layer defining an upper surface of substrate 102. Substrate 102 may be formed from materials that include, but are not limited to, non-conductive materials such as oxidized silicon, glasses, ceramics, and polymer-based materials; semi-conductive materials such as silicon and gallium arsenide; and the like. If substrate 102 includes an etchable release layer, the release layer may be formed from materials including, but not limited to, silicon nitride, silicon dioxide, silicon oxynitride, silicon, titanium, and the like.

[0035] Substrate 102 defines a contact end 104 configured to face external substrate 110. Each substrate 102A or 102B may generally define a plane 101 A or 101B that forms an angle 105 A or 105B with contact pad 112, such that contact end 104 faces contact pad 112. While described as “contact end,” contact end 104 may not make contact with contact pad 112; rather, contact end 104 may be an end at which micro-springs 108 make contact with contact pad 112, regardless of whether contact end 104 makes contact with substrate 102. In some examples, contact end 104 may be configured to contact substrate 102 and operate as a mechanical stop. For example, as will be explained below, contact end 104 may be photolithographically defined with a high tolerance among connection header 100 and between adjacent connection headers 100. [0036] Angle 105 may include any out-of-plane angle, such as between about 45 degrees and about 135 degrees, or about perpendicular (90 +/- 5 degrees). By orienting substrate 102 out-of-plane with external substrate 110, substrate 102 may occupy a relatively small surface area at contact pad 112 compared to substrates 102 that are in-plane, thereby enabling a higher density of connections. For example, in contrast with an in-plane substrate having a footprint of a major surface of the substrate, each substrate 102 may have a footprint that includes a surface of contact end 104 and a distance form which micro-springs 108 extend beyond substrate 102.

[0037] Each connection header 100 A or 100B includes electrical traces 106 A or 106B coupled to an upper surface 111 A or 11 IB of a respective substrate 102A or 102B. Each electrical trace 106 may be formed from an elastic conductive material, or an elastic non- conductive or semi-conductive material coated with a conductive material. In some examples, each electrical trace 106 includes at least one of chromium, titanium, nickel, molybdenum, zirconium, beryllium, copper, silver, gold, niobium, aluminum, tungsten, stainless steel, or alloys thereof. In some examples, each electrical trace 106 includes an electroplated metal or combination of metals, such as copper, chromium, titanium, nickel, gold, and/or one or more metals overlying chromium, titanium, or nickel.

[0038] In some examples, electrical traces 106 may be configured for particular uses or signals. In some examples, electrical traces 106 may be configured as microwave transmission lines, such as coplanar waveguides or microstrip lines to carry high frequency RF signals. For example, coplanar waveguides may be formed by patterning the traces into sets of three lines that form ground-signal-ground transmission lines. Microstrip lines involve structuring electrical traces 106 with separation from a ground plane by a dielectric layer. These structures allow high speed RF signals to be transmitted between multiple external substrates 110 connected via micro-springs 108 fabricated on substrate 102.

[0039] While out-of-plane orientation of substrate 102 relative to external substrate 110 may enable a high density of connections, such electrical traces 106 may be more susceptible to variations in temperature. For example, variations in temperature may be more likely to occur out-of-plane than in-plane, and may result in a greater dimensional change along a length of electrical trace 106 than across a thickness of electrical trace 106.

[0040] To ensure electrical traces 106 maintain contact with contact pad 112 in response to changes in temperature or position, each electrical trace 106A or 106B includes a micro-spring 108 A or 108B extending beyond contact end 104 of a respective substrate 102 A or 102B. Electrical traces 106 include a free portion corresponding to micro-spring 108 and an anchor portion fixed to substrate 102. Each micro-spring 108 is configured to electrically and removably make contact with contact pad 112 of external substrate 110 and flex in response to contact with contact pad 112 that results from application of a reaction force on substrate 102. Substrate 102 is substantially planar and defines a plane. Each micro-spring 108 is configured to flex along the plane in response to the contact with contact pad 112. In the example of FIGS. 1 A-D, micro-springs 108 are aligned in a substantially one-dimensional linear array along contact edge 104 of substrate 102. [0041] Micro-spring 108 has elastic properties that provide spring-based contact to maintain physical contact with contact pad 112 despite variations in a height of contact pad 112, contacting pressure on micro-springs 108, or thermal variations along electrical trace 106. Additionally, micro-spring 108 may have creep resistant properties such that, when micro-spring 108 is elastically deformed over an extended period, micro-spring 108 may continue to resist a downward force and push against contact pad 112 to maintain the electrical connection.

[0042] Micro-springs 108 may form a row of high-density electrical connections for contact with contact pad 112. For example, electrical traces 106, and correspondingly micro-springs 108, may be formed using techniques that enable both a low width of electrical traces 106 and a low pitch between center-lines of adjacent electrical traces 106. In some examples, each micro-springs 108 has a pitch less than about 100 micrometers and/or a width of less than about 50 micrometers.

[0043] Each micro-spring 108 includes a stress-engineered thin film configured to impart a curvature profile on micro-spring 108. The stress-engineered thin film has a stress gradient (“intrinsic stress profile”) that causes micro-spring 108 to bend away from (or towards, as in FIGS. 1C and ID) substrate 102A, and thereby provide compliant contact with contact pad 112. The intrinsic stress profile along electrical trace 106 varies with distance from an anchor point on substrate 110 to a free end that extends beyond substrate 110. The curvature profile formed from the intrinsic stress profile may be characterized by a radius of curvature, a relative (e.g., with respect to length) or absolute displacement of the free portion from the anchor portion of electrical trace 106, or any other measure by which the curvature may be defined. The curvature profile includes any of a uniform positive radius of curvature (e.g., a curvature away from substrate 102A that is substantially uniform), a uniform negative radius of curvature (e.g., a curvature towards substrate 102B that is substantially uniform), or multiple segments each with different radius of curvatures (e.g., a curvature that is varied continuously or in steps and/or varied between positive and negative radius of curvature). In some examples, the multiple segments include a segment with infinite radius of curvature, such as a continuously increasing or decreasing radius of curvature. In some examples, such as illustrated in FIGS. 1 A-1D, micro-spring 108 includes a single segment having a uniform or variable radius of curvature.

[0044] Each micro-spring 108 is formed in such a manner that introduces the stress gradient into micro-spring 108. As will be explained further below, when micro-spring 108 is formed, a thin metal layer is deposited such that compressive and tensile stresses are located in different portions of the metal layer. In the example of FIG. IB, in which micro-spring 108 A curves away from substrate 102A, compressive stress is present in lower portions (e.g., near substrate 102A) of the metal layer and tensile stress is present in upper portions (e.g., away from substrate 102A) of the metal layer. In the example of FIG. ID, in which micro-spring 108B curves towards substrate 102B, compressive stress is present in upper portions of the metal layer and tensile stress is present in lower portions of the metal layer. The stress gradient in micro-spring 108 may be represented as a spatial difference between the compressive and tensile stresses for a particular thickness of the metal layer. The stress gradient causes micro-spring 108 to bend into the shape of an arc having a particular radius or radii of curvature, which may be related to the Young's modulus of the metal, the thickness of the metal layer, the stress gradient of the metal layer, and the shear modulus of the metal.

[0045] Due to an elasticity of the metal layer of micro-spring 108, each micro-spring 108 may be pushed down along plane 101 against contact pad 112 and elastically and reversibly deform. Micro-spring 108 resists the downward force and maintains electrical contact with contact pad 112. When the force on substrate 102 is released, micro-spring 108 will return to its undeformed state. Thus, the elasticity of micro-spring 108 permits micro-spring 108 to make numerous electrical connections with different contact pads 112 while maintaining an integrity of the electrical connection between micro-spring 108 and contact pad 112. The reaction force increases as micro-spring 108 gets closer to contact pad 112, which generally improves electrical contact between micro-spring 108 and contact pad 112. The increase in reaction force may also cause micro-spring 108 to deform locally at contact pad 112, increasing a contact area between micro-spring 108 and contact pad 112. [0046] Referring to FIG. IB, in the example of connection header 100A, micro-springs 108 A have a positive radius of curvature that curves toward upper surface 111 A of substrate 102 A. Connection header 100 A may be pushed along plane 101 A until a desired position of substrate 102A is reached, until contact end 104 contacts contact pad 112, or until a desired reaction force is achieved against micro-springs 108A. In response to contact with contact pad 112, micro-springs 108A may move away from substrate 102A along contact pad 112 until the desired position of substrate 102A along plane 101A is reached.

[0047] Referring to FIG. ID, in the example of connection header 100B, micro-springs 108B have a negative radius of curvature that curves away from upper surface 11 IB of substrate 102B. Substrate 102B includes lateral projections 103 that extend beyond contact end 104 and are configured to contact external substrate 110 to limit travel of substrate 102B along plane 101B. Connection header 100B may be pushed along plane 10 IB until a desired position of substrate 102B is reached, until lateral projections 103 contact external substrate 110, or until a desired reaction force is achieved against microsprings 108B. In response to contact with contact pad 112, micro-springs 108B may move beneath substrate 102B along contact pad 112 until the desired position of substrate 102B along plane 10 IB is reached. Such positioning of micro-springs 108B beneath substrate 102B may enable connection header 100B to occupy a smaller footprint at contact pad 112 compared to connection header 100 A, in which micro-springs 108 A move away from substrate 102A, thereby enabling a higher density of connections.

[0048] Connection headers described herein may be electrically coupled to a variety of different electronic devices for connection to external substrates. An out-of-plane orientation of the connection header may enable compact connection to these electronic devices, particularly across dissimilar systems. In some examples, connection headers may be incorporated with a structure, such as a flex cable, that enables a flexible connection to another device, thereby permitting high density of connections that may be extended spatially. FIG. 2A is a side view diagram of a flexible connector 200 that includes a flex cable 214. Flexible connector 200 includes a substrate 202 defining a contact end 204 configured to face an external substrate. Flexible connector 200 includes a plurality of electrical traces 206 coupled to an upper surface 211 of substrate 202. Each electrical trace 206 includes a micro-spring 208 extending beyond contact end 204 of substrate 202. Flex cable 214 is coupled to plurality of electrical traces 206. In the example of FIG. 2 A, a connection point of flex cable 214 is positioned at an end of substrate 202 away from micro-springs 208, and is generally planar, such that flex cable 214 may be directly routed from flexible connector 200. Flex cable 214 may be a flexible printed circuit (FPC) that functions as an electrical cable to permit connections to spatially distributed microchips or other electronic substrates. Flex cable 214 may include a flexible plastic substrate such as polyimide or polyester, which supports the printed circuit and copper conductors.

[0049] FIG. 2B is a side view diagram of an electronics system 220 that includes a plurality of the flexible connectors 200 of FIG. 2A and an external substrate 210. Electronics system 220 may include any of a variety of systems including, but not limited to, quantum computing systems, radio astronomy systems, space satellites, medical imaging, military communication and sensor systems, and supercomputing systems. [0050] In the example of FIG. 2B, the plurality of flexible connectors 200 include six flexible connectors 200A, 200B, 200C, 200D, 200E, 200F. Flexible connectors 200 are aligned out of plane with contact pad 212 of external substrate 210, such as between about 45 degrees and about 135 degrees. In some example, flexible connectors may be aligned substantially perpendicular to contact pad 212 of external substrate 210, such as between about 85 degrees and about 95 degrees, to a plane of external substrate 210. External substrate 210 is electrically coupled to plurality of flexible connectors 200 via micro-springs 208.

[0051] As illustrated in FIG. 2A, electrical traces 206 may be closely spaced, such that a large number of electrical connections may be made between contact pad 212 and connector 200. For example, electrical traces 206 may have a spacing that is less than about 100 micrometers. And as illustrated in FIG. 2B, flexible connectors 200 may be spaced relatively closely due to out-of-plane arrangement of flexible connectors 200, such that a large number of flexible connectors 200 may be formed with contact pad 212. For example, flexible connectors 200 may have an overall thickness that permits a spacing of about 100 micrometers. As a result, flexible connectors 200 may have a high connection density (i.e., number of connections for a given area). For example, flexible connectors 200 may have a connection density of at least 1000 per square centimeter.

[0052] In some examples, external substrate 210 may be cryogenically cooled. In such examples, flexible connectors 200 may experience temporal and spatial thermal variations, such as along electrical traces 206 and between electrical traces 206. For example, external substrate 210 may operate at cryogenic temperatures, while other substrates connected to flex cables 214, such as readout electronics, may operate at room temperature. These thermal variations may result in substantial physical displacements between the substrates due to variations in thermal expansion coefficients of the components. Despite such thermal variations, micro-springs 208 may accommodate differences in position that result from thermal expansion or contraction due to the mechanical compliancy of the micro-springs 208. In such examples, electrical traces 208 may be formed from materials, such as niobium, that are superconducting at low temperatures, thereby reducing or eliminating joule heating from electrical traces 208 that may otherwise occur in electrical traces having inherent resistance and preserving a cryogenic environment. Flex cable 214 may be constructed of materials suitable for cryogenic temperatures, such as polyimide for substrate 202 and copper for micro-springs 208.

[0053] While connection headers described herein include micro-springs that maintain flexible contact with a contact pad, the connection headers may include other structures that aid in limiting movement of the connections in one or more directions, such as to limit travel toward the contact pad or secure against the contact pad. These structures may be precisely defined, such as through photolithographic techniques, so that the connection headers may be positioned with respect to the contact pad according to relatively tight tolerances, such as less than about one micrometer.

[0054] In some examples, connection headers can include alignment features that guide positioning of the connection headers with respect to contact pads. FIG. 3 A is a front view diagram of a connection header and external substrate that include lateral projections for alignment. Connection header 300A includes a substrate 302A that defines at least one lateral projection 303A extending beyond the contact end of substrate 302A. Lateral projection 303 A is configured to interface with a cavity 311 A of external substrate 310A to contact external substrate 310A, such that connection header 300A may not move across of plane of external substrate 310A.

[0055] In some examples, an interface between connection headers may include one or more alignment elements. FIG. 3B is a front view diagram of a connection header 300B and external substrate 310B that include lateral projections 303B and an alignment element 305. Alignment element 305 configured to interface with a cavity 31 IB of external substrate 310B. In some examples, connection headers may include alignment elements incorporated into lateral projections. FIG. 3C is a front view diagram of a connection header 300C and external substrate 310C that includes lateral projections 303C with an alignment feature 311C. [0056] In some examples, connection headers may include an assembly that aids in securing a connection header to an external substrate. FIG. 3D is a front view diagram of a connection header 300D and an external substrate 310D that include an attachment assembly 307 configured to secure connection header 300D to external substrate 310D. In the example of FIG. 3D, attachment assembly 307 includes a moveable attachment projection 307A on external substrate 310D configured to interface with an attachment cavity 307B on substrate 302D that prevents movement of substrate 302D away from external substrate 310D in response to typical forces experienced during operation.

While attachment assembly 307 is illustrated as operating as a clip mechanism, attachment assemblies may operate based on other attachment mechanisms.

[0057] Connection headers described herein may be used as interposers for connecting microchips to external substrates. Such interposers may operate as functional computing modules that, when combined with other interposers, result in heterogeneous computing systems that may be reconfigured based on the particular selection of interposers. FIG. 4 A is a side view diagram of a pluggable interposer 400 that includes a microchip 418. Pluggable interposer 400 includes a substrate 402 defining a contact end 404 configured to face an external substrate. Pluggable interposer 400 includes a plurality of electrical traces 406 coupled to an upper surface 411 of substrate 402. Each electrical trace 406 includes a micro-spring 408 extending beyond contact end 404 of substrate 402.

[0058] In some examples, pluggable interposer 400 includes one or more electronic components directly fabricated on or within substrate 402. In the example of FIG. 4A, microchip 418 is disposed on substrate 402 and coupled to at least one of plurality of electrical traces 406. Microchip 418 may be disposed on a same side of substrate 402 as electrical traces 406, such that no through-hole via is needed to electrically couple microchip 418 to an external substrate. As a result, pluggable interposer 400 may operate as a functional component that may be plugged into an external substrate.

[0059] This functionality may enable pluggable interposer 400 to be combined with other pluggable interposers to form a system. FIG. 4B is a side view diagram of an electronics system 420 that includes a plurality of the pluggable interposers 400 of FIG. 4 A and an external substrate 410. In the example of FIG. 2B, the plurality of pluggable interposers 400 include four pluggable interposers 400A, 400B, 400C, 400D. Pluggable interposers 400 are aligned out of plane with a contact pad 412 of external substrate 410, such as substantially perpendicular to a plane of external substrate 410. Contact pad 412 of external substrate 410 is electrically coupled to plurality of pluggable interposers 400 via micro-springs 408. Micro-springs 408 may be enable pluggable interposers 400 to be reconfigured without resoldering or other transforming mechanism.

[0060] Electronics system 420 may be a heterogeneous electronics system that includes more than one functionality in pluggable interposers 400. Each microchip 418 may have a different homogeneous function that, together with other microchips 418, form a dense heterogeneous functional system. For example, microchips 418 may include memory modules, such as dynamic read only memory (DRAM); storage modules, such as solid state memory (SSD); optical interface modules, such as optical fiber interfaces; processing circuitry modules, such as graphical processing units (GPU); or other computing modules. Pluggable interposers 400 may be detachable and reconfigurable, such that the functional system may be changed and reconfigured without resoldering. [0061] FIG. 6 is a flowchart of a method of fabricating a connection header, such as connection headers 100 of FIGS. 1A-D, flexible connectors 200 of FIGS. 2A-B, or pluggable interposers 400 of FIGS. 4A-D. The method of FIG. 6 will be described with respect to FIGS. 5A-5F, which illustrate fabrication of a connection header using lithographic techniques.

[0062] The method of FIG. 6 includes depositing a stress-engineered thin film on an upper surface of a substrate (600). FIG. 5A includes side and top view diagrams of a stress-engineered thin film 534 on an upper surface 511 of a release layer 532 and a substrate 530. Film 534 is deposited on or over substrate 530 and release layer 532. A variety of methods may be used for depositing film 534 on or over substrate 530 and release layer 532 including, but not limited to, physical vapor deposition (PVD), such as sputter deposition; electron-beam deposition; molecular beam epitaxy; and chemical vapor deposition(CVD).

[0063] In some examples, film 534 is deposited using sputter deposition. When sputter depositing a metal, the metal to be deposited is placed on a target and set to a high negative voltage. A stream of plasma gas, typically argon, is directed towards the target. The high voltage potential between the plasma gas and the target metal produces ions which are accelerated toward and bombard the metal target. This bombardment knocks small particles of the metal target free, and the freed particles may be guided to the surface where the particles are deposited.

[0064] In some examples, film 534 is deposited using electroplating. Substrate 530 and/or release layer 532 may be pretreated prior to deposition of film 534, such as through ultrasonic cleaning, solvent cleaning, or etching. If needed, an adhesion layer, such as chromium, titanium, or nickel may be deposited, such as through physical vapor deposition (PVD). Substrate 530 and release layer 532 may be immersed in an electrolyte solution and contact a cathode. An electric current is applied, causing metal ions in the solution to migrate towards a surface of release layer 532 and deposit as a thin metal film 534. Various parameters may be controlled to control a thickness of film 534 including, but not limited to, current density, voltage, temperature of the electrolyte solution, and time.

[0065] Film 534 possesses an intrinsic stress profile across a thickness of film 534, such that stresses near release layer 532 are different from stresses away from release layer 532. Film 534 may be deposited in several sub-layers to a final thickness, such as between about 0.1 microns to about 10 microns. A stress gradient is introduced into film 534 by altering the stress inherent in each of the sub-layers of film 534, such that each sub-layer has a different level of inherent stress. Although the stress gradient urges film 534 bend into an arc, film 534 continues to adhere to release layer 532 and substrate 530, and thus lies flat.

[0066] Different stress levels can be introduced into each sub-layer of film 534 during deposition in a variety of ways. For sputter deposition, such stress may be introduced by adding a reactive gas to the plasma, depositing the metal at an angle, varying the deposition angle, and changing the pressure of the plasma gas. For electroplating, such stress may be introduced by controlling the deposition conditions, such as varying current density, varying electrolyte temperature, and pulsing current, to induce variations in stress across the thickness of film 534. In some examples, film 534 is deposited with compressive stress near the upper surface 511 of release layer 532 and/or substrate 530 and with tensile stress farther away from upper surface 511 of release layer 532 and/or substrate 530 to curve micro-springs away from upper surface 511 of release layer 532 and/or substrate 530. In some examples, film 534 is deposited with tensile stress near upper surface 511 of release layer 532 and/or substrate 530 and with compressive stress farther away from upper surface 511 of release layer 532 and/or substrate 530 to curve the micro-springs toward upper surface 511 of release layer 532 and/or substrate 530.

[0067] The method of FIG. 6 includes patterning the film into a plurality of electrical traces (602). FIG. 5B includes side and top view diagrams of a plurality of electrical traces patterned from the stress-engineered thin film. After film 534 is deposited, film 534 is photolithographically patterned into electrical traces 506. A photosensitive material may be evenly deposited on the top surface of film 534 and soft-baked. The photosensitive layer is then exposed to light using an appropriate mask that ensures that areas of the photosensitive material are appropriately exposed to the light which defines a two-dimensional form of electrical traces 506. Once the photosensitive material is exposed to the appropriate pattern of light, the photosensitive material is hard-baked. Film 534 is then etched to form electrical traces 506. Different methods for etching can be used including, but not limited to, ion milling, reactive ion etching, plasma etching and wet chemical etching. For example, a nitric acid solution, may be applied to film 534 to remove appropriate areas of the photosensitive material. Once the appropriate areas of photosensitive material are removed, the etchant removes the areas of film 534 lying under the removed areas of the photosensitive material, and the remaining areas of film 534 form electrical traces 506.

[0068] The method of FIG. 6 includes patterning the substrate to form a contact end configured to face an external substrate (604). To pattern the substrate, the method of FIG. 6 includes depositing an upper photosensitive layer on an upper surface of the plurality of electrical traces and depositing a lower photosensitive layer on a lower surface of the substrate, such that the lower photosensitive layer defines the contact end of the substrate (606). FIG. 5C includes side and top view diagrams of a substrate patterned to define a contact end. An upper photosensitive layer 536B is deposited an upper surface of electrical traces 506, including over and surrounding electrical traces 506, to protect electrical traces 506 during refinement of substrate 530. A lower photosensitive layer 536A overlies a lower surface 513 of substrate 530 and is shaped to expose a portion of substrate 530 that will define the contact end and, correspondingly, an overhand of a micro-spring eventually formed from electrical traces 506. Photosensitive layers 536 may be exposed to light using the appropriate mask, developed, and hard- baked.

[0069] The method of FIG. 6 includes etching the substrate to form the contact end of the substrate (608). FIG. 5D includes side and top view diagrams of substrate 530 etched to form contact end 504. A variety of techniques may be used to etch substrate 530 including, but not limited to, dry etching, such as reactive ion etching (RIE) and deep RIE; wet etching, such as by using nitric acid; or the like. For example, reactive ion etching may involve introduction and ionization of a fluoride gas to react with substrate 530 to form volatile by-products.

[0070] The method of FIG. 6 includes removing the upper photosensitive layer, the lower photosensitive layer, and a portion of the release layer (610). FIG. 5E includes side and top view diagrams of photosensitive layers 536 and release layer 532 removed from substrate 530. Photosensitive layer 536 and release layer 532 may be removed through under-cut etching. For example, a selective etchant may be applied to photosensitive layers 536 to remove photosensitive layers 536 around electrical traces 506. The etchant may be a selective etchant that, after the areas of photosensitive layer 536 around electrical traces 506 are removed, the proceeds to etch release layer 532 underneath the portion of electrical traces 506 that correspond to micro-springs 508. Upper photosensitive layer 536A resists the selective etchant and protects micro-springs 508. The selective etchant etches release layer 532 faster than the selective etchant removes metal from micro-springs 508, such that micro-springs 508 are released from release layer 532 and are allowed to bend up and away from release layer 532 due to a stress gradient in micro-springs 508. Only the areas of release layer 532 and substrate 530 under the free portion of micro-springs 508 are under-cut etched. The resulting substrate 530 and release layer 532 form substrate 502 of connection header 500. Until the free portion is released from release layer 532, the free portion adheres to release layer 532 and microspring 508 lies flat on substrate 502.

[0071] After patterning substrate 502, each electrical trace 506 includes micro-spring 508 extending beyond the contact end of the substrate. Once the free portion is freed from release layer 532, the stress gradient causes the free portion to bend up and away from the substrate 502 (e.g., as illustrated in FIG. 5E) or down and towards substrate 502 (e.g., as illustrated in FIG. ID). An intrinsic stress profile of each electrical trace 506 curves micro-spring 508. The stress gradient may still be inherent in the anchor portion and urges the anchor portion to pull away from the substrate 502, but remains fixed to substrate 502 due to adhesion. To decrease the likelihood of the anchor portion pulling away from substrate 502, micro-spring 508 may be annealed to relieve the stress in the anchor portion. Such annealing may not affect the free portion because, once the free portion is released and allowed to bend up or down, no or little stress remains on the free portion to be relieved by annealing. In some examples, micro-spring 508 may be further modified to increase contact and/or conductance. For example, a layer of gold or another metal may be plated over the outer surface of each micro-spring.

[0072] The method of FIG. 6 includes coupling the flex cable to the plurality of electrical traces (612). FIG. 5F includes side and top view diagrams of a flex cable 514 coupled to connection header 500. A contact pad of connection header 514 may be electrically coupled to electrical traces 506 of connection header 500. [0073] Examples

[0074] Example 1 : A connection header includes a substrate defining a contact end configured to face an external substrate; and a plurality of electrical traces coupled to an upper surface of the substrate, wherein each electrical trace includes a micro-spring extending beyond the contact end of the substrate, wherein each micro-spring comprises a stress-engineered thin film configured to impart a curvature profile on the micro-spring, and wherein each micro-spring is configured to: electrically contact a contact pad of the external substrate; and flex in response to the contact with the contact pad.

[0075] Example 2: The connection header of example 1, wherein a pitch of the microsprings of the plurality of electrical traces is less than about 100 micrometers, and/or wherein each micro-spring has a width of less than about 50 micrometers

[0076] Example 3: The connection header of any of examples 1 and 2, wherein a thickness of the micro-springs is less than about 10 micrometers.

[0077] Example 4: The connection header of any of examples 1 through 3, wherein the substrate is substantially planar and defines a plane, and wherein each micro-spring is configured to flex along the plane in response to the contact with the contact pad.

[0078] Example 5: The connection header of any of examples 1 through 4, wherein the curvature profile comprises a uniform positive radius of curvature, a uniform negative radius of curvature, or multiple segments each with a different radius of curvature.

[0079] Example 6: The connection header of example 5, wherein the micro-springs have a positive radius of curvature that curves toward the upper surface of the substrate.

[0080] Example 7: The connection header of any of examples 5 and 6, wherein the micro-springs have a negative radius of curvature that curves away from the upper surface of the substrate.

[0081] Example 8: The connection header of any of examples 5 through 7, wherein the multiple segments comprise a segment with infinite radii of curvature.

[0082] Example 9: The connection header of any of examples 1 through 8, wherein each micro-spring comprises an electroplated metal.

[0083] Example 10: The connection header of any of examples 1 through 9, wherein each micro-spring comprises at least one of beryllium, copper, silver, gold, nickel, niobium, aluminum, tungsten, or stainless steel.

[0084] Example 11 : The connection header of any of examples 1 through 10, wherein the substrate comprises at least one of a silicon substrate, a glass substrate, or an organic substrate. [0085] Example 12: The connection header of any of examples 1 through 11, wherein the intrinsic stress profile along the electrical trace varies with distance from an anchor point on the substrate to a free end that extends beyond the substrate.

[0086] Example 13: The connection header of any of examples 1 through 12, wherein the substrate defines at least one lateral projection extending beyond the contact end, and wherein the at least one lateral projection is configured to contact the external substrate. [0087] Example 14: The connection header of example 13, wherein the lateral projection is configured to interface with a cavity of the external substrate.

[0088] Example 15: The connection header of example 14, wherein the lateral projection is configured to interface with the cavity of the external substrate and an alignment element.

[0089] Example 16: The connection header of any of examples 14 and 15, wherein the lateral projection includes an alignment element configured to interface with the cavity of the external substrate.

[0090] Example 17: The connection header of any of examples 13 through 16, wherein the external substrate includes an attachment assembly configured to interface with a cavity of the substrate.

[0091] Example 18: A flexible connector includes the connection header of example 1; and a flex cable coupled to the plurality of electrical traces.

[0092] Example 19: A cryogenic electronic system includes a plurality of the flexible connectors of example 18; and the external substrate electrically coupled to the plurality of the flexible connectors via the micro-springs, wherein the external substrate is cryogenically cooled.

[0093] Example 20: The cryogenic electronic system of example 19, wherein the plurality of the flexible connectors are aligned out of plane with the contact pad of the external substrate.

[0094] Example 21 : The cryogenic electronic system of any of examples 19 and 20, wherein the plurality of flexible connectors have a connection density of at least 1000 per square centimeter.

[0095] Example 22: The cryogenic electronic system of any of examples 19 through 21, wherein the substrate defines at least one lateral projection extending beyond the contact end, and wherein the external substrate includes at least one cavity configured to receive the at least one lateral projection. [0096] Example 23 : A pluggable interposer includes the connection header of any of examples 1 to 17; and a microchip disposed on the substrate; wherein the microchip is coupled to at least one of the plurality of electrical traces.

[0097] Example 24: The pluggable interposer of example 23, further comprising one or more electronic components directly fabricated on the substrate.

[0098] Example 25: An electronics system includes one or more of the pluggable interposers of example 23 or 24; and the external substrate electrically coupled to the one or more pluggable interposers via the micro-springs.

[0099] Example 26: The electronics system of example 25, wherein the plurality of microchips are aligned out of plane with the contact pad of the external substrate.

[0100] Example 27: The electronics system of any of examples 25 and 26, wherein the one or more pluggable interposers comprises a plurality of pluggable interposers.

[0101] Example 28: A method of fabricating a connection header includes depositing a stress-engineered thin film on an upper surface of a substrate, wherein the film possesses an intrinsic stress profile across a thickness of the film; patterning the film into a plurality of electrical traces; and patterning the substrate to form a contact end configured to face an external substrate; wherein, after patterning the substrate, each electrical trace includes a micro-spring extending beyond the contact end of the substrate, and wherein each micro-spring is configured to: electrically contact a contact pad of the external substrate; and flex in response to the contact with the contact pad.

[0102] Example 29: The method of example 28, wherein the intrinsic stress profile of each electrical trace curves the micro-spring.

[0103] Example 30: The method of any of examples 28 and 29, wherein the plurality of electrical traces are deposited using atomic layer deposition.

[0104] Example 31 : The method of any of examples 28 through 30, wherein patterning the substrate further comprises: depositing a lower photosensitive layer on a lower surface of the substrate, wherein the lower photosensitive layer defines the contact end of the substrate; depositing an upper photosensitive layer on an upper surface of the plurality of electrical traces; etching the lower photosensitive layer and the substrate to form the contact end of the substrate; and removing the upper photosensitive layer.

[0105] Example 32: The method of example 31, wherein the substrate comprises a release layer; and wherein patterning the substrate further comprises removing a portion of the release layer with the upper photosensitive layer. [0106] Example 33: The method of any of examples 28 through 32, wherein the stress- engineered thin film is deposited with compressive stress near the upper surface of the substrate and with tensile stress farther away from the upper surface of the substrate to curve the micro-springs away from the upper surface of the substrate.

[0107] Example 34: The method of any of examples 28 through 33, wherein the stress- engineered thin film is deposited with tensile stress near the upper surface of the substrate and with compressive stress farther away from the upper surface of the substrate to curve the micro-springs toward the upper surface of the substrate.

Claims

WHAT IS CLAIMED IS:

1. A connection header, comprising: a substrate defining a contact end configured to face an external substrate; and a plurality of electrical traces coupled to an upper surface of the substrate, wherein each electrical trace includes a micro-spring extending beyond the contact end of the substrate, wherein each micro-spring comprises a stress-engineered thin film configured to impart a curvature profile on the micro-spring, and wherein each micro-spring is configured to: electrically contact a contact pad of the external substrate; and flex in response to the contact with the contact pad.

2. The connection header of claim 1, wherein a pitch of the micro-springs of the plurality of electrical traces is less than about 100 micrometers.

3. The connection header of claim 1, wherein a thickness of the micro-springs is less than about 10 micrometers.

4. The connection header of claim 1, wherein the substrate is substantially planar and defines a plane, and wherein each micro-spring is configured to flex along the plane in response to the contact with the contact pad.

5. The connection header of claim 1, wherein the micro-springs have a negative radius of curvature that curves away from the upper surface of the substrate.

6. The connection header of claim 1, wherein the electrical traces are configured as microwave transmission lines.

7. The connection header of claim 1, wherein the intrinsic stress profile along the electrical trace varies with distance from an anchor point on the substrate to a free end that extends beyond the substrate.

8. The connection header of claim 1, wherein the substrate defines at least one lateral projection extending beyond the contact end, and wherein the at least one lateral projection is configured to contact the external substrate.

9. The connection header of claim 8, wherein the lateral projection is configured to interface with a cavity of the external substrate.

10. A flexible connector, comprising: the connection header of any of claims 1 to 9; and a flex cable coupled to the plurality of electrical traces.

11. An electronic system, comprising: a plurality of the flexible connectors of claim 10; and the external substrate electrically coupled to the plurality of the flexible connectors via the micro-springs, wherein the external substrate is cooled.

12. The electronic system of claim 11, wherein the plurality of the flexible connectors are aligned out of plane with the contact pad of the external substrate.

13. The electronic system of claim 11, wherein the substrate defines at least one lateral projection extending beyond the contact end, and wherein the external substrate includes at least one cavity configured to receive the at least one lateral projection.

14. The electronic system of claim 11, wherein the external substrate includes an attachment assembly configured to interface with a cavity of the substrate.

15. The electronic system of claim 11, wherein the external substrate is cryogenically cooled.

16. A pluggable interposer, comprising: the connection header of claim 1; and a microchip disposed on the substrate; wherein the microchip is coupled to at least one of the plurality of electrical traces.

17. The pluggable interposer of claim 16, further comprising one or more electronic components directly fabricated on the substrate.

18. An electronic system, comprising: one or more of the pluggable interposers of claim 16; and the external substrate electrically coupled to the one or more pluggable interposers via the micro-springs.

19. The electronic system of claim 18, wherein the plurality of microchips are aligned out of plane with the contact pad of the external substrate.

20. A method of fabricating a connection header, comprising: depositing a stress-engineered thin film on an upper surface of a substrate, wherein the film possesses an intrinsic stress profile across a thickness of the film; patterning the film into a plurality of electrical traces; and patterning the substrate to form a contact end configured to face an external substrate; wherein, after patterning the substrate, each electrical trace includes a microspring extending beyond the contact end of the substrate, and wherein each micro-spring is configured to: electrically contact a contact pad of the external substrate; and flex in response to the contact with the contact pad.

21. The method of claim 20, wherein the plurality of electrical traces are deposited using physical vapor deposition (PVD).

22. The method of claim 20, wherein patterning the substrate further comprises: depositing a lower photosensitive layer on a lower surface of the substrate, wherein the lower photosensitive layer defines the contact end of the substrate; depositing an upper photosensitive layer on an upper surface of the plurality of electrical traces; etching the lower photosensitive layer and the substrate to form the contact end of the substrate; and removing the upper photosensitive layer.

23. The method of claim 20, wherein the substrate comprises a release layer; and wherein patterning the substrate further comprises removing a portion of the release layer with the upper photosensitive layer.

24. The method of claim 20, wherein the stress-engineered thin film is deposited with compressive stress near the upper surface of the substrate and with tensile stress farther away from the upper surface of the substrate to curve the micro-springs away from the upper surface of the substrate.

25. The method of claim 20, wherein the substrate defines at least one lateral projection extending beyond the contact end, and wherein the at least one lateral projection is configured to contact the external substrate.