WO2025113017A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2025113017A1
WO2025113017A1 PCT/CN2024/127394 CN2024127394W WO2025113017A1 WO 2025113017 A1 WO2025113017 A1 WO 2025113017A1 CN 2024127394 W CN2024127394 W CN 2024127394W WO 2025113017 A1 WO2025113017 A1 WO 2025113017A1
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WO
WIPO (PCT)
Prior art keywords
layer
area
film layer
touch
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2024/127394
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English (en)
French (fr)
Inventor
文平
罗昶
佘建民
刘彪
张毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of WO2025113017A1 publication Critical patent/WO2025113017A1/zh
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens

Definitions

  • This article relates to but is not limited to the field of display technology, and in particular to a display panel and a display device.
  • OLED Organic light emitting diode
  • TFT thin film transistor
  • the present embodiment provides a display panel and a display device.
  • the present embodiment provides a display panel, comprising: a substrate, a display structure layer and a touch structure layer.
  • the substrate comprises a display area and a first frame area located on one side of the display area.
  • the display structure layer is located on the substrate, and comprises at least a first organic film layer and a first inorganic film layer, wherein the first organic film layer is located on a side of the first inorganic film layer away from the substrate.
  • the touch structure layer is located on a side of the display structure layer away from the substrate, and comprises at least a second organic film layer and a second inorganic film layer, wherein the second organic film layer is located on a side of the second inorganic film layer away from the display structure layer.
  • a portion of the second organic film layer contacts the first organic film layer, or a portion of the second inorganic film layer contacts the first inorganic film layer.
  • the first frame area includes: a first signal access area and a wiring setting area located on a side of the first signal access area close to the display area.
  • the wiring setting area includes at least a plurality of touch transmission lines
  • the first signal access area includes at least a plurality of touch contact pads
  • at least one of the plurality of touch transmission lines is connected to at least one touch contact pad.
  • the second inorganic film layer includes in the wiring setting area: a plurality of first hollow structures, and the second organic film layer is in contact with the first organic film layer through the plurality of first hollow structures. At least one of the plurality of first hollow structures is located on at least one side of at least one of the plurality of touch transmission lines.
  • the plurality of first hollow structures include at least one of the following: a plurality of inorganic holes, a plurality of inorganic grooves.
  • the first organic film layer includes in the wiring setting area: a plurality of recessed portions, the plurality of recessed portions are connected to the plurality of first hollow structures in a one-to-one correspondence, the orthographic projections of the recessed portions on the substrate cover the orthographic projections of the corresponding first hollowed structures on the substrate, and the orthographic projections of the second inorganic film layer on the substrate partially overlap with the orthographic projections of the recessed portions on the substrate.
  • the wiring arrangement area further includes: at least one first power supply line,
  • the first power supply line is located on a side of the plurality of touch transmission lines close to the substrate, and the orthographic projection of the first power supply line on the substrate partially overlaps with the orthographic projection of the plurality of touch transmission lines on the substrate.
  • At least one of the plurality of inorganic grooves extends along an edge of the first power supply line.
  • the display panel further includes: a cutting edge located on one side of the first power supply line, and at least one of the plurality of inorganic grooves extends along the cutting edge.
  • the wiring arrangement area includes: a first edge area, a first wiring area, a middle area, a second wiring area, and a second edge area arranged in sequence along a first direction; the plurality of touch transmission lines are located in the first wiring area and the second wiring area; the wiring arrangement area is located on one side of the display area along the second direction, and the first direction intersects the second direction.
  • the plurality of first hollow structures are located in at least one of the first edge area, the middle area, and the second edge area.
  • the first frame area includes: a first signal access area and a wiring setting area located on a side of the first signal access area close to the display area.
  • the wiring setting area includes at least a plurality of touch transmission lines
  • the first signal access area includes at least a plurality of touch contact pads
  • at least one of the plurality of touch transmission lines is connected to at least one touch contact pad.
  • the first organic film layer includes in the wiring setting area: a plurality of second hollow structures, and the second inorganic film layer contacts the first inorganic film layer through the plurality of second hollow structures.
  • the plurality of second hollow structures are located on at least one side of the plurality of touch transmission lines.
  • the plurality of second hollow structures include at least one of the following: a plurality of organic holes, a plurality of organic grooves.
  • the display panel further includes: a plurality of isolation columns located in the wiring setting area, the second hollow structure covering the orthographic projection of at least one isolation column on the substrate; and the isolation columns are located between the second inorganic film layer and the first inorganic film layer.
  • the display structure layer includes at least: a first source-drain metal layer and a second source-drain metal layer sequentially disposed on the substrate, and the isolation column is located in the second source-drain metal layer.
  • the isolation column includes: a first metal layer, a second metal layer, and a third metal layer arranged in sequence along a direction away from the substrate, the orthographic projection of the third metal layer on the substrate covers the orthographic projections of the second metal layer and the first metal layer on the substrate, and an edge of the third metal layer protrudes from an edge of the second metal layer and the first metal layer.
  • the routing setting area also includes: at least one first power supply line, the first power supply line is located on a side of the multiple touch transmission lines close to the substrate, the orthographic projection of the first power supply line on the substrate partially overlaps with the orthographic projection of the multiple touch transmission lines on the substrate; at least one isolation column among the multiple isolation columns extends along an edge of the first power supply line.
  • the first frame region further includes: a bending region, the wiring setting region is connected to the bending region, and is located on a side of the bending region away from the display region.
  • the display structure layer includes at least: a first source-drain metal layer, a passivation layer, a first planarization layer, a second source-drain metal layer, and a second planarization layer disposed on the substrate.
  • the first inorganic film layer includes at least: the passivation layer; the first organic film layer includes at least: the second planarization layer and the first planarization layer.
  • the touch structure layer includes at least: a touch buffer layer, a first touch conductive layer, a touch interlayer insulating layer, a second touch conductive layer and a touch protection layer arranged in sequence.
  • the second inorganic film layer includes: the touch buffer layer and the touch interlayer insulating layer; the second organic film layer includes: the touch protection layer.
  • this embodiment provides a display device, including the display panel as described above.
  • this embodiment provides a display panel, including: a substrate.
  • the substrate includes a display area and a A first frame region on one side of the display region.
  • the first frame region at least includes: a first inorganic film layer, a first organic film layer, a second inorganic film layer, a second organic film layer and a plurality of touch transmission lines arranged on the substrate; the first organic film layer is located on a side of the first inorganic film layer away from the substrate, the second inorganic film layer is located on a side of the first organic film layer away from the substrate, and the second organic film layer is located on a side of the second inorganic film layer away from the substrate.
  • the second inorganic film layer includes a plurality of first hollow structures, the second organic film layer contacts the first organic film layer through the plurality of first hollow structures, and the distance between the first hollow structure and the touch transmission line on the orthographic projection of the substrate is greater than 0; or the first organic film layer includes a plurality of second hollow structures, the second inorganic film layer contacts the first inorganic film layer through the plurality of second hollow structures, and the distance between the second hollow structure and the touch transmission line on the orthographic projection of the substrate is greater than 0.
  • the plurality of first hollow structures include at least one of the following: a plurality of inorganic holes, a plurality of inorganic grooves.
  • the plurality of second hollow structures include at least one of the following: a plurality of organic holes, a plurality of organic grooves.
  • FIG1 is a schematic diagram of a display panel according to at least one embodiment of the present disclosure.
  • FIG2 is a partial cross-sectional schematic diagram of a display area of a display panel according to at least one embodiment of the present disclosure
  • FIG3 is a partial plan view of a touch structure layer according to at least one embodiment of the present disclosure.
  • FIG4 is a partial schematic diagram of a first frame area according to at least one embodiment of the present disclosure.
  • FIG5 is a partial enlarged schematic diagram of area C1 in FIG4 ;
  • Fig. 6 is a schematic partial cross-sectional view along the Q1-Q1' direction in Fig. 5;
  • FIG7 is a schematic partial cross-sectional view along the Q2-Q2' direction in FIG5;
  • FIG8 is another partial schematic diagram of the first frame area of at least one embodiment of the present disclosure.
  • FIG9 is a partial enlarged schematic diagram of area C2 in FIG8 ;
  • FIG10A is a partial cross-sectional schematic diagram along the Q3-Q3' direction in FIG9;
  • FIG10B is another partial cross-sectional schematic diagram along the Q3-Q3' direction in FIG9;
  • FIG11 is another partial schematic diagram of the first frame area of at least one embodiment of the present disclosure.
  • FIG12 is a partial enlarged schematic diagram of area C3 in FIG11;
  • FIG13A is a partial cross-sectional schematic diagram along the Q4-Q4' direction in FIG12;
  • FIG13B is another partial cross-sectional schematic diagram along the Q4-Q4' direction in FIG12;
  • FIG14 is another partial schematic diagram of the first frame area of at least one embodiment of the present disclosure.
  • FIG15 is a partial enlarged schematic diagram of area C4 in FIG14;
  • Fig. 16 is a partial cross-sectional schematic diagram along the Q5-Q5' direction in Fig. 15;
  • FIG17 is another partial schematic diagram of the first frame area of at least one embodiment of the present disclosure.
  • FIG18 is another partial schematic diagram of the first frame area of at least one embodiment of the present disclosure.
  • FIG19 is a partial enlarged schematic diagram of area C5 in FIG18 ;
  • FIG20 is a schematic partial cross-sectional view along the Q6-Q6' direction in FIG19;
  • FIG. 21 is another schematic diagram of a display panel according to at least one embodiment of the present disclosure.
  • FIG. 22 is a schematic diagram of a display device according to at least one embodiment of the present disclosure.
  • the terms “installed”, “connected”, and “connected” should be understood in a broad sense.
  • it can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements.
  • installed can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements.
  • electrical connection includes the case where components are connected together through an element having some electrical function.
  • element having some electrical function There is no particular limitation on the "element having some electrical function” as long as it can transmit electrical signals between connected components. Examples of “element having some electrical function” include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.
  • a transistor refers to an element including at least three terminals: a gate, a drain, and a source.
  • a transistor has a channel region between a drain (drain electrode terminal, a drain region, or a drain electrode) and a source (source electrode terminal, a source region, or a source electrode), and current can flow through the drain, the channel region, and the source.
  • a channel region refers to a region where current mainly flows.
  • the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode.
  • the functions of the "source electrode” and the “drain electrode” are sometimes interchanged. Therefore, in this specification, the "source electrode” and the “drain electrode” may be interchanged.
  • the gate electrode may also be called a control electrode.
  • parallel means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°.
  • perpendicular means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, also includes a state where the angle is greater than 85° and less than 95°.
  • circles, ellipses, triangles, rectangles, trapezoids, pentagons or hexagons are not in the strict sense, but may be approximate circles, approximate ellipses, approximate triangles, approximate rectangles, approximate trapezoids, approximate pentagons or approximate hexagons, etc. There may be some small deformations caused by tolerances, such as chamfers, arc edges and deformations.
  • a extends along direction B means that A may include a main part and a secondary part connected to the main part, the main part is a line, a line segment or a strip-shaped body, the main part extends along direction B, and the length of the main part extending along direction B is greater than the length of the secondary part extending along other directions.
  • a extends along direction B means "the main part of A extends along direction B".
  • a and B are an integrated structure means that A and B are connected to each other and formed as one.
  • the display panel may be integrated with a touch structure.
  • the display panel may include: a liquid crystal display (LCD) substrate, or an organic light emitting diode (OLED) display substrate, or a plasma display device (PDP) display substrate, or an electrophoretic display (EPD) display substrate.
  • the display panel may include an OLED display substrate and a touch structure.
  • the touch structure may be disposed on the encapsulation layer of the display substrate to form a touch structure on a thin film encapsulation (Touch on Thin Film Encapsulation, abbreviated as Touch on TFE) structure.
  • the display structure and the touch structure are integrated together, and have the advantages of being light, thin, and foldable, and can meet the product requirements of flexible folding and narrow bezels, and are widely used in display fields such as mobile phones and televisions (TVs).
  • the Touch on TFE structure mainly includes a Flexible Multi-Layer On Cell (FMLOC) structure and a Flexible Single-Layer On Cell (FSLOC) structure.
  • FMLOC structure is based on the working principle of mutual capacitance detection.
  • two layers of metal are used to form the drive (Tx) electrode and the sense (Rx) electrode.
  • the touch integrated circuit (IC) realizes the touch action by detecting the mutual capacitance between the drive electrode and the sense electrode.
  • the FSLOC structure is based on the working principle of self-capacitance (or voltage) detection.
  • a single layer of metal is used to form the touch electrode.
  • the touch integrated circuit realizes the touch action by detecting the self-capacitance (or voltage) of the touch electrode.
  • a reliability test such as a drop test
  • peeling of the film layer is likely to occur in the lower frame area of the display panel. For example, peeling is likely to occur between the touch structure and the display structure in the lower frame area.
  • the present embodiment provides a display panel, comprising: a substrate, a display structure layer and a touch structure layer.
  • the substrate comprises a display area and a first frame area located on one side of the display area.
  • the display structure layer comprises at least a first organic film layer and a first inorganic film layer, and the first organic film layer is located on a side of the first inorganic film layer away from the substrate.
  • the touch structure layer is located on a side of the display structure layer away from the substrate, and comprises at least a second organic film layer and a second inorganic film layer.
  • the second organic film layer is located on a side of the second inorganic film layer away from the display structure layer. In the first frame area, a portion of the second organic film layer contacts the first organic film layer, or a portion of the second inorganic film layer contacts the first inorganic film layer.
  • the display panel provided in this embodiment can improve the adhesion effect between the display structure layer and the touch structure layer in the first frame area by setting the second organic film layer in the first frame area to contact with the first organic film layer, or the second inorganic film layer to contact with the first inorganic film layer, thereby enhancing the strength of the first frame area and preventing the film layer from peeling off due to impact.
  • the first frame area may include: a first signal access area and a wiring arrangement area located on a side of the first signal access area close to the display area.
  • the wiring arrangement area may include at least a plurality of touch sensor lines.
  • the first signal access area may include at least a plurality of touch contact pads, and at least one of the plurality of touch transmission lines may be connected to at least one touch contact pad.
  • the second inorganic film layer may include: a plurality of first hollow structures in the routing setting area, and the second organic film layer may contact the first organic film layer through the plurality of first hollow structures. At least one first hollow structure may be located on at least one side of at least one touch transmission line.
  • the plurality of first hollow structures may be located on one side or both sides of the plurality of touch transmission lines; or, at least one first hollow structure may be located between two adjacent touch transmission lines.
  • the plurality of first hollow structures may include at least one of the following: a plurality of inorganic holes, a plurality of inorganic grooves.
  • the plurality of first hollow structures may include a plurality of inorganic holes, or may include a plurality of inorganic grooves, or may include a plurality of inorganic holes and a plurality of inorganic grooves.
  • the second inorganic film layer in the first hollow structure of this example may be removed to expose the surface of the first organic film layer away from the substrate side, so that the surface of the second organic film layer close to the substrate side may contact the surface of the first organic film layer away from the substrate side.
  • a plurality of first hollow structures are arranged to achieve contact between the second organic film layer and the first organic film layer in the first frame area, thereby improving the adhesion effect between the display structure layer and the touch structure layer in the first frame area, thereby enhancing the strength of the first frame area and preventing the film layer from peeling off due to impact.
  • the first organic film layer may include: a plurality of recessed portions in the routing setting area, and the plurality of recessed portions may be connected to the plurality of first hollow structures in a one-to-one correspondence.
  • the orthographic projection of the recessed portion on the substrate may cover the orthographic projection of the corresponding first hollow structure on the substrate, and the orthographic projection of the second inorganic film layer on the substrate may partially overlap with the orthographic projection of the recessed portion on the substrate.
  • the plurality of recessed portions may include: a plurality of first recessed portions corresponding to a plurality of inorganic holes; or, the plurality of recessed portions may include: a plurality of second recessed portions corresponding to a plurality of inorganic grooves.
  • the first organic film layer in the recessed portion may be removed so that the minimum distance between the surface of the recessed portion away from the substrate side and the substrate may be less than the minimum distance between the surface of the area outside the recessed portion away from the substrate side and the substrate.
  • the second organic film layer may be filled in the recessed portion formed by the first organic film layer and the first hollow structure formed by the second inorganic film layer, thereby forming a Dingmao structure, which may further increase the bonding force between the second organic film layer and the first organic film layer.
  • the wiring setting area may further include: at least one first power supply line.
  • the first power supply line may be located on a side of the plurality of touch transmission lines close to the substrate, and the orthographic projection of the first power supply line on the substrate may partially overlap with the orthographic projection of the plurality of touch transmission lines on the substrate.
  • At least one of the plurality of inorganic grooves may extend along an edge of the first power supply line. In this example, by providing an inorganic groove along the edge of the first power supply line, it is beneficial to block the extension path of the crack, and the inorganic groove may be used to increase the bonding force between the second organic film layer and the first organic film layer.
  • the display panel may further include: a cutting edge located on one side of the first power supply line, and at least one of the plurality of inorganic grooves may extend along the cutting edge.
  • a cutting edge located on one side of the first power supply line, and at least one of the plurality of inorganic grooves may extend along the cutting edge.
  • the wiring setting area may include: a first edge area, a first wiring area, a middle area, a second wiring area, and a second edge area arranged in sequence along the first direction.
  • a plurality of touch transmission lines may be located in the first wiring area and the second wiring area.
  • the wiring setting area may be located on one side of the display area along the second direction.
  • the first direction and the second direction may intersect, for example, the first direction may be perpendicular to the second direction.
  • a plurality of first hollow structures may be located in at least one of the first edge area, the middle area, and the second edge area.
  • a plurality of first hollow structures may be located in the first edge area, or in the second edge area, or in the middle area, or in the first edge area and the middle area, or in the second edge area and the middle area, or in the first edge area, the second edge area, and the middle area.
  • the arrangement of the first hollow structure of this example may etch the second inorganic film layer in the area where the first organic film layer is retained, so as to achieve contact between the second organic film layer and the first organic film layer, thereby increasing the bonding force between the two.
  • the first frame area may include: a first signal access area and a wiring arrangement area located on a side of the first signal access area close to the display area.
  • the wiring arrangement area may include at least a plurality of touch sensor lines.
  • the first signal access area may include at least a plurality of touch contact pads, and at least one of the plurality of touch transmission lines is connected to the at least one touch contact pad.
  • the first organic film layer may include: a plurality of second hollow structures in the routing setting area, and the second inorganic film layer may contact the first inorganic film layer through the plurality of second hollow structures.
  • the plurality of second hollow structures may be located on at least one side of the plurality of touch transmission lines.
  • the plurality of second hollow structures may be located on one side of the plurality of touch transmission lines, or may be located on both sides of the plurality of touch transmission lines.
  • the plurality of second hollow structures may include at least one of the following: a plurality of organic holes, a plurality of organic grooves.
  • the plurality of second hollow structures may include a plurality of organic holes, or may include a plurality of organic grooves, or may include a plurality of organic holes and a plurality of organic grooves.
  • the first organic film layer in the second hollow structure of this example may be removed to expose the surface of the first inorganic film layer away from the substrate side, so that the surface of the second inorganic film layer close to the substrate side may contact the surface of the first inorganic film layer away from the substrate side.
  • a plurality of second hollow structures are arranged to achieve contact between the second inorganic film layer and the first inorganic film layer in the first frame area, thereby improving the adhesion effect between the display structure layer and the touch structure layer in the first frame area, thereby enhancing the strength of the first frame area and preventing the film layer from peeling off due to impact.
  • the display panel may further include: a plurality of isolation columns located in the wiring setting area, and the orthographic projection of the second hollow structure on the substrate may cover the orthographic projection of at least one isolation column on the substrate.
  • the isolation column is located between the second inorganic film layer and the first inorganic film layer.
  • the isolation column may be located in the second source and drain metal layer. In this example, by arranging the isolation column in the second hollow structure, the bonding force between the second inorganic film layer and the first inorganic film layer can be further increased.
  • the isolation column may include: a first metal layer, a second metal layer, and a third metal layer sequentially arranged in a direction away from the substrate, the orthographic projection of the third metal layer on the substrate may cover the orthographic projections of the second metal layer and the first metal layer on the substrate, and the edge of the third metal layer may protrude from the edge of the second metal layer and the first metal layer.
  • the isolation column may form a Dingmao structure in contact between the second inorganic film layer and the first inorganic film layer, thereby further increasing the bonding force between the second inorganic film layer and the first inorganic film layer.
  • FIG. 1 is a schematic diagram of a display panel of at least one embodiment of the present disclosure.
  • FIG. 1 is a planar schematic diagram of a display panel before a bending process is performed.
  • the display panel may include: a display area AA, and a border area BB surrounding the periphery of the display area AA.
  • the border area BB may include: a first border area B1 located on one side of the display area AA, and border areas located on other sides of the display area AA (for example, including a second border area B2, a third border area B3, and a fourth border area B4).
  • the first border area B1 may be, for example, a lower border area of the display panel
  • the second border area B2 may be, for example, an upper border area of the display panel
  • the third border area B3 may be, for example, a left border area of the display panel
  • the fourth border area B4 may be, for example, a right border area of the display panel.
  • the display area AA may be a flat area including a plurality of sub-pixels PX constituting a pixel array, and the plurality of sub-pixels PX may be configured to display a dynamic picture or a still image.
  • the display area AA may be referred to as an active area (Active Area).
  • the display area AA may be a rectangle.
  • this embodiment is not limited thereto.
  • the display area AA may be other shapes such as a circle or an ellipse.
  • the display panel may be a flexible panel, and thus the display panel may be deformable, such as curling, bending, folding, or rolling up.
  • the display area AA may further include: a plurality of gate lines GL and a plurality of data lines DL.
  • the plurality of gate lines GL may extend along a first direction X
  • the plurality of data lines DL may extend along a second direction Y.
  • the orthographic projections of the plurality of gate lines GL and the plurality of data lines DL on the substrate may intersect to form a plurality of sub-pixel regions, and a sub-pixel PX may be disposed in each sub-pixel region.
  • the plurality of data lines DL may be electrically connected to the plurality of sub-pixels PX, and the plurality of data lines DL may be configured to provide data signals to the plurality of sub-pixels PX.
  • the plurality of gate lines GL may be electrically connected to the plurality of sub-pixels PX, and the plurality of gate lines GL may be configured to provide gate control signals to the plurality of sub-pixels PX.
  • the gate control signal may include a scan signal and a light emitting control signal, or may include a scan signal, or may include a scan signal, a reset control signal, and a light emitting control signal.
  • the first direction X may be an extension direction (e.g., a row direction) of the gate lines GL in the display area AA
  • the second direction Y may be an extension direction (e.g., a column direction) of the data lines DL in the display area AA.
  • the first direction X and the second direction Y may intersect each other, for example, may be perpendicular to each other.
  • a pixel unit of display area AA may include three sub-pixels, and the three sub-pixels are respectively a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • this embodiment is not limited to this.
  • a pixel unit may include four sub-pixels, and the four sub-pixels are respectively a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • a pixel unit may include four sub-pixels, and the four sub-pixels may include one red sub-pixel, one blue sub-pixel, and two green sub-pixels.
  • a sub-pixel may include: a pixel circuit and a light-emitting element electrically connected to the pixel circuit.
  • the pixel circuit may include multiple transistors and at least one capacitor.
  • the pixel circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure.
  • T in the above circuit structure refers to a thin film transistor
  • C refers to a capacitor
  • the number before T represents the number of thin film transistors in the circuit
  • the number before C represents the number of capacitors in the circuit.
  • the multiple transistors in the pixel circuit may be P-type transistors, or may be N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the process difficulty of the display substrate, and improve the yield of the product. In other examples, the multiple transistors in the pixel circuit may include P-type transistors and N-type transistors.
  • multiple transistors in a pixel circuit may use low-temperature polysilicon thin-film transistors, or may use oxide thin-film transistors, or may use low-temperature polysilicon thin-film transistors and oxide thin-film transistors.
  • the active layer of the low-temperature polysilicon thin-film transistor uses low-temperature polysilicon (LTPS), and the active layer of the oxide thin-film transistor uses oxide semiconductor (Oxide).
  • LTPS low-temperature polysilicon
  • oxide thin-film transistor uses oxide semiconductor (Oxide).
  • Low-temperature polysilicon thin-film transistors have the advantages of high mobility and fast charging, and oxide thin-film transistors have the advantages of low leakage current.
  • Integrating low-temperature polysilicon thin-film transistors and oxide thin-film transistors on a display panel namely the LTPS+Oxide (LTPO for short) display panel, can take advantage of the advantages of both, can achieve low-frequency driving, can reduce power consumption, and can improve display quality.
  • LTPS+Oxide LTPO for short
  • the shape of the light-emitting element of the sub-pixel can be a rectangle, a rhombus, a pentagon, or a hexagon.
  • the light-emitting elements of the three sub-pixels can be arranged in parallel horizontally, vertically, or in a triangle; when a pixel unit includes four sub-pixels, the light-emitting elements of the four sub-pixels can be arranged in parallel horizontally, vertically, or in a square.
  • this embodiment is not limited to this.
  • the light-emitting element may be any one of a light-emitting diode (LED), an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED), a micro-LED (including: mini-LED or micro-LED), etc.
  • the light-emitting element may be an OLED, and the light-emitting element may emit red light, green light, blue light, or white light, etc. when driven by its corresponding pixel circuit. The color of the light emitted by the light-emitting element may be determined as required.
  • the light-emitting element may include: an anode, a cathode, and an organic light-emitting layer located between the anode and the cathode.
  • the anode of the light-emitting element may be electrically connected to the corresponding pixel circuit.
  • this embodiment is not limited to this.
  • FIG2 is a partial cross-sectional schematic diagram of the display area of the display panel of at least one embodiment of the present disclosure.
  • FIG2 is a diagram showing the structure of a sub-pixel in the display area as an example.
  • the same type of multiple transistors in the pixel circuit is used as an example for explanation.
  • multiple transistors in the pixel circuit can all use low-temperature polysilicon thin-film transistors or all use oxide thin-film transistors.
  • multiple transistors in the pixel circuit can use low-temperature polysilicon thin-film transistors and oxide thin-film transistors.
  • this example uses a display panel integrated with a mutual capacitance touch structure to form Take the FMLOC structure as an example to illustrate.
  • the display area of the display panel may include: a substrate 10, and a circuit structure layer 20, a light emitting structure layer 30, a packaging structure layer 40, and a touch structure layer 50 sequentially arranged on the substrate 10.
  • the display structure layer may include at least a circuit structure layer 20 and a light emitting structure layer 30.
  • the circuit structure layer 20 may include at least: a pixel circuit of a plurality of sub-pixels, and the pixel circuit of each sub-pixel may include a plurality of transistors and at least one capacitor.
  • the light emitting structure layer 30 may include at least: a light emitting element of a plurality of sub-pixels.
  • FIG. 2 takes a thin film transistor 21 and a capacitor 22 included in the pixel circuit of each sub-pixel as an example for illustration.
  • the circuit structure layer 20 of the display area may include: a semiconductor layer, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer arranged on the substrate 10.
  • a buffer layer 101 may be arranged between the semiconductor layer and the substrate 10, a first gate insulating layer 102 may be arranged between the semiconductor layer and the first gate metal layer, a second gate insulating layer 103 may be arranged between the first gate metal layer and the second gate metal layer, an interlayer insulating layer 104 may be arranged between the second gate metal layer and the first source-drain metal layer, a passivation layer 105 and a first flat layer 106 may be arranged between the first source-drain metal layer and the second source-drain metal layer, and a second flat layer 107 may be arranged on the side of the second source-drain metal layer away from the substrate 10.
  • the buffer layer 101 can prevent harmful substances in the substrate 10 from invading the interior of the display panel, and can also increase the adhesion of the film layer in the display panel on the substrate.
  • the buffer layer 101, the first gate insulating layer 102, the second insulating layer 103, the interlayer insulating layer 104 and the passivation layer 105 may be inorganic insulating layers, and the first planar layer 106 and the second planar layer 107 may be organic insulating layers.
  • this embodiment is not limited to this.
  • a bottom shielding metal layer may be provided on the side of the buffer layer close to the substrate, and the bottom shielding metal layer may be configured to at least partially cover the active layer of the thin film transistor of the pixel circuit to prevent external light from affecting the performance of the thin film transistor.
  • the passivation layer may be omitted between the first source and drain metal layer and the second source and drain metal layer, and only the first planar layer may be provided between the first source and drain metal layer and the second source and drain metal layer.
  • the first planar layer may be omitted between the first source and drain metal layer and only the passivation layer may be provided.
  • a third source-drain metal layer may be disposed on the side of the second planar layer away from the substrate, a third planar layer may be disposed on the side of the third source-drain metal layer away from the substrate, and the second planar layer and the third planar layer may be organic insulating layers.
  • the semiconductor layer of the display area may include at least: an active layer 210 of a thin film transistor 21.
  • the active layer 210 of the thin film transistor 21 may include: a first region 2101, a second region 2102, and a channel region 2100 located between the first region 2101 and the second region 2102.
  • the first gate metal layer may include at least: a gate electrode 213 of the thin film transistor 21, and a first electrode plate 221 of the capacitor 22.
  • the orthographic projection of the gate electrode 213 of the thin film transistor 21 on the substrate 10 may cover the orthographic projection of the channel region 2100 of the active layer 210 on the substrate 10.
  • the second gate metal layer may include at least: a second electrode plate 222 of the capacitor 22.
  • the orthographic projections of the second electrode plate 222 and the first electrode plate 221 of the capacitor 22 on the substrate 10 may at least partially overlap, for example, the two may overlap.
  • the first source-drain metal layer may include at least: a source electrode 211 and a drain electrode 212 of the thin film transistor 21.
  • the interlayer insulating layer 104 may be provided with a plurality of vias (for example, including a first pixel via and a second pixel via) in the display area.
  • the interlayer insulating layer 104, the second gate insulating layer 103 and the first gate insulating layer 102 in the first pixel via may be removed to expose at least a portion of the surface of the first region 2101 of the active layer 210; the interlayer insulating layer 104, the second gate insulating layer 103 and the first gate insulating layer 102 in the second pixel via may be removed to expose at least a portion of the surface of the second region 2102 of the active layer 210.
  • the source electrode 211 of the thin film transistor 21 may be electrically connected to the first region 2101 of the active layer 210 through the first pixel via, and the drain electrode 212 may be electrically connected to the second region 2102 of the active layer 210 through the second pixel via.
  • the second source-drain metal layer may include at least: a first transfer electrode 231.
  • the first transfer electrode 231 can be electrically connected to the drain 212 of the thin film transistor 21 of the pixel circuit through the third pixel via hole opened in the passivation layer 105 and the first flat layer 106.
  • the first transfer electrode 231 can be electrically connected to the first electrode 301 (for example, an anode) of the light-emitting element through the fourth pixel via hole opened in the second flat layer 107.
  • the electrical connection between the pixel circuit and the light-emitting element can be achieved through the first transfer electrode 231.
  • the third source-drain metal layer can include at least a second transfer electrode, and the second transfer electrode is electrically connected to the first transfer electrode and the drain 212 of the thin film transistor 21 of the pixel circuit.
  • the first electrode of the light emitting element is not limited in this embodiment.
  • the gate line of the display area may be located in the first gate metal layer
  • the data line of the display area may be located in the second source-drain metal layer
  • the high potential power line of the display area may be located in the second source-drain metal layer.
  • the circuit structure layer of this example may include two source-drain metal layers, which can avoid arranging more wiring in a single source-drain metal layer, thereby facilitating the realization of a narrow frame structure.
  • the circuit structure layer may include three or more source-drain metal layers.
  • the light emitting structure layer 30 may include: a pixel definition layer 304 and a plurality of light emitting elements.
  • each light emitting element may include: a stacked first electrode 301, an organic light emitting layer 302, and a second electrode 303.
  • the first electrode 301 of the light emitting element may be an anode, and the first electrode 301 may be disposed on the second flat layer 107, and electrically connected to the first transfer electrode 231 through a fourth pixel via hole provided in the second flat layer 107.
  • the pixel definition layer 304 is disposed on the first electrode 301 and the second flat layer 107, and the pixel definition layer 304 may be provided with a plurality of pixel openings, and one pixel opening may expose at least a portion of the surface of a corresponding first electrode 301. At least a portion of the organic light emitting layer 302 may be disposed in a pixel opening and connected to the corresponding first electrode 301.
  • the second electrode 303 may be disposed on the organic light emitting layer 302 and connected to the organic light emitting layer 302.
  • the organic light emitting layer 302 may emit light of a corresponding color under the drive of the first electrode 301 and the second electrode 303.
  • An isolation column layer may be further disposed on a side of the pixel definition layer 304 away from the substrate 10 , and the isolation column layer may include a plurality of isolation columns (PS).
  • the organic light-emitting layer 302 of the light-emitting element may include a light-emitting layer (EML, Emitting Layer), and one or more film layers including a hole injection layer (HIL, Hole Injection Layer), a hole transport layer (HTL, Hole Transport Layer), a hole blocking layer (HBL, Hole Block Layer), an electron blocking layer (EBL, Electron Block Layer), an electron injection layer (EIL, Electron Injection Layer), and an electron transport layer (ETL, Electron Transport Layer).
  • HIL hole injection layer
  • HTL Hole Transport Layer
  • HBL Hole Block Layer
  • EBL Electron Block Layer
  • EIL Electron Injection Layer
  • ETL Electron Transport Layer
  • the light-emitting layers of light-emitting elements of different colors may be different.
  • a red light-emitting element includes a red light-emitting layer
  • a green light-emitting element includes a green light-emitting layer
  • a blue light-emitting element includes a blue light-emitting layer.
  • the hole injection layer and the hole transport layer on one side of the light-emitting layer may use a common layer
  • the electron injection layer and the electron transport layer on the other side of the light-emitting layer may use a common layer.
  • any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer may be made by a single process (a single evaporation process or a single inkjet printing process), and isolation is achieved by means of a surface step difference of the formed film layer or by surface treatment.
  • any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer corresponding to adjacent sub-pixels may be isolated.
  • the organic light-emitting layer may be formed by evaporation using a fine metal mask (FMM) or an open mask (Open Mask), or may be formed by an inkjet process.
  • FMM fine metal mask
  • Open Mask open mask
  • the encapsulation structure layer 40 may include a first encapsulation layer 401, a second encapsulation layer 402, and a third encapsulation layer 403 stacked.
  • the first encapsulation layer 401 and the third encapsulation layer 403 may be made of inorganic materials
  • the second encapsulation layer 402 may be made of organic materials
  • the second encapsulation layer 402 may be arranged between the first encapsulation layer 401 and the third encapsulation layer 403 to ensure that external water vapor cannot enter the light-emitting element.
  • this embodiment is not limited to this.
  • the encapsulation structure layer may adopt a five-layer stacked structure of inorganic/organic/inorganic/organic/inorganic.
  • FIG3 is a partial plan view of a touch structure layer of at least one embodiment of the present disclosure.
  • the touch structure layer of the display area may include: a plurality of first touch units 530 and a plurality of second touch units 540.
  • the first touch units 530 may have a linear shape extending along a first direction X, and the plurality of first touch units 530 may be arranged in sequence along a second direction Y.
  • the second touch units 540 may have a linear shape extending along the second direction Y, and the plurality of second touch units 540 may be arranged in sequence along the first direction X.
  • Each first touch unit 530 may include a plurality of first touch electrodes 531 and a first connecting portion 532 arranged in sequence along the first direction X.
  • the first touch electrodes 531 and the first connecting portion 532 may be arranged in sequence along the first direction X.
  • the second touch control units 540 may include a plurality of second touch control electrodes 541 arranged in sequence along the second direction Y, the plurality of second touch control electrodes 541 may be arranged at intervals, and adjacent second touch control electrodes 541 may be connected to each other via the second connecting portions 542.
  • the film layer where the second connecting portions 542 are located may be different from the film layer where the first touch electrodes 531 and the second touch electrodes 541 are located.
  • the touch structure layer 50 of the display area may include: a touch buffer layer (TBL) 501, a first touch conductive layer 511, a touch interlayer insulating layer (TLD) 502, a second touch conductive layer 512, and a touch protection layer (TOC) 503 arranged in sequence.
  • the touch buffer layer 501 and the touch interlayer insulating layer 502 may be inorganic insulating layers, and the touch protection layer 503 may be an organic insulating layer. However, this embodiment is not limited to this. In other examples, the touch buffer layer may be omitted.
  • a plurality of first touch electrodes 531, a plurality of second touch electrodes 541, and a plurality of first connecting portions 532 may be disposed in the same layer on the first touch conductive layer 511, and may be formed by the same patterning process, and the first touch electrodes 531 and the first connecting portions 532 may be an integrated structure connected to each other.
  • the second connecting portion 542 may be disposed in the second touch conductive layer 512, and the second connecting portion 542 may be connected to the adjacent second touch electrodes 221 through a via hole provided in the touch interlayer insulating layer 502.
  • a plurality of first touch electrodes 531, a plurality of second touch electrodes 541, and a plurality of second connecting portions 542 may be disposed in the same layer on the first touch conductive layer 511, and the second touch electrodes 541 and the second connecting portions 542 may be an integrated structure connected to each other, and the first connecting portion 532 may be disposed in the second touch conductive layer 512, and the first connecting portion 532 may be connected to the adjacent first touch electrodes 531 through a via hole provided in the touch interlayer insulating layer 502.
  • the first touch electrode 531 may be a driving (Tx) electrode
  • the second touch electrode 541 may be a sensing (Rx) electrode
  • the first touch electrode 531 may be a sensing (Rx) electrode
  • the second touch electrode 541 may be a driving (Tx) electrode. This embodiment is not limited to this.
  • the first touch electrode 531 and the second touch electrode 541 may have a rhombus shape, such as a regular rhombus, a horizontally long rhombus, or a vertically long rhombus.
  • the first touch electrode 531 and the second touch electrode 541 may have any one or more of a triangle, a square, a trapezoid, a parallelogram, a pentagon, a hexagon, and other polygons, which is not limited in the embodiments of the present disclosure.
  • the first touch electrode 531 and the second touch electrode 541 may be in the form of transparent conductive electrodes.
  • the first touch electrode 531 and the second touch electrode 541 may be in the form of a metal grid, which may be formed by interweaving a plurality of metal wires, which may include a plurality of grid patterns, and the grid pattern may be a polygon formed by a plurality of metal wires.
  • the first touch electrode 531 and the second touch electrode 541 in the form of a metal grid have the advantages of low resistance, small thickness, and fast response speed.
  • the display structure layers of the third frame area B3 and the fourth frame area B4 of the display panel may each include: a peripheral circuit area, a power line area, a crack dam area and a cutting area arranged in sequence along a direction away from the display area AA.
  • the peripheral circuit area is connected to the display area AA, and may include at least a gate drive circuit (for example, including a plurality of cascaded shift registers), and the plurality of shift registers may be electrically connected to the plurality of gate lines GL in the display area AA, and may be configured to provide a gate control signal to the plurality of gate lines GL.
  • the power line area is connected to the peripheral circuit area, and may include at least a low potential power line, which may extend in a direction parallel to the edge of the display area AA and be connected to the cathode of the light-emitting element of the display area AA.
  • the crack dam area may be connected to the power line area, and may include at least a plurality of cracks arranged on the composite insulating layer.
  • the cutting area may be connected to the crack dam area, and may include at least a cutting groove arranged on the composite insulating layer, and the cutting groove may be configured such that after all the film layers of the display panel are prepared, the cutting arrangement may be cut along the cutting groove respectively.
  • the touch structure layers of the third frame region B3 and the fourth frame region B4 of the display panel may respectively include: a plurality of touch leads 252.
  • the plurality of touch leads 252 may be electrically connected to the first touch unit and the second touch unit, respectively.
  • the plurality of touch leads 252 may all be located in the first touch conductive layer, or all be located in the second touch conductive layer; or the plurality of touch leads 252 may be alternately arranged in the first touch conductive layer and the second touch conductive layer.
  • this embodiment is not limited to this.
  • the first border area B1 of the display panel may include: a fan-out routing area B11, a bending area B12, a routing area B13, a second signal access area B15, and a first signal access area B14 arranged in a direction away from the display area AA.
  • FIG1 only illustrates several routing lines in the first border area B1 for illustration. This embodiment does not limit the number of routing lines in the first border area B1.
  • the fan-out routing area B11 may be connected to the display area AA.
  • the fan-out routing area B11 may be provided with at least a first power fan-out line, a second power fan-out line, a plurality of display fan-out lines, and a plurality of touch lead-out lines 252.
  • the second power fan-out line may be configured to connect a high potential power line in the display area AA
  • the first power fan-out line may be configured to connect a low potential power line in the third frame area B13 and the fourth frame area B14.
  • the plurality of display fan-out lines may include at least: a plurality of data fan-out lines, a plurality of drive fan-out lines (not shown).
  • the plurality of data fan-out lines may be electrically connected to the plurality of data lines DL in the display area AA, for example, the plurality of data fan-out lines and the plurality of data lines DL may be electrically connected one by one.
  • the plurality of data fan-out lines may extend from the fan-out routing area B11 to the bending area B12 in a fan-out routing manner.
  • a plurality of drive fan-out lines may extend from the third frame area B3 and the fourth frame area B4 to the fan-out routing area B11, and the plurality of drive fan-out lines may be electrically connected to the gate drive circuit in the third frame area B3 and the fourth frame area B4, and the plurality of drive fan-out lines may be configured to provide a control signal to the gate drive circuit, for example, the control signal may include a start signal, a clock signal, etc.
  • a plurality of touch lead lines 252 may extend from the third frame area B3 and the fourth frame area B4 to the fan-out routing area B11, and may be located on a side of the plurality of display fan-out lines away from the substrate.
  • the bending area B12 is connected between the fan-out routing area B11 and the routing setting area B13, and can be configured so that the routing setting area B13 is bent to the back of the display area AA.
  • the bending area B12 can be provided with a plurality of bending connection lines, for example, it can include a plurality of data bending connection lines, a plurality of drive bending connection lines (not shown), a plurality of touch bending connection lines 253, a first power bending connection line (not shown) and a second power bending connection line (not shown).
  • the first power bending connection line can be electrically connected to the first power fan-out line
  • the second power bending connection line can be electrically connected to the second power fan-out line.
  • a plurality of data bending connection lines can be electrically connected to a plurality of data fan-out lines
  • a plurality of drive bending connection lines can be electrically connected to a plurality of drive fan-out lines
  • a plurality of touch bending connection lines 253 are electrically connected to a plurality of touch lead-out lines 252.
  • the plurality of bending connection lines may all extend along the second direction Y.
  • the plurality of bending connection lines may be in a same layer structure.
  • the plurality of touch bending connection lines 253 may be located on opposite sides of the plurality of data bending connection lines and the plurality of driving bending connection lines in the first direction X. This embodiment is not limited to this.
  • the routing area B13 may be provided with a plurality of signal transmission lines, for example, may include: a plurality of touch transmission lines 251 and a plurality of data transmission lines.
  • the plurality of data transmission lines may be electrically connected to a plurality of data bending connection lines, for example, in a one-to-one electrical connection, and connected to a plurality of data fan-out lines through a plurality of data bending connection lines.
  • the plurality of touch transmission lines 251 may be electrically connected to a plurality of touch bending connection lines 253, for example, in a one-to-one electrical connection.
  • the plurality of touch transmission lines 251 may be connected to a plurality of touch lead-out lines 252 in the fan-out routing area B11 through a plurality of touch bending connection lines 253.
  • the first border area B1 may include: at least one first signal access area B14 and at least one second signal access area B15.
  • This example is illustrated by taking one first signal access area B14 and one second signal access area B15 as an example.
  • the display panel may be a large-size panel, and the display panel may include multiple first signal access areas B14 and multiple second signal access areas B15.
  • the multiple first signal access areas B14 may be arranged in sequence along the first direction X
  • the multiple second signal access areas B15 may be arranged in sequence along the first direction X.
  • the first signal access area B14 may be located on the side of the second signal access area B15 away from the display area AA.
  • the second signal access area B15 may be located in the first signal access area in the second direction Y.
  • the domain B14 is close to one side of the bending region B12.
  • the second signal access area B15 may also be referred to as a driver chip setting area.
  • the second signal access area B15 may be provided with a plurality of contact pads, and the plurality of contact pads may be configured to be bound and connected to at least one driver chip.
  • the driver chip may be configured to generate a driving signal required for driving a sub-pixel, and provide the driving signal to a data line of the display area.
  • the driving signal may include a data signal for driving a sub-pixel.
  • the first signal access area B14 may also be referred to as a circuit binding area.
  • the first signal access area B14 may be provided with a plurality of contact pads (e.g., including a plurality of touch contact pads 254 ).
  • the plurality of contact pads may be arranged in a row along a first direction X, for example.
  • the plurality of contact pads may be configured to be bound and connected to at least one circuit board (e.g., a flexible printed circuit (FPC)).
  • FPC flexible printed circuit
  • an external circuit board may be configured to generate a touch signal provided to the touch structure layer and to receive a touch sensing signal.
  • the plurality of touch transmission lines 251 within the routing setting area B13 may be connected to the plurality of touch contact pads 254 .
  • one touch transmission line 251 may be connected to at least one touch contact pad 254 .
  • FIG4 is a partial schematic diagram of the first frame area of at least one embodiment of the present disclosure.
  • the wiring setting area B13 of the first frame area B1 may include: first power supply lines 62a and 62b, a second power supply line 61, a plurality of touch transmission lines, and a plurality of data transfer lines (not shown).
  • the plurality of touch transmission lines may be divided into a first group of touch transmission lines 251a and a second group of touch transmission lines 251b.
  • the first power supply lines 62a and 62b may be located on opposite sides of the second power supply line 61 in the first direction X.
  • the second power supply line 61 may be connected to the second power fan-out line in the fan-out routing area B11 through at least three second power bending connection lines.
  • the two ends of the second power supply line 61 may be respectively connected to at least one second power contact pad in the first signal access area B14.
  • the first power supply line 62a may be connected to the first power fan-out line in the fan-out routing area B11 through at least two first power bending connection lines
  • the first power supply line 62b may be connected to the first power fan-out line in the fan-out routing area B11 through at least two first power bending connection lines.
  • the second signal access area B15 may be located on the side of the second power supply line 61 away from the bending area B12.
  • the first power supply lines 62a and 62b may be roughly in the shape of a zigzag extending along the second direction Y.
  • the first power supply lines 62a and 62b may be designed with non-uniform widths.
  • the second power supply line 61 may be roughly in the shape of an N.
  • the touch transmission line may be roughly in the shape of a zigzag extending along the second direction Y.
  • the first group of touch transmission lines 251a may be connected to the multiple touch lead-out lines 252 in the fan-out routing area B11 through the multiple touch bent connection lines in the bent area B12
  • the second group of touch transmission lines 251b may be connected to the multiple touch lead-out lines 252 in the fan-out routing area B11 through the multiple touch bent connection lines in the bent area B12.
  • the multiple touch bent connection lines connected to the first group of touch transmission lines 251a may be located between the two first power bent connection lines connected to the first power supply line 62a
  • the multiple touch bent connection lines connected to the second group of touch transmission lines 251b may be located between the two first power bent connection lines connected to the first power supply line 62b.
  • the orthographic projection of the first group of touch transmission lines 251a on the substrate may partially overlap with the orthographic projection of the first power supply line 62a on the substrate, and the orthographic projection of the second group of touch transmission lines 251b on the substrate may partially overlap with the orthographic projection of the first power supply line 62b on the substrate.
  • the first group of touch transmission lines 251a may be located on a side of the first power supply line 62a away from the substrate, and the second group of touch transmission lines 251b may be located on a side of the first power supply line 62a away from the substrate.
  • the orthographic projections of the first group of touch transmission lines 251a and the second group of touch transmission lines 251b on the substrate may not overlap with the orthographic projections of the second power supply line 61 on the substrate.
  • the plurality of contact pads in the first signal access area B14 may include: a plurality of first power contact pads, a plurality of second power contact pads, and a plurality of touch contact pads (the touch contact pads 254 shown in FIG. 1 ).
  • the two ends of the second power supply line 61 may be connected to at least one second power contact pad, respectively.
  • the wire 62a can be connected to at least one first power contact pad
  • the first power supply line 62b can be connected to at least one first power contact pad
  • multiple touch transmission lines can be connected to multiple touch contact pads.
  • the first power contact pad can be located on the side of the second power contact pad away from the second signal access area B15, and the touch contact pad can be located on the side of the first power contact pad away from the second power contact pad.
  • the multiple contact pads in the second signal access area B15 may include multiple input contact pads and multiple output contact pads, and the multiple output contact pads can be located on the side of the multiple input contact pads close to the display area.
  • the multiple output contact pads can be connected to the multiple data transmission lines in the routing setting area B13, and the multiple input contact pads can be connected to the multiple intermediate contact pads in the first signal access area B14 through multiple pin connection lines.
  • the multiple intermediate contact pads in the first signal access area B14 can be located between the multiple second power contact pads in the first direction X.
  • the wiring setting area B13 may include: a first edge area B161, a first wiring area B164, a middle area B162, a second wiring area, and a second edge area B163 arranged in sequence along the first direction X.
  • the first wiring area B164 may be provided with a first group of touch transmission lines 251a and a first power supply line 62a
  • the second wiring area may be provided with a second group of touch transfer lines 251b and a first power supply line 62b.
  • the second power supply line 61 may be located in the middle area B162.
  • the middle area B162 may be located on one side of the second signal access area B15 close to the bending area B12.
  • Fig. 5 is a partial enlarged schematic diagram of area C1 in Fig. 4.
  • Fig. 6 is a partial cross-sectional schematic diagram along the Q1-Q1' direction in Fig. 5.
  • Fig. 7 is a partial cross-sectional schematic diagram along the Q2-Q2' direction in Fig. 5.
  • the first routing area B164 may include: a first power supply line 62a and a first group of touch transmission lines 251a sequentially arranged on the substrate 10.
  • the edge of the first routing area B164 in the first direction X may be the edge of the first power supply line 62a in the first direction X.
  • the first edge area B161 may be located on a side of the first power supply line 62a close to the left edge of the display panel, and the middle area B162 may be located on a side of the first power supply line 62a away from the first edge area B161.
  • At least a portion of the second power supply line 61 is located in the middle area B162.
  • the second power supply line 61 may include: a first voltage line 61-1 and a second voltage line 61-2 connected to each other.
  • the second voltage line 61-2 may be located on a side of the first voltage line 61-1 away from the substrate 10.
  • the orthographic projection of the second voltage line 61-2 on the substrate may at least partially overlap with the orthographic projection of the first voltage line 61-1 on the substrate, for example, the orthographic projection of the second voltage line 61-2 on the substrate may cover the orthographic projection of the first voltage line 61-1 on the substrate.
  • the first voltage line 61-1 may be located in the first source-drain metal layer
  • the second voltage line 61-2 may be located in the second source-drain metal layer.
  • the second voltage line 61-2 may be connected to the first voltage line 61-1 through a via or a groove opened in the first flat layer 106 and the passivation layer 105. This example can help reduce the impedance of the second power supply line by setting the second power supply line to adopt a double-layer routing design.
  • the first power supply line 62a may include: a third voltage line 62a-1 and a fourth voltage line 62a-2 connected to each other.
  • the fourth voltage line 62a-2 may be located on a side of the third voltage line 62a-1 away from the substrate 10.
  • the orthographic projection of the fourth voltage line 62a-2 on the substrate may at least partially overlap with the orthographic projection of the third voltage line 62a-1 on the substrate, for example, the orthographic projection of the fourth voltage line 62a-2 on the substrate may cover the orthographic projection of the third voltage line 62a-1 on the substrate.
  • the third voltage line 62a-1 may be located in the first source-drain metal layer
  • the fourth voltage line 62a-2 may be located in the second source-drain metal layer.
  • the fourth voltage line 62a-2 may be connected to the third voltage line 62a-1 through a via or a groove opened in the first flat layer 106 and the passivation layer 105. This example can be beneficial to reducing the impedance of the first power supply line by setting the first power supply line to adopt a double-layer routing design.
  • the first group of touch transmission lines 251a may include a plurality of touch transfer lines.
  • At least one touch transmission line may include: a first touch line 2511 and a second touch line 2512 connected to each other.
  • the second touch line 2512 may be located on a side of the first touch line 2511 away from the substrate 10.
  • the orthographic projection of the second touch line 2512 on the substrate may at least partially overlap with the orthographic projection of the first touch line 2511 on the substrate, for example, the second touch line 2512 may be located on a side of the first touch line 2511 away from the substrate 10.
  • the orthographic projection of the touch control line 2512 on the substrate can cover the orthographic projection of the first touch control line 2511 on the substrate.
  • the second touch control line 2512 can be located in the second touch conductive layer, and the first touch control line 2511 can be located in the first touch conductive layer.
  • the second touch control line 2512 can be connected to the first touch control line 2511 through a via or a groove provided in the touch interlayer insulating layer 502.
  • the first organic film layer of the display structure layer may include: a first flat layer 106 and a second flat layer 107
  • the first inorganic film layer may include: a buffer layer 101, a first gate insulating layer 102, a second gate insulating layer 103, an interlayer insulating layer 104, and a passivation layer 105 sequentially arranged on the substrate 10.
  • the second organic film layer of the touch structure layer may include a touch protection layer 503, and the second inorganic film layer may include a touch buffer layer 501 and a touch interlayer insulating layer 502.
  • this embodiment is not limited to this.
  • the touch buffer layer may be omitted, and the second inorganic film layer may include a touch interlayer insulating layer.
  • the first flat layer may be omitted, and the first organic film layer may include a second flat layer.
  • a third flat layer may be further provided on the side of the second flat layer away from the substrate, and the first organic film layer may include: a third flat layer, a second flat layer, and a first flat layer.
  • the first edge region B161 may be provided with a first hollow structure 651.
  • the edge shape of the first hollow structure 651 may be substantially the same as the shape of the first edge region B161.
  • the second inorganic film layer (including the touch buffer layer 501 and the touch interlayer insulating layer 502) in the first edge region B161 may be removed to form a first hollow structure 651 that exposes a portion of the surface of the second flat layer 107 away from the substrate 10, and the touch protection layer 503 of the first edge region B161 may be in direct contact with the surface of the second flat layer 107 away from the substrate 10 through the first hollow structure 651, thereby improving the adhesion effect of the display structure layer and the touch structure layer.
  • the second inorganic film layer in the first edge region B161 may be completely removed.
  • a first hollow structure 652 may be provided in the middle region B162.
  • the edge shape of the first hollow structure 652 may be substantially the same as the shape of the middle region B162.
  • the second inorganic film layer (including the touch buffer layer 501 and the touch interlayer insulating layer 502) in the first hollow structure 652 may be removed to form a first hollow structure 652 that exposes a portion of the surface of the second flat layer 107 away from the substrate 10, and the touch protection layer 503 in the middle region B162 may be in direct contact with the surface of the second flat layer 107 away from the substrate 10 through the first hollow structure 652, thereby improving the adhesion effect of the display structure layer and the touch structure layer.
  • the second inorganic film layer in the middle region B162 may be completely removed.
  • a first hollow structure in which the second inorganic film layer (including the touch buffer layer 501 and the touch interlayer insulating layer 502) is removed can be formed in the second edge area B163, so that the touch protection layer 503 in the second edge area B163 can directly contact the surface of the second flat layer 107 away from the substrate 10 through the first hollow structure.
  • the second flat layer in the first signal access area B14 and the second signal access area B15 can be removed to ensure the connection between the contact pad and the corresponding circuit or signal line.
  • the first flat layer and the second flat layer in the bending area B12 can be removed to improve the bending performance by thinning the film layer thickness of the bending area B12.
  • the second inorganic film layer in the first edge area, the middle area and the second edge area of the wiring setting area is removed to form a first hollow structure exposing the first organic film layer, thereby achieving a large-area overlap between the touch protection layer and the second flat layer, thereby improving the adhesion effect of the display structure layer and the touch structure layer.
  • the second inorganic film layer in at least two areas of the first edge area, the middle area and the second edge area can be removed to increase the adhesion between the second organic film layer and the first organic film layer.
  • the second inorganic film layer in one area of the first edge area, the middle area and the second edge area can be removed to increase the adhesion between the second organic film layer and the first organic film layer.
  • Fig. 8 is another partial schematic diagram of the first border region of at least one embodiment of the present disclosure.
  • Fig. 9 is a partial enlarged schematic diagram of region C2 in Fig. 8.
  • Fig. 10A is a partial cross-sectional schematic diagram along the Q3-Q3' direction in Fig. 9.
  • Fig. 10B is another partial cross-sectional schematic diagram along the Q3-Q3' direction in Fig. 9.
  • the first power supply line 62 b may include: The third voltage line 62b-1 and the fourth voltage line 62b-2.
  • the fourth voltage line 62b-2 can be located on the side of the third voltage line 62b-1 away from the substrate 10.
  • the orthographic projection of the fourth voltage line 62b-2 on the substrate can at least partially overlap with the orthographic projection of the third voltage line 62b-1 on the substrate, for example, the orthographic projection of the fourth voltage line 62b-2 on the substrate can cover the orthographic projection of the third voltage line 62b-1 on the substrate.
  • the third voltage line 62b-1 can be located in the first source-drain metal layer
  • the fourth voltage line 62b-2 can be located in the second source-drain metal layer.
  • the fourth voltage line 62b-2 can be connected to the third voltage line 62b-1 through a via or a groove opened in the first flat layer 106 and the passivation layer 105. This example can help reduce the impedance of the first power supply line by setting the first power supply line to adopt a double-layer routing design.
  • the first edge area, the second edge area, and the middle area of the routing setting area B13 may be provided with a plurality of first hollow structures, and the plurality of first hollow structures of this example may include a plurality of inorganic holes (for example, a plurality of first inorganic holes V1).
  • the plurality of first inorganic holes V1 in the first edge area, the second edge area, and the middle area may be arranged regularly, or may be arranged in an array in part and irregularly in part.
  • the orthographic projection of the plurality of first inorganic holes V1 on the substrate may overlap with the orthographic projection of the second power supply line 61 on the substrate.
  • the orthographic projection of the first inorganic hole V1 on the substrate may be a rounded rectangle, a circle, or an ellipse. However, this embodiment is not limited to this.
  • the second inorganic film layer (including the touch interlayer insulating layer 502 and the touch buffer layer 501) in the plurality of first inorganic holes V1 can be removed to expose a portion of the surface of the second flat layer 107 away from the substrate 10.
  • the touch protection layer 503 can directly contact the surface of the second flat layer 107 away from the substrate 10 through the plurality of first inorganic holes V1, thereby increasing adhesion by overlapping with the surface of the second flat layer 107.
  • a plurality of inorganic holes may be provided in the second routing area where the touch transmission line 251 and the first power supply line 62b are provided.
  • the plurality of second inorganic holes V2 may be located between two adjacent touch transmission lines 251, or may be located on one side of the plurality of touch transmission lines 251.
  • the orthographic projection of the plurality of second inorganic holes V2 on the substrate may not overlap with the orthographic projection of the touch transmission line 251 on the substrate, but may overlap with the orthographic projection of the first power supply line 62b on the substrate.
  • the second inorganic film layer (including the touch interlayer insulating layer 502 and the touch buffer layer 501) in the plurality of second inorganic holes V2 may be removed to expose a portion of the surface of the second flat layer 107 away from the substrate 10, and the touch protection layer 503 may directly contact the surface of the second flat layer 107 away from the substrate 10 through the plurality of second inorganic holes V2, thereby increasing the adhesion between the touch protection layer 503 and the second flat layer 107.
  • the structure of the first routing area may refer to the description of the structure of the second routing area, so it will not be described in detail here.
  • the first organic film layer (including the second flat layer 107 and the first flat layer 106) in the first edge region, the second edge region, and the middle region of the wiring setting region B13 may be provided with a plurality of recessed portions (for example, including a plurality of first recessed portions 653).
  • the plurality of first recessed portions 653 and the plurality of first inorganic holes V1 may correspond one to one, and each first recessed portion 653 may be connected to the corresponding first inorganic hole V1.
  • the minimum distance between the surface of the first recessed portion 653 away from the substrate 10 and the substrate 10 may be less than the minimum distance between the surface of the first organic film layer other than the first recessed portion 653 away from the substrate 10 and the substrate 10.
  • the orthographic projection of the first recessed portion 653 on the substrate 10 may cover the orthographic projection of the corresponding first inorganic hole V1 on the substrate 10.
  • the orthographic projection of the second inorganic film layer on the substrate 10 may partially overlap with the orthographic projection of the first recessed portion 653 on the substrate.
  • a portion of the second flat layer 107 may be overetched, thereby forming a first inorganic hole V1 in the second inorganic film layer, and simultaneously forming a first recessed portion 653 connected to the first inorganic hole in the first organic film layer.
  • the second organic film layer (including the touch protection layer 503) may fill the first recessed portion 653 and the first inorganic hole V1 to form a Dingmao structure, thereby further increasing the bonding force between the second organic film layer and the first organic film layer.
  • FIG. 11 is another partial schematic diagram of the first border area of at least one embodiment of the present disclosure.
  • FIG. 12 is another partial schematic diagram of the first border area of FIG. Fig. 13A is a schematic partial cross-sectional view along the Q4-Q4' direction in Fig. 12.
  • Fig. 13B is another schematic partial cross-sectional view along the Q4-Q4' direction in Fig. 12.
  • the wiring setting area B13 may be provided with a plurality of first hollow structures, and the plurality of first hollow structures of this example may include a plurality of inorganic grooves (for example, a plurality of first inorganic grooves K1, a plurality of second inorganic grooves K2, a plurality of third inorganic grooves K3, and a plurality of fourth inorganic grooves K4).
  • the plurality of first inorganic grooves K1, the plurality of second inorganic grooves K2, and the plurality of fourth inorganic grooves K4 may be located in the first edge area and the second edge area, and the plurality of third inorganic grooves K3 may be located in the middle area.
  • the plurality of first inorganic grooves K1 may extend along the edge of the first power supply line, for example, the plurality of first inorganic grooves K1 in the second edge area may extend along the edge of the right edge of the first power supply line 62b close to the display panel, and the plurality of second inorganic grooves K2 may extend along the second direction Y, and be regularly arranged in the first edge area and the second edge area along the first direction X.
  • the plurality of fourth inorganic grooves K4 may extend along the cutting edge on one side of the wiring setting area.
  • the fourth inorganic groove K4 in the first edge area may extend along the cutting edge B32 on the left side of the wiring setting area B13 of the display panel
  • the fourth inorganic groove K4 in the second edge area may extend along the cutting edge B31 on the right side of the wiring setting area B14 of the display panel.
  • the plurality of second inorganic grooves K2 may be surrounded by the plurality of first inorganic grooves K1 and the plurality of fourth inorganic grooves K4.
  • the plurality of third inorganic grooves K3 in the middle area may extend along the edge of the first power supply line close to the second power supply line 61.
  • the plurality of third inorganic grooves K3 in the middle area shown in FIG. 12 may extend along the edge of the first power supply line 62a close to the second power supply line 61.
  • this embodiment is not limited to this.
  • the orthographic projections of the first inorganic groove K1, the third inorganic groove K3, and the fourth inorganic groove K4 on the substrate may be approximately in the shape of a broken line extending along the second direction Y, and the orthographic projection of the second inorganic groove K2 on the substrate may be approximately in the shape of a straight line extending along the second direction Y.
  • this embodiment is not limited to this.
  • the second inorganic groove may extend along the first direction; or, the second inorganic groove may extend along a third direction intersecting both the first direction and the second direction.
  • the second inorganic film layer (including the touch interlayer insulating layer 502 and the touch buffer layer 501) in the plurality of first inorganic grooves K1 can be removed to expose part of the surface of the second flat layer 107, and the touch protection layer 503 can directly contact the surface of the second flat layer 107 away from the substrate 10 through the plurality of first inorganic grooves K1, thereby increasing the adhesion between the touch protection layer 503 and the second flat layer 107.
  • the structures of the second inorganic groove K2, the third inorganic groove K3, and the fourth inorganic groove K4 are similar to those of the first inorganic groove K1, so they are not described here.
  • the cracks can be isolated from extending from the edge of the display panel to the middle.
  • the first organic film layer (including the second flat layer 107 and the first flat layer 106) of the first edge region, the second edge region, and the middle region of the wiring setting region B13 may be provided with a plurality of recessed portions (for example, including a plurality of second recessed portions 654).
  • the plurality of second recessed portions 654 may correspond to a plurality of inorganic grooves (including a plurality of first inorganic grooves K1, a plurality of second inorganic grooves K2, a plurality of third inorganic grooves K3, and a plurality of fourth inorganic grooves K4).
  • Each second recessed portion 654 may be connected to a corresponding inorganic groove.
  • the minimum distance between the surface of the second recessed portion 654 away from the substrate 10 and the substrate 10 may be less than the minimum distance between the surface of the first organic film layer other than the second recessed portion 654 away from the substrate 10 and the substrate 10.
  • the orthographic projection of the second recessed portion 654 on the substrate 10 may cover the orthographic projection of the corresponding inorganic groove (for example, the first inorganic groove K1 or the second inorganic groove K2 or the third inorganic groove K3 or the fourth inorganic groove K4) on the substrate 10.
  • the orthographic projection of the second inorganic film layer on the substrate 10 and the orthographic projection of the second recessed portion 654 on the substrate may partially overlap.
  • a portion of the second flat layer 107 (or the second flat layer 107 and a portion of the first flat layer 106) can be overetched, thereby forming a plurality of inorganic grooves in the second inorganic film layer, and at the same time forming a second recessed portion 654 connected to the inorganic grooves in the first organic film layer.
  • the second organic film layer (including the touch protection layer 503) can fill the second recessed portion 654 and the inorganic grooves to form a Dingmao structure, thereby further increasing the bonding force between the second organic film layer and the first organic film layer.
  • the middle area may further include at least one of the following: a plurality of fifth inorganic grooves extending along the first direction, a plurality of sixth inorganic grooves extending along the second direction, and a plurality of seventh inorganic grooves extending along a third direction intersecting the first direction and the second direction.
  • the structures of the fifth inorganic groove, the sixth inorganic groove, and the seventh inorganic groove may refer to the structure of the first inorganic groove, so they are not described in detail here.
  • the middle area of the wiring setting area can be provided with an inorganic groove as shown in Figure 13A, and the first edge area and the second edge area can be provided with an inorganic groove and a recessed portion as shown in Figure 13B.
  • the middle area of the wiring setting area can be provided with a plurality of inorganic holes as shown in Figure 10A, and the first edge area and the second edge area can be provided with an inorganic groove and a recessed portion as shown in Figure 13.
  • the second inorganic film layer in the middle area of the wiring setting area can be removed, and the first edge area and the second edge area can be provided with a plurality of inorganic holes and a plurality of recessed portions, or a plurality of inorganic grooves and a plurality of recessed portions can be provided.
  • this embodiment is not limited to this.
  • Fig. 14 is another partial schematic diagram of the first border region of at least one embodiment of the present disclosure.
  • Fig. 15 is a partial enlarged schematic diagram of region C4 in Fig. 14.
  • Fig. 16 is a partial cross-sectional schematic diagram along the Q5-Q5' direction in Fig. 15.
  • a plurality of second hollow structures may be provided in the routing setting area B13.
  • the plurality of second hollow structures of this example may include a plurality of organic grooves (for example, a plurality of first organic grooves K11, a plurality of second organic grooves K12, a plurality of third organic grooves K13, and a plurality of fourth organic grooves K14).
  • the plurality of first organic grooves K11 and the plurality of second organic grooves K12 may be located in the first edge area and the second edge area
  • the plurality of third organic grooves K13 and the plurality of fourth organic grooves K14 may be located in the middle area.
  • the plurality of first organic grooves K11 may extend along the edge of the first power supply line, for example, the plurality of first organic grooves K11 in the second edge area may extend along the edge of the first power supply line 62b close to the right edge of the display panel, and the plurality of second organic grooves K12 may extend along the second direction Y, and be regularly arranged in the first edge area and the second edge area along the first direction X.
  • the plurality of third organic grooves K13 in the middle region may extend along the edge of the first power supply line, for example, the plurality of third organic grooves K13 in the middle region may extend along the edge of the first power supply line 62a close to the second power supply line 61, and the plurality of fourth organic grooves K14 may extend along the second direction Y.
  • the orthographic projection of the plurality of organic grooves in the middle region on the substrate may not overlap with the orthographic projection of the second power supply line 61 on the substrate.
  • the orthographic projections of the first organic groove K11 and the third organic groove K13 on the substrate may be approximately in the shape of a broken line extending along the second direction Y
  • the orthographic projections of the second organic groove K12 and the fourth organic groove K14 on the substrate may be approximately in the shape of a straight line extending along the second direction Y.
  • this embodiment is not limited to this.
  • the second organic groove may extend along the first direction; or, the fourth organic groove may extend along the first direction; or, the second organic groove and the fourth organic groove may extend along the first direction; or, at least one of the second organic groove and the fourth organic groove may extend along a third direction intersecting both the first direction and the second direction.
  • the first organic film layer (including the second flat layer 107 and the first flat layer 106) in the plurality of organic grooves can be removed to expose a portion of the surface of the first inorganic film layer, for example, exposing a portion of the surface of the passivation layer 105 away from the substrate 10.
  • the second inorganic film layer (including the touch buffer layer 501 and the touch interlayer insulating layer 502) can be in direct contact with the surface of the first inorganic film layer away from the substrate through the organic groove, thereby increasing the adhesion between the second inorganic film layer and the first inorganic film layer.
  • the touch buffer layer 501 can be in direct contact with the portion of the surface of the passivation layer 105 away from the substrate 10 through the organic groove, and the touch interlayer insulating layer 502 can be filled in a plurality of organic grooves.
  • this embodiment is not limited to this.
  • the organic groove can expose a portion of the surface of the passivation layer 105 and the interlayer insulating layer 104, so that the second inorganic film layer can be in direct contact with the passivation layer 105 and the interlayer insulating layer 104.
  • the organic grooves in the first edge region and the second edge region may further include: a plurality of fifth organic grooves extending along the cutting edge of the wiring setting area of the display panel.
  • the arrangement of the organic grooves can refer to the arrangement of the inorganic grooves in the aforementioned embodiment, so it is not repeated here.
  • FIG17 is another partial schematic diagram of the first border area of at least one embodiment of the present disclosure.
  • a plurality of second hollow structures may be provided in the first edge area, the second edge area, and the middle area of the wiring setting area B13.
  • the plurality of second hollow structures of this example may include a plurality of organic holes (for example, a plurality of first organic holes V11).
  • the plurality of first organic holes V11 in the first edge area, the second edge area, and the middle area may be arranged regularly, or may be arranged in an array in part and irregularly in part.
  • the orthographic projection of the plurality of first organic holes V11 on the substrate may not overlap with the orthographic projection of the second power supply line 61 on the substrate.
  • the orthographic projection of the first organic hole V11 on the substrate may be a rounded rectangle, a circle, or an ellipse. However, this embodiment is not limited to this.
  • the first organic film layer (including the second flat layer 107 and the first flat layer 106) in the plurality of first organic holes V11 can be removed to expose a portion of the surface of the passivation layer away from the substrate, and the second inorganic film layer can directly contact the surface of the first inorganic film layer away from the substrate through the plurality of first organic holes V11, thereby increasing the adhesion between the second inorganic film layer and the first inorganic film layer.
  • the cross-sectional structure of the organic hole can refer to the cross-sectional structure of the organic groove shown in FIG. 16, so it is not repeated here.
  • a plurality of organic holes may be provided in the middle area of the wiring setting area, and a plurality of organic grooves may be provided in the first edge area and the second edge area.
  • a plurality of organic grooves may be provided in the middle area of the wiring setting area, and a plurality of organic holes may be provided in the first edge area and the second edge area.
  • a plurality of inorganic grooves or a plurality of inorganic holes may be provided in the middle area of the wiring setting area, and a plurality of organic holes or a plurality of organic grooves may be provided in the first edge area and the second edge area.
  • a plurality of organic holes or a plurality of organic grooves may be provided in the middle area of the wiring setting area, and a plurality of inorganic holes or a plurality of inorganic grooves may be provided in the first edge area and the second edge area.
  • Fig. 18 is another partial schematic diagram of the first border region of at least one embodiment of the present disclosure.
  • Fig. 19 is a partial enlarged schematic diagram of region C5 in Fig. 18.
  • Fig. 20 is a partial cross-sectional schematic diagram along the Q6-Q6' direction in Fig. 19.
  • the wiring setting area B13 may be provided with a plurality of second hollow structures and a plurality of isolation columns (for example, including a plurality of first isolation columns 661, a plurality of second isolation columns 662, a plurality of third isolation columns 663, and a plurality of fourth isolation columns 664).
  • the plurality of second hollow structures of this example may include a plurality of organic grooves, for example, the organic grooves shown in FIG. 14 .
  • multiple isolation columns may be located in multiple organic grooves.
  • one isolation column may be provided in each organic groove.
  • the first isolation column 661 may be located in the first organic groove
  • the second isolation column 662 may be located in the second organic groove
  • the third isolation column 663 may be located in the third organic groove
  • the fourth isolation column 664 may be located in the fourth organic groove.
  • the positive projections of the first isolation column 661 and the third isolation column 663 on the substrate may be roughly in the shape of a broken line
  • the positive projections of the second isolation column 662 and the fourth isolation column 664 on the substrate may be roughly in the shape of a strip extending along the second direction Y.
  • this embodiment is not limited to this.
  • a plurality of isolation columns arranged along the extension direction of the organic groove may be provided in at least one organic groove; or, a plurality of isolation columns arranged in a direction intersecting the extension direction of the organic groove may be provided in at least one organic groove.
  • the first isolation column 661 is used as an example for explanation.
  • the first isolation column 661 can be located in the second source-drain metal layer, and can be in the same layer structure as the first power supply line 62b-2.
  • the second source-drain metal layer can adopt a three-layer metal stacking structure.
  • the first isolation column 661 may include a first metal layer 6611, a second metal layer 6612, and a third metal layer 6613 arranged in sequence in a direction away from the substrate 10, and the second metal layer 6612 is located between the first metal layer 6611 and the third metal layer 6613, and is in direct contact with the first metal layer 6611 and the third metal layer 6613.
  • the material of the first metal layer 6611 and the third metal layer 6613 can be the same, such as titanium (Ti), and the material of the second metal layer 6612 can be aluminum (Al).
  • the cross-sectional shape of the first isolation column 661 may be substantially T-shaped.
  • the cross section of the isolation column 661 refers to a plane perpendicular to the plane where the substrate is located and perpendicular to the extension direction of the first isolation column 661.
  • the orthographic projection of the third metal layer 6613 of the first isolation column 661 on the substrate can cover the orthographic projections of the second metal layer 6612 and the first metal layer 6611 on the substrate.
  • the edge of the third metal layer 6613 can protrude from the edges of the second metal layer 6612 and the first metal layer 6611.
  • the second inorganic film layer (including the touch buffer layer 501 and the touch interlayer insulating layer 502) can cover the edge portion of the third metal layer 6613 protruding from the second metal layer 6612, the edges of the second metal layer 6612 and the first metal layer 6611, and the second inorganic film layer can also contact the surface of the passivation layer 105 of the first inorganic film layer away from the substrate.
  • This example can form a Dingmao structure between the second inorganic film layer and the isolation column and the first inorganic film layer, which can increase the adhesion between the first inorganic film layer and the second inorganic film layer.
  • the structures of the second to fourth isolation columns may refer to the structure of the first isolation column, and thus will not be described in detail herein.
  • the cross-sectional shape of the isolation column may be roughly rectangular or trapezoidal, for example, the orthographic projection of the first metal layer on the substrate may cover the orthographic projection of the second metal layer on the substrate, and the orthographic projection of the second metal layer on the substrate may cover the orthographic projection of the third metal layer on the substrate.
  • the cross-sectional shape of the isolation column may be roughly an inverted trapezoid, for example, the orthographic projection of the third metal layer on the substrate may cover the orthographic projection of the second metal layer on the substrate, and the orthographic projection of the second metal layer on the substrate may cover the orthographic projection of the first metal layer on the substrate.
  • a plurality of inorganic grooves or a plurality of inorganic holes may be provided in the middle area of the wiring setting area, and a plurality of inorganic grooves and a plurality of isolation columns may be provided in the first edge area and the second edge area.
  • the second inorganic film layer in the middle area of the wiring setting area may be removed, and a plurality of inorganic grooves and a plurality of isolation columns may be provided in the first edge area and the second edge area.
  • this embodiment is not limited to this.
  • FIG21 is another schematic diagram of a display panel of at least one embodiment of the present disclosure.
  • the first frame area B1 of the display panel may include: a fan-out wiring area B11, a wiring setting area B13, a second signal access area B15, and a first signal access area B14, which are arranged in a direction away from the display area AA.
  • the fan-out wiring area B11 of this example is connected to the wiring setting area B13.
  • the touch lead-out line 252 located in the fan-out wiring area B11 can be connected to the touch transmission line 251 in the wiring setting area B13, and the touch transmission line 251 can be connected to the touch contact pad 254 in the first signal access area B14.
  • the structure of the wiring setting area of this example can refer to the description of the structure of the wiring setting area in the aforementioned embodiment, so it will not be repeated here.
  • the present embodiment also provides a display panel, comprising: a substrate.
  • the substrate comprises a display area and a first frame area located on one side of the display area.
  • the first frame area comprises at least: a first inorganic film layer, a first organic film layer, a second inorganic film layer, a second organic film layer and a plurality of touch transmission lines arranged on the substrate; the first organic film layer is located on a side of the first inorganic film layer away from the substrate, the second inorganic film layer is located on a side of the first organic film layer away from the substrate, and the second organic film layer is located on a side of the second inorganic film layer away from the substrate.
  • the second inorganic film layer comprises a plurality of first hollow structures, the second organic film layer contacts the first organic film layer through the plurality of first hollow structures, and the distance between the first hollow structure and the touch transmission line on the orthographic projection of the substrate is greater than 0; in other words, the first hollow structure and the orthographic projection of the touch transmission line on the substrate do not overlap.
  • the first organic film layer includes multiple second hollow structures, the second inorganic film layer contacts the first inorganic film layer through the multiple second hollow structures, and the distance between the second hollow structure and the orthographic projection of the touch transmission line on the substrate is greater than 0; in other words, the second hollow structure and the orthographic projection of the touch transmission line on the substrate do not overlap.
  • the display panel provided in this embodiment, by setting a first hollow structure in the second inorganic film layer, or setting a second hollow structure in the first organic film layer, makes the second organic film layer contact with the first organic film layer, or the second inorganic film layer contacts with the first inorganic film layer structure, thereby enhancing the adhesion effect between the film layers in the first frame area, enhancing the strength of the first frame area, and preventing the occurrence of film peeling caused by impact.
  • the plurality of first hollow structures may include at least one of the following: a plurality of inorganic holes, a plurality of inorganic grooves.
  • the plurality of second hollow structures may include at least one of the following: a plurality of organic holes, a plurality of organic grooves.
  • FIG22 is a schematic diagram of a display device of at least one embodiment of the present disclosure.
  • the present embodiment provides a display device 91, including a display panel 910 of the aforementioned embodiment.
  • the display panel 910 may be an OLED display panel, such as an OLED display panel with an integrated touch structure.
  • the display device 91 may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator, or may be a product or component with touch and display functions.

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Abstract

一种显示面板，包括：衬底、依次设置在衬底上的显示结构层和触控结构层。衬底包括显示区域和位于显示区域一侧的第一边框区域。显示结构层至少包括第一有机膜层和第一无机膜层，第一有机膜层位于第一无机膜层远离衬底的一侧。触控结构层至少包括第二有机膜层和第二无机膜层，第二有机膜层位于第二无机膜层远离显示结构层的一侧。在第一边框区域，第二有机膜层的一部分与第一有机膜层接触，或者，第二无机膜层的一部分与第一无机膜层接触。

Description

显示面板及显示装置
本申请要求于2023年11月28日提交中国专利局、申请号为202311605099.3、发明名称为“显示面板及显示装置”的中国专利申请的优先权，其内容应理解为通过引用的方式并入本申请中。
技术领域
本文涉及但不限于显示技术领域，尤指一种显示面板及显示装置。
背景技术
有机发光二极管(OLED，Organic Light Emitting Diode)为主动发光显示器件，具有自发光、广视角、高对比度、低耗电、极高反应速度等优点。随着显示技术的不断发展，以OLED为发光器件、由薄膜晶体管(TFT，Thin Film Transistor)进行信号控制的显示装置已成为目前显示领域的主流产品。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本实施例提供一种显示面板及显示装置。
一方面，本实施例提供一种显示面板，包括：衬底、显示结构层和触控结构层。衬底包括显示区域和位于所述显示区域一侧的第一边框区域。显示结构层位于所述衬底上，至少包括第一有机膜层和第一无机膜层，所述第一有机膜层位于所述第一无机膜层远离所述衬底的一侧。触控结构层位于所述显示结构层远离所述衬底的一侧，至少包括第二有机膜层和第二无机膜层，所述第二有机膜层位于所述第二无机膜层远离所述显示结构层的一侧。在所述第一边框区域，所述第二有机膜层的一部分与所述第一有机膜层接触，或者，所述第二无机膜层的一部分与所述第一无机膜层接触。
在一些示例性实施方式中，所述第一边框区域包括：第一信号接入区域以及位于所述第一信号接入区域靠近所述显示区域一侧的走线设置区域。所述走线设置区域至少包括多条触控传输线，所述第一信号接入区域至少包括多个触控接触垫，所述多条触控传输线中的至少一条触控传输线与至少一个触控接触垫连接。所述第二无机膜层在所述走线设置区域包括：多个第一镂空结构，所述第二有机膜层通过所述多个第一镂空结构与所述第一有机膜层接触。所述多个第一镂空结构中的至少一个第一镂空结构位于所述多条触控传输线中的至少一条触控传输线的至少一侧。
在一些示例性实施方式中，所述多个第一镂空结构包括以下至少之一：多个无机孔、多个无机槽。
在一些示例性实施方式中，所述第一有机膜层在所述走线设置区域包括：多个凹陷部，所述多个凹陷部与所述多个第一镂空结构一一对应连通，所述凹陷部在所述衬底的正投影覆盖对应的第一镂空结构在所述衬底的正投影，所述第二无机膜层在所述衬底的正投影与所述凹陷部在所述衬底的正投影部分交叠。
在一些示例性实施方式中，所述走线设置区域还包括：至少一条第一电源供电线，所 述第一电源供电线位于所述多条触控传输线靠近所述衬底的一侧，所述第一电源供电线在所述衬底的正投影与所述多条触控传输线在所述衬底的正投影部分交叠。所述多个无机槽中的至少一个无机槽沿着所述第一电源供电线的边缘延伸。
在一些示例性实施方式中，所述显示面板还包括：位于所述第一电源供电线一侧的切割边缘，所述多个无机槽中的至少一个无机槽沿着所述切割边缘延伸。
在一些示例性实施方式中，所述走线设置区域包括：沿着第一方向依次设置的第一边缘区、第一走线区域、中间区域、第二走线区域以及第二边缘区；所述多条触控传输线位于所述第一走线区域和所述第二走线区域；所述走线设置区域沿第二方向位于所述显示区域的一侧，所述第一方向与所述第二方向交叉。所述多个第一镂空结构位于所述第一边缘区、所述中间区域和所述第二边缘区中的至少之一。
在一些示例性实施方式中，所述第一边框区域包括：第一信号接入区域以及位于所述第一信号接入区域靠近所述显示区域一侧的走线设置区域。所述走线设置区域至少包括多条触控传输线，所述第一信号接入区域至少包括多个触控接触垫，所述多条触控传输线中的至少一条触控传输线与至少一个触控接触垫连接。所述第一有机膜层在所述走线设置区域包括：多个第二镂空结构，所述第二无机膜层通过所述多个第二镂空结构与所述第一无机膜层接触。所述多个第二镂空结构位于所述多条触控传输线的至少一侧。
在一些示例性实施方式中，所述多个第二镂空结构包括以下至少之一：多个有机孔、多个有机槽。
在一些示例性实施方式中，所述显示面板还包括：位于所述走线设置区域的多个隔离柱，所述第二镂空结构在所述衬底的正投影覆盖至少一个隔离柱在所述衬底的正投影；所述隔离柱位于所述第二无机膜层和所述第一无机膜层之间。
在一些示例性实施方式中，所述显示结构层至少包括：依次设置在所述衬底上的第一源漏金属层和第二源漏金属层，所述隔离柱位于所述第二源漏金属层。
在一些示例性实施方式中，所述隔离柱包括：沿着远离所述衬底的方向依次设置的第一金属层、第二金属层和第三金属层，所述第三金属层在所述衬底的正投影覆盖所述第二金属层和所述第一金属层在所述衬底的正投影，所述第三金属层的边缘凸出于所述第二金属层和所述第一金属层的边缘。
在一些示例性实施方式中，所述走线设置区域还包括：至少一条第一电源供电线，所述第一电源供电线位于所述多条触控传输线靠近所述衬底的一侧，所述第一电源供电线在所述衬底的正投影与所述多条触控传输线在所述衬底的正投影部分交叠；所述多个隔离柱中的至少一个隔离柱沿着所述第一电源供电线的边缘延伸。
在一些示例性实施方式中，所述第一边框区域还包括：弯折区域，所述走线设置区域与所述弯折区域连通，且位于所述弯折区域远离所述显示区域的一侧。
在一些示例性实施方式中，所述显示结构层至少包括：设置在所述衬底上的第一源漏金属层、钝化层、第一平坦层、第二源漏金属层和第二平坦层。所述第一无机膜层至少包括：所述钝化层；所述第一有机膜层至少包括：所述第二平坦层和所述第一平坦层。
在一些示例性实施方式中，所述触控结构层至少包括：依次设置的触控缓冲层、第一触控导电层、触控层间绝缘层、第二触控导电层和触控保护层。所述第二无机膜层包括：所述触控缓冲层和所述触控层间绝缘层；所述第二有机膜层包括：所述触控保护层。
另一方面，本实施例提供一种显示装置，包括如上所述的显示面板。
另一方面，本实施例提供一种显示面板，包括：衬底。衬底包括显示区域和位于所述 显示区域一侧的第一边框区域。所述第一边框区域至少包括：设置在所述衬底上的第一无机膜层、第一有机膜层、第二无机膜层、第二有机膜层以及多条触控传输线；所述第一有机膜层位于所述第一无机膜层远离所述衬底的一侧，所述第二无机膜层位于所述第一有机膜层远离所述衬底的一侧，所述第二有机膜层位于所述第二无机膜层远离所述衬底的一侧。所述第二无机膜层包括多个第一镂空结构，所述第二有机膜层通过所述多个第一镂空结构与所述第一有机膜层接触，所述第一镂空结构与所述触控传输线在所述衬底的正投影之间的距离大于0；或者，所述第一有机膜层包括多个第二镂空结构，所述第二无机膜层通过所述多个第二镂空结构与所述第一无机膜层接触，所述第二镂空结构与所述触控传输线在所述衬底的正投影之间的距离大于0。
在一些示例性实施方式中，所述多个第一镂空结构包括以下至少之一：多个无机孔、多个无机槽。
在一些示例性实施方式中，所述多个第二镂空结构包括以下至少之一：多个有机孔、多个有机槽。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
附图用来提供对本申请技术方案的理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本申请的技术方案，并不构成对本申请技术方案的限制。
图1为本公开至少一实施例的显示面板的示意图；
图2为本公开至少一实施例的显示面板的显示区域的局部剖面示意图；
图3为本公开至少一实施例的触控结构层的局部平面示意图；
图4为本公开至少一实施例的第一边框区域的局部示意图；
图5为图4中区域C1的局部放大示意图；
图6为图5中沿Q1-Q1’方向的局部剖面示意图；
图7为图5中沿Q2-Q2’方向的局部剖面示意图；
图8为本公开至少一实施例的第一边框区域的另一局部示意图；
图9为图8中区域C2的局部放大示意图；
图10A为图9中沿Q3-Q3’方向的一种局部剖面示意图；
图10B为图9中沿Q3-Q3’方向的另一种局部剖面示意图；
图11为本公开至少一实施例的第一边框区域的另一局部示意图；
图12为图11中区域C3的局部放大示意图；
图13A为图12中沿Q4-Q4’方向的一种局部剖面示意图；
图13B为图12中沿Q4-Q4’方向的另一种局部剖面示意图；
图14为本公开至少一实施例的第一边框区域的另一局部示意图；
图15为图14中区域C4的局部放大示意图；
图16为图15中沿Q5-Q5’方向的局部剖面示意图；
图17为本公开至少一实施例的第一边框区域的另一局部示意图；
图18为本公开至少一实施例的第一边框区域的另一局部示意图；
图19为图18中区域C5的局部放大示意图；
图20为图19中沿Q6-Q6’方向的局部剖面示意图；
图21为本公开至少一实施例的显示面板的另一示意图；
图22为本公开至少一实施例的显示装置的示意图。
详述
下面将结合附图对本公开的实施例进行详细说明。实施方式可以以多个不同形式来实施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为其他形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
在附图中，有时为了明确起见，夸大表示了一个或多个构成要素的大小、层的厚度或区域。因此，本公开的一个方式并不一定限定于该尺寸，附图中一个或多个部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的一个方式不局限于附图所示的形状或数值等。
本说明书中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。本公开中的“多个”表示两个及以上的数量。
在本说明书中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。构成要素的位置关系根据描述的构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。
在本说明书中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以根据情况理解上述术语在本公开中的含义。
在本说明书中，“电连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的传输，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有各种功能的元件等。
在本说明书中，晶体管是指至少包括栅极、漏极以及源极这三个端子的元件。晶体管在漏极(漏电极端子、漏区域或漏电极)与源极(源电极端子、源区域或源电极)之间具有沟道区域，并且电流能够流过漏极、沟道区域以及源极。在本说明书中，沟道区域是指电流主要流过的区域。
在本说明书中，第一极可以为漏极、第二极可以为源极，或者第一极可以为源极、第二极可以为漏极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源极”及“漏极”的功能有时互相调换。因此，在本说明书中，“源极”和“漏极”可以互相调换。另外，栅极还可以称为控制极。
在本说明书中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，也包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，也包括85°以上且95°以下的角度的状态。
在本说明书中，圆形、椭圆形、三角形、矩形、梯形、五边形或六边形等并非严格意义上的，可以是近似圆形、近似椭圆形、近似三角形、近似矩形、近似梯形、近似五边形或近似六边形等，可以存在公差导致的一些小变形，例如可以存在导角、弧边以及变形等。
本公开中的“约”、“大致”，是指不严格限定界限，允许工艺和测量误差范围内的情况。在本公开中，“大致相同”是指数值相差10％以内的情况。本公开中的“对称”是不严格限定界限，允许工艺和测量误差范围内的大致对称情况。
在本公开中，A沿着B方向延伸是指，A可以包括主体部分和与主体部分连接的次要部分，主体部分是线、线段或条形状体，主体部分沿着B方向伸展，且主体部分沿着B方向伸展的长度大于次要部分沿着其它方向伸展的长度。本公开中所说的“A沿着B方向延伸”均是指“A的主体部分沿着B方向延伸”。本公开中，A和B为一体结构是指A和B相互连接且一体形成。
在一些实现方式中，显示面板可以集成触控结构。显示面板可以包括：液晶显示(LCD)基板，或者可以是有机发光二极管(OLED)显示基板，或者可以是等离子体显示装置(PDP)显示基板，或者可以是电泳显示(EPD)显示基板。例如，显示面板可以包括OLED显示基板和触控结构。触控结构可以设置在显示基板的封装层上，形成触控结构在薄膜封装上(Touch on Thin Film Encapsulation，简称Touch on TFE)的结构。显示结构和触控结构集成在一起，具有轻薄、可折叠等优点，可以满足柔性折叠、窄边框等产品需求，被广泛地应用于手机和电视(TV)等显示领域。
在一些示例中，Touch on TFE结构主要包括柔性多层覆盖表面式(Flexible Multi-Layer On Cell，简称FMLOC)结构和柔性单层覆盖表面式(Flexible Single-Layer On Cell，简称FSLOC)结构。FMLOC结构是基于互容检测的工作原理，一般采用两层金属形成驱动(Tx)电极和感应(Rx)电极，触控集成电路(IC，Integrated Circuit)通过检测驱动电极和感应电极间的互容来实现触控动作。FSLOC结构是基于自容(或电压)检测的工作原理，一般采用单层金属形成触控电极，触控集成电路通过检测触控电极自容(或电压)来实现触控动作。
发明人在研究中注意到，集成显示结构和触控结构的显示面板的膜层之间的粘附性能不强，在信赖性测试过程(比如跌落试验)中，在显示面板的下边框区域容易发生膜层剥落(peeling)的情况，比如下边框区域的触控结构与显示结构之间容易发生剥落情况。
本实施例提供一种显示面板，包括：衬底、显示结构层和触控结构层。衬底包括显示区域和位于显示区域一侧的第一边框区域。显示结构层至少包括第一有机膜层和第一无机膜层，第一有机膜层位于第一无机膜层远离衬底的一侧。触控结构层位于显示结构层远离衬底的一侧，至少包括第二有机膜层和第二无机膜层。第二有机膜层位于第二无机膜层远离显示结构层的一侧。在第一边框区域，第二有机膜层的一部分与第一有机膜层接触，或者，第二无机膜层的一部分与第一无机膜层接触。
本实施例提供的显示面板，通过设置第一边框区域的第二有机膜层与第一有机膜层接触，或者第二无机膜层与第一无机膜层接触，可以提升第一边框区域的显示结构层和触控结构层之间的粘附效果，从而增强第一边框区域的强度，防止撞击导致膜层剥落的发生。
在一些示例性实施方式中，第一边框区域可以包括：第一信号接入区域以及位于第一信号接入区域靠近显示区域一侧的走线设置区域。走线设置区域可以至少包括多条触控传 输线，第一信号接入区域可以至少包括多个触控接触垫，多条触控传输线中的至少一条触控传输线可以与至少一个触控接触垫连接。第二无机膜层在走线设置区域可以包括：多个第一镂空结构，第二有机膜层可以通过多个第一镂空结构与第一有机膜层接触。至少一个第一镂空结构可以位于至少一条触控传输线的至少一侧。例如，多条第一镂空结构可以位于多条触控传输线的一侧或两侧；或者，至少一个第一镂空结构可以位于相邻两条触控传输线之间。在一些示例中，多个第一镂空结构可以包括以下至少之一：多个无机孔、多个无机槽。例如，多个第一镂空结构可以包括多个无机孔，或者，可以包括多个无机槽，或者可以包括多个无机孔和多个无机槽。本示例的第一镂空结构内的第二无机膜层可以被去掉，暴露出第一有机膜层远离衬底一侧的表面，使得第二有机膜层靠近衬底一侧的表面可以与第一有机膜层远离衬底一侧的表面接触。本示例通过设置多个第一镂空结构实现第一边框区域的第二有机膜层与第一有机膜层接触，可以提升第一边框区域的显示结构层和触控结构层之间的粘附效果，从而增强第一边框区域的强度，防止撞击导致膜层剥落的发生。
在一些示例性实施方式中，第一有机膜层在走线设置区域可以包括：多个凹陷部，多个凹陷部与多个第一镂空结构可以一一对应连通。凹陷部在衬底的正投影可以覆盖对应的第一镂空结构在衬底的正投影，第二无机膜层在衬底的正投影与凹陷部在衬底的正投影可以部分交叠。例如，多个凹陷部可以包括：与多个无机孔对应的多个第一凹陷部；或者，多个凹陷部可以包括：与多个无机槽对应的多个第二凹陷部。凹陷部内的第一有机膜层可以被去掉，使得凹陷部远离衬底一侧的表面与衬底之间的最小距离可以小于凹陷部以外区域远离衬底一侧的表面与衬底之间的最小距离。本示例中，第二有机膜层可以填充在第一有机膜层形成的凹陷部和第二无机膜层形成的第一镂空结构内，从而形成丁卯结构，可以进一步增大第二有机膜层与第一有机膜层之间的结合力。
在一些示例性实施方式中，走线设置区域还可以包括：至少一条第一电源供电线。第一电源供电线可以位于多条触控传输线靠近衬底的一侧，第一电源供电线在衬底的正投影与多条触控传输线在衬底的正投影可以部分交叠。多个无机槽中的至少一个无机槽可以沿着第一电源供电线的边缘延伸。本示例通过沿着第一电源供电线的边缘设置无机槽，可以有利于阻隔裂纹的延伸路径，而且，可以通过无机槽增大第二有机膜层与第一有机膜层之间的结合力。
在一些示例性实施方式中，显示面板还可以包括：位于第一电源供电线一侧的切割边缘，多个无机槽中的至少一个无机槽可以沿着切割边缘延伸。本示例通过沿着切割边缘设置无机槽，可以有利于阻隔裂纹向第一边框区域的中间延伸；而且，可以通过无机槽增大第二有机膜层与第一有机膜层之间的结合力。
在一些示例性实施方式中，走线设置区域可以包括：沿着第一方向依次设置的第一边缘区、第一走线区域、中间区域、第二走线区域以及第二边缘区。多条触控传输线可以位于第一走线区域和第二走线区域。走线设置区域可以沿第二方向位于显示区域的一侧。第一方向与第二方向可以交叉，例如，第一方向可以垂直于第二方向。多个第一镂空结构可以位于第一边缘区、中间区域和第二边缘区中的至少之一。例如，多个第一镂空结构可以位于第一边缘区，或者可以位于第二边缘区，或者可以位于中间区域，或者可以位于第一边缘区和第二边缘区，或者可以位于第一边缘区和中间区域，或者可以位于第二边缘区和中间区域，或者可以位于第一边缘区、第二边缘区和中间区域。本示例的第一镂空结构的设置方式可以在保留有第一有机膜层的区域对第二无机膜层进行刻蚀，实现第二有机膜层与第一有机膜层之间的接触，从而增大两者之间的结合力。
在一些示例性实施方式中，第一边框区域可以包括：第一信号接入区域以及位于第一信号接入区域靠近显示区域一侧的走线设置区域。走线设置区域可以至少包括多条触控传 输线，第一信号接入区域可以至少包括多个触控接触垫，多条触控传输线中的至少一条触控传输线与至少一个触控接触垫连接。第一有机膜层在走线设置区域可以包括：多个第二镂空结构，第二无机膜层可以通过多个第二镂空结构与第一无机膜层接触。多个第二镂空结构可以位于多条触控传输线的至少一侧。例如，多个第二镂空结构可以位于多条触控传输线的一侧，或者可以位于多条触控传输线的两侧。在一些示例中，多个第二镂空结构可以包括以下至少之一：多个有机孔、多个有机槽。例如，多个第二镂空结构可以包括多个有机孔，或者可以包括多个有机槽，或者可以包括多个有机孔和多个有机槽。本示例的第二镂空结构内的第一有机膜层可以被去掉，暴露出第一无机膜层远离衬底一侧的表面，使得第二无机膜层靠近衬底一侧的表面可以与第一无机膜层远离衬底一侧的表面接触。本示例通过设置多个第二镂空结构实现第一边框区域的第二无机膜层与第一无机膜层接触，可以提升第一边框区域的显示结构层和触控结构层之间的粘附效果，从而增强第一边框区域的强度，防止撞击导致膜层剥落的发生。
在一些示例性实施方式中，显示面板还可以包括：位于走线设置区域的多个隔离柱，第二镂空结构在衬底的正投影可以覆盖至少一个隔离柱在衬底的正投影。隔离柱位于第二无机膜层和第一无机膜层之间。在一些示例中，隔离柱可以位于第二源漏金属层。本示例通过在第二镂空结构内设置隔离柱，可以进一步增大第二无机膜层与第一无机膜层之间的结合力。
在一些示例性实施方式中，隔离柱可以包括：沿着远离衬底的方向依次设置的第一金属层、第二金属层和第三金属层，第三金属层在衬底的正投影可以覆盖第二金属层和第一金属层在衬底的正投影，第三金属层的边缘可以凸出于第二金属层和第一金属层的边缘。本示例通过隔离柱可以形成第二无机膜层与第一无机膜层之间接触的丁卯结构，从而进一步增加第二无机膜层与第一无机膜层之间的结合力。
下面通过多个示例对本实施例的方案进行举例说明。
图1为本公开至少一实施例的显示面板的示意图。图1所示为显示面板未进行弯折工艺之前的平面示意图。在一些示例中，如图1所示，显示面板可以包括：显示区域AA、以及围绕在显示区域AA外围的边框区域BB。例如，边框区域BB可以包括：位于显示区域AA一侧的第一边框区域B1、以及位于显示区域AA其它侧的边框区域(例如包括第二边框区域B2、第三边框区域B3和第四边框区域B4)。其中，第一边框区域B1例如可以为显示面板的下边框区域，第二边框区域B2例如可以为显示面板的上边框区域，第三边框区域B3例如可以为显示面板的左边框区域，第四边框区域B4例如可以为显示面板的右边框区域。
在一些示例中，如图1所示，显示区域AA可以是平坦的区域，包括组成像素阵列的多个子像素PX，多个子像素PX可以被配置为显示动态图片或静止图像。显示区域AA可以称为有效区域(Active Area)。在一些示例中，显示区域AA可以为矩形。然而，本实施例对此并不限定。例如，显示区域AA可以为圆形或椭圆形等其它形状。在一些示例中，显示面板可以为柔性面板，因而显示面板可以是可变形的，例如卷曲、弯曲、折叠或卷起。
在一些示例中，如图1所示，显示区域AA还可以包括：多条栅线GL以及多条数据线DL。多条栅线GL可以沿第一方向X延伸，多条数据线DL可以沿第二方向Y延伸。多条栅线GL和多条数据线DL在衬底上的正投影可以交叉形成多个子像素区域，每个子像素区域内可以设置一个子像素PX。多条数据线DL与多个子像素PX可以电连接，多条数据线DL可以被配置为向多个子像素PX提供数据信号。多条栅线GL可以与多个子像素PX电连接，多条栅线GL可以被配置为向多个子像素PX提供栅极控制信号。在一 些示例中，栅极控制信号可以包括扫描信号和发光控制信号，或者可以包括扫描信号，或者可以包括扫描信号、复位控制信号和发光控制信号。
在一些示例中，如图1所示，第一方向X可以是显示区域AA中栅线GL的延伸方向(例如，行方向)，第二方向Y可以是显示区域AA中数据线DL的延伸方向(例如，列方向)。第一方向X和第二方向Y可以相互交叉，例如可以相互垂直。
在一些示例中，显示区域AA的一个像素单元可以包括三个子像素，三个子像素分别为红色子像素、绿色子像素和蓝色子像素。然而，本实施例对此并不限定。在一些示例中，一个像素单元可以包括四个子像素，四个子像素分别为红色子像素、绿色子像素、蓝色子像素和白色子像素。或者，一个像素单元可以包括四个子像素，四个子像素可以包括一个红色子像素、一个蓝色子像素以及两个绿色子像素。
在一些示例中，一个子像素可以包括：像素电路以及与像素电路电连接的发光元件。像素电路可以包括多个晶体管和至少一个电容。例如，像素电路可以是3T1C、4T1C、5T1C、5T2C、6T1C、7T1C或8T1C结构。其中，上述电路结构中的T指的是薄膜晶体管，C指的是电容，T前面的数字代表电路中薄膜晶体管的数量，C前面的数字代表电路中电容的数量。
在一些示例中，像素电路中的多个晶体管可以是P型晶体管，或者可以是N型晶体管。像素电路中采用相同类型的晶体管可以简化工艺流程，减少显示基板的工艺难度，提高产品的良率。在另一些示例中，像素电路中的多个晶体管可以包括P型晶体管和N型晶体管。
在一些示例中，像素电路中的多个晶体管可以采用低温多晶硅薄膜晶体管，或者可以采用氧化物薄膜晶体管，或者可以采用低温多晶硅薄膜晶体管和氧化物薄膜晶体管。低温多晶硅薄膜晶体管的有源层采用低温多晶硅(LTPS，Low Temperature Poly-Silicon)，氧化物薄膜晶体管的有源层采用氧化物半导体(Oxide)。低温多晶硅薄膜晶体管具有迁移率高、充电快等优点，氧化物薄膜晶体管具有漏电流低等优点，将低温多晶硅薄膜晶体管和氧化物薄膜晶体管集成在一个显示面板上，即LTPS+Oxide(简称LTPO)显示面板，可以利用两者的优势，可以实现低频驱动，可以降低功耗，可以提高显示品质。
在一些示例中，子像素的发光元件的形状可以是矩形、菱形、五边形或六边形。一个像素单元包括三个子像素时，三个子像素的发光元件可以采用水平并列、竖直并列或品字方式排列；一个像素单元包括四个子像素时，四个子像素的发光元件可以采用水平并列、竖直并列或正方形方式排列。然而，本实施例对此并不限定。
在一些示例中，发光元件可以是发光二极管(LED，Light Emitting Diode)、有机发光二极管(OLED，Organic Light Emitting Diode)、量子点发光二极管(QLED，Quantum Dot Light Emitting Diode)、微LED(包括：mini-LED或micro-LED)等中的任一者。例如，发光元件可以为OLED，发光元件在其对应的像素电路的驱动下可以发出红光、绿光、蓝光、或者白光等。发光元件发光的颜色可根据需要而定。在一些示例中，发光元件可以包括：阳极、阴极以及位于阳极和阴极之间的有机发光层。发光元件的阳极可以与对应的像素电路电连接。然而，本实施例对此并不限定。
图2为本公开至少一实施例的显示面板的显示区域的局部剖面示意图。图2中以显示区域的一个子像素的结构为例进行示意。本示例中，以像素电路中的多个晶体管的类型相同为例进行说明，例如像素电路中的多个晶体管可以均采用低温多晶硅薄膜晶体管或均采用氧化物薄膜晶体管。在另一些示例中，像素电路中的多个晶体管可以采用低温多晶硅薄膜晶体管和氧化物薄膜晶体管。另外，本示例以显示面板集成互容式触控结构，形成 FMLOC结构为例进行说明。
在一些示例中，如图2所示，在垂直于显示面板的方向上，显示面板的显示区域可以包括：衬底10、以及依次设置在衬底10上的电路结构层20、发光结构层30、封装结构层40以及触控结构层50。其中，显示结构层可以至少包括电路结构层20和发光结构层30。电路结构层20可以至少包括：多个子像素的像素电路，每个子像素的像素电路可以包括多个晶体管和至少一个电容。发光结构层30可以至少包括：多个子像素的发光元件。
在一些示例中，图2中以每个子像素的像素电路包括的一个薄膜晶体管21和一个电容22为例进行示意。在一些示例中，显示区域的电路结构层20可以包括：设置在衬底10上的半导体层、第一栅金属层、第二栅金属层、第一源漏金属层以及第二源漏金属层。半导体层和衬底10之间可以设置缓冲层101、半导体层和第一栅金属层之间可以设置有第一栅绝缘层102，第一栅金属层和第二栅金属层之间可以设置有第二栅绝缘层103，第二栅金属层和第一源漏金属层之间可以设置有层间绝缘层104，第一源漏金属层和第二源漏金属层之间可以设置有钝化层105和第一平坦层106，第二源漏金属层远离衬底10一侧可以设置有第二平坦层107。其中，缓冲层101可以防止衬底10中的有害物质侵入显示面板的内部，还可以增加显示面板中的膜层在衬底上的附着力。在一些示例中，缓冲层101、第一栅绝缘层102、第二绝缘层103、层间绝缘层104和钝化层105可以为无机绝缘层，第一平坦层106和第二平坦层107可以为有机绝缘层。然而，本实施例对此并不限定。在另一些示例中，在缓冲层靠近衬底一侧可以设置底部遮光金属层(BSM，Bottom Shielding Metal)，底部遮光金属层可以被配置为至少部分覆盖像素电路的薄膜晶体管的有源层，以避免外部光线对薄膜晶体管的性能产生影响。另一些示例中，第一源漏金属层和第二源漏金属层之间可以省略钝化层，第一源漏金属层和第二源漏金属层之间可以仅设置第一平坦层。在另一些示例中，第一源漏金属层和第二源漏金属层之间可以省略第一平坦层，仅设置钝化层。在另一些示例中，第二平坦层远离衬底一侧还可以设置第三源漏金属层，第三源漏金属层远离衬底一侧可以设置第三平坦层，第二平坦层和第三平坦层可以为有机绝缘层。
在一些示例中，如图2所示，显示区域的半导体层可以至少包括：薄膜晶体管21的有源层210。薄膜晶体管21的有源层210可以包括：第一区2101、第二区2102以及位于第一区2101和第二区2102之间的沟道区2100。第一栅金属层可以至少包括：薄膜晶体管21的栅极213、以及电容22的第一极板221。薄膜晶体管21的栅极213在衬底10的正投影可以覆盖有源层210的沟道区2100在衬底10的正投影。第二栅金属层可以至少包括：电容22的第二极板222。电容22的第二极板222和第一极板221在衬底10的正投影可以至少部分交叠，例如，两者可以重合。第一源漏金属层可以至少包括：薄膜晶体管21的源极211和漏极212。层间绝缘层104在显示区域可以开设有多个过孔(例如，包括第一像素过孔和第二像素过孔)，第一像素过孔内的层间绝缘层104、第二栅绝缘层103和第一栅绝缘层102可以被去掉，暴露出有源层210的第一区2101的至少部分表面；第二像素过孔内的层间绝缘层104、第二栅绝缘层103和第一栅绝缘层102可以被去掉，暴露出有源层210的第二区2102的至少部分表面。薄膜晶体管21的源极211可以通过第一像素过孔与有源层210的第一区2101电连接，漏极212可以通过第二像素过孔与有源层210的第二区2102电连接。第二源漏金属层可以至少包括：第一转接电极231。第一转接电极231可以通过钝化层105和第一平坦层106开设的第三像素过孔与像素电路的薄膜晶体管21的漏极212电连接。第一转接电极231可以通过第二平坦层107开设的第四像素过孔与发光元件的第一电极301(例如阳极)电连接。本示例可以通过第一转接电极231实现像素电路与发光元件之间的电连接。在另一些示例中，电路结构层包括第三源漏金属层时，第三源漏金属层可以至少包括第二转接电极，第二转接电极电连接第一转接电极与 发光元件的第一电极。本实施例对此并不限定。
在一些示例中，显示区域的栅线例如可以位于第一栅金属层，显示区域的数据线例如可以位于第二源漏金属层，显示区域的高电位电源线例如可以位于第二源漏金属层。本实施例对此并不限定。本示例的电路结构层可以包括两个源漏金属层，可以避免单个源漏金属层内排布较多走线，从而有利于实现窄边框结构。在另一些示例中，电路结构层可以包括三个或更多个源漏金属层。
在一些示例中，如图2所示，发光结构层30可以包括：像素定义层304和多个发光元件。例如，每个发光元件可以包括：叠设的第一电极301、有机发光层302和第二电极303。发光元件的第一电极301可以为阳极，第一电极301可以设置在第二平坦层107上，并通过第二平坦层107开设的第四像素过孔，与第一转接电极231电连接。像素定义层304设置在第一电极301和第二平坦层107上，像素定义层304可以开设有多个像素开口，一个像素开口可以暴露出对应的一个第一电极301的至少部分表面。有机发光层302的至少部分可以设置在一个像素开口内，并与对应的第一电极301连接。第二电极303可以设置在有机发光层302上，并与有机发光层302连接。有机发光层302在第一电极301和第二电极303的驱动下可以出射相应颜色的光线。像素定义层304远离衬底10的一侧还可以设置隔离柱层，隔离柱层可以包括多个隔离柱(PS)。
在一些示例中，发光元件的有机发光层302可以包括发光层(EML，Emitting Layer)，以及包括空穴注入层(HIL，Hole Injection Layer)、空穴传输层(HTL，Hole Transport Layer)、空穴阻挡层(HBL，Hole Block Layer)、电子阻挡层(EBL，Electron Block Layer)、电子注入层(EIL，Electron Injection Layer)、电子传输层(ETL，Electron Transport Layer)中的一个或多个膜层。在第一电极301和第二电极303的电压驱动下，可以利用有机材料的发光特性根据需要的灰度发光。
在一些示例中，不同颜色的发光元件的发光层可以不同。例如，红色发光元件包括红色发光层，绿色发光元件包括绿色发光层，蓝色发光元件包括蓝色发光层。为了降低工艺难度和提升良率，位于发光层一侧的空穴注入层和空穴传输层可以采用共通层，位于发光层另一侧的电子注入层和电子传输层可以采用共通层。在一些示例中，空穴注入层、空穴传输层、电子注入层和电子传输层中的任意一层或多层可以通过一次工艺(一次蒸镀工艺或一次喷墨打印工艺)制作，并通过形成的膜层表面段差或者通过表面处理等手段实现隔离。例如，相邻子像素对应的空穴注入层、空穴传输层、电子注入层和电子传输层中的任意一层或多层可以是隔离的。在一些示例中，有机发光层可以通过采用精细金属掩模版(FMM，Fine Metal Mask)或者开放式掩膜版(Open Mask)蒸镀制备形成，或者采用喷墨工艺制备形成。
在一些示例中，如图2所示，封装结构层40可以包括叠设的第一封装层401、第二封装层402和第三封装层403。其中，第一封装层401和第三封装层403可以采用无机材料，第二封装层402可以采用有机材料，第二封装层402可以设置在第一封装层401和第三封装层403之间，以保证外界水汽无法进入发光元件。然而，本实施例对此并不限定。例如，封装结构层可以采用无机/有机/无机/有机/无机的五层叠设结构。
图3为本公开至少一实施例的触控结构层的局部平面示意图。在一些示例中，如图3所示，显示区域的触控结构层可以包括：多个第一触控单元530和多个第二触控单元540。第一触控单元530可以具有沿第一方向X延伸的线形状，多个第一触控单元530可以沿第二方向Y依次排列，第二触控单元540可以具有沿第二方向Y延伸的线形状，多个第二触控单元540可以沿第一方向X依次排列。每个第一触控单元530可以包括沿第一方向X依次排列的多个第一触控电极531和第一连接部532，第一触控电极531和第一连接 部532可以交替设置且依次连接。每个第二触控单元540可以包括沿第二方向Y依次排列的多个第二触控电极541，多个第二触控电极541可以间隔设置，相邻的第二触控电极541可以通过第二连接部542彼此连接。在一些示例中，第二连接部542所在的膜层可以不同于第一触控电极531和第二触控电极541所在的膜层。
在一些示例中，如图2所示，在垂直于显示面板的方向上，显示区域的触控结构层50可以包括：依次设置的触控缓冲层(TBL)501、第一触控导电层511、触控层间绝缘层(TLD)502、第二触控导电层512以及触控保护层(TOC)503。触控缓冲层501和触控层间绝缘层502可以为无机绝缘层，触控保护层503可以为有机绝缘层。然而，本实施例对此并不限定。在另一些示例中，可以省略设置触控缓冲层。
在一些示例中，如图2和图3所示，多个第一触控电极531、多个第二触控电极541和多个第一连接部532可以同层设置在第一触控导电层511，并且可以通过同一次图案化工艺形成，第一触控电极531和第一连接部532可以为相互连接的一体结构。第二连接部542可以设置在第二触控导电层512，第二连接部542可以通过触控层间绝缘层502开设的过孔与相邻的第二触控电极221相互连接。在另一些示例中，多个第一触控电极531、多个第二触控电极541和多个第二连接部542可以同层设置在第一触控导电层511，第二触控电极541和第二连接部542可以为相互连接的一体结构，第一连接部532可以设置在第二触控导电层512，第一连接部532可以通过触控层间绝缘层502开设的过孔与相邻的第一触控电极531相互连接。在一些示例中，第一触控电极531可以是驱动(Tx)电极，第二触控电极541可以是感应(Rx)电极。或者，第一触控电极531可以是感应(Rx)电极，第二触控电极541可以是驱动(Tx)电极。本实施例对此并不限定。
在一些示例中，如图3所示，第一触控电极531和第二触控电极541可以具有菱形状，例如可以是正菱形，或者是横长的菱形，或者是纵长的菱形。在另一些示例中，第一触控电极531和第二触控电极541可以具有三角形、正方形、梯形、平行四边形、五边形、六边形和其它多边形中的任意一种或多种，本公开实施例在此不做限定。
在一些示例中，如图3所示，第一触控电极531和第二触控电极541可以是透明导电电极形式。在另一些示例中，第一触控电极531和第二触控电极541可以是金属网格形式，金属网格可以由多条金属线交织形成，金属网格可以包括多个网格图案，网格图案可以是由多条金属线构成的多边形。金属网格式的第一触控电极531和第二触控电极541具有电阻小、厚度小和反应速度快等优点。
在一些示例中，如图1所示，显示面板的第三边框区域B3和第四边框区域B4的显示结构层可以各自包括：沿着远离显示区域AA的方向依次设置的周边电路区、电源线区、裂缝坝区和切割区。其中，周边电路区连接到显示区域AA，可以至少包括栅极驱动电路(例如，包括多个级联的移位寄存器)，多个移位寄存器可以与显示区域AA中的多条栅线GL电连接，可以被配置为给多条栅线GL提供栅极控制信号。电源线区连接到周边电路区，可以至少包括低电位电源线，低电位电源线可以沿着平行于显示区域AA边缘的方向延伸，并与显示区域AA的发光元件的阴极连接。裂缝坝区可以连接到电源线区，可以至少包括在复合绝缘层上设置的多个裂缝。切割区可以连接到裂缝坝区，可以至少包括在复合绝缘层上设置的切割槽，切割槽可以被配置为在显示面板的所有膜层制备完成后，切割设置可以分别沿着切割槽进行切割。
在一些示例中，如图1所示，显示面板的第三边框区域B3和第四边框区域B4的触控结构层可以分别包括：多条触控引线252。多条触控引线252可以分别与第一触控单元和第二触控单元电连接。多条触控引线252可以均位于第一触控导电层、或者均位于第二触控导电层；或者多条触控引线252可以交替排布在第一触控导电层和第二触控导电层。 然而，本实施例对此并不限定。
在一些示例中，如图1所示，显示面板的第一边框区域B1可以包括：沿着远离显示区域AA的方向设置的扇出走线区域B11、弯折区域B12、走线设置区域B13、第二信号接入区域B15以及第一信号接入区域B14。图1中仅示意第一边框区域B1内的若干条走线来进行说明。本实施例对于第一边框区域B1的走线数目并不限定。
在一些示例中，如图1所示，扇出走线区域B11可以连接到显示区域AA。扇出走线区域B11可以至少设置有第一电源扇出线、第二电源扇出线、多条显示扇出线以及多条触控引出线252。第二电源扇出线可以被配置为连接显示区域AA的高电位电源线，第一电源扇出线可以被配置为连接第三边框区域B13和第四边框区域B14内的低电位电源线。多条显示扇出线可以至少包括：多条数据扇出线、多条驱动扇出线(图未示)。多条数据扇出线可以与显示区域AA的多条数据线DL电连接，例如，多条数据扇出线和多条数据线DL可以一一对应电连接。多条数据扇出线可以采用扇出走线方式从扇出走线区域B11延伸至弯折区域B12。多条驱动扇出线可以从第三边框区域B3和第四边框区域B4延伸至扇出走线区域B11，多条驱动扇出线可以与第三边框区域B3和第四边框区域B4内的栅极驱动电路电连接，多条驱动扇出线可以被配置为给栅极驱动电路提供控制信号，例如控制信号可以包括起始信号、时钟信号等。多条触控引出线252可以从第三边框区域B3和第四边框区域B4延伸至扇出走线区域B11，且可以位于多条显示扇出线远离衬底的一侧。
在一些示例中，如图1所示，弯折区域B12连接在扇出走线区域B11和走线设置区域B13之间，可以配置为使得走线设置区域B13弯折到显示区域AA的背面。弯折区域B12可以设置有多条弯折连接线，例如可以包括多条数据弯折连接线、多条驱动弯折连接线(图未示)、多条触控弯折连接线253、第一电源弯折连接线(图未示)和第二电源弯折连接线(图未示)。第一电源弯折连接线可以与第一电源扇出线电连接，第二电源弯折连接线可以与第二电源扇出线电连接。多条数据弯折连接线可以与多条数据扇出线电连接，多条驱动弯折连接线可以与多条驱动扇出线电连接，多条触控弯折连接线253与多条触控引出线252电连接。
在一些示例中，如图1所示，多条弯折连接线可以均沿第二方向Y延伸。在一些示例中，多条弯折连接线可以为同层结构。在一些示例中，多条触控弯折连接线253在第一方向X上可以位于多条数据弯折连接线和多条驱动弯折连接线的相对两侧。本实施例对此并不限定。
在一些示例中，如图1所示，走线设置区域B13可以设置有多条信号传输线，例如可以包括：多条触控传输线251和多条数据传输线。多条数据传输线可以与多条数据弯折连接线电连接，例如一一对应电连接，并通过多条数据弯折连接线与多条数据扇出线连接。多条触控传输线251可以与多条触控弯折连接线253电连接，例如一一对应电连接。多条触控传输线251可以通过多条触控弯折连接线253与扇出走线区域B11内的多条触控引出线252连接。
在一些示例中，如图1所示，第一边框区域B1可以包括：至少一个第一信号接入区域B14和至少一个第二信号接入区域B15。本示例以一个第一信号接入区域B14和一个第二信号接入区域B15为例进行示意。在另一些示例中，显示面板可以为大尺寸面板，显示面板可以包括多个第一信号接入区域B14和多个第二信号接入区域B15，多个第一信号接入区域B14可以沿第一方向X依次排布，多个第二信号接入区域B15可以沿第一方向X依次排布。第一信号接入区域B14可以位于第二信号接入区域B15远离显示区域AA的一侧。换言之，第二信号接入区域B15在第二方向Y上可以位于第一信号接入区 域B14靠近弯折区域B12的一侧。
在一些示例中，如图1所示，第二信号接入区域B15还可以称为驱动芯片设置区。第二信号接入区域B15可以设置多个接触垫，所述多个接触垫可以被配置为与至少一个驱动芯片绑定连接。驱动芯片可以被配置为产生用于驱动子像素所需的驱动信号，并将驱动信号提供给显示区域的数据线。例如，驱动信号可以包括驱动子像素的数据信号。
在一些示例中，如图1所示，第一信号接入区域B14还可以称为电路绑定区，第一信号接入区域B14可以设置多个接触垫(例如包括多个触控接触垫254)，所述多个接触垫例如可以沿第一方向X排布为一行，所述多个接触垫可以被配置为与至少一个电路板(例如柔性线路板(FPC，Flexible Printed Circuit))绑定连接。例如，外接的电路板可以配置为产生提供给触控结构层的触控信号以及接收触控感应信号。走线设置区域B13内的多条触控传输线251可以与多个触控接触垫254连接，例如，一条触控传输线251可以与至少一个触控接触垫254连接。
图4为本公开至少一实施例的第一边框区域的局部示意图。在一些示例中，如图4所示，第一边框区域B1的走线设置区域B13可以包括：第一电源供电线62a和62b、第二电源供电线61、多条触控传输线以及多条数据转接线(图未示)。多条触控传输线可以被划分为第一组触控传输线251a和第二组触控传输线251b。
在一些示例中，如图4所示，第一电源供电线62a和62b在第一方向X上可以位于第二电源供电线61的相对两侧。第二电源供电线61可以通过至少三条第二电源弯折连接线与扇出走线区域B11内的第二电源扇出线连接。第二电源供电线61的两个端部可以分别与第一信号接入区域B14内的至少一个第二电源接触垫连接。第一电源供电线62a可以通过至少两条第一电源弯折连接线与扇出走线区域B11内的第一电源扇出线连接，第一电源供电线62b可以通过至少两条第一电源弯折连接线与扇出走线区域B11内的第一电源扇出线连接。第二信号接入区域B15可以位于第二电源供电线61远离弯折区域B12的一侧。
在一些示例中，如图4所示，第一电源供电线62a和62b可以大致为沿第二方向Y延伸的折线状。第一电源供电线62a和62b可以采用非等宽设计。第二电源供电线61可以大致为n字型。触控传输线可以大致为沿第二方向Y延伸的折线状。
在一些示例中，如图4所示，第一组触控传输线251a可以通过弯折区域B12的多条触控弯折连接线与扇出走线区域B11内的多条触控引出线252连接，第二组触控传输线251b可以通过弯折区域B12的多条触控弯折连接线与扇出走线区域B11内的多条触控引出线252连接。第一组触控传输线251a所连接的多条触控弯折连接线可以位于第一电源供电线62a所连接的两条第一电源弯折连接线之间，第二组触控传输线251b所连接的多条触控弯折连接线可以位于第一电源供电线62b所连接的两条第一电源弯折连接线之间。
在一些示例中，如图4所示，第一组触控传输线251a在衬底的正投影与第一电源供电线62a在衬底的正投影可以部分交叠，第二组触控传输线251b在衬底的正投影与第一电源供电线62b在衬底的正投影可以部分交叠。第一组触控传输线251a可以位于第一电源供电线62a远离衬底的一侧，第二组触控传输线251b可以位于第一电源供电线62a远离衬底的一侧。第一组触控传输线251a和第二组触控传输线251b在衬底的正投影与第二电源供电线61在衬底的正投影可以没有交叠。
在一些示例中，如图4所示，第一信号接入区域B14内的多个接触垫可以包括：多个第一电源接触垫、多个第二电源接触垫以及多个触控接触垫(如图1所示的触控接触垫254)。第二电源供电线61的两端可以分别与至少一个第二电源接触垫连接，第一电源供 电线62a可以与至少一个第一电源接触垫连接，第一电源供电线62b可以与至少一个第一电源接触垫连接，多条触控传输线可以与多个触控接触垫连接。在第一信号接入区域B14内，第一电源接触垫可以位于第二电源接触垫远离第二信号接入区域B15的一侧，触控接触垫可以位于第一电源接触垫远离第二电源接触垫的一侧。第二信号接入区域B15内的多个接触垫可以包括多个输入接触垫和多个输出接触垫，多个输出接触垫可以位于多个输入接触垫靠近显示区域的一侧。多个输出接触垫可以与走线设置区域B13内的多条数据传输线连接，多个输入接触垫可以通过多条引脚连接线与第一信号接入区域B14内的多个中间接触垫连接。第一信号接入区域B14内的多个中间接触垫可以在第一方向X上位于多个第二电源接触垫之间。
在一些示例中，如图4所示和图5所示，走线设置区域B13可以包括：沿着第一方向X依次设置的第一边缘区B161、第一走线区域B164、中间区域B162、第二走线区域以及第二边缘区B163。第一走线区域B164可以设置有第一组触控传输线251a和第一电源供电线62a，第二走线区域可以设置有第二组触控转接线251b和第一电源供电线62b。第二电源供电线61可以位于中间区域B162。中间区域B162可以位于第二信号接入区域B15靠近弯折区域B12的一侧。
图5为图4中区域C1的局部放大示意图。图6为图5中沿Q1-Q1’方向的局部剖面示意图。图7为图5中沿Q2-Q2’方向的局部剖面示意图。
在一些示例中，如图4至图7所示，第一走线区域B164可以包括：依次设置在衬底10上的第一电源供电线62a和第一组触控传输线251a。第一走线区域B164在第一方向X的边缘可以为第一电源供电线62a在第一方向X的边缘。第一边缘区B161可以位于第一电源供电线62a靠近显示面板的左侧边缘的一侧，中间区域B162可以位于第一电源供电线62a远离第一边缘区B161的一侧。第二电源供电线61的至少部分位于所述中间区域B162内。
在一些示例中，如图5至图7所示，第二电源供电线61可以包括：相互连接的第一电压走线61-1和第二电压走线61-2。第二电压走线61-2可以位于第一电压走线61-1远离衬底10的一侧。第二电压走线61-2在衬底的正投影与第一电压走线61-1在衬底的正投影可以至少部分交叠，比如，第二电压走线61-2在衬底的正投影可以覆盖第一电压走线61-1在衬底的正投影。例如，第一电压走线61-1可以位于第一源漏金属层，第二电压走线61-2可以位于第二源漏金属层。第二电压走线61-2可以通过第一平坦层106和钝化层105开设的过孔或开槽与第一电压走线61-1连接。本示例通过设置第二电源供电线采用双层走线设计，可以有利于降低第二电源供电线的阻抗。
在一些示例中，如图6和图7所示，第一电源供电线62a可以包括：相互连接的第三电压走线62a-1和第四电压走线62a-2。第四电压走线62a-2可以位于第三电压走线62a-1远离衬底10的一侧。第四电压走线62a-2在衬底的正投影与第三电压走线62a-1在衬底的正投影可以至少部分交叠，比如，第四电压走线62a-2在衬底的正投影可以覆盖第三电压走线62a-1在衬底的正投影。例如，第三电压走线62a-1可以位于第一源漏金属层，第四电压走线62a-2可以位于第二源漏金属层。第四电压走线62a-2可以通过第一平坦层106和钝化层105开设的过孔或开槽与第三电压走线62a-1连接。本示例通过设置第一电源供电线采用双层走线设计，可以有利于降低第一电源供电线的阻抗。
在一些示例中，如图5至图7所示，第一组触控传输线251a可以包括多条触控转接线。至少一条触控传输线可以包括：相互连接的第一触控走线2511和第二触控走线2512。第二触控走线2512可以位于第一触控走线2511远离衬底10的一侧。第二触控走线2512在衬底的正投影与第一触控走线2511在衬底的正投影可以至少部分交叠，比如，第二触 控走线2512在衬底的正投影赢可以覆盖第一触控走线2511在衬底的正投影。例如，第二触控走线2512可以位于第二触控导电层，第一触控走线2511可以位于第一触控导电层。第二触控走线2512可以通过触控层间绝缘层502开设的过孔或开槽与第一触控走线2511连接。本示例通过设置触控传输线采用双层走线设计，可以有利于降低触控传输线的阻抗。
在一些示例中，如图4至图7所示，显示结构层的第一有机膜层可以包括：第一平坦层106和第二平坦层107，第一无机膜层可以包括：依次设置在衬底10上的缓冲层101、第一栅绝缘层102、第二栅绝缘层103、层间绝缘层104以及钝化层105。触控结构层的第二有机膜层可以包括触控保护层503，第二无机膜层可以包括触控缓冲层501和触控层间绝缘层502。然而，本实施例对此并不限定。在另一些示例中，可以省略触控缓冲层，第二无机膜层可以包括触控层间绝缘层。在另一些示例中，可以省略第一平坦层，第一有机膜层可以包括第二平坦层。在另一些示例中，第二平坦层远离衬底一侧还可以设置有第三平坦层，第一有机膜层可以包括：第三平坦层、第二平坦层和第一平坦层。
在一些示例中，如图4至图6所示，第一边缘区B161可以设置有一个第一镂空结构651。例如，第一镂空结构651的边缘形状可以与第一边缘区B161的形状大致相同。第一边缘区B161内的第二无机膜层(包括触控缓冲层501和触控层间绝缘层502)可以被去掉，形成暴露出第二平坦层107远离衬底10的部分表面的第一镂空结构651，第一边缘区B161的触控保护层503可以通过第一镂空结构651与第二平坦层107远离衬底10的表面直接接触，从而提升显示结构层和触控结构层的粘附效果。例如，第一边缘区B161内的第二无机膜层可以全部去掉。
在一些示例中，如图4、图5和图7所示，中间区域B162可以设置一个第一镂空结构652。例如，第一镂空结构652的边缘形状可以与中间区域B162的形状大致相同。第一镂空结构652内的第二无机膜层(包括触控缓冲层501和触控层间绝缘层502)可以被去掉，形成暴露出第二平坦层107远离衬底10的部分表面的第一镂空结构652，中间区域B162的触控保护层503可以通过第一镂空结构652与第二平坦层107远离衬底10的表面直接接触，从而提升显示结构层和触控结构层的粘附效果。例如，中间区域B162内的第二无机膜层可以全部去掉。同理，第二边缘区B163内可以形成去掉第二无机膜层(包括触控缓冲层501和触控层间绝缘层502)的第一镂空结构，使得第二边缘区B163的触控保护层503可以通过第一镂空结构与第二平坦层107远离衬底10的表面直接接触。
在一些示例中，第一信号接入区域B14和第二信号接入区域B15内的第二平坦层可以被去掉，以保证接触垫与对应电路或信号走线的连接。弯折区域B12内的第一平坦层和第二平坦层可以被去掉，通过减薄弯折区域B12的膜层厚度提升弯折性能。
本示例通过将走线设置区域的第一边缘区、中间区域和第二边缘区的第二无机膜层去掉，形成暴露出第一有机膜层的第一镂空结构，从而在触控保护层与第二平坦层之间实现大面积搭接，从而提升显示结构层和触控结构层的粘附效果。在另一些示例中，可以将第一边缘区、中间区域和第二边缘区中的至少两个区域内的第二无机膜层去掉，以增加第二有机膜层和第一有机膜层之间的粘附力。在另一些示例中，可以将第一边缘区、中间区域和第二边缘区中的一个区域内的第二无机膜层去掉，以增加第二有机膜层和第一有机膜层之间的粘附力。
图8为本公开至少一实施例的第一边框区域的另一局部示意图。图9为图8中区域C2的局部放大示意图。图10A为图9中沿Q3-Q3’方向的一种局部剖面示意图。图10B为图9中沿Q3-Q3’方向的另一种局部剖面示意图。
在一些示例中，如图8至图10A所示，第一电源供电线62b可以包括：相互连接的 第三电压走线62b-1和第四电压走线62b-2。第四电压走线62b-2可以位于第三电压走线62b-1远离衬底10的一侧。第四电压走线62b-2在衬底的正投影与第三电压走线62b-1在衬底的正投影可以至少部分交叠，比如，第四电压走线62b-2在衬底的正投影可以覆盖第三电压走线62b-1在衬底的正投影。例如，第三电压走线62b-1可以位于第一源漏金属层，第四电压走线62b-2可以位于第二源漏金属层。第四电压走线62b-2可以通过第一平坦层106和钝化层105开设的过孔或开槽与第三电压走线62b-1连接。本示例通过设置第一电源供电线采用双层走线设计，可以有利于降低第一电源供电线的阻抗。
在一些示例中，如图8至图10A所示，走线设置区域B13的第一边缘区、第二边缘区和中间区域可以设置多个第一镂空结构，本示例的多个第一镂空结构可以包括多个无机孔(例如包括多个第一无机孔V1)。第一边缘区、第二边缘区和中间区域内的多个第一无机孔V1可以规则排布，或者可以部分阵列排布且部分非规则排布。在中间区域内，多个第一无机孔V1在衬底的正投影可以与第二电源供电线61在衬底的正投影存在交叠。在一些示例中，如图8所示，第一无机孔V1在衬底的正投影可以为圆角矩形、或圆形、或椭圆形。然而，本实施例对此并不限定。
在一些示例中，如图10A所示，多个第一无机孔V1内的第二无机膜层(包括触控层间绝缘层502和触控缓冲层501)可以被去掉，暴露出第二平坦层107远离衬底10的部分表面。触控保护层503可以通过多个第一无机孔V1与第二平坦层107远离衬底10的表面直接接触，从而通过与第二平坦层107的表面搭接来增加粘附力。
在一些示例中，如图8和图9所示，在设置有触控传输线251和第一电源供电线62b的第二走线区域可以设置多个无机孔(例如包括多个第二无机孔V2)。例如，多个第二无机孔V2可以位于相邻两条触控传输线251之间，或者，可以位于多条触控传输线251的一侧。多个第二无机孔V2在衬底的正投影与触控传输线251在衬底的正投影可以没有交叠，与第一电源供电线62b在衬底的正投影可以存在交叠。多个第二无机孔V2内的第二无机膜层(包括触控层间绝缘层502和触控缓冲层501)可以被去掉，暴露出第二平坦层107远离衬底10的部分表面，触控保护层503可以通过多个第二无机孔V2与第二平坦层107远离衬底10的表面直接接触，从而增大触控保护层503与第二平坦层107之间的粘附力。关于第一走线区域的结构可以参照第二走线区域的结构描述，故于此不再赘述。
在一些示例中，如图10B所示，走线设置区域B13的第一边缘区、第二边缘区和中间区域的第一有机膜层(包括第二平坦层107和第一平坦层106)可以设置有多个凹陷部(例如包括多个第一凹陷部653)。多个第一凹陷部653和多个第一无机孔V1可以一一对应，每个第一凹陷部653与对应的第一无机孔V1可以连通。第一凹陷部653的远离衬底10的表面与衬底10之间的最小距离可以小于第一有机膜层除第一凹陷部653以外区域远离衬底10的表面与衬底10之间的最小距离。第一凹陷部653在衬底10的正投影可以覆盖对应的第一无机孔V1在衬底10的正投影。第二无机膜层在衬底10的正投影与第一凹陷部653在衬底的正投影可以部分交叠。
在一些示例中，在刻蚀触控层间绝缘层502时，通过增加刻蚀量，可以将一部分第二平坦层107(或者第二平坦层107和一部分第一平坦层106)过刻掉，从而在第二无机膜层形成第一无机孔V1，同时在第一有机膜层形成与第一无机孔连通的第一凹陷部653。第二有机膜层(包括触控保护层503)可以填充第一凹陷部653和第一无机孔V1，形成丁卯结构，从而进一步增加第二有机膜层和第一有机膜层之间的结合力。
关于本示例的显示面板的其余说明可以参照前述实施例的描述，故于此不再赘述。
图11为本公开至少一实施例的第一边框区域的另一局部示意图。图12为图11中区 域C3的局部放大示意图。图13A为图12中沿Q4-Q4’方向的一种局部剖面示意图。图13B为图12中沿Q4-Q4’方向的另一种局部剖面示意图。
在一些示例中，如图11至图13A所示，走线设置区域B13可以设置多个第一镂空结构，本示例的多个第一镂空结构可以包括多个无机槽(例如包括多个第一无机槽K1、多个第二无机槽K2、多个第三无机槽K3和多个第四无机槽K4)。多个第一无机槽K1、多个第二无机槽K2和多个第四无机槽K4可以位于第一边缘区和第二边缘区，多个第三无机槽K3可以位于中间区域。多个第一无机槽K1可以沿着第一电源供电线的边缘延伸，例如第二边缘区的多个第一无机槽K1可以沿着第一电源供电线62b靠近显示面板的右侧边缘的边缘延伸，多个第二无机槽K2可以沿第二方向Y延伸，且沿第一方向X规则排布在第一边缘区和第二边缘区。多个第四无机槽K4可以沿着走线设置区域一侧的切割边缘延伸。例如，第一边缘区的第四无机槽K4可以沿着显示面板的走线设置区域B13的左侧的切割边缘B32延伸，第二边缘区的第四无机槽K4可以沿着显示面板的走线设置区域B14的右侧的切割边缘B31延伸。在第一边缘区和第二边缘区内，多个第二无机槽K2可以由多个第一无机槽K1和多个第四无机槽K4围绕。中间区域的多个第三无机槽K3可以沿着第一电源供电线靠近第二电源供电线61的边缘延伸，例如，图12所示的位于中间区域的多个第三无机槽K3可以沿着第一电源供电线62a靠近第二电源供电线61的边缘延伸。然而，本实施例对此并不限定。
在一些示例中，第一无机槽K1、第三无机槽K3和第四无机槽K4在衬底的正投影可以大致为沿第二方向Y延伸的折线状，第二无机槽K2在衬底的正投影可以大致为沿第二方向Y延伸的直线状。然而，本实施例对此并不限定。例如，第二无机槽可以沿第一方向延伸；或者，第二无机槽可以沿与第一方向和第二方向均交叉的第三方向延伸。
在一些示例中，如图13A所示，多个第一无机槽K1内的第二无机膜层(包括触控层间绝缘层502和触控缓冲层501)可以被去掉，暴露出第二平坦层107的部分表面，触控保护层503可以通过多个第一无机槽K1与第二平坦层107远离衬底10的表面直接接触，从而增大触控保护层503与第二平坦层107之间的粘附力。关于第二无机槽K2、第三无机槽K3和第四无机槽K4的结构与第一无机槽K1类似，故于此不再赘述。本示例通过在第一边缘区和第二边缘区设置多个无机槽，可以隔断裂纹从显示面板的边缘向中间延伸。
在一些示例中，如图13B所示，走线设置区域B13的第一边缘区、第二边缘区和中间区域的第一有机膜层(包括第二平坦层107和第一平坦层106)可以设置有多个凹陷部(例如包括多个第二凹陷部654)。多个第二凹陷部654可以与多个无机槽(包括多个第一无机槽K1、多个第二无机槽K2、多个第三无机槽K3和多个第四无机槽K4)对应。每个第二凹陷部654可以与对应的无机槽连通。第二凹陷部654的远离衬底10的表面与衬底10之间的最小距离可以小于第一有机膜层除第二凹陷部654以外区域远离衬底10的表面与衬底10之间的最小距离。第二凹陷部654在衬底10的正投影可以覆盖对应的无机槽(例如，第一无机槽K1或第二无机槽K2或第三无机槽K3或第四无机槽K4)在衬底10的正投影。第二无机膜层在衬底10的正投影与第二凹陷部654在衬底的正投影可以部分交叠。
在一些示例中，在刻蚀触控层间绝缘层502时，通过增加刻蚀量，可以将一部分第二平坦层107(或者第二平坦层107和一部分第一平坦层106)过刻掉，从而在第二无机膜层形成多个无机槽，同时在第一有机膜层形成与无机槽连通的第二凹陷部654。第二有机膜层(包括触控保护层503)可以填充第二凹陷部654和无机槽，形成丁卯结构，从而进一步增加第二有机膜层和第一有机膜层之间的结合力。关于本示例的显示面板的其余说明可以参照前述实施例的描述，故于此不再赘述。
在另一些示例中，中间区域还可以包括以下至少之一：沿第一方向延伸的多个第五无机槽、沿第二方向延伸的多个第六无机槽、沿与第一方向和第二方向交叉的第三方向延伸的多个第七无机槽。关于第五无机槽、第六无机槽和第七无机槽的结构可以参照第一无机槽的结构，故于此不再赘述。
在另一些示例中，走线设置区域的中间区域可以设置如图13A所示的无机槽，第一边缘区和第二边缘区可以设置如图13B所示的无机槽和凹陷部。在另一些示例中，走线设置区域的中间区域可以设置如图10A所示的多个无机孔，第一边缘区和第二边缘区可以设置如图13所示的无机槽和凹陷部。在另一些示例中，走线设置区域的中间区域的第二无机膜层可以被去掉，第一边缘区和第二边缘区可以设置多个无机孔和多个凹陷部，或者，可以设置多个无机槽和多个凹陷部。然而，本实施例对此并不限定。
图14为本公开至少一实施例的第一边框区域的另一局部示意图。图15为图14中区域C4的局部放大示意图。图16为图15中沿Q5-Q5’方向的局部剖面示意图。
在一些示例中，如图14至图16所示，走线设置区域B13可以设置多个第二镂空结构，本示例的多个第二镂空结构可以包括多个有机槽(例如包括多个第一有机槽K11、多个第二有机槽K12、多个第三有机槽K13和多个第四有机槽K14)。多个第一有机槽K11和多个第二有机槽K12可以位于第一边缘区和第二边缘区，多个第三有机槽K13和多个第四有机槽K14可以位于中间区域。多个第一有机槽K11可以沿着第一电源供电线的边缘延伸，例如第二边缘区的多个第一有机槽K11可以沿着第一电源供电线62b靠近显示面板的右侧边缘的边缘延伸，多个第二有机槽K12可以沿第二方向Y延伸，且沿第一方向X规则排布在第一边缘区和第二边缘区。中间区域的多个第三有机槽K13可以沿着第一电源供电线的边缘延伸，例如中间区域的多个第三有机槽K13可以沿着第一电源供电线62a靠近第二电源供电线61的边缘延伸，多个第四有机槽K14可以沿第二方向Y延伸。中间区域的多个有机槽在衬底的正投影与第二电源供电线61在衬底的正投影可以没有交叠。
在一些示例中，第一有机槽K11和第三有机槽K13在衬底的正投影可以大致为沿第二方向Y延伸的折线状，第二有机槽K12和第四有机槽K14在衬底的正投影可以大致为沿第二方向Y延伸的直线状。然而，本实施例对此并不限定。例如，第二有机槽可以沿第一方向延伸；或者，第四有机槽可以沿第一方向延伸；或者，第二有机槽和第四有机槽可以沿第一方向延伸；或者，第二有机槽和第四有机槽中的至少一种可以沿与第一方向和第二方向均交叉的第三方向延伸。
在一些示例中，如图16所示，多个有机槽内的第一有机膜层(包括第二平坦层107和第一平坦层106)可以被去掉，暴露出第一无机膜层的部分表面，例如暴露出钝化层105远离衬底10的部分表面。第二无机膜层(包括触控缓冲层501和触控层间绝缘层502)可以通过有机槽与第一无机膜层远离衬底的表面直接接触，从而增大第二无机膜层和第一无机膜层之间的附着力。例如，触控缓冲层501可以通过有机槽与钝化层105远离衬底10的部分表面直接接触，触控层间绝缘层502可以填充在多个有机槽内。然而，本实施例对此并不限定。在另一些示例中，有机槽可以暴露出钝化层105和层间绝缘层104的部分表面，使得第二无机膜层可以与钝化层105和层间绝缘层104直接接触。
在另一些示例中，第一边缘区和第二边缘区的有机槽还可以包括：沿显示面板的走线设置区域的切割边缘延伸的多个第五有机槽。关于有机槽的排布方式可以参照前述实施例中关于无机槽的排布方式，故于此不再赘述。
关于本示例的显示面板的其余说明可以参照前述实施例的描述，故于此不再赘述。
图17为本公开至少一实施例的第一边框区域的另一局部示意图。在一些示例中，如图17所示，走线设置区域B13的第一边缘区、第二边缘区和中间区域可以设置多个第二镂空结构，本示例的多个第二镂空结构可以包括多个有机孔(例如包括多个第一有机孔V11)。第一边缘区、第二边缘区和中间区域内的多个第一有机孔V11可以规则排布，或者可以部分阵列排布且部分非规则排布。在中间区域内，多个第一有机孔V11在衬底的正投影可以与第二电源供电线61在衬底的正投影可以没有交叠。在一些示例中，第一有机孔V11在衬底的正投影可以为圆角矩形、或圆形、或椭圆形。然而，本实施例对此并不限定。
在一些示例中，多个第一有机孔V11内的第一有机膜层(包括第二平坦层107和第一平坦层106)可以被去掉，暴露出钝化层远离衬底的部分表面，第二无机膜层可以通过多个第一有机孔V11与第一无机膜层远离衬底的表面直接接触，从而增加第二无机膜层和第一无机膜层之间的粘附力。关于有机孔的剖面结构可以参照如图16所示的有机槽的剖面结构，故于此不再赘述。
在另一些示例中，走线设置区域的中间区域可以设置多个有机孔，第一边缘区和第二边缘区可以设置多个有机槽。在另一些示例中，走线设置区域的中间区域可以设置多个有机槽，第一边缘区和第二边缘区可以设置多个有机孔。在另一些示例中，走线设置区域的中间区域可以设置多个无机槽或多个无机孔，第一边缘区和第二边缘区可以设置多个有机孔或多个有机槽。在另一些示例中，走线设置区域的中间区域可以设置多个有机孔或多个有机槽，第一边缘区和第二边缘区可以设置多个无机孔或多个无机槽。
关于本示例的显示面板的其余说明可以参照前述实施例的描述，故于此不再赘述。
图18为本公开至少一实施例的第一边框区域的另一局部示意图。图19为图18中区域C5的局部放大示意图。图20为图19中沿Q6-Q6’方向的局部剖面示意图。
在一些示例中，如图18至图20所示，走线设置区域B13可以设置多个第二镂空结构以及多个隔离柱(例如包括多个第一隔离柱661、多个第二隔离柱662、多个第三隔离柱663和多个第四隔离柱664)。本示例的多个第二镂空结构可以包括多个有机槽，例如如图14所示的有机槽。
在一些示例中，多个隔离柱可以位于多个有机槽内。例如，每个有机槽内可以设置一个隔离柱。例如，第一隔离柱661可以位于第一有机槽内，第二隔离柱662可以位于第二有机槽内，第三隔离柱663可以位于第三有机槽内，第四隔离柱664可以位于第四有机槽内。第一隔离柱661和第三隔离柱663在衬底的正投影可以大致为折线状，第二隔离柱662和第四隔离柱664在衬底的正投影可以大致为沿第二方向Y延伸的条状。然而，本实施例对此并不限定。在另一些示例中，至少一个有机槽内可以设置沿有机槽的延伸方向排布的多个隔离柱；或者，至少一个有机槽内可以设置与有机槽的延伸方向交叉方向排布的多个隔离柱。
在一些示例中，如图20所示，以第一隔离柱661为例进行说明。第一隔离柱661可以位于第二源漏金属层，可以与第一电源供电线62b-2为同层结构。第二源漏金属层可以采用三层金属叠设的结构。例如，第一隔离柱661可以包括沿着远离衬底10的方向依次设置的第一金属层6611、第二金属层6612和第三金属层6613，第二金属层6612位于第一金属层6611和第三金属层6613之间，并与第一金属层6611和第三金属层6613直接接触。其中，第一金属层6611和第三金属层6613的材料可以相同，比如可以为钛(Ti)，第二金属层6612的材料可以为铝(Al)。
在一些示例中，如图20所示，第一隔离柱661的剖面形状可以大致为T字型。第一 隔离柱661的剖面指垂直于衬底所在平面且垂直于第一隔离柱661的延伸方向的平面。第一隔离柱661的第三金属层6613在衬底的正投影可以覆盖第二金属层6612和第一金属层6611在衬底的正投影。第三金属层6613的边缘可以凸出于第二金属层6612和第一金属层6611的边缘。第二无机膜层(包括触控缓冲层501和触控层间绝缘层502)可以包覆第三金属层6613凸出于第二金属层6612的边缘部分、第二金属层6612和第一金属层6611的边缘，第二无机膜层还可以与第一无机膜层的钝化层105远离衬底的表面接触。本示例可以形成第二无机膜层与隔离柱和第一无机膜层之间的丁卯结构，可以增加第一无机膜层和第二无机膜层之间的附着力。关于第二隔离柱至第四隔离柱的结构可以参照第一隔离柱的结构，故于此不再赘述。
在另一些示例中，隔离柱的剖面形状可以大致为矩形或梯形，比如，第一金属层在衬底的正投影可以覆盖第二金属层在衬底的正投影，第二金属层在衬底的正投影可以覆盖第三金属层在衬底的正投影。
在另一些示例中，隔离柱的剖面形状可以大致为倒梯形，比如，第三金属层在衬底的正投影可以覆盖第二金属层在衬底的正投影，第二金属层在衬底的正投影可以覆盖第一金属层在衬底的正投影。
关于本示例的显示面板的其余说明可以参照前述实施例的描述，故于此不再赘述。
上述实施例可以进行相互组合。在一些示例中，走线设置区域的中间区域可以设置多个无机槽或多个无机孔，第一边缘区和第二边缘区可以设置多个无机槽和多个隔离柱。在另一些示例中，走线设置区域的中间区域的第二无机膜层可以去掉，第一边缘区和第二边缘区可以设置多个无机槽和多个隔离柱。然而，本实施例对此并不限定。
图21为本公开至少一实施例的显示面板的另一示意图。在一些示例中，如图21所示，显示面板的第一边框区域B1可以包括：沿着远离显示区域AA的方向设置的扇出走线区域B11、走线设置区域B13、第二信号接入区域B15以及第一信号接入区域B14。本示例的扇出走线区域B11与走线设置区域B13连通。位于扇出走线区域B11内的触控引出线252可以与走线设置区域B13内的触控传输线251连接，触控传输线251可以与第一信号接入区域B14内的触控接触垫254连接。关于本示例的走线设置区域的结构可以参照前述实施例中的走线设置区域的结构的描述，故于此不再赘述。
本实施例还提供一种显示面板，包括：衬底。衬底包括显示区域和位于显示区域一侧的第一边框区域。第一边框区域至少包括：设置在衬底上的第一无机膜层、第一有机膜层、第二无机膜层、第二有机膜层以及多条触控传输线；第一有机膜层位于第一无机膜层远离衬底的一侧，第二无机膜层位于第一有机膜层远离衬底的一侧，第二有机膜层位于第二无机膜层远离衬底的一侧。第二无机膜层包括多个第一镂空结构，第二有机膜层通过多个第一镂空结构与第一有机膜层接触，第一镂空结构与触控传输线在衬底的正投影之间的距离大于0；换言之，第一镂空结构与触控传输线在衬底的正投影没有交叠。或者，第一有机膜层包括多个第二镂空结构，第二无机膜层通过多个第二镂空结构与第一无机膜层接触，第二镂空结构与触控传输线在衬底的正投影之间的距离大于0；换言之，第二镂空结构与触控传输线在衬底的正投影没有交叠。
本实施例提供的显示面板，通过在第二无机膜层设置第一镂空结构，或者在第一有机膜层设置第二镂空结构，使得第二有机膜层与第一有机膜层接触，或者第二无机膜层与第一无机膜层结构，从而增强第一边框区域的膜层之间的粘附效果，增强第一边框区域的强度，防止撞击导致膜层剥落的发生。
在一些示例中，多个第一镂空结构可以包括以下至少之一：多个无机孔、多个无机槽。
在一些示例中，多个第二镂空结构可以包括以下至少之一：多个有机孔、多个有机槽。
关于本实施例的显示面板的相关结构可以参照前述实施例的说明，故于此不再赘述。
图22为本公开至少一实施例的显示装置的示意图。如图22所示，本实施例提供一种显示装置91，包括前述实施例的显示面板910。在一些示例中，显示面板910可以为OLED显示面板，例如集成触控结构的OLED显示面板。显示装置91可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框或导航仪等任何具有显示功能的产品或部件，或者可以为具有触控和显示功能的产品或部件。
本公开中的附图只涉及本公开涉及到的结构，其他结构可参考通常设计。在不冲突的情况下，本公开的实施例即实施例中的特征可以相互组合以得到新的实施例。应该注意，上述实施例或实施方式仅仅是示例性的，而不是限制性的。因此，本公开不限于在此详细示出和描述的内容。可以对实施的形式及细节进行多种修改、替换或省略，而不脱离本公开的范围。

Claims (20)

  1. 一种显示面板，包括：
    衬底，包括显示区域和位于所述显示区域一侧的第一边框区域；
    显示结构层，位于所述衬底上，至少包括第一有机膜层和第一无机膜层，所述第一有机膜层位于所述第一无机膜层远离所述衬底的一侧；
    触控结构层，位于所述显示结构层远离所述衬底的一侧，至少包括第二有机膜层和第二无机膜层，所述第二有机膜层位于所述第二无机膜层远离所述显示结构层的一侧；
    在所述第一边框区域，所述第二有机膜层的一部分与所述第一有机膜层接触，或者，所述第二无机膜层的一部分与所述第一无机膜层接触。
  2. 根据权利要求1所述的显示面板，其中，所述第一边框区域包括：第一信号接入区域以及位于所述第一信号接入区域靠近所述显示区域一侧的走线设置区域；
    所述走线设置区域至少包括多条触控传输线，所述第一信号接入区域至少包括多个触控接触垫，所述多条触控传输线中的至少一条触控传输线与所述多个触控接触垫中的至少一个触控接触垫连接；
    所述第二无机膜层在所述走线设置区域包括：多个第一镂空结构，所述第二有机膜层通过所述多个第一镂空结构与所述第一有机膜层接触；
    所述多个第一镂空结构中的至少一个第一镂空结构位于所述多条触控传输线中的至少一条触控传输线的至少一侧。
  3. 根据权利要求2所述的显示面板，其中，所述多个第一镂空结构包括以下至少之一：多个无机孔、多个无机槽。
  4. 根据权利要求3所述的显示面板，其中，所述第一有机膜层在所述走线设置区域包括：多个凹陷部，所述多个凹陷部与所述多个第一镂空结构一一对应连通，所述凹陷部在所述衬底的正投影覆盖对应的第一镂空结构在所述衬底的正投影，所述第二无机膜层在所述衬底的正投影与所述凹陷部在所述衬底的正投影部分交叠。
  5. 根据权利要求3所述的显示面板，其中，所述走线设置区域还包括：至少一条第一电源供电线，所述第一电源供电线位于所述多条触控传输线靠近所述衬底的一侧，所述第一电源供电线在所述衬底的正投影与所述多条触控传输线在所述衬底的正投影部分交叠；所述多个无机槽中的至少一个无机槽沿着所述第一电源供电线的边缘延伸。
  6. 根据权利要求5所述的显示面板，还包括：位于所述第一电源供电线一侧的切割边缘，所述多个无机槽中的至少一个无机槽沿着所述切割边缘延伸。
  7. 根据权利要求2所述的显示面板，其中，所述走线设置区域包括：沿着第一方向依次设置的第一边缘区、第一走线区域、中间区域、第二走线区域以及第二边缘区；所述多条触控传输线位于所述第一走线区域和所述第二走线区域；所述走线设置区域沿第二方向位于所述显示区域的一侧，所述第一方向与所述第二方向交叉；
    所述多个第一镂空结构位于所述第一边缘区、所述中间区域和所述第二边缘区中的至少之一。
  8. 根据权利要求1所述的显示面板，其中，所述第一边框区域包括：第一信号接入区域以及位于所述第一信号接入区域靠近所述显示区域一侧的走线设置区域；
    所述走线设置区域至少包括多条触控传输线，所述第一信号接入区域至少包括多个触 控接触垫，所述多条触控传输线中的至少一条触控传输线与所述多个触控接触垫中的至少一个触控接触垫连接；
    所述第一有机膜层在所述走线设置区域包括：多个第二镂空结构，所述第二无机膜层通过所述多个第二镂空结构与所述第一无机膜层接触；所述多个第二镂空结构位于所述多条触控传输线的至少一侧。
  9. 根据权利要求8所述的显示面板，其中，所述多个第二镂空结构包括以下至少之一：多个有机孔、多个有机槽。
  10. 根据权利要求8所述的显示面板，还包括：位于所述走线设置区域的多个隔离柱，所述第二镂空结构在所述衬底的正投影覆盖至少一个隔离柱在所述衬底的正投影；所述隔离柱位于所述第二无机膜层和所述第一无机膜层之间。
  11. 根据权利要求10所述的显示面板，其中，所述显示结构层至少包括：依次设置在所述衬底上的第一源漏金属层和第二源漏金属层，所述隔离柱位于所述第二源漏金属层。
  12. 根据权利要求10所述的显示面板，其中，所述隔离柱包括：沿着远离所述衬底的方向依次设置的第一金属层、第二金属层和第三金属层，所述第三金属层在所述衬底的正投影覆盖所述第二金属层和所述第一金属层在所述衬底的正投影，所述第三金属层的边缘凸出于所述第二金属层和所述第一金属层的边缘。
  13. 根据权利要求10所述的显示面板，其中，所述走线设置区域还包括：至少一条第一电源供电线，所述第一电源供电线位于所述多条触控传输线靠近所述衬底的一侧，所述第一电源供电线在所述衬底的正投影与所述多条触控传输线在所述衬底的正投影部分交叠；所述多个隔离柱中的至少一个隔离柱沿着所述第一电源供电线的边缘延伸。
  14. 根据权利要求2至13中任一项所述的显示面板，其中，所述第一边框区域还包括：弯折区域，所述走线设置区域与所述弯折区域连通，且位于所述弯折区域远离所述显示区域的一侧。
  15. 根据权利要求1所述的显示面板，其中，所述显示结构层至少包括：设置在所述衬底上的第一源漏金属层、钝化层、第一平坦层、第二源漏金属层和第二平坦层；
    所述第一无机膜层至少包括：所述钝化层；所述第一有机膜层至少包括：所述第二平坦层和所述第一平坦层。
  16. 根据权利要求1所述的显示面板，其中，所述触控结构层至少包括：依次设置的触控缓冲层、第一触控导电层、触控层间绝缘层、第二触控导电层和触控保护层；
    所述第二无机膜层包括：所述触控缓冲层和所述触控层间绝缘层；所述第二有机膜层包括：所述触控保护层。
  17. 一种显示装置，包括如权利要求1至16中任一项所述的显示面板。
  18. 一种显示面板，包括：
    衬底，包括显示区域和位于所述显示区域一侧的第一边框区域，
    所述第一边框区域至少包括：设置在所述衬底上的第一无机膜层、第一有机膜层、第二无机膜层、第二有机膜层以及多条触控传输线；所述第一有机膜层位于所述第一无机膜层远离所述衬底的一侧，所述第二无机膜层位于所述第一有机膜层远离所述衬底的一侧，所述第二有机膜层位于所述第二无机膜层远离所述衬底的一侧；
    所述第二无机膜层包括多个第一镂空结构，所述第二有机膜层通过所述多个第一镂空结构与所述第一有机膜层接触，所述第一镂空结构与所述触控传输线在所述衬底的正投影 之间的距离大于0；或者，所述第一有机膜层包括多个第二镂空结构，所述第二无机膜层通过所述多个第二镂空结构与所述第一无机膜层接触，所述第二镂空结构与所述触控传输线在所述衬底的正投影之间的距离大于0。
  19. 根据权利要求18所述的显示面板，其中，所述多个第一镂空结构包括以下至少之一：多个无机孔、多个无机槽。
  20. 根据权利要求18所述的显示面板，其中，所述多个第二镂空结构包括以下至少之一：多个有机孔、多个有机槽。
PCT/CN2024/127394 2023-11-28 2024-10-25 显示面板及显示装置 Pending WO2025113017A1 (zh)

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