WO2024109090A1 - 可编程逻辑控制器的混合执行方法、装置、设备及介质 - Google Patents

可编程逻辑控制器的混合执行方法、装置、设备及介质 Download PDF

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WO2024109090A1
WO2024109090A1 PCT/CN2023/105765 CN2023105765W WO2024109090A1 WO 2024109090 A1 WO2024109090 A1 WO 2024109090A1 CN 2023105765 W CN2023105765 W CN 2023105765W WO 2024109090 A1 WO2024109090 A1 WO 2024109090A1
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instruction
execution
program
compiled
interpreted
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PCT/CN2023/105765
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English (en)
French (fr)
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林奕健
戴正国
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深圳市汇川技术股份有限公司
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Publication of WO2024109090A1 publication Critical patent/WO2024109090A1/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields

Definitions

  • the present application relates to the technical field of programmable logic controllers, and in particular to a hybrid execution method, device, electronic device and readable storage medium of a programmable logic controller.
  • the main purpose of the present application is to provide a hybrid execution method, device, electronic device and readable storage medium of a programmable logic controller, aiming to solve the technical problem of high execution limitations of executing program files through the parsing end of the target platform in the prior art.
  • the present application provides a hybrid execution method of a programmable logic controller, the hybrid execution method of the programmable logic controller comprising:
  • program instruction to be executed is an interpreted instruction, then according to the interpreted execution file, the program instruction to be executed is interpreted and executed to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, then according to the compiled execution file, the program instruction to be executed is compiled and executed to obtain a corresponding compiled execution result;
  • the present application further provides a hybrid execution device of a programmable logic controller, the hybrid execution device of the programmable logic controller comprising:
  • An acquisition module used for acquiring program instructions to be executed of a target instruction program
  • an instruction execution module for, if the program instruction to be executed is an interpreted instruction, then according to the interpreted execution file, performing interpreted execution on the program instruction to be executed to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, then according to the compiled execution file, performing compiled execution on the program instruction to be executed to obtain a corresponding compiled execution result;
  • the program execution module is used to return to the execution step: obtaining the to-be-executed program instructions of the target instruction program until a mixed execution result corresponding to the target instruction program is obtained, wherein the mixed execution result includes the interpreted execution result and the compiled execution result.
  • the present application also provides an electronic device, comprising: a memory, a processor, and a program of the hybrid execution method of the programmable logic controller stored in the memory and executable on the processor.
  • a program of the hybrid execution method of the programmable logic controller stored in the memory and executable on the processor.
  • the present application also provides a computer-readable storage medium, on which is stored a program for implementing a hybrid execution method of a programmable logic controller.
  • a program for the hybrid execution method of a programmable logic controller is executed by a processor, the steps of the hybrid execution method of the programmable logic controller as described above are implemented.
  • the present application also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the steps of the hybrid execution method of the programmable logic controller as described above are implemented.
  • the present application provides a hybrid execution method, device, electronic device and readable storage medium of a programmable logic controller, that is, obtaining a to-be-executed program instruction of a target instruction program; if the to-be-executed program instruction is an interpreted instruction, then according to an interpreted execution file, the to-be-executed program instruction is interpreted and executed to obtain a corresponding interpreted execution result; if the to-be-executed program instruction is a compiled instruction, then according to the compiled execution file, the to-be-executed program instruction is compiled and executed to obtain a corresponding compiled execution result; returning to the execution step: obtaining the to-be-executed program instruction of the target instruction program until a hybrid execution result corresponding to the target instruction program is obtained, wherein the hybrid execution result includes the interpreted execution result and the compiled execution result.
  • the parsing end of the target platform can realize the parsing and execution of the program instructions to be executed, and then after obtaining all the program instructions to be executed in the target instruction program, the corresponding program mixed execution results are obtained, and the target instruction program can be completely executed on the parsing end of the target platform, wherein the program mixed execution results include interpreted execution results and compiled execution results, that is, the purpose of mixed execution of the target instruction program by the parsing end using both interpreted parsing execution and compiled direct execution is achieved, that is, the purpose of being able to parse and execute multiple different types of instruction programs through the parsing end is achieved, while the non-parsing end can only parse and execute program files that match its own execution logic.
  • FIG1 is a flow chart of a first embodiment of a hybrid execution method of a programmable logic controller of the present application
  • FIG2 is a schematic diagram of the execution flow of the interpreted instruction program of the hybrid execution method of the programmable logic controller of the present application
  • FIG3 is a schematic diagram of a hybrid execution of an interpreted instruction program of a hybrid execution method of a programmable logic controller of the present application
  • FIG. 4 is a schematic diagram of the file structure of the hybrid execution method of the programmable logic controller of the present application, the compiled execution file is loaded into the parsing end;
  • FIG5 is a processing logic diagram of an interpreted instruction program of a hybrid execution method of a programmable logic controller of the present application
  • FIG6 is a flow chart of a second embodiment of a hybrid execution method of a programmable logic controller of the present application.
  • FIG7 is a schematic diagram of an embodiment of a hybrid execution device of a programmable logic controller of the present application.
  • FIG8 is a schematic diagram of the device structure of the hardware operating environment involved in the hybrid execution method of the programmable logic controller in the embodiment of the present application.
  • a traditional PLC usually has a compiling end and a parsing end, wherein the compiling end is used to compile the initial instruction program according to a compiled compiler and/or an interpreted compiler to obtain a machine language that can be recognized and run by the parsing end, and then the compiling end sends the initial program to the parsing end after the compilation is completed, and the parsing end then performs parsing and execution.
  • the two running modes have their own advantages and disadvantages.
  • the interpreted parsing execution needs to interpret the program file twice during operation, so the running speed is slower, and it is also more difficult to handle complex logical operations.
  • the line-by-line execution mode can ensure the flexibility of the program file during the operation process, and the compiled direct execution is to run directly by loading the executable program file, so the running speed is faster, but the disadvantage is that the program file cannot be modified at will after loading.
  • the initial instruction program received by the parser for parsing execution may not completely conform to the operation mode supported by the parser, for example, Assuming that the parsing end supports interpreted parsing and execution, but the initial instruction program is a mixed instruction program that is a mixture of interpreted instructions and compiled instructions, then the parsing end can only execute the interpreted instructions in the initial instruction program, but cannot execute the compiled instructions in the initial instruction program. That is, since the parsing end can only parse and execute the program instruction execution logic that it supports, when the program file received by the parsing end is a partially or completely unparsed program file, the parsing end cannot parse and execute the initial instruction program. Therefore, if the program file is to be parsed and executed through the parsing end, there are certain limitations on the received program file. Therefore, there is an urgent need for a method to reduce the execution limitations of executing program files through the parsing end of the target platform.
  • the embodiment of the present application provides a hybrid execution method of a programmable logic controller.
  • the hybrid execution method of the programmable logic controller includes:
  • Step S10 obtaining the program instructions to be executed of the target instruction program
  • Step S20 if the program instruction to be executed is an interpreted instruction, then according to the interpreted execution file, the program instruction to be executed is interpreted and executed to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, then according to the compiled execution file, the program instruction to be executed is compiled and executed to obtain a corresponding compiled execution result;
  • Step S30 returning to the execution step: obtaining the to-be-executed program instructions of the target instruction program, until a mixed execution result corresponding to the target instruction program is obtained, wherein the mixed execution result includes the interpreted execution result and the compiled execution result.
  • the hybrid execution method of the programmable logic controller is applied to the parsing end of the target platform, and the parsing end integrates functions such as compiling instruction programs and executing instruction programs.
  • the target instruction program is an initial instruction program, wherein the initial instruction program can be an instruction program partially parsed by the compiling end, or an instruction program that has not yet been parsed.
  • the to-be-executed program instructions are program instructions waiting to be compiled.
  • the target instruction program is composed of the to-be-executed program instructions, and the to-be-executed program instructions can be one or more.
  • the parsing end cannot execute the instruction program, one of the two operating modes, interpretive parsing execution or compiled direct execution, is usually set on the parsing end.
  • This method can certainly execute part of the target instruction program. For example, assuming that the target instruction program is a pure interpreted instruction program compiled by the compiler end, the parsing end has a built-in interpreted interpreter, that is, the parsing end is deployed with an interpreted parsing execution logic, and then the parsing end can execute the target instruction program by parsing the interpreted instructions in the target instruction program one by one.
  • the target instruction program is a completely unparsed instruction program or the unparsed program instructions in the target instruction program cannot be parsed.
  • the target instruction program is parsed and executed by the target end, it will cause the target instruction program to be unable to be fully executed on the parsing end of the target platform.
  • the parsing end is used to implement the execution of the target instruction program, and two operating modes can be set: interpreted parsing execution and compiled direct execution.
  • the program instruction to be executed is an interpreted instruction
  • the interpreted instruction can be parsed through an interpreted execution file.
  • the program instruction to be executed is a compiled instruction
  • the compiled instruction can be parsed through a compiled execution file.
  • the interpreted execution file is an executable file of the interpreted instruction.
  • the compiled execution file is an executable file of the compiled instruction.
  • the program mixed execution result includes the interpreted execution result and the compiled execution result, which can be specifically a program execution result of interpreting the target instruction program and compiling the compiled instructions in the target instruction program, or a program execution result of interpreting the target instruction program and interpreting the interpreted instructions in the target instruction program and compiling the compiled instructions in the target instruction program.
  • the parsing and execution of the target instruction program requires a mixture of interpreted parsing execution logic and compiled parsing processing logic, wherein the interpreted execution result is the result of parsing and executing through an interpreted execution file, and the compiled execution result is the result of compiling and executing through a compiled execution file, and the interpreted execution file and the compiled execution file respectively contain execution programs corresponding to program instructions, and the corresponding program instructions can be executed by calling the execution program.
  • the parsing end is a parsing end that adds parsing and processing logic for compiled execution files on the basis of built-in interpreted execution files
  • the target instruction program is an interpreted instruction program carrying interpreted instructions and compiled instructions
  • the execution logic of the parsing end is to call the interpreted execution file to parse and execute the interpreted instructions, and to call the compiled execution file to directly execute the compiled instructions, so as to execute the interpreted instruction program.
  • step S10 to step S30 include: extracting the to-be-executed program instructions of the interpreted instruction program through a first preset scanning method, wherein the interpreted instruction program is used to represent that the instructions in the program need to be parsed and executed one by one, and the first preset scanning method can specifically be a lexical scanning method or a loop scanning method, etc.
  • the first preset scanning method is used to extract the to-be-executed program instructions in the interpreted instruction program in sequence according to a preset scanning order; if the to-be-executed program instruction is determined to be an interpreted instruction, then the to-be-executed program instruction is interpreted and executed through an interpreted execution file to obtain a corresponding interpreted execution result; if the to-be-executed program instruction is determined to be a compiled instruction, then the to-be-executed program instruction is compiled and executed through a compiled execution file to obtain a corresponding compiled execution result; return to the execution step: through the preset Assume that a scanning method is used to extract the program instructions to be executed of the target instruction program.
  • the program instructions to be executed are not extracted, the interpreted execution result and the compiled execution result are used together as the mixed execution result of the target instruction program. If the program instructions to be executed are extracted, the program instructions to be executed are extracted and the following steps are performed: if the program instructions to be executed are interpreted instructions, the program instructions to be executed are interpreted through an interpreted execution file to obtain a corresponding interpreted execution result. If the program instructions to be executed are compiled instructions, the program instructions to be executed are compiled through a compiled execution file to obtain a corresponding compiled execution result, until a mixed execution result corresponding to the target instruction program is obtained, wherein the mixed execution result includes the interpreted execution result and the compiled execution result.
  • the parsing end is provided with an interpreted execution file and a compiled execution file
  • the interpreted instructions in the target instruction program can be respectively executed by calling the corresponding type of execution file.
  • the command and the compiled instruction obtain a mixed execution result including the interpreted execution result and the compiled execution result, thereby achieving the purpose of mixed execution of the interpreted instruction program, thereby overcoming the technical defect that the interpreted instruction program cannot be fully executed on the parsing end of the target platform, thereby improving the execution limitation of the program file executed by the parsing end of the target platform.
  • the parsing end has a pre-built-in interpreted executable file and is set to load the compiled type for direct execution.
  • the program instructions to be executed include interpreted instructions and compiled instructions, and there is no calling relationship between the interpreted instructions and the compiled instructions. Then, after the program instructions to be executed are obtained, it is possible to determine whether the program instructions to be executed are interpreted instructions through a set of pre-set interpreted instructions. If the program instructions to be executed are determined to be compiled instructions through the preset interpreted instruction set, the compiled executable file corresponding to the compiled instruction is called to perform compiled execution on the compiled instruction to obtain a compiled execution result. If the program instructions to be executed are determined to be interpreted instructions through the preset interpreted instruction set, the interpreted executable file corresponding to the interpreted instruction is called to perform interpreted execution on the interpreted instruction to obtain an interpreted execution result.
  • the hybrid execution method of the programmable logic controller further includes:
  • Step A10 detecting whether the program instruction to be executed exists in the preset interpreted program instruction set
  • Step A20 if it exists, determining that the program instruction to be executed is an interpreted instruction
  • Step A30 If not, determine that the program instruction to be executed is a compiled instruction.
  • the instruction type of the program instruction to be executed can be determined based on the preset interpreted program instruction set, and the preset interpreted program instruction set is a set of pre-set interpreted program instructions. After all program instructions of the interpreted instruction program are determined by the preset interpreted program instructions, the program instructions in the interpreted instruction program are parsed and executed one by one through the interpreted execution file and the compiled execution file, so as to obtain a mixed execution result of the entire interpreted instruction program.
  • the mixed execution result of the interpreted instruction program is a mixture of the interpreted execution results of the interpreted instructions and the compiled execution results of the compiled instructions.
  • the mixed execution result of the interpreted instruction program includes the interpreted execution result and the compiled execution result, it indicates that the interpreted instruction program includes interpreted instructions and compiled instructions.
  • the parsing end has a built-in interpreted execution file
  • the interpreted instruction program includes interpreted instructions A1, interpreted instructions A2, compiled instructions B1 and compiled instructions B2
  • the interpreted instructions A1 and the interpreted instructions A2 can be executed by parsing the interpreted execution file
  • the compiled instructions B1 and the compiled instructions B2 can be directly executed by the compiled execution file, so as to obtain the mixed execution result of executing the interpreted instruction program.
  • FIG. 2 is a schematic diagram showing the execution flow of an interpreted instruction program, wherein the The interpreted instruction program includes program instruction 1, program instruction 2, program instruction 3 and program instruction 4.
  • the program instructions in the interpreted instruction program are judged one by one by using a preset interpreted program instruction set. Then, when program instruction 1 and program instruction 3 exist in the preset interpreted program instruction set, they can be directly executed by calling the interpreted execution file, and the corresponding compiled execution file is called to execute program instruction 2 and program instruction 4.
  • program instruction 2 calls program instruction 1, it is executed by calling the corresponding interpreted execution file when executing program instruction 1.
  • steps A10 to A30 include: determining whether the program instruction to be executed exists in the preset interpreted instruction set by comparing the program instruction to be executed with the preset interpreted program instructions of the preset interpreted instruction set one by one; if the preset interpreted instruction set contains preset interpreted program instructions that are consistent with the program instruction to be executed, determining that the program instruction to be executed is an interpreted instruction; if the preset interpreted instruction set does not contain preset interpreted program instructions that are consistent with the program instruction to be executed, determining that the program instruction to be executed is a compiled instruction.
  • the step of performing compiled execution on the to-be-executed program instructions according to the compiled execution file to obtain the corresponding compiled execution result comprises:
  • Step B10 obtaining the to-be-executed file instruction of the compiled executable file
  • Step B20 executing the to-be-executed file instruction according to the instruction execution file corresponding to the to-be-executed file instruction to obtain a corresponding instruction execution result, wherein the instruction execution file is the interpreted execution file or the compiled execution file;
  • Step B30 returning to the execution step: obtaining the to-be-executed file instruction of the compiled execution file, until the compiled execution result of the compiled execution file is obtained.
  • the process of executing the compiled instructions of the interpreted instruction program is the process of executing the compiled executable file, and the to-be-executed file instructions are compiled file instructions waiting to be executed.
  • the compiled executable file executes the compiled program instructions, when all the to-be-executed file execution instructions in the compiled executable file are executed, the compiled execution result of the compiled executable file is obtained, and the instruction execution file is used to execute the to-be-executed file in the compiled executable file.
  • the to-be-executed file instructions include compiled file instructions and hybrid file instructions, wherein the compiled file instructions can be directly executed based on the compiled executable file corresponding to the compiled file instructions, and the hybrid file instructions are used to characterize compiled file instructions of mixed interpreted instructions, that is, the compiled file instructions call interpreted instructions.
  • the interpreted instruction program includes to-be-executed file instructions A1 and to-be-executed file instructions A2, wherein the to-be-executed file instruction A1 calls the interpreted instruction B1, and the to-be-executed file instruction A2 does not call any interpreted instruction, then A1 is the hybrid file instruction, and A2 is the compiled file instruction.
  • the file instruction to be executed is a mixed file instruction (a compiled file instruction calls an interpreted instruction)
  • the instruction execution file (compiled execution file) corresponding to the compiled file instruction is called to execute the compiled file instruction
  • the instruction execution file (interpreted execution file) corresponding to the interpreted instruction is called to execute the interpreted instruction.
  • Figure 3 is a schematic diagram of hybrid execution of an interpreted instruction program, wherein the interpreted instruction program includes hybrid file instructions, and the hybrid file instructions are provided with interpreted instructions C1, interpreted instructions C2 and compiled instructions D1, compiled instruction D1 calls interpreted instruction C1, and there are interpreted instructions consistent with interpreted instructions C1 and interpreted instructions C2 in the preset interpreted instruction set.
  • the execution process is: executing interpreted instructions C1 and interpreted instructions C2 by calling the interpreted execution files corresponding to the built-in interpreted instructions C1 and interpreted instructions C2 respectively, executing compiled instruction D1 by calling the compiled execution file corresponding to compiled instruction D1, and executing compiled instruction D1 by calling the interpreted execution file corresponding to interpreted instruction C2, and then after executing interpreted instructions C1, interpreted instructions C2 and compiled instruction D1, a hybrid execution result of the interpreted instruction program is obtained.
  • step B10 to step B30 include: obtaining the to-be-executed file instructions of the compiled executable file through a second preset scanning method, wherein the second preset scanning method is used to extract the to-be-executed file instructions of the compiled executable file in sequence according to a preset scanning order, and the second preset scanning method can specifically be a lexical scanning method or a loop scanning method, etc.; if the to-be-executed file instruction is determined to be a compiled instruction, the to-be-executed file instruction is executed; if the to-be-executed file instruction is determined to be an interpreted instruction, the to-be-executed file instruction is executed by calling the interpreted executable file corresponding to the to-be-executed file instruction to obtain the corresponding instruction execution result; return to the execution step: obtain the to-be-executed file instructions of the compiled executable file until the compiled execution result of the compiled executable file is obtained.
  • the second preset scanning method is used to extract
  • the parsing end is provided with an interpreted execution file and a compiled execution file
  • the interpreted instructions can be executed by calling the interpreted execution file
  • the compiled instructions can be executed by calling the compiled execution file. That is, the purpose of executing the instructions of the file to be executed by calling the interpreted execution file or the compiled execution file is achieved, and the corresponding compiled execution results are obtained. Therefore, the technical defect that the compiled execution file that calls the interpreted instruction cannot be executed on the parsing end with the built-in interpreted execution file and the compiled execution file loaded is overcome. Therefore, the foundation is laid for further reducing the execution limitations of executing program files through the parsing end of the target platform.
  • the step of executing the instruction file corresponding to the instruction in the to-be-executed file and obtaining the corresponding instruction execution result comprises:
  • Step C10 if the to-be-executed file instruction is the interpreted instruction, then obtaining a first file storage address corresponding to the interpreted execution file; executing the interpreted instruction according to a first actual storage location of the interpreted instruction at the first file storage address to obtain a corresponding instruction execution result; or
  • Step C20 if the to-be-executed file instruction is the compiled instruction, obtain the second file storage address corresponding to the compiled execution file; execute the compiled instruction according to the second actual storage location of the compiled instruction at the second file storage address to obtain the corresponding instruction execution result.
  • the interpreted execution file and the compiled execution file are respectively stored in different file storage spaces of the parsing end of the target platform, and the corresponding execution file is queried by reading different file storage addresses to implement the call of the corresponding variable or function.
  • the interpreted execution file can call the function corresponding to the program instruction to be executed
  • the compiled execution file can call the function or variable corresponding to the program instruction to be executed.
  • the interpreted execution file and the compiled execution file can both execute one or more program instructions. The actual storage location of the program instructions under the interpreted execution file or the compiled execution file is different.
  • the actual storage location of the program instructions to be executed under the interpreted execution file can be a/b/c/d1, a/b/c/d2 and a/b/c/d3, etc.
  • steps C10 to C20 include: if the file instruction to be executed is the interpreted instruction, querying the first file storage address of the interpreted execution file corresponding to the interpreted instruction; executing the interpreted instruction by calling the function stored in the first actual storage location of the first file storage address to obtain the corresponding instruction execution result; or
  • the to-be-executed file instruction is the compiled instruction, then query the second file storage address of the compiled execution file corresponding to the compiled instruction; execute the compiled instruction by calling the function or variable stored in the second actual storage location of the second file storage address to obtain the corresponding instruction execution result.
  • the hybrid execution method of the programmable logic controller further includes:
  • Step D10 obtaining a compiled execution file, wherein the compiled execution file includes interpreted instructions and compiled instructions;
  • Step D20 relocating the initial storage location of the interpreted instruction to the first actual storage location
  • Step D30 searching a preset address mapping table for a corresponding second actual storage location according to the relative storage address information of the compiled instruction
  • Step D40 using the first actual storage location as the actual storage location of the interpreted instruction, and using the second actual storage location as the actual storage location of the compiled instruction.
  • the storage locations of the variables and instructions stored in the file are all relative addresses, and it is necessary to relocate the real storage locations of the variables and instructions stored in the file.
  • the relative storage address information is used to represent the relative storage address of the compiled instruction.
  • the preset address mapping table is used to store the mapping relationship between the relative storage address information of the compiled instruction and the actual storage location, and then the file storage location of the non-built-in compiled execution file can be determined through the first actual storage location and the second storage location, that is, the second file storage address.
  • step D10 to step D40 include: obtaining a compiled execution file, wherein the compiled execution file includes
  • the invention relates to a method for performing a program instruction mapping operation according to the present invention, wherein the first actual storage position of the interpreted instruction is used to store the first actual storage position of the first file instruction and the second actual storage position of the second file instruction.
  • the method comprises the steps of: querying an initial storage position of the interpreted instruction and relocating the initial storage position of the instruction to a first actual storage position, wherein the initial storage position of the instruction is used to represent the initial storage position of the program instruction; using the relative storage address information of the compiled instruction as an index, querying a corresponding second actual storage position in a preset address mapping table; using the first actual storage position as the actual storage position of the interpreted instruction, and using the second actual storage position as the actual storage position of the compiled instruction, wherein the parent addresses of the first actual storage position and the second actual storage position are consistent, that is, the interpreted instruction and the compiled instruction are both stored in the same parent address (the second file storage address). For example, assuming that the file instruction storage address includes d/f/g1 and d/f/g2, etc., the second file storage address is d/f.
  • the hybrid execution method of the programmable logic controller before the step of searching the preset address mapping table for the corresponding second actual storage location according to the relative storage address information of the compiled instruction, the hybrid execution method of the programmable logic controller further includes:
  • Step E10 obtaining the relative storage address information of each preset compiled instruction and a preset number of second actual storage locations;.
  • Step E20 establishing a preset address mapping table according to the one-to-one correspondence between each relative storage address information and each second actual storage location.
  • steps E10 to E20 include: allocating a second file storage address for the compiled execution instruction, obtaining a preset number of second actual storage locations at the second file storage address, and obtaining relative storage address information of each preset compiled instruction; and establishing a preset address mapping table based on a one-to-one correspondence between each relative storage address information and each second actual storage location.
  • FIG5 is a processing logic diagram of an interpreted instruction program, wherein the parsing process includes a startup process and an execution process, the startup process is used to implement the relocation of the compiled executable file, and the execution process is used to implement the execution of the interpreted instruction program.
  • the execution process and the startup process can be specifically referred to the diagram, and will not be repeated here.
  • the embodiment of the present application provides a hybrid execution method for a programmable logic controller, that is, obtaining program instructions to be executed of a target instruction program; if the program instructions to be executed are interpreted instructions, then according to an interpreted execution file, the program instructions to be executed are interpreted and executed to obtain corresponding interpreted execution results; if the program instructions to be executed are compiled instructions, then according to the compiled execution file, the program instructions to be executed are compiled and executed to obtain corresponding compiled execution results; returning to the execution step: obtaining program instructions to be executed of the target instruction program until a hybrid execution result corresponding to the target instruction program is obtained, wherein the hybrid execution result includes the interpreted execution result and the compiled execution result.
  • the parsing end of the target platform can realize the parsing and execution of the program instructions to be executed, and then after obtaining all the program instructions to be executed in the target instruction program, the corresponding program mixed execution result is obtained, and the target instruction program can be completely executed on the parsing end of the target platform, wherein the program mixed execution result includes the interpreted execution result and the compiled execution result, that is, the purpose of using the parsing end to perform mixed execution of the target instruction program by using the interpreted parsing execution and the compiled direct execution at the same time is achieved, that is, the purpose of being able to parse and execute a variety of different types of instruction programs through the parsing end is achieved, while the non-parsing end can only parse and execute program files that match its own execution logic, so it overcomes the problem.
  • the hybrid execution method of the programmable logic controller further includes:
  • Step F10 analyzing whether the target instruction program is an interpreted instruction program according to the interpreted execution file
  • Step F20 if the target instruction program is the interpreted instruction program, then execute the following steps: if the program instruction to be executed is an interpreted instruction, then perform interpreted execution on the program instruction to be executed according to the interpreted execution file to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, then perform compiled execution on the program instruction to be executed according to the compiled execution file to obtain a corresponding compiled execution result;
  • Step F30 if the target instruction program is not the interpreted instruction program, then according to the compiled execution file, the to-be-executed program instructions are compiled and executed to obtain corresponding compiled execution results.
  • the parsing end has built-in execution logic of an interpreted execution file
  • the target instruction program can be an interpreted instruction program or a compiled instruction program, wherein the compiled instruction program is used to characterize that the instructions in the program can be directly executed
  • the mixed execution logic of the interpreted instruction program can refer to the above embodiment, and will not be repeated here.
  • the target instruction program is a compiled instruction program
  • the parsing end with a built-in interpreted execution file can still realize mixed execution of the compiled instruction program.
  • step F10 to step F30 include: according to the interpreted execution file corresponding to the target instruction program, parsing the program identifier in the target instruction program, and judging whether the target program instruction is an interpreted instruction program according to the program identifier, wherein the program identifier is used to identify the program type of the target instruction program, and can be specifically set in the compilation stage of the target instruction program; if the target instruction program is determined to be the interpreted instruction program, executing the following steps: if the program instruction to be executed is an interpreted instruction, then according to the interpreted execution file, interpreting the program instruction to be executed to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, then according to the compiled execution file, compiling the program instruction to be executed to obtain a corresponding compiled execution result; if the target instruction program is determined to be the compiled instruction program, then according to the compiled execution file, compiling the program instruction to be executed to obtain a corresponding compiled execution result, wherein the
  • the target instruction program consists of only one compiled instruction that calls an interpreted instruction
  • the target instruction program is a compiled instruction program
  • the compiled instruction is executed to obtain a mixed execution result of the target instruction program.
  • the target instruction program consists of only one compiled instruction that calls an interpreted instruction
  • the target instruction program is a compiled instruction program
  • the compiled instruction is executed by calling the compiled execution file corresponding to the compiled instruction
  • the interpreted instruction called by the compiled instruction is executed by calling the interpreted execution file corresponding to the interpreted execution file, so as to obtain a mixed execution result of the target instruction program.
  • An embodiment of the present application provides a hybrid execution method for program instructions to be executed, that is, obtaining the file instructions to be executed of the compiled execution file; executing the file instructions to be executed according to the instruction execution file corresponding to the file instructions to be executed, and obtaining the corresponding instruction execution result, wherein the instruction execution file is the interpreted execution file or the compiled execution file; returning to the execution step: obtaining the file instructions to be executed of the compiled execution file until the compiled execution result of the compiled execution file is obtained.
  • the embodiment of the present application executes the interpreted instructions called by the compiled instruction through the interpreted execution file, and executes the compiled instruction through the compiled execution file, that is, the purpose of mixed execution of compiled instructions through the interpreted execution file and the compiled execution file is achieved.
  • the target instruction program is parsed as a compiled instruction program
  • the target instruction program is executed through the compiled execution file, that is, the purpose of mixed execution of the target instruction program through the interpreted execution file and the compiled execution file is achieved. Therefore, a foundation is laid for improving the execution limitations of executing program files through the parsing end of the target platform.
  • the embodiment of the present application further provides a hybrid execution device of a programmable logic controller.
  • the hybrid execution device of the programmable logic controller includes:
  • the acquisition module 101 is used to acquire the program instructions to be executed of the target instruction program
  • the instruction execution module 102 is used to, if the program instruction to be executed is an interpreted instruction, perform interpreted execution on the program instruction to be executed according to the interpreted execution file to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, perform compiled execution on the program instruction to be executed according to the compiled execution file to obtain a corresponding compiled execution result;
  • the program execution module 103 is used to return to the execution step: obtaining the to-be-executed program instructions of the target instruction program until a mixed execution result corresponding to the target instruction program is obtained, wherein the mixed execution result includes the interpreted execution result and the compiled execution result.
  • the instruction execution module 102 is further configured to:
  • the instruction execution module 102 is further configured to:
  • the to-be-executed file instruction is the interpreted instruction, then obtaining a first file storage address corresponding to the interpreted execution file; executing the interpreted instruction according to a first actual storage location of the interpreted instruction at the first file storage address to obtain a corresponding instruction execution result; or
  • the to-be-executed file instruction is the compiled instruction, then obtain a second file storage address corresponding to the compiled execution file; execute the compiled instruction according to the second actual storage location of the compiled instruction at the second file storage address to obtain a corresponding instruction execution result.
  • the hybrid execution device of the programmable logic controller is further used for:
  • the hybrid execution device of the programmable logic controller is further used for:
  • the target instruction program is the interpreted instruction program
  • the following steps are performed: if the program instruction to be executed is an interpreted instruction, the program instruction to be executed is interpreted according to the interpreted execution file to obtain a corresponding interpreted execution result; if the program instruction to be executed is a compiled instruction, the program instruction to be executed is compiled according to the compiled execution file to obtain a corresponding compiled execution result;
  • the to-be-executed program instructions are compiled and executed according to the compiled execution file to obtain corresponding compiled execution results.
  • the hybrid execution device of the programmable logic controller is further used for:
  • the first actual storage location is used as the actual storage location of the interpreted instruction
  • the second actual storage location is used as the actual storage location of the compiled instruction.
  • the hybrid execution device of the programmable logic controller is further used for:
  • a preset address mapping table is established according to the one-to-one correspondence between each relative storage address information and each second actual storage location.
  • the hybrid execution device of the programmable logic controller provided by the present invention adopts the hybrid execution method of the programmable logic controller in the above embodiment, and solves the technical problem of high execution limitations of executing program files through the parsing end of the target platform.
  • the beneficial effects of the hybrid execution device of the programmable logic controller provided by the embodiment of the present invention are the same as the beneficial effects of the hybrid execution method of the programmable logic controller provided by the above embodiment, and other technical features in the hybrid execution device of the programmable logic controller are the same as the features disclosed in the above embodiment method, which will not be repeated here.
  • An embodiment of the present invention provides an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the hybrid execution method of the programmable logic controller in the above-mentioned embodiment one.
  • the electronic device in the embodiment of the present disclosure may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop programmable logic controllers, etc.
  • mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc.
  • fixed terminals such as digital TVs, desktop programmable logic controllers, etc.
  • the electronic device shown in FIG8 is only an example and should not impose any limitations on the functions and scope of use of the embodiment of the present disclosure.
  • the electronic device may include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004.
  • ROM read-only memory
  • RAM random access memory
  • Various programs and data required for the operation of the electronic device are also stored in the RAM 1004.
  • the processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other via a bus 1005.
  • An input/output (I/O) interface 1006 is also connected to the bus.
  • the following systems can be connected to the I/O interface 1006: input devices 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 1003 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 1009.
  • the communication device can allow the electronic device to communicate with other devices wirelessly or by wire to exchange data.
  • the figure shows an electronic device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.
  • an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a programmable logic controller readable medium, and the computer program contains program code for executing the method shown in the flowchart.
  • the computer program can be downloaded and installed from the network through the communication device 1009, or installed from the storage device 1003, or installed from the ROM 1002.
  • the processing device 1001 the above functions defined in the method of the embodiment of the present disclosure are performed.
  • the electronic device provided by the present invention adopts the hybrid execution method of the programmable logic controller in the above embodiment, and solves the technical problem of high execution limitations of executing program files through the parsing end of the target platform.
  • the beneficial effects of the electronic device provided by the embodiment of the present invention are the same as the beneficial effects of the hybrid execution method of the programmable logic controller provided by the above embodiment, and other technical features in the electronic device are the same as the features disclosed in the above embodiment method, which will not be repeated here.
  • This embodiment provides a computer-readable storage medium having programmable logic controller-readable program instructions stored thereon, and the programmable logic controller-readable program instructions are used to execute the hybrid execution method of the programmable logic controller in the above-mentioned embodiment.
  • the computer-readable storage medium provided in the embodiment of the present invention may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable programmable logic controller disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.
  • a USB flash drive but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable programmable logic controller disk, a hard disk, a
  • the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, system or device.
  • the program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination thereof.
  • the computer-readable storage medium may be included in the electronic device, or may exist independently without being installed in the electronic device.
  • the above-mentioned computer-readable storage medium carries one or more programs.
  • the electronic device obtains the program instructions to be executed of the target instruction program; if the program instructions to be executed are interpreted instructions, then according to the interpreted execution file, the program instructions to be executed are interpreted execution to obtain corresponding interpreted execution results; if the program instructions to be executed are compiled instructions, then according to the compiled execution file, the program instructions to be executed are compiled execution to obtain corresponding compiled execution results; return to the execution step: obtain the program instructions to be executed of the target instruction program until a mixed execution result corresponding to the target instruction program is obtained, wherein the mixed execution result includes the interpreted execution result and the compiled execution result.
  • Computer program code for performing operations of the present disclosure may be written in one or more programming languages or a combination thereof.
  • Programming languages include object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages.
  • the program code can be executed entirely on the user's programmable logic controller, partially on the user's programmable logic controller, as a separate software package, partially on the user's programmable logic controller and partially on a remote programmable logic controller, or entirely on a remote programmable logic controller or server.
  • the remote programmable logic controller can be connected to the user's programmable logic controller through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external programmable logic controller (for example, through the Internet using an Internet service provider).
  • LAN local area network
  • WAN wide area network
  • each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function.
  • the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved.
  • each box in the block diagram and/or flow chart, and the combination of the boxes in the block diagram and/or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and programmable logic controller instructions.
  • modules involved in the embodiments described in the present disclosure may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.
  • the computer-readable storage medium provided by the present invention stores programmable logic controller readable program instructions for executing the hybrid execution method of the programmable logic controller, which solves the technical problem of high execution limitations of program files executed by the parsing end of the target platform.
  • the beneficial effects of the computer-readable storage medium provided by the embodiment of the present invention are the same as the beneficial effects of the hybrid execution method of the programmable logic controller provided by the above embodiment, and will not be elaborated here.
  • the present application also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the steps of the hybrid execution method of the programmable logic controller as described above are implemented.
  • the computer program product provided by the present application solves the technical problem of high execution limitations of program files executed by the parsing end of the target platform.
  • the beneficial effects of the computer program product provided by the embodiment of the present invention are the same as the beneficial effects of the hybrid execution method of the programmable logic controller provided by the above embodiment, which will not be repeated here.

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Abstract

本申请公开了可编程逻辑控制器的混合执行方法、装置、设备及介质，包括：获取目标指令程序的待执行程序指令；若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。

Description

可编程逻辑控制器的混合执行方法、装置、设备及介质
相关申请
本申请要求于2022年11月23号申请的、申请号为202211477458.7的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及可编程逻辑控制器技术领域，尤其涉及一种可编程逻辑控制器的混合执行方法、装置、电子设备及可读存储介质。
背景技术
随着PLC(Programmable Logic Controllers，可编程逻辑控制器)技术的不断发展，对程序的执行要求也越来越高，目前，通常通过基于指令的解释型执行文件和基于指令的编译型执行文件执行程序语言，其中，解释型执行文件需要一边解释一边执行，能够较好地实现跨平台应用，编译型执行文件能够在平台上直接执行，但不可跨平台应用。
然而，在目标平台的解析端解析执行程序文件时，由于解析端只能解析并执行自身机器语言，进而导致存在当解析端接收到的程序文件为部分或完全未解析的程序文件时，解析端仍无法完全解析并执行该程序文件的情况，所以，当前通过目标平台的解析端执行程序文件的执行局限性高。
发明内容
本申请的主要目的在于提供一种可编程逻辑控制器的混合执行方法、装置、电子设备及可读存储介质，旨在解决现有技术中通过目标平台的解析端执行程序文件的执行局限性高的技术问题。
为实现上述目的，本申请提供一种可编程逻辑控制器的混合执行方法，所述可编程逻辑控制器的混合执行方法包括：
获取目标指令程序的待执行程序指令；
若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
为实现上述目的，本申请还提供一种可编程逻辑控制器的混合执行装置，所述可编程逻辑控制器的混合执行装置包括：
获取模块，用于获取目标指令程序的待执行程序指令；
指令执行模块，用于若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
程序执行模块，用于返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
本申请还提供一种电子设备，所述电子设备包括：存储器、处理器以及存储在所述存储器上并可在所述处理器上运行的所述可编程逻辑控制器的混合执行方法的程序，所述可编程逻辑控制器的混合执行方法的程序被处理器执行时可实现如上述的可编程逻辑控制器的混合执行方法的步骤。
本申请还提供一种计算机可读存储介质，所述计算机可读存储介质上存储有实现可编程逻辑控制器的混合执行方法的程序，所述可编程逻辑控制器的混合执行方法的程序被处理器执行时实现如上述的可编程逻辑控制器的混合执行方法的步骤。
本申请还提供一种计算机程序产品，包括计算机程序，所述计算机程序被处理器执行时实现如上述的可编程逻辑控制器的混合执行方法的步骤。
本申请提供了一种可编程逻辑控制器的混合执行方法、装置、电子设备及可读存储介质，也即，获取目标指令程序的待执行程序指令；若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。由于待执行程序指令为解释型指令或编译型指令时，目标平台的解析端均能实现对待执行程序指令的解析执行，进而在获取目标指令程序中所有的待执行程序指令后，得到对应的程序混合执行结果，即可在目标平台的解析端完全执行目标指令程序，其中，程序混合执行结果包括解释型执行结果和编译型执行结果，也即，实现了通过解析端同时使用解释型解析执行和编译型直接执行对目标指令程序进行混合执行的目的，也即，实现了通过解析端可解析并执行多种不同类型的指令程序的目的，而非解析端只能解析并执行与自身执行逻辑相匹配的程序文件，所以克服了当解析端接收到的程序文件为部分或完全未解析的程序文件时，由于解析端在解析并执行程序文件的执行逻辑上的局限性，导致出现程序文件仍然无法完全解析并执行的情况的技术缺陷，所以，降低了通过目标平台的解析端执行程序文件的执行局限性。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本申请的实施例，并与说明书一起用于解释本申请的原理。
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，对于本领域普通技术人员而言，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本申请可编程逻辑控制器的混合执行方法第一实施例的流程示意图；
图2为本申请可编程逻辑控制器的混合执行方法解释型指令程序的执行流程示意图；
图3为本申请可编程逻辑控制器的混合执行方法解释型指令程序的混合执行示意图；
图4为本申请可编程逻辑控制器的混合执行方法编译型执行文件加载至解析端的文件结构示意图；
图5为本申请可编程逻辑控制器的混合执行方法解释型指令程序的处理逻辑图；
图6为本申请可编程逻辑控制器的混合执行方法第二实施例的流程示意图；
图7为本申请可编程逻辑控制器的混合执行装置实施例的示意图；
图8为本申请实施例中可编程逻辑控制器的混合执行方法涉及的硬件运行环境的设备结构示意图。
本申请目的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其它实施例，均属于本发明保护的范围。
实施例一
首先，应当理解的是，传统的PLC通常设置编译端和解析端，其中，编译端用于根据编译型编译器和/或解释型编译器对初始指令程序进行编译，以得到解析端能够识别和运行的机器语言，进而编译端在将初始程序编译完成后发送至解析端，解析端再进行解析执行，例如，假设初始指令程序是混合了解释型指令和编译型指令的指令程序，则在编译端采用解释型编译和编译型编译两种方法，得到解析端能够识别的程序文件，进而以供解析端直接运行该程序文件，目前，解析端的运行方式通常分为解释型解析执行和编译型直接执行两种，并且，解析端仅支持解释型解析执行和编译型直接执行中的一种，其中，解释型解析执行是通过逐条解析解释型程序文件中的程序指令，进而根据程序指令集执行每条指令，编译型直接执行则是直接运行编译型的可执行程序文件，但是，两种运行方式各有优劣处，解释型解析执行在运行时需二次解释程序文件，所以使得运行速度较慢，对于复杂的逻辑运算的处理也较为困难，但是逐条执行的运行方式可以确保程序文件在运行过程中的灵活性，而编译型直接执行是通过加载可执行程序文件直接运行，所以使得运行速度较快，缺点则在于无法在加载后对程序文件随意修改。
但是，解析端接收到等待解析执行的初始指令程序并不一定完全符合解析端支持的运行方式，例如， 假设解析端支持解释型解析执行，但初始指令程序为混合了解释型指令和编译型指令的混合指令程序，那么解析端只能够执行初始指令程序中的解释型指令，而无法执行初始指令程序中的编译型指令，也即，由于解析端只能解析并执行自身支持的程序指令执行逻辑，进而导致存在当解析端接收到的程序文件为部分或完全未解析的程序文件时，解析端却无法解析执行该初始指令程序的情况，所以，当前倘若要通过解析端解析执行程序文件，则对接收到的程序文件有一定的限制，所以，目前亟需一种降低通过目标平台的解析端执行程序文件的执行局限性的方法。
本申请实施例提供一种可编程逻辑控制器的混合执行方法，在本申请可编程逻辑控制器的混合执行方法的第一实施例中，参照图1，所述可编程逻辑控制器的混合执行方法包括：
步骤S10，获取目标指令程序的待执行程序指令；
步骤S20，若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
步骤S30，返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
在本实施例中，需要说明的是，所述可编程逻辑控制器的混合执行方法应用于目标平台的解析端，所述解析端集成有编译指令程序和执行指令程序等功能，所述目标指令程序为初始指令程序，其中，所述初始指令程序可以为经由编译端进行部分解析的指令程序，也可以为尚未进行解析的指令程序，所述待执行程序指令为等待进行编译的程序指令，所述目标指令程序由所述待执行程序指令构成，所述待执行程序指令可以为一个或多个，根据运行方式的不同，所述待执行程序指令具体可以为解释型指令或编译型指令，其中，所述解释型指令通过解释型执行文件解析执行，所述编译型指令通过编译型执行文件直接执行，由于所述待执行程序指令可以为多个，进而当所述目标指令程序包含多个待执行程序指令时，所述目标指令程序可以为由解释型指令和编译型指令混合而成的混合指令程序，可以为全由解释型指令组成的纯解释型指令程序，也可以为全由编译型指令组成的纯编译型指令程序，其中，所述解释型指令具体可以为顺序功能图(SFC)、功能模块图(FBD)、梯形图(LD)以及指令表(IL)等，所述编译型指令具体可以为选用结构文本语句(ST)语句构成的伪解释型指令以及指令表(IL)等。
可以理解的是，为解决解析端无法执行指令程序的技术缺陷，通常通过在解析端设置解释型解析执行或编译型直接执行两种运行方式之一，而此方法固然能够执行部分目标指令程序，例如，假设目标指令程序为由编译端解释型编译后的纯解释型指令程序，解析端内置解释型解释器，也即，解析端部署有解释型解析执行逻辑，进而解析端通过逐条解析目标指令程序中的解释型指令，即可执行该目标指令程序，但是，当目标指令程序为完全未解析的指令程序或目标指令程序中未解析的程序指令无法通过解析 端解析并执行时，则会导致目标指令程序在目标平台的解析端无法完全执行。
另外地，需要说明的是，所述解析端用于实现对目标指令程序的执行，可设置解释型解析执行和编译型直接执行两种运行方式，当待执行程序指令为解释型指令时，可通过解释型执行文件解析所述解释型指令，当待执行程序指令为编译型指令，可通过编译型执行文件解析所述编译型指令，所述解释型执行文件为解释型指令的可执行文件，所述编译型执行文件为编译型指令的可执行文件，所述程序混合执行结果包括所述解释型执行结果和所述编译型执行结果，具体可以为解释型解析目标指令程序，并编译型执行目标指令程序中的编译型指令的程序执行结果，也可以为解释型解析目标指令程序，并解释型执行目标指令程序中的解释型指令和编译型执行目标指令程序中的编译型指令的程序执行结果，也即，对所述目标指令程序的解析执行需混合解释型解析执行逻辑以及编译型解析处理逻辑，其中，所述解释型执行结果为通过解释型执行文件解析执行的结果，所述编译型执行结果为通过编译型执行文件编译执行的结果，所述解释型执行文件和编译型执行文件分别包含对应程序指令的执行程序，通过调用执行程序可执行相应的程序指令，例如，在一种可实施的方式中，假设所述解析端为在内置解释型执行文件的基础上增加对编译型执行文件的解析处理逻辑的解析端，所述目标指令程序为携带解释型指令和编译型指令的解释型指令程序，则所述解析端的执行逻辑为调用解释型执行文件解析执行解释型指令，以及调用编译型执行文件直接执行编译型指令，以执行所述解释型指令程序。
作为一种示例，步骤S10至步骤S30包括：通过第一预设扫描方式提取解释型指令程序的待执行程序指令，其中，所述解释型指令程序用于表征程序中的指令需逐条解析执行，所述第一预设扫描方式具体可以为词法扫描方式或循环扫描方式等，所述第一预设扫描方式用于按照预设扫描顺序依次提取所述解释型指令程序中的待执行程序指令；若判定所述待执行程序指令为解释型指令，则通过解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若判定所述待执行程序指令为编译型指令，则通过编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；返回执行步骤：通过预设扫描方式提取目标指令程序的待执行程序指令，若未提取到所述待执行程序指令，则将所述解释型执行结果和所述编译型执行结果共同作为所述目标指令程序的混合执行结果，若提取到所述待执行程序指令，则提取所述待执行程序指令，并执行步骤：若所述待执行程序指令为解释型指令，则通过解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则通过编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。由于解析端设置有解释型执行文件和编译型执行文件，进而当解释型指令程序为完全未解析的指令程序或目标指令程序中未解析的程序指令无法通过解析端进行解析执行时，可通过调用对应类型的执行文件分别执行目标指令程序中的解释型指 令和编译型指令，得到包括解释型执行结果和所述编译型执行结果的混合执行结果，进而实现了对解释型指令程序进行混合执行的目的，所以克服了解释型指令程序在目标平台的解析端无法完全执行的技术缺陷，从而提高了通过目标平台的解析端执行程序文件的执行局限性。
在一种可实施的方式中，假设所述解析端预先内置解释型可执行文件，并设置加载编译型直接执行的处理逻辑，所述待执行程序指令解释型指令和编译型指令，且所述解释型指令和所述编译型指令之间不存在调用关系，进而当获取到待执行程序指令后，可通过预先设置的解释型指令的集合判断所述待执行程序指令是否为解释型指令，倘若通过预设解释型指令集判定所述待执行程序指令为编译型指令，则通过调用所述编译型指令对应的编译型可执行文件，对所述编译型指令进行编译型执行，以得到编译型执行结果，倘若通过预设解释型指令集判定所述待执行程序指令为解释型指令，则通过调用解释型指令对应的解释型可执行文件，对所述解释型指令进行解释型执行，以得到解释型执行结果。
其中，在所述若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
步骤A10，检测预设解释型程序指令集中是否存在所述待执行程序指令；
步骤A20，若存在，则确定所述待执行程序指令为解释型指令；
步骤A30，若不存在，则确定所述待执行程序指令为编译型指令。
在本实施例中，需要说明的是，当所述解析端内置解释型可执行文件时，可基于所述预设解释型程序指令集判断所述待执行程序指令的指令类型，所述预设解释型程序指令集为预先设置的解释型程序指令的集合，通过预设解释程序指令判定解释型指令程序的所有程序指令后，进而通过解释型执行文件和编译型执行文件逐条解析执行解释型指令程序中的程序指令，得以得到整个解释型指令程序的混合执行结果，例如，在一种可实施的方式中，假设所述解释型指令程序一部分为解释型指令，另一部分为编译型指令，进而执行所述解释型指令程序需调用解释型执行文件和编译型执行文件，也即，所述解释型指令程序的混合执行结果混合了解释型指令的解释型执行结果和编译型指令的编译型执行结果，当解释型指令程序的混合执行结果包括解释型执行结果和编译型执行结果时，则表明所述解释型指令程序包括解释型指令和编译型指令，例如，在一种可实施的方式中，假设解析端内置解释型执行文件，且所述解释型指令程序包括解释型指令A1、解释型指令A2、编译型指令B1以及编译型指令B2，则可通过解释型执行文件解析执行解释型指令A1和解释型指令A2，以及通过编译型执行文件直接执行编译型指令B1和编译型指令B2，以得到执行解释型指令程序的混合执行结果。
在一种可实施的方式中，参照图2，图2为表示解释型指令程序的执行流程示意图，其中，所述解 释型指令程序包括程序指令1、程序指令2、程序指令3以及程序指令4，通过预设解释型程序指令集对解释型指令程序中的程序指令进行一一判定，进而当预设解释型程序指令集中存在程序指令1和程序指令3时，通过调用解释型执行文件即可直接执行，以及调用对应的编译型执行文件执行程序指令2和程序指令4，其中，倘若程序指令2调用了程序指令1，则在执行程序指令1时通过调用对应的解释型执行文件进行执行。
作为一种示例，步骤A10至步骤A30包括：通过一一比对所述待执行程序指令和预设解释型指令集的预设解释型程序指令，确定所述预设解释型指令集是否存在所述待执行程序指令；若所述预设解释型指令集存在与所述待执行程序指令一致的预设解释型程序指令，则确定所述待执行程序指令为解释型指令；若所述预设解释型指令集不存在与所述待执行程序指令一致的预设解释型程序指令，则确定所述待执行程序指令为编译型指令。
其中，所述根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的步骤包括：
步骤B10，获取所述编译型执行文件的待执行文件指令；
步骤B20，根据所述待执行文件指令对应的指令执行文件，执行所述待执行文件指令，得到对应的指令执行结果，其中，所述指令执行文件为所述解释型执行文件或所述编译型执行文件；
步骤B30，返回执行步骤：获取所述编译型执行文件的待执行文件指令，直至得到所述编译型执行文件的编译型执行结果。
在本实施例中，需要说明的是，执行所述解释型指令程序的编译型指令的过程即为执行编译型执行文件的过程，所述待执行文件指令为等待执行的编译型文件指令，当编译型执行文件执行编译型程序指令中，当编译型执行文件中的待执行文件执行指令均执行完成时，则得到所述编译型执行文件的编译型执行结果，所述指令执行文件用于执行所述编译型执行文件中的待执行文件执行。
另外地，需要说明的是，所述待执行文件指令包括编译型文件指令和混合型文件指令，其中，编译型文件指令可基于编译型文件指令对应的编译型执行文件直接执行，混合型文件指令用于表征混合解释型指令的编译型文件指令，也即，所述编译型文件指令调用解释型指令，例如，在一种可实施的方式中，假设所述解释型指令程序中包括待执行文件指令A1和待执行文件指令A2，其中，待执行文件指令A1调用解释型指令B1，待执行文件指令A2未调用任意解释型指令，则A1为所述混合型文件指令，A2为编译型文件指令。
另外地，需要说明的是，在内置解释型执行文件的解析端，当待执行文件指令为混合型文件指令时(编译型文件指令调用解释型指令)，调用编译型文件指令对应的指令执行文件(编译型执行文件)执行编译型文件指令，以及调用解释型指令对应的指令执行文件(解释型执行文件)执行解释型指令，以 实现对编译型文件指令进行混合执行的目的，例如，参照图3，图3为表示解释型指令程序的混合执行示意图，其中，所述解释型指令程序中包括混合型文件指令，所述混合型文件指令设置有解释型指令C1、解释型指令C2以及编译型指令D1，编译型指令D1调用解释型指令C1，预设解释型指令集中存在解释型指令C1和解释型指令C2一致的解释型指令，倘若对所述解释型指令程序进行解析执行，则执行过程为：通过调用内置的解释型指令C1和解释型指令C2分别对应的解释型执行文件执行解释型指令C1和解释型指令C2，通过调用编译型指令D1对应的编译型执行文件，以及通过调用解释型指令C2对应的解释型执行文件，执行编译型指令D1，进而在执行完解释型指令C1、解释型指令C2以及编译型指令D1后，得到所述解释型指令程序的混合执行结果。
作为一种示例，步骤B10至步骤B30包括：通过第二预设扫描方式获取所述编译型执行文件的待执行文件指令，其中，所述第二预设扫描方式用于按照预设扫描顺序依次提取所述编译型执行文件的待执行文件指令，所述第二预设扫描方式具体可以为词法扫描方式或循环扫描方式等；若判定所述待执行文件指令为编译型指令，则执行所述待执行文件指令，若判定所述待执行文件指令为解释型指令，则通过调用所述待执行文件指令对应的解释型执行文件，执行所述待执行文件指令，得到对应的指令执行结果；返回执行步骤：获取所述编译型执行文件的待执行文件指令，直至得到所述编译型执行文件的编译型执行结果。由于解析端设置有解释型执行文件和编译型执行文件，进而当编译型执行文件中包含解释型指令和编译型指令时，可通过调用解释型执行文件执行解释型指令，以及调用编译型执行文件执行编译型指令，也即，实现了通过调用解释型执行文件或编译型执行文件执行待执行文件指令的目的，进而得到对应的编译型执行结果，所以克服了调用解释型指令的编译型执行文件无法在内置解释型执行文件和加载编译型执行文件的解析端执行的技术缺陷，所以，为进一步降低通过目标平台的解析端执行程序文件的执行局限性奠定了基础。
其中，所述根据所述待执行文件指令对应的指令执行文件，执行所述待执行文件指令，得到对应的指令执行结果的步骤包括：
步骤C10，若所述待执行文件指令为所述解释型指令，则获取所述解释型执行文件对应的第一文件存储地址；根据所述解释型指令在所述第一文件存储地址的第一实际存储位置，执行所述解释型指令，得到对应的指令执行结果；或
步骤C20，若所述待执行文件指令为所述编译型指令，则获取所述编译型执行文件对应的第二文件存储地址；根据所述编译型指令在所述第二文件存储地址的第二实际存储位置，执行所述编译型指令，得到对应的指令执行结果。
在本实施例中，需要说明的是，解释型执行文件和编译型执行文件分别存储于所述目标平台的解析端的不同文件存储空间，通过读取不同的文件存储地址查询对应的执行文件以实现对应变量或函数的调 用，进而实现得到编译型指令对应的编译型执行结果的目的，其中，所述解释型执行文件可调用所述待执行程序指令对应的函数，所述编译型执行文件可调用所述待执行程序指令对应的函数或变量，所述解释型执行文件和编译型执行文件均可实现执行一个或多个程序指令，所述解释型执行文件下或所述编译型执行文件下的程序指令的实际存储位置不同，例如，在一种可实施的方式中，假设内置的解释型执行文件包括在解析端的文件存储地址为a/b/c，则在所述解释型执行文件下的待执行程序指令的实际存储位置可以为a/b/c/d1、a/b/c/d2以及a/b/c/d3等。
作为一种示例，步骤C10至步骤C20包括：若所述待执行文件指令为所述解释型指令，则查询所述解释型指令对应的解释型执行文件的第一文件存储地址；通过调用所述第一文件存储地址的第一实际存储位置存储的函数，对所述解释型指令进行执行，得到对应的指令执行结果；或
若所述待执行文件指令为所述编译型指令，则查询所述编译型指令对应的编译型执行文件的第二文件存储地址；通过调用所述第二文件存储地址的第二实际存储位置存储的函数或变量，对所述编译型指令进行执行，得到对应的指令执行结果。
其中，在所述获取目标指令程序的待执行程序指令的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
步骤D10，获取编译型执行文件，其中，所述编译型执行文件包括解释型指令和编译型指令；
步骤D20，将所述解释型指令的指令初始存储位置重定位为第一实际存储位置；
步骤D30，根据所述编译型指令的相对存储地址信息，在预设地址映射表中查询对应的第二实际存储位置；
步骤D40，将所述第一实际存储位置作为所述解释型指令的实际存储位置，以及将第二实际存储位置作为所述编译型指令的实际存储位置。
在本实施例中，需要说明的是，当所述目标平台的解析端内置解释型执行文件时，则需调用加载的编译型执行文件直接执行解释型指令程序中的编译型指令，其中，所述编译型执行文件包括解释型指令和编译型指令，由于调用的编译型执行文件在加载至解析端的地址为虚拟地址，进而需将所述编译型执行文件中的解释型指令和编译型指令进行重定位，例如，参照图4，图4为表示编译型执行文件加载至解析端的文件结构示意图，其中，编译型执行文件加载至解析端时，文件中存放的变量和指令存储位置均为相对地址，进而需重定位出文件中存放的变量和指令的真实存储位置，所述相对存储地址信息用于表征所述编译型指令的相对存储地址，预设地址映射表用于存储所述编译型指令的相对存储地址信息和实际存储位置之间的映射关系，进而通过第一实际存储位置和第二存储位置可确定非内置的编译型执行文件的文件存储位置，也即，所述第二文件存储地址。
作为一种示例，步骤D10至步骤D40包括：获取编译型执行文件，其中，所述编译型执行文件包 括解释型指令和编译型指令；查询所述解释型指令的指令初始存储位置，并将所述指令初始存储位置重定位为第一实际存储位置，其中，所述指令初始存储位置用于表征程序指令的初始存储位置；以所述编译型指令的相对存储地址信息为索引，查询预设地址映射表中对应的第二实际存储位置；将所述第一实际存储位置作为所述解释型指令的实际存储位置，以及将第二实际存储位置作为所述编译型指令的实际存储位置，其中，第一实际存储位置和所述第二实际存储位置的父地址一致，也即，所述解释型指令和编译型指令均存储于同一父地址(第二文件存储地址)，例如，假设所述文件指令存储地址包括d/f/g1和d/f/g2等，则所述第二文件存储地址为d/f。
其中，在所述根据所述编译型指令的相对存储地址信息，在预设地址映射表中查询对应的第二实际存储位置的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
步骤E10，获取各预设编译型指令的相对存储地址信息以及预设数量的第二实际存储位置；.
步骤E20，根据各所述相对存储地址信息和各所述第二实际存储位置之间的一一对应关系，建立预设地址映射表。
作为一种示例，步骤E10至步骤E20包括：为所述编译型执行指令分配第二文件存储地址，并在所述第二文件存储地址获取预设数量的第二实际存储位置，以及获取各预设编译型指令的相对存储地址信息；根据各所述相对存储地址信息和各所述第二实际存储位置之间的一一对应关系，建立预设地址映射表。
在一种可实施的方式中，参照图5，图5为解释型指令程序的处理逻辑图，其中，解析处理过程包括启动过程和执行过程，启动过程用于实现编译型执行文件的重定位，执行过程用于实现执行所述解释型指令程序，执行过程和启动过程具体可参照图示，在此不再赘述。
本申请实施例提供了一种可编程逻辑控制器的混合执行方法，也即，获取目标指令程序的待执行程序指令；若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。由于待执行程序指令为解释型指令或编译型指令时，目标平台的解析端均能实现对待执行程序指令的解析执行，进而在获取目标指令程序中所有的待执行程序指令后，得到对应的程序混合执行结果，即可在目标平台的解析端完全执行目标指令程序，其中，程序混合执行结果包括解释型执行结果和编译型执行结果，也即，实现了通过解析端同时使用解释型解析执行和编译型直接执行对目标指令程序进行混合执行的目的，也即，实现了通过解析端可解析并执行多种不同类型的指令程序的目的，而非解析端只能解析并执行与自身执行逻辑相匹配的程序文件，所以克服了 当解析端接收到的程序文件为部分或完全未解析的程序文件时，由于解析端在解析并执行程序文件的执行逻辑上的局限性，导致出现程序文件仍然无法完全解析并执行的情况的技术缺陷，所以，降低了通过目标平台的解析端执行程序文件的执行局限性。
实施例二
进一步地，参照图6，在本申请另一实施例中，与上述实施例一相同或相似的内容，可以参考上文介绍，后续不再赘述。在此基础上，在所述若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
步骤F10，根据解释型执行文件，解析所述目标指令程序是否为解释型指令程序；
步骤F20，若所述目标指令程序为所述解释型指令程序，则执行步骤：若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
步骤F30，若所述目标指令程序不为所述解释型指令程序，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果。
在本实施例中，需要说明的是，由于解析端内置解释型执行文件的执行逻辑，且所述目标指令程序可以为解释型指令程序或编译型指令程序，其中，所述编译型指令程序用于表征程序中的指令可直接执行，当目标指令程序为解释型指令程序时，对解释型指令程序的混合执行逻辑可参照上述实施例，在此不再赘述，当目标指令程序为编译型指令程序时，内置解释型执行文件的解析端仍可实现对编译型指令程序的混合执行。
作为一种示例，步骤F10至步骤F30包括：根据所述目标指令程序对应的解释型执行文件，解析所述目标指令程序中的程序标识，根据所述程序标识，判别所述目标程序指令是否为解释型指令程序，其中，所述程序标识用于标识所述目标指令程序的程序类型，具体可在目标指令程序的编译阶段进行设置；若判定所述目标指令程序为所述解释型指令程序，则执行步骤：若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；若判定所述目标指令程序为所述编译型指令程序，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果，其中，所述根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的具体步骤可参照上述实施例，在 此不再赘述。
例如，在一种可实施的方式中，假设所述目标指令程序仅由一个未调用解释型指令的编译型指令构成，则首先基于解释型执行文件解析判定该目标指令程序为编译型指令程序，进而基于编译型指令对应的编译型执行文件，执行所述编译型指令，以得到所述目标指令程序的混合执行结果，假设所述目标指令程序仅由一个调用解释型指令的编译型指令构成，则首先基于解释型执行文件解析判定该目标指令程序为编译型指令程序，进而通过调用编译型指令对应的编译型执行文件执行编译型指令，以及通过调用解释型执行文件对应的解释型执行文件执行编译型指令调用的解释型指令，以执行所述编译型指令，进而得到所述目标指令程序的混合执行结果。
本申请实施例提供了一种待执行程序指令的混合执行方法，也即，获取所述编译型执行文件的待执行文件指令；根据所述待执行文件指令对应的指令执行文件，执行所述待执行文件指令，得到对应的指令执行结果，其中，所述指令执行文件为所述解释型执行文件或所述编译型执行文件；返回执行步骤：获取所述编译型执行文件的待执行文件指令，直至得到所述编译型执行文件的编译型执行结果。相比于通过解释型执行文件和编译型执行文件对解释型指令程序进行执行的程序混合执行方式，本申请实施例在解析到目标指令程序为解释型指令程序时，通过解释型执行文件对编译型指令调用的解释型指令进行执行，通过编译型执行文件对编译型指令进行执行，也即，实现了通过解释型执行文件和编译型执行文件对编译型指令进行混合执行的目的，在解析到目标指令程序为编译型指令程序时，通过编译型执行文件执行目标指令程序，也即，实现了通过解释型执行文件和编译型执行文件对目标指令程序进行混合执行的目的，所以，为提升通过目标平台的解析端执行程序文件的执行局限性奠定了基础。
实施例三
本申请实施例还提供一种可编程逻辑控制器的混合执行装置，参照图7，所述可编程逻辑控制器的混合执行装置包括：
获取模块101，用于获取目标指令程序的待执行程序指令；
指令执行模块102，用于若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
程序执行模块103，用于返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
在一实施例中，所述指令执行模块102还用于：
获取所述编译型执行文件的待执行文件指令；
根据所述待执行文件指令对应的指令执行文件，执行所述待执行文件指令，得到对应的指令执行结果，其中，所述指令执行文件为所述解释型执行文件或所述编译型执行文件；
返回执行步骤：获取所述编译型执行文件的待执行文件指令，直至得到所述编译型执行文件的编译型执行结果。
在一实施例中，所述指令执行模块102还用于：
若所述待执行文件指令为所述解释型指令，则获取所述解释型执行文件对应的第一文件存储地址；根据所述解释型指令在所述第一文件存储地址的第一实际存储位置，执行所述解释型指令，得到对应的指令执行结果；或
若所述待执行文件指令为所述编译型指令，则获取所述编译型执行文件对应的第二文件存储地址；根据所述编译型指令在所述第二文件存储地址的第二实际存储位置，执行所述编译型指令，得到对应的指令执行结果。
在一实施例中，所述可编程逻辑控制器的混合执行装置还用于：
检测预设解释型程序指令集中是否存在所述待执行程序指令；
若存在，则确定所述待执行程序指令为解释型指令；
若不存在，则确定所述待执行程序指令为编译型指令。
在一实施例中，所述可编程逻辑控制器的混合执行装置还用于：
根据解释型执行文件，解析所述目标指令程序是否为解释型指令程序；
若所述目标指令程序为所述解释型指令程序，则执行步骤：若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
若所述目标指令程序不为所述解释型指令程序，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果。
在一实施例中，所述可编程逻辑控制器的混合执行装置还用于：
获取编译型执行文件，其中，所述编译型执行文件包括解释型指令和编译型指令；
将所述解释型指令的指令初始存储位置重定位为第一实际存储位置；
根据所述编译型指令的相对存储地址信息，在预设地址映射表中查询对应的第二实际存储位置；
将所述第一实际存储位置作为所述解释型指令的实际存储位置，以及将第二实际存储位置作为所述编译型指令的实际存储位置。
在一实施例中，所述可编程逻辑控制器的混合执行装置还用于：
获取各预设编译型指令的相对存储地址信息以及预设数量的第二实际存储位置；
根据各所述相对存储地址信息和各所述第二实际存储位置之间的一一对应关系，建立预设地址映射表。
本发明提供的可编程逻辑控制器的混合执行装置，采用上述实施例中的可编程逻辑控制器的混合执行方法，解决了通过目标平台的解析端执行程序文件的执行局限性高的技术问题。与现有技术相比，本发明实施例提供的可编程逻辑控制器的混合执行装置的有益效果与上述实施例提供的可编程逻辑控制器的混合执行方法的有益效果相同，且该可编程逻辑控制器的混合执行装置中的其他技术特征与上述实施例方法公开的特征相同，在此不做赘述。
实施例四
本发明实施例提供一种电子设备，电子设备包括：至少一个处理器；以及，与至少一个处理器通信连接的存储器；其中，存储器存储有可被至少一个处理器执行的指令，指令被至少一个处理器执行，以使至少一个处理器能够执行上述实施例一中的可编程逻辑控制器的混合执行方法。
下面参考图8，其示出了适于用来实现本公开实施例的电子设备的结构示意图。本公开实施例中的电子设备可以包括但不限于诸如移动电话、笔记本电脑、数字广播接收器、PDA(个人数字助理)、PAD(平板电脑)、PMP(便携式多媒体播放器)、车载终端(例如车载导航终端)等等的移动终端以及诸如数字TV、台式可编程逻辑控制器等等的固定终端。图8示出的电子设备仅仅是一个示例，不应对本公开实施例的功能和使用范围带来任何限制。
如图8所示，电子设备可以包括处理装置1001(例如中央处理器、图形处理器等)，其可以根据存储在只读存储器(ROM)1002中的程序或者从存储装置1003加载到随机访问存储器(RAM)1004中的程序而执行各种适当的动作和处理。在RAM1004中，还存储有电子设备操作所需的各种程序和数据。处理装置1001、ROM1002以及RAM1004通过总线1005彼此相连。输入/输出(I/O)接口1006也连接至总线。
通常，以下系统可以连接至I/O接口1006：包括例如触摸屏、触摸板、键盘、鼠标、图像传感器、麦克风、加速度计、陀螺仪等的输入装置1007；包括例如液晶显示器(LCD)、扬声器、振动器等的输出装置1008；包括例如磁带、硬盘等的存储装置1003；以及通信装置1009。通信装置可以允许电子设备与其他设备进行无线或有线通信以交换数据。虽然图中示出了具有各种系统的电子设备，但是应理解的是，并不要求实施或具备所有示出的系统。可以替代地实施或具备更多或更少的系统。
特别地，根据本公开的实施例，上文参考流程图描述的过程可以被实现为可编程逻辑控制器软件程序。例如，本公开的实施例包括一种计算机程序产品，其包括承载在可编程逻辑控制器可读介质上的计算机程序，该计算机程序包含用于执行流程图所示的方法的程序代码。在这样的实施例中，该计算机程 序可以通过通信装置1009从网络上被下载和安装，或者从存储装置1003被安装，或者从ROM1002被安装。在该计算机程序被处理装置1001执行时，执行本公开实施例的方法中限定的上述功能。
本发明提供的电子设备，采用上述实施例中的可编程逻辑控制器的混合执行方法，解决了通过目标平台的解析端执行程序文件的执行局限性高的技术问题。与现有技术相比，本发明实施例提供的电子设备的有益效果与上述实施例提供的可编程逻辑控制器的混合执行方法的有益效果相同，且该电子设备中的其他技术特征与上述实施例方法公开的特征相同，在此不做赘述。
应当理解，本公开的各部分可以用硬件、软件、固件或它们的组合来实现。在上述实施方式的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。
实施例五
本实施例提供一种计算机可读存储介质，具有存储在其上的可编程逻辑控制器可读程序指令，可编程逻辑控制器可读程序指令用于执行上述实施例中的可编程逻辑控制器的混合执行方法。
本发明实施例提供的计算机可读存储介质例如可以是U盘，但不限于电、磁、光、电磁、红外线、或半导体的系统、系统或器件，或者任意以上的组合。计算机可读存储介质的更具体的例子可以包括但不限于：具有一个或多个导线的电连接、便携式可编程逻辑控制器磁盘、硬盘、随机访问存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑磁盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。在本实施例中，计算机可读存储介质可以是任何包含或存储程序的有形介质，该程序可以被指令执行系统、系统或者器件使用或者与其结合使用。计算机可读存储介质上包含的程序代码可以用任何适当的介质传输，包括但不限于：电线、光缆、RF(射频)等等，或者上述的任意合适的组合。
上述计算机可读存储介质可以是电子设备中所包含的；也可以是单独存在，而未装配入电子设备中。
上述计算机可读存储介质承载有一个或者多个程序，当上述一个或者多个程序被电子设备执行时，使得电子设备：获取目标指令程序的待执行程序指令；若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
可以以一种或多种程序设计语言或其组合来编写用于执行本公开的操作的计算机程序代码，上述程 序设计语言包括面向对象的程序设计语言—诸如Java、Smalltalk、C++，还包括常规的过程式程序设计语言—诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户可编程逻辑控制器上执行、部分地在用户可编程逻辑控制器上执行、作为一个独立的软件包执行、部分在用户可编程逻辑控制器上部分在远程可编程逻辑控制器上执行、或者完全在远程可编程逻辑控制器或服务器上执行。在涉及远程可编程逻辑控制器的情形中，远程可编程逻辑控制器可以通过任意种类的网络——包括局域网(LAN)或广域网(WAN)—连接到用户可编程逻辑控制器，或者，可以连接到外部可编程逻辑控制器(例如利用因特网服务提供商来通过因特网连接)。
附图中的流程图和框图，图示了按照本发明各种实施例的系统、方法和计算机程序产品的可能实现的体系架构、功能和操作。在这点上，流程图或框图中的每个方框可以代表一个模块、程序段、或代码的一部分，该模块、程序段、或代码的一部分包含一个或多个用于实现规定的逻辑功能的可执行指令。也应当注意，在有些作为替换的实现中，方框中所标注的功能也可以以不同于附图中所标注的顺序发生。例如，两个接连地表示的方框实际上可以基本并行地执行，它们有时也可以按相反的顺序执行，这依所涉及的功能而定。也要注意的是，框图和/或流程图中的每个方框、以及框图和/或流程图中的方框的组合，可以用执行规定的功能或操作的专用的基于硬件的系统来实现，或者可以用专用硬件与可编程逻辑控制器指令的组合来实现。
描述于本公开实施例中所涉及到的模块可以通过软件的方式实现，也可以通过硬件的方式来实现。其中，模块的名称在某种情况下并不构成对该单元本身的限定。
本发明提供的计算机可读存储介质，存储有用于执行上述可编程逻辑控制器的混合执行方法的可编程逻辑控制器可读程序指令，解决了通过目标平台的解析端执行程序文件的执行局限性高的技术问题。与现有技术相比，本发明实施例提供的计算机可读存储介质的有益效果与上述实施例提供的可编程逻辑控制器的混合执行方法的有益效果相同，在此不做赘述。
实施例六
本申请还提供一种计算机程序产品，包括计算机程序，所述计算机程序被处理器执行时实现如上述的可编程逻辑控制器的混合执行方法的步骤。
本申请提供的计算机程序产品解决了通过目标平台的解析端执行程序文件的执行局限性高的技术问题。与现有技术相比，本发明实施例提供的计算机程序产品的有益效果与上述实施例提供的可编程逻辑控制器的混合执行方法的有益效果相同，在此不做赘述。
以上仅为本申请的实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利处理范围内。

Claims (10)

  1. 一种可编程逻辑控制器的混合执行方法，其中，所述可编程逻辑控制器的混合执行方法包括：
    获取目标指令程序的待执行程序指令；
    若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
    返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
  2. 如权利要求1所述可编程逻辑控制器的混合执行方法，其中，所述根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的步骤包括：
    获取所述编译型执行文件的待执行文件指令；
    根据所述待执行文件指令对应的指令执行文件，执行所述待执行文件指令，得到对应的指令执行结果，其中，所述指令执行文件为所述解释型执行文件或所述编译型执行文件；
    返回执行步骤：获取所述编译型执行文件的待执行文件指令，直至得到所述编译型执行文件的编译型执行结果。
  3. 如权利要求2所述可编程逻辑控制器的混合执行方法，其中，所述根据所述待执行文件指令对应的指令执行文件，执行所述待执行文件指令，得到对应的指令执行结果的步骤包括：
    若所述待执行文件指令为所述解释型指令，则获取所述解释型执行文件对应的第一文件存储地址；根据所述解释型指令在所述第一文件存储地址的第一实际存储位置，执行所述解释型指令，得到对应的指令执行结果；或
    若所述待执行文件指令为所述编译型指令，则获取所述编译型执行文件对应的第二文件存储地址；根据所述编译型指令在所述第二文件存储地址的第二实际存储位置，执行所述编译型指令，得到对应的指令执行结果。
  4. 如权利要求1所述可编程逻辑控制器的混合执行方法，其中，在所述若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
    检测预设解释型程序指令集中是否存在所述待执行程序指令；
    若存在，则确定所述待执行程序指令为解释型指令；
    若不存在，则确定所述待执行程序指令为编译型指令。
  5. 如权利要求1所述可编程逻辑控制器的混合执行方法，其中，
    在所述若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
    根据解释型执行文件，解析所述目标指令程序是否为解释型指令程序；
    若所述目标指令程序为所述解释型指令程序，则执行步骤：若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
    若所述目标指令程序不为所述解释型指令程序，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果。
  6. 如权利要求1或5所述可编程逻辑控制器的混合执行方法，其中，在所述获取目标指令程序的待执行程序指令的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
    获取编译型执行文件，其中，所述编译型执行文件包括解释型指令和编译型指令；
    将所述解释型指令的指令初始存储位置重定位为第一实际存储位置；
    根据所述编译型指令的相对存储地址信息，在预设地址映射表中查询对应的第二实际存储位置；
    将所述第一实际存储位置作为所述解释型指令的实际存储位置，以及将第二实际存储位置作为所述编译型指令的实际存储位置。
  7. 如权利要求6所述可编程逻辑控制器的混合执行方法，其中，在所述根据所述编译型指令的相对存储地址信息，在预设地址映射表中查询对应的第二实际存储位置的步骤之前，所述可编程逻辑控制器的混合执行方法还包括：
    获取各预设编译型指令的相对存储地址信息以及预设数量的第二实际存储位置；
    根据各所述相对存储地址信息和各所述第二实际存储位置之间的一一对应关系，建立预设地址映射表。
  8. 一种可编程逻辑控制器的混合执行装置，其中，所述可编程逻辑控制器的混合执行装置包括：
    获取模块，用于获取目标指令程序的待执行程序指令；
    指令执行模块，用于若所述待执行程序指令为解释型指令，则根据解释型执行文件，对所述待执行程序指令进行解释型执行，得到对应的解释型执行结果，若所述待执行程序指令为编译型指令，则根据编译型执行文件，对所述待执行程序指令进行编译型执行，得到对应的编译型执行结果；
    程序执行模块，用于返回执行步骤：获取目标指令程序的待执行程序指令，直至得到所述目标指令程序对应的混合执行结果，其中，所述混合执行结果包括所述解释型执行结果和所述编译型执行结果。
  9. 一种电子设备，其中，所述电子设备包括：
    至少一个处理器；以及，
    与所述至少一个处理器通信连接的存储器；其中，
    所述存储器存储有可被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行权利要求1至7中任一项所述的可编程逻辑控制器的混合执行方法的步骤。
  10. 一种计算机可读存储介质，其中，所述计算机可读存储介质上存储有实现可编程逻辑控制器的混合执行方法的程序，所述实现可编程逻辑控制器的混合执行方法的程序被处理器执行以实现如权利要求1至7中任一项所述可编程逻辑控制器的混合执行方法的步骤。
PCT/CN2023/105765 2022-11-23 2023-07-04 可编程逻辑控制器的混合执行方法、装置、设备及介质 WO2024109090A1 (zh)

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