WO2024106534A1

WO2024106534A1 - Ac-coupling circuit and transimpedance amplifier

Info

Publication number: WO2024106534A1
Application number: PCT/JP2023/041443
Authority: WO
Inventors: 淳神田; 浩崇中村; 泰彦中西; 直志美濃谷; 正俊十林; 修弘豊田; 正史野河; 義和卜部
Original assignee: 日本電信電話株式会社; Ｎｔｔイノベーティブデバイス株式会社
Priority date: 2022-11-18
Filing date: 2023-11-17
Publication date: 2024-05-23

Abstract

Provided is a transimpedance amplifier from which a stable output voltage can be obtained in a short time regardless of the timing of a control signal. The transimpedance amplifier comprises: a transimpedance amplifier/core circuit that amplifies a current input to an input terminal with a desired gain, and outputs the amplified current as a voltage signal; one or a plurality of buffer circuits that differentially amplify and output the output signal from the transimpedance amplifier/core circuit; and an AC-coupling circuit that is inserted between the transimpedance amplifier/core circuit and the buffer circuit or between the plurality of buffer circuits, the AC-coupling circuit switching two different time constants in accordance with the amplitude of the output signal. In the AC-coupling circuit, the switching time from a smaller time constant to a greater time constant is longer than the switching time from a greater time constant to a smaller time constant.

Description

AC coupling circuit and transimpedance amplifier

The present invention relates to an AC coupling circuit that inputs and outputs signals with different amplitudes, and a transimpedance amplifier to which this circuit is applied.

In optical transmission devices such as optical transmission systems that enable high-speed data transmission and Passive Optical Network (PON) systems, a transimpedance amplifier (TIA) is used in the optical receiving circuit that converts optical signals into electrical signals. A photocurrent obtained by optically/electrically converting the received optical signal using a light-receiving element such as a photodiode (PD) is input to the TIA. The input current is converted to a current-voltage by an impedance conversion gain that is proportional to the value of the feedback resistor, and the converted voltage is output.

In a PON system, upstream packet data from each of multiple subscriber devices (Optical Network Units: ONUs) to a central office device (Optical Line Terminal: OLT) is sent in bursts using time division multiplexing. Because the paths and distances between each ONU and the OLT are different, the optical signals that reach the OLT have different optical powers for each packet. For this reason, the photocurrent electrical signals obtained by optical/electrical conversion in the photodetector of the OLT's optical receiving circuit have different signal amplitudes for each packet.

Generally, upstream packet data consists of a specific pattern section (preamble pattern) for signal reproduction located at the beginning of the packet, followed by a data section (payload). An alternating (repeated) signal of 1/0 (Hi/Lo) is often used as the preamble pattern.

Figure 1 shows the configuration of a conventional TIA. The TIA 10 connected to a PD is composed of a TIA core circuit 11 that amplifies the photocurrent input to the input terminal with the desired gain and outputs it as a voltage signal, and a buffer (amplifier) circuit 12 that differentially amplifies the output signal from the core circuit and outputs it. Furthermore, the core circuit 11 and buffer circuit 12 are connected using an AC coupling circuit (i.e., high-pass filter: HPF) consisting of a capacitance C and resistors R1 and R2. The output of the AC coupling circuit is connected to one input of the buffer circuit 12, and a reference voltage VREF is input to the other input.

The core circuit 11 converts the photocurrent of the PD and outputs a voltage in single-ended format. The buffer circuit 12 outputs an electrical signal corresponding to the received optical signal in differential format centered on VREF to the stage downstream of the TIA.

Figure 2 shows the time constant dependency of the output voltage in a conventional TIA. Each diagram in Figure 2 is a schematic depiction of the vicinity of the boundary between packets from different ONUs, with a guard time between the two packets where no data exists. As shown by the output voltage of the core circuit 11 in the upper diagram of Figure 2,

packets

1 and 2 from ONUs at different distances have different amplitudes. Since the output voltage of the TIA core circuit 11 is a single-ended output, the DC components of

packets

1 and 2 are also different. Ideally, the AC coupling circuit in the TIA 10 should have the characteristic of removing only the DC component of the input signal and providing only the AC component of the data signal to the buffer circuit 12. However, in a TIA using an AC coupling circuit, when packets with different signal amplitudes are input, the time until a normal packet signal is output is affected by the time constant of the AC coupling circuit.

As described above, when an optical signal is received from an ONU close to the OLT, the signal amplitude of the output voltage of the TIA core circuit 11 is large (packet 1), and when an optical signal is received from an ONU far from the OLT, the signal amplitude of the output voltage of the TIA core circuit 11 is small (packet 2). The DC component of the output voltage of the TIA core circuit 11 also changes for each packet, and changes in a step-like manner near the boundary of the packet. If the time constant of the HPF is relatively large and the cutoff frequency is low, as shown in Figure 2, a slow step-like change due to the transmitted low-frequency components appears in the output of the buffer circuit 12. Conversely, if the time constant of the HPF is relatively small and the cutoff frequency is too high, as shown in Figure 2, a sag occurs in the pulse waveform of the output of the buffer circuit 12, and the data waveform itself is distorted. There is a trade-off between blocking the DC component of the packet and maintaining the pulse waveform.

When the time constant of the AC coupling circuit is small, it responds quickly to DC component fluctuations near packet boundaries, and the time until a normal packet signal is output from the buffer circuit 12 is short. However, if the payload in the packet contains a long string of the same code, the VREF of the output voltage of the buffer circuit 12 cannot be maintained for the time required to distinguish these codes, resulting in misidentification. Conversely, if the time constant is made large so that VREF can be maintained for the duration of the string of the same code contained in the payload, the time until a normal packet signal is output will be longer. There is also a trade-off between accurate data discrimination for strings of the same code and rapid adaptation to DC component fluctuations near packet boundaries. Therefore, a configuration is known in which the time constant is switched by changing the capacitance and resistance of the AC coupling circuit using an external control signal.

Figure 24 is a diagram showing the configuration of a conventional TIA that switches time constants (Patent Document 1). The TIA 11-1 has an automatic gain control (AGC) circuit 13 in the TIA core circuit 11, and an automatic offset control (AOC) circuit 14 for the DC offset of the differential output from the buffer circuit 12. The TIA 11-1 has a configuration in which the AGC circuit 13 and the AOC circuit 14 switch between a small time constant state and a large time constant state. The small time constant state is a state in which the time until a normal packet signal is output is short, and the large time constant state corresponds to a state in which the retention of successive identical codes contained in the packet signal is high. The time constant of the AC coupling circuit 15 is switched by a reset control signal (RESET).

Patent No. 5731615

In order to obtain a packet signal output in a short time and also maintain the necessary sequence of the same code, it is possible to consider a configuration in which the time constant is reduced in the preamble section at the beginning of the packet to obtain a normal signal output, and then the time constant is increased. However, in the circuit described in Patent Document 1, if a configuration is used in which the time constant is reduced in the preamble section at the beginning of the packet to obtain a normal signal output, and then the time constant is increased, a problem arises in that the time it takes to obtain a normal output voltage is highly dependent on the timing of the control signal.

Figure 3 shows the output voltage of the AC coupling circuit when the time constant in a conventional TIA is changed from small to large in a short time. It shows the output voltage of the AC coupling circuit when a reset control signal (RESET) applied from outside to reset the AOC circuit 14 is applied with a shifted timing with respect to the input voltage to the AC coupling circuit 15 in the TIA 11-1 shown in Figure 24. The reset period includes the guard time during which packets from different ONUs are switched.

Figure 4 shows an enlarged view of the reset period in Figure 3. Specifically, Figure 4 (A) shows reset control signals (Hi-Lo-Hi) 1-0 to 1-9, which are shifted at intervals of 1/10 of one cycle of the AC-coupled input voltage. For example, between reset control signal 1-0, which becomes Lo at timing of point a (110 ns), and the next reset control signal 1-1, there is a 1/10 cycle of the AC-coupled input voltage, i.e., a phase shift of 36°. Between reset control signal 1-0 and reset control signal 1-5, there is a 5/10 cycle of the AC-coupled input voltage, i.e., a phase shift of 180°. Figure 4 (B) shows the change in the time constant τ of the AC-coupled circuit, which is indirectly obtained by monitoring the potential difference between certain nodes in TIA 11-1. The Hi period of the reset control signal and the large time constant state, and the Lo period of the reset control signal and the small time constant state, are roughly consistent. (C) and (D) in Figure 4 show the waveforms of the input voltage and output voltage of the AC coupling circuit 15, respectively. A sine wave is used as the input signal to easily explain the timing of the reset control signal.

Now consider the case of reset control signal 1-0, which goes Lo at point a (110 ns) when the input voltage amplitude value is 0 and the phase is 0°, and goes Hi at point b (140 ns) when the phase is 0°. When the reset control signal is in the Lo state, the time constant is very small, so the cutoff frequency of the HPF is higher than the sine wave frequency. For this reason, the output voltage of the AC coupling circuit (D) disappears at point a, and output voltage waveform 2-0 immediately appears at point b, the edge where the time constant switches to Hi. At point b, the sine wave is output from its initial state, with an instantaneous amplitude of 0 and a phase of 0°, so output voltage waveform 2-0 has no DC component and a normal AC coupled output sine wave is immediately obtained.

Next, consider the case of reset control signal 1-1 with a phase shift of 36°. As the output voltage of the AC-coupled circuit in (D), output voltage waveform 2-1 appears at a timing with a phase delay of 36° from point b. At this time, output voltage waveform 2-1 starts from the initial state of the amplitude value on the positive side, reaches a positive peak, and then decreases to the negative side. As a result, the AC-coupled output becomes output waveform 2-1, with the DC component shifted to the negative side.

Consider the case of reset control signal 1-2, which is further shifted in phase from reset control signal 1-1 by 36°. As the output voltage of the AC-coupled circuit in (D), output voltage waveform 2-2 appears at a timing delayed in phase by 72° from point b. The AC-coupled output becomes output voltage waveform 2-2, which has a DC component further increased on the negative side compared to output waveform 2-1. With the DC component of output waveforms 2-1 and 2-2 shifted, the DC component gradually converges to 0 over time, as shown in Figure 3, and a normal AC-coupled output is obtained.

Consider the case of reset control signal 1-5, which is 180° out of phase with reset control signal 1-0. As the output voltage of the AC-coupled circuit in (D), output voltage waveform 2-5 appears at a timing 180° out of phase with respect to point b. Since the sine wave is output from the initial state where the instantaneous amplitude is 0, the DC component of output voltage waveform 2-5 is 0V as a result, and as soon as the reset control signal goes into the Hi state with a large time constant, a normal AC-coupled output sine wave is obtained.

As described above, when the reset control signal changes from Lo to Hi and the time constant changes from a small state to a large state, the initial value of the output voltage appearing from the AC coupling circuit at the edge of the reset control signal changes depending on the timing of the reset control signal. Depending on the initial value, the DC component contained in the output signal of the AC coupling circuit also varies depending on the timing of the reset control signal. As a result, the time until the DC component converges to 0 (VREF) and a normal AC coupling output voltage is obtained changes depending on the timing of application of the reset control signal.

Because the distance from each ONU to the OLT is different, the OLT controls the timing of packet transmission from each ONU based on the round trip time between the OLT and ONU. However, because the round trip time varies, the timing of packets arriving at the OLT's TIA circuit also varies. This means that it is impossible to align the timing of the reset control signal relative to the sine wave in Figures 3 and 4.

The object of the present invention is to provide an AC coupling circuit and a transimpedance amplifier that can obtain a stable output voltage in a short time, regardless of the timing of the control signal.

In order to achieve this objective, one embodiment of the AC coupling circuit of the present invention is characterized in that it includes a switching means for switching between two different time constants in accordance with the input signal amplitude, and the switching time from a small time constant to a large time constant is longer than the switching time from a large time constant to a small time constant.

In addition, one embodiment of the transimpedance amplifier includes a transimpedance amplifier core circuit that amplifies a current input to an input terminal with a desired gain and outputs it as a voltage signal, one or more buffer circuits that differentially amplify and output an output signal from the transimpedance amplifier core circuit, and an AC coupling circuit inserted between the transimpedance amplifier core circuit and the buffer circuit or between the multiple buffer circuits, which switches between two different time constants in accordance with the amplitude of the output signal, and is characterized in that the switching time from a small time constant to a large time constant is longer than the switching time from a large time constant to a small time constant.

The present invention provides an AC coupling circuit and a transimpedance amplifier that can obtain a stable output voltage in a short time, regardless of the timing of the control signal.

FIG. 1 is a diagram showing the configuration of a conventional TIA. FIG. 1 is a diagram showing the time constant dependence of the output voltage in a conventional TIA. 1 is a diagram showing the output voltage of an AC coupling circuit when the time constant in a conventional TIA is changed from small to large in a short time. FIG. 4 is an enlarged view of a reset period in FIG. 3 . FIG. 2 is a diagram showing the operation concept of a TIA according to a first embodiment of the present invention. FIG. 2 is a diagram illustrating a configuration of a TIA according to a first embodiment. FIG. 2 is a diagram illustrating time constant control of an AC coupling circuit of the TIA of the first embodiment. 11 is a diagram showing the output voltage of the AC coupling circuit when the time constant of the TIA of the first embodiment is gradually changed from small to large. FIG. FIG. 9 is an enlarged view of the reset period in FIG. 8 . FIG. 13 is a diagram illustrating time constant control of an AC coupling circuit of a TIA according to a second embodiment. FIG. 13 is a diagram showing the fluctuation of the charge charged in the capacitance of an AC coupling circuit. FIG. 13 is a diagram showing the relationship between the difference of VREF with respect to the median value of the sine wave amplitude and the duty ratio of the output waveform. FIG. 2 is a diagram showing the relationship between the average voltage of the AC-coupled output voltage and the allowable VREF range. FIG. 1 is a diagram illustrating a low-pass filter in which the amplitude of an output signal is 1/10 of that of an input signal. FIG. 13 is a diagram showing fluctuations in the average voltage of an output signal of a first-order low-pass filter. FIG. 13 is a diagram illustrating a time constant control signal generating circuit of a TIA according to a third embodiment. FIG. 13 is a diagram illustrating a configuration of a TIA according to a third embodiment. FIG. 2 is a diagram showing the circuit configuration of an AC coupling circuit and a time constant control signal generating circuit. FIG. 4 is a diagram illustrating time constant control by a time constant control signal generating circuit. FIG. 13 is a diagram showing the output voltage of the AC coupling circuit when the time constant of the TIA of the third embodiment is gradually changed from small to large. FIG. 21 is an enlarged view of the reset period in FIG. 20 . FIG. 13 is a diagram showing the output voltage of the AC coupling circuit when the time constant of the TIA of the third embodiment is gradually changed from small to large. FIG. 13 is a diagram showing the output voltage of the AC coupling circuit when the time constant of the TIA of the third embodiment is gradually changed from small to large. FIG. 1 is a diagram showing a configuration of a conventional TIA that switches a time constant.

Below, an embodiment of the present invention will be described in detail with reference to the drawings.

[First embodiment]
5 is a diagram showing the operation concept of the TIA according to the first embodiment of the present invention. As shown in FIG. 5(a), the AC coupling circuit according to the first embodiment has a switching means for switching the time constant in two ways according to the input signal amplitude. Here, "switching in two ways" means that there are two ways of switching between different time constants. Specifically, as shown in FIG. 5(b), two different time constants are set, and the time constant is switched from large to small or from small to large. At this time, the switching time (2) from the small time constant to the large time constant is longer than the switching time (1) from the large time constant to the small time constant.

Fig. 6 is a diagram showing the configuration of a TIA according to the first embodiment. The TIA 20 connected to the PD includes a TIA core circuit 21 that amplifies the photocurrent input to the input terminal with a desired gain and outputs it as a voltage signal, a buffer circuit 22 that differentially amplifies the output signal from the core circuit and outputs it, and an AC coupling circuit 23 that connects the TIA core circuit 21 and the buffer circuit 22. The AC coupling circuit 23 includes a capacitance C that connects the two in series, and a resistance R that is connected in parallel, forming a so-called high-pass filter.

Furthermore, a switch SW is provided which is connected in parallel with resistor R and shorts resistor R. By controlling the switch SW to be turned on/off by a time constant control signal (RESET) applied from the outside, the resistance value of the resistors which make up the high-pass filter can be changed and the CR time constant of AC coupling circuit 23 can be switched between two different values. Note that in the following explanation, the time constant control signal (RESET) corresponds to the reset control signal explained in Figures 3 and 4. The time constant control signal (RESET) of Hi → Lo → Hi switches between the two time constants shown in Figure 5(b).

In the configuration shown in FIG. 6, the switch SW connected in parallel to the resistor R is controlled to be turned on and off, but it is also possible to change the time constant by using multiple resistors and switches to switch between two different resistance values, for example.

In addition, in the configuration shown in FIG. 6, the AC coupling circuit is inserted between the TIA core circuit and the buffer circuit, but if the buffer circuits are configured in multiple stages, the effect of the present invention can be achieved even if the AC coupling circuit is inserted between the buffer circuits.

FIG. 7 is a diagram showing the time constant control of the AC coupling circuit of the TIA of the first embodiment. In the above-mentioned PON system, the OLT receives optical signals from multiple ONUs in a time-division manner. The output voltage of the TIA core circuit 21 varies depending on the strength of the received optical signal, and the output voltage of the AC coupling circuit 23 is significantly affected by the change in the time constant when a packet 2 with a small signal amplitude is input. Therefore, in the TIA 20, when a packet 2 is input, the time constant is switched as shown in FIG. 5(b) by a time constant control signal (RESET) given from the outside.

Specifically, the OLT provides a guard time during the reception period from each ONU. During this guard time, a time constant control signal (RESET) is output, and time constant control is performed so that the time required to switch from a small to a large time constant is longer than the time required to switch from a large to a small time constant. The period between packet 1 and packet 2 where there is no optical signal becomes the guard time, which has a length of about several pulses, but FIG. 7 is a schematic illustration and the time relationship is not limited to the example in FIG. 7.

FIG. 8 is a diagram showing the output voltage of the AC coupling circuit when the time constant of the TIA of the first embodiment is gradually changed from small to large. FIG. 8 corresponds to each waveform in FIG. 3 in the explanation of the prior art. Comparing the time constant waveforms in FIG. 3 and FIG. 8, it can be seen that the period during which the time constant switches from small to large is several tens of times longer, and that the time constant changes slowly from small to large. Furthermore, there is almost no variation in the DC component in the output voltage of the AC coupling circuit, and the normal AC coupling output is immediately achieved within a time of about two periods of a sine wave.

FIG. 9 is an enlarged view of the reset period in FIG. 8. Comparing FIG. 4B with FIG. 9B, it can be seen that the time required to switch from a small time constant to a large time constant is very long. In the TIA of the first embodiment, regardless of the timing of the reset control signal, the DC component converges to 0 in 10 to 20 ns from the rising edge of the reset control signal going from Lo to Hi.

In the output voltage waveform shown in Figure 4, the Lo state of the reset control signal and the state with a small time constant, and the Hi state and the state with a small time constant roughly coincided. From the moment the rising edge changed from Lo to Hi, the HPF entered a state with no attenuation for the sine wave frequency, and the input voltage immediately appeared as is. Therefore, the instantaneous initial value of the output voltage of the AC coupling circuit fluctuated depending on the phase of the output sine wave at the timing of the rising edge. The DC component also fluctuated depending on the timing of the reset control signal, and the time it took to reach a normal AC coupling output varied.

In contrast, in the output voltage waveform shown in FIG. 9(D), the input voltage does not appear immediately without attenuation from the rising edge of the time constant control signal (reset control signal) from Lo to Hi, but appears gradually (ramps up). This is because the time constant changes very slowly from a small to a large state as shown in FIG. 9(B), so the cutoff frequency of the HPF of the AC coupling circuit also changes slowly compared to the conventional configuration. The attenuation of the sine wave frequency by the HPF of the AC coupling circuit gradually decreases from the maximum attenuation state, so the output voltage gradually appears from the time of the rising edge. At the rising edge of the time constant control signal from Lo to Hi, the HPF is still in a state of large attenuation, so the initial value of the output voltage of the AC coupling circuit is approximately close to 0. Regardless of the timing of the rising edge, the initial value of the output voltage is approximately 0 and the DC component is also approximately 0, so a normal AC coupling output is immediately obtained within a time of about two periods of the sine wave.

In this way, since the time required to switch from a small to a large time constant is sufficiently large compared to the phase change of the AC-coupled input voltage, a normal output voltage can be obtained regardless of the timing of the time constant control signal (RESET). As can be seen by comparing the AC-coupled output voltage in FIG. 4 with the AC-coupled output voltage in FIG. 9, in the TIA 20, a normal output voltage can be obtained in a short time of about 20 ns from the rising edge of the time constant control signal (RESET).

Second Embodiment
Fig. 10 is a diagram showing the time constant control of the AC coupling circuit of the TIA according to the second embodiment of the present invention. In the TIA of the second embodiment, the time required to switch from a small time constant to a large time constant is longer than the time required to switch from a large time constant to a small time constant. However, the second embodiment differs from the first embodiment in that the time constant is changed from a small state to a large state in a discrete manner through a plurality of steps. For example, in the configuration shown in Fig. 6, in order to change the time constant, a plurality of resistors may be prepared as the resistor R of the AC coupling circuit 23, and the resistors may be switched using a switch to discretely change the time constant from a small state to a large state.

Here, when changing the time constant from a small state to a large state, we will quantitatively consider the lower and upper limits of the time constant using a concrete example.

11A and 11B are diagrams showing the fluctuation of the electric charge charged to the capacitance of the AC coupling circuit. Fig. 11A shows the relationship between the AC coupling output voltage and the fluctuation of the electric charge charged to the capacitance of the AC coupling circuit. The voltage difference V between the input and output of the AC coupling circuit is determined by the amount of electric charge Q of the capacitance C, and is expressed by the following formula.
Q = CV Equation (1)

In a steady state, the charge stored in the capacitance is constant. After that, when packet 2 with a small signal amplitude is input, charging and discharging of the charge occurs. The response time at this time is the time it takes for the amount of charging and discharging to become constant and for the charge to become constant. The operation until the charge becomes constant due to charging and discharging is determined by the time constant of the AC coupling circuit, and the result of charging and discharging of the charge affects the AC coupling output voltage.

Figure 11(b) shows the relationship of the charge fluctuation amount to two types of time constant, a small time constant and a large time constant. Regardless of the AC-coupled input voltage and the timing of changing the time constant from a small to a large state, in order to keep the time until a normal output voltage is obtained within a specified time, it is sufficient to keep this charge fluctuation amount within a certain range. In order to keep the charge fluctuation amount within a certain range, it is sufficient that the average voltage of the AC-coupled output voltage is within a certain range from the center voltage of the amplitude. When amplifying the output of the AC-coupled circuit with a buffer circuit, a reference voltage VREF is set as the reference voltage of the amplifier, as shown in Figure 6.

However, if a difference occurs in the average voltage of the AC-coupled output voltage with respect to the reference voltage, the duty ratio of the output waveform of the AC-coupled output voltage will fluctuate. Therefore, the allowable value of the duty ratio in the output waveform is used to define the amount of fluctuation in the charge of the capacitance, i.e., the range of the average voltage. For the sake of generalization, the input waveform is assumed to be a sine wave.

Fig. 12 is a diagram showing the relationship between the difference of VREF from the sine wave amplitude median value and the output waveform duty ratio. For simplicity, in Fig. 12(a), the sine wave amplitude is ±1V, the frequency is 1GHz, and the duty ratio is calculated when VREF is varied by ±0.5V in 0.1V increments. Fig. 12(b) shows the relationship between the duty ratio and the value of deviation of VREF from the sine wave amplitude median. From this relationship, it can be seen that when a certain allowable duty ratio is determined, the allowable VREF range for that duty ratio is given by the following equation.
VREF fluctuation range [V] = allowable duty ratio "%" / 33 Formula (2)
For example, if the permissible duty ratio fluctuation is set to ±3.3% or less, the VREF fluctuation range is approximately ±0.1V or less.

Figure 13 shows the relationship between the average voltage of the AC-coupled output voltage and the allowable VREF range. For the allowable VREF fluctuation range obtained above, the maximum and minimum values of the response time constant are obtained under the condition that the time change of the response time constant is constant over time. Specifically, as shown in Figure 13(a), when the time constant is changed stepwise from a small state to a large state, the maximum and minimum values of the time constant are obtained when the time constant is changed through only one step along the way. As shown in Figure 13(b), when the time constant is small, it is sufficient that the average voltage of the AC-coupled output voltage is within the VREF allowable range. In other words, the allowable value of the duty ratio in the output waveform of the AC-coupled output voltage is satisfied, and the amount of charge fluctuation in the capacitance of the AC-coupled circuit is within a specified range. On the other hand, when the time constant is large, it is sufficient that the average voltage of the AC-coupled output voltage is within the VREF allowable range within the desired response time.

If the allowable duty cycle fluctuation is ±3.3%, consider the case where the VREF fluctuation range is approximately ±0.1 V or less, in other words, 1/10 of the sine wave amplitude of the input waveform. In this case, the lower limit of the time constant is sufficient as long as the average voltage of the AC-coupled output voltage is within the VREF allowable range, so the average voltage of the input waveform needs to be ±10% or less of the amplitude. Therefore, as shown in Figure 14(a), a first-order low-pass filter consisting of a capacitance C and a resistance R is assumed as a circuit in which the amplitude of the output signal is 1/10 of the input signal. As shown in Figure 14(b), the CR time constant of the low-pass filter can be set as shown in the following equation so that the cutoff frequency is 1/10 of the input signal frequency.

where f is the frequency of the input signal, while the upper limit of the time constant is the desired response time, as mentioned above.

Figure 15 shows the fluctuation in the average voltage of the output signal of a first-order low-pass filter. In the case of a first-order low-pass filter, the fluctuation in the average voltage of the output signal is expressed by the following equation.

When the permissible duty ratio fluctuation is ±3.3%, the time (time constant) at which the average voltage becomes ±10% or less (0.9 or more) is 2.32 CR, as shown in Fig. 15. In other words, when the desired response time is T _settle , the following relationship is obtained.

Therefore, when the time constant is changed from a small state to a large state, the time constant has the following relationship with the lower and upper limits:

Or, if the input signal waveform is a sine wave, the relationship is as follows:

[Third embodiment]
In the second embodiment, the lower and upper limits of the time constant are obtained when the time constant is changed stepwise from a small state to a large state. In the third embodiment, a method of continuously changing the time constant from a small state to a large state will be described.

FIG. 16 is a diagram showing a time constant control signal generation circuit of a TIA according to a third embodiment of the present invention. As shown in FIG. 16(a), the time constant control signal generation circuit generates a time constant control signal, for example, from a pulse-shaped control signal (RESET) provided from the outside. As shown in FIG. 16(b), in response to the input of the control signal (RESET), it is possible to perform time constant switching in which the switching time (2) from a small time constant to a large time constant is longer than the switching time (1) from a large time constant to a small time constant.

Figure 17 is a diagram showing the configuration of a TIA according to the third embodiment. The TIA 30 connected to the PD includes a TIA core circuit 31 that amplifies the photocurrent input to the input terminal with a desired gain and outputs it as a voltage signal, a buffer circuit 32 that differentially amplifies the output signal from the core circuit and outputs it, and an AC coupling circuit 33 that connects the TIA core circuit 31 and the buffer circuit 32. The AC coupling circuit 33 includes a capacitance C that connects the two in series and a resistor R connected in parallel, forming a so-called high-pass filter. In addition, a switch SW is provided that is connected in parallel with the resistor R, and the time constant of the AC coupling circuit 33 is controlled by a time constant control signal generation circuit 34.

As mentioned above, when configuring the buffer circuits in multiple stages, AC coupling circuits can be inserted between the buffer circuits.

FIG. 18 is a diagram showing the circuit configuration of the AC coupling circuit and the time constant control signal generation circuit. The FET switch SW is connected in parallel with the resistor R of the AC coupling circuit 33, and the FET switch SW is controlled by the time constant control signal generation circuit 34. The time constant control signal generation circuit 34 is configured, for example, with a two-stage buffer circuit, and generates a FET switch SW control voltage with a long fall time in response to the input of a rectangular control signal (RESET).

In the configuration shown in FIG. 18, an FET switch connected in parallel with resistor R of AC coupling circuit 33 is used to change the time constant, but a variable resistor may be used instead of the switch. Any configuration is acceptable as long as it is possible to continuously change the resistance value of the resistor that constitutes the high-pass filter.

FIG. 19 is a diagram showing time constant control by a time constant control signal generation circuit. A pulse-shaped control signal (RESET) applied from the outside causes the time constant control signal generation circuit 34 to output a FET switch SW control voltage to the AC coupling circuit 33. The circuit constants can be set so that the time constant defined by the combined resistance of the FET switch SW and resistor R (4.9 kΩ) and the capacitance C falls within the range between the lower and upper limits mentioned above.

Figure 20 is a diagram showing the output voltage of the AC coupling circuit when the time constant of the TIA of the third embodiment is gradually changed from small to large. Figure 21 is a diagram showing an enlarged reset period in Figure 20. The figure shows the result of simulating the response characteristics when the time constant is 1 ns, 1.6 ns, 20 ns, and 50 ns. The output voltage of the AC coupling circuit 33, the time constant, and the average voltage of the output voltage are shown side by side.

When the input signal frequency is 1 GHz and the desired response time T _settle is 50 nsec, the lower limit of the time constant is 1.6 nsec and the upper limit is 21.6 nsec according to the relational expression shown in the second embodiment. If the time constant of the AC coupling circuit 33 is within this range, the average voltage of the output voltage of the AC coupling circuit 33 is within ±10% of the amplitude of the output voltage.

Figure 22 shows the AC-coupled output voltage when the time constant is set to 1.6 ns and the external control signal (RESET) is applied with a shift in timing relative to the AC-coupled input voltage. Figure 23 shows the case when the time constant is set to 20 ns. In both cases, it can be seen that a normal output voltage is obtained regardless of the timing of the control signal (RESET).

10, 11-1, 20, 30 TIA
11, 21, 31

TIA core circuit

12, 22, 32 Buffer circuit 23, 33 AC coupling circuit 34 Time constant control signal generating circuit

Claims

A switching means for switching between two different time constants in accordance with the amplitude of an input signal is provided,
1. An AC coupling circuit, comprising: a switching time for switching a time constant from a small to a large value longer than a switching time for switching a time constant from a large to a small value.
The AC coupling circuit of claim 1, characterized in that the time constant is switched from small to large by discretely increasing the time constant.
The AC coupling circuit of claim 1, characterized in that the time constant is switched from small to large by continuously increasing the time constant.
It is composed of a high-pass filter including a capacitance and a resistance,
4. The AC coupling circuit according to claim 1, wherein the switching means switches between the two time constants by changing a resistance value of the resistor.
A transimpedance amplifier core circuit that amplifies a current input to an input terminal with a desired gain and outputs the amplified current as a voltage signal;
one or more buffer circuits that differentially amplify and output an output signal from the transimpedance amplifier core circuit;
an AC coupling circuit inserted between the transimpedance amplifier core circuit and the buffer circuit or between the plurality of buffer circuits, the AC coupling circuit switching between two different time constants in accordance with the amplitude of the output signal;
The transimpedance amplifier, wherein the AC coupling circuit has a switching time longer than a switching time from a small time constant to a large time constant.
the AC coupling circuit is configured with a high-pass filter including a capacitance and a resistance;
6. The transimpedance amplifier according to claim 5, wherein the switching of the time constant from small to large is performed by switching the resistance value of the resistor, thereby discretely increasing the two time constants.
the AC coupling circuit is configured with a high-pass filter including a capacitance and a resistance;
6. The transimpedance amplifier according to claim 5, wherein the switching from the small time constant to the large time constant is performed by changing a resistance value of the resistor, thereby successively increasing the two time constants.