WO2024104096A1 - Monochromatic screen display method and system, electronic device and computer-readable storage medium - Google Patents

Abstract

Disclosed in the embodiments of the present application are a monochromatic screen display method and system, an electronic device and a computer-readable storage medium. The method comprises: analyzing an MIPI protocol data packet to obtain image data comprising three color channels, extracting and separating the data of the single color channels from the image data, and separately re-packaging the data of each color channel to generate MIPI protocol data packets comprising the data of the single color channels; and finally transmitting to corresponding monochromatic screens the MIPI protocol data packets comprising the data of the single color channels, such that the monochromatic screens can perform monochrome display according to the MIPI protocol data packets comprising the data of the single color channels. Thus, the present application reduces redundant data received by screen ends, thereby saving transmission bandwidth and also lowering the processing complexity for the screen ends.

Description

Monochrome screen display method, system, electronic device and computer readable storage medium

This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on November 18, 2022, with application number 202211444101.9 and application name “Monochrome screen display method, system, electronic device and computer-readable storage medium”, the entire contents of which are incorporated by reference in this application.

Technical Field

The present application relates to the field of display technology, and in particular to a monochrome screen display method, system, electronic device and computer-readable storage medium.

Background technique

At present, full-color effects can be achieved through multiple monochrome screens in some scenarios. For example, due to the process limitations of micro light-emitting diodes (micro-LEDs), micro-LED monochrome screens are often used in augmented reality (AR) scenarios to achieve full-color effects. Specifically, three monochrome screens (red, green, and blue) are used to fuse colors to achieve full-color effects.

In specific applications, the system on chip (SOC) sends MIPI protocol data packets to three monochrome screens through the mobile industry processor interface (MIPI). Each MIPI protocol data packet includes image data with three color channels, for example, the image data includes R channel, G channel and B channel. After each monochrome screen receives the MIPI protocol data packet from the SOC, it performs monochrome display according to the MIPI protocol data packet. However, this will cause the screen end to receive a large amount of redundant data, which requires a large transmission bandwidth and makes the processing complexity of the screen end higher.

Summary of the invention

The embodiments of the present application provide a monochrome screen display method, system, electronic device and computer-readable storage medium, which can solve the problem that the screen receives a large amount of redundant data during the existing monochrome screen display, occupies a large transmission bandwidth, and has high processing complexity on the screen side.

In a first aspect, an embodiment of the present application provides a monochrome screen display system, including a processing module, a first monochrome screen, a second monochrome screen, and a third monochrome screen;

The processing module is used to: obtain a first mobile industry processor interface MIPI protocol data packet, the first MIPI protocol data packet includes image data, and the image data includes data of a first color channel, data of a second color channel, and data of a third color channel; parse the first MIPI protocol data packet, and after obtaining the image data, extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; perform a packet grouping operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen; perform a packet grouping operation on the data of the second color channel to obtain a third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen; perform a packet grouping operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen;

The first monochrome screen is used to: receive a second MIPI protocol data packet, parse the second MIPI protocol data packet, obtain data of a first color channel, and display the data of the first color channel;

The second monochrome screen is used to: receive a third MIPI protocol data packet, parse the third MIPI protocol data packet, obtain data of a second color channel, and display the data of the second color channel;

The third monochrome screen is used to: receive a fourth MIPI protocol data packet, parse the fourth MIPI protocol data packet, obtain data of a third color channel, and display the data of the third color channel.

It can be seen from the above technical solution that after the embodiment of the present application extracts and separates the data of each color channel from the image data in the first MIPI protocol data packet, the data of each color channel is repackaged to obtain a MIPI protocol data packet including only a single color channel data, and a MIPI protocol data packet including only a single color channel data is sent to each monochrome screen respectively. In this way, each monochrome screen only receives the color channel data that needs to be displayed, and does not receive the color channel data that does not need to be displayed, thereby reducing the redundant data received by the screen end; and, compared with the MIPI protocol data packet including image data with three color channels, the MIPI protocol data packet including only a single color channel data has a smaller amount of data, so the transmission of the MIPI protocol data packet including only a single color channel data saves the transmission bandwidth; in addition, each monochrome screen receives the MIPI protocol data packet including only a single color channel data. Therefore, after the screen parses the MIPI protocol data packet, it can send and display the single color channel data, reducing the processing complexity.

In some possible implementations of the first aspect, the processing module includes a first logic unit, a second logic unit, a third logic unit, and a fourth logic unit;

The first logic unit is connected to the second logic unit, the third logic unit and the fourth logic unit respectively;

The first logic unit is used to: parse the first MIPI protocol data packet to obtain image data; extract data of the first color channel, data of the second color channel and data of the third color channel from the image data; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit;

The second logic unit is used to: receive data of the first color channel, perform a packetization operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen;

The third logic unit is used to: receive the data of the second color channel, perform a packet operation on the data of the second color channel to obtain a third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen;

The fourth logic unit is used to receive data of the third color channel, perform a packetization operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.

In some possible implementations of the first aspect, the processing module is a field programmable gate array (FPGA), and the first logic unit, the second logic unit, the third logic unit, and the fourth logic unit are all D-PHY or C-PHY.

In this implementation, multiple logic units are simulated in the FPGA, and the parsing of MIPI protocol data packets, extraction and separation of single color channel data, repackaging and sending of single color channel data are implemented through each logic unit. It is achieved that a complete MIPI signal is divided into three customized monochrome MIPI signals through FPGA, which saves transmission bandwidth and reduces the processing complexity on the screen end.

In some possible implementations of the first aspect, the first logic unit includes a fifth logic unit and a data processing unit;

The fifth logic unit is used to: parse the first MIPI protocol data packet to obtain image data, and send the image data to the data processing unit;

The data processing unit is used to: extract data of the first color channel, data of the second color channel and data of the third color channel from the image data; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit.

In this implementation, the extraction and separation function of a single color channel data is implemented by the data processing unit, and the second logic unit, the third logic unit, the fourth logic unit and the fifth logic unit implement the parsing and packaging function of the MIPI data packet. In this way, the functions implemented by the second logic unit, the third logic unit, the fourth logic unit and the fifth logic unit are exactly the same, which is easier to design and implement.

In some possible implementations of the first aspect, the processing module is an FPGA, and the second logic unit, the third logic unit, the fourth logic unit, and the fifth logic unit are all D-PHY or C-PHY.

In some possible implementations of the first aspect, the image data is RGB image data, the first color channel is an R channel, the second color channel is a G channel, and the third color channel is a B channel.

In some possible implementations of the first aspect, the processing module is specifically configured to: receive a first MIPI protocol data packet from a system on chip (SOC).

In a second aspect, an embodiment of the present application provides a monochrome screen display method, which is applied to a processing module, and the method includes:

A first mobile industry processor interface MIPI protocol data packet is obtained, the first MIPI protocol data packet includes image data, and the image data includes data of a first color channel, data of a second color channel, and data of a third color channel; the first MIPI protocol data packet is parsed to obtain the image data, and then the data of the first color channel, the data of the second color channel, and the data of the third color channel are extracted from the image data; a packetization operation is performed on the data of the first color channel to obtain a second MIPI protocol data packet, and the second MIPI protocol data packet is sent to the first monochrome screen; a packetization operation is performed on the data of the second color channel to obtain a third MIPI protocol data packet, and the third MIPI protocol data packet is sent to the second monochrome screen; a packetization operation is performed on the data of the third color channel to obtain a fourth MIPI protocol data packet, and the fourth MIPI protocol data packet is sent to the third monochrome screen.

In some possible implementations of the second aspect, the processing module is an FPGA.

In some possible implementations of the second aspect, the image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.

In a third aspect, an embodiment of the present application provides an electronic device, comprising a first monochrome screen, a second monochrome screen, a third monochrome screen, a processing module, a memory, and a computer program stored in the memory and executable on the processing module, wherein the processing module implements any method of the second aspect described above when executing the computer program.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method of any one of the second aspects described above is implemented.

In a fifth aspect, an embodiment of the present application provides a chip system, the chip system includes a processor, the processor is coupled to a memory, and the processor executes a computer program stored in the memory to implement the method as described in any one of the second aspects above. The chip system can be a single chip, or a chip module composed of multiple chips.

In a sixth aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on an electronic device, the electronic device executes any method described in the second aspect above.

It can be understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1A is a schematic block diagram of a system architecture of a monochrome screen display system provided in an embodiment of the present application;

FIG1B is a schematic block diagram of another system architecture of a monochrome screen display system provided in an embodiment of the present application;

FIG2A is a schematic block diagram of another system architecture of a monochrome screen display system provided in an embodiment of the present application;

FIG2B is a schematic block diagram of a process of a monochrome screen display method provided in an embodiment of the present application;

FIG3A is a schematic diagram of a logic unit provided in an embodiment of the present application;

FIG3B is a schematic diagram of another logic unit provided in an embodiment of the present application;

FIG4A is a schematic block diagram of a monochrome screen display system architecture provided by an embodiment of the present application;

FIG4B is another schematic block diagram of a monochrome screen display system architecture provided in an embodiment of the present application;

FIG4C is a schematic block diagram of a MIPI protocol data packet provided in an embodiment of the present application;

FIG4D is a schematic block diagram of a logic unit of an FPGA provided in an embodiment of the present application;

FIG4E is a schematic diagram of MIPI protocol data packet transmission provided in an embodiment of the present application;

FIG5 is a schematic block diagram of a process of a monochrome screen display method provided in an embodiment of the present application;

FIG6 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

Detailed ways

In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures and technologies are provided to facilitate a thorough understanding of the embodiments of the present application.

The following is an exemplary introduction to the system architecture that may be involved in the embodiments of the present application.

For example, please refer to Figure 1A, which is a schematic block diagram of a system architecture of a monochrome screen display system provided in an embodiment of the present application. The system may include SOC 11, monochrome screen 12, monochrome screen 13 and monochrome screen 14.

Among them, SOC 11 can be connected to monochrome screen 12, monochrome screen 13, and monochrome screen 14 through MIPI interfaces. For example, SOC 11 has three MIPI interfaces, and is connected to monochrome screen 12, monochrome screen 13, and monochrome screen 14 through these three MIPI interfaces, and each MIPI interface corresponds to a monochrome screen.

In a specific application, SOC11 sends MIPI protocol data packets to monochrome screen 12, monochrome screen 13, and monochrome screen 14 respectively. After receiving the MIPI protocol data packets from SOC11, monochrome screen 12, monochrome screen 13, and monochrome screen 14 respectively perform monochrome display according to the MIPI protocol data packets. The MIPI protocol data packets sent by SOC11 to each monochrome screen are the same.

The MIPI protocol does not support the transmission of a pixel format of a single color channel, so the MIPI protocol data packet output from the SOC 11 includes image data of three color channels. As an example, FIG. 1A shows that the image data in the MIPI protocol data packet is RGB image data, which refers to image data having an R channel, a G channel, and a B channel.

That is, the MIPI protocol data packets received by the monochrome screen 12, the monochrome screen 13 and the monochrome screen 14 all include image data of three color channels. However, each monochrome screen only needs data of one color channel to realize monochrome display, and the data of the other two color channels are redundant data.

As shown in FIG1A , SOC 11 transmits RGB image data to each monochrome screen through MIPI protocol data packets; assuming that monochrome screen 12 is used to display red, monochrome screen 13 is used to display green, and monochrome screen 14 is used to display blue. At this time, monochrome screen 12 only The data of the R channel is needed to display red, and the data of the G channel and the B channel are not needed. That is, for the monochrome screen 12, the data of the G channel and the data of the B channel are redundant data. Similarly, the monochrome screen 13 only needs the data of the G channel to display green, and the data of the R channel and the data of the B channel are redundant data; the monochrome screen 14 only needs the data of the B channel to display blue, and the data of the R channel and the data of the G channel are redundant data.

Since the data volume of the MIPI protocol data packet including the image data with three color channels is large, SOC11 transmits the image data with three color channels to each monochrome screen through the MIPI protocol data packet. In addition to causing the screen end to receive a large amount of redundant data, it also occupies a large transmission bandwidth.

In addition, when the monochrome screen performs monochrome display according to the MIPI protocol data packet, it usually first parses the MIPI protocol data packet to obtain the image data in the MIPI protocol data packet, which includes data of three color channels; then extracts and separates the data of a single color channel from the image data, and identifies the color channel data required by itself from multiple single color channel data; finally, it performs monochrome display according to the color channel data required by itself. In this process, the monochrome screen needs to perform processes such as MIPI protocol data packet parsing, extraction and separation of single color channel data, identification of color channel data, and monochrome display according to the color channel data required by itself, and the processing complexity is relatively high. That is, through the MIPI protocol data packet, the image data with three color channels is transmitted to each monochrome screen, which will also make the processing complexity of the display driver chip (Display Driver Integrated Circuit Chip, DDIC) on the screen side relatively high.

Specifically, for the system shown in FIG1A , for the monochrome screen 12, after receiving the MIPI protocol data packet from the SOC 11, the MIPI protocol data packet is parsed to obtain the RGB image data in the MIPI protocol data packet; then the R channel data, the G channel data and the B channel data are extracted and separated from the RGB image data, and the color channel data required by itself is identified as the R channel data; finally, the R channel data is displayed to display red. Similarly, the monochrome screen 13 and the monochrome screen 14 both perform similar processes to display green and blue, respectively.

Optionally, the system shown in Figure 1A may also include a bridge chip 15. Specifically, refer to Figure 1B, a schematic block diagram of another system architecture of a monochrome screen display system provided in an embodiment of the present application. The input end of the bridge chip 15 is connected to SOC11, and the output end of the bridge chip 15 is respectively connected to the monochrome screen 12, the monochrome screen 13 and the monochrome screen 14.

As shown in FIG1B , SOC 11 outputs a MIPI protocol data packet including RGB image data. After receiving the MIPI protocol data packet, the bridge chip 15 copies the MIPI protocol data packet to obtain three identical MIPI protocol data packets, and transmits the three MIPI protocol data packets to the monochrome screen 12, the monochrome screen 13, and the monochrome screen 14. In this process, the bridge chip 15 is used to copy the MIPI protocol data packet and distribute the MIPI protocol data packet.

In the system shown in FIG. 1B , the image data with three color channels is still transmitted to each monochrome screen through the MIPI protocol data packet. Therefore, the above-mentioned problems of the screen receiving a large amount of redundant data, occupying a large transmission bandwidth, and the high processing complexity of the DDIC on the screen still exist.

In response to the above-mentioned problems, the monochrome screen display solution provided in the embodiment of the present application divides a MIPI signal with three color channels into three MIPI signals with a single color channel, and transmits the three monochrome MIPI signals to each monochrome screen respectively, so that the screen end only receives single color channel data, reduces the redundant data received by the screen end, saves transmission bandwidth, and reduces the processing complexity of DDIC on the screen end.

In order to better introduce the monochrome screen display solution provided in the embodiment of the present application, an exemplary introduction is given below in conjunction with Figures 2A and 2B.

Please refer to Figure 2A, which is a schematic block diagram of another system architecture of the monochrome screen display system provided in an embodiment of the present application. The system may include SOC21, a processing module 22, a first monochrome screen 23, a second monochrome screen 24 and a third monochrome screen 25.

The SOC 21 is connected to the processing module 22 via the MIPI interface, and the processing module 22 is respectively connected to the first monochrome screen 23 , the second monochrome screen 24 and the third monochrome screen 25 via the MIPI interface.

It should be noted that SOC21 is optional. In other embodiments, SOC21 can be replaced by other devices or other modules, which are not limited here.

The processing module 22 may be an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Other programmable logic devices may include programmable array logic (PAL) and general array logic (GAL); it may also be a central processing unit (CPU), other general processors or a digital signal processor (DSP). The general processor may be a microprocessor or any conventional processor, etc.

The first monochrome screen 23, the second monochrome screen 24, and the third monochrome screen 25 are generally monochrome screens for displaying three primary colors. For example, the three primary colors are red, green, and blue, the first monochrome screen 23 is a monochrome screen for displaying red, the second monochrome screen 24 is a monochrome screen for displaying green, and the third monochrome screen 25 is a monochrome screen for displaying blue.

The first monochrome screen 23 , the second monochrome screen 24 , and the third monochrome screen 25 may all be micro-LED monochrome screens, or other types of monochrome screens, which are not limited here.

Please refer to FIG. 2B , which is a schematic block diagram of a process of a monochrome screen display method provided in an embodiment of the present application. The method may include the following steps:

Step S201 : The processing module 22 receives a first MIPI protocol data packet from the SOC 21 .

It should be noted that the first MIPI protocol data packet refers to a data packet that complies with the MIPI protocol, and the data packet may include but is not limited to image data, and the image data includes data of a first color channel, data of a second color channel, and data of a third color channel.

In specific applications, the formats of image data are different, and the first color channel, the second color channel, and the third color channel may be different accordingly.

For example, when the image data is RGB image data, the first color channel may be an R channel, the second color channel may be a G channel, and the third color channel may be a B channel.

For another example, when the image data is YUV image data, the first color channel may be a Y channel, the second color channel may be a U channel, and the third color channel may be a V channel.

It should also be noted that SOC21 can be replaced by other modules or other devices. When SOC21 is replaced by other modules or other devices, the processing module 22 can receive the first MIPI protocol data packet from the other modules or other devices. The source of the first MIPI protocol data packet is not restricted here.

Step S202: The processing module 22 parses the first MIPI protocol data packet to obtain image data.

The first MIPI protocol data packet is a data packet obtained by performing a packet assembly operation according to the MIPI protocol, so the first MIPI protocol data packet can be unpacked according to the MIPI protocol to obtain the image data in the first MIPI protocol data packet.

Step S203: The processing module 22 extracts and separates data of the first color channel, data of the second color channel, and data of the third color channel from the image data.

The image data has complete three color channel data, while the monochrome screen only needs single color channel data to achieve monochrome display. Therefore, in order to reduce the redundant data received by the screen, the single color channel data can be extracted and separated from the image data, and then the single color channel data can be transmitted to the corresponding monochrome screen respectively.

For example, the image data in the first MIPI protocol data packet is RGB image data, and R channel data, G channel data, and B channel data are extracted and separated from the RGB image data.

Step S204: The processing module 22 performs a packetization operation on the data of the first color channel to obtain a second MIPI protocol data packet, performs a packetization operation on the data of the second color channel to obtain a third MIPI protocol data packet, and performs a packetization operation on the data of the third color channel to obtain a fourth MIPI protocol data packet.

After the processing module 22 extracts and separates the single color channel data, in order to transmit the data of each color channel to the corresponding monochrome screen through the MIPI interface, the data of each color channel can be packaged according to the MIPI protocol standard, so that the packaged data packet still complies with the MIPI protocol standard and can still be transmitted through the MIPI protocol.

That is, for the single color channel data, the processing module 22 may repack the single color channel data according to the MIPI protocol to obtain a MIPI protocol data packet including the single color channel data.

It should be noted that the second MIPI protocol data packet, the third MIPI protocol data packet and the fourth MIPI protocol data packet only include data of a single color channel, so compared with the first MIPI protocol data packet including data of three color channels, the second MIPI protocol data packet, the third MIPI protocol data packet and the fourth MIPI protocol data packet have smaller data volumes. In this way, when the second MIPI protocol data packet, the third MIPI protocol data packet and the fourth MIPI protocol data packet are transmitted to each monochrome screen, the transmission bandwidth occupied is smaller, thereby saving the transmission bandwidth.

For example, the image data is RGB image data with three complete color channels, that is, the first MIPI protocol data packet includes data of three color channels. The second MIPI protocol data packet only includes R channel data, the third MIPI protocol data packet only includes G channel data, and the fourth MIPI protocol data packet only includes B channel data. At this time, the data volume of the second MIPI protocol data packet, the third MIPI protocol data packet, and the fourth MIPI protocol data packet is approximately only one-third of the data volume of the first MIPI protocol data packet. That is, the size of the MIPI protocol data packet sent from the processing module 22 is only about one third of the MIPI protocol data packet sent from the SOC 21 .

Typically, the processing module 22 can perform a packetization operation on the data of the first color channel, the data of the second color channel, and the data of the third color channel in parallel, that is, the packetization operation of the first color channel, the packetization operation of the second color channel, and the packetization operation of the third color channel are processed in parallel. Of course, they may not be processed in parallel.

Step S205 : The processing module 22 sends a second MIPI protocol data packet to the first monochrome screen 23 , sends a third MIPI protocol data packet to the second monochrome screen 24 , and sends a fourth MIPI protocol data packet to the third monochrome screen 25 .

It is understandable that the processing module 22 performs a packetization operation on the data of the first color channel, the data of the second color channel, and the data of the third color channel in parallel, and after obtaining the corresponding MIPI protocol data packets, the MIPI protocol data packets obtained by packetization can also be sent in parallel. That is to say, the parallel processing flow includes a packetization operation and a sending operation. Usually, in the parallel processing flow, a packetization operation is performed on the data of a single color channel, and after obtaining the MIPI protocol data packet, the MIPI protocol data packet is sent.

Step S206: The first monochrome screen 23 parses the second MIPI protocol data packet to obtain data of the first color channel, and displays the data of the first color channel.

Specifically, the first monochrome screen 23 unpacks the second MIPI protocol data packet according to the MIPI protocol, obtains the data of the first color channel in the second MIPI protocol data packet, and sends the data of the first color channel for display.

Step S207: The second monochrome screen 24 parses the third MIPI protocol data packet to obtain data of the second color channel, and displays the data of the second color channel.

Specifically, the second monochrome screen 24 unpacks the third MIPI protocol data packet according to the MIPI protocol, obtains the data of the second color channel in the third MIPI protocol data packet, and sends the data of the second color channel for display.

Step S208: The third monochrome screen 25 parses the fourth MIPI protocol data packet to obtain data of the third color channel, and displays the data of the third color channel.

Specifically, the third monochrome screen 25 unpacks the fourth MIPI protocol data packet according to the MIPI protocol, obtains the data of the third color channel in the fourth MIPI protocol data packet, and sends the data of the third color channel for display.

It should be noted that in a normal MIPI protocol data packet, three bytes correspond to one pixel. At this time, the screen can display one pixel based on the three bytes without display abnormality. A normal MIPI protocol data packet refers to a data packet including image data with three color channels.

In the second MIPI protocol data packet, the third MIPI protocol data packet and the fourth MIPI protocol data packet, one byte corresponds to one pixel, so a customized implementation of the DDIC on the screen side is required so that the DDIC on the screen side can display one pixel according to one byte without causing display abnormalities.

It should also be pointed out that compared with monochrome display based on a MIPI protocol data packet including complete three color channel data, the processing complexity of DDIC on the screen side is lower when the screen side performs monochrome display based on a MIPI protocol data packet including only a single color channel data.

Specifically, when the screen receives a MIPI protocol data packet including three color channel data, the DDIC on the screen needs to perform the following processes: parse the MIPI protocol data packet, extract and separate single color channel data from the image data, identify the color channel data required by itself from multiple color channel data, and send the single color channel data for display.

When the screen receives a MIPI protocol data packet including only a single color channel, the DDIC on the screen needs to perform the following process: parsing the MIPI protocol data packet and sending the single color channel data for display.

By comparison, it can be seen that when the screen performs monochrome display according to the MIPI protocol data including single color channel data, there is no need to perform the processes of extracting and separating single color channel data from image data, and identifying the color channel data required by itself from multiple color channel data, thereby reducing the processing complexity.

As can be seen from the above, the monochrome screen display solution provided in the embodiment of the present application reduces the redundant data received by the screen end, saves the transmission bandwidth, and reduces the processing complexity of the screen end.

As shown above, the processing module 22 can realize functions such as analysis, extraction and separation of single color channel data, and packaging. The analysis function refers to parsing the MIPI protocol data packet, and the packaging function refers to performing packaging operations according to the MIPI protocol to obtain a MIPI protocol data packet.

In a specific application, multiple logic units in the processing module 22 can be used to analyze the functions, the data of a single color channel, Separation function, package group function, etc.

3A, the processing module 22 may include a first logic unit 221, a second logic unit 222, a third logic unit 223 and a fourth logic unit 224. The first logic unit 221 is connected to the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 respectively.

Among them, the first logic unit 221 is used to obtain the first MIPI protocol data packet, and parse the first MIPI protocol data packet to obtain the image data in the first MIPI protocol data packet; then extract and separate the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data, and transmit the data of the first color channel to the second logic unit 222, transmit the data of the second color channel to the second logic unit 222, and transmit the data of the third color channel to the fourth logic unit 224.

The second logic unit 222 is used to receive the data of the first color channel from the first logic unit 221, and perform a packet operation on the data of the first color channel to obtain a second MIPI protocol data packet, and transmit the second MIPI protocol data packet to the first monochrome screen 23. The first monochrome screen 23 parses the second MIPI protocol data packet, obtains the data of the first color channel, and then displays the data of the first color channel.

Similarly, the third logic unit 223 is used to receive the data of the second color channel from the first logic unit 221, and perform a packet operation on the data of the second color channel to obtain a third MIPI protocol data packet, and transmit the third MIPI protocol data packet to the second monochrome screen 24. The second monochrome screen 24 parses the third MIPI protocol data packet, obtains the data of the second color channel, and then displays the data of the second color channel.

The fourth logic unit 224 is used to receive the data of the third color channel from the first logic unit 221, and perform a packet operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and transmit the fourth MIPI protocol data packet to the third monochrome screen 25. The third monochrome screen 25 parses the third MIPI protocol data packet, obtains the data of the third color channel, and then displays the data of the third color channel.

The first logic unit 221 is used to implement the parsing function and the extraction and separation function of the single color channel data, while the second logic unit 222 , the third logic unit 223 and the fourth logic unit 224 are used to implement the packaging function.

The first logic unit 221 can extract single color channel data from the image data in parallel and send them to the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 in parallel, and the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 can also perform packaging operations on the single color channel data in parallel.

As another example, referring to another logic unit schematic diagram shown in FIG. 3B , the processing module 22 may include a data processing unit 2211 , a fifth logic unit 2212 , a second logic unit 222 , a third logic unit 223 , and a fourth logic unit 224 .

The output end of the fifth logic unit 2212 is connected to the input end of the data processing unit 2211 , and the output end of the data processing unit 2211 is connected to the input ends of the second logic unit 222 , the third logic unit 223 , and the fourth logic unit 224 , respectively.

The fifth logic unit 2212 is used to parse the first MIPI protocol data packet, obtain image data, and transmit the image data to the data processing unit 2211 .

The data processing unit 2211 is used to extract and separate data of the first color channel, data of the second color channel, and data of the third color channel from the image data, and transmit the data of the first color channel to the second logic unit 222, transmit the data of the second color channel to the third logic unit 223, and transmit the data of the third color channel to the fourth logic unit 224.

The second logic unit 222 is used to receive the data of the first color channel from the first logic unit 221 , perform a packetization operation on the data of the first color channel, obtain a second MIPI protocol data packet, and transmit the second MIPI protocol data packet to the first monochrome screen 23 .

The third logic unit 223 is used to receive the data of the second color channel from the first logic unit 221 , perform a packetization operation on the data of the second color channel, obtain a third MIPI protocol data packet, and transmit the third MIPI protocol data packet to the second monochrome screen 24 .

The fourth logic unit 224 is used to receive the data of the third color channel from the first logic unit 221 , perform a packetization operation on the data of the third color channel, obtain a fourth MIPI protocol data packet, and transmit the fourth MIPI protocol data packet to the third monochrome screen 25 .

Compared with FIG. 3A , FIG. 3B realizes the extraction and separation function of single color channel data through the data processing unit 2211, so that the fifth logic unit 2212, the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 can be designed as the same logic unit, that is, the fifth logic unit 2212, the second logic unit 222, the third logic unit 223 and the fourth logic unit The fifth logic unit 2212 uses the parsing function, while the second logic unit 222, the third logic unit 223 and the fourth logic unit 224 use the packaging function. This makes it easier to design and implement.

It can be understood that the logic unit and the data processing unit shown in FIG. 3A and FIG. 3B may be software modules, hardware modules, or functional modules implemented by the combined action of software and hardware.

For example, when the processing module 22 is an FPGA, the first logic unit 221, the second logic unit 222, the third logic unit 223, the fourth logic unit 224 and the fifth logic unit 2212 in Figures 3A and 3B can all be D-PHY modules or C-PHY modules. Among them, PHY (Physical) belongs to the lowest layer of the MIPI interface, that is, the physical layer, that is, the port physical layer, which is directly related to physical wiring, signal transmission, etc.

As shown above, the processing module 22 can be an FPGA, and the image data in the first MIPI protocol data packet can be RGB image data. In order to better introduce and illustrate the monochrome screen display solution provided in the embodiment of the present application, the following is combined with Figures 4A to 4E, using FPGA and RGB image data as examples for introduction and explanation. Among them, Figure 4A is a schematic block diagram of the monochrome screen display system architecture provided in the embodiment of the present application, Figure 4B is another schematic block diagram of the monochrome screen display system architecture provided in the embodiment of the present application, Figure 4C is a schematic block diagram of the MIPI protocol data packet provided in the embodiment of the present application, Figure 4D is a schematic block diagram of the logic unit of the FPGA provided in the embodiment of the present application, and Figure 4E is a schematic diagram of the MIPI protocol data packet transmission provided in the embodiment of the present application.

As shown in FIG4A , the monochrome screen display system may include SOC 41, FPGA 42, a first monochrome screen 43, a second monochrome screen 44, and a third monochrome screen 45. FPGA 42 includes D-PHY 421, D-PHY 422, D-PHY 423, and D-PHY 424.

SOC 41 outputs a MIPI protocol data packet including RGB image data, and transmits the MIPI protocol data packet to FPGA 42 through a MIPI interface.

After FPGA42 receives the MIPI protocol data packet including the RGB image data, it can parse the MIPI protocol data packet through D-PHY 421 to obtain the RGB image data, and extract and separate the R channel data, G channel data and B channel data from the RGB image data; finally, the R channel data is transmitted to D-PHY 422, the G channel data is transmitted to D-PHY 423, and the B channel data is transmitted to D-PHY 424.

After receiving the R channel data, D-PHY 422 performs a packetization operation on the R channel data to obtain a MIPI protocol data packet including the R channel data, and transmits the MIPI protocol data packet to the first monochrome screen 43 through the MIPI interface. The first monochrome screen 43 parses the received MIPI protocol data packet to obtain the R channel data, and displays red according to the R channel data.

After receiving the G channel data, D-PHY 423 performs a packetization operation on the G channel data to obtain a MIPI protocol data packet including the G channel data, and transmits the MIPI protocol data packet to the second monochrome screen 44 through the MIPI interface. The second monochrome screen 44 parses the received MIPI protocol data packet to obtain the G channel data, and displays green according to the G channel data.

After receiving the B channel data, D-PHY 424 performs a packetization operation on the B channel data to obtain a MIPI protocol data packet including the B channel data, and transmits the MIPI protocol data packet to the third monochrome screen 45 through the MIPI interface. The third monochrome screen 45 parses the received MIPI protocol data packet to obtain the B channel data, and displays blue according to the B channel data.

D-PHY 422, D-PHY 423, and D-PHY 424 can process each color channel data in parallel.

It can be understood that when the interface of the monochrome screen is the display serial interface (DSI), the logic unit in FPGA42 can be D-PHY; when the interface of the monochrome screen is the camera serial interface (CSI), the logic unit in FPGA42 can be C-PHY.

D-PHY 421 in FIG4A is used to implement the parsing function and the single color channel extraction and separation function, while D-PHY 422 to D-PHY 424 are used to implement the packetization function, so D-PHY 421 is different from D-PHY 422 to D-PHY 424.

For ease of design and implementation, the D-PHYs in FPGA42 can be made the same, that is, all D-PHYs are used to implement parsing and packaging functions. At this time, it is necessary to additionally set up a data processing unit to implement the single color channel extraction and separation function. Exemplarily, as shown in FIG4B , a data processing unit is set in the FPGA, and the data processing unit is used to extract R channel data, G channel data, and B channel data from the RGB image data, and transmit each channel data to the corresponding D-PHY respectively. The functions of the four D-PHYs in the FPGA are all parsing function and packaging function, except that one of the D-PHYs uses the parsing function, and the other three D-PHYs use the packaging function. The similarities between FIG4A and FIG4B are not repeated here.

As shown in FIG4C , the MIPI protocol data packet 46 transmitted by the SOC 41 to the FPGA 42 includes a low power state (LPS), a start of transmission (SOT), a package header, RGB data, and an end of transmission (EoT), etc.

As shown in FIG4D , after receiving the MIPI protocol data packet 46 , the FPGA 42 parses the MIPI protocol data packet 46 through the D-PHY 421 to obtain RGB image data, as shown in FIG4D , where the D-PHY 421 includes data such as RGBRGBRGB.

After extracting R channel data, G channel data, and B channel data from the RGB image data, D-PHY421 transmits the R channel data to D-PHY422, transmits the G channel data to D-PHY423, and transmits the B channel data to D-PHY424.

As shown in FIG. 4E , the D-PHY 422 performs a packetization operation on the R channel data to obtain a MIPI protocol data packet 47 , and transmits the MIPI protocol data packet 47 to the first monochrome screen 43 .

The D-PHY 423 performs a packetization operation on the G channel data to obtain a MIPI protocol data packet 48 , and transmits the MIPI protocol data packet 48 to the second monochrome screen 44 .

The D-PHY 424 performs a packetization operation on the B channel data to obtain a MIPI protocol data packet 49 , and transmits the MIPI protocol data packet 49 to the third monochrome screen 45 .

It should be noted that due to the particularity of FPGA hardware, the above process is an extremely fast pipeline with minimal latency. In addition, the D-PHY and data processing units in the FPGA are simulated, that is, the programmable characteristics of the FPGA are used to simulate each logic unit through programming, and each logic unit implements the corresponding function.

As can be seen from the above, FPGA divides a MIPI signal including RGB image data into three monochrome MIPI signals, and transmits the three monochrome MIPI signals to the corresponding monochrome screen respectively, so that the monochrome screen can display monochrome according to the monochrome MIPI signal, reducing the redundant data received by the screen end, saving transmission bandwidth, and reducing the processing complexity of DDIC on the screen end.

Please refer to FIG. 5, which is a schematic flow chart of a monochrome screen display method provided in an embodiment of the present application. The method is applied to a processing module, and the method may include the following steps:

Step S501: Acquire a first mobile industry processor interface MIPI protocol data packet, where the first MIPI protocol data packet includes image data, and the image data includes data of a first color channel, data of a second color channel, and data of a third color channel.

In some possible implementations, the image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.

Step S502: After parsing the first MIPI protocol data packet to obtain image data, data of the first color channel, data of the second color channel, and data of the third color channel are extracted from the image data.

Step S503: perform a packetization operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen.

Step S504: perform a packetization operation on the data of the second color channel to obtain a third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen.

Step S505: perform a packetization operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.

It should be noted that steps S503 to S505 may be executed in parallel or not. The processing module may be, but is not limited to, an FPGA. Each monochrome screen receives a MIPI protocol data packet including data of a single color channel, and may perform monochrome display according to the MIPI protocol data packet. The similarities between this embodiment and the above embodiments may be referred to each other, and will not be repeated here.

Please refer to FIG6 , which is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include a processing module 610 , a memory 620 , a first monochrome screen 630 , a second monochrome screen 640 , and a third monochrome screen 650 .

It is to be understood that the structures illustrated in the embodiments of the present application do not constitute specific limitations on the electronic device. In other embodiments of the present application, the electronic device may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

For example, when the electronic device is a virtual reality (VR)/AR/mixed reality (MR) device, the electronic device may also include a communication module and a sensor module, etc. The sensor module may include an inertial sensor and a touch sensor, etc.

The processing module 610 may include one or more processing units, for example, the processing module 610 may include an application processor (AP), a graphics processing unit (GPU), an image signal processor (ISP), a digital signal processor (DSP), etc. Different processing units may be independent devices or integrated into one or more processors.

In some embodiments, the processing module 610 may include one or more interfaces. The interface may include a MIPI interface, etc. The MIPI interface may be used to connect the processing module 610 to each monochrome screen. The MIPI interface includes a camera serial interface. In some embodiments, the processing module 610 communicates with the first monochrome screen 630, the second monochrome screen 640, and the third monochrome screen 650 via the DSI interface or the CSI interface to realize the display function of the electronic device.

Of course, the processing module 610 may also include a general-purpose input/output (GPIO) interface. The GPIO interface may be configured as a MIPI interface through software configuration. In this case, in some embodiments, the GPIO interface may be used to connect the processing module 610 and the first monochrome screen 630, the second monochrome screen 640, and the third monochrome screen 650 to realize a display function.

It is understandable that the interface connection relationship between the modules illustrated in the embodiments of the present application is only a schematic illustration and does not constitute a structural limitation on the electronic device. In other embodiments of the present application, the electronic device may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

The electronic device implements the display function through a GPU, a first monochrome screen 630, a second monochrome screen 640, and a third monochrome screen 650, and an application processor. The GPU is a microprocessor for image processing, connecting each monochrome screen and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processing module 610 may include one or more GPUs, which execute program instructions to generate or change display information.

The first monochrome screen 630, the second monochrome screen 640, and the third monochrome screen 650 are used to display images, videos, etc. The monochrome screen includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc.

The memory 620 can be used to store computer executable program codes, which include instructions. The memory 620 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device (such as audio data, a phone book, etc.), etc. In addition, the memory 620 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (universal flash storage, UFS), etc. The processing module 610 executes various functional applications and data processing of the electronic device by running instructions stored in the memory 620 and/or instructions stored in a memory provided in the processing module. For example, the processing module 610 implements the relevant processes of the above-mentioned monochrome display method by implementing the computer program in the memory 620.

The electronic device provided in the embodiments of the present application may include a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, a method as described in any one of the above method embodiments is implemented.

The embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

An embodiment of the present application provides a computer program product. When the computer program product runs on an electronic device, the electronic device can implement the steps in the above-mentioned method embodiments when executing the computer program product.

The present application also provides a chip system, which includes a processor coupled to a memory, and the processor executes a computer program stored in the memory to implement the methods described in the above method embodiments. The chip system can be a single chip or a chip module composed of multiple chips.

In the above embodiments, the description of each embodiment has its own emphasis. For the part that is not described or recorded in detail in a certain embodiment, please refer to the relevant description of other embodiments. It should be understood that the size of the sequence number of each step in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. In addition, in the description of the present application specification and the attached claims, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance. The reference "one embodiment" or "some embodiments" described in the present application specification means that one or more embodiments of the present application include specific features, structures or characteristics described in combination with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in the different parts of this specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways.

Finally, it should be noted that the above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (12)

1. A monochrome screen display system, characterized in that it comprises a processing module, a first monochrome screen, a second monochrome screen and a third monochrome screen;

   The processing module is used to: obtain a first mobile industry processor interface MIPI protocol data packet, the first MIPI protocol data packet includes image data, and the image data includes data of a first color channel, data of a second color channel, and data of a third color channel; parse the first MIPI protocol data packet, and after obtaining the image data, extract the data of the first color channel, the data of the second color channel, and the data of the third color channel from the image data; perform a packetization operation on the data of the first color channel to obtain a second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen; perform a packetization operation on the data of the second color channel to obtain a third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen; perform a packetization operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen;

   The first monochrome screen is used to: receive the second MIPI protocol data packet, parse the second MIPI protocol data packet, obtain data of the first color channel, and display the data of the first color channel;

   The second monochrome screen is used to: receive the third MIPI protocol data packet, parse the third MIPI protocol data packet, obtain data of the second color channel, and display the data of the second color channel;

   The third monochrome screen is used to: receive the fourth MIPI protocol data packet, parse the fourth MIPI protocol data packet to obtain data of the third color channel, and display the data of the third color channel.
2. The system according to claim 1, characterized in that the processing module includes a first logic unit, a second logic unit, a third logic unit and a fourth logic unit;

   The first logic unit is connected to the second logic unit, the third logic unit and the fourth logic unit respectively;

   The first logic unit is used to: parse the first MIPI protocol data packet to obtain the image data; extract the data of the first color channel, the data of the second color channel and the data of the third color channel from the image data; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit;

   The second logic unit is used to: receive the data of the first color channel, perform a packetization operation on the data of the first color channel to obtain the second MIPI protocol data packet, and send the second MIPI protocol data packet to the first monochrome screen;

   The third logic unit is used to: receive the data of the second color channel, perform a packetization operation on the data of the second color channel to obtain the third MIPI protocol data packet, and send the third MIPI protocol data packet to the second monochrome screen;

   The fourth logic unit is used to: receive the data of the third color channel, perform a packetization operation on the data of the third color channel to obtain the fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.
3. The system according to claim 2 is characterized in that the processing module is a field programmable gate array (FPGA), and the first logic unit, the second logic unit, the third logic unit and the fourth logic unit are all D-PHY or C-PHY.
4. The system according to claim 2, characterized in that the first logic unit includes a fifth logic unit and a data processing unit;

   The fifth logic unit is used to: parse the first MIPI protocol data packet to obtain the image data, and send the image data to the data processing unit;

   The data processing unit is used to: extract the data of the first color channel, the data of the second color channel and the data of the third color channel from the image data; send the data of the first color channel to the second logic unit, send the data of the second color channel to the third logic unit, and send the data of the third color channel to the fourth logic unit.
5. The system according to claim 4, characterized in that the processing module is an FPGA, and the second logic unit, the third logic unit, the fourth logic unit and the fifth logic unit are all D-PHY or C-PHY.
6. The system according to any one of claims 1 to 5, characterized in that the image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.
7. The system according to claim 1 is characterized in that the processing module is specifically used to: receive the first MIPI protocol data packet from the system on chip SOC.
8. A monochrome screen display method, characterized in that it is applied to a processing module, and the method comprises:

   Acquire a first mobile industry processor interface MIPI protocol data packet, wherein the first MIPI protocol data packet includes image data, and the image data includes data of a first color channel, data of a second color channel, and data of a third color channel;

   After parsing the first MIPI protocol data packet to obtain the image data, extracting data of the first color channel, data of the second color channel, and data of the third color channel from the image data;

   Performing a packetization operation on the data of the first color channel to obtain a second MIPI protocol data packet, and sending the second MIPI protocol data packet to the first monochrome screen;

   Performing a packetization operation on the data of the second color channel to obtain a third MIPI protocol data packet, and sending the third MIPI protocol data packet to the second monochrome screen;

   Perform a packetization operation on the data of the third color channel to obtain a fourth MIPI protocol data packet, and send the fourth MIPI protocol data packet to the third monochrome screen.
9. The method according to claim 8, characterized in that the processing module is a FPGA.
10. The method according to claim 8 or 9 is characterized in that the image data is RGB image data, the first color channel is the R channel, the second color channel is the G channel, and the third color channel is the B channel.
11. An electronic device, characterized in that it includes a first monochrome screen, a second monochrome screen, a third monochrome screen, a processing module, a memory, and a computer program stored in the memory and executable on the processing module, wherein the processing module implements the method according to any one of claims 8 to 10 when executing the computer program.
12. A computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the method according to any one of claims 8 to 10.