WO2024103566A1 - Display module and display panel - Google Patents

Display module and display panel Download PDF

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WO2024103566A1
WO2024103566A1 PCT/CN2023/078681 CN2023078681W WO2024103566A1 WO 2024103566 A1 WO2024103566 A1 WO 2024103566A1 CN 2023078681 W CN2023078681 W CN 2023078681W WO 2024103566 A1 WO2024103566 A1 WO 2024103566A1
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electrically connected
transistor
substrate
terminal
electrode
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PCT/CN2023/078681
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French (fr)
Chinese (zh)
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曾勉
孙亮
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武汉华星光电半导体显示技术有限公司
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Abstract

The present application provides a display module and a display panel. A pixel driving module and a light-emitting element are integrally packaged to form the display module. Compared with the structure of a silicon-based microchip, the display module of the present application has a low process cost, thereby reducing the cost of the display panel.

Description

显示模块及显示面板Display module and display panel 技术领域Technical Field
本申请涉及显示技术领域,具体涉及一种显示模块及显示面板。The present application relates to the field of display technology, and in particular to a display module and a display panel.
背景技术Background technique
目前主流的mini-LED背光产品、mini-LED直显产品和micro-LED直显产品基本上都是采用主动式驱动。其中一种是基于玻璃背板或柔性背板的主动式驱动结构:其基于低温多晶硅或者氧化铟镓锌薄膜晶体管的背板工艺,在Array制程工艺完成后,像素电路中驱动LED发光的金属阳极和金属阴极会暴露在背板表面;然后再通过打件焊接的工艺将mini-LED灯的P电极、N电极分别与衬底上像素电路中驱动LED发光的金属阳极和金属阴极进行电连接,或者是通过巨量转移和金属键合或者其他键合工艺将micro-LED灯的P电极、N电极分别与衬底上像素电路中驱动LED发光的金属阳极和金属阴极进行电连接,最终实现mini-LED或micro-LED可通过背板电路进行主动驱动。At present, the mainstream mini-LED backlight products, mini-LED direct display products and micro-LED direct display products basically adopt active drive. One of them is an active drive structure based on a glass backplane or a flexible backplane: it is based on a backplane process of low-temperature polysilicon or indium gallium zinc oxide thin-film transistors. After the array process is completed, the metal anode and metal cathode that drive the LED light in the pixel circuit will be exposed on the backplane surface; then the P electrode and N electrode of the mini-LED lamp are electrically connected to the metal anode and metal cathode that drive the LED light in the pixel circuit on the substrate through the welding process, or the P electrode and N electrode of the micro-LED lamp are electrically connected to the metal anode and metal cathode that drive the LED light in the pixel circuit on the substrate through mass transfer and metal bonding or other bonding processes, and finally the mini-LED or micro-LED can be actively driven through the backplane circuit.
而在间距较大的mini-LED直显产品上,所采用主动式驱动的结构一般是基于硅基微型芯片的结构:即采用硅基微型芯片代替原像素驱动模块来驱动单颗或者多颗LED灯,LED灯采用打件方式绑定到主动式驱动的走线衬底上,实现LED与硅基微型芯片的驱动电路的电性连接,并形成阵列结构。In mini-LED direct display products with larger pitch, the active driving structure used is generally based on the structure of a silicon-based microchip: that is, a silicon-based microchip is used instead of the original pixel driving module to drive single or multiple LED lamps. The LED lamp is bonded to the active driving wiring substrate by means of bonding, realizing the electrical connection between the LED and the driving circuit of the silicon-based microchip, and forming an array structure.
目前,因为硅基微型芯片成本较高,而且晶圆尺寸有限,一个晶圆制备出来的芯片数量有限,导致高分辨率的显示面板的成本也会较高。At present, due to the high cost of silicon-based microchips and the limited size of wafers, the number of chips produced on a wafer is limited, resulting in higher costs for high-resolution display panels.
技术问题technical problem
本申请提供一种显示模块及显示面板,以解决显示面板成本较高的问题。The present application provides a display module and a display panel to solve the problem of high cost of display panels.
技术解决方案Technical Solutions
本申请提供一种显示模块,其包括:衬底、像素驱动模块、发光元件、封装膜层、扫描信号接线端、数据信号接线端、第一电平接线端以及第二电平接线端,所述像素驱动模块设在所述衬底的一侧;所述发光元件设在所述像素驱动模块远离所述衬底的一侧,所述像素驱动模块与所述发光元件电连接;所述封装膜层设在所述发光元件远离所述衬底的一侧;所述扫描信号接线端设在所述衬底远离所述封装膜层的一侧,所述扫描信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;所述数据信号接线端设在所述衬底远离所述封装膜层的一侧,所述数据信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;所述第一电平接线端设在所述衬底远离所述封装膜层的一侧,所述第一电平接线端通过所述衬底上的开孔与所述发光元件或所述像素驱动模块电连接;所述第二电平接线端设在所述衬底远离所述封装膜层的一侧,所述第二电平接线端通过所述衬底上的开孔与所述像素驱动模块或所述发光元件电连接。The present application provides a display module, which includes: a substrate, a pixel driving module, a light-emitting element, a packaging film layer, a scan signal terminal, a data signal terminal, a first level terminal and a second level terminal, wherein the pixel driving module is arranged on one side of the substrate; the light-emitting element is arranged on a side of the pixel driving module away from the substrate, and the pixel driving module is electrically connected to the light-emitting element; the packaging film layer is arranged on a side of the light-emitting element away from the substrate; the scan signal terminal is arranged on a side of the substrate away from the packaging film layer, and the scan signal terminal is electrically connected to the pixel driving module through an opening on the substrate; the data signal terminal is arranged on a side of the substrate away from the packaging film layer, and the data signal terminal is electrically connected to the pixel driving module through an opening on the substrate; the first level terminal is arranged on a side of the substrate away from the packaging film layer, and the first level terminal is electrically connected to the light-emitting element or the pixel driving module through the opening on the substrate; the second level terminal is arranged on a side of the substrate away from the packaging film layer, and the second level terminal is electrically connected to the pixel driving module or the light-emitting element through the opening on the substrate.
可选的,在本申请一些实施例中,所述显示模块还包括:传感器以及信号读取接线端,所述传感器设在所述衬底与所述封装膜层之间;所述信号读取接线端设在所述衬底远离所述封装膜层的一侧,所述信号读取接线端通过所述衬底上的开孔与所述传感器电连接,所述扫描信号接线端通过所述衬底上的开孔与所述传感器电连接。Optionally, in some embodiments of the present application, the display module also includes: a sensor and a signal reading terminal, the sensor is arranged between the substrate and the packaging film layer; the signal reading terminal is arranged on a side of the substrate away from the packaging film layer, the signal reading terminal is electrically connected to the sensor through an opening on the substrate, and the scanning signal terminal is electrically connected to the sensor through an opening on the substrate.
可选的,在本申请一些实施例中,所述像素驱动模块包括:第一晶体管以及第二晶体管,所述第一晶体管的源极、漏极以及所述发光元件串接于所述第一电平接线端和所述第二电平接线端之间;所述第二晶体管的栅极与所述扫描信号接线端电连接,所述第二晶体管的源极与所述数据信号接线端电连接,所述第二晶体管的漏极与所述第一晶体管的栅极电连接。Optionally, in some embodiments of the present application, the pixel driving module includes: a first transistor and a second transistor, the source, the drain and the light-emitting element of the first transistor are connected in series between the first level terminal and the second level terminal; the gate of the second transistor is electrically connected to the scanning signal terminal, the source of the second transistor is electrically connected to the data signal terminal, and the drain of the second transistor is electrically connected to the gate of the first transistor.
可选的,在本申请一些实施例中,所述第一晶体管的源极与所述第一电平接线端电连接,所述第一晶体管的漏极与所述发光元件的第二电极电连接,所述发光元件的第一电极与所述第二电平接线端电连接;Optionally, in some embodiments of the present application, the source of the first transistor is electrically connected to the first level terminal, the drain of the first transistor is electrically connected to the second electrode of the light emitting element, and the first electrode of the light emitting element is electrically connected to the second level terminal;
可选的,在本申请一些实施例中,所述第一晶体管的源极与所述发光元件的第一电极电连接,所述第一晶体管的漏极与所述第二电平接线端电连接,所述发光元件的第二电极与所述第一电平接线端电连接。Optionally, in some embodiments of the present application, the source of the first transistor is electrically connected to the first electrode of the light-emitting element, the drain of the first transistor is electrically connected to the second level terminal, and the second electrode of the light-emitting element is electrically connected to the first level terminal.
可选的,在本申请一些实施例中,所述像素驱动模块还包括:保持电容,所述保持电容的第一极板与所述第一晶体管的栅极电连接,所述保持电容的第二极板与所述第一电平接线端电连接。Optionally, in some embodiments of the present application, the pixel driving module further includes: a holding capacitor, a first plate of the holding capacitor being electrically connected to the gate of the first transistor, and a second plate of the holding capacitor being electrically connected to the first level terminal.
可选的,在本申请一些实施例中,所述传感器包括:公共电极、光电二极管以及第三晶体管,所述光电二极管的第一电极与所述公共电极电连接;所述第三晶体管的漏极与所述光电二极管的第二电极电连接,所述第三晶体管的源极与所述信号读取接线端电连接,所述第三晶体管的栅极与所述扫描信号接线端电连接。Optionally, in some embodiments of the present application, the sensor includes: a common electrode, a photodiode and a third transistor, the first electrode of the photodiode is electrically connected to the common electrode; the drain of the third transistor is electrically connected to the second electrode of the photodiode, the source of the third transistor is electrically connected to the signal reading terminal, and the gate of the third transistor is electrically connected to the scanning signal terminal.
可选的,在本申请一些实施例中,所述显示模块还包括:有源层,所述有源层设在所述衬底与所述封装膜层之间,所述有源层包括所述第一晶体管的半导体部、所述第二晶体管的半导体部、所述光电二极管的半导体部和所述第三晶体管的半导体部。Optionally, in some embodiments of the present application, the display module also includes: an active layer, the active layer is arranged between the substrate and the packaging film layer, the active layer includes the semiconductor portion of the first transistor, the semiconductor portion of the second transistor, the semiconductor portion of the photodiode and the semiconductor portion of the third transistor.
可选的,在本申请一些实施例中,所述显示模块还包括:第一电极层,所述第一电极层设在所述衬底与所述封装膜层之间,所述第一电极层包括所述第一晶体管的栅极、所述第二晶体管的栅极和所述第三晶体管的栅极。Optionally, in some embodiments of the present application, the display module further includes: a first electrode layer, the first electrode layer is arranged between the substrate and the packaging film layer, the first electrode layer includes a gate of the first transistor, a gate of the second transistor and a gate of the third transistor.
可选的,在本申请一些实施例中,所述第一电极层还包括第一走线电极,所述第一走线电极的第一端分别与所述第一晶体管的栅极、所述第三晶体管的栅极电连接,所述第一走线电极的第二端通过所述衬底上的开孔与所述扫描信号接线端电连接。Optionally, in some embodiments of the present application, the first electrode layer also includes a first routing electrode, the first end of the first routing electrode is electrically connected to the gate of the first transistor and the gate of the third transistor, respectively, and the second end of the first routing electrode is electrically connected to the scan signal terminal through an opening on the substrate.
可选的,在本申请一些实施例中,所述显示模块还包括:第二电极层,所述第二电极层设在所述衬底与所述封装膜层之间,所述第二电极层包括所述第一晶体管的源极及漏极、所述第二晶体管的源极及漏极和所述第三晶体管的源极及漏极。Optionally, in some embodiments of the present application, the display module also includes: a second electrode layer, the second electrode layer is arranged between the substrate and the packaging film layer, the second electrode layer includes the source and drain of the first transistor, the source and drain of the second transistor, and the source and drain of the third transistor.
可选的,在本申请一些实施例中,所述第二电极层还包括第二走线电极,所述第二走线电极的第一端分别与所述第一晶体管的源极电连接,所述第二走线电极的第二端通过所述衬底上的开孔与所述第一电平接线端电连接。Optionally, in some embodiments of the present application, the second electrode layer also includes a second routing electrode, the first ends of the second routing electrodes are respectively electrically connected to the source of the first transistor, and the second ends of the second routing electrodes are electrically connected to the first level terminal through the opening on the substrate.
可选的,在本申请一些实施例中,所述第二电极层还包括第三走线电极,所述第三走线电极的第一端分别与所述第二晶体管的源极电连接,所述第三走线电极的第二端通过所述衬底上的开孔与所述数据信号接线端电连接。Optionally, in some embodiments of the present application, the second electrode layer also includes a third routing electrode, the first end of the third routing electrode is electrically connected to the source of the second transistor, and the second end of the third routing electrode is electrically connected to the data signal terminal through an opening on the substrate.
可选的,在本申请一些实施例中,所述第二电极层还包括第四走线电极,所述第四走线电极的第一端分别与所述第三晶体管的漏极电连接,所述第四走线电极的第二端通过所述衬底上的开孔与所述信号读取接线端电连接。Optionally, in some embodiments of the present application, the second electrode layer also includes a fourth routing electrode, the first end of the fourth routing electrode is electrically connected to the drain of the third transistor, and the second end of the fourth routing electrode is electrically connected to the signal reading terminal through an opening on the substrate.
另一方面,本申请还提供一种显示面板,其包括:衬底、像素驱动模块、发光元件、封装膜层、扫描信号接线端、数据信号接线端、第一电平接线端、第二电平接线端以及基板,所述像素驱动模块设在所述衬底的一侧;所述发光元件设在所述像素驱动模块远离所述衬底的一侧,所述像素驱动模块与所述发光元件电连接;所述封装膜层设在所述发光元件远离所述衬底的一侧;所述扫描信号接线端设在所述衬底远离所述封装膜层的一侧,所述扫描信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;所述数据信号接线端设在所述衬底远离所述封装膜层的一侧,所述数据信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;所述第一电平接线端设在所述衬底远离所述封装膜层的一侧,所述第一电平接线端通过所述衬底上的开孔与所述发光元件或所述像素驱动模块电连接;所述第二电平接线端设在所述衬底远离所述封装膜层的一侧,所述第二电平接线端通过所述衬底上的开孔与所述像素驱动模块或所述发光元件电连接;所述基板上阵列设有所述显示模块,所述基板上设有扫描线、数据线、第一电平信号线、第二电平信号线以及信号读取线;所述扫描线与所述扫描信号接线端电连接,所述数据线与所述数据信号接线端电连接,所述第一电平信号线与所述第一电平接线端电连接,所述第二电平信号线与所述第二电平接线端电连接,所述信号读取线与所述信号读取接线端电连接。On the other hand, the present application also provides a display panel, which includes: a substrate, a pixel driving module, a light-emitting element, a packaging film layer, a scan signal terminal, a data signal terminal, a first level terminal, a second level terminal and a substrate, wherein the pixel driving module is arranged on one side of the substrate; the light-emitting element is arranged on a side of the pixel driving module away from the substrate, and the pixel driving module is electrically connected to the light-emitting element; the packaging film layer is arranged on a side of the light-emitting element away from the substrate; the scan signal terminal is arranged on a side of the substrate away from the packaging film layer, and the scan signal terminal is electrically connected to the pixel driving module through an opening on the substrate; the data signal terminal is arranged on a side of the substrate away from the packaging film layer, and the data signal terminal is electrically connected to the pixel driving module through an opening on the substrate; the first A level terminal is arranged on a side of the substrate away from the packaging film layer, and the first level terminal is electrically connected to the light-emitting element or the pixel driving module through an opening on the substrate; the second level terminal is arranged on a side of the substrate away from the packaging film layer, and the second level terminal is electrically connected to the pixel driving module or the light-emitting element through an opening on the substrate; the display module is arrayed on the substrate, and a scan line, a data line, a first level signal line, a second level signal line and a signal reading line are arranged on the substrate; the scan line is electrically connected to the scan signal terminal, the data line is electrically connected to the data signal terminal, the first level signal line is electrically connected to the first level terminal, the second level signal line is electrically connected to the second level terminal, and the signal reading line is electrically connected to the signal reading terminal.
可选的,在本申请一些实施例中,所述显示模块还包括:传感器以及信号读取接线端,所述传感器设在所述衬底与所述封装膜层之间;所述信号读取接线端设在所述衬底远离所述封装膜层的一侧,所述信号读取接线端通过所述衬底上的开孔与所述传感器电连接,所述扫描信号接线端通过所述衬底上的开孔与所述传感器电连接。Optionally, in some embodiments of the present application, the display module also includes: a sensor and a signal reading terminal, the sensor is arranged between the substrate and the packaging film layer; the signal reading terminal is arranged on a side of the substrate away from the packaging film layer, the signal reading terminal is electrically connected to the sensor through an opening on the substrate, and the scanning signal terminal is electrically connected to the sensor through an opening on the substrate.
可选的,在本申请一些实施例中,所述像素驱动模块包括:第一晶体管以及第二晶体管,所述第一晶体管的源极、漏极以及所述发光元件串接于所述第一电平接线端和所述第二电平接线端之间;所述第二晶体管的栅极与所述扫描信号接线端电连接,所述第二晶体管的源极与所述数据信号接线端电连接,所述第二晶体管的漏极与所述第一晶体管的栅极电连接。Optionally, in some embodiments of the present application, the pixel driving module includes: a first transistor and a second transistor, the source, the drain and the light-emitting element of the first transistor are connected in series between the first level terminal and the second level terminal; the gate of the second transistor is electrically connected to the scanning signal terminal, the source of the second transistor is electrically connected to the data signal terminal, and the drain of the second transistor is electrically connected to the gate of the first transistor.
可选的,在本申请一些实施例中,所述第一晶体管的源极与所述第一电平接线端电连接,所述第一晶体管的漏极与所述发光元件的第二电极电连接,所述发光元件的第一电极与所述第二电平接线端电连接;Optionally, in some embodiments of the present application, the source of the first transistor is electrically connected to the first level terminal, the drain of the first transistor is electrically connected to the second electrode of the light emitting element, and the first electrode of the light emitting element is electrically connected to the second level terminal;
可选的,在本申请一些实施例中,所述第一晶体管的源极与所述发光元件的第一电极电连接,所述第一晶体管的漏极与所述第二电平接线端电连接,所述发光元件的第二电极与所述第一电平接线端电连接。Optionally, in some embodiments of the present application, the source of the first transistor is electrically connected to the first electrode of the light-emitting element, the drain of the first transistor is electrically connected to the second level terminal, and the second electrode of the light-emitting element is electrically connected to the first level terminal.
可选的,在本申请一些实施例中,所述像素驱动模块还包括:保持电容,所述保持电容的第一极板与所述第一晶体管的栅极电连接,所述保持电容的第二极板与所述第一电平接线端电连接。Optionally, in some embodiments of the present application, the pixel driving module further includes: a holding capacitor, a first plate of the holding capacitor being electrically connected to the gate of the first transistor, and a second plate of the holding capacitor being electrically connected to the first level terminal.
有益效果Beneficial Effects
本申请提供一种显示模块及显示面板,其中显示模块包括:衬底、像素驱动模块、发光元件、封装膜层、扫描信号接线端、数据信号接线端、第一电平接线端以及第二电平接线端,所述像素驱动模块设在所述衬底的一侧;所述发光元件设在所述像素驱动模块远离所述衬底的一侧,所述像素驱动模块与所述发光元件电连接;所述封装膜层设在所述发光元件远离所述衬底的一侧;所述扫描信号接线端设在所述衬底远离所述封装膜层的一侧,所述扫描信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;所述数据信号接线端设在所述衬底远离所述封装膜层的一侧,所述数据信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;所述第一电平接线端设在所述衬底远离所述封装膜层的一侧,所述第一电平接线端通过所述衬底上的开孔与所述发光元件或所述像素驱动模块电连接;所述第二电平接线端设在所述衬底远离所述封装膜层的一侧,所述第二电平接线端通过所述衬底上的开孔与所述像素驱动模块或所述发光元件电连接。本申请将像素驱动模块和发光元件集成封装而形成显示模块,相对于硅基微型芯片的结构,本申请的显示模块具有较低的制程成本,从而降低显示面板的成本。The present application provides a display module and a display panel, wherein the display module comprises: a substrate, a pixel driving module, a light-emitting element, a packaging film layer, a scan signal terminal, a data signal terminal, a first level terminal and a second level terminal, wherein the pixel driving module is arranged on one side of the substrate; the light-emitting element is arranged on a side of the pixel driving module away from the substrate, and the pixel driving module is electrically connected to the light-emitting element; the packaging film layer is arranged on a side of the light-emitting element away from the substrate; the scan signal terminal is arranged on a side of the substrate away from the packaging film layer, and the scan signal terminal is electrically connected to the pixel driving module through an opening on the substrate; the data signal terminal is arranged on a side of the substrate away from the packaging film layer, and the data signal terminal is electrically connected to the pixel driving module through an opening on the substrate; the first level terminal is arranged on a side of the substrate away from the packaging film layer, and the first level terminal is electrically connected to the light-emitting element or the pixel driving module through the opening on the substrate; the second level terminal is arranged on a side of the substrate away from the packaging film layer, and the second level terminal is electrically connected to the pixel driving module or the light-emitting element through the opening on the substrate. The present application integrates and packages the pixel driving module and the light-emitting element to form a display module. Compared with the structure of a silicon-based microchip, the display module of the present application has a lower process cost, thereby reducing the cost of the display panel.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
图1是本申请提供的显示模块的示意图;FIG1 is a schematic diagram of a display module provided by the present application;
图2为图1中A-A剖视图;Fig. 2 is a cross-sectional view of A-A in Fig. 1;
图3为本申请的显示模块的制作过程示意图;FIG3 is a schematic diagram of the manufacturing process of the display module of the present application;
图4为本申请的显示模块的第一实施例的电路连接示意图;FIG4 is a circuit connection diagram of a first embodiment of a display module of the present application;
图5本申请的显示模块的第一实施例的具体结构示意图;FIG5 is a schematic diagram of the specific structure of the first embodiment of the display module of the present application;
图6为本申请的显示面板的第一结构示意图;FIG6 is a first structural schematic diagram of a display panel of the present application;
图7为本申请的显示面板的第二结构示意图;FIG7 is a second structural schematic diagram of the display panel of the present application;
图8为本申请的显示模块的第二实施例的电路连接示意图;FIG8 is a circuit connection diagram of a second embodiment of a display module of the present application;
图9为本申请的显示模块的第二实施例的具体结构示意图;FIG9 is a schematic diagram of a specific structure of a second embodiment of a display module of the present application;
图10为本申请的显示模块的第三实施例的示意图。FIG. 10 is a schematic diagram of a third embodiment of a display module of the present application.
本发明的实施方式Embodiments of the present invention
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.
在本申请的描述中,需要理解的是,术语“第一”和“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”和“第二”等的特征可以明示或者隐含地包括一个或者更多个特征,因此不能理解为对本申请的限制。In the description of the present application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, features defined as "first" and "second" etc. may explicitly or implicitly include one or more features, and therefore should not be understood as limiting the present application.
本申请所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件,由于这里采用的晶体管的源极、漏极是对称的,所以其源极、漏极是可以互换的。在本申请实施例中,为区分晶体管除栅极之外的两极,将其中一极称为源极,另一极称为漏极。按附图中的形态规定开关晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。此外本申请实施例所采用的晶体管可以包括P型晶体管和/或N型晶体管两种,其中,P型晶体管在栅极为低电平时导通,在栅极为高电平时截止,N型晶体管为在栅极为高电平时导通,在栅极为低电平时截止。按附图中的形态规定晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。The transistors used in all embodiments of the present application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used here are symmetrical, their source and drain are interchangeable. In the embodiment of the present application, in order to distinguish the two poles of the transistor except the gate, one of the poles is called the source and the other is called the drain. According to the form in the accompanying drawings, the middle end of the switching transistor is defined as the gate, the signal input end is the source, and the output end is the drain. In addition, the transistors used in the embodiments of the present application may include P-type transistors and/or N-type transistors, wherein the P-type transistor is turned on when the gate is at a low level and is turned off when the gate is at a high level, and the N-type transistor is turned on when the gate is at a high level and is turned off when the gate is at a low level. According to the form in the accompanying drawings, the middle end of the transistor is defined as the gate, the signal input end is the source, and the output end is the drain.
本申请提供一种显示模块及显示面板,以下进行详细说明。需要说明的是,以下实施例的描述顺序不作为对本申请实施例优选顺序的限定。The present application provides a display module and a display panel, which are described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments of the present application.
需要说明的是,由于本申请采用的晶体管的源极、漏极是对称的,所以其源极、漏极是可以互换的。It should be noted that, since the source and drain of the transistor used in the present application are symmetrical, the source and drain are interchangeable.
本申请所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件,由于这里采用的晶体管的源极、漏极是对称的,所以其源极、漏极是可以互换的。在本申请实施例中,为区分晶体管除栅极之外的两极,将其中一极称为源极,另一极称为漏极。按附图中的形态规定开关晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。此外本申请实施例所采用的晶体管可以包括P型晶体管和/或N型晶体管两种,其中,P型晶体管在栅极为低电平时导通,在栅极为高电平时截止,N型晶体管为在栅极为高电平时导通,在栅极为低电平时截止。按附图中的形态规定晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。The transistors used in all embodiments of the present application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used here are symmetrical, their source and drain are interchangeable. In the embodiment of the present application, in order to distinguish the two poles of the transistor except the gate, one of the poles is called the source and the other is called the drain. According to the form in the accompanying drawings, the middle end of the switching transistor is defined as the gate, the signal input end is the source, and the output end is the drain. In addition, the transistors used in the embodiments of the present application may include P-type transistors and/or N-type transistors, wherein the P-type transistor is turned on when the gate is at a low level and is turned off when the gate is at a high level, and the N-type transistor is turned on when the gate is at a high level and is turned off when the gate is at a low level. According to the form in the accompanying drawings, the middle end of the transistor is defined as the gate, the signal input end is the source, and the output end is the drain.
本申请提供一种显示模块及显示面板,以下进行详细说明。需要说明的是,以下实施例的描述顺序不作为对本申请实施例优选顺序的限定。The present application provides a display module and a display panel, which are described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments of the present application.
需要说明的是,由于本申请采用的晶体管的源极、漏极是对称的,所以其源极、漏极是可以互换的。It should be noted that, since the source and drain of the transistor used in the present application are symmetrical, the source and drain are interchangeable.
请参阅图1和图2,图1是本申请提供的显示模块100的示意图,图2为图1中A-A剖视图。本申请提供一种显示模块100,其包括:封装膜层10、衬底20、像素驱动模块30、发光元件40、扫描信号接线端101、数据信号接线端102、第一电平接线端103和第二电平接线端104;Please refer to Figures 1 and 2, Figure 1 is a schematic diagram of a display module 100 provided by the present application, and Figure 2 is a cross-sectional view of A-A in Figure 1. The present application provides a display module 100, which includes: a packaging film layer 10, a substrate 20, a pixel driving module 30, a light-emitting element 40, a scanning signal terminal 101, a data signal terminal 102, a first level terminal 103 and a second level terminal 104;
像素驱动模块30设在衬底20的一侧;发光元件40设在像素驱动模块30远离衬底20的一侧,像素驱动模块30与发光元件40电连接;封装膜层10设在发光元件40远离衬底20的一侧;扫描信号接线端101设在衬底20远离封装膜层10的一侧,扫描信号接线端101通过衬底20上的开孔与像素驱动模块30电连接;数据信号接线端102设在衬底20远离封装膜层10的一侧,数据信号接线端102通过衬底20上的开孔与像素驱动模块30电连接;第一电平接线端103设在衬底20远离封装膜层10的一侧,第一电平接线端103通过衬底20上的开孔与发光元件40或像素驱动模块30电连接;第二电平接线端104设在衬底20远离封装膜层10的一侧,第二电平接线端104通过衬底20上的开孔与像素驱动模块30或发光元件40电连接。The pixel driving module 30 is arranged on one side of the substrate 20; the light emitting element 40 is arranged on the side of the pixel driving module 30 away from the substrate 20, and the pixel driving module 30 is electrically connected to the light emitting element 40; the encapsulation film layer 10 is arranged on the side of the light emitting element 40 away from the substrate 20; the scan signal terminal 101 is arranged on the side of the substrate 20 away from the encapsulation film layer 10, and the scan signal terminal 101 is electrically connected to the pixel driving module 30 through the opening on the substrate 20; the data signal terminal 102 is arranged on the side of the substrate 20 away from the encapsulation film layer 10, and the data signal terminal 102 is electrically connected to the pixel driving module 30 through the opening on the substrate 20; the first level terminal 103 is arranged on the side of the substrate 20 away from the encapsulation film layer 10, and the first level terminal 103 is electrically connected to the light emitting element 40 or the pixel driving module 30 through the opening on the substrate 20; the second level terminal 104 is arranged on the side of the substrate 20 away from the encapsulation film layer 10, and the second level terminal 104 is electrically connected to the pixel driving module 30 or the light emitting element 40 through the opening on the substrate 20.
本申请将像素驱动模块30和发光元件40集成封装而形成显示模块100,相对于硅基微型芯片的结构,本申请的显示模块100具有较低的制程成本,从而降低显示面板的成本。The present application integrates and packages the pixel driving module 30 and the light emitting element 40 to form a display module 100. Compared with the structure of a silicon-based microchip, the display module 100 of the present application has a lower process cost, thereby reducing the cost of the display panel.
进一步地,显示模块100还包括:Furthermore, the display module 100 further includes:
传感器50,传感器50设在衬底20与封装膜层10之间;The sensor 50 is disposed between the substrate 20 and the packaging film layer 10;
信号读取接线端105,信号读取接线端105设在衬底20远离封装膜层10的一侧,信号读取接线端105通过衬底20上的开孔与传感器50电连接,扫描信号接线端101通过衬底20上的开孔与传感器50电连接。在一些实施例中,传感器50为指纹传感器。The signal reading terminal 105 is disposed on a side of the substrate 20 away from the encapsulation film layer 10. The signal reading terminal 105 is electrically connected to the sensor 50 through an opening on the substrate 20. The scanning signal terminal 101 is electrically connected to the sensor 50 through an opening on the substrate 20. In some embodiments, the sensor 50 is a fingerprint sensor.
具体地,传感器50用于获得触摸信号,并在扫描信号接线端101的控制下将触摸信号传送至信号读取接线端105。本申请通过将像素驱动模块30、发光元件40以及传感器50同时封装在一起,而且像素驱动模块30和传感器50采用同一个扫描信号接线端101进行接线,有利于进一步降低显示面板的成本。Specifically, the sensor 50 is used to obtain a touch signal, and transmit the touch signal to the signal reading terminal 105 under the control of the scanning signal terminal 101. The present application packages the pixel driving module 30, the light emitting element 40 and the sensor 50 together, and the pixel driving module 30 and the sensor 50 are connected using the same scanning signal terminal 101, which is conducive to further reducing the cost of the display panel.
进一步地,在一些实施例中,发光元件40在衬底20的正投影位于像素驱动模块30在衬底20的正投影的范围内。发光元件40在衬底20的正投影与传感器50在衬底20的正投影不重叠。Further, in some embodiments, the orthographic projection of the light emitting element 40 on the substrate 20 is within the range of the orthographic projection of the pixel driving module 30 on the substrate 20. The orthographic projection of the light emitting element 40 on the substrate 20 does not overlap with the orthographic projection of the sensor 50 on the substrate 20.
具体地,封装膜层10为具有一开口的封装壳体;衬底20密封地设在封装膜层10的开口处;像素驱动模块30设在衬底20上并位于封装膜层10内;发光元件40设在像素驱动模块30远离衬底20的一侧并位于封装膜层10内,像素驱动模块30与发光元件40电连接;扫描信号接线端101设在衬底20远离封装膜层10的一侧,扫描信号接线端101通过衬底20上的开孔与像素驱动模块电连接;数据信号接线端102设在衬底20远离封装膜层10的一侧,数据信号接线端102通过衬底20上的开孔与像素驱动模块30电连接;第一电平接线端103设在衬底20远离封装膜层10的一侧,第一电平接线端103通过衬底20上的开孔与发光元件40或像素驱动模块30电连接;第二电平接线端104设在衬底20远离封装膜层10的一侧,第二电平接线端104通过衬底20上的开孔与像素驱动模块30或发光元件40电连接。Specifically, the packaging film layer 10 is a packaging shell with an opening; the substrate 20 is sealed at the opening of the packaging film layer 10; the pixel driving module 30 is arranged on the substrate 20 and located in the packaging film layer 10; the light emitting element 40 is arranged on the side of the pixel driving module 30 away from the substrate 20 and located in the packaging film layer 10, and the pixel driving module 30 is electrically connected to the light emitting element 40; the scanning signal terminal 101 is arranged on the side of the substrate 20 away from the packaging film layer 10, and the scanning signal terminal 101 is electrically connected to the pixel driving module through the opening on the substrate 20; the data signal terminal 102 is arranged on a side of the substrate 20 away from the packaging film layer 10, and the data signal terminal 102 is electrically connected to the pixel driving module 30 through an opening on the substrate 20; the first level terminal 103 is arranged on a side of the substrate 20 away from the packaging film layer 10, and the first level terminal 103 is electrically connected to the light-emitting element 40 or the pixel driving module 30 through an opening on the substrate 20; the second level terminal 104 is arranged on a side of the substrate 20 away from the packaging film layer 10, and the second level terminal 104 is electrically connected to the pixel driving module 30 or the light-emitting element 40 through an opening on the substrate 20.
其中,扫描信号接线端101、数据信号接线端102、第一电平接线端103和第二电平接线端104分别设在衬底20远离封装膜层10的一侧,扫描信号接线端101用于与扫描信号线电连接,数据信号接线端102用于与数据信号线电连接,第一电平接线端103用于接入高电平或低电平,第二电平接线端104用于接入低电平或高电平,像素驱动模块30在扫描信号接线端101、数据信号接线端102、第一电平接线端103和第二电平接线端104的控制下驱动发光元件40发光,发光元件40的光通过封装膜层10射出。Among them, the scan signal terminal 101, the data signal terminal 102, the first level terminal 103 and the second level terminal 104 are respectively arranged on the side of the substrate 20 away from the packaging film layer 10, the scan signal terminal 101 is used to be electrically connected to the scan signal line, the data signal terminal 102 is used to be electrically connected to the data signal line, the first level terminal 103 is used to access a high level or a low level, and the second level terminal 104 is used to access a low level or a high level. The pixel driving module 30 drives the light-emitting element 40 to emit light under the control of the scan signal terminal 101, the data signal terminal 102, the first level terminal 103 and the second level terminal 104, and the light of the light-emitting element 40 is emitted through the packaging film layer 10.
在一些实施例中,显示模块100包括一个像素驱动模块30和一个发光元件40,在本申请其他实施例中,显示模块100可以包括多个像素驱动模块30和多个发光元件40。In some embodiments, the display module 100 includes one pixel driving module 30 and one light emitting element 40 . In other embodiments of the present application, the display module 100 may include multiple pixel driving modules 30 and multiple light emitting elements 40 .
请参考图1至图3,图3为本申请的显示模块100的制作过程示意图,另外,本申请的显示模块100的制作方法具体如下:Please refer to FIG. 1 to FIG. 3 , FIG. 3 is a schematic diagram of the manufacturing process of the display module 100 of the present application. In addition, the manufacturing method of the display module 100 of the present application is specifically as follows:
在衬底20的一侧上以一个显示模块100为单位制作形成多个显示模块100的像素驱动模块30,多个显示模块100形成显示模块100阵列,且相邻显示模块100之间留有切割间距;在每个像素驱动模块30上对应地形成发光元件40;在衬底20远离像素驱动模块30的一侧形成扫描信号接线端101、数据信号接线端102、第一电平接线端103和第二电平接线端104;通过激光打孔并在孔内填充金属工艺或者是采用刻蚀挖深孔后填充金属的工艺将像素驱动模块30和发光元件40与扫描信号接线端101、数据信号接线端102、第一电平接线端103和第二电平接线端104电连接;形成封装膜层10,封装膜层10包覆显示模块100的像素驱动模块30和发光元件40,且封装膜层10与衬底20密封封装,具体地,封装膜层10采用透明胶水形成;对显示模块100阵列进行切割得到多个显示模块100。A pixel driving module 30 is formed on one side of a substrate 20 with one display module 100 as a unit to form a plurality of display modules 100. The plurality of display modules 100 form a display module 100 array, and a cutting interval is left between adjacent display modules 100. A light emitting element 40 is formed on each pixel driving module 30. A scanning signal terminal 101, a data signal terminal 102, a first level terminal 103, and a second level terminal 104 are formed on a side of the substrate 20 away from the pixel driving module 30. A hole is drilled by laser and metal is filled in the hole. The pixel driving module 30 and the light emitting element 40 are electrically connected to the scanning signal terminal 101, the data signal terminal 102, the first level terminal 103 and the second level terminal 104 by a process or a process of etching deep holes and then filling metal; a packaging film layer 10 is formed, the packaging film layer 10 covers the pixel driving module 30 and the light emitting element 40 of the display module 100, and the packaging film layer 10 is sealed and packaged with the substrate 20. Specifically, the packaging film layer 10 is formed by transparent glue; the display module 100 array is cut to obtain a plurality of display modules 100.
进一步地,在一些实施例中,显示模块100还包括:Furthermore, in some embodiments, the display module 100 further includes:
传感器50,传感器50设在衬底20上并位于封装膜层10内;The sensor 50 is disposed on the substrate 20 and located in the packaging film layer 10;
信号读取接线端105,信号读取接线端105设在衬底20远离封装膜层10的一侧,信号读取接线端105通过衬底20上的开孔与传感器50电连接,扫描信号接线端101通过衬底20上的开孔与传感器50电连接。The signal reading terminal 105 is arranged on a side of the substrate 20 away from the packaging film layer 10 . The signal reading terminal 105 is electrically connected to the sensor 50 through an opening on the substrate 20 . The scanning signal terminal 101 is electrically connected to the sensor 50 through an opening on the substrate 20 .
请参考图1、图2和图4,图4为本申请的显示模块100的第一实施例的电路连接示意图,具体地,像素驱动模块30包括:Please refer to FIG. 1 , FIG. 2 and FIG. 4 , FIG. 4 is a circuit connection diagram of a first embodiment of a display module 100 of the present application. Specifically, a pixel driving module 30 includes:
第一晶体管T1,第一晶体管T1的源极、漏极以及发光元件40串接于第一电平接线端103和第二电平接线端104之间;A first transistor T1, a source electrode, a drain electrode and a light emitting element 40 of the first transistor T1 are connected in series between a first level wiring terminal 103 and a second level wiring terminal 104;
第二晶体管T2,第二晶体管T2的栅极与扫描信号接线端101电连接,第二晶体管T2的源极与数据信号接线端102电连接,第二晶体管T2的漏极与第一晶体管T1的栅极电连接。The second transistor T2 has a gate electrically connected to the scan signal terminal 101 , a source electrically connected to the data signal terminal 102 , and a drain electrically connected to the gate of the first transistor T1 .
也即是,当扫描信号接线端101的信号使得第二晶体管T2导通时,数据信号接线端102的信号通过第二晶体管T2输送至第一晶体管T1的栅极,并使得第一晶体管T1导通,而第一晶体管T1导通使得串接于第一电平接线端103和第二电平接线端104之间的回路导通,从而使得发光元件40发光。That is, when the signal from the scan signal terminal 101 turns on the second transistor T2, the signal from the data signal terminal 102 is transmitted to the gate of the first transistor T1 through the second transistor T2, and turns on the first transistor T1. The turning on of the first transistor T1 turns on the loop connected in series between the first level terminal 103 and the second level terminal 104, thereby causing the light-emitting element 40 to emit light.
进一步地,在本申请的一些实施例中,第一晶体管T1的源极与第一电平接线端103电连接,第一晶体管T1的漏极与发光元件40的第二电极42电连接,发光元件40的第一电极41与第二电平接线端104电连接。Furthermore, in some embodiments of the present application, the source of the first transistor T1 is electrically connected to the first level terminal 103 , the drain of the first transistor T1 is electrically connected to the second electrode 42 of the light emitting element 40 , and the first electrode 41 of the light emitting element 40 is electrically connected to the second level terminal 104 .
在一些实施例中,像素驱动模块30还包括:In some embodiments, the pixel driving module 30 further includes:
保持电容C,保持电容C的第一极板与第一晶体管T1的栅极电连接,保持电容C的第二极板与第一电平接线端103电连接。A holding capacitor C, wherein a first plate of the holding capacitor C is electrically connected to the gate of the first transistor T1 , and a second plate of the holding capacitor C is electrically connected to the first level connection terminal 103 .
在一些实施例中,传感器50包括:In some embodiments, the sensor 50 includes:
公共电极58;Common electrode 58;
光电二极管L,光电二极管L的第一电极与公共电极58电连接;A photodiode L, wherein a first electrode of the photodiode L is electrically connected to the common electrode 58;
第三晶体管T3,第三晶体管T3的漏极与光电二极管L的第二电极电连接,第三晶体管T3的源极与信号读取接线端105电连接,第三晶体管T3的栅极与扫描信号接线端101电连接。其中,光电二极管L的第一电极为阳极,光电二极管L的第二电极为阴极。The third transistor T3, the drain of the third transistor T3 is electrically connected to the second electrode of the photodiode L, the source of the third transistor T3 is electrically connected to the signal reading terminal 105, and the gate of the third transistor T3 is electrically connected to the scanning signal terminal 101. The first electrode of the photodiode L is an anode, and the second electrode of the photodiode L is a cathode.
当手指按压在传感器50对应的位置时,光源的入射光照射到手指,手指的指纹不同区域产生不同反射光,不同反射光到达光电二极管L产生不同大小的漏电流,第三晶体管T3在扫描信号接线端101的信号控制下开启从而读取光电二极管L的漏电流,再根据读出的不同区域对应不同大小的电流进行指纹成像。When the finger is pressed on the position corresponding to the sensor 50, the incident light of the light source irradiates the finger, and different areas of the fingerprint of the finger generate different reflected lights. The different reflected lights reach the photodiode L to generate leakage currents of different sizes. The third transistor T3 is turned on under the control of the signal of the scanning signal terminal 101 to read the leakage current of the photodiode L, and then fingerprint imaging is performed according to the different sizes of currents corresponding to different areas read out.
请参考图1、图2、图4和图5,图5本申请的显示模块100的第一实施例的具体结构示意图,在一些实施例中,显示模块100还包括:Please refer to FIG. 1 , FIG. 2 , FIG. 4 and FIG. 5 , FIG. 5 is a schematic diagram of a specific structure of a first embodiment of a display module 100 of the present application. In some embodiments, the display module 100 further includes:
有源层201,有源层201设在衬底20与封装膜层10之间,有源层201包括第一晶体管T1的半导体部、第二晶体管T2的半导体部、光电二极管L的半导体部和第三晶体管T3的半导体部。The active layer 201 is disposed between the substrate 20 and the packaging film layer 10 , and includes a semiconductor portion of the first transistor T1 , a semiconductor portion of the second transistor T2 , a semiconductor portion of the photodiode L, and a semiconductor portion of the third transistor T3 .
也即是在本申请将第一晶体管的半导体部、第二晶体管的半导体部、光电二极管的半导体部和第三晶体管的半导体部设在同一层的有源层上,有利于减少有源层的层数设置,从而降低成本以及厚度。That is, in the present application, the semiconductor part of the first transistor, the semiconductor part of the second transistor, the semiconductor part of the photodiode and the semiconductor part of the third transistor are arranged on the same active layer, which is beneficial to reduce the number of layers of the active layer, thereby reducing the cost and thickness.
在一些实施例中,显示模块100还包括:In some embodiments, the display module 100 further includes:
第一电极层203,第一电极层203设在衬底20与封装膜层10之间,第一电极层203包括第一晶体管T1的栅极、第二晶体管T2的栅极和第三晶体管T3的栅极。The first electrode layer 203 is disposed between the substrate 20 and the packaging film layer 10 . The first electrode layer 203 includes a gate of the first transistor T1 , a gate of the second transistor T2 , and a gate of the third transistor T3 .
也即是在本申请将第一晶体管的栅极、第二晶体管的栅极和第三晶体管的栅极设在同一层的电极层上,有利于减少金属层的层数设置,从而降低成本以及厚度。That is, in the present application, the gate of the first transistor, the gate of the second transistor and the gate of the third transistor are arranged on the same electrode layer, which is beneficial to reduce the number of metal layers, thereby reducing the cost and thickness.
再进一步地,第一电极层203还包括第一走线电极310,第一走线电极310的第一端分别与第一晶体管T1的栅极、第三晶体管T3的栅极电连接,第一走线电极310的第二端通过衬底20上的开孔与扫描信号接线端101电连接。在本申请中,扫描信号接线端通过将第一走线电极分别与第一晶体管的栅极、第三晶体管的栅极电连接,而且第一走线电极与第一晶体管的栅极、第三晶体管的栅极同层设置,有利于减少金属层的层数设置,从而降低成本以及厚度。Furthermore, the first electrode layer 203 further includes a first wiring electrode 310, a first end of the first wiring electrode 310 is electrically connected to the gate of the first transistor T1 and the gate of the third transistor T3, respectively, and a second end of the first wiring electrode 310 is electrically connected to the scan signal terminal 101 through an opening on the substrate 20. In the present application, the scan signal terminal is configured by electrically connecting the first wiring electrode to the gate of the first transistor and the gate of the third transistor, respectively, and the first wiring electrode is configured in the same layer as the gate of the first transistor and the gate of the third transistor, which is beneficial to reducing the number of metal layers, thereby reducing cost and thickness.
在一些实施例中,显示模块100还包括:In some embodiments, the display module 100 further includes:
第二电极层205,第二电极层205设在衬底20与封装膜层10之间,第二电极层205包括第一晶体管T1的源极及漏极、第二晶体管T2的源极及漏极和第三晶体管T3的源极及漏极。The second electrode layer 205 is disposed between the substrate 20 and the packaging film layer 10 . The second electrode layer 205 includes a source and a drain of the first transistor T1 , a source and a drain of the second transistor T2 , and a source and a drain of the third transistor T3 .
也即是在本申请将第一晶体管的源极及漏极、第二晶体管的源极及漏极和第三晶体管的源极及漏极设在同一层的电极层上,有利于减少金属层的层数设置,从而降低成本以及厚度。That is, in the present application, the source and drain of the first transistor, the source and drain of the second transistor, and the source and drain of the third transistor are arranged on the same electrode layer, which is beneficial to reduce the number of metal layers, thereby reducing cost and thickness.
再进一步地,第二电极层205还包括第二走线电极320,第二走线电极320的第一端分别与第一晶体管T1的源极电连接,第二走线电极320的第二端通过衬底20上的开孔与第一电平接线端103电连接。第二走线电极与第一晶体管的源极同层设置,可以减少金属层的层数设置。Furthermore, the second electrode layer 205 further includes a second wiring electrode 320, the first ends of the second wiring electrode 320 are respectively electrically connected to the source of the first transistor T1, and the second ends of the second wiring electrode 320 are electrically connected to the first level terminal 103 through the opening on the substrate 20. The second wiring electrode and the source of the first transistor are arranged in the same layer, which can reduce the number of metal layers.
在一些实施例中,第二电极层205还包括第三走线电极330,第三走线电极330的第一端分别与第二晶体管T2的源极电连接,第三走线电极330的第二端通过衬底20上的开孔与数据信号接线端102电连接。第三走线电极与第二晶体管的源极同层设置,可以减少金属层的层数设置。In some embodiments, the second electrode layer 205 further includes a third routing electrode 330, the first ends of the third routing electrodes 330 are respectively electrically connected to the source of the second transistor T2, and the second ends of the third routing electrodes 330 are electrically connected to the data signal terminal 102 through the opening on the substrate 20. The third routing electrode and the source of the second transistor are arranged in the same layer, which can reduce the number of metal layers.
在一些实施例中,第二电极层205还包括第四走线电极340,第四走线电极340的第一端分别与第三晶体管T3的漏极电连接,第四走线电极340的第二端通过衬底20上的开孔与信号读取接线端105电连接。第四走线电极与第三晶体管的源极同层设置,可以减少金属层的层数设置。In some embodiments, the second electrode layer 205 further includes a fourth wiring electrode 340, the first ends of the fourth wiring electrode 340 are respectively electrically connected to the drain of the third transistor T3, and the second ends of the fourth wiring electrode 340 are electrically connected to the signal reading terminal 105 through the opening on the substrate 20. The fourth wiring electrode and the source of the third transistor are arranged in the same layer, which can reduce the number of metal layers.
具体地,显示模块100还包括:Specifically, the display module 100 further includes:
有源层201,有源层201设在衬底20上,有源层201包括第一半导体部31和第二半导体部35;An active layer 201, wherein the active layer 201 is disposed on the substrate 20, and the active layer 201 includes a first semiconductor portion 31 and a second semiconductor portion 35;
第一绝缘层202,第一绝缘层202设在有源层201上;A first insulating layer 202, wherein the first insulating layer 202 is disposed on the active layer 201;
第一电极层203,第一电极层203设在第一绝缘层202上,第一电极层203包括第一栅极32和第二栅极36,第一栅极32在衬底20上的正投影与第一半导体部31在衬底20的正投影相重叠,第二栅极36在衬底20上的正投影与第二半导体部35在衬底20的正投影相重叠,第二栅极36与扫描信号接线端101电连接;A first electrode layer 203, the first electrode layer 203 is disposed on the first insulating layer 202, the first electrode layer 203 includes a first gate 32 and a second gate 36, the orthographic projection of the first gate 32 on the substrate 20 overlaps with the orthographic projection of the first semiconductor portion 31 on the substrate 20, the orthographic projection of the second gate 36 on the substrate 20 overlaps with the orthographic projection of the second semiconductor portion 35 on the substrate 20, and the second gate 36 is electrically connected to the scan signal terminal 101;
第二绝缘层204,第二绝缘层204设在第一电极层203上;A second insulating layer 204, the second insulating layer 204 is disposed on the first electrode layer 203;
第二电极层205,第二电极层205设在第二绝缘层204上,第二电极层205包括第一漏极34、第二漏极38、第一源极33和第二源极37,第一漏极34和第一源极33分别通过第一绝缘层202和第二绝缘层204上的开孔与第一半导体部31电连接,第二漏极38和第二源极37分别通过第一绝缘层202和第二绝缘层204上的开孔与第二半导体部35电连接,第二漏极38与第一栅极32电连接,第二源极37与数据信号接线端102电连接,第一源极33与第一电平接线端103电连接;The second electrode layer 205 is disposed on the second insulating layer 204. The second electrode layer 205 includes a first drain electrode 34, a second drain electrode 38, a first source electrode 33, and a second source electrode 37. The first drain electrode 34 and the first source electrode 33 are electrically connected to the first semiconductor portion 31 through openings on the first insulating layer 202 and the second insulating layer 204, respectively. The second drain electrode 38 and the second source electrode 37 are electrically connected to the second semiconductor portion 35 through openings on the first insulating layer 202 and the second insulating layer 204, respectively. The second drain electrode 38 is electrically connected to the first gate electrode 32. The second source electrode 37 is electrically connected to the data signal terminal 102. The first source electrode 33 is electrically connected to the first level terminal 103.
第一平坦层206,第一平坦层206设在第二电极层205上;A first planar layer 206, wherein the first planar layer 206 is disposed on the second electrode layer 205;
发光单元40,发光单元40设在第一平坦层206上,第一漏极34通过第一平坦层206上的开孔与发光元件40的第一电极41电连接,发光单元40的第二电极42与第二电平接线端104电连接。其中,第一电极为阳极和阴极中的一者,第二电极为阳极和阴极中的另一者。The light-emitting unit 40 is disposed on the first flat layer 206, the first drain electrode 34 is electrically connected to the first electrode 41 of the light-emitting element 40 through the opening on the first flat layer 206, and the second electrode 42 of the light-emitting unit 40 is electrically connected to the second level terminal 104. The first electrode is one of the anode and the cathode, and the second electrode is the other of the anode and the cathode.
其中,第一半导体部31、第一栅极32、第一漏极34和第一源极33形成第一晶体管T1,第二半导体部35、第二栅极36、第二漏极38和第二源极37形成第二晶体管T2。The first semiconductor portion 31 , the first gate 32 , the first drain 34 and the first source 33 form a first transistor T1 , and the second semiconductor portion 35 , the second gate 36 , the second drain 38 and the second source 37 form a second transistor T2 .
进一步地,在一些实施例中,有源层201还包括第三半导体部51、第四半导体部55、第五半导体部57和本征半导体部56,第四半导体部55、本征半导体部56和第五半导体部57依次相连接;Further, in some embodiments, the active layer 201 further includes a third semiconductor portion 51, a fourth semiconductor portion 55, a fifth semiconductor portion 57 and an intrinsic semiconductor portion 56, and the fourth semiconductor portion 55, the intrinsic semiconductor portion 56 and the fifth semiconductor portion 57 are connected in sequence;
第一电极层203还包括第三栅极52,第三栅极52在衬底20的正投影和第三半导体部51在衬底20的正投影相重叠,第三栅极52与扫描信号接线端101电连接;The first electrode layer 203 further includes a third gate 52, the orthographic projection of the third gate 52 on the substrate 20 overlaps with the orthographic projection of the third semiconductor portion 51 on the substrate 20, and the third gate 52 is electrically connected to the scan signal terminal 101;
第二电极层205还包括第三漏极54和第三源极53,第三漏极54和第三源极53分别通过第一绝缘层202和第二绝缘层204上的开孔与第三半导体部51电连接,第三漏极54与第五半导体部57电连接,第三源极53与信号读取接线端105电连接;The second electrode layer 205 further includes a third drain electrode 54 and a third source electrode 53, the third drain electrode 54 and the third source electrode 53 are electrically connected to the third semiconductor portion 51 through the openings on the first insulating layer 202 and the second insulating layer 204, respectively, the third drain electrode 54 is electrically connected to the fifth semiconductor portion 57, and the third source electrode 53 is electrically connected to the signal reading terminal 105;
显示模块100还包括:The display module 100 further includes:
第三电极层207,第三电极层207设在第一平坦层206上,第三电极层207包括公共电极58,公共电极58通过第一绝缘层202、第二绝缘层204和第一平坦层206上的开孔与第四半导体部55电连接;A third electrode layer 207, the third electrode layer 207 is disposed on the first planar layer 206, the third electrode layer 207 includes a common electrode 58, and the common electrode 58 is electrically connected to the fourth semiconductor portion 55 through openings in the first insulating layer 202, the second insulating layer 204 and the first planar layer 206;
第二平坦层208,第二平坦层208设在第三电极层207上,发光单元40设在第二平坦层208上。而且第四半导体部55为P型半导体,第五半导体部57为N型半导体。The second flat layer 208 is disposed on the third electrode layer 207, and the light emitting unit 40 is disposed on the second flat layer 208. The fourth semiconductor portion 55 is a P-type semiconductor, and the fifth semiconductor portion 57 is an N-type semiconductor.
其中,第四半导体部55、本征半导体部56和第五半导体部57依次相连接形成光电二极管L,第三半导体部51、第三栅极52、第三漏极54和第三源极53形成第三晶体管T3。The fourth semiconductor portion 55 , the intrinsic semiconductor portion 56 and the fifth semiconductor portion 57 are sequentially connected to form a photodiode L, and the third semiconductor portion 51 , the third gate 52 , the third drain 54 and the third source 53 form a third transistor T3 .
进一步地,衬底20包括依次层叠设置的第一缓冲层21、第三绝缘层22、第一阻挡层23、第四绝缘层24、第二阻挡层25和第二缓冲层26。有源层201设在第二缓冲层26远离第一缓冲层21的一侧。进一步地,显示模块100还包括:第六电极层302,第六电极层302设在第二缓冲层26远离第一缓冲层21的一侧,有源层201设在第六电极层302上,第六电极层302包括遮光电极510,第六电极层302电极在衬底20上的正投影与本征半导体部56在衬底20上的正投影相重叠。通过遮光电极510遮挡射向本征半导体部56的光线,有利于提高光电二极管L的工作准确度。Further, the substrate 20 includes a first buffer layer 21, a third insulating layer 22, a first barrier layer 23, a fourth insulating layer 24, a second barrier layer 25, and a second buffer layer 26 which are stacked in sequence. The active layer 201 is arranged on a side of the second buffer layer 26 away from the first buffer layer 21. Further, the display module 100 also includes: a sixth electrode layer 302, the sixth electrode layer 302 is arranged on a side of the second buffer layer 26 away from the first buffer layer 21, the active layer 201 is arranged on the sixth electrode layer 302, the sixth electrode layer 302 includes a light shielding electrode 510, and the orthographic projection of the sixth electrode layer 302 on the substrate 20 overlaps with the orthographic projection of the intrinsic semiconductor portion 56 on the substrate 20. The light shielding electrode 510 shields the light directed to the intrinsic semiconductor portion 56, which is conducive to improving the working accuracy of the photodiode L.
进一步地,第一源极33的一端在衬底20上的正投影与第一半导体部31在衬底20上的正投影不重叠,第一源极33的一端通过第一绝缘层202、第二绝缘层204和衬底20上的开孔与第一电平接线端103电连接。Furthermore, the orthographic projection of one end of the first source 33 on the substrate 20 does not overlap with the orthographic projection of the first semiconductor portion 31 on the substrate 20 , and one end of the first source 33 is electrically connected to the first level terminal 103 through the first insulating layer 202 , the second insulating layer 204 and the opening on the substrate 20 .
第二源极37的一端在衬底20上的正投影与第二半导体部35在衬底20上的正投影不重叠,第二源极37的一端通过第一绝缘层202、第二绝缘层204和衬底20上的开孔与数据信号接线端102电连接。The orthographic projection of one end of the second source electrode 37 on the substrate 20 does not overlap with the orthographic projection of the second semiconductor portion 35 on the substrate 20 . One end of the second source electrode 37 is electrically connected to the data signal terminal 102 through the first insulating layer 202 , the second insulating layer 204 and the opening in the substrate 20 .
在一些实施例中,第二电极层205还包括第五走线电极350,第五走线电极350在衬底20上的正投影和第一走线电极310在衬底20上的正投影存在重叠,第五走线电极350和第一走线电极310形成保持电容C。In some embodiments, the second electrode layer 205 further includes a fifth routing electrode 350 , the orthographic projection of the fifth routing electrode 350 on the substrate 20 overlaps with the orthographic projection of the first routing electrode 310 on the substrate 20 , and the fifth routing electrode 350 and the first routing electrode 310 form a holding capacitor C.
在一些实施例中,第二电极层205还包括:In some embodiments, the second electrode layer 205 further includes:
第一连接电极59,第一连接电极59通过第一绝缘层202和第二绝缘层204上的开孔与第五半导体部57电连接,第一连接电极59与第三漏极54电连接。The first connection electrode 59 is electrically connected to the fifth semiconductor portion 57 through the openings on the first insulating layer 202 and the second insulating layer 204 , and the first connection electrode 59 is electrically connected to the third drain electrode 54 .
在一些实施例中,第三电极层207还包括:In some embodiments, the third electrode layer 207 further includes:
第二连接电极39,第二连接电极39通过第二绝缘层204和第一平坦层206上的开孔与第一栅极32电连接,第二连接电极39通过第一平坦层206上的开孔与第二漏极38电连接。第二连接电极39在衬底20上的正投影与第二漏极38在衬底上的正投影、第一栅极32在衬底20上的正投影存在相重叠的部分。The second connection electrode 39 is electrically connected to the first gate electrode 32 through the openings on the second insulating layer 204 and the first planar layer 206, and the second connection electrode 39 is electrically connected to the second drain electrode 38 through the openings on the first planar layer 206. The orthographic projection of the second connection electrode 39 on the substrate 20 overlaps with the orthographic projection of the second drain electrode 38 on the substrate and the orthographic projection of the first gate electrode 32 on the substrate 20.
在一些实施例中,第三源极53的一端在衬底20上的正投影与第三半导体部51在衬底20上的正投影不重叠,第三源极53的一端通过第一绝缘层202、第二绝缘层204和衬底20上的开孔与信号读取接线端105电连接。In some embodiments, the orthographic projection of one end of the third source electrode 53 on the substrate 20 does not overlap with the orthographic projection of the third semiconductor portion 51 on the substrate 20 , and one end of the third source electrode 53 is electrically connected to the signal reading terminal 105 through the first insulating layer 202 , the second insulating layer 204 and the opening on the substrate 20 .
在一些实施例中,发光单元40包括发光二极管;In some embodiments, the light emitting unit 40 includes a light emitting diode;
显示模块100还包括:The display module 100 further includes:
第四电极层209,第四电极层209设在第二平坦层208上,第四电极层209包括发光二极管的阳极和阴极;也即是,发光元件40的第一电极41为阳极,发光元件40的第二电极42为阴极;The fourth electrode layer 209 is disposed on the second flat layer 208. The fourth electrode layer 209 includes an anode and a cathode of a light-emitting diode; that is, the first electrode 41 of the light-emitting element 40 is an anode, and the second electrode 42 of the light-emitting element 40 is a cathode;
像素定义层301,像素定义层301设在第四电极层209上,像素定义层301设有像素开口,发光二极管的发光二极管芯片43设在像素开口内,阳极和阴极分别与发光二极管的发光二极管芯片43电连接;A pixel definition layer 301, the pixel definition layer 301 is disposed on the fourth electrode layer 209, the pixel definition layer 301 is provided with a pixel opening, the light emitting diode chip 43 of the light emitting diode is disposed in the pixel opening, and the anode and the cathode are electrically connected to the light emitting diode chip 43 of the light emitting diode respectively;
第一漏极34通过第一平坦层206和第二平坦层208上的开孔与发光二极管的阳极电连接,发光二极管的阴极通过第一绝缘层202、第二绝缘层204、第一平坦层206和第二平坦层208上的开孔与第二电平接线端104电连接。The first drain electrode 34 is electrically connected to the anode of the light-emitting diode through the openings on the first planar layer 206 and the second planar layer 208 , and the cathode of the light-emitting diode is electrically connected to the second level terminal 104 through the openings on the first insulating layer 202 , the second insulating layer 204 , the first planar layer 206 and the second planar layer 208 .
显示模块100还包括:The display module 100 further includes:
第三平坦层303,第三平坦层303设在第四电极层209上,像素定义层301设在第三平坦层303上,像素定义层301设有像素开口,发光二极管的发光二极管芯片43设在像素开口内;第三平坦层设有裸露发光元件40的第一电极41和发光元件40的第二电极42的开口,发光二极管的发光二极管芯片43通过第三平坦层上的开口分别与发光元件40的第一电极41、发光元件40的第二电极42电连接;封装膜层10设在像素定义层301远离衬底的一侧。The third flat layer 303 is provided on the fourth electrode layer 209, the pixel definition layer 301 is provided on the third flat layer 303, the pixel definition layer 301 is provided with a pixel opening, and the light-emitting diode chip 43 of the light-emitting diode is provided in the pixel opening; the third flat layer is provided with an opening for exposing the first electrode 41 of the light-emitting element 40 and the second electrode 42 of the light-emitting element 40, and the light-emitting diode chip 43 of the light-emitting diode is electrically connected to the first electrode 41 of the light-emitting element 40 and the second electrode 42 of the light-emitting element 40 through the opening on the third flat layer; the packaging film layer 10 is provided on the side of the pixel definition layer 301 away from the substrate.
请参考图6和图7,图6为本申请的显示面板的第一结构示意图,图7为本申请的显示面板的第二结构示意图。相对应地,本申请实施例还提供一种显示面板200,显示面板200包括如上的显示模块100;Please refer to Figures 6 and 7, Figure 6 is a schematic diagram of the first structure of the display panel of the present application, and Figure 7 is a schematic diagram of the second structure of the display panel of the present application. Correspondingly, the embodiment of the present application also provides a display panel 200, the display panel 200 includes the display module 100 as described above;
基板210,基板210上阵列设有显示模块100,基板210上设有扫描线220、数据线230、第一电平信号线、第二电平信号线以及信号读取线;A substrate 210, on which the display modules 100 are arrayed, and on which the scanning lines 220, the data lines 230, the first level signal lines, the second level signal lines and the signal reading lines are arranged;
扫描线220与扫描信号接线端101电连接,数据线230与数据信号接线端102电连接,第一电平信号线与第一电平接线端103电连接,第二电平信号线与第二电平接线端104电连接,信号读取线与信号读取接线端105电连接。The scan line 220 is electrically connected to the scan signal terminal 101 , the data line 230 is electrically connected to the data signal terminal 102 , the first level signal line is electrically connected to the first level terminal 103 , the second level signal line is electrically connected to the second level terminal 104 , and the signal read line is electrically connected to the signal read terminal 105 .
与现有技术相比,本申请实施例提供的阵列基板的有益效果与上述技术方案提供的显示模块100的有益效果相同,在此不做赘述。Compared with the prior art, the beneficial effects of the array substrate provided in the embodiment of the present application are the same as the beneficial effects of the display module 100 provided by the above technical solution, which will not be elaborated here.
在完成显示模块100后,再制备具有显示模块100阵列的显示面板,若栅极驱动电路不设在显示面板上,在基板上先制备好扫描线220、数据线230、第一电平信号线、第二电平信号线以及信号读取线,可采用面板行业的曝光显影刻蚀工艺制备信号走线,也可采用电镀/化镀工艺、或印刷工艺等厚金属制备工艺在基板表面形成较厚金属的线路;若栅极驱动电路设在显示面板上,则还需要在基板上制备好栅极驱动电路以及信号走线。栅极驱动电路以及信号走线制备完成后,再将以上已制备好的显示模块通过焊接或绑定的工艺安装到对应的位置形成显示模块的阵列结构;之后通过金属焊接或者绑定的工艺将柔性电路板/覆晶薄膜上的衬垫与显示面板的衬垫进行导通,即将外部系统电路对应的信号连接至显示面板的信号走线;最后可以在基板上涂覆一层较厚的透明硅胶将基板及显示模块之间的间隔填平,这样即可完成整个显示面板的制备。After the display module 100 is completed, a display panel with an array of display modules 100 is prepared. If the gate drive circuit is not provided on the display panel, the scan line 220, the data line 230, the first level signal line, the second level signal line and the signal reading line are prepared on the substrate. The exposure, development and etching process of the panel industry can be used to prepare the signal line, and the thick metal preparation process such as electroplating/chemical plating process or printing process can also be used to form a thicker metal line on the surface of the substrate; if the gate drive circuit is provided on the display panel, the gate drive circuit and the signal line need to be prepared on the substrate. After the gate drive circuit and the signal line are prepared, the prepared display modules are installed to the corresponding positions through welding or binding processes to form an array structure of the display module; then the pads on the flexible circuit board/chip-on-chip film are connected to the pads of the display panel through metal welding or binding processes, that is, the signals corresponding to the external system circuit are connected to the signal lines of the display panel; finally, a thicker transparent silicone layer can be coated on the substrate to fill the gap between the substrate and the display module, so that the preparation of the entire display panel can be completed.
相对应地,本申请实施例还提供一种显示装置,显示装置包括上述的显示面板。请参考图6,在一些实施例中,显示装置还包括发光控制器、列驱动器以及GOA单元,发光控制器分别与列驱动器以及GOA单元电连接,显示面板的两侧分别设有GOA单元,GOA单元与扫描线220电连接,列驱动器与数据线230电连接。Correspondingly, an embodiment of the present application further provides a display device, the display device comprising the above-mentioned display panel. Referring to FIG6 , in some embodiments, the display device further comprises a light emitting controller, a column driver and a GOA unit, the light emitting controller is electrically connected to the column driver and the GOA unit respectively, the GOA units are respectively arranged on both sides of the display panel, the GOA units are electrically connected to the scan lines 220, and the column driver is electrically connected to the data lines 230.
请参考图7,在本申请其他实施例中,显示装置还包括发光控制器、列驱动器以及行驱动器,发光控制器分别与列驱动器以及行驱动器电连接,行驱动器与扫描线220电连接,列驱动器与数据线230电连接。Please refer to Figure 7. In other embodiments of the present application, the display device also includes a light-emitting controller, a column driver and a row driver. The light-emitting controller is electrically connected to the column driver and the row driver respectively. The row driver is electrically connected to the scan line 220, and the column driver is electrically connected to the data line 230.
与现有技术相比,本申请实施例提供的显示装置的有益效果与上述技术方案提供的显示模块100的有益效果相同,在此不做赘述。Compared with the prior art, the beneficial effects of the display device provided in the embodiment of the present application are the same as the beneficial effects of the display module 100 provided by the above technical solution, which will not be elaborated here.
请参考图8和图9,图8为本申请的显示模块的第二实施例的电路连接示意图,图9为本申请的显示模块的第二实施例的具体结构示意图。本实施例与图5提供的实施例不同的是,第一晶体管T1的源极与发光元件40的第一电极41电连接,第一晶体管T1的漏极与第二电平接线端104电连接,发光元件40的第二电极42与第一电平接线端103电连接。Please refer to Figures 8 and 9, Figure 8 is a circuit connection diagram of the second embodiment of the display module of the present application, and Figure 9 is a specific structural diagram of the second embodiment of the display module of the present application. The difference between this embodiment and the embodiment provided in Figure 5 is that the source of the first transistor T1 is electrically connected to the first electrode 41 of the light emitting element 40, the drain of the first transistor T1 is electrically connected to the second level connection terminal 104, and the second electrode 42 of the light emitting element 40 is electrically connected to the first level connection terminal 103.
进一步地,第二电极层205还包括第二走线电极320,第二走线电极320的第一端分别与第一晶体管T1的漏极电连接,第二走线电极320的第二端通过衬底20上的开孔与第二电平接线端104电连接。第二走线电极与第一晶体管的源极同层设置,可以减少金属层的层数设置。Furthermore, the second electrode layer 205 further includes a second wiring electrode 320, the first ends of the second wiring electrode 320 are respectively electrically connected to the drain of the first transistor T1, and the second ends of the second wiring electrode 320 are electrically connected to the second level terminal 104 through the opening on the substrate 20. The second wiring electrode is arranged in the same layer as the source of the first transistor, which can reduce the number of metal layers.
在一些实施例中,像素驱动模块30还包括:In some embodiments, the pixel driving module 30 further includes:
保持电容C,保持电容C的第一极板与第一晶体管T1的栅极电连接,保持电容C的第二极板与第二电平接线端104电连接。A holding capacitor C, wherein a first plate of the holding capacitor C is electrically connected to the gate of the first transistor T1 , and a second plate of the holding capacitor C is electrically connected to the second level connection terminal 104 .
显示模块100还包括:The display module 100 further includes:
有源层201,有源层201设在衬底20上,有源层201包括第一半导体部31和第二半导体部35;An active layer 201, wherein the active layer 201 is disposed on the substrate 20, and the active layer 201 includes a first semiconductor portion 31 and a second semiconductor portion 35;
第一绝缘层202,第一绝缘层202设在有源层201上;A first insulating layer 202, wherein the first insulating layer 202 is disposed on the active layer 201;
第一电极层203,第一电极层203设在第一绝缘层202上,第一电极层203包括第一栅极32和第二栅极36,第一栅极32在衬底20上的正投影与第一半导体部31在衬底20的正投影相重叠,第二栅极36在衬底20上的正投影与第二半导体部35在衬底20的正投影相重叠,第二栅极36与扫描信号接线端101电连接;A first electrode layer 203, the first electrode layer 203 is disposed on the first insulating layer 202, the first electrode layer 203 includes a first gate 32 and a second gate 36, the orthographic projection of the first gate 32 on the substrate 20 overlaps with the orthographic projection of the first semiconductor portion 31 on the substrate 20, the orthographic projection of the second gate 36 on the substrate 20 overlaps with the orthographic projection of the second semiconductor portion 35 on the substrate 20, and the second gate 36 is electrically connected to the scan signal terminal 101;
第二绝缘层204,第二绝缘层204设在第一电极层203上;A second insulating layer 204, the second insulating layer 204 is disposed on the first electrode layer 203;
第二电极层205,第二电极层205设在第二绝缘层204上,第二电极层205包括第一漏极34、第二漏极38、第一源极33和第二源极37,第一漏极34和第一源极33分别通过第一绝缘层202和第二绝缘层204上的开孔与第一半导体部31电连接,第二漏极38和第二源极37分别通过第一绝缘层202和第二绝缘层204上的开孔与第二半导体部35电连接,第二漏极38与第一栅极32电连接,第二源极37与数据信号接线端102电连接,第一漏极34与第二电平接线端104电连接;The second electrode layer 205 is disposed on the second insulating layer 204. The second electrode layer 205 includes a first drain electrode 34, a second drain electrode 38, a first source electrode 33, and a second source electrode 37. The first drain electrode 34 and the first source electrode 33 are electrically connected to the first semiconductor portion 31 through openings on the first insulating layer 202 and the second insulating layer 204, respectively. The second drain electrode 38 and the second source electrode 37 are electrically connected to the second semiconductor portion 35 through openings on the first insulating layer 202 and the second insulating layer 204, respectively. The second drain electrode 38 is electrically connected to the first gate electrode 32. The second source electrode 37 is electrically connected to the data signal terminal 102. The first drain electrode 34 is electrically connected to the second level terminal 104.
第一平坦层206,第一平坦层206设在第二电极层205上;A first planar layer 206, wherein the first planar layer 206 is disposed on the second electrode layer 205;
发光单元40,发光单元40设在第一平坦层206上,第一源极33通过第一平坦层206上的开孔与发光元件40的第二电极42电连接,发光单元40的第一电极与第一电平接线端103电连接。The light emitting unit 40 is disposed on the first planar layer 206 . The first source electrode 33 is electrically connected to the second electrode 42 of the light emitting element 40 through the opening on the first planar layer 206 . The first electrode of the light emitting unit 40 is electrically connected to the first level terminal 103 .
进一步地,在一些实施例中,有源层201还包括第三半导体部51、第四半导体部55、第五半导体部57和本征半导体部56,第四半导体部55、本征半导体部56和第五半导体部57依次相连接;Further, in some embodiments, the active layer 201 further includes a third semiconductor portion 51, a fourth semiconductor portion 55, a fifth semiconductor portion 57 and an intrinsic semiconductor portion 56, and the fourth semiconductor portion 55, the intrinsic semiconductor portion 56 and the fifth semiconductor portion 57 are connected in sequence;
第一电极层203还包括第三栅极52,第三栅极52在衬底20的正投影和第三半导体部51在衬底20的正投影相重叠,第三栅极52与扫描信号接线端101电连接;The first electrode layer 203 further includes a third gate 52, the orthographic projection of the third gate 52 on the substrate 20 overlaps with the orthographic projection of the third semiconductor portion 51 on the substrate 20, and the third gate 52 is electrically connected to the scan signal terminal 101;
第二电极层205还包括第三漏极54和第三源极53,第三漏极54和第三源极53分别通过第一绝缘层202和第二绝缘层204上的开孔与第三半导体部51电连接,第三漏极54与第五半导体部57电连接,第三源极53与信号读取接线端105电连接;The second electrode layer 205 further includes a third drain electrode 54 and a third source electrode 53, the third drain electrode 54 and the third source electrode 53 are electrically connected to the third semiconductor portion 51 through the openings on the first insulating layer 202 and the second insulating layer 204, respectively, the third drain electrode 54 is electrically connected to the fifth semiconductor portion 57, and the third source electrode 53 is electrically connected to the signal reading terminal 105;
显示模块100还包括:The display module 100 further includes:
第三电极层207,第三电极层207设在第一平坦层206上,第三电极层207包括公共电极58,公共电极58通过第一绝缘层202、第二绝缘层204和第一平坦层206上的开孔与第四半导体部55电连接;A third electrode layer 207, the third electrode layer 207 is disposed on the first planar layer 206, the third electrode layer 207 includes a common electrode 58, and the common electrode 58 is electrically connected to the fourth semiconductor portion 55 through openings in the first insulating layer 202, the second insulating layer 204 and the first planar layer 206;
第二平坦层208,第二平坦层208设在第三电极层207上,发光单元40设在第二平坦层208上。而且第四半导体部55为P型半导体,第五半导体部57为N型半导体。The second flat layer 208 is disposed on the third electrode layer 207, and the light emitting unit 40 is disposed on the second flat layer 208. The fourth semiconductor portion 55 is a P-type semiconductor, and the fifth semiconductor portion 57 is an N-type semiconductor.
其中,第四半导体部55、本征半导体部56和第五半导体部57依次相连接形成光电二极管L,第三半导体部51、第三栅极52、第三漏极54和第三源极53形成第三晶体管T3。The fourth semiconductor portion 55 , the intrinsic semiconductor portion 56 and the fifth semiconductor portion 57 are sequentially connected to form a photodiode L, and the third semiconductor portion 51 , the third gate 52 , the third drain 54 and the third source 53 form a third transistor T3 .
进一步地,在一些实施例中,发光单元40包括发光二极管;Further, in some embodiments, the light emitting unit 40 includes a light emitting diode;
显示模块100还包括:The display module 100 further includes:
第四电极层209,第四电极层209设在第二平坦层208上,第四电极层209包括发光二极管的阳极和阴极;也即是,发光元件40的第一电极41为阳极,发光元件40的第二电极42为阴极;The fourth electrode layer 209 is disposed on the second flat layer 208. The fourth electrode layer 209 includes an anode and a cathode of a light-emitting diode; that is, the first electrode 41 of the light-emitting element 40 is an anode, and the second electrode 42 of the light-emitting element 40 is a cathode;
像素定义层301,像素定义层301设在第四电极层209上,像素定义层301设有像素开口,发光二极管的发光二极管芯片43设在像素开口内,阳极和阴极分别与发光二极管的发光二极管芯片43电连接;A pixel definition layer 301, the pixel definition layer 301 is disposed on the fourth electrode layer 209, the pixel definition layer 301 is provided with a pixel opening, the light emitting diode chip 43 of the light emitting diode is disposed in the pixel opening, and the anode and the cathode are electrically connected to the light emitting diode chip 43 of the light emitting diode respectively;
第一源极33通过第一平坦层206和第二平坦层208上的开孔与发光二极管的阴极电连接,发光二极管的阳极通过第一绝缘层202、第二绝缘层204、第一平坦层206和第二平坦层208上的开孔与第一电平接线端103电连接。The first source electrode 33 is electrically connected to the cathode of the light-emitting diode through the openings on the first planar layer 206 and the second planar layer 208 , and the anode of the light-emitting diode is electrically connected to the first level terminal 103 through the openings on the first insulating layer 202 , the second insulating layer 204 , the first planar layer 206 and the second planar layer 208 .
显示模块100还包括:The display module 100 further includes:
第三平坦层303,第三平坦层303设在第四电极层209上,像素定义层301设在第三平坦层303上,像素定义层301设有像素开口,发光二极管的发光二极管芯片43设在像素开口内;第三平坦层设有裸露发光元件40的第一电极41和发光元件40的第二电极42的开口,发光二极管的发光二极管芯片43通过第三平坦层上的开口分别与发光元件40的第一电极41、发光元件40的第二电极42电连接;封装膜层10设在像素定义层301远离衬底的一侧。The third flat layer 303 is provided on the fourth electrode layer 209, the pixel definition layer 301 is provided on the third flat layer 303, the pixel definition layer 301 is provided with a pixel opening, and the light-emitting diode chip 43 of the light-emitting diode is provided in the pixel opening; the third flat layer is provided with an opening for exposing the first electrode 41 of the light-emitting element 40 and the second electrode 42 of the light-emitting element 40, and the light-emitting diode chip 43 of the light-emitting diode is electrically connected to the first electrode 41 of the light-emitting element 40 and the second electrode 42 of the light-emitting element 40 through the opening on the third flat layer; the packaging film layer 10 is provided on the side of the pixel definition layer 301 away from the substrate.
请参考图10,图10为本申请的显示模块的第三实施例的示意图。本实施例与图5提供的实施例不同的是,发光单元40包括有机发光二极管;Please refer to Figure 10, which is a schematic diagram of a third embodiment of the display module of the present application. This embodiment is different from the embodiment provided in Figure 5 in that the light emitting unit 40 includes an organic light emitting diode;
显示模块100还包括:The display module 100 further includes:
第四电极层209,第四电极层209设在第二平坦层208上,第四电极层209包括有机发光二极管的阳极;也即是发光元件40的第一电极41为阳极。The fourth electrode layer 209 is disposed on the second planar layer 208 . The fourth electrode layer 209 includes an anode of an organic light emitting diode; that is, the first electrode 41 of the light emitting element 40 is the anode.
像素定义层301,像素定义层301设在第四电极层209上,像素定义层301设有位于阳极上方的像素开口,有机发光二极管的发光层43设在像素开口内并与阳极电连接。The pixel definition layer 301 is disposed on the fourth electrode layer 209 . The pixel definition layer 301 is provided with a pixel opening located above the anode. The light emitting layer 43 of the organic light emitting diode is disposed in the pixel opening and electrically connected to the anode.
第五电极层302,第五电极层302设在像素定义层301上,第五电极层302包括有机发光二极管的阴极,阴极通过像素开口与发光层43电连接;发光元件40的第二电极42为阴极。The fifth electrode layer 302 is disposed on the pixel definition layer 301 . The fifth electrode layer 302 includes a cathode of an organic light emitting diode, and the cathode is electrically connected to the light emitting layer 43 through a pixel opening. The second electrode 42 of the light emitting element 40 is a cathode.
第一漏极34通过第一平坦层206和第二平坦层208上的开孔与阳极电连接,第二电极通过第一绝缘层202、第二绝缘层204、第一平坦层206、第二平坦层208和像素定义层301上的开孔与第二电平接线端104电连接。The first drain electrode 34 is electrically connected to the anode through openings in the first planar layer 206 and the second planar layer 208 , and the second electrode is electrically connected to the second level terminal 104 through openings in the first insulating layer 202 , the second insulating layer 204 , the first planar layer 206 , the second planar layer 208 and the pixel definition layer 301 .
第三平坦层303,第三平坦层303设在第五电极层302上,封装膜层10设在第三平坦层303远离衬底的一侧。The third flat layer 303 is disposed on the fifth electrode layer 302 , and the packaging film layer 10 is disposed on a side of the third flat layer 303 away from the substrate.
以上对本申请实施例所提供的一种显示模块及显示面板进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上,本说明书内容不应理解为对本申请的限制。The above is a detailed introduction to a display module and a display panel provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims (20)

  1. 一种显示模块,其包括:A display module, comprising:
    衬底;substrate;
    像素驱动模块,所述像素驱动模块设在所述衬底的一侧;A pixel driving module, wherein the pixel driving module is arranged on one side of the substrate;
    发光元件,所述发光元件设在所述像素驱动模块远离所述衬底的一侧,所述像素驱动模块与所述发光元件电连接;A light emitting element, wherein the light emitting element is disposed on a side of the pixel driving module away from the substrate, and the pixel driving module is electrically connected to the light emitting element;
    封装膜层,所述封装膜层设在所述发光元件远离所述衬底的一侧;A packaging film layer, wherein the packaging film layer is arranged on a side of the light-emitting element away from the substrate;
    扫描信号接线端,所述扫描信号接线端设在所述衬底远离所述封装膜层的一侧,所述扫描信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;A scanning signal wiring terminal, the scanning signal wiring terminal is arranged on a side of the substrate away from the packaging film layer, and the scanning signal wiring terminal is electrically connected to the pixel driving module through an opening on the substrate;
    数据信号接线端,所述数据信号接线端设在所述衬底远离所述封装膜层的一侧,所述数据信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;A data signal wiring terminal, the data signal wiring terminal is arranged on a side of the substrate away from the packaging film layer, and the data signal wiring terminal is electrically connected to the pixel driving module through an opening on the substrate;
    第一电平接线端,所述第一电平接线端设在所述衬底远离所述封装膜层的一侧,所述第一电平接线端通过所述衬底上的开孔与所述发光元件或所述像素驱动模块电连接;A first level wiring terminal, which is arranged on a side of the substrate away from the packaging film layer, and is electrically connected to the light-emitting element or the pixel driving module through an opening on the substrate;
    第二电平接线端,所述第二电平接线端设在所述衬底远离所述封装膜层的一侧,所述第二电平接线端通过所述衬底上的开孔与所述像素驱动模块或所述发光元件电连接。The second level connection terminal is arranged at a side of the substrate away from the packaging film layer, and the second level connection terminal is electrically connected to the pixel driving module or the light emitting element through an opening on the substrate.
  2. 根据权利要求1所述的显示模块,其中,所述显示模块还包括:The display module according to claim 1, wherein the display module further comprises:
    传感器,所述传感器设在所述衬底与所述封装膜层之间;A sensor, wherein the sensor is disposed between the substrate and the packaging film layer;
    信号读取接线端,所述信号读取接线端设在所述衬底远离所述封装膜层的一侧,所述信号读取接线端通过所述衬底上的开孔与所述传感器电连接,所述扫描信号接线端通过所述衬底上的开孔与所述传感器电连接。A signal reading terminal is arranged on a side of the substrate away from the packaging film layer, the signal reading terminal is electrically connected to the sensor through an opening on the substrate, and the scanning signal terminal is electrically connected to the sensor through an opening on the substrate.
  3. 根据权利要求1所述的显示模块,其中,所述像素驱动模块包括:The display module according to claim 1, wherein the pixel driving module comprises:
    第一晶体管,所述第一晶体管的源极、漏极以及所述发光元件串接于所述第一电平接线端和所述第二电平接线端之间;A first transistor, wherein a source electrode, a drain electrode and the light emitting element of the first transistor are connected in series between the first level wiring terminal and the second level wiring terminal;
    第二晶体管,所述第二晶体管的栅极与所述扫描信号接线端电连接,所述第二晶体管的源极与所述数据信号接线端电连接,所述第二晶体管的漏极与所述第一晶体管的栅极电连接。A second transistor, wherein a gate of the second transistor is electrically connected to the scan signal terminal, a source of the second transistor is electrically connected to the data signal terminal, and a drain of the second transistor is electrically connected to the gate of the first transistor.
  4. 根据权利要求3所述的显示模块,其中,所述第一晶体管的源极与所述第一电平接线端电连接,所述第一晶体管的漏极与所述发光元件的第二电极电连接,所述发光元件的第一电极与所述第二电平接线端电连接。The display module according to claim 3, wherein the source of the first transistor is electrically connected to the first level terminal, the drain of the first transistor is electrically connected to the second electrode of the light emitting element, and the first electrode of the light emitting element is electrically connected to the second level terminal.
  5. 根据权利要求3所述的显示模块,其中,所述第一晶体管的源极与所述发光元件的第一电极电连接,所述第一晶体管的漏极与所述第二电平接线端电连接,所述发光元件的第二电极与所述第一电平接线端电连接。The display module according to claim 3, wherein the source of the first transistor is electrically connected to the first electrode of the light emitting element, the drain of the first transistor is electrically connected to the second level wiring terminal, and the second electrode of the light emitting element is electrically connected to the first level wiring terminal.
  6. 根据权利要求4所述的显示模块,其中,所述像素驱动模块还包括:The display module according to claim 4, wherein the pixel driving module further comprises:
    保持电容,所述保持电容的第一极板与所述第一晶体管的栅极电连接,所述保持电容的第二极板与所述第一电平接线端电连接。A holding capacitor, wherein a first plate of the holding capacitor is electrically connected to the gate of the first transistor, and a second plate of the holding capacitor is electrically connected to the first level terminal.
  7. 根据权利要求3所述的显示模块,其中,所述传感器包括:The display module according to claim 3, wherein the sensor comprises:
    公共电极;Common electrode;
    光电二极管,所述光电二极管的第一电极与所述公共电极电连接;a photodiode, wherein a first electrode of the photodiode is electrically connected to the common electrode;
    第三晶体管,所述第三晶体管的漏极与所述光电二极管的第二电极电连接,所述第三晶体管的源极与所述信号读取接线端电连接,所述第三晶体管的栅极与所述扫描信号接线端电连接。A third transistor, wherein the drain of the third transistor is electrically connected to the second electrode of the photodiode, the source of the third transistor is electrically connected to the signal reading terminal, and the gate of the third transistor is electrically connected to the scanning signal terminal.
  8. 根据权利要求7所述的显示模块,其中,所述显示模块还包括:The display module according to claim 7, wherein the display module further comprises:
    有源层,所述有源层设在所述衬底与所述封装膜层之间,所述有源层包括所述第一晶体管的半导体部、所述第二晶体管的半导体部、所述光电二极管的半导体部和所述第三晶体管的半导体部。An active layer is provided between the substrate and the encapsulation film layer, and the active layer includes a semiconductor portion of the first transistor, a semiconductor portion of the second transistor, a semiconductor portion of the photodiode, and a semiconductor portion of the third transistor.
  9. 根据权利要求7所述的显示模块,其中,所述显示模块还包括:The display module according to claim 7, wherein the display module further comprises:
    第一电极层,所述第一电极层设在所述衬底与所述封装膜层之间,所述第一电极层包括所述第一晶体管的栅极、所述第二晶体管的栅极和所述第三晶体管的栅极。A first electrode layer is provided between the substrate and the packaging film layer, and the first electrode layer includes a gate of the first transistor, a gate of the second transistor, and a gate of the third transistor.
  10. 根据权利要求9所述的显示模块,其中,所述第一电极层还包括第一走线电极,所述第一走线电极的第一端分别与所述第一晶体管的栅极、所述第三晶体管的栅极电连接,所述第一走线电极的第二端通过所述衬底上的开孔与所述扫描信号接线端电连接。The display module according to claim 9, wherein the first electrode layer further comprises a first wiring electrode, a first end of the first wiring electrode is electrically connected to the gate of the first transistor and the gate of the third transistor respectively, and a second end of the first wiring electrode is electrically connected to the scan signal terminal through an opening on the substrate.
  11. 根据权利要求7所述的显示模块,其中,所述显示模块还包括:The display module according to claim 7, wherein the display module further comprises:
    第二电极层,所述第二电极层设在所述衬底与所述封装膜层之间,所述第二电极层包括所述第一晶体管的源极及漏极、所述第二晶体管的源极及漏极和所述第三晶体管的源极及漏极。A second electrode layer, wherein the second electrode layer is disposed between the substrate and the packaging film layer, and the second electrode layer includes a source and a drain of the first transistor, a source and a drain of the second transistor, and a source and a drain of the third transistor.
  12. 根据权利要求11所述的显示模块,其中,所述第二电极层还包括第二走线电极,所述第二走线电极的第一端分别与所述第一晶体管的源极电连接,所述第二走线电极的第二端通过所述衬底上的开孔与所述第一电平接线端电连接。The display module according to claim 11, wherein the second electrode layer further comprises a second wiring electrode, the first ends of the second wiring electrodes are respectively electrically connected to the source of the first transistor, and the second ends of the second wiring electrodes are electrically connected to the first level terminal through the opening on the substrate.
  13. 根据权利要求11所述的显示模块,其中,所述第二电极层还包括第三走线电极,所述第三走线电极的第一端分别与所述第二晶体管的源极电连接,所述第三走线电极的第二端通过所述衬底上的开孔与所述数据信号接线端电连接。The display module according to claim 11, wherein the second electrode layer further comprises a third wiring electrode, the first ends of the third wiring electrodes are respectively electrically connected to the source of the second transistor, and the second ends of the third wiring electrodes are electrically connected to the data signal terminal through the opening on the substrate.
  14. 根据权利要求11所述的显示模块,其中,所述第二电极层还包括第四走线电极,所述第四走线电极的第一端分别与所述第三晶体管的漏极电连接,所述第四走线电极的第二端通过所述衬底上的开孔与所述信号读取接线端电连接。The display module according to claim 11, wherein the second electrode layer further comprises a fourth wiring electrode, the first ends of the fourth wiring electrodes are respectively electrically connected to the drain of the third transistor, and the second ends of the fourth wiring electrodes are electrically connected to the signal reading terminal through the opening on the substrate.
  15. 一种显示面板,其包括:A display panel, comprising:
    衬底;substrate;
    像素驱动模块,所述像素驱动模块设在所述衬底的一侧;A pixel driving module, wherein the pixel driving module is arranged on one side of the substrate;
    发光元件,所述发光元件设在所述像素驱动模块远离所述衬底的一侧,所述像素驱动模块与所述发光元件电连接;A light emitting element, wherein the light emitting element is disposed on a side of the pixel driving module away from the substrate, and the pixel driving module is electrically connected to the light emitting element;
    封装膜层,所述封装膜层设在所述发光元件远离所述衬底的一侧;A packaging film layer, wherein the packaging film layer is arranged on a side of the light-emitting element away from the substrate;
    扫描信号接线端,所述扫描信号接线端设在所述衬底远离所述封装膜层的一侧,所述扫描信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;A scanning signal wiring terminal, the scanning signal wiring terminal is arranged on a side of the substrate away from the packaging film layer, and the scanning signal wiring terminal is electrically connected to the pixel driving module through an opening on the substrate;
    数据信号接线端,所述数据信号接线端设在所述衬底远离所述封装膜层的一侧,所述数据信号接线端通过所述衬底上的开孔与所述像素驱动模块电连接;A data signal wiring terminal, the data signal wiring terminal is arranged on a side of the substrate away from the packaging film layer, and the data signal wiring terminal is electrically connected to the pixel driving module through an opening on the substrate;
    第一电平接线端,所述第一电平接线端设在所述衬底远离所述封装膜层的一侧,所述第一电平接线端通过所述衬底上的开孔与所述发光元件或所述像素驱动模块电连接;A first level wiring terminal, which is arranged on a side of the substrate away from the packaging film layer, and is electrically connected to the light-emitting element or the pixel driving module through an opening on the substrate;
    第二电平接线端,所述第二电平接线端设在所述衬底远离所述封装膜层的一侧,所述第二电平接线端通过所述衬底上的开孔与所述像素驱动模块或所述发光元件电连接;A second level wiring terminal, which is arranged on a side of the substrate away from the packaging film layer, and is electrically connected to the pixel driving module or the light emitting element through an opening on the substrate;
    基板,所述基板上阵列设有所述显示模块,所述基板上设有扫描线、数据线、第一电平信号线、第二电平信号线以及信号读取线;A substrate, on which the display modules are arrayed, and on which scan lines, data lines, first-level signal lines, second-level signal lines, and signal reading lines are arranged;
    所述扫描线与所述扫描信号接线端电连接,所述数据线与所述数据信号接线端电连接,所述第一电平信号线与所述第一电平接线端电连接,所述第二电平信号线与所述第二电平接线端电连接,所述信号读取线与所述信号读取接线端电连接。The scan line is electrically connected to the scan signal terminal, the data line is electrically connected to the data signal terminal, the first level signal line is electrically connected to the first level terminal, the second level signal line is electrically connected to the second level terminal, and the signal read line is electrically connected to the signal read terminal.
  16. 根据权利要求15所述的显示面板,其中,所述显示模块还包括:The display panel according to claim 15, wherein the display module further comprises:
    传感器,所述传感器设在所述衬底与所述封装膜层之间;A sensor, wherein the sensor is disposed between the substrate and the packaging film layer;
    信号读取接线端,所述信号读取接线端设在所述衬底远离所述封装膜层的一侧,所述信号读取接线端通过所述衬底上的开孔与所述传感器电连接,所述扫描信号接线端通过所述衬底上的开孔与所述传感器电连接。A signal reading terminal is arranged on a side of the substrate away from the packaging film layer, the signal reading terminal is electrically connected to the sensor through an opening on the substrate, and the scanning signal terminal is electrically connected to the sensor through an opening on the substrate.
  17. 根据权利要求15所述的显示面板,其中,所述像素驱动模块包括:The display panel according to claim 15, wherein the pixel driving module comprises:
    第一晶体管,所述第一晶体管的源极、漏极以及所述发光元件串接于所述第一电平接线端和所述第二电平接线端之间;A first transistor, wherein a source electrode, a drain electrode and the light emitting element of the first transistor are connected in series between the first level wiring terminal and the second level wiring terminal;
    第二晶体管,所述第二晶体管的栅极与所述扫描信号接线端电连接,所述第二晶体管的源极与所述数据信号接线端电连接,所述第二晶体管的漏极与所述第一晶体管的栅极电连接。A second transistor, wherein a gate of the second transistor is electrically connected to the scan signal terminal, a source of the second transistor is electrically connected to the data signal terminal, and a drain of the second transistor is electrically connected to the gate of the first transistor.
  18. 根据权利要求17所述的显示面板,其中,所述第一晶体管的源极与所述第一电平接线端电连接,所述第一晶体管的漏极与所述发光元件的第二电极电连接,所述发光元件的第一电极与所述第二电平接线端电连接。The display panel according to claim 17, wherein the source of the first transistor is electrically connected to the first level terminal, the drain of the first transistor is electrically connected to the second electrode of the light emitting element, and the first electrode of the light emitting element is electrically connected to the second level terminal.
  19. 根据权利要求17所述的显示面板,其中,所述第一晶体管的源极与所述发光元件的第一电极电连接,所述第一晶体管的漏极与所述第二电平接线端电连接,所述发光元件的第二电极与所述第一电平接线端电连接。The display panel according to claim 17, wherein the source of the first transistor is electrically connected to the first electrode of the light emitting element, the drain of the first transistor is electrically connected to the second level terminal, and the second electrode of the light emitting element is electrically connected to the first level terminal.
  20. 根据权利要求18所述的显示面板,其中,所述像素驱动模块还包括:The display panel according to claim 18, wherein the pixel driving module further comprises:
    保持电容,所述保持电容的第一极板与所述第一晶体管的栅极电连接,所述保持电容的第二极板与所述第一电平接线端电连接。A holding capacitor, wherein a first plate of the holding capacitor is electrically connected to the gate of the first transistor, and a second plate of the holding capacitor is electrically connected to the first level terminal.
PCT/CN2023/078681 2022-11-14 2023-02-28 Display module and display panel WO2024103566A1 (en)

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Citations (5)

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US20200168662A1 (en) * 2018-11-22 2020-05-28 Samsung Display Co., Ltd. Display device and method for manufacturing same
CN111341814A (en) * 2020-03-11 2020-06-26 深圳市华星光电半导体显示技术有限公司 Display panel and manufacturing method thereof
CN111584558A (en) * 2020-05-07 2020-08-25 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN114709247A (en) * 2022-03-30 2022-07-05 京东方科技集团股份有限公司 Display substrate and display device
CN114975403A (en) * 2022-05-24 2022-08-30 Tcl华星光电技术有限公司 Display panel, preparation method thereof and splicing display device

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Publication number Priority date Publication date Assignee Title
US20200168662A1 (en) * 2018-11-22 2020-05-28 Samsung Display Co., Ltd. Display device and method for manufacturing same
CN111341814A (en) * 2020-03-11 2020-06-26 深圳市华星光电半导体显示技术有限公司 Display panel and manufacturing method thereof
CN111584558A (en) * 2020-05-07 2020-08-25 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN114709247A (en) * 2022-03-30 2022-07-05 京东方科技集团股份有限公司 Display substrate and display device
CN114975403A (en) * 2022-05-24 2022-08-30 Tcl华星光电技术有限公司 Display panel, preparation method thereof and splicing display device

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