WO2024101210A1 - Information processing device - Google Patents

Information processing device Download PDF

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Publication number
WO2024101210A1
WO2024101210A1 PCT/JP2023/039183 JP2023039183W WO2024101210A1 WO 2024101210 A1 WO2024101210 A1 WO 2024101210A1 JP 2023039183 W JP2023039183 W JP 2023039183W WO 2024101210 A1 WO2024101210 A1 WO 2024101210A1
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data
unit
event
pixel
information processing
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PCT/JP2023/039183
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French (fr)
Japanese (ja)
Inventor
裕貴 町野
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ソニーセミコンダクタソリューションズ株式会社
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Publication of WO2024101210A1 publication Critical patent/WO2024101210A1/en

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  • This disclosure relates to an information processing device.
  • An event-based vision sensor has been proposed that quickly acquires event information from photoelectric conversion elements when some event, such as a change in brightness, occurs in the imaging scene.
  • This EVS detects changes in light brightness caused by, for example, the movement of a subject, as events.
  • a method that visualizes detected events in a format that is easy for humans to understand by imaging them on a frame-by-frame basis.
  • frame images are generated that contain events that occur within a certain period of time, called a time slice. If the time slice is long, a frame image that is easy for humans to understand is obtained, but the event information that occurs multiple times in the same pixel is compressed, compromising the advantage of the high speed of EVS. Conversely, if the time slice is short, the advantage of high speed is retained, but a frame image that is difficult for humans to understand is obtained. Therefore, a method has been proposed that overlaps time slices to generate frame images with improved visibility while maintaining the high speed of EVS (see, for example, non-patent document 1).
  • Non-Patent Document 1 cannot grasp the occurrence time and frequency of each event in a frame image. As a result, it is not possible to determine which of multiple events is new and which is old. In addition, it is not possible to determine whether events occur frequently at the same pixel position within a time slice.
  • This technology was developed in light of these circumstances, and provides an information processing device that can visualize the time and frequency of events in a format that is easy for humans to understand.
  • a pixel having a light detection element that detects an event based on a change in the amount of light of incident light; a pixel data generating unit configured to generate pixel data including information on the event detected in each of a plurality of unit periods; An information processing device is provided.
  • the pixel data may have a pixel value that corresponds to the detection time and detection frequency of the event.
  • the pixel data may have a larger pixel value the more recently the event was detected and the more frequently the event was detected.
  • the pixel data may have a number of gradations or brightness according to the number of the plurality of unit periods.
  • the pixel data is a bit string data of a plurality of bits
  • Information about the events in the unit period that are older may be arranged from the most significant bit side to the least significant bit side of the bit string data.
  • the event information may be represented by one or more bits for each unit period.
  • the pixel data may include information representing the polarity of the event for each unit period.
  • the multiple unit periods may have the same time duration.
  • the multiple unit periods may have a longer time span the older the time.
  • the pixel data generating section may generate the pixel data for each of the plurality of pixels based on information of the event of the corresponding pixel, the information being included in each of the plurality of divided frame data.
  • Two adjacent frames of data in the time axis direction may contain information about events that occurred within overlapping time ranges.
  • the overlapping time ranges may have a length that is an integer multiple of the unit period.
  • the pixel data generating unit may correspond each bit of the pixel data to a different one of the divided frame data, and generate a corresponding bit value of the pixel data based on the event information of the corresponding pixel in the corresponding divided frame data.
  • the pixel data generating unit may generate the bit value of the most significant bit of the pixel data based on the event information of the corresponding pixel in the newer divided frame data.
  • the split frame generation unit may split the frame data into the plurality of split frame data of the unit period having the same time length.
  • the split frame generation unit may split the frame data into a plurality of split frame data each having a different time length for the unit period.
  • the split frame generation unit may shorten the time length of the split frame data for newer times.
  • the image processing device may further include a frame image generating unit that generates a frame image based on the pixel data corresponding to the pixels.
  • the frame image generating unit may generate the frame images such that each pixel has a gradation corresponding to the detection time and detection frequency of the event, and two adjacent frame images in the time axis direction contain information about the event within an overlapping time range.
  • the image processing device may further include an information processing unit that performs the predetermined information processing based on the neural network that has performed the learning process and the frame images.
  • FIG. 1 is a block diagram showing a configuration example of an information processing device according to a first embodiment of the present disclosure.
  • FIG. 2 is a block diagram showing a configuration example of a sensor.
  • FIG. 2 is a circuit diagram illustrating a first example of a pixel.
  • FIG. 11 is a circuit diagram illustrating a second example of a pixel.
  • FIG. 2 is a diagram showing a first example of a laminated structure of a sensor.
  • FIG. 13 is a diagram showing a second example of a laminated structure of the sensor. 13 is a flowchart of event visualization in an information processing device.
  • FIG. 11 is a diagram illustrating a framing process.
  • FIG. 11 is a diagram illustrating an image generation process in a comparative example.
  • FIG. 2 is a diagram illustrating an image generation process according to the present disclosure.
  • 3 is a block diagram showing a detailed configuration of an image generating unit according to the first embodiment of the present disclosure.
  • FIG. 4 is a flowchart of image generation according to the first embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram showing division of frame data in the first embodiment of the present disclosure.
  • FIG. 2 is a diagram illustrating generation of pixel data.
  • 4 is a diagram showing a correspondence relationship between frame data and pixel data in the first embodiment of the present disclosure.
  • FIG. FIG. 4 is a diagram showing an output of image data in the first embodiment of the present disclosure.
  • FIG. 2 is a diagram showing two pieces of pixel data generated based on two frame data adjacent in the time axis direction.
  • FIG. 11 is a schematic diagram showing division of frame data in a second embodiment of the present disclosure.
  • FIG. 11 is a diagram showing the correspondence between frame data and pixel data in the second embodiment of the present disclosure.
  • FIG. 13 is a block diagram showing a detailed configuration of an image generating unit according to a third embodiment of the present disclosure. 13 is a flowchart of image generation according to a third embodiment of the present disclosure.
  • FIG. 13 is a block diagram showing a configuration of an information processing device according to a fourth embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram showing an example of information processing by an information processing unit; 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG.
  • First Embodiment Fig. 1 is a block diagram showing an example of a configuration of an information processing device 1 according to a first embodiment of the present disclosure.
  • the information processing device 1 detects the movement and brightness change of an arbitrary subject.
  • the information processing device 1 can be applied to both a stationary device such as an industrial robot and a portable device such as a smartphone.
  • the information processing device 1 in Fig. 1 includes a sensor 2, an event processing unit 3, and an application unit 4.
  • the sensor 2 has the function of detecting the movement or brightness change of a subject.
  • the sensor 2 is, for example, an event-based vision sensor (EVS).
  • EVS event-based vision sensor
  • the sensor 2 detects events based on the amount of change in the amount of incident light.
  • the events detected by the sensor 2 are supplied to the event processing unit 3, for example, via MIPI (Mobile Industry Processor Interface).
  • MIPI Mobile Industry Processor Interface
  • the event processing unit 3 generates frame data including information on events that have occurred within a predetermined period (hereinafter, event information) in units of frames each including a plurality of pixels.
  • the event processing unit 3 is configured, for example, with an FPGA (Field Programmable Gate Array).
  • the event processing unit 3 includes an event acquisition unit 11, a decoding unit 12, and a frame generation unit 13.
  • the event acquisition unit 11 acquires event information output synchronously or asynchronously from the sensor 2.
  • the event processing unit 3 may temporarily store the event information acquired from the sensor 2 in the event storage unit 14.
  • the decoding unit 12 decodes the event information acquired by the event acquisition unit 11.
  • the event information output from the sensor 2 is compressed data including information such as the time of event occurrence and polarity.
  • the decoding unit 12 decompresses the event information acquired by the event acquisition unit 11 to generate event data including information such as the time of event occurrence and polarity.
  • the event data decoded by the decoding unit 12 is supplied to the frame generation unit 13.
  • the frame generation unit 13 generates frame data including event data generated within a predetermined period.
  • the predetermined period is sometimes referred to as a time slice.
  • the frame generation unit 13 supplies the frame data to the application unit 4, for example, via a USB (Universal Serial Bus).
  • USB Universal Serial Bus
  • the application unit 4 generates image data on a frame-by-frame basis, and is configured, for example, by an FPGA.
  • the event processing unit 3 and application unit 4 may also be configured on a single semiconductor chip.
  • the sensor 2, event processing unit 3, and application unit 4 may also be configured on a single semiconductor chip.
  • the application unit 4 includes an image generation unit 15.
  • the image generation unit 15 generates image data on a frame-by-frame basis based on the frame data supplied from the frame generation unit 13.
  • the image data generated by the image generation unit 15 is used, for example, to display a frame image on the display unit 5.
  • the image data generated by the application unit 4 may be used for processing such as object tracking, recognition, or motion prediction, as described below.
  • FIG. 2 is a block diagram showing an example of the configuration of the sensor 2.
  • the sensor 2 includes a pixel array section 21, a vertical drive section 22, and a signal processing section 23.
  • the pixel array section 21 includes a plurality of pixels 30 arranged one-dimensionally or two-dimensionally in a matrix.
  • a plurality of pixels 30 are arranged two-dimensionally.
  • the horizontal direction in FIG. 2 is called the row direction X
  • the vertical direction is called the column direction Y.
  • a plurality of pixels 30 are arranged in the row direction X and the column direction Y.
  • Event detection is performed by each of the multiple pixels 30.
  • the pixels 30 have a photoelectric conversion element 31 and a pixel circuit 32.
  • the photoelectric conversion element 31 receives subject light and generates an electric charge according to the amount of light received. The generated electric charge is detected as an event by the pixel circuit 32.
  • the vertical drive unit 22 generates multiple vertical drive signals that control whether or not to drive multiple pixels arranged in the column direction Y.
  • the vertical drive unit 22 can select a pixel block in any range in the column direction Y and sequentially drive the pixels in the selected pixel block.
  • the sensor 2 may also include a horizontal drive unit that controls whether or not to drive a plurality of pixels arranged in the row direction X.
  • the signal processing unit 23 performs a predetermined signal processing on the events detected from each pixel 30.
  • the events after the signal processing are sequentially output to the downstream event processing unit 3 etc. via an output circuit etc. (not shown).
  • FIG. 3A is a circuit diagram showing a first example of a pixel 30.
  • the pixel 30 includes a photoelectric conversion element 31 and a pixel circuit 32.
  • the pixel circuit 32 includes a transfer transistor TRG, a charge-voltage conversion unit 33, a buffer 34, a differentiation circuit 35, and a quantizer 36.
  • the charge-voltage conversion unit 33, the photoelectric conversion element 31, and the transfer transistor TRG constitute a logarithmic response unit 37.
  • the logarithmic response unit 37 performs logarithmic conversion on the charge photoelectrically converted by the photoelectric conversion element 31 to generate a voltage signal Vlog.
  • the reason for the logarithmic conversion is to expand the dynamic range of the pixel 30 that acquires the luminance information.
  • the photoelectric conversion element 31 accumulates electric charges (photocharges) based on incident light that is incident on the corresponding pixel 30.
  • a photodiode is used as the photoelectric conversion element 31.
  • the photoelectric conversion element 31 has an anode and a cathode. Either the anode or the cathode (for example, the cathode) is connected to the source of the transfer transistor TRG, and the other (for example, the anode) is connected to a predetermined reference voltage node such as a ground voltage.
  • the transfer transistor TRG is used to switch the transfer of photocharges.
  • the transfer transistor TRG is turned on when, for example, a high-level transfer signal is applied to the gate of the transfer transistor TRG.
  • the drain of the transfer transistor TRG is connected to the input node n1 of the charge-voltage conversion unit 33.
  • the charge-voltage conversion unit 33 converts the charge stored in the photoelectric conversion element 31 into a voltage.
  • the charge-voltage conversion unit 33 includes transistors Q1 to Q5.
  • NMOS N-channel Metal-Oxide-Semiconductor
  • PMOS P-channel Metal-Oxide-Semiconductor
  • Transistors Q1 and Q2 are cascode-connected between the power supply voltage node and the transfer transistor TRG.
  • the source of transistor Q1 is connected to the drain of the transfer transistor TRG and the gate of transistor Q3.
  • the gate of transistor Q1 is connected to the drain of transistor Q3 and the source of transistor Q4.
  • the drain of transistor Q1 is connected to the source of transistor Q2 and the gate of transistor Q4.
  • the drain of transistor Q2 is connected to the power supply voltage node.
  • the gate of transistor Q2 is connected to the output node n2 of the charge-voltage conversion unit 33, the drain of transistor Q4, and the drain of transistor Q5.
  • Transistor Q3 and transistor Q4 are cascode-connected between node n2 and the reference voltage (ground) node.
  • the source of transistor Q3 is connected to the reference voltage (ground) node.
  • Transistor Q4 is disposed between transistor Q3 and transistor Q5.
  • the source of transistor Q5 is connected to the power supply voltage node, and a bias voltage Vblog is applied to its gate.
  • Transistor Q5 adjusts the voltage level of output node n2 according to the voltage level of bias voltage Vblog.
  • the voltage signal Vlog logarithmically converted by the charge-voltage converter 33 is input to the buffer 34.
  • the buffer 34 includes a transistor Q6 and a transistor Q7 that are cascode-connected between a power supply voltage node and a reference voltage (ground) node.
  • a PMOS transistor for example, is used as the transistor Q6.
  • An NMOS transistor for example, is used as the transistor Q7.
  • Transistor Q6 in buffer 34 forms a source follower circuit.
  • a pixel voltage Vsf corresponding to the voltage signal Vlog output from charge-voltage conversion unit 33 is output from buffer 34.
  • the voltage signal Vlog is input to the gate of transistor Q6 from output node n2 of charge-voltage conversion unit 33.
  • the source of transistor Q6 is connected to the power supply voltage node.
  • the drain of transistor Q6 is connected to the drain of transistor Q7 and differentiation circuit 35 via output node n3 of buffer 34.
  • the source of transistor Q7 is connected to the reference voltage (ground) node.
  • a bias voltage Vbsf is applied to the gate of transistor Q7.
  • Transistor Q7 adjusts the voltage level of output node n3 according to the voltage level of bias voltage Vbsf.
  • the pixel voltage Vsf output from the buffer 34 is input to the differentiation circuit 35.
  • the buffer 34 can improve the driving force of the pixel voltage Vsf. Furthermore, by providing the buffer 34, it is possible to ensure isolation so that noise generated when the downstream differentiation circuit 35 performs a switching operation is not transmitted to the charge-voltage conversion unit 33.
  • the differentiation circuit 35 generates a differentiation signal Vout according to the change in the voltage signal Vlog converted by the charge-voltage converter 33.
  • the differentiation circuit 35 includes a capacitor C1 and transistors Q8 to Q10.
  • an NMOS transistor is used for the transistor Q10, and for example, PMOS transistors are used for the transistors Q8 and Q9.
  • Capacitor C1 is disposed between a connection node n4 of the source of transistor Q8 and the gate of transistor Q9, and an output node n3 of buffer 34. Capacitor C1 accumulates charge based on pixel voltage Vsf supplied from buffer 34. Capacitor C2 is disposed between the gate of transistor Q9 and the drain of transistor Q10. Capacitor C2 supplies charge to the source of transistor Q8 and the gate of transistor Q9 according to the amount of change in pixel voltage Vsf, which is the time derivative of pixel voltage Vsf.
  • Transistor Q8 switches whether or not to short the gate and drain of transistor Q9 according to auto-zero signal XAZ.
  • Auto-zero signal XAZ is a signal that indicates initialization, and for example, goes from high level to low level every time an event detection signal described below is output from pixel 30.
  • transistor Q8 turns on, the differentiated signal Vout is reset to its initial value, and the charge of capacitor C1 is initialized.
  • the source of transistor Q10 is connected to the reference voltage (ground) node, and a bias voltage Vbdiff is applied to its gate.
  • Transistor Q10 adjusts the voltage level of output node n5 of differentiation circuit 35 according to the voltage level of bias voltage Vbdiff.
  • Transistor Q9 and transistor Q10 function as an inverting circuit with connection node n4 on the gate side of transistor Q9 as the input node and connection node n5 of transistor Q9 and transistor Q10 as the output node.
  • the differentiation circuit 35 detects the amount of change in the pixel voltage Vsf by differential calculation.
  • the amount of change in the pixel voltage Vsf indicates the amount of change in the amount of light incident on the pixel 30.
  • the differentiation circuit 35 supplies the differentiation signal Vout to the quantizer 36 via the output node n5.
  • the quantizer 36 performs a comparison operation to compare the differential signal Vout with a threshold voltage. Based on the result of the comparison operation, the quantizer 36 detects an event indicating that the absolute value of the change in the amount of incident light has exceeded the threshold voltage, and outputs an event detection signal COMP+ and an event detection signal COMP-.
  • the quantizer 36 includes transistors Q11 to Q14 and an inverter K1. For example, PMOS transistors are used as the transistors Q11 and Q13. Furthermore, for example, NMOS transistors are used as the transistors Q12 and Q14.
  • Transistors Q11 and Q12 are cascode-connected between a power supply voltage node and a reference voltage (ground) node.
  • the source of transistor Q11 is connected to the power supply voltage node.
  • the drain of transistor Q11 is connected to inverter K1 and the drain of transistor Q12.
  • the source of transistor Q12 is connected to the reference voltage (ground) node.
  • a differentiated signal Vout from differentiation circuit 35 is applied to the gate of transistor Q11.
  • a threshold voltage Vhigh is applied to the gate of transistor Q12.
  • Transistors Q11 and Q12 compare the differentiated signal Vout with the threshold voltage Vhigh. Specifically, when the differentiated signal Vout of the differentiation circuit 35 is lower than the threshold voltage Vhigh, the transistor Q11 turns on, and the event detection signal COMP+ output from the drain of the transistor Q11 via the inverter K1 becomes low level.
  • Transistors Q13 and Q14 are cascode-connected between the power supply voltage node and the reference voltage (ground) node.
  • the source of transistor Q13 is connected to the power supply voltage node.
  • the drain of transistor Q13 is connected to the output node of quantizer 36 and the drain of transistor Q14.
  • the differentiated signal Vout of differentiation circuit 35 is applied to the gate of transistor Q13.
  • the threshold voltage Vlow is applied to the gate of transistor Q14.
  • Transistors Q13 and Q14 compare the differentiated signal Vout with the threshold voltage Vlow. Specifically, when the differentiated signal Vout of the differentiation circuit 35 is higher than the threshold voltage Vlow, transistor Q13 turns off, and the event detection signal COMP- output from the drain of transistor Q13 becomes low level.
  • the pixel 30 can detect an increase or decrease in the amount of incident light as an event.
  • a photoelectric charge is generated by the photoelectric conversion element 31, and the voltage of the input node n1 connected to the cathode of the photoelectric conversion element 31 decreases.
  • the output voltage Vlog of the charge-voltage conversion unit 33 decreases, and the pixel voltage Vsf of the buffer 34 also decreases.
  • the differential signal Vout output from the differentiation circuit 35 decreases in response to the amount of decrease in the pixel voltage Vsf, and when it falls below the threshold voltage Vhigh, a low-level event detection signal COMP+ is output.
  • a low-level event detection signal COMP+ indicates that the increase in the amount of incident light exceeds the threshold value determined by the threshold voltage Vhigh.
  • a low-level event detection signal COMP- indicates that the amount of decrease in the amount of incident light is below the threshold determined by the threshold voltage Vlow.
  • an event also has polarity information that indicates whether the luminance of the incident light is positive or negative.
  • polarity indicates whether the luminance of the incident light is positive or negative.
  • FIG. 3B is a circuit diagram showing a second example of the pixel 30.
  • the quantizer 36a in the pixel circuit 32a shown in FIG. 3B differs from the quantizer 36 in FIG. 3A in that it does not include transistors Q13 and Q14. Therefore, the pixel 30a (and pixel circuit 32a) in FIG. 3B detects only the increase in the amount of light incident on the photoelectric conversion element 31, and outputs the event detection signal COMP+.
  • pixel 30 may be configured to remove transistors Q11, Q12 and inverter K1 from quantizer 36 in FIG. 3A. In that case, pixel 30 detects only the decrease in the amount of light received by photoelectric conversion element 31, among the increase and decrease, and outputs event detection signal COMP-.
  • the sensor 2 can also be configured, for example, with two stacked chips.
  • FIG. 4A is a diagram showing a first example of the stacked structure of the sensor 2.
  • This sensor 2 comprises a pixel chip 41 and a logic chip 42 stacked on the pixel chip 41. These chips are joined by vias or the like. Note that in addition to vias, they can also be joined by Cu-Cu bonding or bumps.
  • the pixel chip 41 has, for example, the photoelectric conversion element 31 and a part of the pixel circuit 32 (for example, the transfer transistor TRG and the charge-voltage conversion unit 33) arranged thereon.
  • the logic chip 42 has, for example, the remaining part of the pixel circuit 32 (for example, the buffer 34, the differentiation circuit 35, and the quantizer 36), the vertical drive unit 22, and the signal processing unit 23 arranged thereon.
  • the sensor 2 may be composed of three or more stacked chips.
  • FIG. 4B is a diagram showing a second example of the stacked structure of the sensor 2.
  • a first pixel chip 41a and a second pixel chip 41b are stacked instead of the pixel chip 41.
  • the first pixel chip 41a for example, a photoelectric conversion element 31 and a transfer transistor TRG are arranged.
  • a charge-voltage conversion unit 33 is arranged in the second pixel chip 41b.
  • the sensor 2a in FIG. 4B has a configuration in which the charge-voltage conversion unit 33 is removed from the first pixel chip 41a and placed on the second pixel chip 41b. This ensures that the area of the photoelectric conversion element 31 is sufficient in the first pixel chip 41a, and that the area of the charge-voltage conversion unit 33 is sufficient in the second pixel chip 41b, even when the chip area is miniaturized.
  • the information processing device 1 is characterized by generating frame images capable of visualizing the detection time and detection frequency of an event.
  • the series of processes for this purpose is called event visualization.
  • FIG. 5 is a flowchart showing an outline of the processing procedure for event visualization in the information processing device 1.
  • an event is detected in each pixel 30 in the sensor 2 (step S1).
  • the event acquisition unit 11 in the event processing unit 3 acquires compressed event information at predetermined intervals.
  • the event information acquired within a predetermined period may be referred to as a data chunk.
  • the data chunk acquired by the event acquisition unit 11 may be temporarily stored in the event storage unit 14 (step S2).
  • the decoding unit 12 decodes the data chunks stored in the event storage unit 14 and outputs the event data (step S3).
  • the event data output by the decoding unit 12 includes, for example, the following information: x: X address indicating the detection position (e.g., pixel position) of the event y: Y address indicating the detection position (e.g., pixel position) of the event t: time information (time stamp) indicating the detection time of the event p: Event polarity information
  • the frame generating unit 13 performs a framing process to generate frame data based on the event data output from the decoding unit 12 (step S4).
  • the image generating unit 15 performs a frame image generation process based on the frame data supplied by the frame generating unit 13 (step S5). The image generation process will be described in detail later.
  • FIG. 6 is a diagram explaining the framing process.
  • the decoding unit 12 outputs event data decoded in units of data chunks dc.
  • One data chunk dc contains, for example, event information for all pixels that occurred during a predetermined unit detection period ⁇ t.
  • Each piece of event information is represented by event data e(x, y, p, t) that contains the event detection positions x, y, event detection time t, and event polarity information p described above.
  • the frame generation unit 13 outputs multiple event data included in a predetermined time slice Ts consisting of multiple unit detection periods ⁇ t as one frame of data.
  • the time slice Ts has a time width of 8 ⁇ t.
  • the frame data F1 includes eight data chunks dc.
  • the frame generation unit 13 generates frame data including event information generated within a predetermined period (time slice Ts) in frame units including multiple pixels 30.
  • the frame generation unit 13 generates frame data such that two adjacent frame data in the time axis direction have event data with overlapping time ranges.
  • the overlapping time ranges are sometimes called overlapping sections.
  • an overlap section with a time width of 6 ⁇ t is provided between frame data F1 and F2.
  • an overlap section with a time width of 6 ⁇ t is provided between frame data F2 and F3.
  • the duration of the time slice Ts and the duration of the overlap section Tor are not limited to those shown in FIG. 6, and any duration may be set. If the time slice Ts is too short, fewer events will be included in one frame of data, making it difficult to visually grasp the characteristics of the event information. If the time slice Ts is too long compared to the overlap section Tor, the interval between frame data generation will be longer, and the advantage of the high speed of EVS will be lost. Therefore, it is desirable to adjust the duration of the time slice Ts and the duration of the overlap section Tor according to the occurrence status of events, etc.
  • FIG. 7A is a diagram showing an image generation process in a comparative example.
  • FIG. 7A shows an example in which subject A moves from position Ps to position Pe in time slice Ts. A change in luminance occurs while subject A moves from position Ps to position Pe, and an event is detected by sensor 2. As a result, image data G0 including event data is generated.
  • Image data G0 contains event information that occurred within time slice Ts, but the time at which the event occurred is unknown. Therefore, it is not possible to determine from image data G0 whether object A is moving from position Ps to position Pe, or from position Pe to position Ps.
  • image data G0 of the comparative example does not include information on the time when an event occurred, so the movement of the subject cannot be visually interpreted or analyzed.
  • the information processing device 1 disclosed herein is characterized by its ability to solve this problem.
  • FIG. 7B is a diagram showing the image generation process in the present disclosure. Like FIG. 7A, FIG. 7B shows an example in which subject A moves from position Ps to position Pe in time slice Ts.
  • Image data G output by information processing device 1 of the present disclosure has the feature that the gradation changes according to the time at which an event occurs. Specifically, new events are represented in dark colors, and older events are represented in light colors. This makes it possible to determine that object A is moving from position Ps to position Pe due to the change in gradation of image data G. In this way, information processing device 1 of the present disclosure can output image data G that enables visual interpretation or analysis of the subject's movement.
  • FIG. 8 is a block diagram showing a detailed configuration of the image generation unit 15 in the first embodiment of the present disclosure.
  • frame data is supplied to the image generation unit 15 from the frame generation unit 13.
  • the image generation unit 15 also generates image data based on the frame data, and outputs the image data to the display unit 5, for example.
  • the image generation unit 15 includes a divided frame generation unit 51, a pixel data generation unit 52, and a frame image generation unit 53.
  • the divided frame generation unit 51 divides the frame data supplied from the frame generation unit 13, and outputs multiple block data (divided frame data), each having a predetermined time width (hereinafter, unit period), to the pixel data generation unit 52.
  • the pixel data generating unit 52 generates pixel data including event information detected in each of a plurality of unit periods.
  • the pixel data generated by the pixel data generating unit 52 is generated for each pixel 30 in the pixel array unit 21, i.e., for each individual pixel 30 that constitutes a frame image.
  • the pixel data generating unit 52 includes a mapping unit 54, a shifting unit 55, and a storage unit 56.
  • the mapping unit 54 links pixel position information of the event data contained in the block data D with the corresponding coordinates (hereinafter, pixel coordinates) on the drawing canvas.
  • the mapping unit 54 obtains block data from the divided frame generation unit 51 and extracts the event data within the block data.
  • the mapping unit 54 assigns the event data to pixel coordinates based on the pixel position information of the event data.
  • the mapping unit 54 determines whether or not an event corresponding to each pixel exists.
  • the shifting unit 55 acquires the event data for each pixel coordinate from the mapping unit 54, and generates pixel data in a binary data format consisting of multiple bits for each pixel coordinate.
  • the storage unit 56 stores the pixel data in binary data format, with the number of bits equal to the number of partition data obtained by dividing the frame data, arranged in pixel order for each pixel coordinate.
  • the shift unit 55 reads out the pixel data in the memory unit 56, bit-shifts it to the LSB side, discards the old binary data on the LSB side, and adds new binary data to the MSB side. The detailed operation of the shift unit 55 will be described later.
  • the shift unit 55 repeats the shifting operation of the pixel data based on the event data of each block data constituting the frame data.
  • the pixel data generating unit 52 outputs the pixel data to the frame image generating unit 53.
  • the frame image generating unit 53 generates image data (frame image) in frame units based on the pixel data of each pixel coordinate.
  • image generation unit 15 in the first embodiment of the present disclosure is not limited to the configuration shown in FIG. 8 as long as it can realize the image generation process shown in FIG. 9.
  • FIG. 9 is a flowchart of image generation in the first embodiment of the present disclosure.
  • the process shown in FIG. 9 corresponds to the image generation process of step S5 shown in FIG. 5.
  • the split frame generation unit 51 splits the frame data into N pieces of section data (step S11).
  • N is a number corresponding to the number of gradations.
  • FIG. 10 is a schematic diagram showing the splitting of frame data in the first embodiment of the present disclosure. As shown in FIG. 10, the split frame generation unit 51 splits the frame data F into multiple pieces in the time axis direction to generate multiple pieces of section data D. In other words, the split frame generation unit 51 splits the frame data into data for multiple unit periods.
  • the unit periods of the eight block data D all have the same time width. The following explanation will be given using this example.
  • the frame data F includes multiple event data e(x, y, p, t). These event data are assigned to the respective block data D.
  • Each piece of block data D is assigned an identification number i.
  • the identification numbers i are assigned 0 to N-1 in chronological order from oldest to newest.
  • the block data D in Figure 9 are assigned numbers 0, 1, 2, ... 7 in chronological order.
  • the frame data F may be divided into the same time intervals as the data chunks dc in FIG. 6.
  • the data chunks dc included in the overlap section Tor can be reused when acquiring the next frame data F. Details will be described later.
  • step S12 0 is substituted for the identification number i, and it is initialized (step S12).
  • the processing in steps S13 to S16 is for one piece of partition data D.
  • steps S13 to S16 the identification number i is incremented, and the eight pieces of partition data D are processed sequentially from the oldest one.
  • step S13 it is determined whether the identification number i is smaller than the number of partitions N. If the identification number i is smaller than the number of partitions N, the processing from step S14 onwards is carried out.
  • the pixel data generator 52 acquires all event data included in the block data D with the identification number i (step S14).
  • One block data D may contain multiple event data for multiple events.
  • the pixel data generation unit 52 generates pixel data by mapping each event data acquired in step S14 onto a drawing canvas for the image data (step S15).
  • the drawing canvas is a data area in which pixel data for each pixel 30 is arranged in the order in which the pixels 30 are arranged, and is provided in correspondence with, for example, a storage area of the storage unit 56.
  • a frame image is generated based on each pixel data mapped onto the drawing canvas.
  • FIG. 11 is a diagram showing the generation of pixel data.
  • the mapping unit 54 in the pixel data generation unit 52 extracts the event detection position (x1, y1) from, for example, event data e1 (x1, y1, p1, t1) in the block data D. Based on this, the event data e1 is assigned to the corresponding coordinates pxa (x1, y1) on the drawing canvas cp.
  • event data is assigned to the corresponding coordinates on the drawing canvas cp.
  • data indicating that no event data exists is assigned to the corresponding coordinates pxb (x2, y2) on the drawing canvas cp.
  • the pixel data generation unit 52 determines whether or not a corresponding event exists in the block data D for each coordinate in the drawing canvas cp, and generates binary data of one or more bits (one bit in the example of FIG. 11).
  • the binary data is, for example, one or more bits of binary data indicating the presence or absence of an event and its polarity. In this specification, an example in which the binary data is one bit of binary data indicating the presence or absence of an event will be mainly described.
  • the pixel data generation unit 52 For the coordinate pxa, the pixel data generation unit 52 generates binary data bnewa1 (e.g., 1) indicating that an event exists, and for the coordinate pxb, generates binary data bnewb1 (e.g., 0) indicating that an event does not exist.
  • the pixel data generation unit 52 generates binary data for other coordinates in the drawing canvas cp based on the presence or absence of a corresponding event in the block data D.
  • the memory unit 56 stores pixel data corresponding to each coordinate in the drawing canvas cp, for example as bit string data.
  • the memory unit 56 stores pixel data Arra0 for the coordinate pxa before mapping.
  • the pixel data Arra0 has binary data bolda0 in its least significant bit (hereinafter, LSB: Least Significant Bit) and binary data bnewa0 in its most significant bit (hereinafter, MSB: Most Significant Bit).
  • the shift unit 55 shifts each bit of the pixel data Arra0 by one bit toward the LSB side to generate pixel data Arra1. As a result, the LSB of the pixel data Arra0 is discarded.
  • the shift unit 55 also adds the corresponding event data bnewa1 in the partition data D to the MSB. As a result, new pixel data Arra1 is generated that has binary data bolda1 in the LSB and binary data bnewa1 in the MSB.
  • the binary data bnewa1 has a bit value of 1, which indicates that an event exists.
  • the memory unit 56 stores pixel data Arrb0, which corresponds to the coordinate pxb before mapping and has binary data boldb0 in the LSB and binary data bnewb0 in the MSB.
  • the shift unit 55 discards the binary data boldb0 from the LSB of the pixel data Arrb0, shifts the binary data from binary data boldb1 to binary data bnewb0 one bit at a time toward the LSB side, and adds binary data bnewb1 to the MSB side.
  • the binary data bnewb1 is 0, which indicates that no event exists. In this way, the pixel data Arrb1 is generated.
  • the shift unit 55 shifts each bit of the pixel data stored in the memory unit 56 for each coordinate of the drawing canvas cp toward the LSB by one bit at a time, and adds one bit of information indicating the presence or absence of an event in the block data D to the MSB, thereby generating pixel data for each pixel 30 for each block data D.
  • step S15 in FIG. 9 When the processing of step S15 in FIG. 9 is completed, the identification number i of the partition data D is incremented (step S16), and the processing from step S13 onwards is repeated. If the identification number i is smaller than the number of partitions N in step S13, the processing of steps S14 to S15 is performed for the next partition data D. This completes the pixel data generation processing for all section data D of the frame data F.
  • the pixel data generation unit 52 outputs the new pixel data generated in step S15 to the frame image generation unit 53.
  • FIG. 12 is a diagram showing the correspondence between frame data and pixel data in the first embodiment of the present disclosure.
  • Frame data F includes event data corresponding to all pixels 30 in the pixel array section 21. Each event data in the frame data F is assigned to each coordinate in the drawing canvas cp.
  • the event data of a specific pixel in the frame data F is shown with a thick line, and the event data of the other pixels is shown with a dashed line.
  • FIG. 12 also shows an example in which the event data of a specific pixel in the frame data F is assigned to pixel data pd of coordinate pxc in the drawing canvas cp.
  • the pixel data generation unit 52 associates each bit of the pixel data pd with a different block data D in the frame data F, and generates a corresponding bit value of the pixel data pd based on the event information of the corresponding pixel 30 in the block data D.
  • Figure 12 shows an example in which a corresponding bit value of the pixel data pd is generated based on the event data epxc of a specific pixel.
  • pixel data pd has older binary data on the LSB side and newer binary data on the MSB side.
  • pixel data generator 52 generates the bit value on the higher order bit side of pixel data pd based on the event information of the corresponding pixel 30 in the newer block data D.
  • the binary data of each bit of pixel data pd is, for example, 1 if event data (event data epxc in FIG. 12) of the corresponding pixel 30 exists in the corresponding block data D, and is, for example, 0 if no event data epxc exists.
  • FIG. 12 shows an example in which the binary data is 1 if at least one event data epxc exists in the corresponding block data D, but the conditions for setting the binary data of each bit of pixel data to 1 may be set arbitrarily.
  • the binary data of each bit of pixel data may be 1 if the number of events of the corresponding pixel 30 exists in the corresponding block data D equal to or exceeds a predetermined threshold, and 0 otherwise.
  • the pixel data generating unit 52 generates pixel data pd including event information detected in each of a plurality of unit periods.
  • the pixel data pd is bit string data of a plurality of bits.
  • event information of older unit periods is arranged from the MSB side to the LSB side of the bit string data.
  • the event information is represented by one or more bits for each unit period.
  • the pixel data pd may also include polarity information p of the event for each unit period.
  • the pixel data generating unit 52 similarly generates pixel data for other coordinates within the drawing canvas cp. That is, the pixel data generating unit 52 generates pixel data for each of all pixels 30 within the pixel array unit 21 based on the event information of the corresponding pixel 30 contained in each of the multiple block data D.
  • the frame image generating unit 53 draws a frame image based on the pixel data of each pixel for one frame generated by the processing of steps S13 to S16 (step S17).
  • the pixel data of each pixel constituting the frame image is collectively referred to as image data.
  • FIG. 13 is a diagram showing an example of image data in the first embodiment of the present disclosure. Three pieces of pixel data pd1, pd2, and pd3 that are part of the image data are shown in FIG. 13. These three pieces of pixel data correspond to coordinates pxd, pxe, and pxf, respectively, within the drawing canvas cp.
  • the pixel data pd1 has an MSB of 1, indicating that an event has occurred most recently.
  • the pixel data pd2 has more bits that are 1 than the pixel data pd3, indicating that an event has occurred more frequently.
  • the pixel values of the pixel data pd1, pd2, and pd3 are 206, 124, and 97, respectively. Therefore, the pixel data pd1 has the highest gradation (brightness), the pixel data pd2 has the next highest gradation (brightness), and the pixel data pd3 has the lowest gradation (brightness).
  • the gradation (brightness) of each pixel in the frame image generated by the frame image generating unit 53 makes it possible to determine the time of occurrence (detection) of a frame and the frequency of occurrence (detection).
  • the number of gradations represented by the pixel values of the pixel data pd1, pd2, and pd3 is a number that corresponds to the division number N of the frame data F, and also corresponds to the number of unit periods.
  • the frame image generating unit 53 may reflect the polarity information p of each event in the image data. For example, either a positive polarity event or a negative polarity event may use a grayscale to represent the time and frequency of the event. The other event may use a gradation of one of the RGB colors to represent the time and frequency of the event.
  • step S18 After the frame image drawing process is performed in step S17 of FIG. 9, it is determined whether or not to end the framing process (step S18). Ending the framing process means that no new frame images are to be drawn. If the framing process is to end, the process of FIG. 9 ends.
  • step S18 If the framing process is to continue in step S18, the process from step S11 onwards is repeated to draw a new frame image.
  • the frame generation unit 13 generates each frame data such that two adjacent frame data in the time axis direction include an overlapping time range. While FIG. 6 shows an example in which each frame data is divided into multiple data chunks dc at equal intervals, the divided frame generation unit 51 generates multiple segment data by dividing each frame data generated by the frame generation unit 13 for each unit period. As described above, pixel data is generated based on the frame data including the multiple segmented segment data.
  • FIG. 14 is a diagram showing two pixel data generated based on two frame data adjacent in the time axis direction.
  • the two frame data adjacent in the time axis direction supplied to the split frame generation unit 51 have an overlapping portion where they overlap with each other, and the time width of the overlapping portion is the same as the time width of the overlapping section in FIG. 6, for example.
  • the two pixel data pda and pdb generated based on two frame data adjacent in the time axis direction also have an overlapping portion bor as shown in FIG. 14.
  • the time width of the overlapping portion bor is the same as the time width of the overlapping section Tor, and is an integer multiple of the unit period, which is the time width of the partition data.
  • the number of unit periods of the overlapping portion does not necessarily match the number of data chunks in the overlapping section Tor.
  • the direction in which a moving object moves can be expressed as a trajectory in a frame image.
  • the binary data in the overlapping area with the previously generated pixel data can be used as valid data as is, so new pixel data can be generated quickly and the frame rate can be increased.
  • the frame image generating unit 53 generates image data such that each pixel 30 has a gradation according to the detection time and detection frequency of the event, and two frame images adjacent in the time axis direction contain event information within an overlapping time range.
  • the information processing device 1 in the first embodiment of the present disclosure generates pixel data having pixel values according to the detection time and detection frequency of an event, and can generate a frame image in which not only the location of the event but also the time and frequency of the event can be easily visually recognized.
  • the direction of the event and the time of the event can be expressed by, for example, brightness or gradation, making it easier to visually grasp when and in which direction a moving object moved. It is also possible to visually grasp at what time and for how long an event occurred.
  • the image generation process of the present disclosure which is described in FIG. 9, expresses the time of occurrence of an event in a form that mimics the afterimage effect that occurs in the human eye.
  • the information processing device 1 of the present disclosure has the characteristic of being able to visualize events in a form that is easier for humans to understand than conventional methods.
  • the image generation process of the present disclosure makes it possible to distinguish between multiple events by gradation or brightness, even when multiple events occur at the same pixel position in one time slice.
  • the divided frame generating unit 51 in the first embodiment divides the frame data F into a plurality of segment data D with the same time width, but the time widths of the plurality of segment data D do not necessarily have to be the same.
  • FIG. 15 is a schematic diagram showing the division of frame data in the second embodiment of the present disclosure.
  • the divided frame generation unit 51 in the second embodiment divides the frame data F into a plurality of segment data Da each having a different time width.
  • a time range within the frame data F in which it is desired to detect the situation of an event occurrence in more detail can be divided into segment data Da with a narrower time width, and other time ranges can be divided into segment data Da with a wider time width.
  • the frame data F is divided so that the time width (unit period) of the partition data becomes logarithmically longer as the time period becomes older and shorter as the time period becomes newer.
  • FIG. 16 is a diagram showing the correspondence between frame data F and pixel data in the second embodiment of the present disclosure.
  • Frame data F in FIG. 16 contains the same event data as frame data F shown in FIG. 12.
  • segment data Da in FIG. 16 differs from segment data D in FIG. 12 in the time range and time width that it occupies within frame data F.
  • segment data Da in FIG. 16 contains different event data compared to segment data D in FIG. 12 having the same identification number i. For this reason, pixel data pdc in FIG. 16 is different data from pixel data pd shown in FIG. 12.
  • the pixel data pdc in FIG. 16 is more sensitive to the presence or absence of event data in the new time range. This makes it possible to more precisely track changes in the brightness of the subject, particularly in the new time range, and to more precisely identify the time when the event is occurring.
  • the time width of each block of segment data D obtained by dividing frame data F is made different, so that, for example, pixel data can be generated that contains more information about events that occurred at newer times than information about events that occurred at older times.
  • the frame image generated by the information processing device 1 according to the second embodiment can visually represent information about the occurrence location, occurrence time, and occurrence frequency of events that occurred at more recent times in more detail.
  • Fig. 17 is a block diagram showing a detailed configuration of image generation unit 15 in the third embodiment of the present disclosure.
  • Image generation unit 15a in Fig. 17 has a configuration in which a weighting unit 60 is newly added to image generation unit 15 in Fig. 8.
  • Weighting unit 60 is disposed between pixel data generation unit 52 and frame image generation unit 53.
  • the weighting unit 60 applies a predetermined weighting to the pixel data.
  • the specific weighting method is arbitrary. For example, the bit value of a specific bit of the pixel data may be inverted, or each bit of the pixel data may be shifted to the MSB or LSB side.
  • the pixel data weighted by the weighting unit 60 is supplied to the frame image generating unit 53.
  • FIG. 18 is a flowchart of image generation in the third embodiment of the present disclosure.
  • a weighting process (step S20) is added between steps S13 and S17.
  • the weighting unit 60 weights the pixel data output from the pixel data generation unit 52.
  • the frame image generation unit 53 outputs image data based on the weighted pixel data.
  • new event data can be emphasized by shifting all but the new binary data of the pixel data (e.g., the MSB binary data) to the LSB side.
  • the time range of interest can be changed by shifting the binary data of a specific time range to the MSB side.
  • the image generation unit 15a in the third embodiment of the present disclosure weights pixel data as necessary, making it possible to change the display format of event information in a frame image in various ways according to the characteristics of the event, and to provide a frame image with high visibility. Note that the weighting of pixel data according to the third embodiment can be applied to any of the first and second embodiments.
  • Fig. 19 is a block diagram showing a configuration of the information processing device 1 according to the fourth embodiment of the present disclosure.
  • the information processing device 1a shown in Fig. 19 includes an application unit 4a.
  • the application unit 4a includes a neural network unit 61, a learning unit 62, and an information processing unit 63.
  • the image generating unit 15 (or the image generating unit 15a) generates image data by the process of FIG. 9 (or FIG. 18).
  • the neural network unit 61 acquires the image data from the image generating unit 15 and stores it internally.
  • the learning unit 62 performs a learning process to update the weights of the neural network used for the specified information processing based on the image data stored in the neural network unit 61, and generates a trained specified information processing model.
  • the specified information processing includes at least one process of tracking, recognizing, or predicting the movement of an object.
  • the information processing unit 63 inputs the image data generated by the image generating unit 15 to the trained neural network unit 61, and performs predetermined information processing based on the data output from the trained neural network unit 61.
  • FIG. 20 is a schematic diagram showing an example of information processing by the information processing unit 63.
  • the neural network unit 61 has an information processing model M.
  • the information processing unit 63 performs information processing based on the information processing model M and image data G1 in which subjects H1, H2, and H3 are captured.
  • the image data of the present disclosure can represent the movement of a subject, as explained in FIG. 7B.
  • the information processing model M it is possible to identify or predict, for example, the movement line L of subject H1 in image data G1.
  • the image data of the present disclosure can identify events based on differences in gradation even when multiple events occur at the same pixel 30. This makes it possible to identify the event of subject H2, for example, even when an event of subject H2 and an event of subject H3 occur at the same time.
  • the weights of the neural network are learned using image data generated by the information processing device 1 according to the first to third embodiments, and new image data is input to the trained neural network, so that data reflecting the learning results can be output from the neural network, and various information processing can be performed using this data.
  • information processing such as object tracking, recognition, or motion prediction can be performed using the image data generated by the information processing device 1 according to the first to third embodiments.
  • the technology according to the present disclosure can be applied to various products.
  • the technology according to the present disclosure may be realized as a device mounted on any type of moving object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, a construction machine, or an agricultural machine (tractor).
  • FIG. 21 is a block diagram showing a schematic configuration example of a vehicle control system 7000, which is an example of a mobile control system to which the technology disclosed herein can be applied.
  • the vehicle control system 7000 includes a plurality of electronic control units connected via a communication network 7010.
  • the vehicle control system 7000 includes a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an outside vehicle information detection unit 7400, an inside vehicle information detection unit 7500, and an integrated control unit 7600.
  • the communication network 7010 connecting these multiple control units may be, for example, an in-vehicle communication network conforming to any standard such as CAN (Controller Area Network), LIN (Local Interconnect Network), LAN (Local Area Network), or FlexRay (registered trademark).
  • CAN Controller Area Network
  • LIN Local Interconnect Network
  • LAN Local Area Network
  • FlexRay registered trademark
  • Each control unit includes a microcomputer that performs arithmetic processing according to various programs, a storage unit that stores the programs executed by the microcomputer or parameters used in various calculations, and a drive circuit that drives various devices to be controlled.
  • Each control unit includes a network I/F for communicating with other control units via a communication network 7010, and a communication I/F for communicating with devices or sensors inside and outside the vehicle by wired or wireless communication.
  • the functional configuration of the integrated control unit 7600 includes a microcomputer 7610, a general-purpose communication I/F 7620, a dedicated communication I/F 7630, a positioning unit 7640, a beacon receiving unit 7650, an in-vehicle device I/F 7660, an audio/image output unit 7670, an in-vehicle network I/F 7680, and a storage unit 7690.
  • Other control units also include a microcomputer, a communication I/F, a storage unit, and the like.
  • the drive system control unit 7100 controls the operation of devices related to the drive system of the vehicle according to various programs.
  • the drive system control unit 7100 functions as a control device for a drive force generating device for generating a drive force for the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force for the vehicle.
  • the drive system control unit 7100 may also function as a control device such as an ABS (Antilock Brake System) or ESC (Electronic Stability Control).
  • the drive system control unit 7100 is connected to a vehicle state detection unit 7110.
  • the vehicle state detection unit 7110 includes at least one of the following: a gyro sensor that detects the angular velocity of the axial rotational motion of the vehicle body, an acceleration sensor that detects the acceleration of the vehicle, or a sensor for detecting the amount of operation of the accelerator pedal, the amount of operation of the brake pedal, the steering angle of the steering wheel, the engine speed, or the rotation speed of the wheels.
  • the drive system control unit 7100 performs arithmetic processing using the signal input from the vehicle state detection unit 7110, and controls the internal combustion engine, the drive motor, the electric power steering device, the brake device, etc.
  • the body system control unit 7200 controls the operation of various devices installed in the vehicle body according to various programs.
  • the body system control unit 7200 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, tail lamps, brake lamps, turn signals, and fog lamps.
  • radio waves or signals from various switches transmitted from a portable device that replaces a key can be input to the body system control unit 7200.
  • the body system control unit 7200 accepts the input of these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.
  • the battery control unit 7300 controls the secondary battery 7310, which is the power supply source for the drive motor, according to various programs. For example, information such as the battery temperature, battery output voltage, or remaining capacity of the battery is input to the battery control unit 7300 from a battery device equipped with the secondary battery 7310. The battery control unit 7300 performs calculations using these signals, and controls the temperature regulation of the secondary battery 7310 or a cooling device or the like equipped in the battery device.
  • the outside vehicle information detection unit 7400 detects information outside the vehicle equipped with the vehicle control system 7000.
  • the imaging unit 7410 and the outside vehicle information detection unit 7420 is connected to the outside vehicle information detection unit 7400.
  • the imaging unit 7410 includes at least one of a ToF (Time Of Flight) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras.
  • the outside vehicle information detection unit 7420 includes at least one of an environmental sensor for detecting the current weather or climate, or a surrounding information detection sensor for detecting other vehicles, obstacles, pedestrians, etc., around the vehicle equipped with the vehicle control system 7000.
  • the environmental sensor may be, for example, at least one of a raindrop sensor that detects rain, a fog sensor that detects fog, a sunshine sensor that detects the level of sunlight, and a snow sensor that detects snowfall.
  • the surrounding information detection sensor may be at least one of an ultrasonic sensor, a radar device, and a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device.
  • the imaging unit 7410 and the outside vehicle information detection unit 7420 may each be provided as an independent sensor or device, or may be provided as a device in which multiple sensors or devices are integrated.
  • FIG. 22 shows an example of the installation positions of the imaging unit 7410 and the outside vehicle information detection unit 7420.
  • the imaging units 7910, 7912, 7914, 7916, and 7918 are provided, for example, at least one of the front nose, side mirrors, rear bumper, back door, and upper part of the windshield inside the vehicle cabin of the vehicle 7900.
  • the imaging unit 7910 provided on the front nose and the imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 7900.
  • the imaging units 7912 and 7914 provided on the side mirrors mainly acquire images of the sides of the vehicle 7900.
  • the imaging unit 7916 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 7900.
  • the imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin is mainly used to detect leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.
  • FIG. 22 shows an example of the imaging ranges of the imaging units 7910, 7912, 7914, and 7916.
  • Imaging range a indicates the imaging range of the imaging unit 7910 provided on the front nose
  • imaging ranges b and c indicate the imaging ranges of the imaging units 7912 and 7914 provided on the side mirrors
  • imaging range d indicates the imaging range of the imaging unit 7916 provided on the rear bumper or back door.
  • image data captured by the imaging units 7910, 7912, 7914, and 7916 are superimposed to obtain an overhead image of the vehicle 7900.
  • External information detection units 7920, 7922, 7924, 7926, 7928, and 7930 provided on the front, rear, sides, corners, and upper part of the windshield inside the vehicle 7900 may be, for example, ultrasonic sensors or radar devices.
  • External information detection units 7920, 7926, and 7930 provided on the front nose, rear bumper, back door, and upper part of the windshield inside the vehicle 7900 may be, for example, LIDAR devices. These external information detection units 7920 to 7930 are mainly used to detect preceding vehicles, pedestrians, obstacles, etc.
  • the outside-vehicle information detection unit 7400 causes the imaging unit 7410 to capture an image outside the vehicle, and receives the captured image data.
  • the outside-vehicle information detection unit 7400 also receives detection information from the connected outside-vehicle information detection unit 7420. If the outside-vehicle information detection unit 7420 is an ultrasonic sensor, a radar device, or a LIDAR device, the outside-vehicle information detection unit 7400 transmits ultrasonic waves or electromagnetic waves, and receives information on the received reflected waves.
  • the outside-vehicle information detection unit 7400 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, or characters on the road surface, based on the received information.
  • the outside-vehicle information detection unit 7400 may perform environmental recognition processing for recognizing rainfall, fog, road surface conditions, etc., based on the received information.
  • the outside-vehicle information detection unit 7400 may calculate the distance to an object outside the vehicle based on the received information.
  • the outside vehicle information detection unit 7400 may also perform image recognition processing or distance detection processing to recognize people, cars, obstacles, signs, or characters on the road surface based on the received image data.
  • the outside vehicle information detection unit 7400 may perform processing such as distortion correction or alignment on the received image data, and may also generate an overhead image or a panoramic image by synthesizing image data captured by different imaging units 7410.
  • the outside vehicle information detection unit 7400 may also perform viewpoint conversion processing using image data captured by different imaging units 7410.
  • the in-vehicle information detection unit 7500 detects information inside the vehicle.
  • a driver state detection unit 7510 that detects the state of the driver is connected to the in-vehicle information detection unit 7500.
  • the driver state detection unit 7510 may include a camera that captures an image of the driver, a biosensor that detects the driver's biometric information, or a microphone that collects sound inside the vehicle.
  • the biosensor is provided, for example, on the seat or steering wheel, and detects the biometric information of a passenger sitting in the seat or a driver gripping the steering wheel.
  • the in-vehicle information detection unit 7500 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 7510, or may determine whether the driver is dozing off.
  • the in-vehicle information detection unit 7500 may perform processing such as noise canceling on the collected sound signal.
  • the integrated control unit 7600 controls the overall operation of the vehicle control system 7000 according to various programs.
  • the input unit 7800 is connected to the integrated control unit 7600.
  • the input unit 7800 is realized by a device that can be operated by the passenger, such as a touch panel, a button, a microphone, a switch, or a lever. Data obtained by voice recognition of a voice input by a microphone may be input to the integrated control unit 7600.
  • the input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an externally connected device such as a mobile phone or a PDA (Personal Digital Assistant) that supports the operation of the vehicle control system 7000.
  • PDA Personal Digital Assistant
  • the input unit 7800 may be, for example, a camera, in which case the passenger can input information by gestures. Alternatively, data obtained by detecting the movement of a wearable device worn by the passenger may be input. Furthermore, the input unit 7800 may include, for example, an input control circuit that generates an input signal based on information input by the passenger using the above-mentioned input unit 7800 and outputs the input signal to the integrated control unit 7600. Passengers and others can operate the input unit 7800 to input various data and instruct processing operations to the vehicle control system 7000.
  • the memory unit 7690 may include a ROM (Read Only Memory) that stores various programs executed by the microcomputer, and a RAM (Random Access Memory) that stores various parameters, calculation results, sensor values, etc.
  • the memory unit 7690 may also be realized by a magnetic memory device such as a HDD (Hard Disc Drive), a semiconductor memory device, an optical memory device, or a magneto-optical memory device, etc.
  • the general-purpose communication I/F 7620 is a general-purpose communication I/F that mediates communication between various devices present in the external environment 7750.
  • the general-purpose communication I/F 7620 may implement cellular communication protocols such as GSM (registered trademark) (Global System of Mobile communications), WiMAX (registered trademark), LTE (registered trademark) (Long Term Evolution) or LTE-A (LTE-Advanced), or other wireless communication protocols such as wireless LAN (also called Wi-Fi (registered trademark)) and Bluetooth (registered trademark).
  • GSM Global System of Mobile communications
  • WiMAX registered trademark
  • LTE registered trademark
  • LTE-A Long Term Evolution
  • Bluetooth registered trademark
  • the general-purpose communication I/F 7620 may connect to devices (e.g., application servers or control servers) present on an external network (e.g., the Internet, a cloud network, or an operator-specific network) via, for example, a base station or an access point.
  • the general-purpose communication I/F 7620 may connect to a terminal located near the vehicle (e.g., a driver's, pedestrian's, or store's terminal, or an MTC (Machine Type Communication) terminal) using, for example, P2P (Peer To Peer) technology.
  • P2P Peer To Peer
  • the dedicated communication I/F 7630 is a communication I/F that supports a communication protocol developed for use in a vehicle.
  • the dedicated communication I/F 7630 may implement a standard protocol such as WAVE (Wireless Access in Vehicle Environment), DSRC (Dedicated Short Range Communications), or a cellular communication protocol, which is a combination of the lower layer IEEE 802.11p and the higher layer IEEE 1609.
  • the dedicated communication I/F 7630 typically performs V2X communication, which is a concept that includes one or more of vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.
  • the positioning unit 7640 performs positioning by receiving, for example, GNSS signals from GNSS (Global Navigation Satellite System) satellites (for example, GPS signals from GPS (Global Positioning System) satellites), and generates position information including the latitude, longitude, and altitude of the vehicle.
  • GNSS Global Navigation Satellite System
  • GPS Global Positioning System
  • the positioning unit 7640 may determine the current position by exchanging signals with a wireless access point, or may obtain position information from a terminal such as a mobile phone, PHS, or smartphone that has a positioning function.
  • the beacon receiver 7650 receives, for example, radio waves or electromagnetic waves transmitted from radio stations installed on the road, and acquires information such as the current location, congestion, road closures, and travel time.
  • the functions of the beacon receiver 7650 may be included in the dedicated communication I/F 7630 described above.
  • the in-vehicle device I/F 7660 is a communication interface that mediates the connection between the microcomputer 7610 and various in-vehicle devices 7760 present in the vehicle.
  • the in-vehicle device I/F 7660 may establish a wireless connection using a wireless communication protocol such as wireless LAN, Bluetooth (registered trademark), NFC (Near Field Communication), or WUSB (Wireless USB).
  • the in-vehicle device I/F 7660 may also establish a wired connection such as USB (Universal Serial Bus), HDMI (High-Definition Multimedia Interface), or MHL (Mobile High-definition Link) via a connection terminal (and a cable, if necessary) not shown.
  • USB Universal Serial Bus
  • HDMI High-Definition Multimedia Interface
  • MHL Mobile High-definition Link
  • the in-vehicle device 7760 may include, for example, at least one of a mobile device or wearable device owned by a passenger, or an information device carried into or attached to the vehicle.
  • the in-vehicle device 7760 may also include a navigation device that searches for a route to an arbitrary destination.
  • the in-vehicle device I/F 7660 exchanges control signals or data signals with these in-vehicle devices 7760.
  • the in-vehicle network I/F 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010.
  • the in-vehicle network I/F 7680 transmits and receives signals in accordance with a specific protocol supported by the communication network 7010.
  • the microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 according to various programs based on information acquired through at least one of the general-purpose communication I/F 7620, the dedicated communication I/F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I/F 7660, and the in-vehicle network I/F 7680.
  • the microcomputer 7610 may calculate the control target value of the driving force generating device, the steering mechanism, or the braking device based on the acquired information inside and outside the vehicle, and output a control command to the drive system control unit 7100.
  • the microcomputer 7610 may perform cooperative control for the purpose of realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.
  • ADAS Advanced Driver Assistance System
  • the microcomputer 7610 may control the driving force generating device, steering mechanism, braking device, etc. based on the acquired information about the surroundings of the vehicle, thereby performing cooperative control for the purpose of automatic driving, which allows the vehicle to travel autonomously without relying on the driver's operation.
  • the microcomputer 7610 may generate three-dimensional distance information between the vehicle and objects such as surrounding structures and people based on information acquired via at least one of the general-purpose communication I/F 7620, the dedicated communication I/F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle equipment I/F 7660, and the in-vehicle network I/F 7680, and may create local map information including information about the surroundings of the vehicle's current position.
  • the microcomputer 7610 may also predict dangers such as vehicle collisions, the approach of pedestrians, or entry into closed roads based on the acquired information, and generate warning signals.
  • the warning signals may be, for example, signals for generating warning sounds or turning on warning lights.
  • the audio/image output unit 7670 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information.
  • an audio speaker 7710, a display unit 7720, and an instrument panel 7730 are illustrated as output devices.
  • the display unit 7720 may include, for example, at least one of an on-board display and a head-up display.
  • the display unit 7720 may have an AR (Augmented Reality) display function.
  • the output device may be other devices such as headphones, a wearable device such as a glasses-type display worn by the passenger, a projector, or a lamp, in addition to these devices.
  • the output device When the output device is a display device, the display device visually displays the results obtained by various processes performed by the microcomputer 7610 or information received from other control units in various formats such as text, images, tables, graphs, etc.
  • the output device is an audio output device, the audio output device converts an audio signal consisting of reproduced audio data or acoustic data into an analog signal and audibly outputs it.
  • At least two control units connected via the communication network 7010 may be integrated into one control unit.
  • each control unit may be composed of multiple control units.
  • the vehicle control system 7000 may include another control unit not shown.
  • some or all of the functions performed by any control unit may be provided by another control unit.
  • a specified calculation process may be performed by any control unit.
  • a sensor or device connected to any control unit may be connected to another control unit, and multiple control units may transmit and receive detection information to each other via the communication network 7010.
  • a computer program for implementing each function of the event processing unit 3 and application unit 4 according to this embodiment described with reference to FIG. 1 can be implemented in any of the control units, etc.
  • a computer-readable recording medium on which such a computer program is stored can also be provided.
  • the recording medium is, for example, a magnetic disk, an optical disk, a magneto-optical disk, a flash memory, etc.
  • the above computer program may be distributed, for example, via a network, without using a recording medium.
  • the present technology can be configured as follows. (1) A pixel having a light detection element that detects an event based on a change in the amount of incident light; a pixel data generating unit configured to generate pixel data including information on the event detected in each of a plurality of unit periods; Information processing device. (2) the pixel data has a pixel value corresponding to a detection time and a detection frequency of the event; An information processing device as described in (1). (3) the pixel data has a larger pixel value as the event is detected more recently and as the event is detected more frequently; An information processing device as described in (2). (4) The pixel data has a number of gradations or a luminance corresponding to the number of the plurality of unit periods. An information processing device according to (2) or (3).
  • the pixel data is bit string data having a plurality of bits, information of the events in the unit period that are older than the first bit is arranged from the most significant bit side to the least significant bit side of the bit string data; An information processing device according to any one of (1) to (4). (6)
  • the event information is represented by one or more bits for each unit period.
  • the pixel data includes information representing a polarity of the event for each unit period.
  • the plurality of unit periods have the same time width.
  • the plurality of unit periods have a longer time width as the unit periods are older.
  • An information processing device according to any one of (1) to (7).
  • Two pieces of frame data adjacent to each other in the time axis direction include information of the events occurring within an overlapping time range.
  • (12) The overlapping time ranges have a length that is an integer multiple of the unit period.
  • (13) The pixel data generation unit associates each bit of the pixel data with a different one of the divided frame data, and generates a corresponding bit value of the pixel data based on information of the event of a corresponding pixel in the corresponding divided frame data.
  • An information processing device according to any one of (10) to (12).
  • the pixel data generation unit generates a bit value on a higher-order bit side of the pixel data based on information of the event of a corresponding pixel in newer divided frame data.
  • An information processing device according to (13).
  • the divided frame generation unit divides the frame data into the plurality of divided frame data of the unit period having the same time length.
  • An information processing device according to any one of (10) to (14).
  • the divided frame generation unit divides the frame data into the plurality of divided frame data of the unit periods each having a different time length.
  • the divided frame generation unit shortens the time length of the divided frame data as the time becomes newer.
  • An information processing device according to (16).
  • a frame image generating unit that generates a frame image based on a plurality of the pixel data corresponding to the plurality of pixels.
  • An information processing device according to any one of (10) to (17).
  • the frame image generating unit generates the frame images such that each pixel has a gradation corresponding to a detection time and a detection frequency of the event, and two frame images adjacent to each other in a time axis direction contain information of the event within an overlapping time range.
  • An information processing device according to (18).
  • a learning unit that performs a learning process to update weights of a neural network used for predetermined information processing including at least one of object tracking, object recognition, and object motion prediction, based on the frame images; and an information processing unit that performs the predetermined information processing based on the neural network that has performed the learning process and the frame images,
  • An information processing device according to (18) or (19).

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Abstract

[Problem] To enable visualization of the occurrence time and occurrence frequency of an event, in a format that is easy for people to understand. [Solution] Provided is an information processing device comprising: a pixel having a light detection element for detecting an event on the basis of the amount of change in the quantity of incident light; and a pixel data generation unit for generating pixel data including information about the event detected during each of a plurality of unit periods of time.

Description

情報処理装置Information processing device
 本開示は、情報処理装置に関する。 This disclosure relates to an information processing device.
 撮像シーンの中で、輝度変化などの何らかのイベントが発生した光電変換素子のイベント情報を高速に取得するEVS(Event-based Vision Sensor)が提案されている。このEVSは、例えば被写体の移動などで生じる光の輝度変化を、イベントとして検出する動作を行う。 An event-based vision sensor (EVS) has been proposed that quickly acquires event information from photoelectric conversion elements when some event, such as a change in brightness, occurs in the imaging scene. This EVS detects changes in light brightness caused by, for example, the movement of a subject, as events.
 検出されたイベントをフレーム単位で画像化することにより、人間が理解しやすい形式に可視化する手法が知られている。フレームによる可視化では、タイムスライスと呼ばれる一定期間内に発生したイベントを含むフレーム画像を生成する。タイムスライスが長いと、人間が理解しやすいフレーム画像が得られるが、同一画素で複数回にわたって発生したイベント情報が圧縮されてしまい、EVSの高速性の利点が損なわれる。逆に、タイムスライスが短いと、高速性の利点は生かせるが、人間に理解しにくいフレーム画像が得られる。そこで、タイムスライスをオーバラップさせて、EVSの高速性を保ちながら、視認性を向上させたフレーム画像を生成する手法が提案されている(例えば、非特許文献1参照)。 A method is known that visualizes detected events in a format that is easy for humans to understand by imaging them on a frame-by-frame basis. In frame visualization, frame images are generated that contain events that occur within a certain period of time, called a time slice. If the time slice is long, a frame image that is easy for humans to understand is obtained, but the event information that occurs multiple times in the same pixel is compressed, compromising the advantage of the high speed of EVS. Conversely, if the time slice is short, the advantage of high speed is retained, but a frame image that is difficult for humans to understand is obtained. Therefore, a method has been proposed that overlaps time slices to generate frame images with improved visibility while maintaining the high speed of EVS (see, for example, non-patent document 1).
 しかしながら、非特許文献1の手法では、フレーム画像内の各イベントの発生時刻及び発生頻度を把握できない。このため、複数のイベントのうち、どれが新しくて、どれが古いのかを判別できない。また、タイムスライス内の同じ画素位置でイベントが頻発しているのか否かを判別できない。 However, the technique in Non-Patent Document 1 cannot grasp the occurrence time and frequency of each event in a frame image. As a result, it is not possible to determine which of multiple events is new and which is old. In addition, it is not possible to determine whether events occur frequently at the same pixel position within a time slice.
 本技術はこのような状況に鑑みて生み出されたものであり、イベントの発生時刻と発生頻度を人間が理解しやすい形式で可視化できる情報処理装置を提供するものである。 This technology was developed in light of these circumstances, and provides an information processing device that can visualize the time and frequency of events in a format that is easy for humans to understand.
 上記の課題を解決するために、本開示によれば、入射光の光量の変化量に基づくイベントを検出する光検出素子を有する画素と、
 複数の単位期間のそれぞれで検出された前記イベントの情報を含む画素データを生成する画素データ生成部と、を備える、
 情報処理装置が提供される。
In order to solve the above problems, according to the present disclosure, a pixel having a light detection element that detects an event based on a change in the amount of light of incident light;
a pixel data generating unit configured to generate pixel data including information on the event detected in each of a plurality of unit periods;
An information processing device is provided.
 前記画素データは、前記イベントの検出時期及び検出頻度に応じた画素値を有してもよい。 The pixel data may have a pixel value that corresponds to the detection time and detection frequency of the event.
 前記画素データは、前記イベントの検出時期が新しいほど、及び前記イベントの検出頻度が多いほど、より大きな画素値を有してもよい。 The pixel data may have a larger pixel value the more recently the event was detected and the more frequently the event was detected.
 前記画素データは、前記複数の単位期間の数に応じた階調数又は輝度を有してもよい。 The pixel data may have a number of gradations or brightness according to the number of the plurality of unit periods.
 前記画素データは、複数ビットのビット列データであり、
 前記ビット列データの上位ビット側から下位ビット側に向かって、より古い前記単位期間の前記イベントの情報が配置されてもよい。
the pixel data is a bit string data of a plurality of bits,
Information about the events in the unit period that are older may be arranged from the most significant bit side to the least significant bit side of the bit string data.
 前記イベントの情報は、前記単位期間ごとに1ビット以上で表されてもよい。 The event information may be represented by one or more bits for each unit period.
 前記画素データは、前記単位期間ごとに、前記イベントの極性を表す情報を含んでもよい。 The pixel data may include information representing the polarity of the event for each unit period.
 前記複数の単位期間は同一の時間幅を有してもよい。 The multiple unit periods may have the same time duration.
 前記複数の単位期間は、古い時間ほどより長い時間幅を有してもよい。 The multiple unit periods may have a longer time span the older the time.
 一次元又は二次元方向に配列された複数の前記画素と、
 前記複数の画素を含むフレーム単位で、所定の期間内に発生された前記イベントの情報を含むフレームデータを生成するフレーム生成部と、
 前記フレームデータを時間軸方向に複数に分割して複数の分割フレームデータを生成する分割フレーム生成部と、を備え、
 前記画素データ生成部は、前記複数の画素のそれぞれごとに、前記複数の分割フレームデータのそれぞれに含まれる、対応する画素の前記イベントの情報に基づいて前記画素データを生成してもよい。
A plurality of the pixels arranged in a one-dimensional or two-dimensional direction;
a frame generation unit that generates frame data including information on the event that has occurred within a predetermined period, for each frame including the plurality of pixels;
a divided frame generating unit that divides the frame data into a plurality of pieces in a time axis direction to generate a plurality of divided frame data,
The pixel data generating section may generate the pixel data for each of the plurality of pixels based on information of the event of the corresponding pixel, the information being included in each of the plurality of divided frame data.
 時間軸方向に隣り合う2つの前記フレームデータ同士は、重複する時間範囲内に発生された前記イベントの情報を含んでもよい。 Two adjacent frames of data in the time axis direction may contain information about events that occurred within overlapping time ranges.
 前記重複する時間範囲は、前記単位期間の整数倍の長さを有してもよい。 The overlapping time ranges may have a length that is an integer multiple of the unit period.
 前記画素データ生成部は、前記画素データの各ビットを、それぞれ異なる前記分割フレームデータに対応づけて、対応する前記分割フレームデータ内の対応する画素の前記イベントの情報に基づいて前記画素データの対応するビット値を生成してもよい。 The pixel data generating unit may correspond each bit of the pixel data to a different one of the divided frame data, and generate a corresponding bit value of the pixel data based on the event information of the corresponding pixel in the corresponding divided frame data.
 前記画素データ生成部は、前記画素データの上位ビット側のビット値を、より新しい前記分割フレームデータ内の対応する画素の前記イベントの情報に基づいて生成してもよい。 The pixel data generating unit may generate the bit value of the most significant bit of the pixel data based on the event information of the corresponding pixel in the newer divided frame data.
 前記分割フレーム生成部は、前記フレームデータを同一の時間長さの前記単位期間の前記複数の分割フレームデータに分割してもよい。 The split frame generation unit may split the frame data into the plurality of split frame data of the unit period having the same time length.
 前記分割フレーム生成部は、前記フレームデータをそれぞれ異なる時間長さの前記単位期間の前記複数の分割フレームデータに分割してもよい。 The split frame generation unit may split the frame data into a plurality of split frame data each having a different time length for the unit period.
 前記分割フレーム生成部は、より新しい時間ほど、前記分割フレームデータの時間長さをより短くしてもよい。 The split frame generation unit may shorten the time length of the split frame data for newer times.
 前記複数の画素に対応する複数の前記画素データに基づいてフレーム画像を生成するフレーム画像生成部を備えてもよい。 The image processing device may further include a frame image generating unit that generates a frame image based on the pixel data corresponding to the pixels.
 前記フレーム画像生成部は、画素ごとに、前記イベントの検出時刻及び検出頻度に応じた階調を有し、かつ、時間軸方向に隣り合う2つの前記フレーム画像に、重複する時間範囲内の前記イベントの情報が含まれるように前記フレーム画像を生成してもよい。 The frame image generating unit may generate the frame images such that each pixel has a gradation corresponding to the detection time and detection frequency of the event, and two adjacent frame images in the time axis direction contain information about the event within an overlapping time range.
 前記フレーム画像に基づいて、物体の追跡、認識、又は動作予測の少なくとも一つの処理を含む所定の情報処理に用いられるニューラルネットワークの重みを更新する学習処理を行う学習部と、
 前記学習処理を行った前記ニューラルネットワークと、前記フレーム画像とに基づいて、前記所定の情報処理を行う情報処理部と、を備えてもよい。
a learning unit that performs a learning process to update weights of a neural network used for predetermined information processing including at least one of object tracking, object recognition, and object motion prediction, based on the frame images;
The image processing device may further include an information processing unit that performs the predetermined information processing based on the neural network that has performed the learning process and the frame images.
本開示の第1の実施形態における情報処理装置の一構成例を示すブロック図である。1 is a block diagram showing a configuration example of an information processing device according to a first embodiment of the present disclosure. センサの一構成例を示すブロック図である。FIG. 2 is a block diagram showing a configuration example of a sensor. 画素の第1例を示す回路図である。FIG. 2 is a circuit diagram illustrating a first example of a pixel. 画素の第2例を示す回路図である。FIG. 11 is a circuit diagram illustrating a second example of a pixel. センサの積層構造の第1例を示す図である。FIG. 2 is a diagram showing a first example of a laminated structure of a sensor. センサの積層構造の第2例を示す図である。FIG. 13 is a diagram showing a second example of a laminated structure of the sensor. 情報処理装置におけるイベント可視化のフローチャートである。13 is a flowchart of event visualization in an information processing device. フレーム化処理について説明する図である。FIG. 11 is a diagram illustrating a framing process. 一比較例における画像生成処理を示す図である。FIG. 11 is a diagram illustrating an image generation process in a comparative example. 本開示における画像生成処理を示す図である。FIG. 2 is a diagram illustrating an image generation process according to the present disclosure. 本開示の第1の実施形態における画像生成部の詳細な構成を示すブロック図である。3 is a block diagram showing a detailed configuration of an image generating unit according to the first embodiment of the present disclosure. FIG. 本開示の第1の実施形態における画像生成のフローチャートである。4 is a flowchart of image generation according to the first embodiment of the present disclosure. 本開示の第1の実施形態におけるフレームデータの分割を示す模式図である。FIG. 2 is a schematic diagram showing division of frame data in the first embodiment of the present disclosure. 画素データの生成を示す図である。FIG. 2 is a diagram illustrating generation of pixel data. 本開示の第1の実施形態におけるフレームデータと画素データとの対応関係を示す図である。4 is a diagram showing a correspondence relationship between frame data and pixel data in the first embodiment of the present disclosure. FIG. 本開示の第1の実施形態における画像データの出力を示す図である。FIG. 4 is a diagram showing an output of image data in the first embodiment of the present disclosure. 時間軸方向に隣り合う2つのフレームデータに基づいて生成される2つの画素データを示す図である。FIG. 2 is a diagram showing two pieces of pixel data generated based on two frame data adjacent in the time axis direction. 本開示の第2の実施形態におけるフレームデータの分割を示す模式図である。FIG. 11 is a schematic diagram showing division of frame data in a second embodiment of the present disclosure. 本開示の第2の実施形態におけるフレームデータと画素データとの対応関係を示す図である。FIG. 11 is a diagram showing the correspondence between frame data and pixel data in the second embodiment of the present disclosure. 本開示の第3の実施形態における画像生成部の詳細な構成を示すブロック図である。FIG. 13 is a block diagram showing a detailed configuration of an image generating unit according to a third embodiment of the present disclosure. 本開示の第3の実施形態における画像生成のフローチャートである。13 is a flowchart of image generation according to a third embodiment of the present disclosure. 本開示の第4の実施形態における情報処理装置の構成を示すブロック図である。FIG. 13 is a block diagram showing a configuration of an information processing device according to a fourth embodiment of the present disclosure. 情報処理部による情報処理の例を示す模式図であるFIG. 1 is a schematic diagram showing an example of information processing by an information processing unit; 車両制御システムの概略的な構成の一例を示すブロック図である。1 is a block diagram showing an example of a schematic configuration of a vehicle control system; 車外情報検出部及び撮像部の設置位置の一例を示す説明図である。4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG.
 以下、図面を参照して、情報処理装置の実施形態について説明する。以下では、情報処理装置の主要な構成部分を中心に説明するが、情報処理装置には、図示又は説明されていない構成部分や機能が存在しうる。以下の説明は、図示又は説明されていない構成部分や機能を除外するものではない。 Below, an embodiment of an information processing device will be described with reference to the drawings. The following description will focus on the main components of the information processing device, but the information processing device may have components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.
 (第1の実施形態)
 図1は、本開示の第1の実施形態における情報処理装置1の一構成例を示すブロック図である。情報処理装置1は、任意の被写体の動き及び輝度変化を検出するものである。情報処理装置1は、例えば産業用ロボット等の据置型装置とスマートフォン等の携帯機器のいずれにも適用可能である。図1の情報処理装置1は、センサ2、イベント処理部3、及びアプリケーション部4を備える。
First Embodiment
Fig. 1 is a block diagram showing an example of a configuration of an information processing device 1 according to a first embodiment of the present disclosure. The information processing device 1 detects the movement and brightness change of an arbitrary subject. The information processing device 1 can be applied to both a stationary device such as an industrial robot and a portable device such as a smartphone. The information processing device 1 in Fig. 1 includes a sensor 2, an event processing unit 3, and an application unit 4.
 センサ2は、被写体の移動又は輝度変化を検出する機能を有する。センサ2は、例えばEVS(Event-based Vision Sensor)である。センサ2は、入射光の光量の変化量に基づくイベントを検出する。センサ2が検出するイベントは、例えばMIPI(Mobile Industry Processor Interface)を介して、イベント処理部3に供給される。 The sensor 2 has the function of detecting the movement or brightness change of a subject. The sensor 2 is, for example, an event-based vision sensor (EVS). The sensor 2 detects events based on the amount of change in the amount of incident light. The events detected by the sensor 2 are supplied to the event processing unit 3, for example, via MIPI (Mobile Industry Processor Interface).
 イベント処理部3は、複数の画素を含むフレーム単位で、所定の期間内に発生されたイベントの情報(以下、イベント情報)を含むフレームデータを生成する。イベント処理部3は、例えばFPGA(Field Programmable Gate Array)で構成される。イベント処理部3は、イベント取得部11、デコード部12及びフレーム生成部13を備えている。 The event processing unit 3 generates frame data including information on events that have occurred within a predetermined period (hereinafter, event information) in units of frames each including a plurality of pixels. The event processing unit 3 is configured, for example, with an FPGA (Field Programmable Gate Array). The event processing unit 3 includes an event acquisition unit 11, a decoding unit 12, and a frame generation unit 13.
 イベント取得部11は、センサ2から同期又は非同期に出力されるイベント情報を取得する。イベント処理部3は、センサ2から取得されたイベント情報をイベント蓄積部14にいったん蓄積してもよい。 The event acquisition unit 11 acquires event information output synchronously or asynchronously from the sensor 2. The event processing unit 3 may temporarily store the event information acquired from the sensor 2 in the event storage unit 14.
 デコード部12は、イベント取得部11で取得されたイベント情報をデコードする。センサ2から出力されるイベント情報は、イベントの発生時刻と極性などの情報を含む圧縮データである。デコード部12は、イベント取得部11で取得されたイベント情報を解凍して、イベントの発生時刻と極性などの情報を含むイベントデータを生成する。デコード部12でデコードされたイベントデータは、フレーム生成部13に供給される。 The decoding unit 12 decodes the event information acquired by the event acquisition unit 11. The event information output from the sensor 2 is compressed data including information such as the time of event occurrence and polarity. The decoding unit 12 decompresses the event information acquired by the event acquisition unit 11 to generate event data including information such as the time of event occurrence and polarity. The event data decoded by the decoding unit 12 is supplied to the frame generation unit 13.
 フレーム生成部13は上述したように、所定の期間内に発生されたイベントデータを含むフレームデータを生成する。本明細書では、所定の期間をタイムスライスと呼ぶことがある。フレーム生成部13は、例えばUSB(Universal Serial Bus)を介して、フレームデータをアプリケーション部4に供給する。 As described above, the frame generation unit 13 generates frame data including event data generated within a predetermined period. In this specification, the predetermined period is sometimes referred to as a time slice. The frame generation unit 13 supplies the frame data to the application unit 4, for example, via a USB (Universal Serial Bus).
 アプリケーション部4は、フレーム単位で画像データを生成するものであり、例えばFPGAで構成される。また、イベント処理部3及びアプリケーション部4を、1つの半導体チップで構成してもよい。また、センサ2、イベント処理部3、及びアプリケーション部4を一つの半導体チップで構成してもよい。 The application unit 4 generates image data on a frame-by-frame basis, and is configured, for example, by an FPGA. The event processing unit 3 and application unit 4 may also be configured on a single semiconductor chip. The sensor 2, event processing unit 3, and application unit 4 may also be configured on a single semiconductor chip.
 アプリケーション部4は、画像生成部15を備える。画像生成部15は、フレーム生成部13から供給されるフレームデータに基づき、フレーム単位で画像データを生成する。画像生成部15で生成された画像データは、例えば表示部5にフレーム画像を表示するために用いられる。あるいは、アプリケーション部4で生成された画像データは、後述するように、物体の追跡、認識、又は動作予測などの処理に使用されてもよい。 The application unit 4 includes an image generation unit 15. The image generation unit 15 generates image data on a frame-by-frame basis based on the frame data supplied from the frame generation unit 13. The image data generated by the image generation unit 15 is used, for example, to display a frame image on the display unit 5. Alternatively, the image data generated by the application unit 4 may be used for processing such as object tracking, recognition, or motion prediction, as described below.
 図2は、センサ2の一構成例を示すブロック図である。センサ2は、画素アレイ部21、垂直駆動部22、及び信号処理部23を備える。 FIG. 2 is a block diagram showing an example of the configuration of the sensor 2. The sensor 2 includes a pixel array section 21, a vertical drive section 22, and a signal processing section 23.
 画素アレイ部21は、1次元配列、又は行列状に2次元配列した、複数の画素30を備えている。本明細書では、複数の画素30が2次元配列されている例を説明する。また、図2の水平方向を行方向X、垂直方向を列方向Yと呼ぶ。図2において、画素30は行方向Xと列方向Yとに複数配列されている。 The pixel array section 21 includes a plurality of pixels 30 arranged one-dimensionally or two-dimensionally in a matrix. In this specification, an example in which a plurality of pixels 30 are arranged two-dimensionally will be described. The horizontal direction in FIG. 2 is called the row direction X, and the vertical direction is called the column direction Y. In FIG. 2, a plurality of pixels 30 are arranged in the row direction X and the column direction Y.
 イベントの検出は、複数の画素30でそれぞれ行われる。画素30は、光電変換素子31と画素回路32を有する。光電変換素子31は、被写体光を受光して、受光量に応じた電荷を生成する。生成された電荷は、画素回路32によりイベントとして検出される。 Event detection is performed by each of the multiple pixels 30. The pixels 30 have a photoelectric conversion element 31 and a pixel circuit 32. The photoelectric conversion element 31 receives subject light and generates an electric charge according to the amount of light received. The generated electric charge is detected as an event by the pixel circuit 32.
 垂直駆動部22は、列方向Yに配置される複数の画素を駆動するか否かを制御する複数の垂直駆動信号を生成する。垂直駆動部22は、列方向Yの任意の範囲の画素ブロックを選択して、選択した画素ブロック内の画素を順に駆動できる。 The vertical drive unit 22 generates multiple vertical drive signals that control whether or not to drive multiple pixels arranged in the column direction Y. The vertical drive unit 22 can select a pixel block in any range in the column direction Y and sequentially drive the pixels in the selected pixel block.
 また、センサ2は、行方向Xに配置される複数の画素を駆動するか否かを制御する水平駆動部を備えてもよい。 The sensor 2 may also include a horizontal drive unit that controls whether or not to drive a plurality of pixels arranged in the row direction X.
 信号処理部23は、各画素30から検出されるイベントに対して、所定の信号処理を実行する。信号処理後のイベントは、不図示の出力回路等を介して、順次、後段のイベント処理部3等に出力される。 The signal processing unit 23 performs a predetermined signal processing on the events detected from each pixel 30. The events after the signal processing are sequentially output to the downstream event processing unit 3 etc. via an output circuit etc. (not shown).
 図3Aは、画素30の第1例を示す回路図である。画素30は、光電変換素子31及び画素回路32を備える。画素回路32は、転送トランジスタTRG、電荷電圧変換部33、バッファ34、微分回路35及び量子化器36を備える。電荷電圧変換部33、光電変換素子31及び転送トランジスタTRGは、対数応答部37を構成する。 FIG. 3A is a circuit diagram showing a first example of a pixel 30. The pixel 30 includes a photoelectric conversion element 31 and a pixel circuit 32. The pixel circuit 32 includes a transfer transistor TRG, a charge-voltage conversion unit 33, a buffer 34, a differentiation circuit 35, and a quantizer 36. The charge-voltage conversion unit 33, the photoelectric conversion element 31, and the transfer transistor TRG constitute a logarithmic response unit 37.
 対数応答部37は、光電変換素子31で光電変換された電荷を、対数変換して電圧信号Vlogを生成する。対数変換する理由は、輝度情報を取得する画素30のダイナミックレンジを広げるためである。 The logarithmic response unit 37 performs logarithmic conversion on the charge photoelectrically converted by the photoelectric conversion element 31 to generate a voltage signal Vlog. The reason for the logarithmic conversion is to expand the dynamic range of the pixel 30 that acquires the luminance information.
 光電変換素子31は、対応する画素30に入射される入射光に基づく電荷(光電荷)を蓄積する。光電変換素子31としては、例えばフォトダイオードが用いられる。光電変換素子31はアノード及びカソードを有する。アノード又はカソードのいずれか一方(例えば、カソード)は転送トランジスタTRGのソースに接続され、他方(例えば、アノード)は、接地電圧等の所定の基準電圧ノードに接続される。 The photoelectric conversion element 31 accumulates electric charges (photocharges) based on incident light that is incident on the corresponding pixel 30. For example, a photodiode is used as the photoelectric conversion element 31. The photoelectric conversion element 31 has an anode and a cathode. Either the anode or the cathode (for example, the cathode) is connected to the source of the transfer transistor TRG, and the other (for example, the anode) is connected to a predetermined reference voltage node such as a ground voltage.
 転送トランジスタTRGは、光電荷の転送をスイッチングするために用いられる。転送トランジスタTRGは、転送トランジスタTRGはゲートに、例えばハイレベルの転送信号を印加されることでオンする。転送トランジスタTRGのドレインは、電荷電圧変換部33の入力ノードn1に接続されている。 The transfer transistor TRG is used to switch the transfer of photocharges. The transfer transistor TRG is turned on when, for example, a high-level transfer signal is applied to the gate of the transfer transistor TRG. The drain of the transfer transistor TRG is connected to the input node n1 of the charge-voltage conversion unit 33.
 電荷電圧変換部33は、光電変換素子31に蓄積された電荷を電圧に変換する。電荷電圧変換部33は、トランジスタQ1~Q5を備える。トランジスタQ1~Q4には、例えばNMOS(N channel Metal-Oxide-Semiconductor)トランジスタが用いられる。トランジスタQ5には、例えばPMOS(P channel Metal-Oxide-Semiconductor)トランジスタが用いられる。 The charge-voltage conversion unit 33 converts the charge stored in the photoelectric conversion element 31 into a voltage. The charge-voltage conversion unit 33 includes transistors Q1 to Q5. For example, NMOS (N-channel Metal-Oxide-Semiconductor) transistors are used for the transistors Q1 to Q4. For example, a PMOS (P-channel Metal-Oxide-Semiconductor) transistor is used for the transistor Q5.
 トランジスタQ1及びQ2は、電源電圧ノードと転送トランジスタTRGとの間にカスコード接続されている。トランジスタQ1のソースは、転送トランジスタTRGのドレインと、トランジスタQ3のゲートに接続されている。トランジスタQ1のゲートはトランジスタQ3のドレインと、トランジスタQ4のソースに接続されている。トランジスタQ1のドレインはトランジスタQ2のソースと、トランジスタQ4のゲートに接続されている。トランジスタQ2のドレインは電源電圧ノードに接続されている。トランジスタQ2のゲートは電荷電圧変換部33の出力ノードn2と、トランジスタQ4のドレインと、トランジスタQ5のドレインに接続されている。 Transistors Q1 and Q2 are cascode-connected between the power supply voltage node and the transfer transistor TRG. The source of transistor Q1 is connected to the drain of the transfer transistor TRG and the gate of transistor Q3. The gate of transistor Q1 is connected to the drain of transistor Q3 and the source of transistor Q4. The drain of transistor Q1 is connected to the source of transistor Q2 and the gate of transistor Q4. The drain of transistor Q2 is connected to the power supply voltage node. The gate of transistor Q2 is connected to the output node n2 of the charge-voltage conversion unit 33, the drain of transistor Q4, and the drain of transistor Q5.
 トランジスタQ3及びトランジスタQ4は、ノードn2と基準電圧(接地)ノードとの間にカスコード接続されている。トランジスタQ3のソースは基準電圧(接地)ノードに接続されている。トランジスタQ4は、トランジスタQ3とトランジスタQ5の間に配置されている。 Transistor Q3 and transistor Q4 are cascode-connected between node n2 and the reference voltage (ground) node. The source of transistor Q3 is connected to the reference voltage (ground) node. Transistor Q4 is disposed between transistor Q3 and transistor Q5.
 トランジスタQ5のソースは電源電圧ノードに接続され、ゲートにはバイアス電圧Vblogが印加される。トランジスタQ5は、バイアス電圧Vblogの電圧レベルによって、出力ノードn2の電圧レベルを調整する。 The source of transistor Q5 is connected to the power supply voltage node, and a bias voltage Vblog is applied to its gate. Transistor Q5 adjusts the voltage level of output node n2 according to the voltage level of bias voltage Vblog.
 電荷電圧変換部33が対数変換した電圧信号Vlogは、バッファ34に入力される。バッファ34は、電源電圧ノードと基準電圧(接地)ノードの間にカスコード接続される、トランジスタQ6及びトランジスタQ7を備える。トランジスタQ6には、例えばPMOSトランジスタが用いられる。トランジスタQ7には、例えばNMOSトランジスタが用いられる。 The voltage signal Vlog logarithmically converted by the charge-voltage converter 33 is input to the buffer 34. The buffer 34 includes a transistor Q6 and a transistor Q7 that are cascode-connected between a power supply voltage node and a reference voltage (ground) node. A PMOS transistor, for example, is used as the transistor Q6. An NMOS transistor, for example, is used as the transistor Q7.
 バッファ34内のトランジスタQ6は、ソースフォロワ回路を構成する。電荷電圧変換部33から出力された電圧信号Vlogに応じた画素電圧Vsfが、バッファ34から出力される。トランジスタQ6のゲートには、電荷電圧変換部33の出力ノードn2から、電圧信号Vlogが入力される。トランジスタQ6のソースは、電源電圧ノードに接続されている。トランジスタQ6のドレインはバッファ34の出力ノードn3を介し、トランジスタQ7のドレイン及び微分回路35に接続されている。 Transistor Q6 in buffer 34 forms a source follower circuit. A pixel voltage Vsf corresponding to the voltage signal Vlog output from charge-voltage conversion unit 33 is output from buffer 34. The voltage signal Vlog is input to the gate of transistor Q6 from output node n2 of charge-voltage conversion unit 33. The source of transistor Q6 is connected to the power supply voltage node. The drain of transistor Q6 is connected to the drain of transistor Q7 and differentiation circuit 35 via output node n3 of buffer 34.
 トランジスタQ7のソースは基準電圧(接地)ノードに接続されている。トランジスタQ7のゲートにはバイアス電圧Vbsfが印加される。トランジスタQ7は、バイアス電圧Vbsfの電圧レベルに応じて、出力ノードn3の電圧レベルを調整する。 The source of transistor Q7 is connected to the reference voltage (ground) node. A bias voltage Vbsf is applied to the gate of transistor Q7. Transistor Q7 adjusts the voltage level of output node n3 according to the voltage level of bias voltage Vbsf.
 バッファ34から出力された画素電圧Vsfは、微分回路35に入力される。バッファ34は、画素電圧Vsfの駆動力を向上させることができる。また、バッファ34を設けることで、後段の微分回路35がスイッチング動作を行う際に発生するノイズが電荷電圧変換部33に伝達しないようにするアイソレーションを確保することができる。 The pixel voltage Vsf output from the buffer 34 is input to the differentiation circuit 35. The buffer 34 can improve the driving force of the pixel voltage Vsf. Furthermore, by providing the buffer 34, it is possible to ensure isolation so that noise generated when the downstream differentiation circuit 35 performs a switching operation is not transmitted to the charge-voltage conversion unit 33.
 微分回路35は、電荷電圧変換部33で変換された電圧信号Vlogの変化に応じた微分信号Voutを生成する。微分回路35は、キャパシタC1とトランジスタQ8~Q10を備える。トランジスタQ10には、例えばNMOSトランジスタが用いられ、トランジスタQ8及びQ9には、例えばPMOSトランジスタが用いられる。 The differentiation circuit 35 generates a differentiation signal Vout according to the change in the voltage signal Vlog converted by the charge-voltage converter 33. The differentiation circuit 35 includes a capacitor C1 and transistors Q8 to Q10. For example, an NMOS transistor is used for the transistor Q10, and for example, PMOS transistors are used for the transistors Q8 and Q9.
 キャパシタC1は、トランジスタQ8のソース及びトランジスタQ9のゲートの接続ノードn4と、バッファ34の出力ノードn3の間に配置されている。キャパシタC1は、バッファ34から供給される画素電圧Vsfに基づき、電荷を蓄積する。また、キャパシタC2は、トランジスタQ9のゲート及びトランジスタQ10のドレインの間に配置されている。キャパシタC2は、画素電圧Vsfを時間微分した、画素電圧Vsfの変化量に応じた電荷をトランジスタQ8のソース及びトランジスタQ9のゲートに供給する。 Capacitor C1 is disposed between a connection node n4 of the source of transistor Q8 and the gate of transistor Q9, and an output node n3 of buffer 34. Capacitor C1 accumulates charge based on pixel voltage Vsf supplied from buffer 34. Capacitor C2 is disposed between the gate of transistor Q9 and the drain of transistor Q10. Capacitor C2 supplies charge to the source of transistor Q8 and the gate of transistor Q9 according to the amount of change in pixel voltage Vsf, which is the time derivative of pixel voltage Vsf.
 トランジスタQ8は、オートゼロ信号XAZに従って、トランジスタQ9のゲート及びドレインを短絡するか否かを切り替える。オートゼロ信号XAZは、初期化を指示する信号であり、例えば、画素30から後述のイベント検出信号が出力されるたびにハイレベルからローレベルになる。オートゼロ信号XAZがローレベルになるとき、トランジスタQ8はオンし、微分信号Voutを初期値にするとともに、キャパシタC1の電荷が初期化される。 Transistor Q8 switches whether or not to short the gate and drain of transistor Q9 according to auto-zero signal XAZ. Auto-zero signal XAZ is a signal that indicates initialization, and for example, goes from high level to low level every time an event detection signal described below is output from pixel 30. When auto-zero signal XAZ goes low level, transistor Q8 turns on, the differentiated signal Vout is reset to its initial value, and the charge of capacitor C1 is initialized.
 トランジスタQ10のソースは基準電圧(接地)ノードに接続され、ゲートにはバイアス電圧Vbdiffが印加される。トランジスタQ10は、バイアス電圧Vbdiffの電圧レベルに応じて、微分回路35の出力ノードn5の電圧レベルを調整する。 The source of transistor Q10 is connected to the reference voltage (ground) node, and a bias voltage Vbdiff is applied to its gate. Transistor Q10 adjusts the voltage level of output node n5 of differentiation circuit 35 according to the voltage level of bias voltage Vbdiff.
 トランジスタQ9及びトランジスタQ10は、トランジスタQ9のゲート側の接続ノードn4を入力ノードとし、トランジスタQ9及びトランジスタQ10の接続ノードn5を出力ノードとする反転回路として機能する。 Transistor Q9 and transistor Q10 function as an inverting circuit with connection node n4 on the gate side of transistor Q9 as the input node and connection node n5 of transistor Q9 and transistor Q10 as the output node.
 上述したように、微分回路35は、微分演算により画素電圧Vsfの変化量を検出する。画素電圧Vsfの変化量は、画素30の入射光量の変化量を示す。微分回路35は、出力ノードn5を介して微分信号Voutを量子化器36に供給する。 As described above, the differentiation circuit 35 detects the amount of change in the pixel voltage Vsf by differential calculation. The amount of change in the pixel voltage Vsf indicates the amount of change in the amount of light incident on the pixel 30. The differentiation circuit 35 supplies the differentiation signal Vout to the quantizer 36 via the output node n5.
 量子化器36は、微分信号Voutを閾値電圧と比較する比較動作を行う。量子化器36は、比較動作を行った結果に基づいて、入射光の光量の変化量の絶対値が閾値電圧を超えたことを示すイベントを検出し、イベント検出信号COMP+及びイベント検出信号COMP-を出力する。量子化器36は、トランジスタQ11~Q14とインバータK1を備える。トランジスタQ11及びQ13として、例えばPMOSトランジスタが用いられる。また、トランジスタQ12及びQ14として、例えばNMOSトランジスタが用いられる。 The quantizer 36 performs a comparison operation to compare the differential signal Vout with a threshold voltage. Based on the result of the comparison operation, the quantizer 36 detects an event indicating that the absolute value of the change in the amount of incident light has exceeded the threshold voltage, and outputs an event detection signal COMP+ and an event detection signal COMP-. The quantizer 36 includes transistors Q11 to Q14 and an inverter K1. For example, PMOS transistors are used as the transistors Q11 and Q13. Furthermore, for example, NMOS transistors are used as the transistors Q12 and Q14.
 トランジスタQ11及びQ12は、電源電圧ノードと基準電圧(接地)ノードとの間にカスコード接続されている。トランジスタQ11のソースは電源電圧ノードに接続されている。トランジスタQ11のドレインは、インバータK1及びトランジスタQ12のドレインに接続されている。トランジスタQ12のソースは基準電圧(接地)ノードに接続されている。トランジスタQ11のゲートには、微分回路35の微分信号Voutが印加されている。トランジスタQ12のゲートには閾値電圧Vhighが印加されている。 Transistors Q11 and Q12 are cascode-connected between a power supply voltage node and a reference voltage (ground) node. The source of transistor Q11 is connected to the power supply voltage node. The drain of transistor Q11 is connected to inverter K1 and the drain of transistor Q12. The source of transistor Q12 is connected to the reference voltage (ground) node. A differentiated signal Vout from differentiation circuit 35 is applied to the gate of transistor Q11. A threshold voltage Vhigh is applied to the gate of transistor Q12.
 トランジスタQ11及びQ12は、微分信号Voutと閾値電圧Vhighの比較を行う。具体的には、トランジスタQ11は微分回路35の微分信号Voutが閾値電圧Vhighより低いときにオンして、トランジスタQ11のドレインから、インバータK1を介して出力されるイベント検出信号COMP+はローレベルになる。 Transistors Q11 and Q12 compare the differentiated signal Vout with the threshold voltage Vhigh. Specifically, when the differentiated signal Vout of the differentiation circuit 35 is lower than the threshold voltage Vhigh, the transistor Q11 turns on, and the event detection signal COMP+ output from the drain of the transistor Q11 via the inverter K1 becomes low level.
 トランジスタQ13及びQ14は、電源電圧ノードと基準電圧(接地)ノードとの間にカスコード接続されている。トランジスタQ13のソースは電源電圧ノードに接続されている。トランジスタQ13のドレインは、量子化器36の出力ノード及びトランジスタQ14のドレインに接続されている。トランジスタQ13のゲートには、微分回路35の微分信号Voutが印加されている。トランジスタQ14のゲートには閾値電圧Vlowが印加されている。 Transistors Q13 and Q14 are cascode-connected between the power supply voltage node and the reference voltage (ground) node. The source of transistor Q13 is connected to the power supply voltage node. The drain of transistor Q13 is connected to the output node of quantizer 36 and the drain of transistor Q14. The differentiated signal Vout of differentiation circuit 35 is applied to the gate of transistor Q13. The threshold voltage Vlow is applied to the gate of transistor Q14.
 トランジスタQ13及びQ14は、微分信号Voutと閾値電圧Vlowの比較を行う。具体的には、トランジスタQ13は微分回路35の微分信号Voutが閾値電圧Vlowより高いときにオフして、トランジスタQ13のドレインから出力されるイベント検出信号COMP-はローレベルになる。 Transistors Q13 and Q14 compare the differentiated signal Vout with the threshold voltage Vlow. Specifically, when the differentiated signal Vout of the differentiation circuit 35 is higher than the threshold voltage Vlow, transistor Q13 turns off, and the event detection signal COMP- output from the drain of transistor Q13 becomes low level.
 画素30は、入射光の光量の増加及び減少を、イベントとして検出することができる。画素30に入射する光の光量が増加すると、光電変換素子31による光電荷が生成され、光電変換素子31のカソードと接続されている入力ノードn1の電圧が下がる。入力ノードn1の電圧低下に応じて、電荷電圧変換部33の出力電圧Vlogが低下し、バッファ34の画素電圧Vsfも低下する。画素電圧Vsfの低下量に応じて微分回路35から出力される微分信号Voutが低下し、閾値電圧Vhighを下回るときに、ローレベルのイベント検出信号COMP+が出力される。すなわち、ローレベルのイベント検出信号COMP+は、入射光の光量の増加量が閾値電圧Vhighにより定められる閾値を上回っていることを示している。 The pixel 30 can detect an increase or decrease in the amount of incident light as an event. When the amount of light incident on the pixel 30 increases, a photoelectric charge is generated by the photoelectric conversion element 31, and the voltage of the input node n1 connected to the cathode of the photoelectric conversion element 31 decreases. In response to the decrease in the voltage of the input node n1, the output voltage Vlog of the charge-voltage conversion unit 33 decreases, and the pixel voltage Vsf of the buffer 34 also decreases. The differential signal Vout output from the differentiation circuit 35 decreases in response to the amount of decrease in the pixel voltage Vsf, and when it falls below the threshold voltage Vhigh, a low-level event detection signal COMP+ is output. In other words, a low-level event detection signal COMP+ indicates that the increase in the amount of incident light exceeds the threshold value determined by the threshold voltage Vhigh.
 同様に、画素30に入射する光の光量が減少すると、微分回路35から出力される微分信号Voutが上昇し、閾値電圧Vlowを上回るときに、ローレベルのイベント検出信号COMP-が出力される。すなわち、ローレベルのイベント検出信号COMP-は、入射光の光量の減少量が閾値電圧Vlowにより定められる閾値を下回っていることを示している。 Similarly, when the amount of light incident on pixel 30 decreases, the differential signal Vout output from differentiation circuit 35 increases, and when it exceeds the threshold voltage Vlow, a low-level event detection signal COMP- is output. In other words, a low-level event detection signal COMP- indicates that the amount of decrease in the amount of incident light is below the threshold determined by the threshold voltage Vlow.
 本明細書では、ローレベルのイベント検出信号COMP+又はローレベルのイベント検出信号COMP-のいずれか一方が検出されることを、イベントの検出と呼ぶ。また、イベントは入射光の輝度の正負を示す極性情報を有する。ローレベルのイベント検出信号COMP+が検出される場合は正の極性となり、ローレベルのイベント検出信号COMP-が検出される場合は負の極性となる。 In this specification, the detection of either a low-level event detection signal COMP+ or a low-level event detection signal COMP- is referred to as the detection of an event. An event also has polarity information that indicates whether the luminance of the incident light is positive or negative. When a low-level event detection signal COMP+ is detected, the polarity is positive, and when a low-level event detection signal COMP- is detected, the polarity is negative.
 画素30は、イベント検出信号COMP+とイベント検出信号COMP-の両方を検出する必要はなく、いずれか一方を検出してもよい。図3Bは、画素30の第2例を示す回路図である。図3Bに示す、画素回路32a内の量子化器36aは、トランジスタQ13及びQ14を備えていないという点で、図3Aの量子化器36と異なる。このため、図3Bの画素30a(及び画素回路32a)は、光電変換素子31の入射光の光量の増減のうち、増加のみを検出し、イベント検出信号COMP+を出力する。 The pixel 30 does not need to detect both the event detection signal COMP+ and the event detection signal COMP-, and may detect either one. FIG. 3B is a circuit diagram showing a second example of the pixel 30. The quantizer 36a in the pixel circuit 32a shown in FIG. 3B differs from the quantizer 36 in FIG. 3A in that it does not include transistors Q13 and Q14. Therefore, the pixel 30a (and pixel circuit 32a) in FIG. 3B detects only the increase in the amount of light incident on the photoelectric conversion element 31, and outputs the event detection signal COMP+.
 同様に、画素30は、図3Aの量子化器36からトランジスタQ11、Q12及びインバータK1を除去する構成であってもよい。その場合、画素30は、光電変換素子31の光の受光量の増減のうち、減少のみを検出し、イベント検出信号COMP-を出力する。 Similarly, pixel 30 may be configured to remove transistors Q11, Q12 and inverter K1 from quantizer 36 in FIG. 3A. In that case, pixel 30 detects only the decrease in the amount of light received by photoelectric conversion element 31, among the increase and decrease, and outputs event detection signal COMP-.
 センサ2は、例えば2段の積層チップで構成することもできる。図4Aは、センサ2の積層構造の第1例を示す図である。このセンサ2は、画素チップ41と、画素チップ41に積層されたロジックチップ42とを備える。これらのチップは、ビアなどにより接合される。なお、ビアの他、Cu-Cu接合やバンプにより接合することもできる。 The sensor 2 can also be configured, for example, with two stacked chips. FIG. 4A is a diagram showing a first example of the stacked structure of the sensor 2. This sensor 2 comprises a pixel chip 41 and a logic chip 42 stacked on the pixel chip 41. These chips are joined by vias or the like. Note that in addition to vias, they can also be joined by Cu-Cu bonding or bumps.
 画素チップ41には、例えば光電変換素子31と、画素回路32の一部(例えば、転送トランジスタTRG及び電荷電圧変換部33)が配置される。ロジックチップ42には、例えば画素回路32の残り一部(例えば、バッファ34、微分回路35、及び量子化器36)と、垂直駆動部22、及び信号処理部23が配置される。 The pixel chip 41 has, for example, the photoelectric conversion element 31 and a part of the pixel circuit 32 (for example, the transfer transistor TRG and the charge-voltage conversion unit 33) arranged thereon. The logic chip 42 has, for example, the remaining part of the pixel circuit 32 (for example, the buffer 34, the differentiation circuit 35, and the quantizer 36), the vertical drive unit 22, and the signal processing unit 23 arranged thereon.
 センサ2は、3段以上の積層チップで構成されてもよい。図4Bは、センサ2の積層構造の第2例を示す図である。図4Bのセンサ2aには、画素チップ41に代わって、第1画素チップ41a及び第2画素チップ41bが積層されている。第1画素チップ41aには、例えば光電変換素子31と、転送用トランジスタTRGとを配置する。第2画素チップ41bには、例えば電荷電圧変換部33が配置される。 The sensor 2 may be composed of three or more stacked chips. FIG. 4B is a diagram showing a second example of the stacked structure of the sensor 2. In the sensor 2a of FIG. 4B, a first pixel chip 41a and a second pixel chip 41b are stacked instead of the pixel chip 41. In the first pixel chip 41a, for example, a photoelectric conversion element 31 and a transfer transistor TRG are arranged. In the second pixel chip 41b, for example, a charge-voltage conversion unit 33 is arranged.
 図4Bのセンサ2aは、第1画素チップ41aから電荷電圧変換部33を除去し、第2画素チップ41bに配置した構成となっている。これにより、チップ面積が微細化する場合においても、第1画素チップ41aにおいて光電変換素子31の面積を確保できるとともに、第2画素チップ41bにおいて電荷電圧変換部33の面積を確保できる。 The sensor 2a in FIG. 4B has a configuration in which the charge-voltage conversion unit 33 is removed from the first pixel chip 41a and placed on the second pixel chip 41b. This ensures that the area of the photoelectric conversion element 31 is sufficient in the first pixel chip 41a, and that the area of the charge-voltage conversion unit 33 is sufficient in the second pixel chip 41b, even when the chip area is miniaturized.
 本実施形態による情報処理装置1は、イベントの検出時期及び検出頻度を可視化可能なフレーム画像を生成することを特徴とする。そのための一連の処理をイベント可視化と呼ぶ。図5は、情報処理装置1におけるイベント可視化の概略的な処理手順を示すフローチャートである。まず、センサ2内の各画素30において、イベントの検出が行われる(ステップS1)。イベント処理部3内のイベント取得部11は、所定の期間ごとに、圧縮されたイベント情報を取得する。本明細書では、所定の期間内に取得されるイベント情報をデータチャンクと呼ぶことがある。イベント取得部11で取得されるデータチャンクは、いったんイベント蓄積部14に蓄積されてもよい(ステップS2)。 The information processing device 1 according to this embodiment is characterized by generating frame images capable of visualizing the detection time and detection frequency of an event. The series of processes for this purpose is called event visualization. FIG. 5 is a flowchart showing an outline of the processing procedure for event visualization in the information processing device 1. First, an event is detected in each pixel 30 in the sensor 2 (step S1). The event acquisition unit 11 in the event processing unit 3 acquires compressed event information at predetermined intervals. In this specification, the event information acquired within a predetermined period may be referred to as a data chunk. The data chunk acquired by the event acquisition unit 11 may be temporarily stored in the event storage unit 14 (step S2).
 デコード部12は、イベント蓄積部14に蓄積されたデータチャンクをデコードし、イベントデータを出力する(ステップS3)。 The decoding unit 12 decodes the data chunks stored in the event storage unit 14 and outputs the event data (step S3).
 デコード部12が出力するイベントデータは、例えば以下の情報を含む。
 x:イベントの検出位置(例えば、画素位置)を示すXアドレス
 y:イベントの検出位置(例えば、画素位置)を示すYアドレス
 t:イベントの検出時刻を示す時間情報(タイムスタンプ)
 p:イベントの極性情報 
The event data output by the decoding unit 12 includes, for example, the following information:
x: X address indicating the detection position (e.g., pixel position) of the event y: Y address indicating the detection position (e.g., pixel position) of the event t: time information (time stamp) indicating the detection time of the event
p: Event polarity information
 フレーム生成部13は、デコード部12から出力されたイベントデータに基づき、フレームデータを生成するフレーム化処理を行う(ステップS4)。画像生成部15は、フレーム生成部13により供給されるフレームデータに基づいて、フレーム画像の生成処理を行う(ステップS5)。画像生成処理の詳細については後述する。 The frame generating unit 13 performs a framing process to generate frame data based on the event data output from the decoding unit 12 (step S4). The image generating unit 15 performs a frame image generation process based on the frame data supplied by the frame generating unit 13 (step S5). The image generation process will be described in detail later.
 図6は、フレーム化処理を説明する図である。デコード部12は、データチャンクdcの単位でデコードされたイベントデータを出力する。1つのデータチャンクdcには、例えば所定の単位検出期間Δtの間に発生した全画素のイベント情報が含まれる。それぞれのイベント情報は、上記のイベント検出位置x、y、イベント検出時刻t、イベント極性情報pを含むイベントデータe(x,y,p,t)で表される。 FIG. 6 is a diagram explaining the framing process. The decoding unit 12 outputs event data decoded in units of data chunks dc. One data chunk dc contains, for example, event information for all pixels that occurred during a predetermined unit detection period Δt. Each piece of event information is represented by event data e(x, y, p, t) that contains the event detection positions x, y, event detection time t, and event polarity information p described above.
 フレーム生成部13は、複数の単位検出期間Δtからなる所定のタイムスライスTsに含まれる複数のイベントデータを1つのフレームデータとして出力する。図6の例では、タイムスライスTsを8Δtの時間幅としている。また、フレームデータF1には8つのデータチャンクdcが含まれる。すなわち、フレーム生成部13は、複数の画素30を含むフレーム単位で、所定の期間(タイムスライスTs)内に発生されたイベント情報を含むフレームデータを生成する。 The frame generation unit 13 outputs multiple event data included in a predetermined time slice Ts consisting of multiple unit detection periods Δt as one frame of data. In the example of FIG. 6, the time slice Ts has a time width of 8Δt. Furthermore, the frame data F1 includes eight data chunks dc. In other words, the frame generation unit 13 generates frame data including event information generated within a predetermined period (time slice Ts) in frame units including multiple pixels 30.
 フレーム生成部13は、時間軸方向に隣り合う2つのフレームデータ同士が重複した時間範囲のイベントデータを有するようにフレームデータを生成する。本明細書では、重複した時間範囲をオーバラップ区間と呼ぶことがある。オーバラップ区間を設けることで、オブジェクトトラッキングの精度を向上させることができる。 The frame generation unit 13 generates frame data such that two adjacent frame data in the time axis direction have event data with overlapping time ranges. In this specification, the overlapping time ranges are sometimes called overlapping sections. By providing overlapping sections, the accuracy of object tracking can be improved.
 図6の例では、フレームデータF1及びF2の間において、6Δtの時間幅のオーバラップ区間を設けている。フレームデータF2及びF3の間においても同様に、6Δtの時間幅のオーバラップ区間を設けている。 In the example of FIG. 6, an overlap section with a time width of 6Δt is provided between frame data F1 and F2. Similarly, an overlap section with a time width of 6Δt is provided between frame data F2 and F3.
 タイムスライスTsの時間幅及びオーバラップ区間Torの時間幅は、図6に示した時間幅に限定されず、任意の時間幅を設定してもよい。タイムスライスTsが短すぎる場合は、1つのフレームデータに含まれるイベントが少なくなり、イベント情報の特徴を視覚的に把握しにくくなる。タイムスライスTsがオーバラップ区間Torと比較して長すぎる場合は、フレームデータの生成の間隔が長くなり、EVSの高速性の利点が失われる。したがって、タイムスライスTsの時間幅及びオーバラップ区間Torの時間幅は、イベントの発生状況などに応じて調整するのが望ましい。 The duration of the time slice Ts and the duration of the overlap section Tor are not limited to those shown in FIG. 6, and any duration may be set. If the time slice Ts is too short, fewer events will be included in one frame of data, making it difficult to visually grasp the characteristics of the event information. If the time slice Ts is too long compared to the overlap section Tor, the interval between frame data generation will be longer, and the advantage of the high speed of EVS will be lost. Therefore, it is desirable to adjust the duration of the time slice Ts and the duration of the overlap section Tor according to the occurrence status of events, etc.
 図7Aは、一比較例における画像生成処理を示す図である。図7Aでは、タイムスライスTsにおいて、被写体Aが位置Psから位置Peまで移動する例を示している。被写体Aが位置Psから位置Peに移動する間に輝度の変化が発生し、センサ2によりイベントが検出される。これにより、イベントデータを含む画像データG0が生成される。 FIG. 7A is a diagram showing an image generation process in a comparative example. FIG. 7A shows an example in which subject A moves from position Ps to position Pe in time slice Ts. A change in luminance occurs while subject A moves from position Ps to position Pe, and an event is detected by sensor 2. As a result, image data G0 including event data is generated.
 画像データG0は、タイムスライスTs内で発生されたイベント情報を含んでいるが、イベントの発生時刻は不明である。したがって、画像データG0からは、物体Aが位置Psから位置Peに移動しているのか、位置Peから位置Psに移動しているのか、判別することができない。 Image data G0 contains event information that occurred within time slice Ts, but the time at which the event occurred is unknown. Therefore, it is not possible to determine from image data G0 whether object A is moving from position Ps to position Pe, or from position Pe to position Ps.
 図7Aに示すように、一比較例の画像データG0は、イベントの発生時刻の情報を含んでいないため、被写体の動きを視覚的に解釈あるいは解析できない。本開示の情報処理装置1は、この問題を解決できることを特徴とする。 As shown in FIG. 7A, image data G0 of the comparative example does not include information on the time when an event occurred, so the movement of the subject cannot be visually interpreted or analyzed. The information processing device 1 disclosed herein is characterized by its ability to solve this problem.
 図7Bは、本開示における画像生成処理を示す図である。図7Bでは、図7Aと同様に、タイムスライスTsにおいて、被写体Aが位置Psから位置Peまで移動する例を示す。本開示の情報処理装置1が出力する画像データGは、イベントの発生時刻に応じて階調を変化させるという特徴を有する。具体的には、新しいイベントは濃い色で表現し、古いイベントは薄い色で表現している。これにより、画像データGの階調の変化により、物体Aが位置Psから位置Peに移動していることが判別することができる。このように、本開示の情報処理装置1は、被写体の動きを視覚的に解釈あるいは解析を可能とする画像データGを出力できる。 FIG. 7B is a diagram showing the image generation process in the present disclosure. Like FIG. 7A, FIG. 7B shows an example in which subject A moves from position Ps to position Pe in time slice Ts. Image data G output by information processing device 1 of the present disclosure has the feature that the gradation changes according to the time at which an event occurs. Specifically, new events are represented in dark colors, and older events are represented in light colors. This makes it possible to determine that object A is moving from position Ps to position Pe due to the change in gradation of image data G. In this way, information processing device 1 of the present disclosure can output image data G that enables visual interpretation or analysis of the subject's movement.
 図8は、本開示の第1の実施形態における画像生成部15の詳細な構成を示すブロック図である。上述したように、画像生成部15には、フレーム生成部13からフレームデータが供給される。また、画像生成部15はフレームデータに基づき画像データを生成し、例えば表示部5に画像データを出力する。画像生成部15は、分割フレーム生成部51、画素データ生成部52及びフレーム画像生成部53を備える。 FIG. 8 is a block diagram showing a detailed configuration of the image generation unit 15 in the first embodiment of the present disclosure. As described above, frame data is supplied to the image generation unit 15 from the frame generation unit 13. The image generation unit 15 also generates image data based on the frame data, and outputs the image data to the display unit 5, for example. The image generation unit 15 includes a divided frame generation unit 51, a pixel data generation unit 52, and a frame image generation unit 53.
 分割フレーム生成部51は、フレーム生成部13から供給されるフレームデータを分割し、それぞれ所定の時間幅(以下、単位期間)を有する複数の区画データ(分割フレームデータ)を、画素データ生成部52に出力する。 The divided frame generation unit 51 divides the frame data supplied from the frame generation unit 13, and outputs multiple block data (divided frame data), each having a predetermined time width (hereinafter, unit period), to the pixel data generation unit 52.
 画素データ生成部52は、複数の単位期間のそれぞれで検出されたイベント情報を含む画素データを生成する。画素データ生成部52で生成される画素データは、画素アレイ部21内の画素30ごと、すなわちフレーム画像を構成する個々の画素30ごとに生成される。画素データ生成部52は、マッピング部54、シフト部55及び記憶部56を備える。 The pixel data generating unit 52 generates pixel data including event information detected in each of a plurality of unit periods. The pixel data generated by the pixel data generating unit 52 is generated for each pixel 30 in the pixel array unit 21, i.e., for each individual pixel 30 that constitutes a frame image. The pixel data generating unit 52 includes a mapping unit 54, a shifting unit 55, and a storage unit 56.
 マッピング部54は、区画データDに含まれるイベントデータの画素位置情報と描画用キャンパスの対応する座標(以下、画素座標)とを紐付ける。マッピング部54は、分割フレーム生成部51から区画データを取得し、区画データ内のイベントデータを抽出する。マッピング部54は、イベントデータの画素位置情報に基づき、イベントデータを画素座標に割り振る。マッピング部54は、各画素に対応するイベントが存在しているか否かを判別する。 The mapping unit 54 links pixel position information of the event data contained in the block data D with the corresponding coordinates (hereinafter, pixel coordinates) on the drawing canvas. The mapping unit 54 obtains block data from the divided frame generation unit 51 and extracts the event data within the block data. The mapping unit 54 assigns the event data to pixel coordinates based on the pixel position information of the event data. The mapping unit 54 determines whether or not an event corresponding to each pixel exists.
 シフト部55は、マッピング部54から画素座標ごとのイベントデータを取得し、画素座標ごとに複数ビットからなるバイナリデータ形式の画素データを生成する。記憶部56は、画素座標ごとに、フレームデータを分割して得られる区画データの数に等しいビット数のバイナリデータ形式の画素データを、画素順に配列して記憶する。 The shifting unit 55 acquires the event data for each pixel coordinate from the mapping unit 54, and generates pixel data in a binary data format consisting of multiple bits for each pixel coordinate. The storage unit 56 stores the pixel data in binary data format, with the number of bits equal to the number of partition data obtained by dividing the frame data, arranged in pixel order for each pixel coordinate.
 シフト部55は、記憶部56内の画素データを読み出して、LSB側にビットシフトさせて、LSB側の古いバイナリデータを廃棄するとともに、MSB側に新たなバイナリデータを追加する。シフト部55の詳細な動作は後述する。 The shift unit 55 reads out the pixel data in the memory unit 56, bit-shifts it to the LSB side, discards the old binary data on the LSB side, and adds new binary data to the MSB side. The detailed operation of the shift unit 55 will be described later.
 シフト部55は、フレームデータを構成する各区画データのイベントデータに基づいて画素データのシフト動作を繰り返す。一連のシフト動作が終わると、画素データ生成部52は、画素データをフレーム画像生成部53に出力する。フレーム画像生成部53は、各画素座標の画素データに基づいて、フレーム単位の画像データ(フレーム画像)を生成する。 The shift unit 55 repeats the shifting operation of the pixel data based on the event data of each block data constituting the frame data. When a series of shifting operations is completed, the pixel data generating unit 52 outputs the pixel data to the frame image generating unit 53. The frame image generating unit 53 generates image data (frame image) in frame units based on the pixel data of each pixel coordinate.
 なお、本開示の第1の実施形態における画像生成部15は、図9に示す画像生成処理を実現できるものであればよく、図8に示す構成に限定されない。 Note that the image generation unit 15 in the first embodiment of the present disclosure is not limited to the configuration shown in FIG. 8 as long as it can realize the image generation process shown in FIG. 9.
 図9は、本開示の第1の実施形態における画像生成のフローチャートである。図9で示す処理は、図5に示すステップS5の画像生成処理に対応する。 FIG. 9 is a flowchart of image generation in the first embodiment of the present disclosure. The process shown in FIG. 9 corresponds to the image generation process of step S5 shown in FIG. 5.
 分割フレーム生成部51は、フレームデータをN個の区画データに分割する(ステップS11)。ここで、Nは階調数に応じた数である。図10は、本開示の第1の実施形態におけるフレームデータの分割を示す模式図である。図10に示すように、分割フレーム生成部51は、フレームデータFを時間軸方向に複数に分割して、複数の区画データDを生成する。すなわち、分割フレーム生成部51は、フレームデータを、複数の単位期間のデータに分割する。 The split frame generation unit 51 splits the frame data into N pieces of section data (step S11). Here, N is a number corresponding to the number of gradations. FIG. 10 is a schematic diagram showing the splitting of frame data in the first embodiment of the present disclosure. As shown in FIG. 10, the split frame generation unit 51 splits the frame data F into multiple pieces in the time axis direction to generate multiple pieces of section data D. In other words, the split frame generation unit 51 splits the frame data into data for multiple unit periods.
 図10においては、フレームデータFを8つの区画データDに分割する(N=8)の例を示している。また、8つの区画データDの単位期間は、全て同一の時間幅を有するものとする。以降の説明では、この例を用いて説明する。 In FIG. 10, an example is shown in which frame data F is divided into eight block data D (N=8). In addition, the unit periods of the eight block data D all have the same time width. The following explanation will be given using this example.
 フレームデータFには、上述の通り複数のイベントデータe(x,y,p,t)が含まれる。これらのイベントデータは、それぞれの区画データDに割り振られる。 As described above, the frame data F includes multiple event data e(x, y, p, t). These event data are assigned to the respective block data D.
 それぞれの区画データDには、識別番号iが割り振られる。識別番号iは、時系列で古い順に、0~N-1の番号が割り振られる。図9の区画データDには、時系列で古い順に、0、1、2・・・7が割り振られている。 Each piece of block data D is assigned an identification number i. The identification numbers i are assigned 0 to N-1 in chronological order from oldest to newest. The block data D in Figure 9 are assigned numbers 0, 1, 2, ... 7 in chronological order.
 また、フレームデータFは、図6のデータチャンクdcと同じ時間幅ごとに分割してもよい。この場合、オーバラップ区間Torに含まれるデータチャンクdcを、次のフレームデータFの取得の際に再利用することができる。詳細については後述する。 Furthermore, the frame data F may be divided into the same time intervals as the data chunks dc in FIG. 6. In this case, the data chunks dc included in the overlap section Tor can be reused when acquiring the next frame data F. Details will be described later.
 図9に戻って説明を続ける。続いて、識別番号iに0を代入し、初期化する(ステップS12)。ステップS13~S16における処理は、1つの区画データDに対する処理である。ステップS13~S16においては、識別番号iをインクリメントしながら、8つの区画データDを古いものから順次処理を行う。ステップS13では、識別番号iが区画数Nよりも小さいか否かを判定する。識別番号iが区画数Nよりも小さい場合、ステップS14以降の処理を行う。 Referring back to FIG. 9, the explanation continues. Next, 0 is substituted for the identification number i, and it is initialized (step S12). The processing in steps S13 to S16 is for one piece of partition data D. In steps S13 to S16, the identification number i is incremented, and the eight pieces of partition data D are processed sequentially from the oldest one. In step S13, it is determined whether the identification number i is smaller than the number of partitions N. If the identification number i is smaller than the number of partitions N, the processing from step S14 onwards is carried out.
 画素データ生成部52は、識別番号iの区画データDに含まれるすべてのイベントデータを取得する(ステップS14)。一つの区画データDには、複数のイベントについての複数のイベントデータが含まれる場合がある。 The pixel data generator 52 acquires all event data included in the block data D with the identification number i (step S14). One block data D may contain multiple event data for multiple events.
 画素データ生成部52は、ステップS14で取得する各イベントデータを画像データの描画用キャンパスにマッピングして画素データを生成する(ステップS15)。描画用キャンパスとは、画素30ごとの画素データを画素30の並び順に配列したデータ領域であり、例えば記憶部56の記憶領域に対応づけて設けられる。描画用キャンパスにマッピングされた各画素データに基づいてフレーム画像が生成される。 The pixel data generation unit 52 generates pixel data by mapping each event data acquired in step S14 onto a drawing canvas for the image data (step S15). The drawing canvas is a data area in which pixel data for each pixel 30 is arranged in the order in which the pixels 30 are arranged, and is provided in correspondence with, for example, a storage area of the storage unit 56. A frame image is generated based on each pixel data mapped onto the drawing canvas.
 図11は、画素データの生成を示す図である。図11では、識別番号i=5の区画データDに基づいて、画素データを生成する例を説明する。画素データ生成部52内のマッピング部54は、区画データD内の、例えばイベントデータe1(x1,y1,p1,t1)から、イベントの検出位置(x1,y1)を抽出する。これに基づき、描画用キャンパスcpの対応する座標pxa(x1,y1)に、イベントデータe1が割り振られる。 FIG. 11 is a diagram showing the generation of pixel data. In FIG. 11, an example of generating pixel data based on block data D with identification number i=5 is explained. The mapping unit 54 in the pixel data generation unit 52 extracts the event detection position (x1, y1) from, for example, event data e1 (x1, y1, p1, t1) in the block data D. Based on this, the event data e1 is assigned to the corresponding coordinates pxa (x1, y1) on the drawing canvas cp.
 同様に、区画データD内の他のイベントについても、描画用キャンパスcpの対応する座標にイベントデータが割り振られる。また、区画データD内にイベントが存在しない画素についても、描画用キャンパスcp内の対応する座標pxb(x2,y2)に、イベントデータが存在しないことを示すデータが割り振られる。 Similarly, for other events in block data D, event data is assigned to the corresponding coordinates on the drawing canvas cp. Also, for pixels for which no events exist in block data D, data indicating that no event data exists is assigned to the corresponding coordinates pxb (x2, y2) on the drawing canvas cp.
 画素データ生成部52は、描画用キャンパスcp内の座標ごとに、区画データD内に対応するイベントが存在するか否かを判別し、1ビット以上(図11の例では、1ビット)のバイナリデータを生成する。バイナリデータは、例えばイベントの有無と極性を示す1ビット以上の2値データである。本明細書では、バイナリデータがイベントの有無を表す1ビットの2値データである例を主に説明する。画素データ生成部52は、座標pxaに対しては、イベントが存在することを示す(例えば1、の)バイナリデータbnewa1を生成し、座標pxbに対しては、イベントが存在しないことを示す(例えば、0の)バイナリデータbnewb1を生成する。同様に、画素データ生成部52は、描画用キャンパスcp内の他の座標に対しても、区画データD内の対応するイベントの有無に基づき、バイナリデータを生成する。 The pixel data generation unit 52 determines whether or not a corresponding event exists in the block data D for each coordinate in the drawing canvas cp, and generates binary data of one or more bits (one bit in the example of FIG. 11). The binary data is, for example, one or more bits of binary data indicating the presence or absence of an event and its polarity. In this specification, an example in which the binary data is one bit of binary data indicating the presence or absence of an event will be mainly described. For the coordinate pxa, the pixel data generation unit 52 generates binary data bnewa1 (e.g., 1) indicating that an event exists, and for the coordinate pxb, generates binary data bnewb1 (e.g., 0) indicating that an event does not exist. Similarly, the pixel data generation unit 52 generates binary data for other coordinates in the drawing canvas cp based on the presence or absence of a corresponding event in the block data D.
 記憶部56は、描画用キャンパスcp内の各座標に対応する画素データを、例えばビット列データとして記憶する。例えば記憶部56は、マッピング前に、座標pxaに対して画素データArra0を記憶しているものとする。画素データArra0は、最下位ビット(以下、LSB: Least Significant Bit)にバイナリデータbolda0を有するとともに、最上位ビット(以下、MSB: Most Significant Bit)にバイナリデータbnewa0を有する。 The memory unit 56 stores pixel data corresponding to each coordinate in the drawing canvas cp, for example as bit string data. For example, the memory unit 56 stores pixel data Arra0 for the coordinate pxa before mapping. The pixel data Arra0 has binary data bolda0 in its least significant bit (hereinafter, LSB: Least Significant Bit) and binary data bnewa0 in its most significant bit (hereinafter, MSB: Most Significant Bit).
 記憶部56は、描画用キャンパスcpの座標ごとに、例えばNビットからなる画素データを記憶する。図11の例では、N=8である。 The memory unit 56 stores pixel data consisting of, for example, N bits for each coordinate on the drawing canvas cp. In the example of FIG. 11, N=8.
 シフト部55は画素データArra0の各ビットをLSB側に1ビットずつシフトさせ、画素データArra1を生成する。これにより、画素データArra0のLSBは廃棄される。また、シフト部55は、区画データD内の対応するイベントデータbnewa1を、MSBに追加する。これにより、LSBにバイナリデータbolda1を有するとともに、MSBにバイナリデータbnewa1を有する新たな画素データArra1が生成される。バイナリデータbnewa1は、イベントが存在することを示すビット値1である。 The shift unit 55 shifts each bit of the pixel data Arra0 by one bit toward the LSB side to generate pixel data Arra1. As a result, the LSB of the pixel data Arra0 is discarded. The shift unit 55 also adds the corresponding event data bnewa1 in the partition data D to the MSB. As a result, new pixel data Arra1 is generated that has binary data bolda1 in the LSB and binary data bnewa1 in the MSB. The binary data bnewa1 has a bit value of 1, which indicates that an event exists.
 また、記憶部56は、マッピング前に、座標pxbに対応する、LSBにバイナリデータboldb0を有するとともに、MSBにバイナリデータbnewb0を有する、画素データArrb0を記憶しているものとする。シフト部55は、画素データArrb0のLSBからバイナリデータboldb0を廃棄するとともに、バイナリデータboldb1からバイナリデータbnewb0までのバイナリデータをLSB側に1ビットずつシフトし、バイナリデータbnewb1を、MSB側に追加する。バイナリデータbnewb1は、イベントが存在しないことを示す0である。これにより、画素データArrb1が生成される。 Furthermore, it is assumed that the memory unit 56 stores pixel data Arrb0, which corresponds to the coordinate pxb before mapping and has binary data boldb0 in the LSB and binary data bnewb0 in the MSB. The shift unit 55 discards the binary data boldb0 from the LSB of the pixel data Arrb0, shifts the binary data from binary data boldb1 to binary data bnewb0 one bit at a time toward the LSB side, and adds binary data bnewb1 to the MSB side. The binary data bnewb1 is 0, which indicates that no event exists. In this way, the pixel data Arrb1 is generated.
 なお、記憶部56が記憶する画素データArra0及びArrb0は、直前に生成された画素データである。具体的には、識別番号i=5の区画データDについてステップS15の処理を行う直前には、記憶部56には識別番号i=4の区画データDの処理において生成された画素データが記憶されている。 The pixel data Arra0 and Arrb0 stored in the memory unit 56 are the pixel data generated immediately before. Specifically, immediately before the processing of step S15 is performed on the block data D with identification number i=5, the pixel data generated in the processing of the block data D with identification number i=4 is stored in the memory unit 56.
 このように、シフト部55は、記憶部56内に描画用キャンパスcpの座標ごとに記憶されている画素データの各ビットをLSB側に1ビットずつシフトするとともに、区画データD内のイベントの有無を表す1ビット情報をMSBに追加することで、区画データDごとに、各画素30の画素データを生成する。 In this way, the shift unit 55 shifts each bit of the pixel data stored in the memory unit 56 for each coordinate of the drawing canvas cp toward the LSB by one bit at a time, and adds one bit of information indicating the presence or absence of an event in the block data D to the MSB, thereby generating pixel data for each pixel 30 for each block data D.
 図9のステップS15の処理が終了すると、区画データDの識別番号iをインクリメントし(ステップS16)、ステップS13以降の処理を繰り返す。ステップS13において、識別番号iが区画数Nよりも小さい場合は、次の区画データDについて、ステップS14~S15の処理を行う。これにより、フレームデータFの全ての区間データDについて、画素データ生成の処理が行われる。画素データ生成部52は、ステップS15で生成している新しい画素データを、フレーム画像生成部53に出力する。 When the processing of step S15 in FIG. 9 is completed, the identification number i of the partition data D is incremented (step S16), and the processing from step S13 onwards is repeated. If the identification number i is smaller than the number of partitions N in step S13, the processing of steps S14 to S15 is performed for the next partition data D. This completes the pixel data generation processing for all section data D of the frame data F. The pixel data generation unit 52 outputs the new pixel data generated in step S15 to the frame image generation unit 53.
 図12は、本開示の第1の実施形態におけるフレームデータと画素データとの対応関係を示す図である。フレームデータFは、画素アレイ部21内の全画素30に対応するイベントデータを含んでいる。フレームデータF内の各イベントデータは、描画用キャンパスcp内の各座標に割り振られている。図12では、フレームデータF内の特定画素のイベントデータを太線で示し、それ以外の画素のイベントデータを破線で示す。また、図12では、フレームデータF内の特定画素のイベントデータが描画用キャンパスcp内の座標pxcの画素データpdに割り振られる例を示す。 FIG. 12 is a diagram showing the correspondence between frame data and pixel data in the first embodiment of the present disclosure. Frame data F includes event data corresponding to all pixels 30 in the pixel array section 21. Each event data in the frame data F is assigned to each coordinate in the drawing canvas cp. In FIG. 12, the event data of a specific pixel in the frame data F is shown with a thick line, and the event data of the other pixels is shown with a dashed line. FIG. 12 also shows an example in which the event data of a specific pixel in the frame data F is assigned to pixel data pd of coordinate pxc in the drawing canvas cp.
 画素データ生成部52は、画素データpdの各ビットを、フレームデータF内のそれぞれ異なる区画データDに対応づけて、区画データD内の対応する画素30のイベント情報に基づいて画素データpdの対応するビット値を生成する。図12では、特定の画素のイベントデータepxcに基づいて画素データpdの対応するビット値が生成される例を示す。 The pixel data generation unit 52 associates each bit of the pixel data pd with a different block data D in the frame data F, and generates a corresponding bit value of the pixel data pd based on the event information of the corresponding pixel 30 in the block data D. Figure 12 shows an example in which a corresponding bit value of the pixel data pd is generated based on the event data epxc of a specific pixel.
 図11に示すように、画素データpdはLSB側により古いバイナリデータを有し、MSB側により新しいバイナリデータを有する。特に、画素データpdの長さが区画データ数と一致する場合、画素データpdのLSBは識別番号i=0の区画データDに対応し、MSBは識別番号i=N-1(図12の場合はi=7)の区画データDに対応する。すなわち、画素データ生成部52は、画素データpdの上位ビット側のビット値を、より新しい区画データD内の対応する画素30のイベント情報に基づいて生成する。 As shown in FIG. 11, pixel data pd has older binary data on the LSB side and newer binary data on the MSB side. In particular, when the length of pixel data pd matches the number of block data, the LSB of pixel data pd corresponds to block data D with identification number i=0, and the MSB corresponds to block data D with identification number i=N-1 (i=7 in the case of FIG. 12). In other words, pixel data generator 52 generates the bit value on the higher order bit side of pixel data pd based on the event information of the corresponding pixel 30 in the newer block data D.
 画素データpdの各ビットのバイナリデータは、対応する区画データDに、対応する画素30のイベントデータ(図12では、イベントデータepxc)が存在する場合は、例えば1となり、イベントデータepxcが存在しない場合は、例えば0となる。図12では、対応する区画データD内に少なくとも1つのイベントデータepxcが存在する場合は、1となる例を示しているが、画素データの各ビットのバイナリデータを1にする条件を任意に設定してもよい。例えば、画素データの各ビットのバイナリデータは、対応する区画データD内に、対応する画素30のイベント数が所定の閾値以上に存在する場合に1、それ以外の場合を0としてもよい。 The binary data of each bit of pixel data pd is, for example, 1 if event data (event data epxc in FIG. 12) of the corresponding pixel 30 exists in the corresponding block data D, and is, for example, 0 if no event data epxc exists. FIG. 12 shows an example in which the binary data is 1 if at least one event data epxc exists in the corresponding block data D, but the conditions for setting the binary data of each bit of pixel data to 1 may be set arbitrarily. For example, the binary data of each bit of pixel data may be 1 if the number of events of the corresponding pixel 30 exists in the corresponding block data D equal to or exceeds a predetermined threshold, and 0 otherwise.
 図12に示すように、画素データ生成部52は、複数の単位期間のそれぞれで検出されたイベント情報を含む画素データpdを生成する。画素データpdは、複数ビットのビット列データである。画素データpdには、ビット列データのMSB側からLSB側に向かって、より古い単位期間の、イベント情報が配置される。また、イベント情報は、単位期間ごとに1ビット以上で表される。なお、画素データpdは、単位期間ごとに、イベントの極性情報pを含んでいてもよい。 As shown in FIG. 12, the pixel data generating unit 52 generates pixel data pd including event information detected in each of a plurality of unit periods. The pixel data pd is bit string data of a plurality of bits. In the pixel data pd, event information of older unit periods is arranged from the MSB side to the LSB side of the bit string data. Furthermore, the event information is represented by one or more bits for each unit period. The pixel data pd may also include polarity information p of the event for each unit period.
 画素データ生成部52は、描画用キャンパスcp内の他の座標についても、同様に画素データを生成する。すなわち、画素データ生成部52は、画素アレイ部21内の全画素30のそれぞれごとに、複数の区画データDのそれぞれに含まれる、対応する画素30のイベント情報に基づいて画素データを生成する。 The pixel data generating unit 52 similarly generates pixel data for other coordinates within the drawing canvas cp. That is, the pixel data generating unit 52 generates pixel data for each of all pixels 30 within the pixel array unit 21 based on the event information of the corresponding pixel 30 contained in each of the multiple block data D.
 図9に戻って説明を続ける。フレーム画像生成部53は、ステップS13~S16の処理によって生成された1フレーム分の各画素の画素データに基づいて、フレーム画像を描画する(ステップS17)。本明細書では、フレーム画像を構成する各画素の画素データを総称して画像データと呼ぶ。 Referring back to Figure 9, the explanation continues. The frame image generating unit 53 draws a frame image based on the pixel data of each pixel for one frame generated by the processing of steps S13 to S16 (step S17). In this specification, the pixel data of each pixel constituting the frame image is collectively referred to as image data.
 図13は、本開示の第1の実施形態における画像データの一例を示す図である。図13には、画像データの一部である3つの画素データpd1、pd2及びpd3が図示されている。これら3つの画素データは、それぞれ描画用キャンパスcp内の座標pxd、pxe及びpxfに対応する。 FIG. 13 is a diagram showing an example of image data in the first embodiment of the present disclosure. Three pieces of pixel data pd1, pd2, and pd3 that are part of the image data are shown in FIG. 13. These three pieces of pixel data correspond to coordinates pxd, pxe, and pxf, respectively, within the drawing canvas cp.
 図13の画素データpd1はMSBが1であり、直近にイベントが発生したことを示す。画素データpd2は画素データpd3より、多くのビットが1であり、イベントの発生回数が多いことを示す。画素データpd1、pd2、pd3の画素値はそれぞれ206、124、97である。よって、画素データpd1の階調(輝度)が最も高く、次に画素データpd2の階調(輝度)が高く、画素データpd3の階調(輝度)が最も低くなる。 In Figure 13, the pixel data pd1 has an MSB of 1, indicating that an event has occurred most recently. The pixel data pd2 has more bits that are 1 than the pixel data pd3, indicating that an event has occurred more frequently. The pixel values of the pixel data pd1, pd2, and pd3 are 206, 124, and 97, respectively. Therefore, the pixel data pd1 has the highest gradation (brightness), the pixel data pd2 has the next highest gradation (brightness), and the pixel data pd3 has the lowest gradation (brightness).
 このように、画素データは、イベントの発生(検出)時期が新しいほど画素値が大きくなり、かつイベントの発生(検出)回数が多いほど画素数が大きくなる。よって、フレーム画像生成部53で生成されるフレーム画像の各画素の階調(輝度)により、フレームの発生(検出)時期と発生(検出)頻度を把握することができる。 In this way, the more recently an event occurred (detected), the larger the pixel value of the pixel data, and the more frequently an event occurred (detected), the larger the number of pixels. Therefore, the gradation (brightness) of each pixel in the frame image generated by the frame image generating unit 53 makes it possible to determine the time of occurrence (detection) of a frame and the frequency of occurrence (detection).
 画素データpd1、pd2及びpd3の画素値で表される階調数は、フレームデータFの分割数Nに応じた数であるとともに、複数の単位期間の数に応じた数である。 The number of gradations represented by the pixel values of the pixel data pd1, pd2, and pd3 is a number that corresponds to the division number N of the frame data F, and also corresponds to the number of unit periods.
 フレーム画像生成部53は、画像データに各イベントの極性情報pを反映してもよい。例えば、正の極性のイベントと負の極性のイベントのいずれか一方は、グレースケールを用いてイベントの発生時期及び発生頻度を表現してもよい。また、他方はRGBのいずれか一色の階調を用いて、イベントの発生時期及び発生頻度を表現してもよい。 The frame image generating unit 53 may reflect the polarity information p of each event in the image data. For example, either a positive polarity event or a negative polarity event may use a grayscale to represent the time and frequency of the event. The other event may use a gradation of one of the RGB colors to represent the time and frequency of the event.
 図9のステップS17でフレーム画像の描画処理を行った後、フレーム化処理を終了するか否かを判定する(ステップS18)。フレーム化処理の終了とは、新たなフレーム画像の描画を行わないことを指す。フレーム化処理を終了する場合は、図9の処理が終了する。 After the frame image drawing process is performed in step S17 of FIG. 9, it is determined whether or not to end the framing process (step S18). Ending the framing process means that no new frame images are to be drawn. If the framing process is to end, the process of FIG. 9 ends.
 ステップS18でフレーム化処理を継続する場合、ステップS11以降の処理を繰り返して、新たなフレーム画像を描画する。 If the framing process is to continue in step S18, the process from step S11 onwards is repeated to draw a new frame image.
 図6に示すように、フレーム生成部13は、時間軸方向に隣り合う2つのフレームデータ同士が重複した時間範囲を含むように、各フレームデータを生成する。図6では、各フレームデータが等間隔の複数のデータチャンクdcに分かれている例を示したが、分割フレーム生成部51は、フレーム生成部13で生成された各フレームデータを、単位期間ごとに分割した複数の区画データを生成する。上述したように、区分けされた複数の区画データを含むフレームデータに基づいて画素データが生成される。 As shown in FIG. 6, the frame generation unit 13 generates each frame data such that two adjacent frame data in the time axis direction include an overlapping time range. While FIG. 6 shows an example in which each frame data is divided into multiple data chunks dc at equal intervals, the divided frame generation unit 51 generates multiple segment data by dividing each frame data generated by the frame generation unit 13 for each unit period. As described above, pixel data is generated based on the frame data including the multiple segmented segment data.
 図14は、時間軸方向に隣り合う2つのフレームデータに基づいて生成される2つの画素データを示す図である。分割フレーム生成部51に供給される時間軸方向に隣り合う2つのフレームデータは、互いに重なり合うオーバラップ部を有し、オーバラップ部の時間幅は、例えば図6のオーバラップ区間の時間幅と同じである。時間軸方向に隣り合う2つのフレームデータに基づいて生成される2つの画素データpda及びpdbも、図14に示すようにオーバラップ部borを有する。オーバラップ部borの時間幅は、オーバラップ区間Torの時間幅と同じであるとともに、区画データの時間幅である単位期間の整数倍である。オーバラップ部の単位期間の数は、オーバラップ区間Torのデータチャンクの数とは必ずしも一致しない。 FIG. 14 is a diagram showing two pixel data generated based on two frame data adjacent in the time axis direction. The two frame data adjacent in the time axis direction supplied to the split frame generation unit 51 have an overlapping portion where they overlap with each other, and the time width of the overlapping portion is the same as the time width of the overlapping section in FIG. 6, for example. The two pixel data pda and pdb generated based on two frame data adjacent in the time axis direction also have an overlapping portion bor as shown in FIG. 14. The time width of the overlapping portion bor is the same as the time width of the overlapping section Tor, and is an integer multiple of the unit period, which is the time width of the partition data. The number of unit periods of the overlapping portion does not necessarily match the number of data chunks in the overlapping section Tor.
 図14に示すように、時間軸方向に隣り合う2つの画素データにオーバラップ部を設けることにより、イベントの変化する様子を的確に捉えることができる。例えば、移動体が移動する方向を軌跡としてフレーム画像に表現できる。また、新たな画素データを生成する際には、直前に生成した画素データとのオーバラップ部のバイナリデータはそのまま有効なデータとして利用できるため、新たな画素データを迅速に生成でき、フレームレートを上げることができる。 As shown in Figure 14, by providing an overlapping area between two pieces of pixel data that are adjacent in the time axis direction, it is possible to accurately capture how an event changes. For example, the direction in which a moving object moves can be expressed as a trajectory in a frame image. Furthermore, when generating new pixel data, the binary data in the overlapping area with the previously generated pixel data can be used as valid data as is, so new pixel data can be generated quickly and the frame rate can be increased.
 また、上記の場合、フレーム画像生成部53は、画素30ごとに、イベントの検出時刻及び検出頻度に応じた階調を有し、かつ、時間軸方向に隣り合う2つのフレーム画像に、重複する時間範囲内のイベント情報が含まれるように画像データを生成する。 In the above case, the frame image generating unit 53 generates image data such that each pixel 30 has a gradation according to the detection time and detection frequency of the event, and two frame images adjacent in the time axis direction contain event information within an overlapping time range.
 このように、本開示の第1の実施形態における情報処理装置1は、イベントの検出時期及び検出頻度に応じた画素値を有する画素データを生成するため、イベントの発生場所だけでなく、イベントの発生時期及び発生頻度を容易に視認可能なフレーム画像を生成できる。より具体的には、本実施形態によるフレーム画像では、イベントの発生方向とイベントの発生時期を例えば輝度又は階調によって表現できるため、移動体がいつ、どの方向に進行したかを視覚的に把握しやすくなる。また、イベントがどの時刻にどのくらいの期間継続して発生したかも視覚的に把握可能となる。 In this way, the information processing device 1 in the first embodiment of the present disclosure generates pixel data having pixel values according to the detection time and detection frequency of an event, and can generate a frame image in which not only the location of the event but also the time and frequency of the event can be easily visually recognized. More specifically, in the frame image according to this embodiment, the direction of the event and the time of the event can be expressed by, for example, brightness or gradation, making it easier to visually grasp when and in which direction a moving object moved. It is also possible to visually grasp at what time and for how long an event occurred.
 このように、図9で説明する本開示の画像生成処理は、人間の目に発生する残像効果を模している形で、イベントの発生時刻を表現する。これにより、本開示の情報処理装置1は、従来よりも人間に理解しやすい形式で、イベントを可視化できるという特徴がある。また、本開示の画像生成処理は、1つのタイムスライスにおいて、同一の画素位置で複数のイベントが発生した場合でも、階調又は輝度により識別が可能である。 In this way, the image generation process of the present disclosure, which is described in FIG. 9, expresses the time of occurrence of an event in a form that mimics the afterimage effect that occurs in the human eye. As a result, the information processing device 1 of the present disclosure has the characteristic of being able to visualize events in a form that is easier for humans to understand than conventional methods. Furthermore, the image generation process of the present disclosure makes it possible to distinguish between multiple events by gradation or brightness, even when multiple events occur at the same pixel position in one time slice.
 (第2の実施形態)
 第1の実施形態における分割フレーム生成部51は、フレームデータFを同一の時間幅で複数の区画データDに分割しているが、複数の区画データDの時間幅は必ずしも同一でなくてもよい。
Second Embodiment
The divided frame generating unit 51 in the first embodiment divides the frame data F into a plurality of segment data D with the same time width, but the time widths of the plurality of segment data D do not necessarily have to be the same.
 図15は、本開示の第2の実施形態におけるフレームデータの分割を示す模式図である。第2の実施形態における分割フレーム生成部51は、図9のステップS11において、それぞれ異なる時間幅を有する複数の区画データDaに分割する。第2の実施形態においては、例えば、フレームデータFの中でより細かくイベント発生の状況をより詳細に検出したい時間範囲については、狭い時間幅の区画データDaに分割し、他の時間範囲については広い時間幅の区画データDaに分割することができる。 FIG. 15 is a schematic diagram showing the division of frame data in the second embodiment of the present disclosure. In step S11 of FIG. 9, the divided frame generation unit 51 in the second embodiment divides the frame data F into a plurality of segment data Da each having a different time width. In the second embodiment, for example, a time range within the frame data F in which it is desired to detect the situation of an event occurrence in more detail can be divided into segment data Da with a narrower time width, and other time ranges can be divided into segment data Da with a wider time width.
 図15の例では、現在時刻により近い時間帯のイベント発生状況をより詳しく検出するために、時間帯が古くなるにつれて対数的に区画データの時間幅(単位期間)が長く、時間帯が新しくなるにつれて時間幅が短くなるように、フレームデータFを分割している。 In the example of Figure 15, in order to detect the occurrence of events in time periods closer to the current time in more detail, the frame data F is divided so that the time width (unit period) of the partition data becomes logarithmically longer as the time period becomes older and shorter as the time period becomes newer.
 図16は、本開示の第2の実施形態におけるフレームデータFと画素データとの対応関係を示す図である。図16のフレームデータFには、図12で示すフレームデータFと同じイベントデータが含まれている。しかし、上述のように、図16の区画データDaは、図12の区画データDとは、フレームデータF内で占める時間範囲及び時間幅が異なる。また、図16の区画データDaは、同じ識別番号iの図12の区画データDと比較して、内部に含むイベントデータが異なる。このため、図16の画素データpdcは、図12に示す画素データpdとは、異なるデータとなっている。 FIG. 16 is a diagram showing the correspondence between frame data F and pixel data in the second embodiment of the present disclosure. Frame data F in FIG. 16 contains the same event data as frame data F shown in FIG. 12. However, as described above, segment data Da in FIG. 16 differs from segment data D in FIG. 12 in the time range and time width that it occupies within frame data F. Furthermore, segment data Da in FIG. 16 contains different event data compared to segment data D in FIG. 12 having the same identification number i. For this reason, pixel data pdc in FIG. 16 is different data from pixel data pd shown in FIG. 12.
 図16の画素データpdcは、図12に示す画素データpdと比較して、新しい時間範囲におけるイベントデータの有無を敏感に検知している。このため、特に新しい時間範囲における被写体の輝度変化をより詳細に追跡できるとともに、イベントの発生している時間をより細かく特定することができる。 Compared to the pixel data pd shown in FIG. 12, the pixel data pdc in FIG. 16 is more sensitive to the presence or absence of event data in the new time range. This makes it possible to more precisely track changes in the brightness of the subject, particularly in the new time range, and to more precisely identify the time when the event is occurring.
 このように、本開示の第2の実施形態では、フレームデータFを分割した各区画データDの時間幅をそれぞれ相違させるため、例えば、古い時刻に発生したイベント情報よりも、新しい時刻に発生したイベント情報をより多く含む画素データを生成できる。これにより、第2の実施形態による情報処理装置1により生成されるフレーム画像では、より新しい時刻に発生したイベントの発生位置、発生時刻、及び発生頻度の情報をより詳細に視覚的に表現できる。 In this way, in the second embodiment of the present disclosure, the time width of each block of segment data D obtained by dividing frame data F is made different, so that, for example, pixel data can be generated that contains more information about events that occurred at newer times than information about events that occurred at older times. As a result, the frame image generated by the information processing device 1 according to the second embodiment can visually represent information about the occurrence location, occurrence time, and occurrence frequency of events that occurred at more recent times in more detail.
 (第3の実施形態)
 画素データ生成部52が出力する画素データに、重み付けを行ってもよい。図17は、本開示の第3の実施形態における画像生成部15の詳細な構成を示すブロック図である。図17の画像生成部15aは、図8の画像生成部15に新たに重み付け部60を追加した構成を備える。重み付け部60は、画素データ生成部52とフレーム画像生成部53との間に配置される。
Third Embodiment
Weighting may be applied to the pixel data output by pixel data generation unit 52. Fig. 17 is a block diagram showing a detailed configuration of image generation unit 15 in the third embodiment of the present disclosure. Image generation unit 15a in Fig. 17 has a configuration in which a weighting unit 60 is newly added to image generation unit 15 in Fig. 8. Weighting unit 60 is disposed between pixel data generation unit 52 and frame image generation unit 53.
 重み付け部60は、画素データに対して所定の重み付けを行う。重み付けの具体的な手法は任意である。例えば、画素データの特定のビットのビット値を反転させてもよいし、画素データの各ビットをMSB側又はLSB側にシフトしてもよい。重み付け部60で重み付けされた画素データは、フレーム画像生成部53に供給される。 The weighting unit 60 applies a predetermined weighting to the pixel data. The specific weighting method is arbitrary. For example, the bit value of a specific bit of the pixel data may be inverted, or each bit of the pixel data may be shifted to the MSB or LSB side. The pixel data weighted by the weighting unit 60 is supplied to the frame image generating unit 53.
 図18は、本開示の第3の実施形態における画像生成のフローチャートである。図18では、ステップS13とステップS17の間に、重み付けの処理(ステップS20)を追加している。ステップS20では、重み付け部60が、画素データ生成部52から出力される画素データに重み付けを行う。ステップS17において、フレーム画像生成部53は重みを有する画素データに基づき画像データを出力する。 FIG. 18 is a flowchart of image generation in the third embodiment of the present disclosure. In FIG. 18, a weighting process (step S20) is added between steps S13 and S17. In step S20, the weighting unit 60 weights the pixel data output from the pixel data generation unit 52. In step S17, the frame image generation unit 53 outputs image data based on the weighted pixel data.
 例えば、画素データの新しいバイナリデータ(例えば、MSBのバイナリデータ)以外をLSB側にシフトすることにより、新しいイベントデータを、強調して表現することができる。また、特定の時間範囲のバイナリデータを、MSB側にシフトすることにより、注目する時間範囲を変更することもできる。 For example, new event data can be emphasized by shifting all but the new binary data of the pixel data (e.g., the MSB binary data) to the LSB side. Also, the time range of interest can be changed by shifting the binary data of a specific time range to the MSB side.
 このように、本開示の第3の実施形態における画像生成部15aは、必要に応じて画素データを重み付けするため、イベントの特性に合わせてフレーム画像におけるイベント情報の表示形態を種々に変更でき、視認性の高いフレーム画像を提供できる。なお、第3の実施形態による画素データの重み付けは、第1~2の実施形態のいずれにも適用できる。 In this way, the image generation unit 15a in the third embodiment of the present disclosure weights pixel data as necessary, making it possible to change the display format of event information in a frame image in various ways according to the characteristics of the event, and to provide a frame image with high visibility. Note that the weighting of pixel data according to the third embodiment can be applied to any of the first and second embodiments.
 (第4の実施形態)
 本開示の情報処理装置1は、機械学習の機能を備えることもできる。図19は、本開示の第4の実施形態における情報処理装置1の構成を示すブロック図である。図19に示す情報処理装置1aは、アプリケーション部4aを備える。アプリケーション部4aは、ニューラルネットワーク部61、学習部62、及び情報処理部63を備える。
Fourth Embodiment
The information processing device 1 of the present disclosure may also have a machine learning function. Fig. 19 is a block diagram showing a configuration of the information processing device 1 according to the fourth embodiment of the present disclosure. The information processing device 1a shown in Fig. 19 includes an application unit 4a. The application unit 4a includes a neural network unit 61, a learning unit 62, and an information processing unit 63.
 画像生成部15(又は、画像生成部15a)は、図9(又は、図18)の処理により、画像データを生成する。ニューラルネットワーク部61は、画像生成部15から画像データを取得して内部に記憶する。 The image generating unit 15 (or the image generating unit 15a) generates image data by the process of FIG. 9 (or FIG. 18). The neural network unit 61 acquires the image data from the image generating unit 15 and stores it internally.
 学習部62は、ニューラルネットワーク部61に記憶されている画像データに基づいて、所定の情報処理に用いられるニューラルネットワークの重みを更新する学習処理を行い、学習済みの所定の情報処理モデルを生成する。所定の情報処理は、物体の追跡、認識、又は動作予測の少なくとも一つの処理を含む。 The learning unit 62 performs a learning process to update the weights of the neural network used for the specified information processing based on the image data stored in the neural network unit 61, and generates a trained specified information processing model. The specified information processing includes at least one process of tracking, recognizing, or predicting the movement of an object.
 情報処理部63は、学習済みのニューラルネットワーク部61に、画像生成部15で生成された画像データを入力し、学習済みのニューラルネットワーク部61から出力されたデータに基づいて、所定の情報処理を行う。 The information processing unit 63 inputs the image data generated by the image generating unit 15 to the trained neural network unit 61, and performs predetermined information processing based on the data output from the trained neural network unit 61.
 図20は、情報処理部63による情報処理の例を示す模式図である。図20において、ニューラルネットワーク部61は情報処理モデルMを有する。情報処理部63は、情報処理モデルM及び、被写体H1、H2及びH3が撮像されている画像データG1に基づいて、情報処理を行う。 FIG. 20 is a schematic diagram showing an example of information processing by the information processing unit 63. In FIG. 20, the neural network unit 61 has an information processing model M. The information processing unit 63 performs information processing based on the information processing model M and image data G1 in which subjects H1, H2, and H3 are captured.
 本開示の画像データは、図7Bで説明しているように、被写体の動きを表現できる。これを情報処理モデルMに取り込むことにより、画像データG1において、例えば被写体H1の動線Lを識別、あるいは予測することができる。また、本開示の画像データは、同一の画素30で複数のイベントが発生している場合でも、階調の差により識別が可能である。これにより、例えば被写体H2のイベントと被写体H3のイベントが重なり合って発生している場合においても、被写体H2のイベントを識別することもできる。 The image data of the present disclosure can represent the movement of a subject, as explained in FIG. 7B. By incorporating this into the information processing model M, it is possible to identify or predict, for example, the movement line L of subject H1 in image data G1. Furthermore, the image data of the present disclosure can identify events based on differences in gradation even when multiple events occur at the same pixel 30. This makes it possible to identify the event of subject H2, for example, even when an event of subject H2 and an event of subject H3 occur at the same time.
 このように、第1~第3の実施形態による情報処理装置1で生成された画像データを用いてニューラルネットワークの重みを学習し、学習済みのニューラルネットワークに新たな画像データを入力することにより、ニューラルネットワークから学習結果を反映させたデータを出力することができ、そのデータを用いて種々の情報処理を行うことができる。これにより、第1~第3の実施形態による情報処理装置1で生成された画像データを用いて物体の追跡、認識、又は動作予測などの情報処理を行うことができる。 In this way, the weights of the neural network are learned using image data generated by the information processing device 1 according to the first to third embodiments, and new image data is input to the trained neural network, so that data reflecting the learning results can be output from the neural network, and various information processing can be performed using this data. As a result, information processing such as object tracking, recognition, or motion prediction can be performed using the image data generated by the information processing device 1 according to the first to third embodiments.
 (応用例)
 本開示に係る技術は、様々な製品へ応用することができる。例えば、本開示に係る技術は、自動車、電気自動車、ハイブリッド電気自動車、自動二輪車、自転車、パーソナルモビリティ、飛行機、ドローン、船舶、ロボット、建設機械、農業機械(トラクター)などのいずれかの種類の移動体に搭載される装置として実現されてもよい。
(Application example)
The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, a construction machine, or an agricultural machine (tractor).
 図21は、本開示に係る技術が適用され得る移動体制御システムの一例である車両制御システム7000の概略的な構成例を示すブロック図である。車両制御システム7000は、通信ネットワーク7010を介して接続された複数の電子制御ユニットを備える。図21に示した例では、車両制御システム7000は、駆動系制御ユニット7100、ボディ系制御ユニット7200、バッテリ制御ユニット7300、車外情報検出ユニット7400、車内情報検出ユニット7500、及び統合制御ユニット7600を備える。これらの複数の制御ユニットを接続する通信ネットワーク7010は、例えば、CAN(Controller Area Network)、LIN(Local Interconnect Network)、LAN(Local Area Network)又はFlexRay(登録商標)等の任意の規格に準拠した車載通信ネットワークであってよい。 21 is a block diagram showing a schematic configuration example of a vehicle control system 7000, which is an example of a mobile control system to which the technology disclosed herein can be applied. The vehicle control system 7000 includes a plurality of electronic control units connected via a communication network 7010. In the example shown in FIG. 21, the vehicle control system 7000 includes a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an outside vehicle information detection unit 7400, an inside vehicle information detection unit 7500, and an integrated control unit 7600. The communication network 7010 connecting these multiple control units may be, for example, an in-vehicle communication network conforming to any standard such as CAN (Controller Area Network), LIN (Local Interconnect Network), LAN (Local Area Network), or FlexRay (registered trademark).
 各制御ユニットは、各種プログラムにしたがって演算処理を行うマイクロコンピュータと、マイクロコンピュータにより実行されるプログラム又は各種演算に用いられるパラメータ等を記憶する記憶部と、各種制御対象の装置を駆動する駆動回路とを備える。各制御ユニットは、通信ネットワーク7010を介して他の制御ユニットとの間で通信を行うためのネットワークI/Fを備えるとともに、車内外の装置又はセンサ等との間で、有線通信又は無線通信により通信を行うための通信I/Fを備える。図21では、統合制御ユニット7600の機能構成として、マイクロコンピュータ7610、汎用通信I/F7620、専用通信I/F7630、測位部7640、ビーコン受信部7650、車内機器I/F7660、音声画像出力部7670、車載ネットワークI/F7680及び記憶部7690が図示されている。他の制御ユニットも同様に、マイクロコンピュータ、通信I/F及び記憶部等を備える。 Each control unit includes a microcomputer that performs arithmetic processing according to various programs, a storage unit that stores the programs executed by the microcomputer or parameters used in various calculations, and a drive circuit that drives various devices to be controlled. Each control unit includes a network I/F for communicating with other control units via a communication network 7010, and a communication I/F for communicating with devices or sensors inside and outside the vehicle by wired or wireless communication. In FIG. 21, the functional configuration of the integrated control unit 7600 includes a microcomputer 7610, a general-purpose communication I/F 7620, a dedicated communication I/F 7630, a positioning unit 7640, a beacon receiving unit 7650, an in-vehicle device I/F 7660, an audio/image output unit 7670, an in-vehicle network I/F 7680, and a storage unit 7690. Other control units also include a microcomputer, a communication I/F, a storage unit, and the like.
 駆動系制御ユニット7100は、各種プログラムにしたがって車両の駆動系に関連する装置の動作を制御する。例えば、駆動系制御ユニット7100は、内燃機関又は駆動用モータ等の車両の駆動力を発生させるための駆動力発生装置、駆動力を車輪に伝達するための駆動力伝達機構、車両の舵角を調節するステアリング機構、及び、車両の制動力を発生させる制動装置等の制御装置として機能する。駆動系制御ユニット7100は、ABS(Antilock Brake System)又はESC(Electronic Stability Control)等の制御装置としての機能を有してもよい。 The drive system control unit 7100 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 7100 functions as a control device for a drive force generating device for generating a drive force for the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force for the vehicle. The drive system control unit 7100 may also function as a control device such as an ABS (Antilock Brake System) or ESC (Electronic Stability Control).
 駆動系制御ユニット7100には、車両状態検出部7110が接続される。車両状態検出部7110には、例えば、車体の軸回転運動の角速度を検出するジャイロセンサ、車両の加速度を検出する加速度センサ、あるいは、アクセルペダルの操作量、ブレーキペダルの操作量、ステアリングホイールの操舵角、エンジン回転数又は車輪の回転速度等を検出するためのセンサのうちの少なくとも一つが含まれる。駆動系制御ユニット7100は、車両状態検出部7110から入力される信号を用いて演算処理を行い、内燃機関、駆動用モータ、電動パワーステアリング装置又はブレーキ装置等を制御する。 The drive system control unit 7100 is connected to a vehicle state detection unit 7110. The vehicle state detection unit 7110 includes at least one of the following: a gyro sensor that detects the angular velocity of the axial rotational motion of the vehicle body, an acceleration sensor that detects the acceleration of the vehicle, or a sensor for detecting the amount of operation of the accelerator pedal, the amount of operation of the brake pedal, the steering angle of the steering wheel, the engine speed, or the rotation speed of the wheels. The drive system control unit 7100 performs arithmetic processing using the signal input from the vehicle state detection unit 7110, and controls the internal combustion engine, the drive motor, the electric power steering device, the brake device, etc.
 ボディ系制御ユニット7200は、各種プログラムにしたがって車体に装備された各種装置の動作を制御する。例えば、ボディ系制御ユニット7200は、キーレスエントリシステム、スマートキーシステム、パワーウィンドウ装置、あるいは、ヘッドランプ、バックランプ、ブレーキランプ、ウィンカー又はフォグランプ等の各種ランプの制御装置として機能する。この場合、ボディ系制御ユニット7200には、鍵を代替する携帯機から発信される電波又は各種スイッチの信号が入力され得る。ボディ系制御ユニット7200は、これらの電波又は信号の入力を受け付け、車両のドアロック装置、パワーウィンドウ装置、ランプ等を制御する。 The body system control unit 7200 controls the operation of various devices installed in the vehicle body according to various programs. For example, the body system control unit 7200 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, tail lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals from various switches transmitted from a portable device that replaces a key can be input to the body system control unit 7200. The body system control unit 7200 accepts the input of these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.
 バッテリ制御ユニット7300は、各種プログラムにしたがって駆動用モータの電力供給源である二次電池7310を制御する。例えば、バッテリ制御ユニット7300には、二次電池7310を備えたバッテリ装置から、バッテリ温度、バッテリ出力電圧又はバッテリの残存容量等の情報が入力される。バッテリ制御ユニット7300は、これらの信号を用いて演算処理を行い、二次電池7310の温度調節制御又はバッテリ装置に備えられた冷却装置等の制御を行う。 The battery control unit 7300 controls the secondary battery 7310, which is the power supply source for the drive motor, according to various programs. For example, information such as the battery temperature, battery output voltage, or remaining capacity of the battery is input to the battery control unit 7300 from a battery device equipped with the secondary battery 7310. The battery control unit 7300 performs calculations using these signals, and controls the temperature regulation of the secondary battery 7310 or a cooling device or the like equipped in the battery device.
 車外情報検出ユニット7400は、車両制御システム7000を搭載した車両の外部の情報を検出する。例えば、車外情報検出ユニット7400には、撮像部7410及び車外情報検出部7420のうちの少なくとも一方が接続される。撮像部7410には、ToF(Time Of Flight)カメラ、ステレオカメラ、単眼カメラ、赤外線カメラ及びその他のカメラのうちの少なくとも一つが含まれる。車外情報検出部7420には、例えば、現在の天候又は気象を検出するための環境センサ、あるいは、車両制御システム7000を搭載した車両の周囲の他の車両、障害物又は歩行者等を検出するための周囲情報検出センサのうちの少なくとも一つが含まれる。 The outside vehicle information detection unit 7400 detects information outside the vehicle equipped with the vehicle control system 7000. For example, at least one of the imaging unit 7410 and the outside vehicle information detection unit 7420 is connected to the outside vehicle information detection unit 7400. The imaging unit 7410 includes at least one of a ToF (Time Of Flight) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. The outside vehicle information detection unit 7420 includes at least one of an environmental sensor for detecting the current weather or climate, or a surrounding information detection sensor for detecting other vehicles, obstacles, pedestrians, etc., around the vehicle equipped with the vehicle control system 7000.
 環境センサは、例えば、雨天を検出する雨滴センサ、霧を検出する霧センサ、日照度合いを検出する日照センサ、及び降雪を検出する雪センサのうちの少なくとも一つであってよい。周囲情報検出センサは、超音波センサ、レーダ装置及びLIDAR(Light Detection and Ranging、Laser Imaging Detection and Ranging)装置のうちの少なくとも一つであってよい。これらの撮像部7410及び車外情報検出部7420は、それぞれ独立したセンサないし装置として備えられてもよいし、複数のセンサないし装置が統合された装置として備えられてもよい。 The environmental sensor may be, for example, at least one of a raindrop sensor that detects rain, a fog sensor that detects fog, a sunshine sensor that detects the level of sunlight, and a snow sensor that detects snowfall. The surrounding information detection sensor may be at least one of an ultrasonic sensor, a radar device, and a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device. The imaging unit 7410 and the outside vehicle information detection unit 7420 may each be provided as an independent sensor or device, or may be provided as a device in which multiple sensors or devices are integrated.
 ここで、図22は、撮像部7410及び車外情報検出部7420の設置位置の例を示す。撮像部7910,7912,7914,7916,7918は、例えば、車両7900のフロントノーズ、サイドミラー、リアバンパ、バックドア及び車室内のフロントガラスの上部のうちの少なくとも一つの位置に設けられる。フロントノーズに備えられる撮像部7910及び車室内のフロントガラスの上部に備えられる撮像部7918は、主として車両7900の前方の画像を取得する。サイドミラーに備えられる撮像部7912,7914は、主として車両7900の側方の画像を取得する。リアバンパ又はバックドアに備えられる撮像部7916は、主として車両7900の後方の画像を取得する。車室内のフロントガラスの上部に備えられる撮像部7918は、主として先行車両又は、歩行者、障害物、信号機、交通標識又は車線等の検出に用いられる。 Here, FIG. 22 shows an example of the installation positions of the imaging unit 7410 and the outside vehicle information detection unit 7420. The imaging units 7910, 7912, 7914, 7916, and 7918 are provided, for example, at least one of the front nose, side mirrors, rear bumper, back door, and upper part of the windshield inside the vehicle cabin of the vehicle 7900. The imaging unit 7910 provided on the front nose and the imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 7900. The imaging units 7912 and 7914 provided on the side mirrors mainly acquire images of the sides of the vehicle 7900. The imaging unit 7916 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 7900. The imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin is mainly used to detect leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.
 なお、図22には、それぞれの撮像部7910,7912,7914,7916の撮影範囲の一例が示されている。撮像範囲aは、フロントノーズに設けられた撮像部7910の撮像範囲を示し、撮像範囲b,cは、それぞれサイドミラーに設けられた撮像部7912,7914の撮像範囲を示し、撮像範囲dは、リアバンパ又はバックドアに設けられた撮像部7916の撮像範囲を示す。例えば、撮像部7910,7912,7914,7916で撮像された画像データが重ね合わせられることにより、車両7900を上方から見た俯瞰画像が得られる。 Note that FIG. 22 shows an example of the imaging ranges of the imaging units 7910, 7912, 7914, and 7916. Imaging range a indicates the imaging range of the imaging unit 7910 provided on the front nose, imaging ranges b and c indicate the imaging ranges of the imaging units 7912 and 7914 provided on the side mirrors, and imaging range d indicates the imaging range of the imaging unit 7916 provided on the rear bumper or back door. For example, image data captured by the imaging units 7910, 7912, 7914, and 7916 are superimposed to obtain an overhead image of the vehicle 7900.
 車両7900のフロント、リア、サイド、コーナ及び車室内のフロントガラスの上部に設けられる車外情報検出部7920,7922,7924,7926,7928,7930は、例えば超音波センサ又はレーダ装置であってよい。車両7900のフロントノーズ、リアバンパ、バックドア及び車室内のフロントガラスの上部に設けられる車外情報検出部7920,7926,7930は、例えばLIDAR装置であってよい。これらの車外情報検出部7920~7930は、主として先行車両、歩行者又は障害物等の検出に用いられる。 External information detection units 7920, 7922, 7924, 7926, 7928, and 7930 provided on the front, rear, sides, corners, and upper part of the windshield inside the vehicle 7900 may be, for example, ultrasonic sensors or radar devices. External information detection units 7920, 7926, and 7930 provided on the front nose, rear bumper, back door, and upper part of the windshield inside the vehicle 7900 may be, for example, LIDAR devices. These external information detection units 7920 to 7930 are mainly used to detect preceding vehicles, pedestrians, obstacles, etc.
 図21に戻って説明を続ける。車外情報検出ユニット7400は、撮像部7410に車外の画像を撮像させるとともに、撮像された画像データを受信する。また、車外情報検出ユニット7400は、接続されている車外情報検出部7420から検出情報を受信する。車外情報検出部7420が超音波センサ、レーダ装置又はLIDAR装置である場合には、車外情報検出ユニット7400は、超音波又は電磁波等を発信させるとともに、受信された反射波の情報を受信する。車外情報検出ユニット7400は、受信した情報に基づいて、人、車、障害物、標識又は路面上の文字等の物体検出処理又は距離検出処理を行ってもよい。車外情報検出ユニット7400は、受信した情報に基づいて、降雨、霧又は路面状況等を認識する環境認識処理を行ってもよい。車外情報検出ユニット7400は、受信した情報に基づいて、車外の物体までの距離を算出してもよい。 Returning to FIG. 21, the explanation will be continued. The outside-vehicle information detection unit 7400 causes the imaging unit 7410 to capture an image outside the vehicle, and receives the captured image data. The outside-vehicle information detection unit 7400 also receives detection information from the connected outside-vehicle information detection unit 7420. If the outside-vehicle information detection unit 7420 is an ultrasonic sensor, a radar device, or a LIDAR device, the outside-vehicle information detection unit 7400 transmits ultrasonic waves or electromagnetic waves, and receives information on the received reflected waves. The outside-vehicle information detection unit 7400 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, or characters on the road surface, based on the received information. The outside-vehicle information detection unit 7400 may perform environmental recognition processing for recognizing rainfall, fog, road surface conditions, etc., based on the received information. The outside-vehicle information detection unit 7400 may calculate the distance to an object outside the vehicle based on the received information.
 また、車外情報検出ユニット7400は、受信した画像データに基づいて、人、車、障害物、標識又は路面上の文字等を認識する画像認識処理又は距離検出処理を行ってもよい。車外情報検出ユニット7400は、受信した画像データに対して歪補正又は位置合わせ等の処理を行うとともに、異なる撮像部7410により撮像された画像データを合成して、俯瞰画像又はパノラマ画像を生成してもよい。車外情報検出ユニット7400は、異なる撮像部7410により撮像された画像データを用いて、視点変換処理を行ってもよい。 The outside vehicle information detection unit 7400 may also perform image recognition processing or distance detection processing to recognize people, cars, obstacles, signs, or characters on the road surface based on the received image data. The outside vehicle information detection unit 7400 may perform processing such as distortion correction or alignment on the received image data, and may also generate an overhead image or a panoramic image by synthesizing image data captured by different imaging units 7410. The outside vehicle information detection unit 7400 may also perform viewpoint conversion processing using image data captured by different imaging units 7410.
 車内情報検出ユニット7500は、車内の情報を検出する。車内情報検出ユニット7500には、例えば、運転者の状態を検出する運転者状態検出部7510が接続される。運転者状態検出部7510は、運転者を撮像するカメラ、運転者の生体情報を検出する生体センサ又は車室内の音声を集音するマイク等を含んでもよい。生体センサは、例えば、座面又はステアリングホイール等に設けられ、座席に座った搭乗者又はステアリングホイールを握る運転者の生体情報を検出する。車内情報検出ユニット7500は、運転者状態検出部7510から入力される検出情報に基づいて、運転者の疲労度合い又は集中度合いを算出してもよいし、運転者が居眠りをしていないかを判別してもよい。車内情報検出ユニット7500は、集音された音声信号に対してノイズキャンセリング処理等の処理を行ってもよい。 The in-vehicle information detection unit 7500 detects information inside the vehicle. For example, a driver state detection unit 7510 that detects the state of the driver is connected to the in-vehicle information detection unit 7500. The driver state detection unit 7510 may include a camera that captures an image of the driver, a biosensor that detects the driver's biometric information, or a microphone that collects sound inside the vehicle. The biosensor is provided, for example, on the seat or steering wheel, and detects the biometric information of a passenger sitting in the seat or a driver gripping the steering wheel. The in-vehicle information detection unit 7500 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 7510, or may determine whether the driver is dozing off. The in-vehicle information detection unit 7500 may perform processing such as noise canceling on the collected sound signal.
 統合制御ユニット7600は、各種プログラムにしたがって車両制御システム7000内の動作全般を制御する。統合制御ユニット7600には、入力部7800が接続されている。入力部7800は、例えば、タッチパネル、ボタン、マイクロフォン、スイッチ又はレバー等、搭乗者によって入力操作され得る装置によって実現される。統合制御ユニット7600には、マイクロフォンにより入力される音声を音声認識することにより得たデータが入力されてもよい。入力部7800は、例えば、赤外線又はその他の電波を利用したリモートコントロール装置であってもよいし、車両制御システム7000の操作に対応した携帯電話又はPDA(Personal Digital Assistant)等の外部接続機器であってもよい。入力部7800は、例えばカメラであってもよく、その場合搭乗者はジェスチャにより情報を入力することができる。あるいは、搭乗者が装着したウェアラブル装置の動きを検出することで得られたデータが入力されてもよい。さらに、入力部7800は、例えば、上記の入力部7800を用いて搭乗者等により入力された情報に基づいて入力信号を生成し、統合制御ユニット7600に出力する入力制御回路などを含んでもよい。搭乗者等は、この入力部7800を操作することにより、車両制御システム7000に対して各種のデータを入力したり処理動作を指示したりする。 The integrated control unit 7600 controls the overall operation of the vehicle control system 7000 according to various programs. The input unit 7800 is connected to the integrated control unit 7600. The input unit 7800 is realized by a device that can be operated by the passenger, such as a touch panel, a button, a microphone, a switch, or a lever. Data obtained by voice recognition of a voice input by a microphone may be input to the integrated control unit 7600. The input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an externally connected device such as a mobile phone or a PDA (Personal Digital Assistant) that supports the operation of the vehicle control system 7000. The input unit 7800 may be, for example, a camera, in which case the passenger can input information by gestures. Alternatively, data obtained by detecting the movement of a wearable device worn by the passenger may be input. Furthermore, the input unit 7800 may include, for example, an input control circuit that generates an input signal based on information input by the passenger using the above-mentioned input unit 7800 and outputs the input signal to the integrated control unit 7600. Passengers and others can operate the input unit 7800 to input various data and instruct processing operations to the vehicle control system 7000.
 記憶部7690は、マイクロコンピュータにより実行される各種プログラムを記憶するROM(Read Only Memory)、及び各種パラメータ、演算結果又はセンサ値等を記憶するRAM(Random Access Memory)を含んでいてもよい。また、記憶部7690は、HDD(Hard Disc Drive)等の磁気記憶デバイス、半導体記憶デバイス、光記憶デバイス又は光磁気記憶デバイス等によって実現してもよい。 The memory unit 7690 may include a ROM (Read Only Memory) that stores various programs executed by the microcomputer, and a RAM (Random Access Memory) that stores various parameters, calculation results, sensor values, etc. The memory unit 7690 may also be realized by a magnetic memory device such as a HDD (Hard Disc Drive), a semiconductor memory device, an optical memory device, or a magneto-optical memory device, etc.
 汎用通信I/F7620は、外部環境7750に存在する様々な機器との間の通信を仲介する汎用的な通信I/Fである。汎用通信I/F7620は、GSM(登録商標)(Global System of Mobile communications)、WiMAX(登録商標)、LTE(登録商標)(Long Term Evolution)若しくはLTE-A(LTE-Advanced)などのセルラー通信プロトコル、又は無線LAN(Wi-Fi(登録商標)ともいう)、Bluetooth(登録商標)などのその他の無線通信プロトコルを実装してよい。汎用通信I/F7620は、例えば、基地局又はアクセスポイントを介して、外部ネットワーク(例えば、インターネット、クラウドネットワーク又は事業者固有のネットワーク)上に存在する機器(例えば、アプリケーションサーバ又は制御サーバ)へ接続してもよい。また、汎用通信I/F7620は、例えばP2P(Peer To Peer)技術を用いて、車両の近傍に存在する端末(例えば、運転者、歩行者若しくは店舗の端末、又はMTC(Machine Type Communication)端末)と接続してもよい。 The general-purpose communication I/F 7620 is a general-purpose communication I/F that mediates communication between various devices present in the external environment 7750. The general-purpose communication I/F 7620 may implement cellular communication protocols such as GSM (registered trademark) (Global System of Mobile communications), WiMAX (registered trademark), LTE (registered trademark) (Long Term Evolution) or LTE-A (LTE-Advanced), or other wireless communication protocols such as wireless LAN (also called Wi-Fi (registered trademark)) and Bluetooth (registered trademark). The general-purpose communication I/F 7620 may connect to devices (e.g., application servers or control servers) present on an external network (e.g., the Internet, a cloud network, or an operator-specific network) via, for example, a base station or an access point. In addition, the general-purpose communication I/F 7620 may connect to a terminal located near the vehicle (e.g., a driver's, pedestrian's, or store's terminal, or an MTC (Machine Type Communication) terminal) using, for example, P2P (Peer To Peer) technology.
 専用通信I/F7630は、車両における使用を目的として策定された通信プロトコルをサポートする通信I/Fである。専用通信I/F7630は、例えば、下位レイヤのIEEE802.11pと上位レイヤのIEEE1609との組合せであるWAVE(Wireless Access in Vehicle Environment)、DSRC(Dedicated Short Range Communications)、又はセルラー通信プロトコルといった標準プロトコルを実装してよい。専用通信I/F7630は、典型的には、車車間(Vehicle to Vehicle)通信、路車間(Vehicle to Infrastructure)通信、車両と家との間(Vehicle to Home)の通信及び歩車間(Vehicle to Pedestrian)通信のうちの1つ以上を含む概念であるV2X通信を遂行する。 The dedicated communication I/F 7630 is a communication I/F that supports a communication protocol developed for use in a vehicle. The dedicated communication I/F 7630 may implement a standard protocol such as WAVE (Wireless Access in Vehicle Environment), DSRC (Dedicated Short Range Communications), or a cellular communication protocol, which is a combination of the lower layer IEEE 802.11p and the higher layer IEEE 1609. The dedicated communication I/F 7630 typically performs V2X communication, which is a concept that includes one or more of vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.
 測位部7640は、例えば、GNSS(Global Navigation Satellite System)衛星からのGNSS信号(例えば、GPS(Global Positioning System)衛星からのGPS信号)を受信して測位を実行し、車両の緯度、経度及び高度を含む位置情報を生成する。なお、測位部7640は、無線アクセスポイントとの信号の交換により現在位置を特定してもよく、又は測位機能を有する携帯電話、PHS若しくはスマートフォンといった端末から位置情報を取得してもよい。 The positioning unit 7640 performs positioning by receiving, for example, GNSS signals from GNSS (Global Navigation Satellite System) satellites (for example, GPS signals from GPS (Global Positioning System) satellites), and generates position information including the latitude, longitude, and altitude of the vehicle. The positioning unit 7640 may determine the current position by exchanging signals with a wireless access point, or may obtain position information from a terminal such as a mobile phone, PHS, or smartphone that has a positioning function.
 ビーコン受信部7650は、例えば、道路上に設置された無線局等から発信される電波あるいは電磁波を受信し、現在位置、渋滞、通行止め又は所要時間等の情報を取得する。なお、ビーコン受信部7650の機能は、上述した専用通信I/F7630に含まれてもよい。 The beacon receiver 7650 receives, for example, radio waves or electromagnetic waves transmitted from radio stations installed on the road, and acquires information such as the current location, congestion, road closures, and travel time. The functions of the beacon receiver 7650 may be included in the dedicated communication I/F 7630 described above.
 車内機器I/F7660は、マイクロコンピュータ7610と車内に存在する様々な車内機器7760との間の接続を仲介する通信インタフェースである。車内機器I/F7660は、無線LAN、Bluetooth(登録商標)、NFC(Near Field Communication)又はWUSB(Wireless USB)といった無線通信プロトコルを用いて無線接続を確立してもよい。また、車内機器I/F7660は、図示しない接続端子(及び、必要であればケーブル)を介して、USB(Universal Serial Bus)、HDMI(登録商標)(High-Definition Multimedia Interface、又はMHL(Mobile High-definition Link)等の有線接続を確立してもよい。車内機器7760は、例えば、搭乗者が有するモバイル機器若しくはウェアラブル機器、又は車両に搬入され若しくは取り付けられる情報機器のうちの少なくとも1つを含んでいてもよい。また、車内機器7760は、任意の目的地までの経路探索を行うナビゲーション装置を含んでいてもよい。車内機器I/F7660は、これらの車内機器7760との間で、制御信号又はデータ信号を交換する。 The in-vehicle device I/F 7660 is a communication interface that mediates the connection between the microcomputer 7610 and various in-vehicle devices 7760 present in the vehicle. The in-vehicle device I/F 7660 may establish a wireless connection using a wireless communication protocol such as wireless LAN, Bluetooth (registered trademark), NFC (Near Field Communication), or WUSB (Wireless USB). The in-vehicle device I/F 7660 may also establish a wired connection such as USB (Universal Serial Bus), HDMI (High-Definition Multimedia Interface), or MHL (Mobile High-definition Link) via a connection terminal (and a cable, if necessary) not shown. The in-vehicle device 7760 may include, for example, at least one of a mobile device or wearable device owned by a passenger, or an information device carried into or attached to the vehicle. The in-vehicle device 7760 may also include a navigation device that searches for a route to an arbitrary destination. The in-vehicle device I/F 7660 exchanges control signals or data signals with these in-vehicle devices 7760.
 車載ネットワークI/F7680は、マイクロコンピュータ7610と通信ネットワーク7010との間の通信を仲介するインタフェースである。車載ネットワークI/F7680は、通信ネットワーク7010によりサポートされる所定のプロトコルに則して、信号等を送受信する。 The in-vehicle network I/F 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010. The in-vehicle network I/F 7680 transmits and receives signals in accordance with a specific protocol supported by the communication network 7010.
 統合制御ユニット7600のマイクロコンピュータ7610は、汎用通信I/F7620、専用通信I/F7630、測位部7640、ビーコン受信部7650、車内機器I/F7660及び車載ネットワークI/F7680のうちの少なくとも一つを介して取得される情報に基づき、各種プログラムにしたがって、車両制御システム7000を制御する。例えば、マイクロコンピュータ7610は、取得される車内外の情報に基づいて、駆動力発生装置、ステアリング機構又は制動装置の制御目標値を演算し、駆動系制御ユニット7100に対して制御指令を出力してもよい。例えば、マイクロコンピュータ7610は、車両の衝突回避あるいは衝撃緩和、車間距離に基づく追従走行、車速維持走行、車両の衝突警告、又は車両のレーン逸脱警告等を含むADAS(Advanced Driver Assistance System)の機能実現を目的とした協調制御を行ってもよい。また、マイクロコンピュータ7610は、取得される車両の周囲の情報に基づいて駆動力発生装置、ステアリング機構又は制動装置等を制御することにより、運転者の操作に拠らずに自律的に走行する自動運転等を目的とした協調制御を行ってもよい。 The microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 according to various programs based on information acquired through at least one of the general-purpose communication I/F 7620, the dedicated communication I/F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I/F 7660, and the in-vehicle network I/F 7680. For example, the microcomputer 7610 may calculate the control target value of the driving force generating device, the steering mechanism, or the braking device based on the acquired information inside and outside the vehicle, and output a control command to the drive system control unit 7100. For example, the microcomputer 7610 may perform cooperative control for the purpose of realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc. In addition, the microcomputer 7610 may control the driving force generating device, steering mechanism, braking device, etc. based on the acquired information about the surroundings of the vehicle, thereby performing cooperative control for the purpose of automatic driving, which allows the vehicle to travel autonomously without relying on the driver's operation.
 マイクロコンピュータ7610は、汎用通信I/F7620、専用通信I/F7630、測位部7640、ビーコン受信部7650、車内機器I/F7660及び車載ネットワークI/F7680のうちの少なくとも一つを介して取得される情報に基づき、車両と周辺の構造物や人物等の物体との間の3次元距離情報を生成し、車両の現在位置の周辺情報を含むローカル地図情報を作成してもよい。また、マイクロコンピュータ7610は、取得される情報に基づき、車両の衝突、歩行者等の近接又は通行止めの道路への進入等の危険を予測し、警告用信号を生成してもよい。警告用信号は、例えば、警告音を発生させたり、警告ランプを点灯させたりするための信号であってよい。 The microcomputer 7610 may generate three-dimensional distance information between the vehicle and objects such as surrounding structures and people based on information acquired via at least one of the general-purpose communication I/F 7620, the dedicated communication I/F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle equipment I/F 7660, and the in-vehicle network I/F 7680, and may create local map information including information about the surroundings of the vehicle's current position. The microcomputer 7610 may also predict dangers such as vehicle collisions, the approach of pedestrians, or entry into closed roads based on the acquired information, and generate warning signals. The warning signals may be, for example, signals for generating warning sounds or turning on warning lights.
 音声画像出力部7670は、車両の搭乗者又は車外に対して、視覚的又は聴覚的に情報を通知することが可能な出力装置へ音声及び画像のうちの少なくとも一方の出力信号を送信する。図21の例では、出力装置として、オーディオスピーカ7710、表示部7720及びインストルメントパネル7730が例示されている。表示部7720は、例えば、オンボードディスプレイ及びヘッドアップディスプレイの少なくとも一つを含んでいてもよい。表示部7720は、AR(Augmented Reality)表示機能を有していてもよい。出力装置は、これらの装置以外の、ヘッドホン、搭乗者が装着する眼鏡型ディスプレイ等のウェアラブルデバイス、プロジェクタ又はランプ等の他の装置であってもよい。出力装置が表示装置の場合、表示装置は、マイクロコンピュータ7610が行った各種処理により得られた結果又は他の制御ユニットから受信された情報を、テキスト、イメージ、表、グラフ等、様々な形式で視覚的に表示する。また、出力装置が音声出力装置の場合、音声出力装置は、再生された音声データ又は音響データ等からなるオーディオ信号をアナログ信号に変換して聴覚的に出力する。 The audio/image output unit 7670 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of FIG. 21, an audio speaker 7710, a display unit 7720, and an instrument panel 7730 are illustrated as output devices. The display unit 7720 may include, for example, at least one of an on-board display and a head-up display. The display unit 7720 may have an AR (Augmented Reality) display function. The output device may be other devices such as headphones, a wearable device such as a glasses-type display worn by the passenger, a projector, or a lamp, in addition to these devices. When the output device is a display device, the display device visually displays the results obtained by various processes performed by the microcomputer 7610 or information received from other control units in various formats such as text, images, tables, graphs, etc. When the output device is an audio output device, the audio output device converts an audio signal consisting of reproduced audio data or acoustic data into an analog signal and audibly outputs it.
 なお、図21に示した例において、通信ネットワーク7010を介して接続された少なくとも二つの制御ユニットが一つの制御ユニットとして一体化されてもよい。あるいは、個々の制御ユニットが、複数の制御ユニットにより構成されてもよい。さらに、車両制御システム7000が、図示されていない別の制御ユニットを備えてもよい。また、上記の説明において、いずれかの制御ユニットが担う機能の一部又は全部を、他の制御ユニットに持たせてもよい。つまり、通信ネットワーク7010を介して情報の送受信がされるようになっていれば、所定の演算処理が、いずれかの制御ユニットで行われるようになってもよい。同様に、いずれかの制御ユニットに接続されているセンサ又は装置が、他の制御ユニットに接続されるとともに、複数の制御ユニットが、通信ネットワーク7010を介して相互に検出情報を送受信してもよい。 In the example shown in FIG. 21, at least two control units connected via the communication network 7010 may be integrated into one control unit. Alternatively, each control unit may be composed of multiple control units. Furthermore, the vehicle control system 7000 may include another control unit not shown. In the above description, some or all of the functions performed by any control unit may be provided by another control unit. In other words, as long as information is transmitted and received via the communication network 7010, a specified calculation process may be performed by any control unit. Similarly, a sensor or device connected to any control unit may be connected to another control unit, and multiple control units may transmit and receive detection information to each other via the communication network 7010.
 なお、図1を用いて説明した本実施形態に係るイベント処理部3及びアプリケーション部4の各機能を実現するためのコンピュータプログラムを、いずれかの制御ユニット等に実装することができる。また、このようなコンピュータプログラムが格納された、コンピュータで読み取り可能な記録媒体を提供することもできる。記録媒体は、例えば、磁気ディスク、光ディスク、光磁気ディスク、フラッシュメモリ等である。また、上記のコンピュータプログラムは、記録媒体を用いずに、例えばネットワークを介して配信されてもよい。 Note that a computer program for implementing each function of the event processing unit 3 and application unit 4 according to this embodiment described with reference to FIG. 1 can be implemented in any of the control units, etc. Also, a computer-readable recording medium on which such a computer program is stored can also be provided. The recording medium is, for example, a magnetic disk, an optical disk, a magneto-optical disk, a flash memory, etc. Also, the above computer program may be distributed, for example, via a network, without using a recording medium.
 なお、本技術は以下のような構成を取ることができる。
(1)入射光の光量の変化量に基づくイベントを検出する光検出素子を有する画素と、
 複数の単位期間のそれぞれで検出された前記イベントの情報を含む画素データを生成する画素データ生成部と、を備える、
 情報処理装置。
(2)前記画素データは、前記イベントの検出時期及び検出頻度に応じた画素値を有する、
 (1)に記載の情報処理装置。
(3)前記画素データは、前記イベントの検出時期が新しいほど、及び前記イベントの検出頻度が多いほど、より大きな画素値を有する、
 (2)に記載の情報処理装置。
(4)前記画素データは、前記複数の単位期間の数に応じた階調数又は輝度を有する、
 (2)又は(3)に記載の情報処理装置。
(5)前記画素データは、複数ビットのビット列データであり、
 前記ビット列データの上位ビット側から下位ビット側に向かって、より古い前記単位期間の前記イベントの情報が配置される、
 (1)乃至(4)のいずれか一項に記載の情報処理装置。
(6)前記イベントの情報は、前記単位期間ごとに1ビット以上で表される、
 (5)に記載の情報処理装置。
(7)前記画素データは、前記単位期間ごとに、前記イベントの極性を表す情報を含む、
 (1)乃至(6)のいずれか一項に記載の情報処理装置。
(8)前記複数の単位期間は同一の時間幅を有する、
 (1)乃至(7)のいずれか一項に記載の情報処理装置。
(9)前記複数の単位期間は、古い時間ほどより長い時間幅を有する、
 (1)乃至(7)のいずれか一項に記載の情報処理装置。
(10)一次元又は二次元方向に配列された複数の前記画素と、
 前記複数の画素を含むフレーム単位で、所定の期間内に発生された前記イベントの情報を含むフレームデータを生成するフレーム生成部と、
 前記フレームデータを時間軸方向に複数に分割して複数の分割フレームデータを生成する分割フレーム生成部と、を備え、
 前記画素データ生成部は、前記複数の画素のそれぞれごとに、前記複数の分割フレームデータのそれぞれに含まれる、対応する画素の前記イベントの情報に基づいて前記画素データを生成する、
 (1)乃至(9)のいずれか一項に記載の情報処理装置。
(11)時間軸方向に隣り合う2つの前記フレームデータ同士は、重複する時間範囲内に発生された前記イベントの情報を含む、
 (10)に記載の情報処理装置。
(12)前記重複する時間範囲は、前記単位期間の整数倍の長さを有する、
 (11)に記載の情報処理装置。
(13)前記画素データ生成部は、前記画素データの各ビットを、それぞれ異なる前記分割フレームデータに対応づけて、対応する前記分割フレームデータ内の対応する画素の前記イベントの情報に基づいて前記画素データの対応するビット値を生成する、
 (10)乃至(12)のいずれか一項に記載の情報処理装置。
(14)前記画素データ生成部は、前記画素データの上位ビット側のビット値を、より新しい前記分割フレームデータ内の対応する画素の前記イベントの情報に基づいて生成する、
 (13)に記載の情報処理装置。
(15)前記分割フレーム生成部は、前記フレームデータを同一の時間長さの前記単位期間の前記複数の分割フレームデータに分割する、
 (10)乃至(14)のいずれか一項に記載の情報処理装置。
(16)前記分割フレーム生成部は、前記フレームデータをそれぞれ異なる時間長さの前記単位期間の前記複数の分割フレームデータに分割する、
 (10)乃至(14)のいずれか一項に記載の情報処理装置。
(17)前記分割フレーム生成部は、より新しい時間ほど、前記分割フレームデータの時間長さをより短くする、
 (16)に記載の情報処理装置。
(18)前記複数の画素に対応する複数の前記画素データに基づいてフレーム画像を生成するフレーム画像生成部を備える、
 (10)乃至(17)のいずれか一項に記載の情報処理装置。
(19)前記フレーム画像生成部は、画素ごとに、前記イベントの検出時刻及び検出頻度に応じた階調を有し、かつ、時間軸方向に隣り合う2つの前記フレーム画像に、重複する時間範囲内の前記イベントの情報が含まれるように前記フレーム画像を生成する、
 (18)に記載の情報処理装置。
(20)前記フレーム画像に基づいて、物体の追跡、認識、又は動作予測の少なくとも一つの処理を含む所定の情報処理に用いられるニューラルネットワークの重みを更新する学習処理を行う学習部と、
 前記学習処理を行った前記ニューラルネットワークと、前記フレーム画像とに基づいて、前記所定の情報処理を行う情報処理部と、を備える、
 (18)又は(19)に記載の情報処理装置。
The present technology can be configured as follows.
(1) A pixel having a light detection element that detects an event based on a change in the amount of incident light;
a pixel data generating unit configured to generate pixel data including information on the event detected in each of a plurality of unit periods;
Information processing device.
(2) the pixel data has a pixel value corresponding to a detection time and a detection frequency of the event;
An information processing device as described in (1).
(3) the pixel data has a larger pixel value as the event is detected more recently and as the event is detected more frequently;
An information processing device as described in (2).
(4) The pixel data has a number of gradations or a luminance corresponding to the number of the plurality of unit periods.
An information processing device according to (2) or (3).
(5) The pixel data is bit string data having a plurality of bits,
information of the events in the unit period that are older than the first bit is arranged from the most significant bit side to the least significant bit side of the bit string data;
An information processing device according to any one of (1) to (4).
(6) The event information is represented by one or more bits for each unit period.
An information processing device according to (5).
(7) The pixel data includes information representing a polarity of the event for each unit period.
An information processing device according to any one of (1) to (6).
(8) The plurality of unit periods have the same time width.
An information processing device according to any one of (1) to (7).
(9) The plurality of unit periods have a longer time width as the unit periods are older.
An information processing device according to any one of (1) to (7).
(10) A plurality of the pixels arranged in a one-dimensional or two-dimensional direction;
a frame generation unit that generates frame data including information on the event that has occurred within a predetermined period, for each frame including the plurality of pixels;
a divided frame generating unit that divides the frame data into a plurality of pieces in a time axis direction to generate a plurality of divided frame data,
the pixel data generation unit generates, for each of the plurality of pixels, the pixel data based on information of the event of the corresponding pixel, the information being included in each of the plurality of divided frame data;
An information processing device according to any one of (1) to (9).
(11) Two pieces of frame data adjacent to each other in the time axis direction include information of the events occurring within an overlapping time range.
An information processing device according to (10).
(12) The overlapping time ranges have a length that is an integer multiple of the unit period.
An information processing device according to (11).
(13) The pixel data generation unit associates each bit of the pixel data with a different one of the divided frame data, and generates a corresponding bit value of the pixel data based on information of the event of a corresponding pixel in the corresponding divided frame data.
An information processing device according to any one of (10) to (12).
(14) The pixel data generation unit generates a bit value on a higher-order bit side of the pixel data based on information of the event of a corresponding pixel in newer divided frame data.
An information processing device according to (13).
(15) The divided frame generation unit divides the frame data into the plurality of divided frame data of the unit period having the same time length.
An information processing device according to any one of (10) to (14).
(16) The divided frame generation unit divides the frame data into the plurality of divided frame data of the unit periods each having a different time length.
An information processing device according to any one of (10) to (14).
(17) The divided frame generation unit shortens the time length of the divided frame data as the time becomes newer.
An information processing device according to (16).
(18) A frame image generating unit that generates a frame image based on a plurality of the pixel data corresponding to the plurality of pixels.
An information processing device according to any one of (10) to (17).
(19) The frame image generating unit generates the frame images such that each pixel has a gradation corresponding to a detection time and a detection frequency of the event, and two frame images adjacent to each other in a time axis direction contain information of the event within an overlapping time range.
An information processing device according to (18).
(20) A learning unit that performs a learning process to update weights of a neural network used for predetermined information processing including at least one of object tracking, object recognition, and object motion prediction, based on the frame images; and
an information processing unit that performs the predetermined information processing based on the neural network that has performed the learning process and the frame images,
An information processing device according to (18) or (19).
 本開示の態様は、上述した個々の実施形態に限定されるものではなく、当業者が想到しうる種々の変形も含むものであり、本開示の効果も上述した内容に限定されない。すなわち、特許請求の範囲に規定された内容およびその均等物から導き出される本開示の概念的な思想と趣旨を逸脱しない範囲で種々の追加、変更および部分的削除が可能である。 The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by a person skilled in the art, and the effects of the present disclosure are not limited to the above. In other words, various additions, modifications, and partial deletions are possible within the scope that does not deviate from the conceptual idea and intent of the present disclosure derived from the contents defined in the claims and their equivalents.
 1、1a 情報処理装置、2、2a センサ、3 イベント処理部、4、4a アプリケーション部、5 表示部、11 イベント取得部、12 デコード部、13 フレーム生成部、14 イベント蓄積部、15、15a 画像生成部、21 画素アレイ部、22 垂直駆動部、23 信号処理部、30、30a 画素、31 光電変換素子、32、32a 画素回路、33 電荷電圧変換部、34 バッファ、35 微分回路、36、36a 量子化器、37 対数応答部、41 画素チップ、41a 第1画素チップ、41b 第2画素チップ、42 ロジックチップ、51 分割フレーム生成部、52 画素データ生成部、53 フレーム画像生成部、54 マッピング部、55 シフト部、56 記憶部、60 重み付け部、61 ニューラルネットワーク部、62 学習部、63 情報処理部  1, 1a Information processing device, 2, 2a Sensor, 3 Event processing unit, 4, 4a Application unit, 5 Display unit, 11 Event acquisition unit, 12 Decode unit, 13 Frame generation unit, 14 Event storage unit, 15, 15a Image generation unit, 21 Pixel array unit, 22 Vertical drive unit, 23 Signal processing unit, 30, 30a Pixel, 31 Photoelectric conversion element, 32, 32a Pixel circuit, 33 Charge-to-voltage conversion unit, 34 Buffer, 35 Differential circuit, 36, 36a Quantizer, 37 Logarithmic response unit, 41 Pixel chip, 41a First pixel chip, 41b Second pixel chip, 42 Logic chip, 51 Split frame generation unit, 52 Pixel data generation unit, 53 Frame image generation unit, 54 Mapping unit, 55 Shift unit, 56 Memory unit, 60 Weighting unit, 61 Neural network unit, 62 Learning unit, 63 Information processing unit

Claims (20)

  1.  入射光の光量の変化量に基づくイベントを検出する光検出素子を有する画素と、
     複数の単位期間のそれぞれで検出された前記イベントの情報を含む画素データを生成する画素データ生成部と、を備える、
     情報処理装置。
    A pixel having a light detection element that detects an event based on a change in the amount of incident light;
    a pixel data generating unit configured to generate pixel data including information on the event detected in each of a plurality of unit periods;
    Information processing device.
  2.  前記画素データは、前記イベントの検出時期及び検出頻度に応じた画素値を有する、
     請求項1に記載の情報処理装置。
    the pixel data has a pixel value corresponding to a detection time and a detection frequency of the event;
    The information processing device according to claim 1 .
  3.  前記画素データは、前記イベントの検出時期が新しいほど、及び前記イベントの検出頻度が多いほど、より大きな画素値を有する、
     請求項2に記載の情報処理装置。
    The pixel data has a larger pixel value as the event is detected more recently and as the event is detected more frequently.
    The information processing device according to claim 2 .
  4.  前記画素データは、前記複数の単位期間の数に応じた階調数又は輝度を有する、
     請求項2に記載の情報処理装置。
    the pixel data has a number of gradations or luminance corresponding to the number of the plurality of unit periods;
    The information processing device according to claim 2 .
  5.  前記画素データは、複数ビットのビット列データであり、
     前記ビット列データの上位ビット側から下位ビット側に向かって、より古い前記単位期間の前記イベントの情報が配置される、
     請求項1に記載の情報処理装置。
    the pixel data is a bit string data of a plurality of bits,
    information of the events in the unit period that are older than the first bit is arranged from the most significant bit side to the least significant bit side of the bit string data;
    The information processing device according to claim 1 .
  6.  前記イベントの情報は、前記単位期間ごとに1ビット以上で表される、
     請求項5に記載の情報処理装置。
    The event information is represented by one or more bits for each unit period.
    The information processing device according to claim 5 .
  7.  前記画素データは、前記単位期間ごとに、前記イベントの極性を表す情報を含む、
     請求項1に記載の情報処理装置。
    the pixel data includes information representing a polarity of the event for each unit period;
    The information processing device according to claim 1 .
  8.  前記複数の単位期間は同一の時間幅を有する、
     請求項1に記載の情報処理装置。
    The plurality of unit periods have the same time width.
    The information processing device according to claim 1 .
  9.  前記複数の単位期間は、古い時間ほどより長い時間幅を有する、
     請求項1に記載の情報処理装置。
    The plurality of unit periods have a longer time width as the time increases.
    The information processing device according to claim 1 .
  10.  一次元又は二次元方向に配列された複数の前記画素と、
     前記複数の画素を含むフレーム単位で、所定の期間内に発生された前記イベントの情報を含むフレームデータを生成するフレーム生成部と、
     前記フレームデータを時間軸方向に複数に分割して複数の分割フレームデータを生成する分割フレーム生成部と、を備え、
     前記画素データ生成部は、前記複数の画素のそれぞれごとに、前記複数の分割フレームデータのそれぞれに含まれる、対応する画素の前記イベントの情報に基づいて前記画素データを生成する、
     請求項1に記載の情報処理装置。
    A plurality of the pixels arranged in a one-dimensional or two-dimensional direction;
    a frame generating unit that generates frame data including information on the event that has occurred within a predetermined period, for each frame including the plurality of pixels;
    a divided frame generating unit that divides the frame data into a plurality of pieces in a time axis direction to generate a plurality of divided frame data,
    the pixel data generation unit generates, for each of the plurality of pixels, the pixel data based on information of the event of the corresponding pixel, the information being included in each of the plurality of divided frame data;
    The information processing device according to claim 1 .
  11.  時間軸方向に隣り合う2つの前記フレームデータ同士は、重複する時間範囲内に発生された前記イベントの情報を含む、
     請求項10に記載の情報処理装置。
    Two adjacent frames of data in the time axis direction include information of the events occurring within an overlapping time range.
    The information processing device according to claim 10.
  12.  前記重複する時間範囲は、前記単位期間の整数倍の長さを有する、
     請求項11に記載の情報処理装置。
    The overlapping time ranges have a length that is an integer multiple of the unit period.
    The information processing device according to claim 11.
  13.  前記画素データ生成部は、前記画素データの各ビットを、それぞれ異なる前記分割フレームデータに対応づけて、対応する前記分割フレームデータ内の対応する画素の前記イベントの情報に基づいて前記画素データの対応するビット値を生成する、
     請求項10に記載の情報処理装置。
    the pixel data generation unit generates a corresponding bit value of the pixel data based on the event information of a corresponding pixel in the corresponding divided frame data by associating each bit of the pixel data with a different one of the divided frame data.
    The information processing device according to claim 10.
  14.  前記画素データ生成部は、前記画素データの上位ビット側のビット値を、より新しい前記分割フレームデータ内の対応する画素の前記イベントの情報に基づいて生成する、
     請求項13に記載の情報処理装置。
    the pixel data generation unit generates a bit value on a higher-order bit side of the pixel data based on information of the event of a corresponding pixel in newer divided frame data;
    The information processing device according to claim 13.
  15.  前記分割フレーム生成部は、前記フレームデータを同一の時間長さの前記単位期間の前記複数の分割フレームデータに分割する、
     請求項10に記載の情報処理装置。
    the divided frame generation unit divides the frame data into the plurality of divided frame data of the unit period having the same time length;
    The information processing device according to claim 10.
  16.  前記分割フレーム生成部は、前記フレームデータをそれぞれ異なる時間長さの前記単位期間の前記複数の分割フレームデータに分割する、
     請求項10に記載の情報処理装置。
    the divided frame generation unit divides the frame data into the plurality of divided frame data of the unit period each having a different time length;
    The information processing device according to claim 10.
  17.  前記分割フレーム生成部は、より新しい時間ほど、前記分割フレームデータの時間長さをより短くする、
     請求項16に記載の情報処理装置。
    the divided frame generation unit shortens the time length of the divided frame data as the time becomes newer.
    The information processing device according to claim 16.
  18.  前記複数の画素に対応する複数の前記画素データに基づいてフレーム画像を生成するフレーム画像生成部を備える、
     請求項10に記載の情報処理装置。
    a frame image generating unit that generates a frame image based on the plurality of pixel data corresponding to the plurality of pixels,
    The information processing device according to claim 10.
  19.  前記フレーム画像生成部は、画素ごとに、前記イベントの検出時刻及び検出頻度に応じた階調を有し、かつ、時間軸方向に隣り合う2つの前記フレーム画像に、重複する時間範囲内の前記イベントの情報が含まれるように前記フレーム画像を生成する、
     請求項18に記載の情報処理装置。
    the frame image generation section generates the frame images such that each pixel has a gradation corresponding to a detection time and a detection frequency of the event, and two frame images adjacent in a time axis direction contain information of the event within an overlapping time range.
    The information processing device according to claim 18.
  20.  前記フレーム画像に基づいて、物体の追跡、認識、又は動作予測の少なくとも一つの処理を含む所定の情報処理に用いられるニューラルネットワークの重みを更新する学習処理を行う学習部と、
     前記学習処理を行った前記ニューラルネットワークと、前記フレーム画像とに基づいて、前記所定の情報処理を行う情報処理部と、を備える、
     請求項18に記載の情報処理装置。
    a learning unit that performs a learning process to update weights of a neural network used for predetermined information processing including at least one of object tracking, object recognition, and object motion prediction, based on the frame images;
    an information processing unit that performs the predetermined information processing based on the neural network that has performed the learning process and the frame images,
    The information processing device according to claim 18.
PCT/JP2023/039183 2022-11-11 2023-10-31 Information processing device WO2024101210A1 (en)

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US20210279890A1 (en) * 2018-11-27 2021-09-09 Omnivision Sensor Solution (Shanghai) Co., Ltd Target tracking method and computing device
JP2022111437A (en) * 2021-01-20 2022-08-01 キヤノン株式会社 Motion vector calculation device, imaging apparatus, and motion vector calculation method
WO2022190598A1 (en) * 2021-03-09 2022-09-15 ソニーグループ株式会社 Information processing apparatus, information processing method, program, and imaging system

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210279890A1 (en) * 2018-11-27 2021-09-09 Omnivision Sensor Solution (Shanghai) Co., Ltd Target tracking method and computing device
JP2022111437A (en) * 2021-01-20 2022-08-01 キヤノン株式会社 Motion vector calculation device, imaging apparatus, and motion vector calculation method
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