WO2024093626A1 - Overvoltage output protection method for critical mode power factor correction (pfc) circuit - Google Patents

Overvoltage output protection method for critical mode power factor correction (pfc) circuit Download PDF

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WO2024093626A1
WO2024093626A1 PCT/CN2023/123845 CN2023123845W WO2024093626A1 WO 2024093626 A1 WO2024093626 A1 WO 2024093626A1 CN 2023123845 W CN2023123845 W CN 2023123845W WO 2024093626 A1 WO2024093626 A1 WO 2024093626A1
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pfc
circuit
power factor
factor correction
overvoltage
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PCT/CN2023/123845
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French (fr)
Chinese (zh)
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胡成煜
王乃龙
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北京芯格诺微电子有限公司
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Publication of WO2024093626A1 publication Critical patent/WO2024093626A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/20Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/0092Details of emergency protective circuit arrangements concerning the data processing means, e.g. expert systems, neural networks
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to the technical field of integrated circuits, and in particular to an overvoltage output protection method for a critical mode power factor correction (PFC) circuit.
  • PFC critical mode power factor correction
  • a power factor correction (PFC) circuit When the power of an LED display device is greater than 75W, a power factor correction (PFC) circuit must be used to ensure that the power factor and harmonics of the LED display device meet national safety standards.
  • PFC power factor correction
  • OVP overvoltage protection
  • the overvoltage protection means in the prior art generally include three methods.
  • One is to obtain the voltage level of the output voltage V bus of the power factor correction PFC circuit through the FB pin of the PFC control chip to determine whether the output voltage V bus exceeds the overvoltage protection threshold and thus decide whether to shut down the power factor correction PFC circuit;
  • the second is to set a second overvoltage protection means, that is, set a second OVP, based on the above-mentioned overvoltage protection judgment through the FB pin of the PFC control chip, and use the FB2 pin of the PFC control chip to judge the voltage level of the output voltage V bus ;
  • the third is to use the characteristic that the ZCD platform voltage is proportional to V bus -V in to monitor the ZCD platform, that is, to monitor the V bus -V in voltage, and when the threshold is exceeded, the overvoltage protection is activated to shut down the power factor correction PFC circuit.
  • the above-mentioned overvoltage protection method in the prior art has the defect that when using the FB pin or FB2 pin of the PFC control chip to judge overvoltage protection, it is too dependent on the reliability of the resistor voltage division of the FB pin or FB2 pin. If the resistor voltage division of the FB/FB2 pin is completely open or short-circuited, overvoltage protection can be achieved. However, if the voltage division resistor is half short-circuited/half open due to PCB leakage or other reasons, overvoltage protection cannot be achieved. This situation is more common when flux is used in factory production.
  • the first defect is that each AC half-wave can only be detected once (at the AC steamed wave peak), because V bus -V in follows V in (steamed wave) changes. It is obviously unreasonable to judge at the bottom of the half-wave, so the protection is slow.
  • the technical purpose to be achieved by the present invention is to provide an overvoltage output protection method for a critical mode power factor correction (PFC) circuit, wherein the overvoltage output protection method can set different overvoltage protection thresholds for different input voltages in real time, thereby avoiding the defect of a protection point being too low when the input voltage is in a high voltage state due to a single overvoltage protection threshold voltage.
  • PFC critical mode power factor correction
  • the present invention provides an overvoltage output protection method for a critical mode power factor correction (PFC) circuit, the method comprising:
  • the estimated output voltage V bus is calculated according to the following formula:
  • the actual output voltage V bus is judged according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be activated.
  • the discharge time T on of the inductor in the power factor correction PFC circuit is determined by a PWM control signal, and the discharge time T on of the inductor is the conduction time of the MOSFET transistor in the power factor correction PFC circuit controlled by the PFC control chip.
  • the calculation of the estimated value of the output voltage V bus is implemented by a fixed calculation circuit, an MCU program or an analog circuit provided in the PFC control chip.
  • Another aspect of the present invention is to provide an overvoltage output protection system for a critical mode power factor correction PFC circuit, the system comprising applying a PWM control signal to the power factor correction PFC circuit using a PFC control chip;
  • the PFC control chip is provided with an input voltage sampling circuit, and the input voltage Vin of the power factor correction PFC circuit is obtained according to the input voltage sampling circuit;
  • the PFC control chip is also provided with a ZCD zero current detection module, and the discharge time length Tr of the inductor in the power factor correction PFC circuit is obtained according to the ZCD zero current detection module;
  • the PFC control chip also includes a calculation unit, and the calculation unit is used to calculate the estimated value of the output voltage V bus according to the input voltage Vin , the discharge time length Tr of the inductor, and the discharge time length T on of the inductor in the power factor correction PFC circuit determined by the PWM control signal;
  • the PFC control chip superimposes an overvoltage protection floating value on the estimated value of the output voltage V bus to generate an overvoltage output protection voltage threshold; and determines the actual output voltage V bus according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be started.
  • one or more embodiments of the present invention may have the following inventive features and advantages:
  • the voltage threshold of its overvoltage protection is not limited by the AC half-wave phase (not limited to the AC wave peak point, but all the time), nor is it affected by the high or low Vin RMS voltage, and can provide an accurate and unified protection threshold. The safety and applicability of overvoltage protection are greatly improved.
  • FIG1 is a schematic diagram of the structure of an overvoltage output protection system of a power factor correction (PFC) circuit of the present invention
  • FIG. 2 is a flow chart of an overvoltage output protection method for a power factor correction (PFC) circuit according to the present invention.
  • Coupled refers to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are in physical contact with each other.
  • transmission refers to direct and indirect communication.
  • rejection refers to including but not limited to.
  • communication refers to direct and indirect communication.
  • include and “comprising” and their derivatives refer to including but not limited to.
  • include and “comprising” and their derivatives refer to including but not limited to.
  • the term “or” is inclusive, meaning and/or.
  • controller refers to any device, system or part thereof that controls at least one operation. Such a controller can be implemented with hardware, or a combination of hardware and software and/or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote.
  • phrases "at least one of”, when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be required.
  • “at least one of A, B, C” includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.
  • any end of the resistor, capacitor or inductor in an actual device can be defined as the first end, and when the first end is defined, the other end of the device is automatically defined as the second end.
  • a PFC control chip is used to apply a PWM control signal to the power factor correction PFC circuit.
  • the PFC control chip is provided with an input voltage sampling circuit, and the input voltage Vin of the power factor correction PFC circuit is obtained according to the input voltage sampling circuit; at the same time, the PFC control chip is also provided with a ZCD zero current detection module, and the discharge time length Tr of the inductor in the power factor correction PFC circuit is obtained according to the ZCD zero current detection module.
  • the overvoltage output protection method of the power factor correction (PFC) circuit of this embodiment includes:
  • the estimated output voltage V bus is calculated according to the following formula:
  • the actual output voltage V bus is judged according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be activated.
  • the discharge time T on of the inductor in the power factor correction PFC circuit is determined by a PWM control signal, and the discharge time T on of the inductor is the conduction time of the MOSFET transistor in the power factor correction PFC circuit controlled by the PFC control chip.
  • the calculation of the estimated value of the output voltage V bus is implemented by a fixed calculation circuit, an MCU program or an analog circuit provided in the PFC control chip.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Artificial Intelligence (AREA)
  • Evolutionary Computation (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)

Abstract

Disclosed in the present invention is an overvoltage output protection method for a critical mode power factor correction (PFC) circuit, comprising: acquiring an input voltage Vin of a power factor correction (PFC) circuit; acquiring a discharge duration Tr of an inductor in the power factor correction (PFC) circuit; acquiring a discharge duration Ton of the inductor in the power factor correction (PFC) circuit; adding an overvoltage protection floating value to an estimated value of an output voltage Vbus, so as to generate an overvoltage output protection voltage threshold; and, according to the overvoltage output protection voltage threshold, determining an actual output voltage Vbus, so as to determine whether an overvoltage output protection needs to be started.

Description

临界模式功率因数校正PFC电路的过压输出保护方法Overvoltage output protection method for critical mode power factor correction (PFC) circuit 技术领域Technical Field
本发明涉及集成电路技术领域,尤其涉及一种临界模式功率因数校正PFC电路的过压输出保护方法。The present invention relates to the technical field of integrated circuits, and in particular to an overvoltage output protection method for a critical mode power factor correction (PFC) circuit.
背景技术Background technique
根据国家电视行业安规要求,LED显示装置的功率大于75W时,必须使用功率因数校正PFC(Power Factor Correction)电路,以使LED显示装置的功率因数及谐波满足国家安规标准。在现有技术中的功率因数校正PFC电路中,功率因数校正PFC电路的输出电压需通过设置过压保护OVP(Over Voltage Protection)手段来防止PFC电路异常时造成后续电路器件损坏。现有技术中的过压保护手段一般包括三种方式,一是通过PFC控制芯片的FB引脚获取功率因数校正PFC电路的输出电压Vbus的电压水平来判断输出电压Vbus是否超出过压保护阈值从而决定是否关闭功率因数校正PFC电路;二是在上述通过PFC控制芯片的FB引脚判断过压保护的基础上,设置第二过压保护手段,即设置第二OVP,利用PFC控制芯片的FB2引脚进行输出电压Vbus的电压水平来判断;三是利用ZCD平台电压和Vbus-Vin成正比的特性,对ZCD平台进行监控,即对Vbus-Vin电压进行监控,超过阈值时既启动过压保护关闭功率因数校正PFC电路。According to the national television industry safety regulations, when the power of an LED display device is greater than 75W, a power factor correction (PFC) circuit must be used to ensure that the power factor and harmonics of the LED display device meet national safety standards. In the prior art power factor correction (PFC) circuit, the output voltage of the power factor correction (PFC) circuit needs to be protected by an overvoltage protection (OVP) to prevent damage to subsequent circuit components when the PFC circuit is abnormal. The overvoltage protection means in the prior art generally include three methods. One is to obtain the voltage level of the output voltage V bus of the power factor correction PFC circuit through the FB pin of the PFC control chip to determine whether the output voltage V bus exceeds the overvoltage protection threshold and thus decide whether to shut down the power factor correction PFC circuit; the second is to set a second overvoltage protection means, that is, set a second OVP, based on the above-mentioned overvoltage protection judgment through the FB pin of the PFC control chip, and use the FB2 pin of the PFC control chip to judge the voltage level of the output voltage V bus ; the third is to use the characteristic that the ZCD platform voltage is proportional to V bus -V in to monitor the ZCD platform, that is, to monitor the V bus -V in voltage, and when the threshold is exceeded, the overvoltage protection is activated to shut down the power factor correction PFC circuit.
针对现有技术中的上述过压保护方法,其缺陷在于,在利用PFC控制芯片的FB引脚或FB2引脚进行过压保护判断时,过于依赖于FB引脚或FB2引脚电阻分压的可靠性。如果FB/FB2引脚的电阻分压完全断路或者短路可以实现过压保护。但如果是PCB漏电等原因产生的分压电阻半短路/半断路,则会无法实现过压保护。这种情况在工厂生产使用助焊剂的情况下比较常见。The above-mentioned overvoltage protection method in the prior art has the defect that when using the FB pin or FB2 pin of the PFC control chip to judge overvoltage protection, it is too dependent on the reliability of the resistor voltage division of the FB pin or FB2 pin. If the resistor voltage division of the FB/FB2 pin is completely open or short-circuited, overvoltage protection can be achieved. However, if the voltage division resistor is half short-circuited/half open due to PCB leakage or other reasons, overvoltage protection cannot be achieved. This situation is more common when flux is used in factory production.
利用ZCD平台电压进行过压保护有两个缺陷:第一缺陷是每个AC半波只能检测一次(在AC馒头波峰),因为Vbus-Vin是跟随Vin(馒头波)而变化,在Vin 半波谷底的时候进行判断显然不合理,因此保护较慢。第二个缺陷是阈值难以统一,例如Vin=90V的ac输入和Vin=265V的ac输入,如果保护点均设置为350V,则针对265V输入时保护点明显过低。因此很难根据每个输入电压实时调整保护阈值。There are two defects in using ZCD platform voltage for overvoltage protection: the first defect is that each AC half-wave can only be detected once (at the AC steamed wave peak), because V bus -V in follows V in (steamed wave) changes. It is obviously unreasonable to judge at the bottom of the half-wave, so the protection is slow. The second defect is that the threshold is difficult to unify. For example, if the protection point is set to 350V for both Vin = 90V ac input and Vin = 265V ac input, the protection point is obviously too low for 265V input. Therefore, it is difficult to adjust the protection threshold in real time according to each input voltage.
由此可见,现有技术中需要一种能够根据针对功率因数校正PFC电路的输入电压实时调整过压保护阈值的过压输出保护方法。It can be seen that the prior art requires an overvoltage output protection method that can adjust the overvoltage protection threshold in real time according to the input voltage of the power factor correction (PFC) circuit.
发明内容Summary of the invention
本发明所要实现的技术目的在于提供一种临界模式功率因数校正PFC电路的过压输出保护方法,所述过压输出保护方法能够实现实时的对不同的输入电压设定不同的过压保护阈值,从而避免单一过压保护阈值电压造成的在输入电压为高压状态下时造成的保护点过低的缺陷。The technical purpose to be achieved by the present invention is to provide an overvoltage output protection method for a critical mode power factor correction (PFC) circuit, wherein the overvoltage output protection method can set different overvoltage protection thresholds for different input voltages in real time, thereby avoiding the defect of a protection point being too low when the input voltage is in a high voltage state due to a single overvoltage protection threshold voltage.
基于上述技术目的,本发明提供一种临界模式功率因数校正PFC电路的过压输出保护方法,所述方法包括:Based on the above technical objectives, the present invention provides an overvoltage output protection method for a critical mode power factor correction (PFC) circuit, the method comprising:
获取功率因数校正PFC电路的输入电压VinObtaining an input voltage Vin of a power factor correction PFC circuit;
获取所述功率因数校正PFC电路中电感的放电时长TrObtaining a discharge duration Tr of an inductor in the power factor correction (PFC) circuit;
获取所述功率因数校正PFC电路中电感的放电时长TonObtaining a discharge time length T on of an inductor in the power factor correction (PFC) circuit;
根据如下公式计算输出电压Vbus的预估值:
The estimated output voltage V bus is calculated according to the following formula:
在所述输出电压Vbus的预估值上叠加过压保护浮动值从而生成过压输出保护电压阈值;Superimposing an overvoltage protection floating value on the estimated value of the output voltage V bus to generate an overvoltage output protection voltage threshold;
根据过压输出保护电压阈值对实际的输出电压Vbus进行判别,以确定是否需要启动过压输出保护。The actual output voltage V bus is judged according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be activated.
在一个实施例中,所述功率因数校正PFC电路中电感的放电时长Ton由PWM控制信号确定,所述电感的放电时长Ton即PFC控制芯片用来控制所述功率因数校正PFC电路中的MOSFET晶体管的导通时长。In one embodiment, the discharge time T on of the inductor in the power factor correction PFC circuit is determined by a PWM control signal, and the discharge time T on of the inductor is the conduction time of the MOSFET transistor in the power factor correction PFC circuit controlled by the PFC control chip.
在一个实施例中,所述输出电压Vbus的预估值的计算由所述PFC控制芯片中设置的固化计算电路、MCU程序或模拟电路实现。 In one embodiment, the calculation of the estimated value of the output voltage V bus is implemented by a fixed calculation circuit, an MCU program or an analog circuit provided in the PFC control chip.
本发明的另一方面还在于提供一种临界模式功率因数校正PFC电路的过压输出保护系统,所述系统包括使用PFC控制芯片对功率因数校正PFC电路施加PWM控制信号;所述PFC控制芯片中设置有输入电压采样电路,根据所述输入电压采样电路来获取功率因数校正PFC电路的输入电压Vin;同时所述PFC控制芯片中还设置有ZCD零电流检测模块,根据所述ZCD零电流检测模块获取所述功率因数校正PFC电路中电感的放电时长Tr;所述PFC控制芯片中还包括运算单元,利用所述运算单元根据输入电压Vin、电感的放电时长Tr以及由PWM控制信号确定的功率因数校正PFC电路中电感的放电时长Ton来计算输出电压Vbus的预估值;Another aspect of the present invention is to provide an overvoltage output protection system for a critical mode power factor correction PFC circuit, the system comprising applying a PWM control signal to the power factor correction PFC circuit using a PFC control chip; the PFC control chip is provided with an input voltage sampling circuit, and the input voltage Vin of the power factor correction PFC circuit is obtained according to the input voltage sampling circuit; the PFC control chip is also provided with a ZCD zero current detection module, and the discharge time length Tr of the inductor in the power factor correction PFC circuit is obtained according to the ZCD zero current detection module; the PFC control chip also includes a calculation unit, and the calculation unit is used to calculate the estimated value of the output voltage V bus according to the input voltage Vin , the discharge time length Tr of the inductor, and the discharge time length T on of the inductor in the power factor correction PFC circuit determined by the PWM control signal;
所述PFC控制芯片在所述输出电压Vbus的预估值上叠加过压保护浮动值从而生成过压输出保护电压阈值;根据过压输出保护电压阈值对实际的输出电压Vbus进行判别,以确定是否需要启动过压输出保护。The PFC control chip superimposes an overvoltage protection floating value on the estimated value of the output voltage V bus to generate an overvoltage output protection voltage threshold; and determines the actual output voltage V bus according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be started.
与现有技术相比,本发明的一个或多个实施例可以具有如下发明点及优势:Compared with the prior art, one or more embodiments of the present invention may have the following inventive features and advantages:
只要输入电压Vin和ZCD检测功能正常的情况下,就能实时推算出输出电压Vbus的预估值,而不依赖于其他信息。因此其过压保护的电压阈值不受AC半波相位限制(不仅限于AC波峰点,而是全时),也不受Vin RMS电压的高低影响,可以给出准确并统一的保护阈值。大大提高了过压保护的安全性和适用性。As long as the input voltage Vin and the ZCD detection function are normal, the estimated value of the output voltage Vbus can be calculated in real time without relying on other information. Therefore, the voltage threshold of its overvoltage protection is not limited by the AC half-wave phase (not limited to the AC wave peak point, but all the time), nor is it affected by the high or low Vin RMS voltage, and can provide an accurate and unified protection threshold. The safety and applicability of overvoltage protection are greatly improved.
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例共同用于解释本发明,并不构成对本发明的限制。在附图中:The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:
图1是本发明的功率因数校正PFC电路过压输出保护系统结构示意图;FIG1 is a schematic diagram of the structure of an overvoltage output protection system of a power factor correction (PFC) circuit of the present invention;
图2是本发明的功率因数校正PFC电路过压输出保护方法流程图。FIG. 2 is a flow chart of an overvoltage output protection method for a power factor correction (PFC) circuit according to the present invention.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚,以下结合附图对本发明作进 一步地详细说明。In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described below with reference to the accompanying drawings. Detailed step by step instructions.
在进行下面的详细描述之前,阐述贯穿本发明使用的某些单词和短语的定义可能是必要的。术语“耦接”“连接”及其派生词指两个或多个元件之间的任何直接或间接通信或者连接,而无论那些元件是否彼此物理接触。术语“传输”、“接收”和“通信”及其派生词涵盖直接和间接通信。术语“包括”和“包含”及其派生词是指包括但不限于。术语“或”是包含性的,意思是和/或。短语“与……相关联”及其派生词是指包括、包括在……内、互连、包含、包含在……内、连接或与……连接、耦接或与……耦接、与……通信、配合、交织、并列、接近、绑定或与……绑定、具有、具有属性、具有关系或与……有关系等。术语“控制器”是指控制至少一个操作的任何设备、系统或其一部分。这种控制器可以用硬件、或者硬件和软件和/或固件的组合来实施。与任何特定控制器相关联的功能可以是集中式的或分布式的,无论是本地的还是远程的。短语“至少一个”,当与项目列表一起使用时,意指可以使用所列项目中的一个或多个的不同组合,并且可能只需要列表中的一个项目。例如,“A、B、C中的至少一个”包括以下组合中的任意一个:A、B、C、A和B、A和C、B和C、A和B和C。Before proceeding to the following detailed description, it may be necessary to set forth the definitions of certain words and phrases used throughout the present invention. The terms "coupling", "connection" and their derivatives refer to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are in physical contact with each other. The terms "transmission", "reception" and "communication" and their derivatives cover direct and indirect communication. The terms "include" and "comprising" and their derivatives refer to including but not limited to. The term "or" is inclusive, meaning and/or. The phrase "associated with..." and its derivatives refer to including, including within, interconnecting, including, contained within, connecting or with...connecting, coupling or with...coupling, communicating with, cooperating, interweaving, parallel, approaching, binding or with...binding, having, having attributes, having a relationship or with...having a relationship, etc. The term "controller" refers to any device, system or part thereof that controls at least one operation. Such a controller can be implemented with hardware, or a combination of hardware and software and/or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote. The phrase "at least one of", when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be required. For example, "at least one of A, B, C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.
本发明中对于电阻、电容或电感的第一端和第二端的描述仅为了区分该器件的两个连接端,以便于描述该器件与其他器件的连接关系,其并不特定地指定电阻、电容或电感在实际情况下的某一端。本领域技术人员应当知晓在实际电路构建时,电阻、电容或电感在实际器件中的任何一端均可定义为第一端,同时当第一端被定义时,器件的另一端自动被定为第二端。The description of the first end and the second end of a resistor, capacitor or inductor in the present invention is only to distinguish the two connection ends of the device, so as to facilitate the description of the connection relationship between the device and other devices, and does not specifically specify a certain end of the resistor, capacitor or inductor in actual situations. Those skilled in the art should know that when constructing an actual circuit, any end of the resistor, capacitor or inductor in an actual device can be defined as the first end, and when the first end is defined, the other end of the device is automatically defined as the second end.
本发明中对各种部件或元素进行描述时,所使用的“第一”、“第二”、“第三”……的描述方式仅为了区分各个部件,仅为了表达各个部件之间互不相同的关系。上述所使用的描述方式本身不包含任何对部件之间关联的隐含意义。例如,当仅出现“第一”和“第三”的描述时,不意味着二者之间还存在“第二”,这里对“第一”和“第三”的描述仅意味着存在两个不同的独立部件。When describing various components or elements in the present invention, the description methods of "first", "second", "third", etc. are used only to distinguish the various components and to express the different relationships between the various components. The description methods used above do not contain any implicit meaning of the association between the components. For example, when only the descriptions of "first" and "third" appear, it does not mean that there is a "second" between the two. The descriptions of "first" and "third" here only mean that there are two different independent components.
贯穿本发明中提供的其他特定单词和短语的定义。本领域普通技术人员应该理解,在许多情况下,即使不是大多数情况下,这种定义也适用于这样定义的单词和短语的先前和将来使用。Definitions of other specific words and phrases are provided throughout this disclosure. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.
在本发明中,模块的应用组合以及子模块的划分层级仅用于说明,在不脱离 本公开的范围内,模块的应用组合以及子模块的划分层级可以具有不同的方式。In the present invention, the application combination of modules and the division level of sub-modules are only for illustration and will not be separated from the present invention. Within the scope of the present disclosure, there may be different ways to apply and combine modules and to divide the sub-modules into different levels.
实施例Example
如图1-2所示的本发明的功率因数校正PFC电路过压输出保护系统结构图及方法流程图。本实施例中使用PFC控制芯片对功率因数校正PFC电路施加PWM控制信号。所述PFC控制芯片中设置有输入电压采样电路,根据所述输入电压采样电路来获取功率因数校正PFC电路的输入电压Vin;同时所述PFC控制芯片中还设置有ZCD零电流检测模块,根据所述ZCD零电流检测模块获取所述功率因数校正PFC电路中电感的放电时长TrThe structure diagram and method flow chart of the power factor correction PFC circuit overvoltage output protection system of the present invention are shown in Figures 1-2. In this embodiment, a PFC control chip is used to apply a PWM control signal to the power factor correction PFC circuit. The PFC control chip is provided with an input voltage sampling circuit, and the input voltage Vin of the power factor correction PFC circuit is obtained according to the input voltage sampling circuit; at the same time, the PFC control chip is also provided with a ZCD zero current detection module, and the discharge time length Tr of the inductor in the power factor correction PFC circuit is obtained according to the ZCD zero current detection module.
本实施例的功率因数校正PFC电路过压输出保护方法包括:The overvoltage output protection method of the power factor correction (PFC) circuit of this embodiment includes:
获取功率因数校正PFC电路的输入电压VinObtaining an input voltage Vin of a power factor correction PFC circuit;
获取所述功率因数校正PFC电路中电感的放电时长TrObtaining a discharge duration Tr of an inductor in the power factor correction (PFC) circuit;
获取所述功率因数校正PFC电路中电感的放电时长TonObtaining a discharge time length T on of an inductor in the power factor correction (PFC) circuit;
根据如下公式计算输出电压Vbus的预估值:
The estimated output voltage V bus is calculated according to the following formula:
在所述输出电压Vbus的预估值上叠加过压保护浮动值从而生成过压输出保护电压阈值;Superimposing an overvoltage protection floating value on the estimated value of the output voltage V bus to generate an overvoltage output protection voltage threshold;
根据过压输出保护电压阈值对实际的输出电压Vbus进行判别,以确定是否需要启动过压输出保护。The actual output voltage V bus is judged according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be activated.
本实施例中,所述所述功率因数校正PFC电路中电感的放电时长Ton由PWM控制信号确定,所述电感的放电时长Ton即PFC控制芯片用来控制所述功率因数校正PFC电路中的MOSFET晶体管的导通时长。In this embodiment, the discharge time T on of the inductor in the power factor correction PFC circuit is determined by a PWM control signal, and the discharge time T on of the inductor is the conduction time of the MOSFET transistor in the power factor correction PFC circuit controlled by the PFC control chip.
本实施例中所述输出电压Vbus的预估值的计算由所述PFC控制芯片中设置的固化计算电路、MCU程序或模拟电路实现。In this embodiment, the calculation of the estimated value of the output voltage V bus is implemented by a fixed calculation circuit, an MCU program or an analog circuit provided in the PFC control chip.
以上所述,仅为本发明的具体实施案例,本发明的保护范围并不局限于此,任何熟悉本技术的技术人员在本发明所述的技术规范内,对本发明的修改或替换,都应在本发明的保护范围之内。 The above description is only a specific implementation case of the present invention, and the protection scope of the present invention is not limited thereto. Any modification or replacement of the present invention by any technician familiar with the present technology within the technical specifications described in the present invention should be within the protection scope of the present invention.

Claims (6)

  1. 一种临界模式功率因数校正PFC电路的过压输出保护方法,其特征在于,所述方法包括:A method for overvoltage output protection of a critical mode power factor correction (PFC) circuit, characterized in that the method comprises:
    获取功率因数校正PFC电路的输入电压VinObtaining an input voltage Vin of a power factor correction PFC circuit;
    获取所述功率因数校正PFC电路中电感的放电时长TrObtaining a discharge duration Tr of an inductor in the power factor correction (PFC) circuit;
    获取所述功率因数校正PFC电路中电感的放电时长TonObtaining a discharge time length T on of an inductor in the power factor correction (PFC) circuit;
    根据如下公式计算输出电压Vbus的预估值:
    The estimated output voltage V bus is calculated according to the following formula:
    在所述输出电压Vbus的预估值上叠加过压保护浮动值从而生成过压输出保护电压阈值;Superimposing an overvoltage protection floating value on the estimated value of the output voltage V bus to generate an overvoltage output protection voltage threshold;
    根据过压输出保护电压阈值对实际的输出电压Vbus进行判别,以确定是否需要启动过压输出保护。The actual output voltage V bus is judged according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be activated.
  2. 根据权利要求1所述的临界模式功率因数校正PFC电路的过压输出保护方法,其特征在于,所述功率因数校正PFC电路中电感的放电时长Ton由PWM控制信号确定,所述电感的放电时长Ton即PFC控制芯片用来控制所述功率因数校正PFC电路中的MOSFET晶体管的导通时长。The overvoltage output protection method for a critical mode power factor correction (PFC) circuit according to claim 1 is characterized in that the discharge time length T on of the inductor in the power factor correction (PFC) circuit is determined by a PWM control signal, and the discharge time length T on of the inductor is the conduction time length of the MOSFET transistor in the power factor correction (PFC) circuit used by the PFC control chip to control.
  3. 根据权利要求1所述的临界模式功率因数校正PFC电路的过压输出保护方法,其特征在于,所述输出电压Vbus的预估值的计算由所述PFC控制芯片中设置的固化计算电路、MCU程序或模拟电路实现。The overvoltage output protection method of the critical mode power factor correction (PFC) circuit according to claim 1 is characterized in that the calculation of the estimated value of the output voltage V bus is implemented by a fixed calculation circuit, an MCU program or an analog circuit provided in the PFC control chip.
  4. 一种临界模式功率因数校正PFC电路的过压输出保护系统,其特征在于,所述系统包括使用PFC控制芯片对功率因数校正PFC电路施加PWM控制信号;所述PFC控制芯片中设置有输入电压采样电路,根据所述输入电压采样电路来获取功率因数校正PFC电路的输入电压Vin;同时所述PFC控制芯片中还设置有ZCD零电流检测模块,根据所述ZCD零电流检测模块获取所述功率因数校正PFC电路中电感的放电时长Tr;所述PFC控制芯片中还包括运算单元,利用所述运算单元根据输入电压Vin、电感的放电时长Tr以及由PWM控制信号确定的功率因 数校正PFC电路中电感的放电时长Ton来计算输出电压Vbus的预估值;An overvoltage output protection system for a critical mode power factor correction (PFC) circuit, characterized in that the system includes using a PFC control chip to apply a PWM control signal to the power factor correction (PFC) circuit; the PFC control chip is provided with an input voltage sampling circuit, and the input voltage Vin of the power factor correction (PFC) circuit is obtained according to the input voltage sampling circuit; at the same time, the PFC control chip is also provided with a ZCD zero current detection module, and the discharge time length Tr of the inductor in the power factor correction (PFC) circuit is obtained according to the ZCD zero current detection module; the PFC control chip also includes a calculation unit, and the calculation unit is used to calculate the power factor according to the input voltage Vin , the discharge time length Tr of the inductor and the power factor determined by the PWM control signal. The discharge time T on of the inductor in the PFC circuit is corrected by the number to calculate the estimated value of the output voltage V bus ;
    所述PFC控制芯片在所述输出电压Vbus的预估值上叠加过压保护浮动值从而生成过压输出保护电压阈值;根据过压输出保护电压阈值对实际的输出电压Vbus进行判别,以确定是否需要启动过压输出保护。The PFC control chip superimposes an overvoltage protection floating value on the estimated value of the output voltage V bus to generate an overvoltage output protection voltage threshold; and determines the actual output voltage V bus according to the overvoltage output protection voltage threshold to determine whether the overvoltage output protection needs to be started.
  5. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质存储有计算机指令,所述计算机指令用于使所述计算机执行1-3中任一项所述的临界模式功率因数校正PFC电路的过压输出保护方法。A computer-readable storage medium, characterized in that the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the overvoltage output protection method of the critical mode power factor correction (PFC) circuit described in any one of 1-3.
  6. 一种集成电路结构,所述集成电路结构中包含权利要求4所述的临界模式功率因数校正PFC电路的过压输出保护系统。 An integrated circuit structure, wherein the integrated circuit structure includes the overvoltage output protection system of the critical mode power factor correction (PFC) circuit as claimed in claim 4.
PCT/CN2023/123845 2022-11-04 2023-10-10 Overvoltage output protection method for critical mode power factor correction (pfc) circuit WO2024093626A1 (en)

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