WO2024087775A1 - 锁定点调节方法、电子设备及计算机可读存储介质 - Google Patents

锁定点调节方法、电子设备及计算机可读存储介质 Download PDF

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WO2024087775A1
WO2024087775A1 PCT/CN2023/110570 CN2023110570W WO2024087775A1 WO 2024087775 A1 WO2024087775 A1 WO 2024087775A1 CN 2023110570 W CN2023110570 W CN 2023110570W WO 2024087775 A1 WO2024087775 A1 WO 2024087775A1
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bias point
value
modulator
point
initial
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PCT/CN2023/110570
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English (en)
French (fr)
Inventor
杨旻岳
沈百林
邵永波
王会涛
赵慧
李蒙
张琦
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中兴光电子技术有限公司
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Publication of WO2024087775A1 publication Critical patent/WO2024087775A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50—Transmitters
    • H04B10/516—Details of coding or modulation

Definitions

  • the embodiments of the present application relate to but are not limited to the field of communication technology, and in particular, to a locking point adjustment method, an electronic device, and a computer-readable storage medium.
  • In-phase Quadrature (IQ) modulator is an important component of the electro-optical signal conversion at the transmitter of coherent optical communication.
  • Thin-film lithium niobate modulator has the characteristics of high bandwidth and low loss, but due to the limitation of etching process, it is impossible to make spectroscopic monitoring photodiode for monitoring.
  • the IQ modulator in its coherent application can only be monitored by complementary monitoring photodiode, and the extinction of the modulator is relatively low, which leads to large offset error of IQ center and poor carrier elimination effect.
  • Embodiments of the present application provide a locking point adjustment method, an electronic device, and a computer-readable storage medium.
  • an embodiment of the present application provides a locking point adjustment method, comprising: obtaining a first static bias point of an in-phase orthogonal IQ modulator in a first locking state; replacing the first static bias point with an initial static bias point; wherein the initial static bias point is used to characterize the static bias point corresponding to the case where the in-phase branch and the orthogonal branch light output of the IQ modulator are both minimum; based on the first locking state and the initial static bias point, performing detection processing on the jitter signal of the IQ modulator to obtain a detection integral value; adjusting the detection integral value according to a preset strategy; and locking the IQ modulator according to the adjusted detection integral value.
  • an embodiment of the present application further provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the locking point adjustment method as described above when executing the computer program.
  • an embodiment of the present application further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the locking point adjustment method as described above.
  • FIG1 is a schematic diagram of a device architecture for executing a locking point adjustment method provided by an embodiment of the present application
  • FIG2 is a flow chart of a locking point adjustment method provided by an embodiment of the present application.
  • FIG3 is a flow chart of a method for obtaining an initial static bias point provided by an embodiment of the present application
  • FIG4 is a flow chart of performing a first iterative optimization process on a first initial bias point according to an embodiment of the present application
  • FIG5 is a flow chart of performing a second iterative optimization process on a second initial bias point according to an embodiment of the present application
  • FIG6 is a flow chart of adjusting the first initial bias point according to an embodiment of the present application.
  • FIG7 is a flow chart of adjusting the second initial bias point according to an embodiment of the present application.
  • FIG8 is a flow chart of determining a first static bias point provided by an embodiment of the present application.
  • FIG9 is a flowchart of performing a locking process on an IQ modulator according to an embodiment of the present application.
  • FIG10 is a flow chart of adjusting the detection integral value provided by one embodiment of the present application.
  • FIG11 is a flow chart of adjusting the detection integral value provided by another embodiment of the present application.
  • FIG12 is a constellation diagram corresponding to a specific non-ideal extinction ratio provided by an embodiment of the present application.
  • FIG13 is a spectrum diagram corresponding to a specific non-ideal extinction ratio provided by an embodiment of the present application.
  • FIG. 14 is a constellation diagram for performing detection locking by loading a jitter signal under a specific non-ideal extinction ratio and monitoring optical power using a complementary monitoring photodiode, provided by one embodiment of the present application;
  • FIG15 is a spectrum diagram of loading a jitter signal under a specific non-ideal extinction ratio, using a complementary monitoring photodiode to monitor optical power, and performing detection locking, provided by an embodiment of the present application;
  • FIG16 is a constellation diagram after using the above-mentioned locking point adjustment method to monitor optical power using a complementary monitoring photodiode under a specific non-ideal extinction ratio provided by one embodiment of the present application;
  • FIG. 17 is a spectrum diagram of a method for adjusting the locking point using a complementary monitoring photodiode to monitor the optical power under a specific non-ideal extinction ratio provided by an embodiment of the present application;
  • FIG. 18 is a schematic diagram of the structure of an electronic device provided in one embodiment of the present application.
  • the present application provides a locking point adjustment method, an electronic device, and a computer-readable storage medium, which obtains a first static bias point of an in-phase orthogonal IQ modulator in a first locking state; then replaces the first static bias point with an initial static bias point; wherein the initial static bias point is used to characterize the static bias point corresponding to the case where the in-phase branch and the orthogonal branch of the IQ modulator have the smallest light output; then based on the first locking state and the initial static bias point, the jitter signal of the IQ modulator is detected to obtain a detection integral value; then the detection integral value is adjusted according to a preset strategy; finally, the IQ modulator is locked according to the adjusted detection integral value.
  • the locking point adjustment process can be implemented under the monitoring of complementary monitoring photodiodes to eliminate the carrier, so as to achieve the effect of automatic locking that can be used when the constellation diagram and spectrum requirements are high.
  • FIG1 is a schematic diagram of a device architecture for performing a locking point adjustment method provided by an embodiment of the present application.
  • the device architecture includes an IQ modulator and a complementary monitoring photodiode; wherein the IQ modulator includes an in-phase branch and an orthogonal branch, the two branches modulate the carrier respectively, and the two carriers are orthogonal to each other, I represents the in-phase branch, and Q represents the orthogonal branch; the orthogonal signal is two carriers with the same frequency and a phase difference of 90°; the control circuit of the photocurrent signal input of the complementary monitoring photodiode includes a first control branch, a second control branch, and a third control branch.
  • the first control branch is used to control the bias point of the in-phase branch
  • the second control branch is used to control the bias point of the quadrature branch
  • the third control branch is used to control the bias point of the phase branch between the in-phase branch and the quadrature branch.
  • “Complementary” refers to the two light output outlets after the I-way and Q-way are combined and interfered by a 2*2 optical coupler, one for outputting signal light and the other for monitoring the photodiode to detect the light signal. When the extinction ratio of the IQ modulator is infinitely high, the locking process is performed according to the traditional locking scheme.
  • the locking point of the in-phase branch will be at 180°
  • the locking point of the quadrature branch will also be at 180°
  • the locking point of the phase branch between the in-phase branch and the quadrature branch will be at 90°.
  • the optical carrier output of the IQ modulator will be completely eliminated.
  • the device architecture and application scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of the device architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are equally applicable to similar technical problems.
  • FIG. 1 does not constitute a limitation on the embodiments of the present application, and may include more or fewer components than shown in the figure, or a combination of certain components, or a different arrangement of components.
  • FIG2 is a flow chart of a locking point adjustment method provided by an embodiment of the present application.
  • the method includes but is not limited to step S100, step S200, step S300, step S400 and step S500:
  • Step S100 obtaining a first static bias point of an in-phase orthogonal IQ modulator in a first locked state
  • Step S200 replacing the first static bias point with an initial static bias point; wherein the initial static bias point is used to represent the static bias point corresponding to the case where both the in-phase branch and the orthogonal branch of the IQ modulator have the minimum light output;
  • Step S300 based on the first locking state and the initial static bias point, performing detection processing on the jitter signal of the IQ modulator to obtain a detection integral value;
  • Step S400 adjusting the detection integral value according to a preset strategy
  • Step S500 performing locking processing on the IQ modulator according to the adjusted detection integral value.
  • the first static bias point of the in-phase orthogonal IQ modulator in the first locking state is obtained; then, the first static bias point is replaced by the initial static bias point; wherein, the initial static bias point is used to characterize the static bias point corresponding to the case where the in-phase branch and the orthogonal branch of the IQ modulator have the minimum light output; then, based on the first locking state and the initial static bias point, the jitter signal of the IQ modulator is detected to obtain the detection integral value; then, the detection integral value is adjusted according to a preset strategy; finally, the IQ modulator is locked according to the adjusted detection integral value.
  • the locking point adjustment process can be realized under the monitoring of the complementary monitoring photodiode to eliminate the carrier, so as to achieve the effect of automatic locking that can be used when the constellation diagram and the spectrum have high requirements.
  • the IQ modulator can be placed in the first locking state through the existing conventional locking scheme; illustratively, a jitter signal is loaded on the in-phase branch and the orthogonal branch of the IQ modulator, and the photocurrent of the complementary monitoring photodiode is detected, and the bias point of the IQ modulator is brought closer to the first static bias point based on the detection signal; when the bias point is adjusted to the first static bias point, the IQ modulator is placed in the first locking state.
  • the optical carrier of the IQ modulator is large and cannot be used directly.
  • the initial static bias point is used to characterize the static bias point corresponding to the case where the in-phase branch and the quadrature branch of the IQ modulator have the minimum light output.
  • the bias points of the in-phase branch and the quadrature branch are adjusted according to the light intensity monitored by the complementary monitoring photodiode, so that after each adjustment, the light output intensity of the in-phase branch and the quadrature branch is weakened, and finally the static bias point corresponding to the case where the in-phase branch and the quadrature branch have the minimum light output is determined as the initial static bias point.
  • the jitter signal of the IQ modulator is detected and processed to obtain a detection integral value; that is, the IQ modulator is placed in the first locking state, and the bias point of the IQ modulator is modified to the initial static bias point, and then the jitter signal is loaded on the in-phase branch and the orthogonal branch of the IQ modulator for detection processing, and finally the corresponding detection integral value is obtained.
  • the detection integral value is adjusted according to a preset strategy, that is, the detection integral value obtained in the above steps is adjusted according to a preset strategy; illustratively, the preset strategy is to multiply the detection integral value by 2, then the detection integral value obtained in the above steps can be multiplied by 2 as the basis for subsequent locking point adjustment.
  • the IQ modulator can be locked according to the adjusted detection integral value by using an existing conventional locking scheme, which will not be described in detail here.
  • the initial static bias point includes a first in-phase branch bias point and a first quadrature branch bias point.
  • the initial static bias point can be obtained by, but not limited to, steps S210, S220, and S230:
  • Step S210 setting a first initial bias point of the in-phase branch and a second initial bias point of the quadrature branch
  • Step S220 performing a first iterative optimization process on the first initial bias point to obtain a second in-phase branch bias point; and performing a second iterative optimization process on the second initial bias point to obtain a second quadrature branch bias point;
  • Step S230 when the second in-phase branch bias point and the second quadrature branch bias point are both less than a preset threshold, the second in-phase branch bias point is determined as the first in-phase branch bias point, and the second quadrature branch bias point is determined as the first quadrature branch bias point.
  • a first initial bias point of the in-phase branch and a second initial bias point of the quadrature branch are set; then, the first initial bias point is subjected to a first iterative optimization process to obtain a second in-phase branch bias point; and the second initial bias point is subjected to a second iterative optimization process to obtain a second quadrature branch bias point; finally, when both the second in-phase branch bias point and the second quadrature branch bias point are less than a preset threshold, the second in-phase branch bias point is determined as the first in-phase branch bias point, and the second quadrature branch bias point is determined as the first quadrature branch bias point.
  • first in-phase branch bias point and the second in-phase branch bias point in the embodiment of the present application are only used to distinguish and explain the bias points in different states, in order to better explain the specific working principle of the embodiment of the present application, and it should not be considered that the two are objects of different natures.
  • the first orthogonal branch bias point and the second orthogonal branch bias point are the same.
  • first initial bias point is subjected to the first iterative optimization process, that is, the first initial bias point is subjected to the iterative optimization and adjustment process.
  • second initial bias point is subjected to the second iterative optimization process, that is, the second initial bias point is subjected to the iterative optimization and adjustment process.
  • step S220 may include but is not limited to step S221, step S222, step S223 and step S224:
  • Step S221 performing a first phase scanning process on the IQ modulator and recording a first photocurrent value
  • Step S222 adding a preset first phase shift value to the first initial bias point to obtain a first adjusted bias point
  • Step S224 adjusting the first initial bias point according to the first photocurrent value and the second photocurrent value.
  • the IQ modulator is first subjected to a first phase scanning process to obtain a first photocurrent value; then the first initial bias point is added with a preset first phase transformation value to obtain a first adjustment bias point; then based on the first adjustment bias point, the IQ modulator is subjected to a second phase transformation process to obtain a first photocurrent value; Scanning is performed to obtain a second photocurrent value; and finally, the first initial bias point is adjusted according to the first photocurrent value and the second photocurrent value.
  • the first adjustment bias point can be obtained; then the IQ modulator is subjected to a second phase scanning process again based on the first adjustment bias point to obtain a second photocurrent value; the first photocurrent value is compared with the second photocurrent value to determine whether the adjustment direction of the first initial bias point is correct.
  • step S220 may include but is not limited to step S225, step S226, step S227 and step S228:
  • Step S225 performing a third phase scanning process on the IQ modulator and recording a third photocurrent value
  • Step S227 performing a fourth phase scanning process on the IQ modulator based on the second adjustment bias point, and recording a fourth photocurrent value
  • Step S228 adjusting the second initial bias point according to the third photocurrent value and the fourth photocurrent value.
  • the IQ modulator is first subjected to a third phase scanning process to obtain a third photocurrent value; then a preset second phase transformation value is added to the second initial bias point to obtain a second adjusted bias point; then based on the second adjusted bias point, the IQ modulator is subjected to a fourth phase scanning process to obtain a fourth photocurrent value; finally, the second initial bias point is adjusted according to the third photocurrent value and the fourth photocurrent value.
  • the second adjustment bias point can be obtained; then the IQ modulator is subjected to a fourth phase scanning process again based on the second adjustment bias point to obtain a fourth photocurrent value; the third photocurrent value is compared with the fourth photocurrent value to determine whether the adjustment direction of the second initial bias point is correct.
  • step S224 may include but is not limited to step S2241 and step S2242:
  • Step S2241 when the second photocurrent value is less than the first photocurrent value, determining the first adjustment bias point as a new first initial bias point;
  • Step S2242 when the second photocurrent value is greater than or equal to the first photocurrent value, determine the first initial bias point as a new first initial bias point, and minus the first phase shift value as a new first phase shift value.
  • the first adjustment bias point when the second photocurrent value is less than the first photocurrent value, the first adjustment bias point is determined as a new first initial bias point; when the second photocurrent value is greater than or equal to the first photocurrent value, the first initial bias point is determined as a new first initial bias point, and the first phase change value is negatively signed as a new first phase change value, and the first initial bias point is re-adjusted based on the new first phase change value.
  • step S228 may include but is not limited to step S2281 and step S2282:
  • Step S2281 when the fourth photocurrent value is less than the third photocurrent value, determining the second adjusted bias point as a new second initial bias point;
  • Step S2282 when the fourth photocurrent value is greater than or equal to the third photocurrent value, the second initial bias point is determined as a new second initial bias point, and the second phase shift value is negatively signed as a new second phase shift value.
  • the second adjustment bias point when the fourth photocurrent value is less than the third photocurrent value, the second adjustment bias point will be determined as a new second initial bias point; when the fourth photocurrent value is greater than or equal to the third photocurrent value, the second initial bias point will be determined as a new second initial bias point, and the second phase change value will be negatively signed as a new second phase change value, and the second initial bias point will be re-adjusted based on the new second phase change value.
  • step S100 may include but is not limited to step S110 and step S120:
  • Step S110 inputting the adjustment jitter signal to the IQ modulator and performing bias point adjustment processing on the IQ modulator, so that the IQ modulator is in a first locked state, wherein in the first locked state, the detection integral values of the in-phase branch, the quadrature branch, and the phase branch between the in-phase branch and the quadrature branch are all 0;
  • Step S120 determining the bias point of the IQ modulator in the first locked state as the first static bias point.
  • an adjustment jitter signal is first input into the IQ modulator and a bias point adjustment process is performed on the IQ modulator so that the IQ modulator is in a first locked state, wherein in the first locked state, the detection integral values of the in-phase branch, the quadrature branch, and the phase branch between the in-phase branch and the quadrature branch are all 0; then the bias point of the IQ modulator in the first locked state is determined as the first static bias point.
  • step S500 may include but is not limited to step S510 and step S520:
  • Step S510 determining the adjusted detection integral value as the target locking value
  • Step S520 performing locking processing on the IQ modulator according to the target locking value.
  • the adjusted detection integral value is determined as the target locking value; then the IQ modulator is locked based on the target locking value.
  • the process of locking the IQ modulator based on the target locking value can be based on the existing traditional locking scheme; illustratively, a jitter signal is loaded on the in-phase branch and the orthogonal branch of the IQ modulator, and detection is performed through complementary monitoring photodiode detection, and the bias point of the IQ modulator is brought closer to the target locking value based on the detection signal; when the detection integral reaches the target locking value, it will be determined that the IQ modulator has completed the locking point adjustment process, and the optical carrier output by the IQ modulator is completely eliminated.
  • step S400 may include but is not limited to one of the following steps:
  • Step S410 amplifying the detection integral value by a preset multiple
  • Step S420 adding a preset integral value to the detection integral value.
  • the detection integral value is adjusted according to a preset strategy.
  • the detection integral value can be amplified by a preset multiple, or a preset integral value can be added to the detection integral value to complete the adjustment of the detection integral value and prepare for subsequent locking point adjustment.
  • the quadrature branch of the IQ modulator when the extinction ratio of the in-phase branch of the IQ modulator is only 20 dB, during the locking process according to the traditional locking scheme, a complementary monitoring photodiode is used to receive the optical signal, then the quadrature branch will automatically lock to 170°, and the quadrature branch will deviate from -10°.
  • the carrier that is not eliminated and the carrier that leaks out of the in-phase branch due to insufficient extinction ratio will interfere and cancel each other in the complementary path, but will interfere constructively at the optical output port, and the remaining carriers will all be in the optical output path and cannot be used. Under the above conditions, it is necessary to adjust the detection integral value so that the locking point is automatically locked to 190°, so that the optical output carrier is completely eliminated and can be used.
  • the detection integral value is obtained through the above step S300.
  • the detection integral value is linear with the phase change, so the obtained detection integral value is By multiplying the score by 2, the orthogonal branch can be locked to 190° and the adjustment target can be achieved.
  • the embodiments of the present application are the corresponding constellation diagrams and spectrum diagrams when the bias points are at 180°, 180° and 90° under specific non-ideal extinction ratio conditions; at this time, both the I path and the Q path are set to 180°, and the phase between the two is set to 90°. It can be seen from the figure that since the I path and the Q path do not deviate from 180° to compensate for the insufficient extinction ratio of the other path, the carrier cannot be eliminated and there is a spectral peak of -25dB.
  • the embodiments of the present application are constellation diagrams and spectrum diagrams obtained by monitoring processing using complementary monitoring photodiodes under specific non-ideal extinction ratio conditions; at this time, due to the use of complementary monitoring photodiodes, the phase difference added to the I and Q paths in the 2 ⁇ 2 combiner is opposite to that of the output path, and the locking result is that the bias point locking values of the I and Q paths are close in size and opposite in direction to the bias point locking values of the output path splitter monitoring photodiode, which are far away from 180°, thereby increasing the uneliminated carrier and having a severe spectral peak of -19dB, which makes the locking result unusable.
  • the embodiments of the present application are constellation diagrams and spectrum diagrams obtained after optimization and adjustment processing using the locking point adjustment method of the above embodiment under specific non-ideal extinction ratio conditions; based on the locking point adjustment method of the above embodiment, the carrier elimination of the locking point is significantly optimized, and the spectrum peak is optimized from -19dB to -51dB, and the Phase path will still automatically adjust to close to 90°.
  • an embodiment of the present application further provides an electronic device 700, which includes:
  • the memory 720 The memory 720 , the processor 710 , and a computer program stored in the memory 720 and executable on the processor 710 .
  • the processor 710 and the memory 720 may be connected via a bus or in other ways.
  • the non-transient software program and instructions required to implement the locking point adjustment method of the above embodiment are stored in the memory 720.
  • the locking point adjustment method in the above embodiment is executed, for example, the method steps S100 to S500 in Figure 2, the method steps S210 to S230 in Figure 3, the method steps S221 to S224 in Figure 4, the method steps S225 to S228 in Figure 5, the method steps S2241 to S2242 in Figure 6, the method steps S2281 to S2282 in Figure 7, the method steps S110 to S120 in Figure 8, the method steps S510 to S520 in Figure 9, the method step S410 in Figure 10, and the method step S420 in Figure 11 are executed.
  • an embodiment of the present application further provides a computer-readable storage medium, which stores computer-executable instructions, and the computer-executable instructions are executed by a processor 710, for example, by a processor 710 in the above-mentioned electronic device 700 embodiment, so that the above-mentioned processor 710 can execute the locking point adjustment method in the above-mentioned embodiment, for example, execute the method steps S100 to S500 in Figure 2 described above, the method steps S210 to S230 in Figure 3, the method steps S221 to S224 in Figure 4, the method steps S225 to S228 in Figure 5, the method steps S2241 to S2242 in Figure 6, the method steps S2281 to S2282 in Figure 7, the method steps S110 to S120 in Figure 8, the method steps S510 to S520 in Figure 9, the method step S410 in Figure 10, and the method step S420 in Figure 11.
  • the embodiment of the present application includes: obtaining a first static bias point of an in-phase orthogonal IQ modulator in a first locked state; Then, the first static bias point is replaced with the initial static bias point; wherein the initial static bias point is used to characterize the static bias point corresponding to the case where the light output of the in-phase branch and the orthogonal branch of the IQ modulator is the minimum; then, based on the first locking state and the initial static bias point, the jitter signal of the IQ modulator is detected to obtain the detection integral value; then, the detection integral value is adjusted according to the preset strategy; finally, the IQ modulator is locked according to the adjusted detection integral value.
  • the locking point adjustment process can be implemented under the monitoring of the complementary monitoring photodiode to eliminate the carrier, so as to achieve the effect of automatic locking that can be used when the constellation diagram and the spectrum have high requirements.
  • computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data).
  • Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that may be used to store desired information and may be accessed by a computer.
  • communication media typically embodies computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

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Abstract

本申请提供了一种锁定点调节方法、电子设备及计算机可读存储介质。锁定点调节方法包括：获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点(S100)；将第一静态偏置点替换为初始静态偏置点，其中，初始静态偏置点用于表征IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点(S200)；基于第一锁定状态和初始静态偏置点，对IQ调制器的抖动信号进行检波处理，得到检波积分值(S300)；根据预设策略对检波积分值进行调整(S400)；根据调整后的检波积分值对IQ调制器进行锁定处理(S500)。

Description

锁定点调节方法、电子设备及计算机可读存储介质
相关申请的交叉引用
本申请基于申请号为202211301291.9、申请日为2022年10月24日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请实施例涉及但不限于通信技术领域，尤其涉及一种锁定点调节方法、电子设备及计算机可读存储介质。
背景技术
同相正交(In-phase Quadrature，IQ)调制器是相干光通信的发端电光信号转换的重要组成部分；薄膜铌酸锂调节器有着高带宽和低损耗的特性，但是由于刻蚀工艺的限制，无法制作分光监控光电二极管进行监控，其相干应用中的IQ调制器只能利用互补监控光电二极管进行监控，并且调制器的消光比较低，从而导致IQ中心的偏移误差较大，载波消除效果较差。
发明内容
本申请实施例提供了一种锁定点调节方法、电子设备及计算机可读存储介质。
第一方面，本申请实施例提供了一种锁定点调节方法，包括：获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点；将所述第一静态偏置点替换为初始静态偏置点；其中，所述初始静态偏置点用于表征所述IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点；基于所述第一锁定状态和所述初始静态偏置点，对所述IQ调制器的抖动信号进行检波处理，得到检波积分值；根据预设策略对所述检波积分值进行调整；根据调整后的所述检波积分值对所述IQ调制器进行锁定处理。
第二方面，本申请实施例还提供了一种电子设备，包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如上所述的锁定点调节方法。
第三方面，本申请实施例还提供了一种计算机可读存储介质，存储有计算机可执行指令，其特征在于，所述计算机可执行指令用于执行如上所述的锁定点调节方法。
附图说明
图1是本申请一个实施例提供的用于执行锁定点调节方法的装置架构的示意图；
图2是本申请一个实施例提供的锁定点调节方法的流程图；
图3是本申请一个实施例提供的初始静态偏置点的获取方法的流程图；
图4是本申请一个实施例提供的对第一初始偏置点进行第一迭代优化处理的流程图；
图5是本申请一个实施例提供的对第二初始偏置点进行第二迭代优化处理的流程图；
图6是本申请一个实施例提供的对第一初始偏置点进行调整处理的流程图；
图7是本申请一个实施例提供的对第二初始偏置点进行调整处理的流程图；
图8是本申请一个实施例提供的确定第一静态偏置点的流程图；
图9是本申请一个实施例提供的对IQ调制器进行锁定处理的流程图；
图10是本申请一个实施例提供的对检波积分值进行调整的流程图；
图11是本申请另一个实施例提供的对检波积分值进行调整的流程图；
图12是本申请一个实施例提供的在特定不理想消光比的情况下对应的星座图；
图13是本申请一个实施例提供的在特定不理想消光比的情况下对应的光谱图；
图14是本申请一个实施例提供的在特定不理想消光比的情况下加载抖动信号，利用互补监控光电二极管监控光功率，进行检波锁定的星座图；
图15是本申请一个实施例提供的在特定不理想消光比的情况下加载抖动信号，利用互补监控光电二极管监控光功率，进行检波锁定的光谱图；
图16是本申请一个实施例提供的在特定不理想消光比的情况下，利用互补监控光电二极管监控光功率，利用上述锁定点调节方法后的星座图；
图17是本申请一个实施例提供的在特定不理想消光比的情况下，利用互补监控光电二极管监控光功率，利用上述锁定点调节方法后的光谱图；
图18是本申请一个实施例提供的电子设备的构造示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
需要说明的是，虽然在装置示意图中进行了功能模块划分，在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于装置中的模块划分，或流程图中的顺序执行所示出或描述的步骤。说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
本申请提供了一种锁定点调节方法、电子设备及计算机可读存储介质，获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点；接着将第一静态偏置点替换为初始静态偏置点；其中，初始静态偏置点用于表征IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点；接着基于第一锁定状态和初始静态偏置点，对IQ调制器的抖动信号进行检波处理，得到检波积分值；接着根据预设的策略对检波积分值进行调整；最后根据调整后的检波积分值对IQ调制器进行锁定处理。根据本申请实施例提供的技术方案，能够在互补监控光电二极管监控的情况下实现锁定点调节处理，以消除载波，达到在星座图和光谱要求较高的情况下自动锁定可使用的效果。
下面结合附图，对本申请实施例作阐述。
如图1所示，图1是本申请一个实施例提供的用于执行锁定点调节方法的装置架构的示意图。在图1的示例中，该装置架构包括IQ调制器和互补监控光电二极管；其中，IQ调制器包括同相支路和正交支路，这两条支路分别对载波进行调制，并且两路载波相互正交，I表示同相支路，Q表示正交支路；正交信号就是两路频率相同，相位相差90°的载波；互补监控光电二极管的光电流信号输入的控制电路中包括第一控制支路、第二控制支路和第三控制支 路，第一控制支路用于控制同相支路的偏置点，第二控制支路用于控制正交支路的偏置点，第三控制支路用于控制同相支路和正交支路之间的相位支路的偏置点。“互补”指I路与Q路用2*2光耦合器合束干涉后，出光的两个出口，一个用于输出信号光，另一个用于监控光电二极管探测光信号。在IQ调制器的消光比无限高额情况下，按照传统锁定方案进行锁定处理，同相支路的锁定点会处于180°，正交支路的锁定点也会处于180°，同相支路和正交支路之间的相位支路的锁定点会处于90°，此时，IQ调制器的出光载波会被消除干净。
本申请实施例描述的装置架构以及应用场景是为了更加清楚地说明本申请实施例的技术方案，并不构成对于本申请实施例提供的技术方案的限定，本领域技术人员可知，随着装置架构的演变和新应用场景的出现，本申请实施例提供的技术方案对于类似的技术问题，同样适用。
本领域技术人员可以理解的是，图1中示出的装置架构并不构成对本申请实施例的限定，可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
基于上述装置架构的结构，提出本申请的锁定点调节方法的各个实施例。
如图2所示，图2是本申请一个实施例提供的锁定点调节方法的流程图。该方法包括但不限于有步骤S100、步骤S200、步骤S300、步骤S400和步骤S500：
步骤S100，获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点；
步骤S200，将第一静态偏置点替换为初始静态偏置点；其中，初始静态偏置点用于表征IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点；
步骤S300，基于第一锁定状态和初始静态偏置点，对IQ调制器的抖动信号进行检波处理，得到检波积分值；
步骤S400，根据预设策略对检波积分值进行调整；
步骤S500，根据调整后的检波积分值对IQ调制器进行锁定处理。
在本申请的实施例中，首先获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点；接着将第一静态偏置点替换为初始静态偏置点；其中，初始静态偏置点用于表征IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点；接着基于第一锁定状态和初始静态偏置点，对IQ调制器的抖动信号进行检波处理，得到检波积分值；接着根据预设的策略对检波积分值进行调整；最后根据调整后的检波积分值对IQ调制器进行锁定处理。根据本申请实施例提供的技术方案，能够在互补监控光电二极管监控的情况下实现锁定点调节处理，以消除载波，达到在星座图和光谱要求较高的情况下自动锁定可使用的效果。
值得注意的是，可以通过现有常规的锁定方案使得IQ调制器处于第一锁定状态；示例性地，在IQ调制器的同相支路和正交支路加载抖动信号，通过对互补监控光电二极管的光电流进行检波处理，基于检波信号使得IQ调制器的偏置点向第一静态偏置点靠拢；在偏置点调整至第一静态偏置点的情况下，使得IQ调制器处于第一锁定状态。通常地，在使用互补监控光电二极管的IQ调制器处于第一锁定状态下，IQ调制器的出光载波是较大的，不能直接使用。
值得注意的是，初始静态偏置点用于表征IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点。在一些实施例中，根据互补监控光电二极管监测到的光强调整同相支路和正交支路的偏置点，使得每次调整后，同相支路和正交支路的出光强度都在减弱，最后使得同相支路和正交支路出光均最小的情况下所对应的静态偏置点确定为初始静态偏置点。
可以理解的是，基于第一锁定状态和初始静态偏置点，对IQ调制器的抖动信号进行检波处理从而得到检波积分值；即使得IQ调制器处于第一锁定状态下，并且使得IQ调制器的偏置点修改为初始静态偏置点，然后在IQ调制器的同相支路和正交支路加载抖动信号进行检波处理，最后得到相应的检波积分值。
可以理解的是，根据预设的策略对检波积分值进行调整处理，即根据预先设定的策略对上述步骤得到的检波积分值进行调整处理；示例性地，预设的策略为将检波积分值乘以2则可以对上述步骤得到的检波积分值乘以2作为后续锁定点调节的依据。
值得注意的是，根据调整后的检波积分值对IQ调制器进行锁定处理可以通过现有常规的锁定方案进行锁定处理，此处不再赘述。
如图3所示，初始静态偏置点包括第一同相支路偏置点和第一正交支路偏置点，初始静态偏置点可以通过但不限于步骤S210、步骤S220和步骤S230得到：
步骤S210，设定同相支路的第一初始偏置点和正交支路的第二初始偏置点；
步骤S220，对第一初始偏置点进行第一迭代优化处理，得到第二同相支路偏置点；以及对第二初始偏置点进行第二迭代优化处理，得到第二正交支路偏置点；
步骤S230，在第二同相支路偏置点和第二正交支路偏置点均小于预设阈值的情况下，将第二同相支路偏置点确定为第一同相支路偏置点，以及将第二正交支路偏置点确定为第一正交支路偏置点。
在本申请的实施例中，在获取初始静态偏置点的过程中，首先设定同相支路的第一初始偏置点和正交支路的第二初始偏置点；接着对第一初始偏置点进行第一迭代优化处理，得到第二同相支路偏置点；以及对第二初始偏置点进行第二迭代优化处理，就可以得到第二正交支路偏置点；最后在第二同相支路偏置点和第二正交支路偏置点均小于预设阈值的情况下，就会将第二同相支路偏置点确定为第一同相支路偏置点，以及将第二正交支路偏置点确定为第一正交支路偏置点。
值得注意的是，本申请实施例中的第一同相支路偏置点和第二同相支路偏置点只是为了区分说明不同状态下的偏置点，为了更好地对本申请实施例的具体工作原理进行阐述，而不应当认定两者是属于不同性质的对象。第一正交支路偏置点和第二正交支路偏置点同理。
可以理解的是，对第一初始偏置点进行第一迭代优化处理，即对第一初始偏置点进行迭代优化调整处理。同理，对第二初始偏置点进行第二迭代优化处理，即对第二初始偏置点进行迭代优化调整处理。
如图4所示，上述步骤S220可以包括但不限于步骤S221、步骤S222、步骤S223和步骤S224：
步骤S221，对IQ调制器进行第一相位扫描处理，记录第一光电流值；
步骤S222，将第一初始偏置点添加预设的第一相位变换值，得到第一调整偏置点；
步骤S223，基于第一调整偏置点，对IQ调制器进行第二相位扫描处理，记录第二光电流值；
步骤S224，根据第一光电流值和第二光电流值，对第一初始偏置点进行调整处理。
在本申请的实施例中，对第一初始偏置点进行第一迭代优化处理的过程中，首先对IQ调制器进行第一相位扫描处理，从而得到第一光电流值；接着将第一初始偏置点添加预设的第一相位变换值，得到第一调整偏置点；接着基于第一调整偏置点，对IQ调制器进行第二相位 扫描处理，得到第二光电流值；最后根据第一光电流值和第二光电流值，对第一初始偏置点进行调整处理。
值得注意的是，将第一初始偏置点添加预设的第一相位变换值，就可以得到第一调整偏置点；接着基于第一调整偏置点再次对IQ调制器进行第二相位扫描处理，从而得到第二光电流值；将第一光电流值与第二光电流值进行对比，从而得知第一初始偏置点的调整方向是否正确。
如图5所示，上述步骤S220可以包括但不限于步骤S225、步骤S226、步骤S227和步骤S228：
步骤S225，对IQ调制器进行第三相位扫描处理，记录第三光电流值；
步骤S226，将第二初始偏置点添加预设的第二相位变换值，得到第二调整偏置点；
步骤S227，基于第二调整偏置点，对IQ调制器进行第四相位扫描处理，记录第四光电流值；
步骤S228，根据第三光电流值和第四光电流值，对第二初始偏置点进行调整处理。
在本申请的实施例中，对第二初始偏置点进行第二迭代优化处理的过程中，首先对IQ调制器进行第三相位扫描处理，从而得到第三光电流值；接着将第二初始偏置点添加预设的第二相位变换值，得到第二调整偏置点；接着基于第二调整偏置点，对IQ调制器进行第四相位扫描处理，得到第四光电流值；最后根据第三光电流值和第四光电流值，对第二初始偏置点进行调整处理。
值得注意的是，将第二初始偏置点添加预设的第二相位变换值，就可以得到第二调整偏置点；接着基于第二调整偏置点再次对IQ调制器进行第四相位扫描处理，从而得到第四光电流值；将第三光电流值与第四光电流值进行对比，从而得知第二初始偏置点的调整方向是否正确。
如图6所示，上述步骤S224可以包括但不限于步骤S2241和步骤S2242：
步骤S2241，在第二光电流值小于第一光电流值的情况下，将第一调整偏置点确定为新的第一初始偏置点；
步骤S2242，在第二光电流值大于或等于第一光电流值的情况下，将第一初始偏置点确定为新的第一初始偏置点，并且将第一相位变换值取负号作为新的第一相位变换值。
在本申请的实施例中，在第二光电流值小于第一光电流值的情况下，就会将第一调整偏置点确定为新的第一初始偏置点；在第二光电流值大于或等于第一光电流值的情况下，就会将第一初始偏置点确定为新的第一初始偏置点，并且将第一相位变换值取负号作为新的第一相位变换值，基于新的第一相位变换值重新对第一初始偏置点进行调整处理。
可以理解的是，在第二光电流值大于或等于第一光电流值的时候，就代表着先前对第一初始偏置点的调整方向出现了相反的情况，因此需要将第一相位变换值取负号重新进行反向调整处理，以使得对第一初始偏置点进行第一迭代优化处理，得到第二同相支路偏置点。
如图7所示，上述步骤S228可以包括但不限于步骤S2281和步骤S2282：
步骤S2281，在第四光电流值小于第三光电流值的情况下，将第二调整偏置点确定为新的第二初始偏置点；
步骤S2282，在第四光电流值大于或等于第三光电流值的情况下，将第二初始偏置点确定为新的第二初始偏置点，并且将第二相位变换值取负号作为新的第二相位变换值。
在本申请的实施例中，在第四光电流值小于第三光电流值的情况下，就会将第二调整偏置点确定为新的第二初始偏置点；在第四光电流值大于或等于第三光电流值的情况下，就会将第二初始偏置点确定为新的第二初始偏置点，并且将第二相位变换值取负号作为新的第二相位变换值，基于新的第二相位变换值重新对第二初始偏置点进行调整处理。
可以理解的是，在第四光电流值大于或等于第三光电流值的时候，就代表着先前对第二初始偏置点的调整方向出现了相反的情况，因此需要将第二相位变换值取负号重新进行反向调整处理，以使得对第二初始偏置点进行第二迭代优化处理，得到第二正交支路偏置点。
如图8所示，上述步骤S100可以包括但不限于步骤S110和步骤S120：
步骤S110，将调节抖动信号输入至IQ调制器并且对IQ调制器进行偏置点调节处理，以使得IQ调制器处于第一锁定状态，其中，在第一锁定状态下，同相支路、正交支路以及同相支路和正交支路之间的相位支路的检波积分值均为0；
步骤S120，将处于第一锁定状态的IQ调制器的偏置点确定为第一静态偏置点。
在本申请的实施例中，在获取IQ调制器处于第一锁定状态下的第一静态偏置点的过程中，首先将调节抖动信号输入至IQ调制器并且对IQ调制器进行偏置点调节处理，以使得IQ调制器处于第一锁定状态，其中，在第一锁定状态下，同相支路、正交支路以及同相支路和正交支路之间的相位支路的检波积分值均为0；接着将处于第一锁定状态的IQ调制器的偏置点确定为第一静态偏置点。
如图9所示，上述步骤S500可以包括但不限于步骤S510和步骤S520：
步骤S510，将调整后的检波积分值确定为目标锁定值；
步骤S520，根据目标锁定值对IQ调制器进行锁定处理。
在本申请的实施例中，将调整后的检波积分值确定为目标锁定值；接着基于目标锁定值对IQ调制器进行锁定处理。其中，基于目标锁定值对IQ调制器进行锁定处理的过程中可以基于现有传统的锁定方案；示例性地，在IQ调制器的同相支路和正交支路加载抖动信号，通过互补监控光电二极管探测，进行检波处理，基于检波信号使得IQ调制器的偏置点向目标锁定值靠拢；在检波积分达到目标锁定值的情况下，就会认定IQ调制器已经完成了锁定点调节处理的操作，IQ调制器出光载波均被消除干净。
如图10和图11所示，上述步骤S400可以包括但不限于以下步骤之一：
步骤S410，对检波积分值进行预设倍数放大处理；
步骤S420，对检波积分值添加预设积分值。
在本申请的实施例中，根据预设策略对检波积分值进行调整处理，可以对检波积分值进行预设倍数的放大处理，也可以对检波积分值添加预设积分值，以完成对检波积分值的调整处理，为了后续的锁定点调节做好准备。
示例性地，在IQ调制器的同相支路的消光比只有20dB的情况下，按照传统锁定方案进行锁定的过程中，使用互补监控光电二极管进行光信号接收，则正交支路会自动锁定到170°，正交支路就会偏离-10°，未消除的载波与同相支路因为消光比不足漏出的载波在互补路干涉相消，但是在出光口干涉相长，剩余载波全部在出光路，无法使用；在上述情况的条件下，需要对检波积分值进行调整，使得锁定点自动锁定到190°，使得出光载波被消除干净，能够被使用。因为正交支路锁定在170°是正交支路的检波积分值为0的状态，通过上述步骤S300得到检波积分值，在小范围内，检波积分值与相位变化量是呈线性的，因此将得到的检波积 分值乘以2，即可将正交支路锁定到190°，达成调整目标。
为了更加清楚地说明本申请实施例提供的锁定点调节方法带来的效果，以下面的实施例进行说明。
如图12和图13所示，本申请实施例为在特定不理想消光比的情况下，偏置点在180°、180°和90°的时候对应的星座图和光谱图；此时，I路和Q路均设置为180°，两者之间的相位Phase设置为90°，由图可知，由于I路和Q路没有偏离180°以补偿另外一路的消光比不足，导致载波未能消除，存在光谱边峰-25dB。
如图14和图15所示，本申请实施例为在特定不理想消光比的情况下，利用互补监控光电二极管进行监控处理而得到的星座图和光谱图；此时，由于使用了互补监控光电二极管，其I路和Q路在2×2合束器中增加的相位差与输出路相反，表现出的锁定结果为I路与Q路的偏置点锁定值与使用输出路分光监控光电二极管的偏置点锁定值远离180°的大小接近、方向相反，从而增加了未消除的载波，存在较严重的光谱边峰-19dB，导致锁定结果无法使用。
如图16和图17所示，本申请实施例为在特定不理想消光比的情况下，利于上述实施例的锁定点调节方法进行优化调整处理之后而得到的星座图和光谱图；基于上述的实施例的锁定点调节方法，锁定点的载波消除得到了明显的优化，光谱边峰从-19dB优化达到了-51dB，Phase路依然会自动调整到接近90°。
另外，如图18所示，本申请的一个实施例还提供了一种电子设备700，该电子设备700包括：
存储器720、处理器710及存储在存储器720上并可在处理器710上运行的计算机程序。
处理器710和存储器720可以通过总线或者其他方式连接。
需要说明的是，本实施例中的电子设备700和上述实施例中的锁定点调节方法属于相同的发明构思，因此这些实施例具有相同的实现原理以及技术效果，此处不再详述。
实现上述实施例的锁定点调节方法所需的非暂态软件程序以及指令存储在存储器720中，当被处理器710执行时，执行上述实施例中的锁定点调节方法，例如，执行以上描述的图2中的方法步骤S100至S500、图3中的方法步骤S210至S230、图4中的方法步骤S221至S224、图5中的方法步骤S225至S228、图6中的方法步骤S2241至S2242、图7中的方法步骤S2281至S2282、图8中的方法步骤S110至S120、图9中的方法步骤S510至S520、图10中的方法步骤S410、图11中的方法步骤S420。
此外，本申请的一个实施例还提供了一种计算机可读存储介质，该计算机可读存储介质存储有计算机可执行指令，该计算机可执行指令被一个处理器710执行，例如，被上述电子设备700实施例中的一个处理器710执行，可使得上述处理器710执行上述实施例中的锁定点调节方法，例如，执行以上描述的图2中的方法步骤S100至S500、图3中的方法步骤S210至S230、图4中的方法步骤S221至S224、图5中的方法步骤S225至S228、图6中的方法步骤S2241至S2242、图7中的方法步骤S2281至S2282、图8中的方法步骤S110至S120、图9中的方法步骤S510至S520、图10中的方法步骤S410、图11中的方法步骤S420。
本申请实施例包括：获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点；接 着将第一静态偏置点替换为初始静态偏置点；其中，初始静态偏置点用于表征IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点；接着基于第一锁定状态和初始静态偏置点，对IQ调制器的抖动信号进行检波处理，得到检波积分值；接着根据预设的策略对检波积分值进行调整；最后根据调整后的检波积分值对IQ调制器进行锁定处理。根据本申请实施例提供的技术方案，能够在互补监控光电二极管监控的情况下实现锁定点调节处理，以消除载波，达到在星座图和光谱要求较高的情况下自动锁定可使用的效果。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统可以被实施为软件、固件、硬件及其适当的组合。某些物理组件或所有物理组件可以被实施为由处理器，如中央处理器、数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。

Claims (11)

  1. 一种锁定点调节方法，包括：
    获取同相正交IQ调制器处于第一锁定状态下的第一静态偏置点；
    将所述第一静态偏置点替换为初始静态偏置点；其中，所述初始静态偏置点用于表征所述IQ调制器的同相支路和正交支路出光均最小的情况下所对应的静态偏置点；
    基于所述第一锁定状态和所述初始静态偏置点，对所述IQ调制器的抖动信号进行检波处理，得到检波积分值；
    根据预设策略对所述检波积分值进行调整；
    根据调整后的所述检波积分值对所述IQ调制器进行锁定处理。
  2. 根据权利要求1所述的锁定点调节方法，其中，所述初始静态偏置点包括第一同相支路偏置点和第一正交支路偏置点；所述初始静态偏置点通过以下方式得到：
    设定所述同相支路的第一初始偏置点和所述正交支路的第二初始偏置点；
    对所述第一初始偏置点进行第一迭代优化处理，得到第二同相支路偏置点；以及对所述第二初始偏置点进行第二迭代优化处理，得到第二正交支路偏置点；
    在所述第二同相支路偏置点和所述第二正交支路偏置点均小于预设阈值的情况下，将所述第二同相支路偏置点确定为所述第一同相支路偏置点，以及将所述第二正交支路偏置点确定为所述第一正交支路偏置点。
  3. 根据权利要求2所述的锁定点调节方法，其中，所述对所述第一初始偏置点进行第一迭代优化处理，包括：
    对所述IQ调制器进行第一相位扫描处理，记录第一光电流值；
    将所述第一初始偏置点添加预设的第一相位变换值，得到第一调整偏置点；
    基于所述第一调整偏置点，对所述IQ调制器进行第二相位扫描处理，记录第二光电流值；
    根据所述第一光电流值和所述第二光电流值，对所述第一初始偏置点进行调整处理。
  4. 根据权利要求2所述的锁定点调节方法，其中，所述对所述第二初始偏置点进行第二迭代优化处理，包括：
    对所述IQ调制器进行第三相位扫描处理，记录第三光电流值；
    将所述第二初始偏置点添加预设的第二相位变换值，得到第二调整偏置点；
    基于所述第二调整偏置点，对所述IQ调制器进行第四相位扫描处理，记录第四光电流值；
    根据所述第三光电流值和所述第四光电流值，对所述第二初始偏置点进行调整处理。
  5. 根据权利要求3所述的锁定点调节方法，其中，所述根据所述第一光电流值和所述第二光电流值，对所述第一初始偏置点进行调整处理，包括如下至少之一：
    在所述第二光电流值小于所述第一光电流值的情况下，将所述第一调整偏置点确定为新的所述第一初始偏置点；或
    在所述第二光电流值大于或等于所述第一光电流值的情况下，将所述第一初始偏置点确定为新的所述第一初始偏置点，并且将所述第一相位变换值取负号作为新的所述第一相位变换值。
  6. 根据权利要求4所述的锁定点调节方法，其中，所述根据所述第三光电流值和所述第四光电流值，对所述第二初始偏置点进行调整处理，包括如下至少之一：
    在所述第四光电流值小于所述第三光电流值的情况下，将所述第二调整偏置点确定为新的所述第二初始偏置点；或
    在所述第四光电流值大于或等于所述第三光电流值的情况下，将所述第二初始偏置点确定为新的所述第二初始偏置点，并且将所述第二相位变换值取负号作为新的所述第二相位变换值。
  7. 根据权利要求1所述的锁定点调节方法，其中，所述获取所述IQ调制器处于第一锁定状态下的第一静态偏置点，包括：
    将调节抖动信号输入至所述IQ调制器并且对所述IQ调制器进行偏置点调节处理，以使得所述IQ调制器处于所述第一锁定状态，其中，在所述第一锁定状态下，所述同相支路、所述正交支路以及所述同相支路和所述正交支路之间的相位支路的检波积分值均为0；
    将处于所述第一锁定状态的所述IQ调制器的偏置点确定为所述第一静态偏置点。
  8. 根据权利要求1所述的锁定点调节方法，其中，所述根据调整后的所述检波积分值对所述IQ调制器进行锁定处理，包括：
    将调整后的所述检波积分值确定为目标锁定值；
    根据所述目标锁定值对所述IQ调制器进行锁定处理。
  9. 根据权利要求1所述的锁定点调节方法，其中，所述根据预设策略对所述检波积分值进行调整，包括以下之一：
    对所述检波积分值进行预设倍数放大处理；或
    对所述检波积分值添加预设积分值。
  10. 一种电子设备，包括：
    存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如权利要求1至9任意一项所述的锁定点调节方法。
  11. 一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令用于执行权利要求1至9任意一项所述的锁定点调节方法。
PCT/CN2023/110570 2022-10-24 2023-08-01 锁定点调节方法、电子设备及计算机可读存储介质 WO2024087775A1 (zh)

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