WO2024080391A1 - Display device comprising semiconductor light-emitting element - Google Patents

Display device comprising semiconductor light-emitting element Download PDF

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Publication number
WO2024080391A1
WO2024080391A1 PCT/KR2022/015276 KR2022015276W WO2024080391A1 WO 2024080391 A1 WO2024080391 A1 WO 2024080391A1 KR 2022015276 W KR2022015276 W KR 2022015276W WO 2024080391 A1 WO2024080391 A1 WO 2024080391A1
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WO
WIPO (PCT)
Prior art keywords
light emitting
emitting device
semiconductor light
insulating layer
disposed
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PCT/KR2022/015276
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French (fr)
Korean (ko)
Inventor
최진혁
Original Assignee
엘지전자 주식회사
엘지디스플레이 주식회사
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Application filed by 엘지전자 주식회사, 엘지디스플레이 주식회사 filed Critical 엘지전자 주식회사
Priority to PCT/KR2022/015276 priority Critical patent/WO2024080391A1/en
Publication of WO2024080391A1 publication Critical patent/WO2024080391A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the embodiment relates to a display device including a semiconductor light emitting device.
  • LCDs liquid crystal displays
  • OLED displays OLED displays
  • Micro-LED displays Micro-LED displays
  • a micro-LED display is a display that uses micro-LED, a semiconductor light emitting device with a diameter or cross-sectional area of 100 ⁇ m or less, as a display element.
  • micro-LED displays use micro-LED, a semiconductor light-emitting device, as a display device, they have excellent performance in many characteristics such as contrast ratio, response speed, color gamut, viewing angle, brightness, resolution, lifespan, luminous efficiency, and luminance.
  • the micro-LED display has the advantage of being able to freely adjust the size and resolution and implement a flexible display because the screen can be separated and combined in a modular manner.
  • micro-LED displays require more than millions of micro-LEDs, there is a technical problem that makes it difficult to quickly and accurately transfer micro-LEDs to the display panel.
  • Transfer technologies that have been recently developed include the pick and place process, laser lift-off method, or self-assembly method.
  • the self-assembly method is a method in which the semiconductor light-emitting device finds its assembly position within the fluid on its own, and is an advantageous method for implementing a large-screen display device.
  • DEP Force is required for self-assembly, but due to the difficulty in uniformly controlling the DEP Force, when assembling using self-assembly, a phenomenon occurs in which the semiconductor light emitting device is tilted to an incorrect position within the assembly hall. There is a problem.
  • DEP Force is required for self-assembly, but when DEP Force is used, it faces a technical contradiction in that the electrical contact characteristics are deteriorated due to the tilting phenomenon of the semiconductor light emitting device.
  • One of the technical challenges of the embodiment is to solve the problem of a decrease in the lighting rate due to a decrease in electrical contact characteristics between the electrodes of the self-assembled light emitting device and the predetermined panel electrode.
  • one of the technical challenges of the embodiment is the problem of disconnection of the side wiring at the bottom edge of the light emitting device chip in the side wiring technology that connects the panel wiring to the side of the light emitting device chip after self-assembly using DEP force in the internal technology. It is intended to solve the problem.
  • one of the technical challenges of the embodiment is that, in the internal technology, when the power to the assembly electrode is cut off after self-assembly and there is no DEP force, the fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode is weak, and the semiconductor light emitting device assembled in the assembly hole falls off. It is intended to solve the problem.
  • a display device including a semiconductor light emitting device includes a substrate, first electrodes and second electrodes spaced apart from each other on the substrate, and a first insulating layer disposed on the first and second electrodes. and an assembly partition including a predetermined assembly hole and disposed on the first insulating layer, a semiconductor light emitting device disposed in the assembly hole, a side wiring electrically connected to a side of the semiconductor light emitting device, and the semiconductor light emitting device. It may include a second panel electrode electrically connected to the upper side of the device.
  • the semiconductor light emitting device may include a light emitting structure and a heat transfer insulating layer disposed on the outside of the light emitting structure.
  • the light emitting structure includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer disposed between them, and the side wiring may be electrically connected to the first conductivity type semiconductor layer of the semiconductor light emitting device. .
  • the side wiring may include a first side wiring disposed on a side of the semiconductor light emitting device and a second side wiring electrically contacting one or more of the first and second electrodes.
  • the embodiment further includes a passivation layer disposed between the light emitting structure and the heat transfer insulating layer, and the heat transfer efficiency of the passivation layer may be lower than that of the heat transfer insulating layer.
  • the side wiring may be disposed on the side of the light emitting structure and on the heat transfer insulating layer.
  • a display device including a semiconductor light emitting device includes a substrate, first electrodes and second electrodes spaced apart from each other on the substrate, and first insulators disposed on the first and second electrodes. It may include a layer, an assembly partition including a predetermined assembly hole and disposed on the first insulating layer, and a semiconductor light emitting device disposed within the assembly hole.
  • the semiconductor light emitting device includes a light emitting structure and a heat transfer insulating layer disposed on the outside of the light emitting structure, and the lower end of the heat transfer insulating layer may be disposed to extend to the bottom of the light emitting structure.
  • the light emitting structure includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer disposed between them, and the side wiring may be electrically connected to the first conductivity type semiconductor layer of the semiconductor light emitting device. .
  • the side wiring may include a first side wiring disposed on a side of the semiconductor light emitting device and a second side wiring electrically contacting one or more of the first and second electrodes.
  • the embodiment further includes a passivation layer disposed between the light emitting structure and the heat transfer insulating layer, and the heat transfer efficiency of the passivation layer may be lower than that of the heat transfer insulating layer.
  • the side wiring may be disposed on the side of the light emitting structure and the heat transfer insulating layer.
  • the electrical contact characteristics are improved by expanding the electrical contact area by the side wiring connected to the side of the semiconductor light-emitting device, which has the technical effect of improving the lighting rate.
  • the problem of disconnection of the side wiring at the bottom edge of the light emitting device chip can be solved.
  • the semiconductor light emitting device 150A may include a heat transfer insulating layer 157 disposed on the outside of the light emitting structure 152, and the side wiring 290 is disconnected by the heat transfer insulating layer 157.
  • the embodiment includes a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b.
  • G contact characteristics
  • the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light emitting device 150A, thereby reducing the heat of the material of the side electrode.
  • the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light emitting device 150A, thereby reducing the heat of the material of the side electrode.
  • G contact characteristics
  • the side electrode may include a low-temperature metal material with a low melting point, such as Al, and the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode.
  • a low-temperature metal material with a low melting point such as Al
  • the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode.
  • G contact characteristics
  • a heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, and a passivation layer is disposed between the light emitting structure 152 and the heat transfer insulating layer 157, thereby reducing the heat transfer insulating layer 157 in the hot press process.
  • heat when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
  • a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157.
  • the heat transfer insulating layer 157 includes the metal oxide constituting the side electrode, the bonding strength between the first side wiring 290a and the heat transfer insulating layer 157 can be significantly improved, thereby improving the reliability of the device. There is a technical effect.
  • the internal technology can solve the problem of the semiconductor light emitting device assembled in the assembly hole being separated due to weak fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode.
  • the preliminary side wiring 290a has a special technical effect of stably fixing the semiconductor light emitting device 150A.
  • FIG. 1 is an exemplary diagram of a living room of a house where a display device according to an embodiment is placed.
  • Figure 2 is a block diagram schematically showing a display device according to an embodiment.
  • FIG. 3 is a circuit diagram showing an example of the pixel of FIG. 2.
  • FIG. 4 is an enlarged view of the first panel area in the display device of FIG. 1.
  • FIG. 5 is a cross-sectional view taken along line B1-B2 in area A2 of FIG. 4.
  • Figure 6 is an example of a light emitting device according to an embodiment being assembled on a substrate by a self-assembly method.
  • Figure 7 is a partial enlarged view of area A3 in Figure 6.
  • Figure 8 is a photograph showing the disconnection of the side wiring in the internal technology.
  • Figure 9 is a cross-sectional view of a display device 300 including a semiconductor light-emitting device according to an embodiment.
  • FIG. 10 is a detailed cross-sectional view of a display device 300 including a semiconductor light emitting device according to the embodiment shown in FIG. 9.
  • FIG. 11 is an example photograph of the C1 area of the display device 300 including a semiconductor light emitting device according to the embodiment shown in FIG. 10.
  • Figures 12A to 12I are cross-sectional views of the manufacturing process of a display device 300 including a semiconductor light emitting device according to an embodiment.
  • Figure 13 is a cross-sectional view of a display device 300B including a semiconductor light emitting device according to a second embodiment.
  • Display devices described in this specification include digital TVs, mobile phones, smart phones, laptop computers, digital broadcasting terminals, personal digital assistants (PDAs), portable multimedia players (PMPs), navigation, and slates.
  • PDAs personal digital assistants
  • PMPs portable multimedia players
  • slates may include PCs, tablet PCs, ultra-books, desktop computers, etc.
  • the configuration according to the embodiment described in this specification can be applied to a device capable of displaying even if it is a new product type that is developed in the future.
  • FIG. 1 shows a living room of a house where a display device 100 according to an embodiment is installed.
  • the display device 100 of the embodiment can display the status of various electronic products such as a washing machine 101, a robot vacuum cleaner 102, and an air purifier 103, and can communicate with each electronic product based on IOT, and can communicate with the user. Each electronic product can also be controlled based on the setting data.
  • the display device 100 may include a flexible display manufactured on a thin and flexible substrate.
  • Flexible displays can bend or curl like paper while maintaining the characteristics of existing flat displays.
  • a unit pixel refers to the minimum unit for implementing one color.
  • a unit pixel of a flexible display can be implemented by a light-emitting device.
  • the light emitting device may be Micro-LED or Nano-LED, but is not limited thereto.
  • FIG. 2 is a block diagram schematically showing a display device according to an embodiment
  • FIG. 3 is a circuit diagram showing an example of the pixel of FIG. 2.
  • a display device may include a display panel 10, a driving circuit 20, a scan driver 30, and a power supply circuit 50.
  • the display device 100 of the embodiment may drive the light emitting device using an active matrix (AM) method or a passive matrix (PM) method.
  • AM active matrix
  • PM passive matrix
  • the driving circuit 20 may include a data driver 21 and a timing control unit 22.
  • the display panel 10 may be divided into a display area (DA) and a non-display area (NDA) disposed around the display area (DA).
  • the display area DA is an area where pixels PX are formed to display an image.
  • the display panel 10 includes data lines (D1 to Dm, m is an integer greater than 2), scan lines (S1 to Sn, n is an integer greater than 2) that intersect the data lines (D1 to Dm), and a high potential voltage. It may include pixels (PX) connected to a high-potential voltage line supplied, a low-potential voltage line supplied with a low-potential voltage, and data lines (D1 to Dm) and scan lines (S1 to Sn).
  • Each of the pixels PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3.
  • the first sub-pixel (PX1) emits the first color light of the first wavelength
  • the second sub-pixel (PX2) emits the second color light of the second wavelength
  • the third sub-pixel (PX3) emits the third color light. It is possible to emit light of a third color of wavelength.
  • the first color light may be red light
  • the second color light may be green light
  • the third color light may be blue light, but are not limited thereto.
  • FIG. 2 it is illustrated that each of the pixels PX includes three sub-pixels, but the present invention is not limited thereto. That is, each pixel PX may include four or more sub-pixels.
  • Each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) includes at least one of the data lines (D1 to Dm), at least one of the scan lines (S1 to Sn), and It can be connected to the above voltage line.
  • the first sub-pixel PX1 may include light-emitting devices LD, a plurality of transistors for supplying current to the light-emitting devices LD, and at least one capacitor Cst.
  • each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) may include only one light emitting element (LD) and at least one capacitor (Cst). It may be possible.
  • Each of the light emitting elements LD may be a semiconductor light emitting diode including a first electrode, a plurality of conductive semiconductor layers, and a second electrode.
  • the first electrode may be an anode electrode and the second electrode may be a cathode electrode, but this is not limited.
  • the plurality of transistors may include a driving transistor (DT) that supplies current to the light emitting devices (LD) and a scan transistor (ST) that supplies a data voltage to the gate electrode of the driving transistor (DT).
  • the driving transistor DT has a gate electrode connected to the source electrode of the scan transistor ST, a source electrode connected to a high potential voltage line to which a high potential voltage is applied, and a drain connected to the first electrodes of the light emitting elements LD. It may include electrodes.
  • the scan transistor (ST) has a gate electrode connected to the scan line (Sk, k is an integer satisfying 1 ⁇ k ⁇ n), a source electrode connected to the gate electrode of the driving transistor (DT), and a data line (Dj, j). It may include a drain electrode connected to an integer satisfying 1 ⁇ j ⁇ m.
  • the capacitor Cst is formed between the gate electrode and the source electrode of the driving transistor DT.
  • the storage capacitor Cst can charge the difference between the gate voltage and the source voltage of the driving transistor DT.
  • the driving transistor (DT) and the scan transistor (ST) may be formed of a thin film transistor.
  • the driving transistor (DT) and the scan transistor (ST) are mainly described as being formed of a P-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but the present invention is not limited thereto.
  • the driving transistor (DT) and scan transistor (ST) may be formed of an N-type MOSFET. In this case, the positions of the source and drain electrodes of the driving transistor (DT) and the scan transistor (ST) may be changed.
  • each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) includes one driving transistor (DT), one scan transistor (ST), and one capacitor ( Although it is exemplified to include 2T1C (2 Transistor - 1 capacitor) with Cst), the present invention is not limited thereto.
  • Each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) may include a plurality of scan transistors (ST) and a plurality of capacitors (Cst).
  • the driving circuit 20 outputs signals and voltages for driving the display panel 10.
  • the driving circuit 20 may include a data driver 21 and a timing control unit 22.
  • the data driver 21 receives digital video data (DATA) and source control signal (DCS) from the timing control unit 22.
  • the data driver 21 converts digital video data (DATA) into analog data voltages according to the source control signal (DCS) and supplies them to the data lines (D1 to Dm) of the display panel 10.
  • the timing control unit 22 receives digital video data (DATA) and timing signals from the host system.
  • Timing signals may include a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock.
  • the host system may be an application processor in a smartphone or tablet PC, a monitor, or a system-on-chip in a TV.
  • the scan driver 30 receives a scan control signal (SCS) from the timing controller 22.
  • the scan driver 30 generates scan signals according to the scan control signal SCS and supplies them to the scan lines S1 to Sn of the display panel 10.
  • the scan driver 30 may include a plurality of transistors and may be formed in the non-display area NDA of the display panel 10.
  • the scan driver 30 may be formed as an integrated circuit, and in this case, it may be mounted on a gate flexible film attached to the other side of the display panel 10.
  • the power supply circuit 50 generates a high-potential voltage (VDD) and a low-potential voltage (VSS) for driving the light-emitting elements (LD) of the display panel 10 from the main power supply, thereby generating a high-potential voltage of the display panel 10. It can be supplied to lines and low-potential voltage lines. Additionally, the power supply circuit 50 may generate and supply driving voltages for driving the driving circuit 20 and the scan driver 30 from the main power source.
  • VDD high-potential voltage
  • VSS low-potential voltage
  • LD light-emitting elements
  • Figure 4 is an enlarged view of the first panel area A1 in the display device of Figure 1.
  • the display device 100 of the embodiment may be manufactured by mechanically and electrically connecting a plurality of panel areas, such as the first panel area A1, by tiling.
  • the first panel area A1 may include a plurality of light emitting devices 150 arranged for each unit pixel (PX in FIG. 2).
  • the unit pixel PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3.
  • a plurality of red light-emitting devices 150R are disposed in the first sub-pixel (PX1)
  • a plurality of green light-emitting devices 150G are disposed in the second sub-pixel PX2
  • a plurality of blue light-emitting devices 150B may be placed in the third sub-pixel (PX3).
  • the unit pixel PX may further include a fourth sub-pixel in which no light-emitting element is disposed, but this is not limited.
  • the light emitting device 150 may be a semiconductor light emitting device.
  • Figure 5 is a cross-sectional view taken along line B1-B2 in area A2 of Figure 4.
  • the display device 100 of the embodiment includes a substrate 200a, spaced apart wiring lines 201a and 202a, a first insulating layer 211a, a second insulating layer 211b, and a third insulating layer ( 206) and a plurality of light emitting devices 150.
  • the wiring may include a first wiring 201a and a second wiring 202a that are spaced apart from each other.
  • the first wiring 201a and the second wiring 202a may function as panel wiring for applying power to the light emitting device 150 from the panel, and in the case of self-assembly of the light emitting device 150, the dielectric for assembly It may also function as an assembled electrode to generate a phoretic force.
  • the wirings 201a and 202a may be formed of transparent electrodes (ITO) or may contain a metal material with excellent electrical conductivity.
  • the wirings 201a and 202a are titanium (Ti), chromium (Cr), nickel (Ni), aluminum (Al), platinum (Pt), gold (Au), tungsten (W), and molybdenum (Mo). It may be formed of at least one of these or an alloy thereof.
  • a first insulating layer 211a may be disposed between the first wiring 201a and the second wiring 202a, and a second insulating layer (211a) may be disposed on the first wiring 201a and the second wiring 202a. 211b) can be arranged.
  • the first insulating layer 211a and the second insulating layer 211b may be an oxide film or a nitride film, but are not limited thereto.
  • the light-emitting device 150 may include a red light-emitting device 150R, a green light-emitting device 150G, and a blue light-emitting device 150B0 to form a unit pixel (sub-pixel), but is not limited thereto, and includes a red phosphor and Red and green colors can also be implemented by using green phosphors, etc.
  • the substrate 200a may be made of glass or polyimide. Additionally, the substrate 200a may include a flexible material such as PEN (Polyethylene Naphthalate) or PET (Polyethylene Terephthalate). Additionally, the substrate 200 may be made of a transparent material, but is not limited thereto.
  • the substrate 200a may function as a support substrate in a panel, and may also function as an assembly substrate when self-assembling a light emitting device.
  • the third insulating layer 206 may include an insulating and flexible material such as polyimide, PEN, PET, etc., and may be integrated with the substrate 200a to form one substrate.
  • the third insulating layer 206 may be a conductive adhesive layer that has adhesiveness and conductivity, and the conductive adhesive layer is flexible and may enable a flexible function of the display device.
  • the third insulating layer 206 may be an anisotropic conductive film (ACF) or a conductive adhesive layer such as an anisotropic conductive medium or a solution containing conductive particles.
  • the conductive adhesive layer may be a layer that is electrically conductive in a direction perpendicular to the thickness, but electrically insulating in a direction horizontal to the thickness.
  • the gap between the first and second wirings 201a and 202a is formed to be smaller than the width of the light emitting device 150 and the width of the assembly hole 203H, so that the assembly position of the light emitting device 150 using an electric field can be fixed more precisely. can do.
  • a third insulating layer 206 is formed on the first and second wirings 201a and 202a to protect the first and second wirings 201a and 202a from the fluid 1200, and to protect the first and second wirings 201a and 202a from the fluid 1200. Leakage of current flowing through 201a, 202a) can be prevented.
  • the third insulating layer 206 may be formed as a single layer or multilayer of an inorganic insulator such as silica or alumina or an organic insulator.
  • the third insulating layer 206 may include an insulating and flexible material such as polyimide, PEN, PET, etc., and may be integrated with the substrate 200 to form one substrate.
  • the third insulating layer 206 has a partition wall, and an assembly hole 203H can be formed by the partition wall.
  • the third insulating layer 206 may include an assembly hole 203H into which the light emitting device 150 is inserted (see FIG. 6). Therefore, during self-assembly, the light emitting device 150 can be easily inserted into the assembly hole 203H of the third insulating layer 206.
  • the assembly hole 203H may be called an insertion hole, a fixing hole, an alignment hole, etc.
  • the assembly hole 203H may have a shape and size corresponding to the shape of the light emitting device 150 to be assembled at the corresponding location. Accordingly, it is possible to prevent another light emitting device from being assembled or a plurality of light emitting devices from being assembled into the assembly hole 203H.
  • Figure 6 is a diagram showing an example in which a light emitting device according to an embodiment is assembled on a substrate by a self-assembly method
  • Figure 7 is a partial enlarged view of area A3 in Figure 6.
  • Figure 7 is a diagram with area A3 rotated by 180 degrees for convenience of explanation.
  • FIGS. 6 and 7 Based on FIGS. 6 and 7 , an example in which a semiconductor light emitting device according to an embodiment is assembled into a display panel by a self-assembly method using an electromagnetic field will be described.
  • the assembled substrate 200 which will be described later, can also function as the panel substrate 200a in a display device after assembly of the light emitting device, but the embodiment is not limited thereto.
  • the semiconductor light-emitting device 150 may be introduced into the chamber 1300 filled with fluid 1200, and the semiconductor light-emitting device 150 may be placed on the assembly substrate ( 200). At this time, the light emitting device 150 adjacent to the assembly hole 203H of the assembly substrate 200 may be assembled into the assembly hole 230 by dielectrophoresis force generated by the electric field of the assembly electrodes.
  • the fluid 1200 may be water such as ultrapure water, but is not limited thereto.
  • the chamber may be called a water tank, container, vessel, etc.
  • the assembled substrate 200 may be placed on the chamber 1300. Depending on the embodiment, the assembled substrate 200 may be input into the chamber 1300.
  • the semiconductor light emitting device 150 may be implemented as a vertical semiconductor light emitting device as shown, but is not limited to this and a horizontal light emitting device may be employed.
  • the semiconductor light emitting device 150 may include a magnetic layer (not shown) containing a magnetic material.
  • the magnetic layer may include a magnetic metal such as nickel (Ni). Since the semiconductor light emitting device 150 introduced into the fluid includes a magnetic layer, it can move to the assembled substrate 200 by the magnetic field generated from the assembly device 1100.
  • the magnetic layer may be disposed on the top, bottom, or both sides of the light emitting device.
  • the semiconductor light emitting device 150 may include a passivation layer 156 surrounding the top and side surfaces.
  • the passivation layer 156 may be formed using an inorganic insulator such as silica or alumina through PECVD, LPCVD, sputtering deposition, etc. Additionally, the passivation layer 156 may be formed by spin coating an organic material such as photoresist or polymer material.
  • the semiconductor light emitting device 150 may include a first conductivity type semiconductor layer 152a, a second conductivity type semiconductor layer 152c, and an active layer 152b disposed between them.
  • the first conductive semiconductor layer 152a may be an n-type semiconductor layer
  • the second conductive semiconductor layer 152c may be a p-type semiconductor layer, but are not limited thereto.
  • a first electrode layer 154a may be disposed on the first conductivity type semiconductor layer 152a, and a second electrode layer 154b may be disposed on the second conductivity type semiconductor layer 152c. To this end, a partial area of the first conductivity type semiconductor layer 152a or the second conductivity type semiconductor layer 152c may be exposed to the outside. Accordingly, in the manufacturing process of the display device after the semiconductor light emitting device 150 is assembled on the assembly substrate 200, some areas of the passivation layer 156 may be etched.
  • the assembly substrate 200 may include a pair of first assembly electrodes 201 and second assembly electrodes 202 corresponding to each of the semiconductor light emitting devices 150 to be assembled.
  • the first assembled electrode 201 and the second assembled electrode 202 can be formed by stacking multiple single metals, metal alloys, metal oxides, etc.
  • the first assembled electrode 201 and the second assembled electrode 202 include Cu, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf. It may be formed including at least one of the following, but is not limited thereto.
  • first assembled electrode 201 and the second assembled electrode 202 are made of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), and IGZO ( indium gallium zinc oxide), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZO Nitride (IZON), Al-Ga ZnO (AGZO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, and Ni/IrOx/Au/ITO, but is not limited thereto.
  • the first assembled electrode 201 and the second assembled electrode 202 emit an electric field as an alternating voltage is applied, thereby fixing the semiconductor light emitting device 150 inserted into the assembly hole 203H by dielectrophoretic force. there is.
  • the gap between the first assembly electrode 201 and the second assembly electrode 202 may be smaller than the width of the semiconductor light emitting device 150 and the width of the assembly hole 203H, and the semiconductor light emitting device 150 using an electric field may be smaller than the width of the assembly hole 203H.
  • the assembly position can be fixed more precisely.
  • a first insulating layer 212 is formed on the first assembled electrode 201 and the second assembled electrode 202 to protect the first assembled electrode 201 and the second assembled electrode 202 from the fluid 1200. , leakage of current flowing through the first assembled electrode 201 and the second assembled electrode 202 can be prevented.
  • the first insulating layer 212 may be formed of a single layer or multiple layers of an inorganic insulator such as silica or alumina or an organic insulator.
  • the first insulating layer 212 may have a minimum thickness to prevent damage to the first assembled electrode 201 and the second assembled electrode 202 when assembling the semiconductor light emitting device 150, and the semiconductor light emitting device ( 150) may have a maximum thickness for stable assembly.
  • a partition 207 may be formed on the first insulating layer 212. Some areas of the partition wall 207 may be located on top of the first assembled electrode 201 and the second assembled electrode 202, and the remaining area may be located on the top of the assembled substrate 200.
  • assembly holes ( 203H) may be formed.
  • An assembly hole 203H in which the semiconductor light emitting devices 150 are coupled is formed in the assembly substrate 200, and the surface where the assembly hole 203H is formed may be in contact with the fluid 1200.
  • the assembly hole 203H can guide the exact assembly position of the semiconductor light emitting device 150.
  • the assembly hole 203H may have a shape and size corresponding to the shape of the semiconductor light emitting device 150 to be assembled at the corresponding location. Accordingly, it is possible to prevent another semiconductor light emitting device from being assembled or a plurality of semiconductor light emitting devices from being assembled into the assembly hole 203H.
  • the assembled device 1100 that applies a magnetic field may move along the assembled substrate 200.
  • the assembly device 1100 may be a permanent magnet or an electromagnet.
  • the assembly device 1100 may move while in contact with the assembly substrate 200 in order to maximize the area to which the magnetic field is applied within the fluid 1200.
  • the assembly device 1100 may include a plurality of magnetic materials or may include a magnetic material of a size corresponding to that of the assembly substrate 200. In this case, the moving distance of the assembly device 1100 may be limited to within a predetermined range.
  • the semiconductor light emitting device 150 in the chamber 1300 may move toward the assembly device 1100 and the assembly substrate 200 by the magnetic field generated by the assembly device 1100.
  • the semiconductor light emitting device 150 enters the assembly hole 203H by the dielectrophoresis force (DEP force) formed by the electric field of the assembly electrode of the assembly substrate. It can be fixed.
  • DEP force dielectrophoresis force
  • the first and second assembly wirings 201 and 202 form an electric field using an AC power source, and a dielectrophoretic force may be formed between the assembly wirings 201 and 202 by this electric field.
  • the semiconductor light emitting device 150 can be fixed to the assembly hole 203H on the assembly substrate 200 by this dielectrophoretic force.
  • a predetermined solder layer (not shown) is formed between the light emitting device 150 assembled on the assembly hole 203H of the assembly substrate 200 and the assembly electrode, thereby improving the bonding strength of the light emitting device 150.
  • a molding layer (not shown) may be formed in the assembly hole 203H of the assembly substrate 200.
  • the molding layer may be a transparent resin or a resin containing a reflective material or a scattering material.
  • the time required to assemble each semiconductor light-emitting device on a substrate can be drastically shortened, making it possible to implement a large-area, high-pixel display more quickly and economically.
  • DEP Force is required for self-assembly, but due to the difficulty in uniformly controlling the DEP Force, a problem occurs where the semiconductor light emitting device is tilted to an incorrect position within the assembly hall when assembling using self-assembly. There is.
  • the electrical contact characteristics are deteriorated in the subsequent electrical contact process, resulting in poor lighting rate and lower yield.
  • DEP Force is required for self-assembly, but when DEP Force is used, it faces a technical contradiction in that the electrical contact characteristics are deteriorated due to the tilting phenomenon of the semiconductor light emitting device.
  • Figure 8 is a photograph showing the disconnection of the side wiring in the internal technology.
  • the process of draining the fluid in the water tank is carried out. If the power to the assembly electrode is cut off and there is no DEP force, the fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode is weak, and the fluid is drained. The process takes tens of minutes or more, and there is a problem of the semiconductor light emitting device assembled in the assembly hole falling off.
  • FIG. 9 is a cross-sectional view of a display device 300 including a semiconductor light-emitting device according to an embodiment
  • FIG. 10 is a detailed cross-sectional view of a display device 300 including a semiconductor light-emitting device according to an embodiment shown in FIG. 9 .
  • FIG. 11 is an example photograph of the C1 area of the display device 300 including a semiconductor light emitting device according to the embodiment shown in FIG. 10.
  • a display device 300 including a semiconductor light emitting device includes a substrate 200 and a first assembled electrode 201 arranged to be spaced apart from each other on the substrate 200. ), a second assembled electrode 202, a first insulating layer 212 disposed on the first assembled electrode 201 and the second assembled electrode 202, and a predetermined assembly hole 207H. and is electrically connected to the assembly partition 207 disposed on the first insulating layer 212, the semiconductor light emitting device 150A disposed in the assembly hole 207H, and the side of the semiconductor light emitting device 150A. It may include a side wiring 290 and a second panel electrode 320 electrically connected to the upper side of the semiconductor light emitting device 150A.
  • the semiconductor light emitting device 150A may include a light emitting structure 152, a lower electrode layer 154 disposed below the light emitting structure 152, and a heat transfer insulating layer 157 disposed outside the light emitting structure 152. there is.
  • the semiconductor light emitting device 150A may further include a passivation layer (not shown) between the light emitting structure 152 and the heat transfer insulating layer 157.
  • the light emitting structure 152 may include a first conductive semiconductor layer 152a, a second conductive semiconductor layer 152c, and an active layer 152b disposed between them.
  • the first conductive semiconductor layer 152a may be an n-type semiconductor layer
  • the second conductive semiconductor layer 152c may be a p-type semiconductor layer, but are not limited thereto.
  • the side wiring 290 may be electrically connected to the first conductive semiconductor layer 152a of the semiconductor light emitting device 150A.
  • the side wiring 290 may be electrically connected to the first conductive semiconductor layer 152a of the semiconductor light emitting device 150A through the lower electrode layer 154, but is not limited to this.
  • the side wiring 290 is in electrical contact with one or more of the first side wiring 290a and the first and second assembly electrodes 201 and 202 disposed on the side of the semiconductor light emitting device 150A. It may include a second side wire 290b and a third side wire 290c in contact with the assembly partition 207.
  • the embodiment may include a first planarization layer 301 and a second planarization layer 302 disposed in the assembly hole 207H.
  • the first planarization layer 301 and the second planarization layer 302 may be formed of an insulating material.
  • the first planarization layer 301 may be disposed within the side wiring 290.
  • the embodiment may include a second planarization layer 302 disposed on the first planarization layer 301 and the side wiring 290.
  • the second planarization layer 302 is disposed between the side wiring 290 and the active layer 152b of the semiconductor light emitting device 150A to prevent electrical shorting and improve reliability.
  • FIG. 11 is an example photograph of the C1 area of the display device 300 equipped with a semiconductor light emitting device according to the embodiment shown in FIG. 10.
  • the semiconductor light emitting device 150A may include a heat transfer insulating layer 157 disposed on the outside of the light emitting structure 152, and the heat transfer insulating layer 157 prevents disconnection of the side wiring 290 and prevents electrical By improving the characteristics, there is a technical effect of significantly increasing the lighting rate.
  • the embodiment includes a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b.
  • a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b.
  • the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light emitting device 150A, thereby reducing the heat of the material of the side electrode.
  • the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light emitting device 150A, thereby reducing the heat of the material of the side electrode.
  • G contact characteristics
  • the side electrode may include a low-temperature metal material with a low melting point, such as Al, and the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode.
  • a low-temperature metal material with a low melting point such as Al
  • the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode.
  • G contact characteristics
  • a heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, and a passivation layer is disposed between the light emitting structure 152 and the heat transfer insulating layer 157, thereby reducing the heat transfer insulating layer 157 in the hot press process.
  • heat when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
  • a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157.
  • the heat transfer insulating layer 157 includes the metal oxide constituting the side electrode, the bonding strength between the first side wiring 290a and the heat transfer insulating layer 157 can be significantly improved, thereby improving the reliability of the device. There is a technical effect.
  • FIGS. 12A to 12I are cross-sectional views of the manufacturing process of the display device 300 including a semiconductor light emitting device according to an embodiment.
  • a display device 300 including a semiconductor light emitting device includes a first assembled electrode 201 and a second assembled electrode 202 spaced apart from each other on an assembled substrate 200. It includes a first insulating layer 212 disposed between the first assembly electrode 201 and the second assembly electrode 202, and a predetermined assembly hole 207H, and is located on the first insulating layer 212. It may include an assembly partition 207 disposed, and a conductor light emitting device 150A disposed within the assembly hole 207H.
  • the semiconductor light emitting device 150A can be assembled by DEP force using the first assembly electrode 201 and the second assembly electrode 202.
  • the semiconductor light emitting device 150A may include a light emitting structure 152, a lower electrode layer 154 disposed below the light emitting structure 152, and a heat transfer insulating layer 157 disposed outside the light emitting structure 152. there is.
  • the semiconductor light emitting device 150A may further include a passivation layer (not shown) between the light emitting structure 152 and the heat transfer insulating layer 157.
  • a portion of the first insulating layer 212 in the assembly hole 207H is removed to expose the upper sides of the first assembly electrode 201 and the second assembly electrode 202.
  • An insulating layer through hole ( H1) can be formed.
  • a preliminary side wiring layer 290a is formed on the exposed semiconductor light emitting device 150A, the assembled barrier rib 207, and the exposed first assembled electrode 201 and the second assembled electrode.
  • the preliminary side wiring 290a may be a metal layer or a conductive photosensitive material.
  • the preliminary side wiring 290a may be made of Al or Al alloy, but is not limited thereto.
  • the preliminary side wiring 290a may be Mo/Al/Mo or AuGe, but is not limited thereto.
  • the preliminary side wiring 290a may be made of a conductive photosensitive material.
  • the preliminary side wiring 290a may include a conductive liquid photosensitive material.
  • the preliminary side wiring 290a may be formed by forming a conductive liquid photosensitive material and then performing exposure and development processes.
  • the preliminary side wiring 290a may be a mixture of a conductive polymer and a photosensitive polymer, but is not limited thereto.
  • the preliminary side wiring 290a has a special technical effect of stably fixing the semiconductor light emitting device 150A.
  • the embodiment it is possible to solve the problem of the semiconductor light emitting device assembled in the assembly hole being separated due to weak fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode in the internal technology.
  • a predetermined hot press process may be performed. Diffusion bonding of a metal material, for example, an Al material, in the preliminary side wiring 290a may be performed through the hot press process.
  • the hot press process may range from 0.3 to 0.8 of the melting point, and the pressure may range from 0.04 to 0.1 Mpa.
  • the temperature of the hot press process may be in the range of about 200 to 250°C, but is not limited thereto.
  • a heat flow (HF) that quickly transfers heat by hot pressing to the bottom edge of the semiconductor light-emitting device 150A is provided by the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light-emitting device 150A. By forming it, it can activate thermal diffusion of the material of the side electrode or cause electromigration between the interfaces.
  • the side electrode may include a low-temperature metal material with a low melting point, such as Al, and the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode.
  • a low-temperature metal material with a low melting point such as Al
  • the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode.
  • G contact characteristics
  • the semiconductor light emitting device 150A may include a heat transfer insulating layer 157 disposed on the outside of the light emitting structure 152, and the heat transfer insulating layer 157 prevents disconnection of the side wiring 290 and prevents electrical By improving the characteristics, there is a technical effect of significantly increasing the lighting rate.
  • the embodiment includes a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b.
  • a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b.
  • the heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, so that heat or pressure in the hot press process is not directly transmitted to the semiconductor light emitting device 150A, thereby forming the light emitting structure 152. ) has a technical effect that can prevent deterioration of electrical and characteristics.
  • heat when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
  • a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157.
  • the heat transfer insulating layer 157 includes the metal oxide constituting the side electrode, the bonding strength between the first side wiring 290a and the heat transfer insulating layer 157 can be significantly improved, thereby improving the reliability of the device. There is a technical effect.
  • a first preliminary planarization layer 301a is formed on the preliminary side wiring 290a.
  • the first preliminary planarization layer 301a may be PAC (photo active compound) and may be formed of photoacryl, but is not limited thereto.
  • the first preliminary planarization layer 301a may be a compound imparting photosensitivity to a binder resin such as an acrylic photosensitive resin, a Noblock resin, a polyimide, or a siloxane, but is not limited thereto.
  • the upper side of the first preliminary planarization layer 301a is partially removed to expose the upper and side surfaces of the preliminary side wiring 290a.
  • a portion of the upper side of the first preliminary planarization layer 301a is removed by dry etching to expose the position of the first conductive semiconductor layer 152a of the semiconductor light emitting device 150A, thereby forming a first planarization layer ( 301) can be formed.
  • the exposed preliminary side wiring 290a can be removed to form the side wiring 290.
  • the side wiring 290 is in electrical contact with one or more of the first side wiring 290a and the first and second assembly electrodes 201 and 202 disposed on the side of the semiconductor light emitting device 150A. It may include a second side wire 290b and a third side wire 290c in contact with the assembly partition 207.
  • a second planarization layer 302 may be formed on the semiconductor light emitting device 150A and the assembly partition 207.
  • the second planarization layer 302 is also disposed between the side wiring 290 and the active layer 152b of the semiconductor light emitting device 150A to prevent electrical short circuit and improve reliability.
  • a third through hole 302H is formed by removing a portion of the second planarization layer 302, thereby opening a portion of the upper surface of the semiconductor light emitting device 150A.
  • a second panel electrode 320 electrically connected to the top surface of the semiconductor light emitting device 150A can be formed.
  • Figure 13 is a cross-sectional view of a display device 300B including a semiconductor light emitting device according to the second embodiment.
  • the second embodiment may adopt the technical features of the previously described embodiment.
  • the display device 300B including a semiconductor light emitting device includes a substrate 200, a first assembled electrode 201 spaced apart from each other on the substrate 200, and 2. It includes an assembled electrode 202, a first insulating layer 212 disposed on the first assembled electrode 201 and the second assembled electrode 202, and a predetermined assembly hole 207H. 1 An assembly partition wall 207 disposed on the insulating layer 212, a semiconductor light emitting device 150A disposed in the assembly hole 207H, and a side wiring electrically connected to the side of the semiconductor light emitting device 150A. It may include 290 and a second panel electrode 320 electrically connected to the upper side of the semiconductor light emitting device 150A.
  • the semiconductor light emitting device 150A includes a light emitting structure 152, a lower electrode layer 154 disposed below the light emitting structure 152, and a second heat transfer insulating layer 157B disposed outside the light emitting structure 152. can do.
  • the semiconductor light emitting device 150A may further include a passivation layer (not shown) between the light emitting structure 152 and the heat transfer insulating layer 157.
  • the side wiring 290 is in electrical contact with one or more of the first side wiring 290a and the first and second assembly electrodes 201 and 202 disposed on the side of the semiconductor light emitting device 150A. It may include a second side wire 290b and a third side wire 290c in contact with the assembly partition 207.
  • the second embodiment includes a second heat transfer insulating layer 157B disposed on the outside of the light emitting structure 152, and the lower end of the second heat transfer insulating layer 157B is arranged to extend to the bottom of the light emitting structure 152. You can.
  • the heat transfer efficiency of the second heat transfer insulating layer 157B can be efficiently transmitted to the lower edge of the semiconductor light emitting device where the first side wiring 290a and the second side wiring 290b meet.
  • the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the second heat transfer insulating layer 157B, thereby activating heat diffusion of the material of the side electrode.
  • the heat transfer insulating layer 157B There is a special technical effect of realizing better contact characteristics by forming a solid electrode film of the first side wiring 290a and the second side wiring 290b.
  • the electrical contact characteristics are improved by expanding the electrical contact area by the side wiring connected to the side of the semiconductor light-emitting device, which has the technical effect of improving the lighting rate.
  • the problem of disconnection of the side wiring at the bottom edge of the light emitting device chip can be solved.
  • a heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, and a passivation layer is disposed between the light emitting structure 152 and the heat transfer insulating layer 157, thereby reducing the heat transfer insulating layer 157 in the hot press process.
  • heat when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
  • a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157.
  • the internal technology can solve the problem of the semiconductor light emitting device assembled in the assembly hole being separated due to weak fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode.
  • Embodiments may be adopted in the field of displays that display images or information.
  • Embodiments can be adopted in the field of displays that display images or information using semiconductor light-emitting devices.
  • Embodiments can be adopted in the field of displays that display images or information using micro- or nano-level semiconductor light-emitting devices.

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Abstract

An embodiment relates to a display device comprising a semiconductor light-emitting element. A display device comprising a semiconductor light-emitting element according to an embodiment may comprise: a substrate; a first electrode and a second electrode which are disposed spaced apart from each other on the substrate; a first insulation layer disposed on the first and second electrodes; an assembly partition wall which includes a predetermined assembly hole and is disposed on the first insulation layer; a semiconductor light-emitting element disposed within the assembly hole; side surface wiring electrically connected to a side surface of the semiconductor light-emitting element; and a second panel electrode electrically connected to the upper side of the semiconductor light-emitting element. The semiconductor light-emitting element may include a light-emitting structure and a heat transfer insulation layer disposed outside the light-emitting structure.

Description

반도체 발광소자를 포함하는 디스플레이 장치Display device including semiconductor light emitting device
실시예는 반도체 발광소자를 포함하는 디스플레이 장치에 관한 것이다.The embodiment relates to a display device including a semiconductor light emitting device.
대면적 디스플레이는 액정디스플레이(LCD), OLED 디스플레이, 그리고 마이크로-LED 디스플레이(Micro-LED display) 등이 있다.Large-area displays include liquid crystal displays (LCDs), OLED displays, and Micro-LED displays.
마이크로-LED 디스플레이는 100㎛ 이하의 직경 또는 단면적을 가지는 반도체 발광소자인 마이크로-LED를 표시소자로 사용하는 디스플레이이다. A micro-LED display is a display that uses micro-LED, a semiconductor light emitting device with a diameter or cross-sectional area of 100㎛ or less, as a display element.
마이크로-LED 디스플레이는 반도체 발광소자인 마이크로-LED를 표시소자로 사용하기 때문에 명암비, 응답속도, 색 재현율, 시야각, 밝기, 해상도, 수명, 발광효율이나 휘도 등 많은 특성에서 우수한 성능을 가지고 있다.Because micro-LED displays use micro-LED, a semiconductor light-emitting device, as a display device, they have excellent performance in many characteristics such as contrast ratio, response speed, color gamut, viewing angle, brightness, resolution, lifespan, luminous efficiency, and luminance.
특히 마이크로-LED 디스플레이는 화면을 모듈 방식으로 분리, 결합할 수 있어 크기나 해상도 조절이 자유로운 장점 및 플렉서블 디스플레이 구현이 가능한 장점이 있다.In particular, the micro-LED display has the advantage of being able to freely adjust the size and resolution and implement a flexible display because the screen can be separated and combined in a modular manner.
그런데 대형 마이크로-LED 디스플레이는 수백만 개 이상의 마이크로-LED가 필요로 하기 때문에 마이크로-LED를 디스플레이 패널에 신속하고 정확하게 전사하기 어려운 기술적 문제가 있다.However, because large micro-LED displays require more than millions of micro-LEDs, there is a technical problem that makes it difficult to quickly and accurately transfer micro-LEDs to the display panel.
최근 개발되고 있는 전사기술에는 픽앤-플레이스 공법(pick and place process), 레이저 리프트 오프법(Laser Lift-off method) 또는 자가조립 방식(self-assembly method) 등이 있다.Transfer technologies that have been recently developed include the pick and place process, laser lift-off method, or self-assembly method.
이 중에서, 자가조립 방식은 유체 내에서 반도체 발광소자가 조립위치를 스스로 찾아가는 방식으로서 대화면의 디스플레이 장치의 구현에 유리한 방식이다.Among these, the self-assembly method is a method in which the semiconductor light-emitting device finds its assembly position within the fluid on its own, and is an advantageous method for implementing a large-screen display device.
최근에 미국등록특허 제9,825,202 등에서 자가조립에 적합한 마이크로-LED 구조를 제시한 바 있으나, 아직 마이크로-LED의 자가조립을 통하여 디스플레이를 제조하는 기술에 대한 연구가 미비한 실정이다.Recently, a micro-LED structure suitable for self-assembly has been proposed in US Patent No. 9,825,202, etc., but research on technology for manufacturing displays through self-assembly of micro-LEDs is still insufficient.
특히 종래기술에서 대형 디스플레이에 수백만 개 이상의 반도체 발광소자를 신속하게 전사하는 경우 전사 속도(transfer speed)는 향상시킬 수 있으나 전사 불량률(transfer error rate)이 높아질 수 있어 전사 수율(transfer yield)이 낮아지는 기술적 문제가 있다.In particular, in the case of rapidly transferring millions of semiconductor light emitting devices to a large display in the prior art, the transfer speed can be improved, but the transfer error rate can increase, which lowers the transfer yield. There is a technical problem.
관련 기술에서 유전영동(dielectrophoresis, DEP)을 이용한 자가조립 방식의 전사공정이 시도되고 있으나 DEP force의 불균일성 등으로 인해 자가 조립률이 낮은 문제가 있다.In related technologies, a self-assembly transfer process using dielectrophoresis (DEP) is being attempted, but there is a problem with a low self-assembly rate due to non-uniformity of the DEP force.
한편, 비공개 내부기술에 의하면, 자가 조립을 위해서는 DEP Force가 필요한데, DEP Force의 균일한 제어의 어려움으로 자가 조립을 이용한 조립 시 반도체 발광소자가 조립 홀 내에서 정위치가 아닌 곳으로 쏠림 현상이 발생하는 문제가 있다. Meanwhile, according to undisclosed internal technology, DEP Force is required for self-assembly, but due to the difficulty in uniformly controlling the DEP Force, when assembling using self-assembly, a phenomenon occurs in which the semiconductor light emitting device is tilted to an incorrect position within the assembly hall. There is a problem.
또한 이러한 반도체 발광소자의 쏠림 현상으로 인해 이후 전기적 컨택 공정에 있어서 전기적 접촉 특성이 저하되어 점등률이 저하되는 문제가 있다.Additionally, due to this phenomenon of tilting of the semiconductor light emitting device, there is a problem that the electrical contact characteristics deteriorate in the subsequent electrical contact process and the lighting rate decreases.
그러므로 비공개 내부기술에 의하면 자기 조립을 위해 DEP Force가 필요하나 DEP Force를 이용하는 경우 반도체 발광소자의 쏠림 현상으로 인해 전기적 접촉 특성이 저하되는 기술적 모순에 직면하고 있다.Therefore, according to undisclosed internal technology, DEP Force is required for self-assembly, but when DEP Force is used, it faces a technical contradiction in that the electrical contact characteristics are deteriorated due to the tilting phenomenon of the semiconductor light emitting device.
한편 내부기술에서는 DEP force로 자가조립 후 패널 배선을 발광소자 칩의 측면과 연결하는 측면배선 기술을 연구하고 있다. 그런데 내부 기술의 측면배선 공정에서 발광소자 칩 하단 에지에서 배선이 끊어지는 단선의 발생하는 문제가 있다.Meanwhile, internal technology is researching side wiring technology that connects the panel wiring to the side of the light emitting device chip after self-assembly using DEP force. However, in the side wiring process of the internal technology, there is a problem of disconnection of the wiring at the bottom edge of the light emitting device chip.
또한 내부기술에서는 DEP force를 이용한 조립 후 패널 단의 전극 공정이 진행될 때 조립전극에 전원이 차단되어 DEP force가 없는 경우 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제가 발생되고 있다.In addition, in internal technology, when the electrode process of the panel stage is performed after assembly using DEP force, the power to the assembly electrode is cut off, and if there is no DEP force, the fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode is weak, and the semiconductor light emitting device assembled in the assembly hole is emitted. There is a problem of elements being separated.
실시예의 기술적 과제 중의 하나는 자가조립된 발광소자의 전극과 소정의 패널 전극 사이의 전기적 접촉특성이 저하되어 점등률이 저하되는 문제를 해결하고자 함이다.One of the technical challenges of the embodiment is to solve the problem of a decrease in the lighting rate due to a decrease in electrical contact characteristics between the electrodes of the self-assembled light emitting device and the predetermined panel electrode.
또한 실시예의 기술적 과제 중의 하나는, 내부기술에서 DEP force로 자가조립 후 패널 배선을 발광소자 칩의 측면과 연결하는 측면배선 기술에서, 발광소자 칩 하단 에지에서 측변 배선이 끊어지는 단선의 발생하는 문제를 해결하고자 함이다.In addition, one of the technical challenges of the embodiment is the problem of disconnection of the side wiring at the bottom edge of the light emitting device chip in the side wiring technology that connects the panel wiring to the side of the light emitting device chip after self-assembly using DEP force in the internal technology. It is intended to solve the problem.
또한 실시예의 기술적 과제 중의 하나는, 내부기술에서는 자가조립 후에 조립전극에 전원이 차단되어 DEP force가 없는 경우 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제를 해결하고자 함이다.In addition, one of the technical challenges of the embodiment is that, in the internal technology, when the power to the assembly electrode is cut off after self-assembly and there is no DEP force, the fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode is weak, and the semiconductor light emitting device assembled in the assembly hole falls off. It is intended to solve the problem.
실시예의 기술적 과제는 본 항목에 기재된 것에 한정되지 않으며, 명세서를 전체를 통해 파악될 수 있는 것을 포함한다.The technical problems of the embodiments are not limited to those described in this item and include those that can be understood through the entire specification.
실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치는, 기판과, 상기 기판 상에 상호 이격되어 배치된 제1 전극, 제2 전극과, 상기 제1, 제2 전극 상에 배치되는 제1 절연층과, 소정의 조립 홀을 포함하며 상기 제1 절연층 상에 배치되는 조립 격벽과, 상기 조립 홀 내에 배치되는 반도체 발광소자와, 상기 반도체 발광소자의 측면과 전기적으로 연결되는 측면 배선 및 상기 반도체 발광소자의 상측과 전기적으로 연결되는 제2 패널 전극을 포함할 수 있다.A display device including a semiconductor light emitting device according to an embodiment includes a substrate, first electrodes and second electrodes spaced apart from each other on the substrate, and a first insulating layer disposed on the first and second electrodes. and an assembly partition including a predetermined assembly hole and disposed on the first insulating layer, a semiconductor light emitting device disposed in the assembly hole, a side wiring electrically connected to a side of the semiconductor light emitting device, and the semiconductor light emitting device. It may include a second panel electrode electrically connected to the upper side of the device.
상기 반도체 발광소자는, 발광구조물 및 상기 발광구조물 외곽에 배치되는 열전달 절연층을 포함할 수 있다.The semiconductor light emitting device may include a light emitting structure and a heat transfer insulating layer disposed on the outside of the light emitting structure.
상기 발광구조물은, 제1 도전형 반도체층, 제2 도전형 반도체층 및 그 사이에 배치되는 활성층을 포함하며, 상기 측면 배선은 상기 반도체 발광소자의 제1 도전형 반도체층과 전기적으로 연결될 수 있다.The light emitting structure includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer disposed between them, and the side wiring may be electrically connected to the first conductivity type semiconductor layer of the semiconductor light emitting device. .
상기 측면 배선은, 상기 반도체 발광소자의 측면에 배치되는 제1 측면 배선 및 상기 제1, 제2 전극들 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선을 포함할 수 있다.The side wiring may include a first side wiring disposed on a side of the semiconductor light emitting device and a second side wiring electrically contacting one or more of the first and second electrodes.
실시예는 상기 발광구조물과 상기 열전달 절연층 사이에 배치되는 패시베이션층을 더 포함하며, 상기 패시베이션층의 열전달 효율은 상기 열전달 절연층 비해 낮을 수 있다.The embodiment further includes a passivation layer disposed between the light emitting structure and the heat transfer insulating layer, and the heat transfer efficiency of the passivation layer may be lower than that of the heat transfer insulating layer.
상기 측면 배선은, 상기 발광구조물 측면 및 상기 열전달 절연층 상에 배치될 수 있다.The side wiring may be disposed on the side of the light emitting structure and on the heat transfer insulating layer.
또한 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치는, 기판과, 상기 기판 상에 상호 이격되어 배치된 제1 전극, 제2 전극과, 상기 제1, 제2 전극 상에 배치되는 제1 절연층과, 소정의 조립 홀을 포함하며 상기 제1 절연층 상에 배치되는 조립 격벽 및 상기 조립 홀 내에 배치되는 반도체 발광소자를 포함할 수 있다.In addition, a display device including a semiconductor light emitting device according to an embodiment includes a substrate, first electrodes and second electrodes spaced apart from each other on the substrate, and first insulators disposed on the first and second electrodes. It may include a layer, an assembly partition including a predetermined assembly hole and disposed on the first insulating layer, and a semiconductor light emitting device disposed within the assembly hole.
상기 반도체 발광소자는, 발광구조물 및 상기 발광구조물 외곽에 배치되는 열전달 절연층을 포함하며, 상기 열전달 절연층의 하단은 상기 발광구조물의 하단까지 연장되어 배치될 수 있다.The semiconductor light emitting device includes a light emitting structure and a heat transfer insulating layer disposed on the outside of the light emitting structure, and the lower end of the heat transfer insulating layer may be disposed to extend to the bottom of the light emitting structure.
상기 발광구조물은, 제1 도전형 반도체층, 제2 도전형 반도체층 및 그 사이에 배치되는 활성층을 포함하며, 상기 측면 배선은 상기 반도체 발광소자의 제1 도전형 반도체층과 전기적으로 연결될 수 있다.The light emitting structure includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer disposed between them, and the side wiring may be electrically connected to the first conductivity type semiconductor layer of the semiconductor light emitting device. .
상기 측면 배선은 상기 반도체 발광소자의 측면에 배치되는 제1 측면 배선 및 상기 제1, 제2 전극들 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선을 포함할 수 있다.The side wiring may include a first side wiring disposed on a side of the semiconductor light emitting device and a second side wiring electrically contacting one or more of the first and second electrodes.
실시예는 상기 발광구조물과 상기 열전달 절연층 사이에 배치되는 패시베이션층을 더 포함하며, 상기 패시베이션층의 열전달 효율은 상기 열전달 절연층 비해 낮을 수 있다.The embodiment further includes a passivation layer disposed between the light emitting structure and the heat transfer insulating layer, and the heat transfer efficiency of the passivation layer may be lower than that of the heat transfer insulating layer.
상기 측면 배선은 상기 발광구조물 측면 및 상기 열전달 절연층 상에 배치될 수 있다.The side wiring may be disposed on the side of the light emitting structure and the heat transfer insulating layer.
실시예에 따른 반도체 발광소자를 포함하는 디스플레이 장치에 의하면, 반도체 발광소자의 측면에 연결되는 측면 배선에 의해 전기적 접촉 면적을 넓힘으로써 전기적 접촉특성이 향상되어 점등률이 향상되는 기술적 효과가 있다.According to the display device including the semiconductor light-emitting device according to the embodiment, the electrical contact characteristics are improved by expanding the electrical contact area by the side wiring connected to the side of the semiconductor light-emitting device, which has the technical effect of improving the lighting rate.
또한 실시예에 의하면, 내부기술에서 DEP force로 자가조립 후 패널 배선을 발광소자 칩의 측면과 연결하는 측면배선 기술에서, 발광소자 칩 하단 에지에서 측변 배선이 끊어지는 단선 문제를 해결할 수 있다.In addition, according to the embodiment, in the side wiring technology that connects the panel wiring to the side of the light emitting device chip after self-assembly using DEP force in the internal technology, the problem of disconnection of the side wiring at the bottom edge of the light emitting device chip can be solved.
예를 들어, 실시예에 반도체 발광소자(150A)는 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함할 수 있으며, 열전달 절연층(157)에 의해 측면 배선(290)의 단선을 방지하고 전기적 특성을 향상시킴으로써 점등률이 현저히 높아지는 기술적 효과가 있다. 예를 들어, 실시예는 반도체 발광소자(150A)의 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함하여 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, in the embodiment, the semiconductor light emitting device 150A may include a heat transfer insulating layer 157 disposed on the outside of the light emitting structure 152, and the side wiring 290 is disconnected by the heat transfer insulating layer 157. There is a technical effect of significantly increasing the lighting rate by preventing and improving electrical characteristics. For example, the embodiment includes a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b. There is a special technical effect that can realize excellent contact characteristics (G) by forming a film.
또한 실시예에 의하면 반도체 발광소자(150A)의 접합공정에서 전기적 연결 불량이 발생되더라도, 추가 공정인 핫 프레스(hot press) 공정에서 신뢰성 높은 전기적 연결이 가능하도록 하여, 점등률을 획기적으로 향상시킬 수 있다.In addition, according to the embodiment, even if an electrical connection defect occurs in the bonding process of the semiconductor light emitting device 150A, a highly reliable electrical connection is possible in an additional hot press process, thereby dramatically improving the lighting rate. there is.
예를 들어, 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)에 의해 hot press에 의한 열을 반도체 발광소자의 하단 에지 부위로 신속히 전달함으로써 측면 전극의 물질의 열 확산을 활성화시켜 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, according to the embodiment, the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light emitting device 150A, thereby reducing the heat of the material of the side electrode. There is a special technical effect of realizing excellent contact characteristics (G) by activating diffusion to form a solid electrode film of the first and second side wirings 290a and 290b.
예를 들어, 상기 측면 전극은 Al 등과 같은 융점이 낮은 저온 메탈재질을 포함할 수 있으며, hot press에 의한 열이 열전달 절연층(157)에 의해 반도체 발광소자의 하단 에지 부위로 신속히 전달함으로써 측면 전극의 물질의 열 확산을 활성화시켜 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, the side electrode may include a low-temperature metal material with a low melting point, such as Al, and the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode. There is a special technical effect of realizing excellent contact characteristics (G) by activating heat diffusion of the material to form a solid electrode film of the first side wiring 290a and the second side wiring 290b.
또한 실시예에 의하면 반도체 발광소자(150A)의 외측둘레에 열전달 절연층(157)이 배치되고 상기 발광구조물(152)과 열전달 절연층(157) 사이에 패시베이션층이 배치됨에 따라 hot press 공정에서의 열이나 압력이 반도체 발광소자(150A)에 직접 전달되지 않음으로써 발광구조물(152)의 전기적, 특성 저하를 방지할 수 있는 기술적 효과가 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, and a passivation layer is disposed between the light emitting structure 152 and the heat transfer insulating layer 157, thereby reducing the heat transfer insulating layer 157 in the hot press process. There is a technical effect of preventing deterioration of the electrical and characteristics of the light emitting structure 152 by preventing heat or pressure from being directly transmitted to the semiconductor light emitting device 150A.
또한 실시예에 의하면 반도체 발광소자(150A)를 구비하는 디스플레이 장치에서 디스플레이 구현 중 열이 발생하는 경우 열전달 절연층(157)을 통해 외부로 확산시킬 수 있으므로 디스플레이 장치의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다. In addition, according to the embodiment, when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
또한 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)을 배치하고, 발광구조물(152) 뿐만 아니라 열전달 절연층(157) 상에도 측면 전극의 일부, 예를 들어 제1 측면 배선(290a)이 연장되어 배치됨으로써 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 향상시켜 소자의 신뢰성을 향상시킬 수 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157. By extending the first side wiring 290a, the bonding force between the first side wiring 290a and the heat transfer insulating layer 157 can be improved, thereby improving the reliability of the device.
예를 들어, 열전달 절연층(157)이 측면 전극을 구성하는 금속의 산화물을 포함함으로써 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 현저히 향상시켜 소자의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다.For example, since the heat transfer insulating layer 157 includes the metal oxide constituting the side electrode, the bonding strength between the first side wiring 290a and the heat transfer insulating layer 157 can be significantly improved, thereby improving the reliability of the device. There is a technical effect.
또한 실시예에 의하면, 내부기술에서는 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제를 해결할 수 있다.In addition, according to the embodiment, the internal technology can solve the problem of the semiconductor light emitting device assembled in the assembly hole being separated due to weak fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode.
예를 들어, 실시예에서 예비 측면 배선(290a)은 반도체 발광소자(150A)를 안정적으로 고정하는 역할하는 특별한 기술적 효과가 있다.For example, in the embodiment, the preliminary side wiring 290a has a special technical effect of stably fixing the semiconductor light emitting device 150A.
실시예의 기술적 효과는 본 항목에 기재된 것에 한정되지 않으며, 발명의 설명으로부터 파악되는 것을 포함한다.The technical effects of the embodiments are not limited to those described in this section, but include those understood from the description of the invention.
도 1은 실시예에 따른 디스플레이 장치가 배치된 주택의 거실에 대한 예시도.1 is an exemplary diagram of a living room of a house where a display device according to an embodiment is placed.
도 2는 실시예에 따른 디스플레이 장치를 개략적으로 보여주는 블록도.Figure 2 is a block diagram schematically showing a display device according to an embodiment.
도 3은 도 2의 화소의 일 예를 보여주는 회로도.FIG. 3 is a circuit diagram showing an example of the pixel of FIG. 2.
도 4는 도 1의 디스플레이 장치에서 제1 패널영역의 확대도.FIG. 4 is an enlarged view of the first panel area in the display device of FIG. 1.
도 5는 도 4의 A2 영역의 B1-B2 선을 따른 단면도.FIG. 5 is a cross-sectional view taken along line B1-B2 in area A2 of FIG. 4.
도 6은 실시예에 따른 발광소자가 자가조립 방식에 의해 기판에 조립되는 예시도.Figure 6 is an example of a light emitting device according to an embodiment being assembled on a substrate by a self-assembly method.
도 7은 도 6의 A3 영역의 부분 확대도.Figure 7 is a partial enlarged view of area A3 in Figure 6.
도 8은 내부기술에서의 측면 배선의 단선을 나타내는 사진. Figure 8 is a photograph showing the disconnection of the side wiring in the internal technology.
도 9는 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 단면도.Figure 9 is a cross-sectional view of a display device 300 including a semiconductor light-emitting device according to an embodiment.
도 10은 도 9에 도시된 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 상세 단면도.FIG. 10 is a detailed cross-sectional view of a display device 300 including a semiconductor light emitting device according to the embodiment shown in FIG. 9.
도 11은 도 10에 도시된 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 C1 영역의 사진 예시도.FIG. 11 is an example photograph of the C1 area of the display device 300 including a semiconductor light emitting device according to the embodiment shown in FIG. 10.
도 12a 내지 도 12i는 실시예에 따른 반도체 발광소자를 포함하는 디스플레이 장치(300)의 제조공정 단면도.Figures 12A to 12I are cross-sectional views of the manufacturing process of a display device 300 including a semiconductor light emitting device according to an embodiment.
도 13은 제2 실시예에 따른 반도체 발광소자를 포함하는 디스플레이 장치(300B)의 단면도.Figure 13 is a cross-sectional view of a display device 300B including a semiconductor light emitting device according to a second embodiment.
이하, 첨부된 도면을 참조하여 본 명세서에 개시된 실시예를 상세히 설명하기로 한다. 이하의 설명에서 사용되는 구성요소에 대한 접미사 '모듈' 및 '부'는 명세서 작성의 용이함이 고려되어 부여되거나 혼용되는 것으로서, 그 자체로 서로 구별되는 의미 또는 역할을 갖는 것은 아니다. 또한, 첨부된 도면은 본 명세서에 개시된 실시예를 쉽게 이해할 수 있도록 하기 위한 것이며, 첨부된 도면에 의해 본 명세서에 개시된 기술적 사상이 제한되는 것은 아니다. 또한, 층, 영역 또는 기판과 같은 요소가 다른 구성요소 '상(on)'에 존재하는 것으로 언급될 때, 이것은 직접적으로 다른 요소 상에 존재하거나 또는 그 사이에 다른 중간 요소가 존재할 수도 있는 것을 포함한다.Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings. The suffixes 'module' and 'part' for components used in the following description are given or used interchangeably in consideration of ease of specification preparation, and do not have distinct meanings or roles in themselves. In addition, the attached drawings are intended to facilitate easy understanding of the embodiments disclosed in this specification, and the technical ideas disclosed in this specification are not limited by the attached drawings. Additionally, when an element such as a layer, region or substrate is referred to as being 'on' another component, this includes either directly on the other element or there may be other intermediate elements in between. do.
본 명세서에서 설명되는 디스플레이 장치에는 디지털 TV, 휴대폰, 스마트 폰(smart phone), 노트북 컴퓨터(laptop computer), 디지털방송용 단말기, PDA(personal digital assistants), PMP(portable multimedia player), 네비게이션, 슬레이트(Slate) PC, 태블릿(Tablet) PC, 울트라 북(Ultra-Book), 데스크탑 컴퓨터 등이 포함될 수 있다. 그러나, 본 명세서에 기재된 실시예에 따른 구성은 추후 개발되는 새로운 제품형태이라도, 디스플레이가 가능한 장치에도 적용될 수 있다.Display devices described in this specification include digital TVs, mobile phones, smart phones, laptop computers, digital broadcasting terminals, personal digital assistants (PDAs), portable multimedia players (PMPs), navigation, and slates. ) may include PCs, tablet PCs, ultra-books, desktop computers, etc. However, the configuration according to the embodiment described in this specification can be applied to a device capable of displaying even if it is a new product type that is developed in the future.
이하 실시예에 따른 발광소자 및 이를 포함하는 디스플레이 장치에 대해 설명한다.Hereinafter, a light emitting device according to an embodiment and a display device including the same will be described.
이하 실시예에 따른 반도체 발광소자 및 이를 포함하는 디스플레이 장치에 대해 설명한다.Hereinafter, a semiconductor light emitting device according to an embodiment and a display device including the same will be described.
도 1은 실시예에 따른 디스플레이 장치(100)가 배치된 주택의 거실을 도시한다.FIG. 1 shows a living room of a house where a display device 100 according to an embodiment is installed.
실시예의 디스플레이 장치(100)는 세탁기(101), 로봇 청소기(102), 공기 청정기(103) 등의 각종 전자 제품의 상태를 표시할 수 있고, 각 전자 제품들과 IOT 기반으로 통신할 수 있으며 사용자의 설정 데이터에 기초하여 각 전자 제품들을 제어할 수도 있다.The display device 100 of the embodiment can display the status of various electronic products such as a washing machine 101, a robot vacuum cleaner 102, and an air purifier 103, and can communicate with each electronic product based on IOT, and can communicate with the user. Each electronic product can also be controlled based on the setting data.
실시예에 따른 디스플레이 장치(100)는 얇고 유연한 기판 위에 제작되는 플렉서블 디스플레이(flexible display)를 포함할 수 있다. 플렉서블 디스플레이는 기존의 평판 디스플레이의 특성을 유지하면서, 종이와 같이 휘어지거나 말릴 수 있다.The display device 100 according to an embodiment may include a flexible display manufactured on a thin and flexible substrate. Flexible displays can bend or curl like paper while maintaining the characteristics of existing flat displays.
플렉서블 디스플레이에서 시각정보는 매트릭스 형태로 배치되는 단위 화소(unit pixel)의 발광이 독자적으로 제어됨에 의하여 구현될 수 있다. 단위 화소는 하나의 색을 구현하기 위한 최소 단위를 의미한다. 플렉서블 디스플레이의 단위 화소는 발광소자에 의하여 구현될 수 있다. 실시예에서 발광소자는 Micro-LED나 Nano-LED일 수 있으나 이에 한정되는 것은 아니다.In a flexible display, visual information can be implemented by independently controlling the light emission of unit pixels arranged in a matrix form. A unit pixel refers to the minimum unit for implementing one color. A unit pixel of a flexible display can be implemented by a light-emitting device. In the embodiment, the light emitting device may be Micro-LED or Nano-LED, but is not limited thereto.
다음으로 도 2는 실시예에 따른 디스플레이 장치를 개략적으로 보여주는 블록도이고, 도 3은 도 2의 화소의 일 예를 보여주는 회로도이다.Next, FIG. 2 is a block diagram schematically showing a display device according to an embodiment, and FIG. 3 is a circuit diagram showing an example of the pixel of FIG. 2.
도 2 및 도 3을 참조하면, 실시예에 따른 디스플레이 장치는 디스플레이 패널(10), 구동 회로(20), 스캔 구동부(30) 및 전원 공급 회로(50)를 포함할 수 있다. Referring to FIGS. 2 and 3 , a display device according to an embodiment may include a display panel 10, a driving circuit 20, a scan driver 30, and a power supply circuit 50.
실시예의 디스플레이 장치(100)는 액티브 매트릭스(AM, Active Matrix)방식 또는 패시브 매트릭스(PM, Passive Matrix) 방식으로 발광소자를 구동할 수 있다.The display device 100 of the embodiment may drive the light emitting device using an active matrix (AM) method or a passive matrix (PM) method.
구동 회로(20)는 데이터 구동부(21)와 타이밍 제어부(22)를 포함할 수 있다.The driving circuit 20 may include a data driver 21 and a timing control unit 22.
디스플레이 패널(10)은 표시 영역(DA)과 표시 영역(DA)의 주변에 배치된 비표시 영역(NDA)으로 구분될 수 있다. 표시 영역(DA)은 화소(PX)들이 형성되어 영상을 디스플레이하는 영역이다. 디스플레이 패널(10)은 데이터 라인들(D1~Dm, m은 2 이상의 정수), 데이터 라인들(D1~Dm)과 교차되는 스캔 라인들(S1~Sn, n은 2 이상의 정수), 고전위 전압이 공급되는 고전위 전압 라인, 저전위 전압이 공급되는 저전위 전압 라인 및 데이터 라인들(D1~Dm)과 스캔 라인들(S1~Sn)에 접속된 화소(PX)들을 포함할 수 있다.The display panel 10 may be divided into a display area (DA) and a non-display area (NDA) disposed around the display area (DA). The display area DA is an area where pixels PX are formed to display an image. The display panel 10 includes data lines (D1 to Dm, m is an integer greater than 2), scan lines (S1 to Sn, n is an integer greater than 2) that intersect the data lines (D1 to Dm), and a high potential voltage. It may include pixels (PX) connected to a high-potential voltage line supplied, a low-potential voltage line supplied with a low-potential voltage, and data lines (D1 to Dm) and scan lines (S1 to Sn).
화소(PX)들 각각은 제1 서브 화소(PX1), 제2 서브 화소(PX2) 및 제3 서브 화소(PX3)를 포함할 수 있다. 제1 서브 화소(PX1)는 제1 파장의 제1 컬러 광을 발광하고, 제2 서브 화소(PX2)는 제2 파장의 제2 컬러 광을 발광하며, 제3 서브 화소(PX3)는 제3 파장의 제3 컬러 광을 발광할 수 있다. 제1 컬러 광은 적색 광, 제2 컬러 광은 녹색 광, 제3 컬러 광은 청색 광일 수 있으나, 이에 한정되지 않는다. 또한, 도 2에서는 화소(PX)들 각각이 3 개의 서브 화소들을 포함하는 것을 예시하였으나, 이에 한정되지 않는다. 즉, 화소(PX)들 각각은 4 개 이상의 서브 화소들을 포함할 수 있다. Each of the pixels PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. The first sub-pixel (PX1) emits the first color light of the first wavelength, the second sub-pixel (PX2) emits the second color light of the second wavelength, and the third sub-pixel (PX3) emits the third color light. It is possible to emit light of a third color of wavelength. The first color light may be red light, the second color light may be green light, and the third color light may be blue light, but are not limited thereto. Additionally, in FIG. 2, it is illustrated that each of the pixels PX includes three sub-pixels, but the present invention is not limited thereto. That is, each pixel PX may include four or more sub-pixels.
제1 서브 화소(PX1), 제2 서브 화소(PX2) 및 제3 서브 화소(PX3) 각각은 데이터 라인들(D1~Dm) 중 적어도 하나, 스캔 라인들(S1~Sn) 중 적어도 하나 및 고전위 전압 라인에 접속될 수 있다. 제1 서브 화소(PX1)는 도 3과 같이 발광소자(LD)들과 발광소자(LD)들에 전류를 공급하기 위한 복수의 트랜지스터들과 적어도 하나의 커패시터(Cst)를 포함할 수 있다. Each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) includes at least one of the data lines (D1 to Dm), at least one of the scan lines (S1 to Sn), and It can be connected to the above voltage line. As shown in FIG. 3 , the first sub-pixel PX1 may include light-emitting devices LD, a plurality of transistors for supplying current to the light-emitting devices LD, and at least one capacitor Cst.
도면에 도시되지 않았지만, 제1 서브 화소(PX1), 제2 서브 화소(PX2) 및 제3 서브 화소(PX3) 각각은 단지 하나의 발광소자(LD)와 적어도 하나의 커패시터(Cst)를 포함할 수도 있다. Although not shown in the drawing, each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) may include only one light emitting element (LD) and at least one capacitor (Cst). It may be possible.
발광소자(LD)들 각각은 제1 전극, 복수의 도전형 반도체층 및 제2 전극을 포함하는 반도체 발광 다이오드일 수 있다. 여기서, 제1 전극은 애노드 전극, 제2 전극은 캐소드 전극일 수 있지만, 이에 대해서는 한정하지 않는다.Each of the light emitting elements LD may be a semiconductor light emitting diode including a first electrode, a plurality of conductive semiconductor layers, and a second electrode. Here, the first electrode may be an anode electrode and the second electrode may be a cathode electrode, but this is not limited.
도 3을 참조하면 복수의 트랜지스터들은 발광소자(LD)들에 전류를 공급하는 구동 트랜지스터(DT), 구동 트랜지스터(DT)의 게이트 전극에 데이터 전압을 공급하는 스캔 트랜지스터(ST)를 포함할 수 있다. 구동 트랜지스터(DT)는 스캔 트랜지스터(ST)의 소스 전극에 접속되는 게이트 전극, 고전위 전압이 인가되는 고전위 전압 라인에 접속되는 소스 전극 및 발광소자(LD)들의 제1 전극들에 접속되는 드레인 전극을 포함할 수 있다. 스캔 트랜지스터(ST)는 스캔 라인(Sk, k는 1≤k≤n을 만족하는 정수)에 접속되는 게이트 전극, 구동 트랜지스터(DT)의 게이트 전극에 접속되는 소스 전극 및 데이터 라인(Dj, j는 1≤j≤m을 만족하는 정수)에 접속되는 드레인 전극을 포함할 수 있다.Referring to FIG. 3, the plurality of transistors may include a driving transistor (DT) that supplies current to the light emitting devices (LD) and a scan transistor (ST) that supplies a data voltage to the gate electrode of the driving transistor (DT). . The driving transistor DT has a gate electrode connected to the source electrode of the scan transistor ST, a source electrode connected to a high potential voltage line to which a high potential voltage is applied, and a drain connected to the first electrodes of the light emitting elements LD. It may include electrodes. The scan transistor (ST) has a gate electrode connected to the scan line (Sk, k is an integer satisfying 1≤k≤n), a source electrode connected to the gate electrode of the driving transistor (DT), and a data line (Dj, j). It may include a drain electrode connected to an integer satisfying 1≤j≤m.
커패시터(Cst)는 구동 트랜지스터(DT)의 게이트 전극과 소스 전극 사이에 형성된다. 스토리지 커패시터(Cst)는 구동 트랜지스터(DT)의 게이트 전압과 소스 전압의 차이값을 충전할 수 있다.The capacitor Cst is formed between the gate electrode and the source electrode of the driving transistor DT. The storage capacitor Cst can charge the difference between the gate voltage and the source voltage of the driving transistor DT.
구동 트랜지스터(DT)와 스캔 트랜지스터(ST)는 박막 트랜지스터(thin film transistor)로 형성될 수 있다. 또한, 도 3에서는 구동 트랜지스터(DT)와 스캔 트랜지스터(ST)가 P 타입 MOSFET(Metal Oxide Semiconductor Field Effect Transistor)으로 형성된 것을 중심으로 설명하였으나, 본 발명은 이에 한정되지 않는다. 구동 트랜지스터(DT)와 스캔 트랜지스터(ST)는 N 타입 MOSFET으로 형성될 수도 있다. 이 경우, 구동 트랜지스터(DT)와 스캔 트랜지스터(ST)들 각각의 소스 전극과 드레인 전극의 위치는 변경될 수 있다.The driving transistor (DT) and the scan transistor (ST) may be formed of a thin film transistor. In addition, in FIG. 3, the driving transistor (DT) and the scan transistor (ST) are mainly described as being formed of a P-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but the present invention is not limited thereto. The driving transistor (DT) and scan transistor (ST) may be formed of an N-type MOSFET. In this case, the positions of the source and drain electrodes of the driving transistor (DT) and the scan transistor (ST) may be changed.
또한, 도 3에서는 제1 서브 화소(PX1), 제2 서브 화소(PX2) 및 제3 서브 화소(PX3) 각각이 하나의 구동 트랜지스터(DT), 하나의 스캔 트랜지스터(ST) 및 하나의 커패시터(Cst)를 갖는 2T1C (2 Transistor - 1 capacitor)를 포함하는 것을 예시하였으나, 본 발명은 이에 한정되지 않는다. 제1 서브 화소(PX1), 제2 서브 화소(PX2) 및 제3 서브 화소(PX3) 각각은 복수의 스캔 트랜지스터(ST)들과 복수의 커패시터(Cst)들을 포함할 수 있다.In addition, in FIG. 3, each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) includes one driving transistor (DT), one scan transistor (ST), and one capacitor ( Although it is exemplified to include 2T1C (2 Transistor - 1 capacitor) with Cst), the present invention is not limited thereto. Each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) may include a plurality of scan transistors (ST) and a plurality of capacitors (Cst).
다시 도 2를 참조하면, 구동 회로(20)는 디스플레이 패널(10)을 구동하기 위한 신호들과 전압들을 출력한다. 이를 위해, 구동 회로(20)는 데이터 구동부(21)와 타이밍 제어부(22)를 포함할 수 있다.Referring again to FIG. 2, the driving circuit 20 outputs signals and voltages for driving the display panel 10. To this end, the driving circuit 20 may include a data driver 21 and a timing control unit 22.
데이터 구동부(21)는 타이밍 제어부(22)로부터 디지털 비디오 데이터(DATA)와 소스 제어 신호(DCS)를 입력 받는다. 데이터 구동부(21)는 소스 제어 신호(DCS)에 따라 디지털 비디오 데이터(DATA)를 아날로그 데이터 전압들로 변환하여 디스플레이 패널(10)의 데이터 라인들(D1~Dm)에 공급한다.The data driver 21 receives digital video data (DATA) and source control signal (DCS) from the timing control unit 22. The data driver 21 converts digital video data (DATA) into analog data voltages according to the source control signal (DCS) and supplies them to the data lines (D1 to Dm) of the display panel 10.
타이밍 제어부(22)는 호스트 시스템으로부터 디지털 비디오 데이터(DATA)와 타이밍 신호들을 입력 받는다. 타이밍 신호들은 수직동기신호(vertical sync signal), 수평동기신호(horizontal sync signal), 데이터 인에이블 신호(data enable signal) 및 도트 클럭(dot clock)을 포함할 수 있다. 호스트 시스템은 스마트폰 또는 태블릿 PC의 어플리케이션 프로세서, 모니터, TV의 시스템 온 칩 등일 수 있다.The timing control unit 22 receives digital video data (DATA) and timing signals from the host system. Timing signals may include a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock. The host system may be an application processor in a smartphone or tablet PC, a monitor, or a system-on-chip in a TV.
스캔 구동부(30)는 타이밍 제어부(22)로부터 스캔 제어 신호(SCS)를 입력 받는다. 스캔 구동부(30)는 스캔 제어 신호(SCS)에 따라 스캔 신호들을 생성하여 디스플레이 패널(10)의 스캔 라인들(S1~Sn)에 공급한다. 스캔 구동부(30)는 다수의 트랜지스터들을 포함하여 디스플레이 패널(10)의 비표시 영역(NDA)에 형성될 수 있다. 또는, 스캔 구동부(30)는 집적 회로로 형성될 수 있으며, 이 경우 디스플레이 패널(10)의 다른 일 측에 부착되는 게이트 연성 필름 상에 장착될 수 있다.The scan driver 30 receives a scan control signal (SCS) from the timing controller 22. The scan driver 30 generates scan signals according to the scan control signal SCS and supplies them to the scan lines S1 to Sn of the display panel 10. The scan driver 30 may include a plurality of transistors and may be formed in the non-display area NDA of the display panel 10. Alternatively, the scan driver 30 may be formed as an integrated circuit, and in this case, it may be mounted on a gate flexible film attached to the other side of the display panel 10.
전원 공급 회로(50)는 메인 전원으로부터 디스플레이 패널(10)의 발광소자(LD)들을 구동하기 위한 고전위 전압(VDD)과 저전위 전압(VSS)을 생성하여 디스플레이 패널(10)의 고전위 전압 라인과 저전위 전압 라인에 공급할 수 있다. 또한, 전원 공급 회로(50)는 메인 전원으로부터 구동 회로(20)와 스캔 구동부(30)를 구동하기 위한 구동 전압들을 생성하여 공급할 수 있다.The power supply circuit 50 generates a high-potential voltage (VDD) and a low-potential voltage (VSS) for driving the light-emitting elements (LD) of the display panel 10 from the main power supply, thereby generating a high-potential voltage of the display panel 10. It can be supplied to lines and low-potential voltage lines. Additionally, the power supply circuit 50 may generate and supply driving voltages for driving the driving circuit 20 and the scan driver 30 from the main power source.
다음으로 도 4는 도 1의 디스플레이 장치에서 제1 패널영역(A1)의 확대도이다.Next, Figure 4 is an enlarged view of the first panel area A1 in the display device of Figure 1.
도 4에 의하면, 실시예의 디스플레이 장치(100)는 제1 패널영역(A1)과 같은 복수의 패널영역들이 타일링에 의해 기구적, 전기적 연결되어 제조될 수 있다.Referring to FIG. 4 , the display device 100 of the embodiment may be manufactured by mechanically and electrically connecting a plurality of panel areas, such as the first panel area A1, by tiling.
제1 패널영역(A1)은 단위 화소(도 2의 PX) 별로 배치된 복수의 발광소자(150)를 포함할 수 있다.The first panel area A1 may include a plurality of light emitting devices 150 arranged for each unit pixel (PX in FIG. 2).
예컨대, 단위 화소(PX)는 제1 서브 화소(PX1), 제2 서브 화소(PX2) 및 제3 서브 화소(PX3)를 포함할 수 있다. 예컨대, 복수의 적색 발광소자(150R)가 제1 서브 화소(PX1)에 배치되고, 복수의 녹색 발광소자(150G)가 제2 서브 화소(PX2)에 배치되며, 복수의 청색 발광소자(150B)가 제3 서브 화소(PX3)에 배치될 수 있다. 단위 화소(PX)는 발광소자가 배치되지 않는 제4 서브 화소를 더 포함할 수도 있지만, 이에 대해서는 한정하지 않는다. 한편, 발광소자(150)는 반도체 발광소자일 수 있다. For example, the unit pixel PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. For example, a plurality of red light-emitting devices 150R are disposed in the first sub-pixel (PX1), a plurality of green light-emitting devices 150G are disposed in the second sub-pixel PX2, and a plurality of blue light-emitting devices 150B may be placed in the third sub-pixel (PX3). The unit pixel PX may further include a fourth sub-pixel in which no light-emitting element is disposed, but this is not limited. Meanwhile, the light emitting device 150 may be a semiconductor light emitting device.
다음으로 도 5는 도 4의 A2 영역의 B1-B2 선을 따른 단면도이다.Next, Figure 5 is a cross-sectional view taken along line B1-B2 in area A2 of Figure 4.
도 5를 참조하면, 실시예의 디스플레이 장치(100)는 기판(200a), 이격 배치된 배선(201a, 202a), 제1 절연층(211a), 제2 절연층(211b), 제3 절연층(206) 및 복수의 발광소자(150)를 포함할 수 있다.Referring to FIG. 5, the display device 100 of the embodiment includes a substrate 200a, spaced apart wiring lines 201a and 202a, a first insulating layer 211a, a second insulating layer 211b, and a third insulating layer ( 206) and a plurality of light emitting devices 150.
배선은 서로 이격된 제1 배선(201a) 및 제2 배선(202a)을 포함할 수 있다. 제1 배선(201a) 및 제2 배선(202a)은 패널에서 발광소자(150)에 전원을 인가하기 위한 패널 배선을 기능을 할 수 있으며, 발광소자(150)의 자가 조립의 경우 조립을 위한 유전영동 힘을 생성하기 위한 조립 전극 기능을 수행할 수도 있다. The wiring may include a first wiring 201a and a second wiring 202a that are spaced apart from each other. The first wiring 201a and the second wiring 202a may function as panel wiring for applying power to the light emitting device 150 from the panel, and in the case of self-assembly of the light emitting device 150, the dielectric for assembly It may also function as an assembled electrode to generate a phoretic force.
배선(201a, 202a)은 투명 전극(ITO)으로 형성되거나, 전기 전도성이 우수한 금속물질을 포함할 수 있다. 예를 들어, 배선(201a, 202a)은 티탄(Ti), 크롬(Cr), 니켈(Ni), 알루미늄(Al), 백금(Pt), 금(Au), 텅스텐(W), 몰리브덴(Mo) 중 적어도 어느 하나 또는 이들의 합금으로 형성될 수 있다.The wirings 201a and 202a may be formed of transparent electrodes (ITO) or may contain a metal material with excellent electrical conductivity. For example, the wirings 201a and 202a are titanium (Ti), chromium (Cr), nickel (Ni), aluminum (Al), platinum (Pt), gold (Au), tungsten (W), and molybdenum (Mo). It may be formed of at least one of these or an alloy thereof.
상기 제1 배선(201a) 및 제2 배선(202a) 사이에 제1 절연층(211a)이 배치될 수 있고, 상기 제1 배선(201a) 및 제2 배선(202a) 상에 제2 절연층(211b)이 배치될 수 있다. 상기 제1 절연층(211a)과 상기 제2 절연층(211b)은 산화막, 질화막 등일 수 있으나 이에 한정되는 것은 아니다.A first insulating layer 211a may be disposed between the first wiring 201a and the second wiring 202a, and a second insulating layer (211a) may be disposed on the first wiring 201a and the second wiring 202a. 211b) can be arranged. The first insulating layer 211a and the second insulating layer 211b may be an oxide film or a nitride film, but are not limited thereto.
발광소자(150)는 각각 단위 화소(sub-pixel)를 이루기 위하여 적색 발광소자(150R), 녹색 발광소자(150G) 및 청색 발광소자(150B0를 포함할 수 있으나 이에 한정되는 것은 아니며, 적색 형광체와 녹색 형광체 등을 구비하여 각각 적색과 녹색을 구현할 수도 있다.The light-emitting device 150 may include a red light-emitting device 150R, a green light-emitting device 150G, and a blue light-emitting device 150B0 to form a unit pixel (sub-pixel), but is not limited thereto, and includes a red phosphor and Red and green colors can also be implemented by using green phosphors, etc.
기판(200a)은 유리나 폴리이미드(Polyimide)로 형성될 수 있다. 또한 기판(200a)은 PEN(Polyethylene Naphthalate), PET(Polyethylene Terephthalate) 등의 유연성 있는 재질을 포함할 수 있다. 또한, 기판(200)은 투명한 재질일 수 있으나 이에 한정되는 것은 아니다. 상기 기판(200a)은 패널에서의 지지 기판으로 기능할 수 있으며, 발광소자의 자가 조립시 조립용 기판으로 기능할 수도 있다.The substrate 200a may be made of glass or polyimide. Additionally, the substrate 200a may include a flexible material such as PEN (Polyethylene Naphthalate) or PET (Polyethylene Terephthalate). Additionally, the substrate 200 may be made of a transparent material, but is not limited thereto. The substrate 200a may function as a support substrate in a panel, and may also function as an assembly substrate when self-assembling a light emitting device.
제3 절연층(206)은 폴리이미드, PEN, PET 등과 같이 절연성과 유연성 있는 재질을 포함할 수 있으며, 기판(200a)과 일체로 이루어져 하나의 기판을 형성할 수도 있다.The third insulating layer 206 may include an insulating and flexible material such as polyimide, PEN, PET, etc., and may be integrated with the substrate 200a to form one substrate.
제3 절연층(206)은 접착성과 전도성을 가지는 전도성 접착층일 수 있고, 전도성 접착층은 연성이 있어서 디스플레이 장치의 플렉서블 기능을 가능하게 할 수 있다. 예를 들어, 제3 절연층(206)은 이방성 전도성 필름(ACF, anisotropy conductive film)이거나 이방성 전도매질, 전도성 입자를 함유한 솔루션(solution) 등의 전도성 접착층일 수 있다. 전도성 접착층은 두께에 대해 수직방향으로는 전기적으로 전도성이나, 두께에 대해 수평방향으로는 전기적으로 절연성을 가지는 레이어일 수 있다.The third insulating layer 206 may be a conductive adhesive layer that has adhesiveness and conductivity, and the conductive adhesive layer is flexible and may enable a flexible function of the display device. For example, the third insulating layer 206 may be an anisotropic conductive film (ACF) or a conductive adhesive layer such as an anisotropic conductive medium or a solution containing conductive particles. The conductive adhesive layer may be a layer that is electrically conductive in a direction perpendicular to the thickness, but electrically insulating in a direction horizontal to the thickness.
제1, 제2 배선(201a, 202a) 간의 간격은 발광소자(150)의 폭 및 조립 홀(203H)의 폭보다 작게 형성되어, 전기장을 이용한 발광소자(150)의 조립 위치를 보다 정밀하게 고정할 수 있다.The gap between the first and second wirings 201a and 202a is formed to be smaller than the width of the light emitting device 150 and the width of the assembly hole 203H, so that the assembly position of the light emitting device 150 using an electric field can be fixed more precisely. can do.
제1, 제2 배선(201a, 202a) 상에는 제3 절연층(206)이 형성되어, 제1, 제2 배선(201a, 202a)을 유체(1200)로부터 보호하고, 제1, 제2 배선(201a, 202a)에 흐르는 전류의 누출을 방지할 수 있다. 제3 절연층(206)은 실리카, 알루미나 등의 무기물 절연체 또는 유기물 절연체가 단일층 또는 다층으로 형성될 수 있다.A third insulating layer 206 is formed on the first and second wirings 201a and 202a to protect the first and second wirings 201a and 202a from the fluid 1200, and to protect the first and second wirings 201a and 202a from the fluid 1200. Leakage of current flowing through 201a, 202a) can be prevented. The third insulating layer 206 may be formed as a single layer or multilayer of an inorganic insulator such as silica or alumina or an organic insulator.
또한 제3 절연층(206)은 폴리이미드, PEN, PET 등과 같이 절연성과 유연성 있는 재질을 포함할 수 있으며, 기판(200)과 일체로 이루어져 하나의 기판을 형성할 수도 있다.Additionally, the third insulating layer 206 may include an insulating and flexible material such as polyimide, PEN, PET, etc., and may be integrated with the substrate 200 to form one substrate.
제3 절연층(206)은 격벽을 가지고, 이 격벽에 의해 조립 홀(203H)이 형성될 수 있다. 예를 들어, 제3 절연층(206)은 발광소자(150)가 삽입되기 위한 조립 홀(203H)을 포함할 수 있다(도 6 참조). 따라서, 자가 조립시, 발광소자(150)가 제3 절연층(206)의 조립 홀(203H)에 용이하게 삽입될 수 있다. 조립 홀(203H)은 삽입 홀, 고정 홀, 정렬 홀 등으로 불릴 수 있다. The third insulating layer 206 has a partition wall, and an assembly hole 203H can be formed by the partition wall. For example, the third insulating layer 206 may include an assembly hole 203H into which the light emitting device 150 is inserted (see FIG. 6). Therefore, during self-assembly, the light emitting device 150 can be easily inserted into the assembly hole 203H of the third insulating layer 206. The assembly hole 203H may be called an insertion hole, a fixing hole, an alignment hole, etc.
조립 홀(203H)은 대응하는 위치에 조립될 발광소자(150)의 형상에 대응하는 형상 및 크기를 가질 수 있다. 이에 따라, 조립 홀(203H)에 다른 발광소자가 조립되거나 복수의 발광소자들이 조립되는 것을 방지할 수 있다.The assembly hole 203H may have a shape and size corresponding to the shape of the light emitting device 150 to be assembled at the corresponding location. Accordingly, it is possible to prevent another light emitting device from being assembled or a plurality of light emitting devices from being assembled into the assembly hole 203H.
다음으로 도 6은 실시예에 따른 발광소자가 자가조립 방식에 의해 기판에 조립되는 예를 나타내는 도면이며, 도 7은 도 6의 A3 영역의 부분 확대도이다. 도 7은 설명 편의를 위해 A3 영역을 180도 회전시킨 상태의 도면이다.Next, Figure 6 is a diagram showing an example in which a light emitting device according to an embodiment is assembled on a substrate by a self-assembly method, and Figure 7 is a partial enlarged view of area A3 in Figure 6. Figure 7 is a diagram with area A3 rotated by 180 degrees for convenience of explanation.
도 6 및 도 7을 기초로 실시예에 따른 반도체 발광소자를 전자기장을 이용한 자가조립 방식에 의해 디스플레이 패널에 조립되는 예를 설명하기로 한다.Based on FIGS. 6 and 7 , an example in which a semiconductor light emitting device according to an embodiment is assembled into a display panel by a self-assembly method using an electromagnetic field will be described.
이후 설명되는 조립 기판(200)은 발광소자의 조립 후에 디스플레이 장치에서 패널 기판(200a)의 기능도 할 수 있으나, 실시예가 이에 한정되는 것은 아니다.The assembled substrate 200, which will be described later, can also function as the panel substrate 200a in a display device after assembly of the light emitting device, but the embodiment is not limited thereto.
도 6을 참조하면, 반도체 발광소자(150)는 유체(1200)가 채워진 챔버(1300)에 투입될 수 있으며, 조립 장치(1100)로부터 발생하는 자기장에 의해 반도체 발광소자(150)는 조립 기판(200)으로 이동할 수 있다. 이때 조립 기판(200)의 조립 홀(203H)에 인접한 발광소자(150)는 조립 전극들의 전기장에 의한 유전영동 힘에 의해 조립 홀(230)에 조립될 수 있다. 상기 유체(1200)는 초순수 등의 물일 수 있으나 이에 한정되는 것은 아니다. 챔버는 수조, 컨테이너, 용기 등으로 불릴 수 있다.Referring to FIG. 6, the semiconductor light-emitting device 150 may be introduced into the chamber 1300 filled with fluid 1200, and the semiconductor light-emitting device 150 may be placed on the assembly substrate ( 200). At this time, the light emitting device 150 adjacent to the assembly hole 203H of the assembly substrate 200 may be assembled into the assembly hole 230 by dielectrophoresis force generated by the electric field of the assembly electrodes. The fluid 1200 may be water such as ultrapure water, but is not limited thereto. The chamber may be called a water tank, container, vessel, etc.
반도체 발광소자(150)가 챔버(1300)에 투입된 후, 조립 기판(200)이 챔버(1300) 상에 배치될 수 있다. 실시 예에 따라, 조립 기판(200)은 챔버(1300) 내로 투입될 수도 있다.After the semiconductor light emitting device 150 is input into the chamber 1300, the assembled substrate 200 may be placed on the chamber 1300. Depending on the embodiment, the assembled substrate 200 may be input into the chamber 1300.
도 7을 참조하면 반도체 발광소자(150)는 도시된 바와 같이 수직형 반도체 발광소자로 구현될 수 있으나 이에 한정되지 않고 수평형 발광소자가 채용될 수 있다.Referring to FIG. 7, the semiconductor light emitting device 150 may be implemented as a vertical semiconductor light emitting device as shown, but is not limited to this and a horizontal light emitting device may be employed.
반도체 발광소자(150)는 자성체를 갖는 자성층(미도시)을 포함할 수 있다. 상기 자성층은 니켈(Ni) 등 자성을 갖는 금속을 포함할 수 있다. 유체 내로 투입된 반도체 발광소자(150)는 자성층을 포함하므로, 조립 장치(1100)로부터 발생하는 자기장에 의해 조립 기판(200)로 이동할 수 있다. 상기 자성층은 발광소자의 상측 또는 하측 또는 양측에 모두 배치될 수 있다.The semiconductor light emitting device 150 may include a magnetic layer (not shown) containing a magnetic material. The magnetic layer may include a magnetic metal such as nickel (Ni). Since the semiconductor light emitting device 150 introduced into the fluid includes a magnetic layer, it can move to the assembled substrate 200 by the magnetic field generated from the assembly device 1100. The magnetic layer may be disposed on the top, bottom, or both sides of the light emitting device.
상기 반도체 발광소자(150)는 상면 및 측면을 둘러싸는 패시베이션층(156)을 포함할 수 있다. 패시베이션층(156)은 실리카, 알루미나 등의 무기물 절연체를 PECVD, LPCVD, 스퍼터링 증착법 등을 통해 형성될 수 있다. 또한 패시베이션층(156)은 포토레지스트, 고분자 물질과 같은 유기물을 스핀 코팅하는 방법을 통해 형성될 수 있다.The semiconductor light emitting device 150 may include a passivation layer 156 surrounding the top and side surfaces. The passivation layer 156 may be formed using an inorganic insulator such as silica or alumina through PECVD, LPCVD, sputtering deposition, etc. Additionally, the passivation layer 156 may be formed by spin coating an organic material such as photoresist or polymer material.
상기 반도체 발광소자(150)는 제1 도전형 반도체층(152a), 제2 도전형 반도체층(152c) 및 그 사이에 배치되는 활성층(152b)을 포함할 수 있다. 상기 제1 도전형 반도체층(152a)은 n형 반도체층일 수 있고, 제2 도전형 반도체층(152c)은 p형 반도체층일 수 있으나 이에 한정되는 것은 아니다.The semiconductor light emitting device 150 may include a first conductivity type semiconductor layer 152a, a second conductivity type semiconductor layer 152c, and an active layer 152b disposed between them. The first conductive semiconductor layer 152a may be an n-type semiconductor layer, and the second conductive semiconductor layer 152c may be a p-type semiconductor layer, but are not limited thereto.
상기 제1 도전형 반도체층(152a)에는 제1 전극층(154a)이 배치될 수 있고, 제2 도전형 반도체층(152c)에 제2 전극층(154b)이 배치될 수 있다. 이를 위해서는 제1 도전형 반도체층(152a) 또는 제2 도전형 반도체층(152c)의 일부 영역이 외부로 노출될 수 있다. 이에 따라 반도체 발광소자(150)가 조립 기판(200)에 조립된 후에 디스플레이 장치의 제조 공정에서, 패시베이션층(156) 중 일부 영역이 식각될 수 있다. A first electrode layer 154a may be disposed on the first conductivity type semiconductor layer 152a, and a second electrode layer 154b may be disposed on the second conductivity type semiconductor layer 152c. To this end, a partial area of the first conductivity type semiconductor layer 152a or the second conductivity type semiconductor layer 152c may be exposed to the outside. Accordingly, in the manufacturing process of the display device after the semiconductor light emitting device 150 is assembled on the assembly substrate 200, some areas of the passivation layer 156 may be etched.
조립 기판(200)은 조립될 반도체 발광소자(150) 각각에 대응하는 한 쌍의 제1 조립 전극(201) 및 제2 조립 전극(202)을 포함할 수 있다. 상기 제1 조립 전극(201), 제2 조립 전극(202)은 단일 금속 혹은 금속합금, 금속산화물 등을 다중으로 적층하여 형성할 수 있다. 예를 들어, 상기 제1 조립 전극(201), 제2 조립 전극(202)은 Cu, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf 중 적어도 하나를 포함하여 형성될 수 있으며 이에 한정되는 않는다. The assembly substrate 200 may include a pair of first assembly electrodes 201 and second assembly electrodes 202 corresponding to each of the semiconductor light emitting devices 150 to be assembled. The first assembled electrode 201 and the second assembled electrode 202 can be formed by stacking multiple single metals, metal alloys, metal oxides, etc. For example, the first assembled electrode 201 and the second assembled electrode 202 include Cu, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf. It may be formed including at least one of the following, but is not limited thereto.
또한 상기 제1 조립 전극(201), 제2 조립 전극(202)은 ITO(indium tin oxide), IZO(indium zinc oxide), IZTO(indium zinc tin oxide), IAZO(indium aluminum zinc oxide), IGZO(indium gallium zinc oxide), IGTO(indium gallium tin oxide), AZO(aluminum zinc oxide), ATO(antimony tin oxide), GZO(gallium zinc oxide), IZON(IZO Nitride), AGZO(Al-Ga ZnO), IGZO(In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, 및 Ni/IrOx/Au/ITO 중 적어도 하나를 포함하여 형성될 수 있으며 이에 한정되지 않는다.In addition, the first assembled electrode 201 and the second assembled electrode 202 are made of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), and IGZO ( indium gallium zinc oxide), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZO Nitride (IZON), Al-Ga ZnO (AGZO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, and Ni/IrOx/Au/ITO, but is not limited thereto.
상기 제1 조립 전극(201), 제2 조립 전극(202)은 교류 전압이 인가됨에 따라 전기장을 방출함으로써, 조립 홀(203H)로 투입된 반도체 발광소자(150)를 유전영동 힘에 의해 고정시킬 수 있다. 상기 제1 조립 전극(201), 제2 조립 전극(202) 간의 간격은 반도체 발광소자(150)의 폭 및 조립 홀(203H)의 폭보다 작을 수 있으며, 전기장을 이용한 반도체 발광소자(150)의 조립 위치를 보다 정밀하게 고정할 수 있다. The first assembled electrode 201 and the second assembled electrode 202 emit an electric field as an alternating voltage is applied, thereby fixing the semiconductor light emitting device 150 inserted into the assembly hole 203H by dielectrophoretic force. there is. The gap between the first assembly electrode 201 and the second assembly electrode 202 may be smaller than the width of the semiconductor light emitting device 150 and the width of the assembly hole 203H, and the semiconductor light emitting device 150 using an electric field may be smaller than the width of the assembly hole 203H. The assembly position can be fixed more precisely.
제1 조립 전극(201), 제2 조립 전극(202) 상에는 제1 절연층(212)이 형성되어, 제1 조립 전극(201), 제2 조립 전극(202)을 유체(1200)로부터 보호하고, 제1 조립 전극(201), 제2 조립 전극(202)에 흐르는 전류의 누출을 방지할 수 있다. 예컨대 상기 제1 절연층(212)은 실리카, 알루미나 등의 무기물 절연체 또는 유기물 절연체가 단일층 또는 다층으로 형성될 수 있다. 제1 절연층(212)은, 반도체 발광소자(150)의 조립 시 제1 조립 전극(201), 제2 조립 전극(202)의 손상을 방지하기 위한 최소 두께를 가질 수 있고, 반도체 발광소자(150)가 안정적으로 조립되기 위한 최대 두께를 가질 수 있다.A first insulating layer 212 is formed on the first assembled electrode 201 and the second assembled electrode 202 to protect the first assembled electrode 201 and the second assembled electrode 202 from the fluid 1200. , leakage of current flowing through the first assembled electrode 201 and the second assembled electrode 202 can be prevented. For example, the first insulating layer 212 may be formed of a single layer or multiple layers of an inorganic insulator such as silica or alumina or an organic insulator. The first insulating layer 212 may have a minimum thickness to prevent damage to the first assembled electrode 201 and the second assembled electrode 202 when assembling the semiconductor light emitting device 150, and the semiconductor light emitting device ( 150) may have a maximum thickness for stable assembly.
제1 절연층(212)의 상부에는 격벽(207)이 형성될 수 있다. 격벽(207)의 일부 영역은 제1 조립 전극(201), 제2 조립 전극(202)의 상부에 위치하고, 나머지 영역은 조립 기판(200)의 상부에 위치할 수 있다.A partition 207 may be formed on the first insulating layer 212. Some areas of the partition wall 207 may be located on top of the first assembled electrode 201 and the second assembled electrode 202, and the remaining area may be located on the top of the assembled substrate 200.
한편, 조립 기판(200)의 제조 시 제1 절연층(212) 상부 전체에 형성된 격벽 중 일부가 제거됨으로써, 반도체 발광소자(150)들 각각이 조립 기판(200)에 결합 및 조립되는 조립 홀(203H)이 형성될 수 있다. Meanwhile, when manufacturing the assembly substrate 200, some of the partition walls formed on the entire upper part of the first insulating layer 212 are removed, thereby forming assembly holes ( 203H) may be formed.
조립 기판(200)에는 반도체 발광소자(150)들이 결합되는 조립 홀(203H)이 형성되고, 조립 홀(203H)이 형성된 면은 유체(1200)와 접촉할 수 있다. 조립 홀(203H)은 반도체 발광소자(150)의 정확한 조립 위치를 가이드할 수 있다. An assembly hole 203H in which the semiconductor light emitting devices 150 are coupled is formed in the assembly substrate 200, and the surface where the assembly hole 203H is formed may be in contact with the fluid 1200. The assembly hole 203H can guide the exact assembly position of the semiconductor light emitting device 150.
한편, 조립 홀(203H)은 대응하는 위치에 조립될 반도체 발광소자(150)의 형상에 대응하는 형상 및 크기를 가질 수 있다. 이에 따라, 조립 홀(203H)에 다른 반도체 발광소자가 조립되거나 복수의 반도체 발광소자들이 조립되는 것을 방지할 수 있다.Meanwhile, the assembly hole 203H may have a shape and size corresponding to the shape of the semiconductor light emitting device 150 to be assembled at the corresponding location. Accordingly, it is possible to prevent another semiconductor light emitting device from being assembled or a plurality of semiconductor light emitting devices from being assembled into the assembly hole 203H.
다시 6을 참조하면, 조립 기판(200)이 챔버에 배치된 후에 자기장을 가하는 조립 장치(1100)가 조립 기판(200)을 따라 이동할 수 있다. 상기 조립 장치(1100)는 영구 자석이거나 전자석일 수 있다.Referring again to 6, after the assembled substrate 200 is placed in the chamber, the assembled device 1100 that applies a magnetic field may move along the assembled substrate 200. The assembly device 1100 may be a permanent magnet or an electromagnet.
조립 장치(1100)는 자기장이 미치는 영역을 유체(1200) 내로 최대화하기 위해, 조립 기판(200)과 접촉한 상태로 이동할 수 있다. 실시예에 따라서는, 조립 장치(1100)가 복수의 자성체를 포함하거나, 조립 기판(200)과 대응하는 크기의 자성체를 포함할 수도 있다. 이 경우, 조립 장치(1100)의 이동 거리는 소정 범위 이내로 제한될 수도 있다.The assembly device 1100 may move while in contact with the assembly substrate 200 in order to maximize the area to which the magnetic field is applied within the fluid 1200. Depending on the embodiment, the assembly device 1100 may include a plurality of magnetic materials or may include a magnetic material of a size corresponding to that of the assembly substrate 200. In this case, the moving distance of the assembly device 1100 may be limited to within a predetermined range.
조립 장치(1100)에 의해 발생하는 자기장에 의해 챔버(1300) 내의 반도체 발광소자(150)는 조립 장치(1100) 및 조립 기판(200)을 향해 이동할 수 있다.The semiconductor light emitting device 150 in the chamber 1300 may move toward the assembly device 1100 and the assembly substrate 200 by the magnetic field generated by the assembly device 1100.
도 7을 참조하면, 반도체 발광소자(150)는 조립 장치(1100)를 향해 이동 중 조립 기판의 조립 전극의 전기장에 의해 형성되는 유전영동 힘(DEP force)에 의해 조립 홀(203H)로 진입하여 고정될 수 있다.Referring to FIG. 7, while moving toward the assembly device 1100, the semiconductor light emitting device 150 enters the assembly hole 203H by the dielectrophoresis force (DEP force) formed by the electric field of the assembly electrode of the assembly substrate. It can be fixed.
구체적으로 제1, 제2 조립 배선(201, 202)은 교류 전원에 의해 전기장을 형성하고, 이 전기장에 의해 유전영동 힘이 조립 배선(201, 202) 사이에 형성될 수 있다. 이 유전영동 힘에 의해 조립 기판(200) 상의 조립 홀(203H)에 반도체 발광소자(150)를 고정시킬 수 있다.Specifically, the first and second assembly wirings 201 and 202 form an electric field using an AC power source, and a dielectrophoretic force may be formed between the assembly wirings 201 and 202 by this electric field. The semiconductor light emitting device 150 can be fixed to the assembly hole 203H on the assembly substrate 200 by this dielectrophoretic force.
이때 조립 기판(200)의 조립 홀(203H) 상에 조립된 발광소자(150)와 조립 전극 사이에 소정의 솔더층(미도시)이 형성되어 발광소자(150)의 결합력을 향상시킬 수 있다.At this time, a predetermined solder layer (not shown) is formed between the light emitting device 150 assembled on the assembly hole 203H of the assembly substrate 200 and the assembly electrode, thereby improving the bonding strength of the light emitting device 150.
또한 조립 후 조립 기판(200)의 조립 홀(203H)에 몰딩층(미도시)이 형성될 수 있다. 몰딩층은 투명 레진이거나 또는 반사물질, 산란물질이 포함된 레진일 수 있다.Additionally, after assembly, a molding layer (not shown) may be formed in the assembly hole 203H of the assembly substrate 200. The molding layer may be a transparent resin or a resin containing a reflective material or a scattering material.
상술한 전자기장을 이용한 자가조립 방식에 의해, 반도체 발광소자들 각각이 기판에 조립되는 데 소요되는 시간을 급격히 단축시킬 수 있으므로, 대면적 고화소 디스플레이를 보다 신속하고 경제적으로 구현할 수 있다.By using the above-described self-assembly method using an electromagnetic field, the time required to assemble each semiconductor light-emitting device on a substrate can be drastically shortened, making it possible to implement a large-area, high-pixel display more quickly and economically.
비공개 내부기술에 의하면, 자가 조립을 위해서는 DEP Force가 필요한데, DEP Force의 균일한 제어의 어려움으로 자가 조립을 이용한 조립 시 반도체 발광소자가 조립 홀 내에서 정위치가 아닌 곳으로 쏠림 현상이 발생하는 문제가 있다. According to undisclosed internal technology, DEP Force is required for self-assembly, but due to the difficulty in uniformly controlling the DEP Force, a problem occurs where the semiconductor light emitting device is tilted to an incorrect position within the assembly hall when assembling using self-assembly. There is.
또한 이러한 반도체 발광소자의 쏠림 현상으로 인해 이후 전기적 컨택 공정에 있어서 전기적 접촉 특성이 저하되어 점등률 불량이 발생하고, 수율이 저하되는 문제가 있다.In addition, due to the tilting phenomenon of the semiconductor light emitting device, the electrical contact characteristics are deteriorated in the subsequent electrical contact process, resulting in poor lighting rate and lower yield.
그러므로 비공개 내부기술에 의하면 자기 조립을 위해 DEP Force가 필요하나 DEP Force를 이용하는 경우 반도체 발광소자의 쏠림 현상으로 인해 전기적 접촉 특성이 저하되는 기술적 모순에 직면하고 있다.Therefore, according to undisclosed internal technology, DEP Force is required for self-assembly, but when DEP Force is used, it faces a technical contradiction in that the electrical contact characteristics are deteriorated due to the tilting phenomenon of the semiconductor light emitting device.
도 8은 내부기술에서의 측면 배선의 단선을 나타내는 사진이다. Figure 8 is a photograph showing the disconnection of the side wiring in the internal technology.
내부기술에서는 DEP Force에 의한 자가조립 후 반도체 발광소자의 쏠림 현상의 문제를 해결하기 위해 패널 배선을 발광소자 칩(LED chip)의 측면과 연결하는 측면 컨택배선(side contact wire) 기술을 연구하고 있다. Internal technology is researching side contact wire technology that connects the panel wiring to the side of the LED chip to solve the problem of the semiconductor light emitting device being tilted after self-assembly by DEP Force. .
그런데 도 8과 같이, 내부 기술의 측면배선 공정에서 발광소자 칩 하단 에지에서 배선이 끊어지는 단선(D)이 발생하는 문제가 있다.However, as shown in FIG. 8, there is a problem in which a disconnection (D) occurs where the wiring is broken at the bottom edge of the light emitting device chip during the side wiring process of the internal technology.
구체적으로 발광소자 칩(LED chip)의 측면에 형성되는 제1 사이드 컨택배선(SC1)과 발광소자 칩(LED chip)의 하측에 형성되는 제2 사이드 컨택배선(SC2)이 발광소자 칩(LED chip)의 하단 에지에서 끊어지는 단선(D) 문제가 발생하고 있으며, 이로 인해 점등 불량이 발생되고 있다.Specifically, the first side contact wire (SC1) formed on the side of the light emitting device chip (LED chip) and the second side contact wire (SC2) formed on the lower side of the light emitting device chip (LED chip) ), a disconnection (D) problem is occurring at the bottom edge, which is causing lighting defects.
내부기술에서 이러한 에지에서의 단선 문제를 해결하기 위해 증착되는 사이드 컨택배선을 복수로 형성하여 사이드 컨택배선의 두께를 증가시키는 연구를 하였으나 칩 에지에서의 단선 문제를 해결하기 어려웠다.In order to solve this problem of wire disconnection at the edge, internal technology conducted research to increase the thickness of the side contact wire by forming multiple side contact wires, but it was difficult to solve the problem of wire disconnection at the edge of the chip.
또한 내부기술에서 에지에서의 단선 문제를 해결하기 위해 사이드 컨택배선의 증착 전에 O2 plasma를 이용하여 조립 격벽을 제거하는 연구를 진행했으나, 조립 격벽의 제거를 위해 약 40 분(min) 이상의 정도의 시간이 소요되고 있으며, 조립된 LED 칩의 배선 파손으로 인한 신뢰성 저하문제가 발견되었다.In addition, in order to solve the problem of disconnection at the edge, internal technology conducted research to remove the assembly barrier using O 2 plasma before deposition of the side contact wire, but it took about 40 minutes or more to remove the assembly barrier. It takes time, and a reliability problem was discovered due to damage to the wiring of the assembled LED chip.
한편, 내부기술에서 DEP force를 이용한 조립 후 이후 수조의 유체를 배수하는 공정이 진행되는데, 조립전극에 전원이 차단되어 DEP force가 없는 경우 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 유체 배수공정이 수십 분 이상이 소요되고 있으며, 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제가 발생되고 있다.Meanwhile, in the internal technology, after assembly using DEP force, the process of draining the fluid in the water tank is carried out. If the power to the assembly electrode is cut off and there is no DEP force, the fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode is weak, and the fluid is drained. The process takes tens of minutes or more, and there is a problem of the semiconductor light emitting device assembled in the assembly hole falling off.
또한 내부기술에서는 DEP force를 이용한 조립 후 패널 단의 전극 공정이 진행될 때 조립전극에 전원이 차단되어 DEP force가 없는 경우 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제가 발생되고 있다.In addition, in internal technology, when the electrode process of the panel stage is performed after assembly using DEP force, the power to the assembly electrode is cut off, and if there is no DEP force, the fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode is weak, and the semiconductor light emitting device assembled in the assembly hole is emitted. There is a problem of elements being separated.
이러한 문제를 해결하기 위해 내부 기술에서는 모세관 현상(capillary phenomena)을 이용하여 LED 칩 하부와 하부 조립 전극 사이의 공간을 PR 등의 칩 고정 유기막으로 채워 LED 칩을 고정하는 연구를 진행했다. 그러나 유기막 코팅 공정에서의 코팅 불량 문제가 있고, 칩 이탈 문제가 완벽하게 해결되지는 못했다.To solve this problem, internal technology conducted research to fix the LED chip by using capillary phenomena to fill the space between the bottom of the LED chip and the lower assembly electrode with a chip-fixing organic film such as PR. However, there was a coating defect problem in the organic film coating process, and the chip separation problem was not completely solved.
도 9는 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 단면도이며, 도 10은 도 9에 도시된 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 상세 단면도이다.FIG. 9 is a cross-sectional view of a display device 300 including a semiconductor light-emitting device according to an embodiment, and FIG. 10 is a detailed cross-sectional view of a display device 300 including a semiconductor light-emitting device according to an embodiment shown in FIG. 9 .
도 11은 도 10에 도시된 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 C1 영역의 사진 예시도이다.FIG. 11 is an example photograph of the C1 area of the display device 300 including a semiconductor light emitting device according to the embodiment shown in FIG. 10.
도 9 및 도 10을 참조하면, 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)는, 기판(200)과, 상기 기판(200) 상에 상호 이격되어 배치된 제1 조립 전극(201), 제2 조립 전극(202)과, 상기 제1 조립 전극(201)과 상기 제2 조립 전극(202) 상에 배치되는 제1 절연층(212)과, 소정의 조립 홀(207H)을 포함하며 상기 제1 절연층(212) 상에 배치되는 조립 격벽(207)와, 상기 조립 홀(207H) 내에 배치되는 반도체 발광소자(150A)와, 상기 반도체 발광소자(150A)의 측면과 전기적으로 연결되는 측면 배선(290) 및 상기 반도체 발광소자(150A)의 상측과 전기적으로 연결되는 제2 패널 전극(320)을 포함할 수 있다.Referring to FIGS. 9 and 10 , a display device 300 including a semiconductor light emitting device according to an embodiment includes a substrate 200 and a first assembled electrode 201 arranged to be spaced apart from each other on the substrate 200. ), a second assembled electrode 202, a first insulating layer 212 disposed on the first assembled electrode 201 and the second assembled electrode 202, and a predetermined assembly hole 207H. and is electrically connected to the assembly partition 207 disposed on the first insulating layer 212, the semiconductor light emitting device 150A disposed in the assembly hole 207H, and the side of the semiconductor light emitting device 150A. It may include a side wiring 290 and a second panel electrode 320 electrically connected to the upper side of the semiconductor light emitting device 150A.
상기 반도체 발광소자(150A)는 발광구조물(152)과, 발광구조물(152) 하측에 배치되는 하부 전극층(154)과 상기 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함할 수 있다. 상기 반도체 발광소자(150A)는 상기 발광구조물(152)과 상기 열전달 절연층(157) 사이에 패시베이션층(미도시)을 더 포함할 수 있다.The semiconductor light emitting device 150A may include a light emitting structure 152, a lower electrode layer 154 disposed below the light emitting structure 152, and a heat transfer insulating layer 157 disposed outside the light emitting structure 152. there is. The semiconductor light emitting device 150A may further include a passivation layer (not shown) between the light emitting structure 152 and the heat transfer insulating layer 157.
도 10을 참조하면, 상기 발광구조물(152)은 제1 도전형 반도체층(152a), 제2 도전형 반도체층(152c) 및 그 사이에 배치되는 활성층(152b)을 포함할 수 있다. 상기 제1 도전형 반도체층(152a)은 n형 반도체층일 수 있고, 제2 도전형 반도체층(152c)은 p형 반도체층일 수 있으나 이에 한정되는 것은 아니다.Referring to FIG. 10, the light emitting structure 152 may include a first conductive semiconductor layer 152a, a second conductive semiconductor layer 152c, and an active layer 152b disposed between them. The first conductive semiconductor layer 152a may be an n-type semiconductor layer, and the second conductive semiconductor layer 152c may be a p-type semiconductor layer, but are not limited thereto.
상기 측면 배선(290)은 상기 반도체 발광소자(150A)의 제1 도전형 반도체층(152a)과 전기적으로 연결될 수 있다. 예를 들어, 상기 측면 배선(290)은 상기 하부 전극층(154)을 통해 상기 반도체 발광소자(150A)의 제1 도전형 반도체층(152a)과 전기적으로 연결될 수 있으나 이에 한정되는 것은 아니다.The side wiring 290 may be electrically connected to the first conductive semiconductor layer 152a of the semiconductor light emitting device 150A. For example, the side wiring 290 may be electrically connected to the first conductive semiconductor layer 152a of the semiconductor light emitting device 150A through the lower electrode layer 154, but is not limited to this.
상기 측면 배선(290)은 상기 반도체 발광소자(150A)의 측면에 배치되는 제1 측면 배선(290a), 상기 제1, 제2 조립 전극들(201, 202) 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선(290b) 및 상기 조립 격벽(207)과 접하는 제3 측면 배선(290c)을 포함할 수 있다.The side wiring 290 is in electrical contact with one or more of the first side wiring 290a and the first and second assembly electrodes 201 and 202 disposed on the side of the semiconductor light emitting device 150A. It may include a second side wire 290b and a third side wire 290c in contact with the assembly partition 207.
실시예는 상기 조립 홀(207H) 내에 배치되는 제1 평탄화층(301) 및 제2 평탄화층(302)을 포함할 수 있다. 상기 제1 평탄화층(301) 및 제2 평탄화층(302)은 절연물질로 형성될 수 있다.The embodiment may include a first planarization layer 301 and a second planarization layer 302 disposed in the assembly hole 207H. The first planarization layer 301 and the second planarization layer 302 may be formed of an insulating material.
상기 제1 평탄화층(301)은 상기 측면 배선(290) 내에 배치될 수 있다. The first planarization layer 301 may be disposed within the side wiring 290.
실시예는 상기 제1 평탄화층(301)과 상기 측면 배선(290) 상에 배치되는 제2 평탄화층(302)을 포함할 수 있다. 상기 제2 평탄화층(302)은 상기 측면 배선(290)과 상기 반도체 발광소자(150A)의 활성층(152b) 사이에 배치되어 전기적인 단락을 방지하고 신뢰성을 향상시킬 수 있다.The embodiment may include a second planarization layer 302 disposed on the first planarization layer 301 and the side wiring 290. The second planarization layer 302 is disposed between the side wiring 290 and the active layer 152b of the semiconductor light emitting device 150A to prevent electrical shorting and improve reliability.
다음으로 도 11은 도 10에 도시된 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)의 C1 영역의 사진 예시도이다.Next, FIG. 11 is an example photograph of the C1 area of the display device 300 equipped with a semiconductor light emitting device according to the embodiment shown in FIG. 10.
실시예에 반도체 발광소자(150A)는 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함할 수 있으며, 열전달 절연층(157)에 의해 측면 배선(290)의 단선을 방지하고 전기적 특성을 향상시킴으로써 점등률이 현저히 높아지는 기술적 효과가 있다. In the embodiment, the semiconductor light emitting device 150A may include a heat transfer insulating layer 157 disposed on the outside of the light emitting structure 152, and the heat transfer insulating layer 157 prevents disconnection of the side wiring 290 and prevents electrical By improving the characteristics, there is a technical effect of significantly increasing the lighting rate.
예를 들어, 실시예는 반도체 발광소자(150A)의 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함하여 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, the embodiment includes a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b. There is a special technical effect that can realize excellent contact characteristics (G) by forming a film.
실시예에 의하면 반도체 발광소자(150A)의 접합공정에서 전기적 연결 불량이 발생되더라도, 추가 공정인 핫 프레스(hot press) 공정에서 신뢰성 높은 전기적 연결이 가능하도록 하여, 점등률을 획기적으로 향상시킬 수 있다.According to the embodiment, even if an electrical connection defect occurs during the bonding process of the semiconductor light emitting device 150A, a highly reliable electrical connection is possible in an additional hot press process, thereby dramatically improving the lighting rate. .
예를 들어, 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)에 의해 hot press에 의한 열을 반도체 발광소자의 하단 에지 부위로 신속히 전달함으로써 측면 전극의 물질의 열 확산을 활성화시켜 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, according to the embodiment, the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light emitting device 150A, thereby reducing the heat of the material of the side electrode. There is a special technical effect of realizing excellent contact characteristics (G) by activating diffusion to form a solid electrode film of the first and second side wirings 290a and 290b.
예를 들어, 상기 측면 전극은 Al 등과 같은 융점이 낮은 저온 메탈재질을 포함할 수 있으며, hot press에 의한 열이 열전달 절연층(157)에 의해 반도체 발광소자의 하단 에지 부위로 신속히 전달함으로써 측면 전극의 물질의 열 확산을 활성화시켜 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, the side electrode may include a low-temperature metal material with a low melting point, such as Al, and the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode. There is a special technical effect of realizing excellent contact characteristics (G) by activating heat diffusion of the material to form a solid electrode film of the first side wiring 290a and the second side wiring 290b.
또한 실시예에 의하면 반도체 발광소자(150A)의 외측둘레에 열전달 절연층(157)이 배치되고 상기 발광구조물(152)과 열전달 절연층(157) 사이에 패시베이션층이 배치됨에 따라 hot press 공정에서의 열이나 압력이 반도체 발광소자(150A)에 직접 전달되지 않음으로써 발광구조물(152)의 전기적, 특성 저하를 방지할 수 있는 기술적 효과가 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, and a passivation layer is disposed between the light emitting structure 152 and the heat transfer insulating layer 157, thereby reducing the heat transfer insulating layer 157 in the hot press process. There is a technical effect of preventing deterioration of the electrical and characteristics of the light emitting structure 152 by preventing heat or pressure from being directly transmitted to the semiconductor light emitting device 150A.
또한 실시예에 의하면 반도체 발광소자(150A)를 구비하는 디스플레이 장치에서 디스플레이 구현 중 열이 발생하는 경우 열전달 절연층(157)을 통해 외부로 확산시킬 수 있으므로 디스플레이 장치의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다. In addition, according to the embodiment, when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
또한 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)을 배치하고, 발광구조물(152) 뿐만 아니라 열전달 절연층(157) 상에도 측면 전극의 일부, 예를 들어 제1 측면 배선(290a)이 연장되어 배치됨으로써 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 향상시켜 소자의 신뢰성을 향상시킬 수 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157. By extending the first side wiring 290a, the bonding force between the first side wiring 290a and the heat transfer insulating layer 157 can be improved, thereby improving the reliability of the device.
예를 들어, 열전달 절연층(157)이 측면 전극을 구성하는 금속의 산화물을 포함함으로써 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 현저히 향상시켜 소자의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다.For example, since the heat transfer insulating layer 157 includes the metal oxide constituting the side electrode, the bonding strength between the first side wiring 290a and the heat transfer insulating layer 157 can be significantly improved, thereby improving the reliability of the device. There is a technical effect.
다음으로 도 12a 내지 도 12i는 실시예에 따른 반도체 발광소자를 포함하는 디스플레이 장치(300)의 제조공정 단면도이다.Next, FIGS. 12A to 12I are cross-sectional views of the manufacturing process of the display device 300 including a semiconductor light emitting device according to an embodiment.
도 12a를 참조하면, 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300)는 조립 기판(200) 상에 이격되어 배치된 제1 조립 전극(201), 제2 조립 전극(202)과, 상기 제1 조립 전극(201)과 상기 제2 조립 전극(202) 사이에 배치되는 제1 절연층(212)과, 소정의 조립 홀(207H)을 포함하며 상기 제1 절연층(212) 상에 배치되는 조립 격벽(207), 및 상기 조립 홀(207H) 내에 배치되는 도체 발광소자(150A)를 포함할 수 있다.Referring to FIG. 12A, a display device 300 including a semiconductor light emitting device according to an embodiment includes a first assembled electrode 201 and a second assembled electrode 202 spaced apart from each other on an assembled substrate 200. It includes a first insulating layer 212 disposed between the first assembly electrode 201 and the second assembly electrode 202, and a predetermined assembly hole 207H, and is located on the first insulating layer 212. It may include an assembly partition 207 disposed, and a conductor light emitting device 150A disposed within the assembly hole 207H.
상기 반도체 발광소자(150A)는 제1 조립 전극(201)과 제2 조립 전극(202)을 이용한 DEP force로 조립될 수 있다.The semiconductor light emitting device 150A can be assembled by DEP force using the first assembly electrode 201 and the second assembly electrode 202.
상기 반도체 발광소자(150A)는 발광구조물(152)과, 발광구조물(152) 하측에 배치되는 하부 전극층(154)과 상기 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함할 수 있다. 상기 반도체 발광소자(150A)는 상기 발광구조물(152)과 상기 열전달 절연층(157) 사이에 패시베이션층(미도시)을 더 포함할 수 있다.The semiconductor light emitting device 150A may include a light emitting structure 152, a lower electrode layer 154 disposed below the light emitting structure 152, and a heat transfer insulating layer 157 disposed outside the light emitting structure 152. there is. The semiconductor light emitting device 150A may further include a passivation layer (not shown) between the light emitting structure 152 and the heat transfer insulating layer 157.
다음으로 도 12b를 참조하면, 조립 홀(207H) 내의 제1 절연층(212)을 일부 제거하여 제1 조립 전극(201), 제2 조립 전극(202)의 상측이 노출되는 절연층 관통 홀(H1)을 형성할 수 있다.Next, referring to FIG. 12B, a portion of the first insulating layer 212 in the assembly hole 207H is removed to expose the upper sides of the first assembly electrode 201 and the second assembly electrode 202. An insulating layer through hole ( H1) can be formed.
다음으로 도 12c 참조하면, 상기 노출된 반도체 발광소자(150A), 조립 격벽(207) 및 노출된 제1 조립 전극(201), 제2 조립 전극 상에 예비 측면 배선층(290a)을 형성한다.Next, referring to FIG. 12C, a preliminary side wiring layer 290a is formed on the exposed semiconductor light emitting device 150A, the assembled barrier rib 207, and the exposed first assembled electrode 201 and the second assembled electrode.
상기 예비 측면 배선(290a)은 금속층 또는 전도성 감광물질일 수 있다. 예를 들어, 상기 예비 측면 배선(290a)은 Al 또는 Al 합금 등일 수 있으나 이에 한정되는 것은 아니다. 또한 예비 측면 배선(290a)은 Mo/Al/Mo 또는 AuGe 등일 수 있으나 이에 한정되는 것은 아니다.The preliminary side wiring 290a may be a metal layer or a conductive photosensitive material. For example, the preliminary side wiring 290a may be made of Al or Al alloy, but is not limited thereto. Additionally, the preliminary side wiring 290a may be Mo/Al/Mo or AuGe, but is not limited thereto.
또한 상기 예비 측면 배선(290a)은 전도성 감광물질일 수 있다. 예를 들어, 상기 예비 측면 배선(290a)은 전도성 액상 감광성 물질을 포함할 수 있다. 예를 들어, 상기 예비 측면 배선(290a)은 전도성 액상 감광성 물질을 형성 후 노광, 현상공정을 수행하여 측면 배선이 형성될 수 있다. 상기 예비 측면 배선(290a)은 전도성 고분자와 감광성 고분자의 혼합물일 수 있으나 이에 한정되지 않는다.Additionally, the preliminary side wiring 290a may be made of a conductive photosensitive material. For example, the preliminary side wiring 290a may include a conductive liquid photosensitive material. For example, the preliminary side wiring 290a may be formed by forming a conductive liquid photosensitive material and then performing exposure and development processes. The preliminary side wiring 290a may be a mixture of a conductive polymer and a photosensitive polymer, but is not limited thereto.
실시예에서 상기 예비 측면 배선(290a)은 상기 반도체 발광소자(150A)를 안정적으로 고정하는 역할하는 특별한 기술적 효과가 있다.In the embodiment, the preliminary side wiring 290a has a special technical effect of stably fixing the semiconductor light emitting device 150A.
이에 따라 실시예에 의하면, 내부기술에서 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제를 해결할 수 있다.Accordingly, according to the embodiment, it is possible to solve the problem of the semiconductor light emitting device assembled in the assembly hole being separated due to weak fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode in the internal technology.
다음으로 도 12d를 참조하면, 소정의 핫 프레스 공정이 진행될 수 있다. 상기 핫 프레스 공정에 의해 예비 측면 배선(290a)에서의 금속물질, 예를 들어 Al 물질의 확산접합(diffusion bonding)이 진행될 수 있다. 상기 핫 프레스 공정은 융점의 0.3~0.8 범위일 수 있으며, 압력은 0.04~0.1Mpa일 수 있다. 예를 들어, 상기 핫 프레스 공정의 온도는 약 200~250℃범위일 수 있으나 이에 한정되는 것은 아니다.Next, referring to FIG. 12D, a predetermined hot press process may be performed. Diffusion bonding of a metal material, for example, an Al material, in the preliminary side wiring 290a may be performed through the hot press process. The hot press process may range from 0.3 to 0.8 of the melting point, and the pressure may range from 0.04 to 0.1 Mpa. For example, the temperature of the hot press process may be in the range of about 200 to 250°C, but is not limited thereto.
실시예에 의하면 반도체 발광소자(150A)의 접합공정에서 전기적 연결 불량이 발생되더라도, 추가 공정인 핫 프레스(hot press) 공정에서 신뢰성 높은 전기적 연결이 가능하도록 하여, 점등율을 획기적으로 향상시킬 수 있다.According to the embodiment, even if an electrical connection defect occurs during the bonding process of the semiconductor light emitting device 150A, a highly reliable electrical connection can be made in an additional hot press process, thereby dramatically improving the lighting rate.
예를 들어, 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)에 의해 hot press에 의한 열을 반도체 발광소자의 하단 에지 부위로 신속히 전달하는 히트 플로우(HF)을 형성함으로써 측면 전극의 물질의 열 확산의 활성화 또는 계면사이에서의 일렉트로 마이그레이션을 유발시킬 수 있다.For example, according to the embodiment, a heat flow (HF) that quickly transfers heat by hot pressing to the bottom edge of the semiconductor light-emitting device 150A is provided by the heat transfer insulating layer 157 disposed around the outer circumference of the semiconductor light-emitting device 150A. By forming it, it can activate thermal diffusion of the material of the side electrode or cause electromigration between the interfaces.
이를 통해 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.This has a special technical effect of realizing excellent contact characteristics (G) by forming a solid electrode film of the first side wiring 290a and the second side wiring 290b.
예를 들어, 상기 측면 전극은 Al 등과 같은 융점이 낮은 저온 메탈재질을 포함할 수 있으며, hot press에 의한 열이 열전달 절연층(157)에 의해 반도체 발광소자의 하단 에지 부위로 신속히 전달됨으로써 측면 전극의 물질의 열 확산을 활성화시켜 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성하여 우수한 컨택특성(G)을 구현할 수 있는 특별한 기술적 효과가 있다.For example, the side electrode may include a low-temperature metal material with a low melting point, such as Al, and the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the heat transfer insulating layer 157, thereby forming the side electrode. There is a special technical effect of realizing excellent contact characteristics (G) by activating heat diffusion of the material to form a solid electrode film of the first side wiring 290a and the second side wiring 290b.
실시예에 반도체 발광소자(150A)는 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함할 수 있으며, 열전달 절연층(157)에 의해 측면 배선(290)의 단선을 방지하고 전기적 특성을 향상시킴으로써 점등률이 현저히 높아지는 기술적 효과가 있다. In the embodiment, the semiconductor light emitting device 150A may include a heat transfer insulating layer 157 disposed on the outside of the light emitting structure 152, and the heat transfer insulating layer 157 prevents disconnection of the side wiring 290 and prevents electrical By improving the characteristics, there is a technical effect of significantly increasing the lighting rate.
예를 들어, 실시예는 반도체 발광소자(150A)의 발광구조물(152) 외곽에 배치되는 열전달 절연층(157)을 포함하여 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 우수한 컨택특성을 구현할 수 있는 특별한 기술적 효과가 있다.For example, the embodiment includes a heat transfer insulating layer 157 disposed outside the light emitting structure 152 of the semiconductor light emitting device 150A, and solid electrodes of the first side wiring 290a and the second side wiring 290b. There is a special technical effect that can realize excellent contact characteristics by forming a film.
또한 실시예에 의하면 반도체 발광소자(150A)의 외측둘레에 열전달 절연층(157)이 배치됨에 따라 hot press 공정에서의 열이나 압력이 반도체 발광소자(150A)에 직접 전달되지 않음으로써 발광구조물(152)의 전기적, 특성 저하를 방지할 수 있는 기술적 효과가 있다.In addition, according to the embodiment, the heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, so that heat or pressure in the hot press process is not directly transmitted to the semiconductor light emitting device 150A, thereby forming the light emitting structure 152. ) has a technical effect that can prevent deterioration of electrical and characteristics.
또한 실시예에 의하면 반도체 발광소자(150A)를 구비하는 디스플레이 장치에서 디스플레이 구현 중 열이 발생하는 경우 열전달 절연층(157)을 통해 외부로 확산시킬 수 있으므로 디스플레이 장치의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다. In addition, according to the embodiment, when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
또한 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)을 배치하고, 발광구조물(152) 뿐만 아니라 열전달 절연층(157) 상에도 측면 전극의 일부, 예를 들어 제1 측면 배선(290a)이 연장되어 배치됨으로써(도 12g 참조) 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 향상시켜 소자의 신뢰성을 향상시킬 수 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157. By extending the first side wiring 290a (see FIG. 12g), the bonding force between the first side wiring 290a and the heat transfer insulating layer 157 can be improved, thereby improving the reliability of the device.
예를 들어, 열전달 절연층(157)이 측면 전극을 구성하는 금속의 산화물을 포함함으로써 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 현저히 향상시켜 소자의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다.For example, since the heat transfer insulating layer 157 includes the metal oxide constituting the side electrode, the bonding strength between the first side wiring 290a and the heat transfer insulating layer 157 can be significantly improved, thereby improving the reliability of the device. There is a technical effect.
다음으로 도 12e를 참조하면, 상기 예비 측면 배선(290a) 상에 제1 예비 평탄화층(301a)을 형성한다.Next, referring to FIG. 12E, a first preliminary planarization layer 301a is formed on the preliminary side wiring 290a.
상기 제1 예비 평탄화층(301a)은 PAC(photo active compound))일 수 있으며, 포토 아크릴(photoacryl)로 형성될 수 있으나 이에 한정되지 않는다. 또한 상기 제1 예비 평탄화층(301a)은 아크릴계 감광성 수지, 노블락 수지 계통, 폴리이미드 또는 실록산 계통 등의 바인더 수지에 감광성을 부여한 화합물 등일 있으나 이에 한정되지 않는다.The first preliminary planarization layer 301a may be PAC (photo active compound) and may be formed of photoacryl, but is not limited thereto. In addition, the first preliminary planarization layer 301a may be a compound imparting photosensitivity to a binder resin such as an acrylic photosensitive resin, a Noblock resin, a polyimide, or a siloxane, but is not limited thereto.
다음으로 도 12f를 참조하면, 상기 제1 예비 평탄화층(301a)의 상측을 일부 제거하여 예비 측면 배선(290a)의 상면과 측면을 노출시킨다.Next, referring to FIG. 12F, the upper side of the first preliminary planarization layer 301a is partially removed to expose the upper and side surfaces of the preliminary side wiring 290a.
예를 들어, 상기 반도체 발광소자(150A)의 제1 도전형 반도체층(152a)의 위치까지 노출되도록 제1 예비 평탄화층(301a)의 상측을 일부를 건식 식각 등으로 제거하여 제1 평탄화층(301)을 형성할 수 있다.For example, a portion of the upper side of the first preliminary planarization layer 301a is removed by dry etching to expose the position of the first conductive semiconductor layer 152a of the semiconductor light emitting device 150A, thereby forming a first planarization layer ( 301) can be formed.
다음으로 도 12g를 참조하면, 노출된 예비 측면 배선(290a)을 제거하여 측면 배선(290)을 형성할 수 있다.Next, referring to FIG. 12g, the exposed preliminary side wiring 290a can be removed to form the side wiring 290.
상기 측면 배선(290)은 상기 반도체 발광소자(150A)의 측면에 배치되는 제1 측면 배선(290a), 상기 제1, 제2 조립 전극들(201, 202) 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선(290b) 및 상기 조립 격벽(207)과 접하는 제3 측면 배선(290c)을 포함할 수 있다.The side wiring 290 is in electrical contact with one or more of the first side wiring 290a and the first and second assembly electrodes 201 and 202 disposed on the side of the semiconductor light emitting device 150A. It may include a second side wire 290b and a third side wire 290c in contact with the assembly partition 207.
다음으로 도 12h를 참조하면, 상기 반도체 발광소자(150A)와 조립 격벽(207) 상에 제2 평탄화층(302)을 형성할 수 있다. 상기 제2 평탄화층(302)은 상기 측면 배선(290)과 상기 반도체 발광소자(150A)의 활성층(152b) 사이에도 배치되어 전기적인 단락을 방지하고 신뢰성을 향상시킬 수 있다.Next, referring to FIG. 12H, a second planarization layer 302 may be formed on the semiconductor light emitting device 150A and the assembly partition 207. The second planarization layer 302 is also disposed between the side wiring 290 and the active layer 152b of the semiconductor light emitting device 150A to prevent electrical short circuit and improve reliability.
이후 제2 평탄화층(302)의 일부를 제거하는 제3 관통홀(302H)을 형성하여 반도체 발광소자(150A)의 상면 일부를 오픈할 수 있다.Thereafter, a third through hole 302H is formed by removing a portion of the second planarization layer 302, thereby opening a portion of the upper surface of the semiconductor light emitting device 150A.
도 12i를 참조하면, 상기 반도체 발광소자(150A)의 상면과 전기적으로 연결되는 제2 패널 전극(320)을 형성할 수 있다.Referring to FIG. 12i, a second panel electrode 320 electrically connected to the top surface of the semiconductor light emitting device 150A can be formed.
다음으로 도 13은 제2 실시예에 따른 반도체 발광소자를 포함하는 디스플레이 장치(300B)의 단면도이다. Next, Figure 13 is a cross-sectional view of a display device 300B including a semiconductor light emitting device according to the second embodiment.
제2 실시예는 앞서 기술한 실시예의 기술적 특징을 채용할 수 있다.The second embodiment may adopt the technical features of the previously described embodiment.
예를 들어, 제2 실시예에 따른 반도체 발광소자를 구비하는 디스플레이 장치(300B)는, 기판(200)과, 상기 기판(200) 상에 상호 이격되어 배치된 제1 조립 전극(201), 제2 조립 전극(202)과, 상기 제1 조립 전극(201)과 상기 제2 조립 전극(202) 상에 배치되는 제1 절연층(212)과, 소정의 조립 홀(207H)을 포함하며 상기 제1 절연층(212) 상에 배치되는 조립 격벽(207)와, 상기 조립 홀(207H) 내에 배치되는 반도체 발광소자(150A)와, 상기 반도체 발광소자(150A)의 측면과 전기적으로 연결되는 측면 배선(290) 및 상기 반도체 발광소자(150A)의 상측과 전기적으로 연결되는 제2 패널 전극(320)을 포함할 수 있다.For example, the display device 300B including a semiconductor light emitting device according to the second embodiment includes a substrate 200, a first assembled electrode 201 spaced apart from each other on the substrate 200, and 2. It includes an assembled electrode 202, a first insulating layer 212 disposed on the first assembled electrode 201 and the second assembled electrode 202, and a predetermined assembly hole 207H. 1 An assembly partition wall 207 disposed on the insulating layer 212, a semiconductor light emitting device 150A disposed in the assembly hole 207H, and a side wiring electrically connected to the side of the semiconductor light emitting device 150A. It may include 290 and a second panel electrode 320 electrically connected to the upper side of the semiconductor light emitting device 150A.
상기 반도체 발광소자(150A)는 발광구조물(152)과, 발광구조물(152) 하측에 배치되는 하부 전극층(154)과 상기 발광구조물(152) 외곽에 배치되는 제2 열전달 절연층(157B)을 포함할 수 있다. 상기 반도체 발광소자(150A)는 상기 발광구조물(152)과 상기 열전달 절연층(157) 사이에 패시베이션층(미도시)을 더 포함할 수 있다.The semiconductor light emitting device 150A includes a light emitting structure 152, a lower electrode layer 154 disposed below the light emitting structure 152, and a second heat transfer insulating layer 157B disposed outside the light emitting structure 152. can do. The semiconductor light emitting device 150A may further include a passivation layer (not shown) between the light emitting structure 152 and the heat transfer insulating layer 157.
상기 측면 배선(290)은 상기 반도체 발광소자(150A)의 측면에 배치되는 제1 측면 배선(290a), 상기 제1, 제2 조립 전극들(201, 202) 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선(290b) 및 상기 조립 격벽(207)과 접하는 제3 측면 배선(290c)을 포함할 수 있다.The side wiring 290 is in electrical contact with one or more of the first side wiring 290a and the first and second assembly electrodes 201 and 202 disposed on the side of the semiconductor light emitting device 150A. It may include a second side wire 290b and a third side wire 290c in contact with the assembly partition 207.
이하 제2 실시예의 주된 특징을 중심으로 기술하기로 한다.The description below will focus on the main features of the second embodiment.
제2 실시예는 발광구조물(152) 외곽에 배치되는 제2 열전달 절연층(157B)을 포함하여 상기 제2 열전달 절연층(157B)은 그 하단이 발광구조물(152)의 하단까지 연장되어 배치될 수 있다.The second embodiment includes a second heat transfer insulating layer 157B disposed on the outside of the light emitting structure 152, and the lower end of the second heat transfer insulating layer 157B is arranged to extend to the bottom of the light emitting structure 152. You can.
이에 따라 제2 열전달 절연층(157B)의 연전달 효율이 제1 측면 배선(290a)과 제2 측면 배선(290b)이 만나는 반도체 발광소자의 하측 에지까지 효율적으로 전달될 수 있다.Accordingly, the heat transfer efficiency of the second heat transfer insulating layer 157B can be efficiently transmitted to the lower edge of the semiconductor light emitting device where the first side wiring 290a and the second side wiring 290b meet.
예를 들어, 제2 실시예에 의하면 제2 열 전달 절연층(157B)에 의해 hot press에 의한 열이 반도체 발광소자의 하단 에지 부위로 신속히 전달됨으로로써 측면 전극의 물질의 열 확산을 활성화시켜 제1 측면 배선(290a)과 제2 측면 배선(290b)의 견고한 전극 막질을 형성함으로써 더욱 우수한 컨택특성을 구현할 수 있는 특별한 기술적 효과가 있다.For example, according to the second embodiment, the heat generated by hot pressing is quickly transferred to the bottom edge of the semiconductor light emitting device by the second heat transfer insulating layer 157B, thereby activating heat diffusion of the material of the side electrode. There is a special technical effect of realizing better contact characteristics by forming a solid electrode film of the first side wiring 290a and the second side wiring 290b.
실시예에 따른 반도체 발광소자를 포함하는 디스플레이 장치에 의하면, 반도체 발광소자의 측면에 연결되는 측면 배선에 의해 전기적 접촉 면적을 넓힘으로써 전기적 접촉특성이 향상되어 점등률이 향상되는 기술적 효과가 있다.According to the display device including the semiconductor light-emitting device according to the embodiment, the electrical contact characteristics are improved by expanding the electrical contact area by the side wiring connected to the side of the semiconductor light-emitting device, which has the technical effect of improving the lighting rate.
또한 실시예에 의하면, 내부기술에서 DEP force로 자가조립 후 패널 배선을 발광소자 칩의 측면과 연결하는 측면배선 기술에서, 발광소자 칩 하단 에지에서 측변 배선이 끊어지는 단선 문제를 해결할 수 있다.In addition, according to the embodiment, in the side wiring technology that connects the panel wiring to the side of the light emitting device chip after self-assembly using DEP force in the internal technology, the problem of disconnection of the side wiring at the bottom edge of the light emitting device chip can be solved.
또한 실시예에 의하면 반도체 발광소자(150A)의 접합공정에서 전기적 연결 불량이 발생되더라도, 추가 공정인 핫 프레스(hot press) 공정에서 신뢰성 높은 전기적 연결이 가능하도록 하여, 점등률을 획기적으로 향상시킬 수 있다.In addition, according to the embodiment, even if an electrical connection defect occurs in the bonding process of the semiconductor light emitting device 150A, a highly reliable electrical connection is possible in an additional hot press process, thereby dramatically improving the lighting rate. there is.
또한 실시예에 의하면 반도체 발광소자(150A)의 외측둘레에 열전달 절연층(157)이 배치되고 상기 발광구조물(152)과 열전달 절연층(157) 사이에 패시베이션층이 배치됨에 따라 hot press 공정에서의 열이나 압력이 반도체 발광소자(150A)에 직접 전달되지 않음으로써 발광구조물(152)의 전기적, 특성 저하를 방지할 수 있는 기술적 효과가 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer circumference of the semiconductor light emitting device 150A, and a passivation layer is disposed between the light emitting structure 152 and the heat transfer insulating layer 157, thereby reducing the heat transfer insulating layer 157 in the hot press process. There is a technical effect of preventing deterioration of the electrical and characteristics of the light emitting structure 152 by preventing heat or pressure from being directly transmitted to the semiconductor light emitting device 150A.
또한 실시예에 의하면 반도체 발광소자(150A)를 구비하는 디스플레이 장치에서 디스플레이 구현 중 열이 발생하는 경우 열전달 절연층(157)을 통해 외부로 확산시킬 수 있으므로 디스플레이 장치의 신뢰성을 향상시킬 수 있는 기술적 효과가 있다. In addition, according to the embodiment, when heat is generated during display implementation in a display device including a semiconductor light emitting device 150A, it can be diffused to the outside through the heat transfer insulating layer 157, thereby providing a technical effect that can improve the reliability of the display device. There is.
또한 실시예에 의하면 반도체 발광소자(150A) 외측 둘레에 배치된 열전달 절연층(157)을 배치하고, 발광구조물(152) 뿐만 아니라 열전달 절연층(157) 상에도 측면 전극의 일부, 예를 들어 제1 측면 배선(290a)이 연장되어 배치됨으로써 제1 측면 배선(290a)과 열전달 절연층(157) 사이의 결합력을 향상시켜 소자의 신뢰성을 향상시킬 수 있다.In addition, according to the embodiment, a heat transfer insulating layer 157 is disposed around the outer periphery of the semiconductor light emitting device 150A, and a part of the side electrode, for example, is placed not only on the light emitting structure 152 but also on the heat transfer insulating layer 157. By extending the first side wiring 290a, the bonding force between the first side wiring 290a and the heat transfer insulating layer 157 can be improved, thereby improving the reliability of the device.
또한 실시예에 의하면, 내부기술에서는 반도체 발광소자와 조립 전극 상의 유전체층 사이의 고정력이 약하여 조립홀에 조립되었던 반도체 발광소자가 이탈되는 문제를 해결할 수 있다.In addition, according to the embodiment, the internal technology can solve the problem of the semiconductor light emitting device assembled in the assembly hole being separated due to weak fixing force between the semiconductor light emitting device and the dielectric layer on the assembly electrode.
상기의 상세한 설명은 모든 면에서 제한적으로 해석되어서는 아니되고 예시적인 것으로 고려되어야 한다. 실시예의 범위는 첨부된 청구항의 합리적 해석에 의해 결정되어야 하고, 실시예의 등가적 범위 내에서의 모든 변경은 실시예의 범위에 포함된다.The above detailed description should not be construed as restrictive in any respect and should be considered illustrative. The scope of the embodiments should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent scope of the embodiments are included in the scope of the embodiments.
실시예는 영상이나 정보를 디스플레이하는 디스플레이 분야에 채택될 수 있다.Embodiments may be adopted in the field of displays that display images or information.
실시예는 반도체 발광소자를 이용하여 영상이나 정보를 디스플레이하는 디스플레이 분야에 채택될 수 있다. Embodiments can be adopted in the field of displays that display images or information using semiconductor light-emitting devices.
실시예는 마이크로급이나 나노급 반도체 발광소자를 이용하여 영상이나 정보를 디스플레이하는 디스플레이 분야에 채택될 수 있다. Embodiments can be adopted in the field of displays that display images or information using micro- or nano-level semiconductor light-emitting devices.

Claims (10)

  1. 기판;Board;
    상기 기판 상에 상호 이격되어 배치된 제1 전극, 제2 전극;a first electrode and a second electrode arranged to be spaced apart from each other on the substrate;
    상기 제1, 제2 전극 상에 배치되는 제1 절연층;a first insulating layer disposed on the first and second electrodes;
    소정의 조립 홀을 포함하며 상기 제1 절연층 상에 배치되는 조립 격벽;an assembly partition including a predetermined assembly hole and disposed on the first insulating layer;
    상기 조립 홀 내에 배치되는 반도체 발광소자;a semiconductor light emitting device disposed in the assembly hole;
    상기 반도체 발광소자의 측면과 전기적으로 연결되는 측면 배선 및 상기 반도체 발광소자의 상측과 전기적으로 연결되는 제2 패널 전극;을 포함하며, It includes a side wiring electrically connected to the side of the semiconductor light-emitting device and a second panel electrode electrically connected to the top of the semiconductor light-emitting device,
    상기 반도체 발광소자는, 발광구조물 및 상기 발광구조물 외곽에 배치되는 열전달 절연층을 포함하는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device, wherein the semiconductor light emitting device includes a light emitting structure and a heat transfer insulating layer disposed on the outside of the light emitting structure.
  2. 제1항에 있어서,According to paragraph 1,
    상기 발광구조물은, 제1 도전형 반도체층, 제2 도전형 반도체층 및 그 사이에 배치되는 활성층을 포함하며,The light emitting structure includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between them,
    상기 측면 배선은 상기 반도체 발광소자의 제1 도전형 반도체층과 전기적으로 연결되는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light-emitting device, wherein the side wiring is electrically connected to a first conductive semiconductor layer of the semiconductor light-emitting device.
  3. 제1항에 있어서,According to paragraph 1,
    상기 측면 배선은The side wiring is
    상기 반도체 발광소자의 측면에 배치되는 제1 측면 배선; 및a first side wiring disposed on a side of the semiconductor light emitting device; and
    상기 제1, 제2 전극들 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선;을 포함하는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device; a second side wiring electrically contacting one or more of the first and second electrodes.
  4. 제1항에 있어서,According to paragraph 1,
    상기 발광구조물과 상기 열전달 절연층 사이에 배치되는 패시베이션층을 더 포함하며,It further includes a passivation layer disposed between the light emitting structure and the heat transfer insulating layer,
    상기 패시베이션층의 열전달 효율은 상기 열전달 절연층 비해 낮은, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device, wherein the heat transfer efficiency of the passivation layer is lower than that of the heat transfer insulating layer.
  5. 제1항에 있어서,According to paragraph 1,
    상기 측면 배선은The side wiring is
    상기 발광구조물 측면 및 상기 열전달 절연층 상에 배치되는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device disposed on a side of the light emitting structure and the heat transfer insulating layer.
  6. 기판;Board;
    상기 기판 상에 상호 이격되어 배치된 제1 전극, 제2 전극;a first electrode and a second electrode arranged to be spaced apart from each other on the substrate;
    상기 제1, 제2 전극 상에 배치되는 제1 절연층;a first insulating layer disposed on the first and second electrodes;
    소정의 조립 홀을 포함하며 상기 제1 절연층 상에 배치되는 조립 격벽; 및an assembly partition including a predetermined assembly hole and disposed on the first insulating layer; and
    상기 조립 홀 내에 배치되는 반도체 발광소자;를 포함하며,It includes a semiconductor light emitting device disposed in the assembly hole,
    상기 반도체 발광소자는, 발광구조물 및 상기 발광구조물 외곽에 배치되는 열전달 절연층을 포함하며,The semiconductor light emitting device includes a light emitting structure and a heat transfer insulating layer disposed on the outside of the light emitting structure,
    상기 열전달 절연층의 하단은 상기 발광구조물의 하단까지 연장되어 배치되는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light-emitting device, wherein the bottom of the heat transfer insulating layer extends to the bottom of the light-emitting structure.
  7. 제6항에 있어서,According to clause 6,
    상기 발광구조물은, 제1 도전형 반도체층, 제2 도전형 반도체층 및 그 사이에 배치되는 활성층을 포함하며,The light emitting structure includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between them,
    상기 측면 배선은 상기 반도체 발광소자의 제1 도전형 반도체층과 전기적으로 연결되는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light-emitting device, wherein the side wiring is electrically connected to a first conductive semiconductor layer of the semiconductor light-emitting device.
  8. 제6항에 있어서,According to clause 6,
    상기 측면 배선은The side wiring is
    상기 반도체 발광소자의 측면에 배치되는 제1 측면 배선; 및a first side wiring disposed on a side of the semiconductor light emitting device; and
    상기 제1, 제2 전극들 중 어느 하나 이상과 전기적으로 접촉하는 제2 측면 배선;을 포함하는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device; a second side wiring electrically contacting one or more of the first and second electrodes.
  9. 제6항에 있어서,According to clause 6,
    상기 발광구조물과 상기 열전달 절연층 사이에 배치되는 패시베이션층을 더 포함하며,It further includes a passivation layer disposed between the light emitting structure and the heat transfer insulating layer,
    상기 패시베이션층의 열전달 효율은 상기 열전달 절연층 비해 낮은, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device, wherein the heat transfer efficiency of the passivation layer is lower than that of the heat transfer insulating layer.
  10. 제6항에 있어서,According to clause 6,
    상기 측면 배선은The side wiring is
    상기 발광구조물 측면 및 상기 열전달 절연층 상에 배치되는, 반도체 발광소자를 구비하는 디스플레이 장치.A display device including a semiconductor light emitting device disposed on a side of the light emitting structure and the heat transfer insulating layer.
PCT/KR2022/015276 2022-10-11 2022-10-11 Display device comprising semiconductor light-emitting element WO2024080391A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110101408A1 (en) * 2009-10-29 2011-05-05 Advanced Optoelectronic Technology, Inc. Led die having heat dissipation layers
KR20190104277A (en) * 2019-08-20 2019-09-09 엘지전자 주식회사 Display device using micro led and manufacturing method thereof
KR20200026775A (en) * 2019-11-28 2020-03-11 엘지전자 주식회사 Display device using semiconductor light emitting devices and manufacturing method thereof
KR20200106039A (en) * 2018-02-01 2020-09-10 엘지전자 주식회사 Display device using semiconductor light emitting device and manufacturing method thereof
WO2022039308A1 (en) * 2020-08-21 2022-02-24 엘지전자 주식회사 Display device using semiconductor light-emitting element

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110101408A1 (en) * 2009-10-29 2011-05-05 Advanced Optoelectronic Technology, Inc. Led die having heat dissipation layers
KR20200106039A (en) * 2018-02-01 2020-09-10 엘지전자 주식회사 Display device using semiconductor light emitting device and manufacturing method thereof
KR20190104277A (en) * 2019-08-20 2019-09-09 엘지전자 주식회사 Display device using micro led and manufacturing method thereof
KR20200026775A (en) * 2019-11-28 2020-03-11 엘지전자 주식회사 Display device using semiconductor light emitting devices and manufacturing method thereof
WO2022039308A1 (en) * 2020-08-21 2022-02-24 엘지전자 주식회사 Display device using semiconductor light-emitting element

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