WO2024065978A1

WO2024065978A1 - Check confidence-based ldpc decoding method and apparatus

Info

Publication number: WO2024065978A1
Application number: PCT/CN2022/131682
Authority: WO
Inventors: 管武; 王志君; 罗汉青; 梁利平
Original assignee: 北京邮电大学
Priority date: 2022-09-27
Filing date: 2022-11-14
Publication date: 2024-04-04
Also published as: CN115603761A

Abstract

A check confidence-based LDPC decoding method, relating to the technical field of information processing. The method comprises: S1, acquiring check nodes and variable nodes of an LDPC code, initializing the check nodes and the variable nodes, and initializing the number of iterations to 0; S2, performing check confidence-based iterative decoding on the LDPC code to obtain a decoding decision result, and increasing the number of iterations by one; S3, performing check verification according to the decoding decision result; and S4, if the check verification is passed, ending the decoding and outputting the decoding decision result as a decoding result, and if the check verification is not passed and the number of iterations does not reach a preset number of iterations, repeating steps S2-S4 until check verification is passed.

Description

LDPC decoding method and device based on verification confidence

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based on the Chinese patent application with application number 202211182509.3 and application date September 27, 2022, and claims the priority of the Chinese patent application. The entire content of the Chinese patent application is hereby introduced into this application as a reference.

Technical Field

The present disclosure relates to the field of information processing technology, and in particular to an LDPC decoding method and device based on verification confidence.

Background technique

LDPC (Low Density Parity Check Code) code is the latest excellent channel error correction coding technology. It has been applied in the 5G mobile communication standard and is one of the candidate channel coding technologies for future 6G mobile communications. LDPC codes can be defined by a check matrix. For each parity check matrix H, there is a corresponding Tanner (bipartite graph). The Tanner graph contains two types of nodes, namely VN (variable node) and CN (check node). Each VN represents a column in H, and each CN represents a row of H; when an element in a row or column of H is 1, the corresponding VN and CN in the Tanner graph are connected by an "edge".

In LDPC code decoding, multiple numbers need to be summed and multiplied. In this way, the calculation of each number requires multiple data read operations, which greatly reduces the decoding speed. Usually, the row processing and column processing methods are used. First, the product of the row or the sum of the column is calculated, and then each element is subtracted to obtain the confidence of each element in the row or column. As a result, the calculation and evaluation of each confidence only requires 2 delay units, which greatly improves the decoding throughput. This decoding method still requires a large number of registers to maintain the intermediate calculated values, which consumes a lot of register resources, increases the chip area, and increases power consumption.

Summary of the invention

The present disclosure aims to solve one of the technical problems in the related art at least to some extent.

To achieve the above-mentioned purpose, the first aspect of the present disclosure proposes an LDPC decoding method based on verification confidence, including: S1: obtaining the check nodes and variable nodes of the LDPC code, initializing the check nodes and variable nodes, and initializing the number of iterations to 0; S2: performing verification confidence iterative decoding on the LDPC code to obtain a decoding decision result, and increasing the number of iterations by one; S3: performing verification verification according to the decoding decision result; S4: if the verification verification passes, end the decoding, and output the decoding decision result as the decoding result. If the verification verification fails and the number of iterations does not reach the preset number of iterations, repeat steps S2-S4 until the verification verification passes.

In some embodiments, initializing the check nodes and the variable nodes includes:

Initialize the verification confidence of the verification node to infinity;

Initialize the external information of the variable node to the channel input soft information;

Initialize the information from the check node to the variable node to 0.

In some embodiments, the LDPC code is iteratively decoded to obtain a decoding decision result, including:

The check nodes are taken as target check nodes in turn to update the check confidence until the update of the check confidence of all check nodes is completed, and the decoding judgment result is obtained. The update of the check confidence of the target check node is completed by updating the check node to the check node information of the target check node.

In some embodiments, updating the target check node from check node to check node information includes:

The variable nodes connected to the target check node are used as the target variable nodes in sequence;

Obtaining a most recently updated check node other than the target check node connected to the target variable node as a first check node, calculating the confidence from the first check node to the target check node, and obtaining a decoding decision value of the target variable node;

The updated verification confidence of the target verification node is recursively calculated until the confidence update of all information transmitted through the variable nodes is completed.

In some embodiments, calculating the confidence from the first check node to the target check node to obtain the decoding decision value of the target variable node includes:

Obtaining update information from the first check node to the target variable node according to the check confidence of the first check node and the external information of the target variable node;

Calculate updated external information of the target variable node according to external information of the target variable node, updated information from the first check node to the target variable node, and information from the target check node to the target variable node;

According to the updated information and the external information of the target variable node, the updated posterior information of the target variable node is calculated;

The decoding decision is made according to the updated a posteriori information of the target variable node. If the updated a posteriori information of the target variable node is greater than or equal to 0, the decoding decision value of the target variable node is 0; otherwise, the decoding decision value of the target variable node is 1.

In some embodiments, recursively calculating the updated verification confidence of the target verification node includes:

The verification confidence of the target verification node and the updated external information of the target variable node are multiplied to obtain the updated information from the external information of the target variable node to the target verification node as the updated verification confidence of the target verification node.

In some embodiments, the decoding decision result includes a decoding decision value of the target variable node, and verification is performed according to the decoding decision result, including:

If the decoding judgment result satisfies the verification equation, the verification is passed;

If the decoding judgment result does not satisfy the verification equation, the verification fails;

Among them, the verification equation is expressed as:

in,

represents the decoding decision, and ^HT represents the transposed form of the LDPC code check matrix.

In some embodiments, after verification is performed according to the decoding decision result, the method further includes:

If the verification fails and the number of iterations reaches the preset number of iterations, the decoding stops and the decoding failure is output.

To achieve the above-mentioned purpose, the second aspect of the present disclosure proposes an LDPC decoding device based on verification confidence, comprising:

An initialization module, used to obtain the check nodes and variable nodes of the LDPC code, initialize the check nodes and variable nodes, and initialize the number of iterations to 0;

An iterative decoding module is used to perform iterative decoding on the LDPC code to verify the confidence level, obtain a decoding decision result, and increase the number of iterations by one;

A verification module is used to perform verification based on the decoding judgment result;

The output module is used to end the decoding if the verification is passed, and output the decoding judgment result as the decoding result. If the verification is not passed and the number of iterations does not reach the preset number of iterations, the iterative decoding module and the verification module are repeatedly called until the verification is passed.

To achieve the above-mentioned purpose, the third aspect embodiment of the present disclosure proposes an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it can execute the LDPC decoding method based on verification confidence of the first aspect embodiment of the present disclosure.

In order to achieve the above-mentioned objectives, the fourth aspect embodiment of the present disclosure proposes a non-temporary computer-readable storage medium. When the instructions in the storage medium are executed by a processor, the LDPC decoding method based on verification confidence of the first aspect embodiment of the present disclosure can be executed.

To achieve the above-mentioned purpose, the fifth aspect embodiment of the present disclosure proposes a computer program product, including a computer program or instructions, which, when executed by a processor, can execute the LDPC decoding method based on verification confidence of the first aspect embodiment of the present disclosure.

Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description or learned through practice of the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and/or additional aspects and advantages of the present disclosure will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

FIG1 is a flow chart of an LDPC decoding method based on verification confidence provided in Embodiment 1 of the present disclosure;

FIG2 is an example diagram of updating information from a check node to a check node for a target check node in an LDPC decoding method based on check confidence according to an embodiment of the present disclosure;

FIG3 is a schematic diagram of the structure of an LDPC decoding device based on verification confidence provided in Embodiment 2 of the present disclosure;

FIG. 4 is another schematic diagram of the structure of an LDPC decoding device based on verification confidence according to an embodiment of the present disclosure.

Detailed ways

Embodiments of the present disclosure are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present application.

The following describes an LDPC decoding method and apparatus based on verification confidence according to an embodiment of the present disclosure with reference to the accompanying drawings.

FIG1 is a flow chart of an LDPC decoding method based on verification confidence provided in the first embodiment of the present disclosure.

As shown in FIG1 , the LDPC decoding method based on verification confidence includes the following steps S1 to S4:

S1: Obtain the check nodes and variable nodes of the LDPC code, initialize the check nodes and variable nodes, and initialize the number of iterations to 0;

S2: Perform iterative decoding of the LDPC code to verify the confidence level, obtain a decoding decision result, and increase the number of iterations by one;

S3: Perform verification based on the decoding judgment result;

S4: If the verification is passed, the decoding is terminated and the decoding decision result is output as the decoding result. If the verification is not passed and the number of iterations does not reach the preset number of iterations, steps S2-S4 are repeated until the verification is passed.

The LDPC decoding method based on verification confidence of the embodiment of the present disclosure includes: S1: obtaining the verification nodes and variable nodes of the LDPC code, initializing the verification nodes and variable nodes, and initializing the number of iterations to 0; S2: iterative decoding of the LDPC code with verification confidence to obtain the decoding decision result, and increasing the number of iterations by one; S3: verification verification according to the decoding decision result; S4: if the verification verification passes, the decoding is terminated, and the decoding decision result is output as the decoding result. If the verification verification fails and the number of iterations does not reach the preset number of iterations, steps S2-S4 are repeated until the verification verification passes. Thus, the technical problems of the existing LDPC decoding method consuming more register resources and high power consumption can be solved. By eliminating the accumulation and multiplication operations in the LDPC decoding algorithm, the register consumption and decoding resources are reduced, and there is basically no decoding loss, which effectively improves the decoding efficiency.

The LDPC decoding method based on verification confidence disclosed by the present invention completes LDPC decoding through iterative decoding, and completes each iterative decoding by updating the verification confidence of each check node in turn; completes the verification confidence update of each check node by recursively updating the information from check node to check node; after each iterative decoding, the verification verification of the decision bit is performed to determine whether to continue the iteration; wherein, the verification confidence update of each check node is completed by recursively updating the information from check node to check node, including first calculating the update information from check node _cj to variable node _va , then calculating the updated external information of variable node _va and completing the posterior information update and decoding decision of variable node _va , and finally completing the calculation of the information update of variable node _va external information to check node c _i .

Furthermore, in the embodiment of the present disclosure, initializing the check nodes and the variable nodes includes:

Initialize the verification confidence of the verification node to infinity;

Initialize the information from the check node to the variable node to 0.

Set the verification confidence of all verification nodes

Initialized to ∞, expressed as:

The external information of all variable nodes

Initialize the channel input soft information, expressed as:

in,

is the encoded value of the variable node v _a ,

is the received value of the variable node v _a ,

Transfer all the information from check nodes c _i to variable nodes v _a

Initialized to 0, expressed as:

Furthermore, in the embodiment of the present disclosure, the LDPC code is iteratively decoded to verify the confidence level, and a decoding decision result is obtained, including:

Performing verification confidence iterative decoding on the LDPC code includes the following steps S21 to S23:

S21: Initialize the check node c _i as the 0th check node;

S22: Update the information of the check node to the check node for the check node c _i ;

S23: If the information update of all check nodes is completed, the iterative decoding is ended; otherwise, the check node is added to the next check node and the process returns to S22.

Further, in the embodiment of the present disclosure, updating the information of the target check node from the check node to the check node includes:

The check node to check node information update is performed on the check node c _i , including the following steps S221 to S226:

S221: Initialize the verification confidence of verification node c _i to

S222: Initialize the variable node v a connected to the check node c _i _as the 0th neighbor node of c _i ;

S223: Find the most recently updated check node c _j other than c _i connected to the variable node _va ;

S224: Calculate the confidence level from check node _cj to check node _ci ;

S225: Recursively calculate the confidence of the check node c _i

S226: If the confidence update of all the information transmitted by the check node c _i through the adjacent variable nodes is completed, then recursively obtain

Where |N( _ci )| represents the number of neighboring nodes of the check node _c , then the confidence calculation of the check node _c is completed, that is,

Otherwise, return to S222 to continue recursively calculating the verification confidence of the verification node c _i .

Further, in the embodiment of the present disclosure, the confidence from the first check node to the target check node is calculated to obtain the decoding decision value of the target variable node, including:

Calculating the confidence of the check node _cj to the check node _ci includes the following steps S2241 to S2244:

S2241: Verify the confidence level of the verification node _cj

and the external information of the variable node v _a

The update information from the check node _cj to the variable node v _a is calculated, where the calculation formula for the update information from the check node _cj to the variable node v _a is expressed as:

in,

represents the update information from the check node c _j to the variable node v _a ,

is the deproduct operation,

represents the verification confidence of the verification node c _i ,

Represents the external information of the variable node v _a ,

The deproduct operation is expressed as:

ψ ^- (x, y) = sgn(x) sgn(y) φ(|φ(|x|) - φ(|y|)|),

Verification confidence of verification node _cj

Exclude external information of variable node v _a

That is the information from the check node c _j to the variable node _va .

S2242: The external information of the variable node v _a

Add the update information from the check node _cj to the variable node v _a

Then subtract the information from the check node c _i to the variable node v _a

The updated external information of the variable node v _a is calculated, where the calculation formula of the updated external information of the variable node v _a is expressed as

in,

represents the updated external information of the variable node v _a ,

Represents the external information of the variable node v _a ,

Represents the information from check node c _i to variable node v _a .

S2243: Based on the external information of variable node v _a

and update information from check node c _j to variable node v _a

The updated posterior information of the variable node v _a is calculated, where the calculation formula of the updated posterior information of the variable node v _a is expressed as:

in,

represents the updated posterior information of the variable node v _a ,

Represents the external information of the variable node v _a ,

Represents the update information from check node c _j to variable node _va .

S2244: Decoding decision is made according to the updated a posteriori information of the variable node _va . If the updated a posteriori information of the variable node _va is greater than or equal to 0, the decoding decision value of _the variable node va is 0. If the updated a posteriori information of the variable node _va is less than 0, the decoding decision value of _the variable node _va is 1. The decoding decision is expressed as follows:

in,

Denotes the decoding decision,

Represents the updated posterior information of the variable node v _a .

Further, in the embodiment of the present disclosure, recursively calculating the updated verification confidence of the target verification node includes:

Recursively calculate the confidence of the check node c _i

The method comprises the following steps:

S2251: Verify the confidence level of some parts

Update external information with variable node v _a

Perform product operation to calculate the variable node v _a update external information

Update information to the verification node c _i , as the verification confidence of the verification node c _i

The calculation formula is expressed as:

in,

represents the partial verification confidence of the verification node c _i after n recursive updates, ψ ⁺ () represents the product operation,

represents the partial verification confidence of n-1 recursive updates,

Indicates that the variable node v _a updates external information,

The product operation is expressed as:

ψ ⁺ (x, y) = sgn(x)·sgn(y)·φ(|φ(|x|)-φ(|y|)|),

Further, in the embodiment of the present disclosure, the decoding decision result includes the decoding decision value of the target variable node, and verification is performed according to the decoding decision result, including:

Among them, the verification equation is expressed as:

in,

If the decoding judgment

Composition of vector

Satisfy the verification equation

If the decoding check is successful, the verification is passed; otherwise, the decoding check is failed.

Furthermore, in the embodiment of the present disclosure, after verification and validation are performed according to the decoding decision result, the following is further included:

FIG2 is an example diagram of updating information from a check node to a check node for a target check node in an LDPC decoding method based on check confidence according to an embodiment of the present disclosure.

As shown in FIG2 , the variable node _va connected to the check node _ci is obtained; the most recently updated check node _cj other than _ci connected to the variable node _va is found; and the update information from the check node _cj to the variable node _va is calculated.

Calculate the updated external information of the variable node v _a

According to the external information of variable node v _a

and update information from check node c _j to variable node v _a

Calculate the updated posterior information of the variable node v _a

The verification confidence of the verification node c _i

Update external information with variable node v _a

Perform product operation to calculate the verification confidence of verification node c _i

FIG3 is a schematic diagram of the structure of an LDPC decoding device based on verification confidence provided in Embodiment 2 of the present disclosure.

As shown in Fig. 3, the LDPC decoding device based on verification confidence includes an initialization module 10, an iterative decoding module 20, a verification verification module 30 and an output module 40. The initialization module 10 is used to obtain the check nodes and variable nodes of the LDPC code, initialize the check nodes and variable nodes, and initialize the number of iterations to 0.

The iterative decoding module 20 is used to perform iterative decoding of the LDPC code to verify the confidence, obtain a decoding decision result, and increase the number of iterations by one. ;

The verification module 30 is used to perform verification according to the decoding judgment result. ;

The output module 40 is used to end decoding if the verification is passed, and output the decoding judgment result as the decoding result. If the verification is not passed and the number of iterations does not reach the preset number of iterations, the iterative decoding module and the verification module are repeatedly called until the verification is passed.

The LDPC decoding device based on the verification confidence of the embodiment of the present disclosure includes an initialization module, an iterative decoding module, a verification verification module, and an output module. The initialization module is used to obtain the check nodes and variable nodes of the LDPC code, initialize the check nodes and variable nodes, and initialize the number of iterations to 0. The iterative decoding module is used to perform verification confidence iterative decoding on the LDPC code to obtain a decoding decision result, and increase the number of iterations by one. The verification verification module is used to perform verification verification according to the decoding decision result. The output module is used to end the decoding if the verification verification passes, and output the decoding decision result as the decoding result. If the verification verification fails and the number of iterations does not reach the preset number of iterations, the iterative decoding module and the verification verification module are repeatedly called until the verification verification passes. In this way, the technical problems that the existing LDPC decoding method consumes more register resources and consumes more power can be solved. By eliminating the accumulation and multiplication operations in the LDPC decoding algorithm, the register consumption and decoding resources are reduced, and there is basically no decoding loss, which effectively improves the decoding efficiency.

Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

As shown in Figure 4, the check node c _i corresponds to the i-th row of the LDPC code check matrix. The i-th row of the check matrix has multiple 1s, and each 1 corresponds to a variable node. The variable node _va corresponds to the a-th column of the LDPC code check matrix; if the i-th row and a-th column of the check matrix is 1, the check node c _i is connected to the variable node _va . Obtain the variable _nodes _va connected to the check node c _i in sequence; find the most recently updated check node c _j other than c _i connected to the variable node va; calculate the update information from the check node c _j to the variable node _va through the B2V module

The updated external information of the variable node v _a is calculated by the V2C module

At the same time, according to the external information of the variable node v _a

and update information from check node c _j to variable node v _a

Calculate the updated posterior information of the variable node v _a

The verification confidence of the verification node c _i is converted into

Update external information with variable node v _a

In order to implement the above embodiments, the present disclosure also proposes an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program implements the verification confidence-based LDPC method of the above embodiments when executed by the processor.

In order to implement the above embodiment, the present disclosure also proposes a non-temporary computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the LDPC method based on verification confidence of the above embodiment is implemented.

In order to implement the above embodiments, the present disclosure also proposes a computer program product, including a computer program or instructions, which, when executed by a processor, implements the LDPC method based on verification confidence of the above embodiments.

In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, "plurality" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present disclosure includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present disclosure belong.

The logic and/or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute the instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

It should be understood that the various parts of the present disclosure can be implemented in hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used to implement: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

In addition, each functional unit in each embodiment of the present disclosure may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present disclosure. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present disclosure.

Claims

An LDPC decoding method based on verification confidence includes:

S1: Obtain check nodes and variable nodes of the LDPC code, initialize the check nodes and variable nodes, and initialize the number of iterations to 0;

S2: Performing iterative decoding of the LDPC code to verify confidence, obtaining a decoding decision result, and increasing the number of iterations by one;

S3: Perform verification according to the decoding judgment result;

S4: If the verification is passed, the decoding is terminated and the decoding decision result is output as the decoding result; if the verification is not passed and the number of iterations does not reach the preset number of iterations, steps S2-S4 are repeated until the verification is passed.
The method of claim 1, wherein the initializing the check nodes and the variable nodes comprises:

Initializing the verification confidence of the verification node to infinity;

Initializing the external information of the variable node as channel input soft information;

Initialize the information from the check node to the variable node to 0.
The method according to claim 2, wherein the performing verification confidence iterative decoding on the LDPC code to obtain a decoding decision result comprises:

The verification confidence of the check nodes is updated in sequence as the target check nodes until the update of the verification confidence of all the check nodes is completed, and the decoding judgment result is obtained. The update of the verification confidence of the target check node is completed by updating the information from the check node to the check node of the target check node.
The method of claim 3, wherein the updating of information from check node to check node on the target check node comprises:

sequentially taking variable nodes connected to the target check node as target variable nodes;

Acquire a most recently updated check node other than the target check node connected to the target variable node as a first check node, calculate the confidence from the first check node to the target check node, and obtain a decoding decision value of the target variable node;

The updated verification confidence of the target verification node is recursively calculated until the confidence update of all information transmitted through the variable nodes is completed.
The method of claim 4, wherein the calculating the confidence from the first check node to the target check node to obtain the decoding decision value of the target variable node comprises:

Obtaining update information from the first check node to the target variable node according to the check confidence of the first check node and the external information of the target variable node;

Calculate updated external information of the target variable node according to the external information of the target variable node, the updated information from the first check node to the target variable node, and the information from the target check node to the target variable node;

Calculate updated posterior information of the target variable node according to the updated information and the external information of the target variable node;

A decoding decision is made according to the updated a posteriori information of the target variable node. If the updated a posteriori information of the target variable node is greater than or equal to 0, the decoding decision value of the target variable node is 0; otherwise, the decoding decision value of the target variable node is 1.
The method of claim 5, wherein the recursive calculation of the updated verification confidence of the target verification node comprises:

The verification confidence of the target verification node and the updated external information of the target variable node are multiplied to obtain the updated information of the target variable node external information to the target verification node as the updated verification confidence of the target verification node.
The method of claim 5, wherein the decoding decision result includes a decoding decision value of the target variable node, and the verification based on the decoding decision result includes:

If the decoding judgment result satisfies the verification equation, the verification is passed;

If the decoding judgment result does not satisfy the verification equation, the verification fails;

Wherein, the verification equation is expressed as:

in,
represents the decoding decision value, and HT represents the transposed form of the LDPC code check matrix.
The method according to claim 1, wherein after the verification is performed according to the decoding decision result, the method further comprises:

If the verification fails and the number of iterations reaches a preset number of iterations, decoding is stopped and a decoding failure is output.
An LDPC decoding device based on verification confidence, comprising:

An initialization module, used for obtaining a check node and a variable node of an LDPC code, initializing the check node and the variable node, and initializing the number of iterations to 0;

An iterative decoding module, used for performing iterative decoding of the LDPC code to verify the confidence, obtain a decoding decision result, and increase the number of iterations by one;

A verification module, used for performing verification according to the decoding judgment result;

The output module is used to end the decoding if the verification is passed and output the decoding judgment result as the decoding result; if the verification is not passed and the number of iterations does not reach the preset number of iterations, repeatedly call the iterative decoding module and the verification module until the verification is passed.
The apparatus according to claim 9, wherein the initialization module is used to:

Initializing the verification confidence of the verification node to infinity;

Initializing the external information of the variable node as channel input soft information;

Initialize the information from the check node to the variable node to 0.
The apparatus of claim 10, wherein the iterative decoding module is configured to:

The verification confidence of the check nodes is updated in sequence as the target check nodes until the update of the verification confidence of all the check nodes is completed, and the decoding judgment result is obtained. The update of the verification confidence of the target check node is completed by updating the information from the check node to the check node of the target check node.
The apparatus of claim 11, wherein the iterative decoding module is configured to:

sequentially taking variable nodes connected to the target check node as target variable nodes;

Acquire a most recently updated check node other than the target check node connected to the target variable node as a first check node, calculate the confidence from the first check node to the target check node, and obtain a decoding decision value of the target variable node;

The updated verification confidence of the target verification node is recursively calculated until the confidence update of all information transmitted through the variable nodes is completed.
The apparatus of claim 12, wherein the iterative decoding module is configured to:

Obtaining update information from the first check node to the target variable node according to the check confidence of the first check node and the external information of the target variable node;

Calculating updated external information of the target variable node according to the external information of the target variable node, the updated information from the first check node to the target variable node, and the information from the target check node to the target variable node;

Calculate updated posterior information of the target variable node according to the updated information and the external information of the target variable node;

A decoding decision is made according to the updated a posteriori information of the target variable node. If the updated a posteriori information of the target variable node is greater than or equal to 0, the decoding decision value of the target variable node is 0; otherwise, the decoding decision value of the target variable node is 1.
The apparatus of claim 13, wherein the iterative decoding module is configured to:

The verification confidence of the target verification node and the updated external information of the target variable node are multiplied to obtain the updated information of the target variable node external information to the target verification node as the updated verification confidence of the target verification node.
The apparatus of claim 13, wherein the decoding decision result comprises a decoding decision value of the target variable node, and the verification module is used to:

If the decoding judgment result satisfies the verification equation, the verification is passed;

If the decoding judgment result does not satisfy the verification equation, the verification fails;

Wherein, the verification equation is expressed as:

in,
represents the decoding decision value, and HT represents the transposed form of the LDPC code check matrix.
The apparatus of claim 9, wherein the output module is used to:

If the verification fails and the number of iterations reaches a preset number of iterations, decoding is stopped and a decoding failure is output.
An electronic device comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the method according to any one of claims 1 to 8 is implemented.
A non-transitory computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.
A computer program product comprises a computer program or instructions, wherein when the computer program or instructions are executed by a processor, the method according to any one of claims 1 to 8 is implemented.