WO2024060682A1 - Procédé et appareil de gestion de mémoire, gestionnaire de mémoire, dispositif et support de stockage - Google Patents

Procédé et appareil de gestion de mémoire, gestionnaire de mémoire, dispositif et support de stockage Download PDF

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Publication number
WO2024060682A1
WO2024060682A1 PCT/CN2023/098519 CN2023098519W WO2024060682A1 WO 2024060682 A1 WO2024060682 A1 WO 2024060682A1 CN 2023098519 W CN2023098519 W CN 2023098519W WO 2024060682 A1 WO2024060682 A1 WO 2024060682A1
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memory
slice
capacity
area
sector
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PCT/CN2023/098519
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English (en)
Chinese (zh)
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WO2024060682A9 (fr
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周华伟
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Oppo广东移动通信有限公司
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Publication of WO2024060682A1 publication Critical patent/WO2024060682A1/fr
Publication of WO2024060682A9 publication Critical patent/WO2024060682A9/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • Embodiments of the present application relate to the field of memory management, and in particular to a memory management method, device, memory manager, equipment and storage medium.
  • the memory usage objects contain different types of business data.
  • memory is divided according to different business types. During the partitioning process, partitioning is performed according to the maximum amount of memory required for each type of business. In this way, when the amount of memory corresponding to various services is accumulated, it may occupy a large amount of memory space and easily cause memory waste.
  • Embodiments of the present application provide a memory management method, device, memory manager, equipment and storage medium.
  • the technical solutions are as follows:
  • embodiments of the present application provide a memory management method, which method includes:
  • the area capacity of the memory area is adjusted, where the interruption frequency refers to the frequency at which the memory usage of the memory area is greater than the memory waterline.
  • the watermark is the threshold value of the memory area that triggers an interrupt.
  • a memory management device which includes:
  • the memory partitioning module is used to determine the memory area according to the business type corresponding to different business data
  • a memory adjustment module is used to adjust the slice capacity of the memory slice based on the interruption frequency of the memory slice during business processing, wherein the interruption frequency refers to the frequency at which the memory usage of the memory slice is greater than the memory waterline, and the memory waterline is the threshold value for the memory slice to trigger an interrupt.
  • an embodiment of the present application provides a memory manager, which includes a programmable logic circuit and/or program instructions, and when the memory manager is running, is used to implement the memory management method described in the above aspects.
  • inventions of the present application provide a computer device.
  • the computer device includes a processor and a memory.
  • the memory includes a memory and a memory manager as described in the above aspect.
  • inventions of the present application provide a computer storage medium.
  • the computer-readable storage medium stores at least one program code.
  • the program code is loaded and executed by a processor to implement the memory as described in the above aspect. management methods.
  • inventions of the present application provide a computer program product or computer program.
  • the computer program product or computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium.
  • the processor of the terminal reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the terminal performs the memory management method provided in various optional implementations of the above aspect.
  • Figure 1 shows a flow chart of a memory management method provided by an exemplary embodiment of the present application
  • Figure 2 shows a schematic diagram of a memory slice provided by an exemplary embodiment of the present application
  • Figure 3 shows a flow chart of a memory management method provided by another exemplary embodiment of the present application.
  • Figure 4 shows a schematic diagram of adjusting the sector capacity of a memory sector provided by an exemplary embodiment of the present application
  • Figure 5 shows a flow chart of a memory management method provided by another exemplary embodiment of the present application.
  • Figure 6 shows a schematic diagram of adjusting the sector capacity of a memory sector provided by another exemplary embodiment of the present application.
  • Figure 7 shows a schematic diagram of adjusting the sector capacity of a memory sector provided by another exemplary embodiment of the present application.
  • Figure 8 shows a structural block diagram of a memory management device provided by an embodiment of the present application.
  • FIG. 9 shows a structural block diagram of a computer device provided by an exemplary embodiment of the present application.
  • the "plurality” mentioned in this article means two or more than two.
  • “And/or” describes the relationship between related objects, indicating that there can be three relationships.
  • a and/or B can mean: A exists alone, A and B exist simultaneously, and B exists alone.
  • the character “/” generally indicates that the related objects are in an "or” relationship.
  • the objects of memory use include business data, and business data of different business types all need to use memory.
  • the maximum amount of memory used is estimated for each type of business, and then the total amount of memory is determined based on the maximum amount of memory used. In this way, after accumulating the maximum amount of memory used by each business type, a large amount of memory space will be occupied. However, in actual use, not all businesses may occupy the maximum amount of memory, resulting in memory waste.
  • a memory management method is provided to realize dynamic management of memory during business processing. According to the actual memory usage, the memory usage corresponding to different services can be adjusted in real time to save memory usage. .
  • the method provided by the embodiment of the present application can be applied to computer equipment.
  • the computer device may be a mobile terminal device such as a smartphone, a tablet computer, or a laptop computer, or may be a desktop computer, a projection computer, or other devices, which are not limited in the embodiments of the present application.
  • Figure 1 shows a flow chart of a memory management method provided by an exemplary embodiment of the present application.
  • This embodiment takes the method being executed by the memory manager in the computer device as an example to illustrate.
  • the process includes the following steps:
  • Step 101 Determine the memory area according to the service types corresponding to different service data.
  • the memory block is divided into different slices to store different types of business data. Therefore, in one possible implementation, the memory manager can perform preliminary partitioning of the memory to obtain different memory partitions. Different memory areas are used to store business data of different business types.
  • the memory manager can evenly divide the memory to obtain memory areas used to store business data corresponding to each business type.
  • areas can be divided according to the characteristics of different business types. When dividing, memory areas with larger capacity can be divided for commonly used services, and memory areas with smaller capacity can be divided for infrequently used services.
  • the first memory slice 201 is used to store business data of business type 1
  • the second memory slice 202 is used to store business data of business type 2
  • the third memory slice 203 is used to store business data of business type 3.
  • Step 102 Adjust the memory area capacity based on the interruption frequency of the memory area during business processing.
  • the interruption frequency refers to the frequency at which the memory usage of the memory area is greater than the memory waterline.
  • the memory waterline is the memory area triggering an interrupt. threshold value.
  • a memory waterline For each memory area, a memory waterline is set.
  • the memory waterline refers to the threshold of the memory area that triggers an interrupt. value.
  • the memory waterline can be the maximum block capacity of the memory block, or it can be an intermediate value of the block capacities of the memory block, that is, it can be smaller than the maximum block capacity. This embodiment does not limit this.
  • the memory sector capacity is adjusted according to the interrupt frequency of the memory sector to reduce the probability of frequent interrupt triggering.
  • the memory manager counts the interrupt frequency of each memory area. When an interrupt is triggered, the corresponding interrupt frequency is updated.
  • the area capacity of the memory area is adjusted based on the interrupt frequency of each memory area.
  • the memory manager when the interrupt frequency is high, can increase the area capacity of the corresponding memory area, so that the maximum amount of memory allowed to be used by the corresponding memory area increases accordingly, which can effectively reduce the interrupt frequency.
  • the total memory capacity remains unchanged. Therefore, when the slice capacity of a memory slice is increased, the slice capacity of another memory slice is correspondingly reduced.
  • the interrupt frequency when the interrupt frequency is low, it indicates that the memory usage of the corresponding memory section may be low. Therefore, the capacity of the memory section with low interrupt frequency can be reduced to improve the memory usage.
  • the area capacity of each memory area is dynamically adjusted according to the actual usage of the memory areas during business processing.
  • the memory usage corresponding to different businesses is different. There may be businesses with larger memory requirements. Correspondingly, there are also businesses with smaller memory requirements. Therefore, by reasonably adjusting the memory areas corresponding to different businesses capacity, which can improve memory usage and avoid memory waste.
  • the memory manager in the computer device first determines the memory area for storing different service data based on the service types corresponding to the different service data. Afterwards, the capacity of each memory area can be dynamically adjusted according to the frequency when the memory usage is greater than the memory waterline during business processing. This can increase the area capacity of memory areas with higher interrupt frequency and reduce the area capacity of memory areas with lower interrupt frequency.
  • the shard capacity of the shard Compared with the method in the related art of estimating the business to maximize the use of memory and planning the memory capacity, in the embodiment of the present application, through the dynamic memory management mechanism, the capacity of the memory sections corresponding to different services can be reasonably adjusted, thereby improving the memory usage. Helps save memory space. And because the area capacity is adjusted based on the interrupt frequency, the frequent triggering of interrupts can be reduced, which helps to reduce power consumption and improve the efficiency of batch processing of business data.
  • adjust the memory area capacity based on the interrupt frequency of the memory area during business processing including:
  • the memory slice is determined as the second memory slice, and the first frequency threshold is greater than the second frequency threshold;
  • increasing the slice capacity of the first memory slice and reducing the slice capacity of the second memory slice include:
  • the sector capacity of the first memory sector is increased, and the sector capacity of the second memory sector is reduced.
  • the adjustment sequence indicated by the minimum movement path adjust the first start address or the first end address of the first memory area. After the address adjustment, the distance between the first start address and the first end address increases;
  • the second start address or the second end address of the second memory area is adjusted, and the distance between the adjusted second start address and the second end address is reduced.
  • determine the minimum movement path including:
  • the movement path corresponding to the smallest number among the number of patches is determined as the minimum movement path.
  • the method before increasing the slice capacity of the first memory slice and reducing the slice capacity of the second memory slice, the method further includes:
  • Reduce the area capacity of the second memory area including:
  • increase the sector capacity of the first memory sector and reduce the sector capacity of the second memory sector including:
  • the amount of memory units is the number of the smallest memory units in the memory node
  • increasing the slice capacity of the first memory slice and reducing the slice capacity of the second memory slice include:
  • the business unit size refers to the number of units of the smallest memory unit processed at a time during business processing
  • the memory adjustment granularity refers to the baseline number of the minimum memory units adjusted during the area capacity adjustment process.
  • the adjusted area capacity is an integer multiple of the memory adjustment granularity
  • the slice capacity of the first memory slice is increased, and the slice capacity of the second memory slice is reduced.
  • the method before determining the memory area according to the service types corresponding to different service data, the method also includes:
  • the memory node is divided into slices to obtain memory slices corresponding to different service types.
  • the service usage frequency is positively correlated with the slice capacity of the memory slice.
  • the processing time for each data node to process the received data is determined.
  • the data node refers to the node that processes the memory node data.
  • the first data rate refers to the rate at which the data node receives data.
  • the second data rate It refers to the rate at which data nodes process data;
  • the memory is divided into nodes to obtain memory nodes.
  • the method before adjusting the memory area capacity based on the interrupt frequency of the memory area during business processing, the method also includes:
  • the interrupt frequency statistics table stores the interrupt frequency of the memory area corresponding to each business type. The interrupt frequency is updated when the interrupt is triggered.
  • data may need to be moved from one node to another node for processing.
  • the memory can be divided into different memory nodes, and then the memory nodes can be divided into slices to obtain different memory slices.
  • preliminary divisions can also be made based on the frequency of business use, and a preliminary and reasonable planning of the memory can be made. Exemplary embodiments will be described below.
  • FIG. 3 shows a flow chart of a memory management method provided by another exemplary embodiment of the present application.
  • This embodiment takes the method executed by the memory manager in the computer device as an example to illustrate. The process includes the following steps:
  • Step 301 The memory is divided into nodes to obtain memory nodes. There is memory migration between different memory nodes.
  • the memory manager first divides the memory into nodes to obtain different memory nodes.
  • the memory manager divides the nodes according to whether memory migration is performed on the processed data. When memory migration is required, memory nodes need to be set up to store the moved data. That is, there is memory movement between different memory nodes.
  • the physical layer When the physical layer receives data from the network side, it will perform a series of data processing on the physical layer. After the processing is completed, the data will be moved to the protocol layer, and each processing layer in the protocol layer will perform a series of processing.
  • the data in the memory corresponding to the physical layer needs to be moved to the memory corresponding to the protocol layer, that is, there is memory movement. Therefore, the physical layer and the protocol layer each correspond to a memory node.
  • the protocol layer contains various processing layers such as MAC/RLC/PDCP/SDAP, and each processing layer in the protocol layer can access data in the same memory node for data processing. Therefore, there is no need for each processing layer in the protocol layer to process data.
  • the protocol layer can be uniformly regarded as a node, that is, it only corresponds to one memory node.
  • the memory manager can determine the memory capacity required by each memory node, and then divide the memory into nodes based on the memory capacity required by each memory node. After partitioning, the memory capacity of each memory node remains unchanged.
  • the method of dividing the memory into nodes may include steps 301a-301c (not shown in the figure):
  • Step 301a based on the first data rate and the second data rate, determine the processing time for each data node to process the received data.
  • the data node refers to the node that processes the memory node data.
  • the first data rate refers to the rate at which the data node receives data. 2.
  • Data rate refers to the rate at which data nodes process data.
  • the memory manager divides the memory, it first determines the required content capacity corresponding to the memory node, and then divides the memory nodes to obtain each memory node based on the memory capacity. For each memory node, there is a data node for processing the data therein.
  • the memory capacity can be calculated based on the processing time of each data node processing data in the memory node. Among them, the processing time of the data node to process the received data refers to the unit time required to process the unit data amount of data.
  • the processing time is longer and the amount of memory required is larger.
  • the rate of receiving data is the same as or slower than the rate of processing data, the data can be processed in time and the processing time is shorter. Therefore, the amount of memory required is also smaller. That is, the processing time can be determined based on the ratio of the rate at which the data node receives data (the first data rate) and the rate at which the data node processes data (the second data rate), so that the content capacity can be determined based on the processing time.
  • the data rate supported by the protocol layer that is, the rate of receiving data
  • the data processing rate of the CPU is 4G/s
  • the data processing rate of the CPU The required processing time is 2s.
  • Step 301b Determine the memory capacity required for each data node based on the processing time and the first data rate.
  • the product of the processing time and the first data rate of the received data can be determined as the memory capacity required by each data node.
  • the required memory capacity is r*t.
  • the data node is a protocol layer
  • the data rate supported by the protocol layer is 8G/s
  • the processing time required by the CPU to process data is 2s
  • the required memory capacity is 2s*8G/s.
  • Step 301c Based on the memory capacity required by each data node, the memory is divided into nodes to obtain memory nodes.
  • the memory manager After determining the memory capacity required by each data node, the memory manager divides the memory according to the content capacity required by each node to obtain each memory node. That is, based on the actual data processing capabilities of each node, the memory capacity is determined, the nodes are divided, and the memory usage is maximized.
  • Step 302 Based on the service usage frequency of the service type, divide the memory node into slices to obtain memory slices corresponding to different service types.
  • the service usage frequency has a positive correlation with the slice capacity of the memory slice.
  • the memory manager divides the memory slices.
  • the terminal can count the service usage frequencies of different service types, thereby dividing the memory nodes into slices according to the service usage frequencies. The higher the service usage frequency, the memory slices with larger slice capacity can be allocated.
  • the services can be sorted according to the service usage frequency, and the proportion of the corresponding memory slices can be determined according to the sorted order of service types.
  • the memory manager can pre-set the memory area proportions corresponding to different order business types, so as to divide the memory nodes into areas according to the memory area proportions.
  • the memory manager After dividing each memory area, the memory manager will set up a memory description table and memory management table for each memory area to facilitate the management of the memory area.
  • Description_i represents the memory description information of the i-th business unit in the memory area, including the starting address, size, etc.
  • the business unit refers to the unit consisting of the smallest memory unit that can be processed each time during the business processing process.
  • Business units of different business types have different sizes of business units, that is, for different business types, the number of minimum memory units included in a business unit is different. For example, business type 1 uses 3 minimum memory units to form a business unit, while business type 2 uses 2 minimum memory units to form a business unit.
  • the memory management table is shown in Table 3:
  • In_data_base_address represents the starting address of the memory slice
  • In_total_depth represents the slice capacity of the memory slice
  • In_filled_depth represents the used slice capacity (the number of stored business units)
  • In_read_pointer represents the pointer position of the data to be processed
  • In_write_pointer represents the location of the stored data.
  • Pointer position In_full means the memory is full
  • In_empty indicates that the memory is empty (that is, there is no stored data)
  • Watermark_threshold indicates the threshold value of the memory waterline that triggers processing interruption after the memory is used to a certain amount
  • enable indicates that the memory is turned on.
  • Step 303 Read the interrupt frequency of the memory area from the interrupt frequency statistics table.
  • the interrupt frequency statistics table stores the interrupt frequency of the memory area corresponding to each service type. The interrupt frequency is updated when the interrupt is triggered.
  • the memory manager in addition to setting the above-mentioned memory description table and memory management table, the memory manager is also provided with an interrupt frequency statistical table corresponding to the memory node. As shown in Table 4:
  • InterruptFrequency_i represents the interrupt frequency of interrupts triggered by memory area i corresponding to business type i.
  • the memory manager counts the frequency of interrupts triggered by each memory area and updates the interrupt frequency in the frequency statistics table in real time.
  • the memory manager can obtain the interrupt frequency in real time, so as to adjust the area capacity of the memory area according to changes in the interrupt frequency.
  • Step 304 when the interrupt frequency of the memory slice is greater than the first frequency threshold, determine the memory slice as the first memory slice.
  • a preset first frequency threshold is stored in the memory manager.
  • the interrupt frequency of the memory area is greater than the first frequency threshold, it means that the memory usage in the memory area exceeds the memory waterline more times. Therefore, the area capacity of the corresponding memory area needs to be increased. It can be determined as the first memory area, and the first memory area is the memory area to be increased.
  • the first frequency threshold can be stored in the interrupt frequency statistics table. As shown in Table 4, ThresholdH is stored, which represents the high interrupt frequency threshold, that is, the first frequency threshold.
  • Step 305 When the interrupt frequency of the memory slice is less than the second frequency threshold, determine the memory slice as the second memory slice, and the first frequency threshold is greater than the second frequency threshold.
  • the memory manager After determining the first memory area, the memory manager also needs to determine a second memory area that can be reduced to avoid using less memory but occupying a larger area capacity, causing an impact on the corresponding business processing process.
  • the memory manager stores a preset second frequency threshold, which is a low threshold for interrupt frequency and is lower than the first frequency threshold.
  • a preset second frequency threshold which is a low threshold for interrupt frequency and is lower than the first frequency threshold.
  • the second frequency threshold can be stored in the interrupt frequency statistics table. As shown in Table 4, ThresholdL is stored, indicating the low threshold of interrupt frequency, that is, the second frequency threshold.
  • Step 306 Increase the sector capacity of the first memory sector and decrease the sector capacity of the second memory sector.
  • the memory manager when there is a first memory slice and a second memory slice in the memory node, the memory manager adjusts the slice capacity of the memory slice to ensure that when changing the slice capacity of the memory slice, avoid Impact on other business processes.
  • the memory manager can increase the slice capacity of the first memory slice and decrease the slice capacity of the second memory slice.
  • the increased slice capacity is the same as the reduced slice capacity.
  • the required memory capacity is determined based on the node receiving data rate and processing data rate, so that different nodes are obtained according to the memory capacity required by each node.
  • the maximum memory capacity can be planned according to the actual data processing capability of the node, thereby improving memory utilization.
  • preliminary division is carried out according to the frequency of service use, and larger memory areas are divided for commonly used services, which can reduce the subsequent frequent area capacity adjustment process.
  • the memory area capacity is adjusted to increase the capacity of active services by reducing the memory area for inactive services.
  • the memory area capacity can keep the memory capacity of the memory node unchanged, and only adjust the proportion of memory areas for different business types, which can reduce the impact on the business processing process.
  • the area capacity of the first memory area and the second memory area can be directly adjusted; In another possible situation, there may be other memory areas. In this case, other memory areas need to be moved to adjust the memory area capacity. Exemplary embodiments will be described below.
  • step 306 may include the following steps:
  • Step 306a If there is no third memory area between the first memory area and the second memory area, adjust the adjacent start address and end address between the first memory area and the second memory area.
  • the distance between the first start address and the first end address of the first memory area increases, and the distance between the second start address and the second end address of the second memory area decreases.
  • the memory manager may first determine whether there is a third memory area between the first memory area and the second memory area. If there is no third memory area, In the case of memory slices, only adjacent addresses need to be adjusted.
  • the first starting address of the first memory slice and the second ending address of the second memory slice can be adjusted, and the ending address (first ending address) of the first memory slice and the starting address (second starting address) of the second memory slice remain unchanged, thereby achieving the purpose of increasing the first memory slice and reducing the second memory slice.
  • the second starting address and the second ending address of the second memory slice are 1-20, and the first starting address and the first ending address of the first memory slice are 21-50.
  • the second ending address and the first starting address can be reduced at the same time, and the adjusted second starting address and the second ending address of the second memory slice are 1-15, and the first starting address and the first ending address of the first memory slice are 16-50, and the first ending address of the first memory slice and the second starting address of the second memory slice remain unchanged, thereby increasing the slice capacity of the first memory slice and reducing the slice capacity of the second memory slice.
  • the first end address of the first memory slice and the second start address of the second memory slice can be adjusted.
  • the first end address and the second start address can be increased at the same time, and the first start address and the second end address can be kept unchanged, thereby increasing the slice capacity of the first memory slice and reducing the slice capacity of the second memory slice.
  • Step 306b When there is a third memory slice between the first memory slice and the second memory slice, determine the minimum migration path.
  • the minimum migration path has the smallest number of third memory slices.
  • third memory areas there may be other third memory areas between the first memory area and the second memory area.
  • the third memory area needs to be moved, that is, adjusted The starting address of the third memory area (third starting address) and the end address of the third memory area (third end address).
  • determining the minimum movement path may include the following steps:
  • Step 1 Determine the number of slices in the third memory slice under different migration paths.
  • the memory manager may determine the number of third memory slices that need to be passed through under various migration paths.
  • the memory block corresponding to the memory node when the memory block corresponding to the memory node is 1-100, it includes memory area one (1-10), memory area two (11-40), memory area three (41-60), and memory area four. (61-80), memory area five (81-90) and memory area six (91-100).
  • the first memory slice is memory slice 2, and the second memory slice is memory slice 4.
  • the migration order may be memory slice 2, memory slice 3, memory slice 4, and the number of slices in the third memory slice is 1; and under the second migration path, the migration order may be memory slice 2, memory slice 1, memory slice 6, memory slice 5, and memory slice 4, and the number of slices in the third memory slice is 3.
  • Step 2 Determine the movement path corresponding to the smallest number among the number of patches as the minimum movement path.
  • the memory manager can determine the moving path corresponding to the smallest number of the number of slices as the minimum moving path, so as to adjust the memory slices with the least slice adjustment amount and improve the adjustment efficiency.
  • Step 306c Based on the minimum migration path, increase the sector capacity of the first memory sector and decrease the sector capacity of the second memory sector.
  • this method may include the following steps:
  • Step 1 Adjust the first start address or the first end address of the first memory area according to the adjustment sequence indicated by the minimum movement path. After the address adjustment, the distance between the first start address and the first end address increases.
  • the memory manager may adjust the first memory area, the third memory area, and the second memory area in sequence according to the minimum movement path.
  • the first memory area can be used as the starting point for adjustment, or the second memory area can be used as the starting point for adjustment. This embodiment does not limit this.
  • one of the first start address or the first end address of the first memory area remains unchanged, and the second start address or the first end address of the second memory area remains unchanged.
  • One of the two end addresses remains unchanged.
  • the second end address of the second memory area remains unchanged.
  • the second start address of the second memory area remains unchanged.
  • Step 2 Adjust the third start address and the third end address of the third memory area. The distance between the adjusted third start address and the third end address remains unchanged.
  • the area capacity of the third memory area remains unchanged. Therefore, it is necessary to adjust the third start address and the third end address of the third memory area.
  • the adjusted third memory area The spacing between the starting address and the third ending address remains unchanged.
  • the first memory slice area may be used as the starting point, or the second memory slice area may be used as the starting point.
  • the first memory slice area is used as the starting point, after the adjustment of the first memory slice area is completed, the third starting address and the third ending address of the third memory slice area are adjusted in sequence, and then the second memory slice area is adjusted.
  • the second memory slice area is used as the starting point, after the adjustment of the second memory slice area is completed, the third starting address and the third ending address of the third memory slice area are adjusted in sequence.
  • Step 3 Adjust the second start address or the second end address of the second memory area, and the distance between the adjusted second start address and the second end address is reduced.
  • the address of the first memory area is 11-40
  • the address of the third memory area is 41-60
  • the address of the second memory area is 61-80
  • the adjusted addresses of each memory area are the first memory area (11-45), the third memory area (46-65), and the second memory area (66-80).
  • the memory manager counts at least two second memory areas, that is, there are at least two shrinkable memory areas. At this time, in order to reduce the adjustment amount, one second memory area may be selected first among at least two second memory areas based on the minimum movement path between the areas.
  • the at least two second memory sectors are the same as the first memory sector.
  • the minimum movement path between memory regions it is determined that the at least two second memory sectors are the same as the first memory sector.
  • the memory manager determines that at least two second memory areas are obtained, it determines the minimum migration path between each second memory area and the first memory area, and then reduces the minimum migration path corresponding to the shortest path.
  • the second memory area determines the minimum migration path between each second memory area and the first memory area, and then reduces the minimum migration path corresponding to the shortest path.
  • the second memory area B can be determined as the memory area to be reduced.
  • the memory manager reduces the memory capacity of the second memory area B.
  • the memory manager can select the minimum migration path for adjustment, thereby improving Adjust efficiency. And when there are at least two second memory areas, one of the second memory areas can be selected based on the minimum movement path between each second memory area and the first memory area, thereby further improving the adjustment efficiency and reducing the time required for business processing. Impact.
  • step 306 may include the following steps:
  • Step 1 determine the amount of memory units required to be added for the business type corresponding to the first memory slice, where the amount of memory units is the number of minimum memory units in the memory node.
  • the memory manager first determines the amount of memory units that need to be added to the first memory area corresponding to the service type, that is, the minimum number of memory units that needs to be added.
  • the amount of memory units that need to be added can be determined based on a fixed ratio, for example, adding 5% to the current sector capacity of the first memory sector, and determining 5% of the sector capacity of the first sector as the increase. Amount of memory units.
  • the increased amount of memory units can also be dynamically adjusted according to the number of times the interrupt frequency is greater than the first frequency threshold.
  • the interrupt frequency is greater than the first frequency threshold, the more memory units are added, until the upper limit of memory unit increase is reached.
  • the first interrupt frequency is greater than the first frequency threshold, it can be increased by 5%.
  • the second interrupt frequency is greater than the first frequency threshold, it can be increased by 8%, until the memory unit increase limit is 20%.
  • Step two increase the area capacity of the first memory area based on the amount of memory units.
  • the memory manager increases the area capacity of the first memory area according to the required amount of additional memory units.
  • the minimum number of memory units included in the first memory area after adjustment is the minimum number of memory units included in the first memory area before adjustment. plus the amount of additional memory units required.
  • Step 3 Reduce the area capacity of the first memory area based on the amount of memory units.
  • the memory manager reduces the capacity of the second memory area according to the required amount of memory units.
  • the minimum number of memory units included in the adjusted second memory area is the minimum number of memory units included in the second memory area before adjustment. The difference between the number and the amount of memory cells required to be reduced.
  • the area capacity is adjusted directly according to the amount of memory units required to increase the business type.
  • the business unit size of the first service corresponding to the first memory area is 3 minimum memory units
  • the second memory area corresponds to The business unit size of the second business is 2 minimum memory units.
  • 9 minimum memory units need to be added. If the second business decreases 9 minimum memory units, then There will be a single minimum memory unit in the second memory area, which cannot form the business unit of the second business. Memory fragments will appear in the second memory area, causing a waste of memory. Therefore, in another possible implementation, the memory adjustment granularity can be set, and the adjustment is performed based on the memory adjustment granularity.
  • This method may include the following steps:
  • Step 1 Obtain the business unit size of each memory area.
  • the business unit size refers to the minimum number of memory units processed at a time during business processing.
  • the memory manager can obtain the business unit size corresponding to the service type of each memory area in the memory node, thereby determining the memory adjustment granularity based on the business unit size.
  • the memory adjustment granularity refers to the adjustment base unit during the area capacity adjustment process, that is, the base number of the minimum memory unit to be adjusted.
  • the final adjusted area capacity is an integer multiple of the memory adjustment granularity.
  • the memory manager can obtain the business unit size corresponding to the service type of each memory area in the migration path (including the business unit sizes corresponding to the first memory area, the second memory area, and the third memory area), Thus, the memory adjustment granularity is determined based on the business unit size of the memory area being adjusted in the migration path.
  • Step 2 Determine the lowest common multiple of the sizes of each business unit as the memory adjustment granularity.
  • the memory adjustment granularity refers to the baseline number of the minimum memory units adjusted during the slice capacity adjustment process.
  • the adjusted slice capacity is an integer multiple of the memory adjustment granularity.
  • the memory manager may determine the least common multiple of the size of each business unit as the memory adjustment granularity. For example, when the business unit size includes 2 and 3, 6 can be determined as the memory adjustment granularity. During the area capacity adjustment process, the six minimum memory units need to be used as the base unit for adjustment.
  • Step 3 Based on the memory adjustment granularity, increase the slice capacity of the first memory slice and decrease the slice capacity of the second memory slice.
  • the memory manager can increase the slice capacity of the first memory slice and decrease the slice capacity of the second memory slice based on the memory adjustment granularity.
  • the amount of memory units to be increased can be determined first.
  • the area capacity can be adjusted directly based on the increased amount of memory units. For example, if the memory adjustment granularity is 6 and the amount of memory units to be increased is 12, the area capacity can be adjusted based on 12.
  • an integer multiple of the memory adjustment granularity that is greater than the amount of memory units needs to be determined as the adjusted slice capacity. For example, when the amount of memory units to be increased is 15, the capacity of the adjustment area can be determined to be 18.
  • the memory manager increases the minimum memory units of the first memory area by 18 and decreases the memory units of the second memory area by 18. .
  • the memory adjustment granularity is the least common multiple of the size of each business unit, when different businesses correspond to different sizes of business units, the generation of memory fragmentation can be effectively avoided.
  • the memory adjustment granularity is determined based on the size of each business unit, and the memory area capacity is adjusted based on the memory adjustment granularity, which can avoid the generation of memory fragments during the adjustment process and avoid memory waste.
  • FIG. 8 shows a structural block diagram of a memory management device provided by an embodiment of the present application.
  • the device may include:
  • the memory division module 801 is used to determine the memory area according to the service types corresponding to different service data;
  • the memory adjustment module 802 is used to adjust the slice capacity of the memory slice based on the interruption frequency of the memory slice during business processing, wherein the interruption frequency refers to the frequency at which the memory usage of the memory slice is greater than the memory waterline, and the memory waterline is the threshold value for triggering an interruption of the memory slice.
  • the memory adjustment module 802 is also used to:
  • the interruption frequency of the memory slice is less than a second frequency threshold, determining the memory slice as a second memory slice, and the first frequency threshold is greater than the second frequency threshold;
  • the memory adjustment module 802 is also used to:
  • the memory adjustment module 802 is also used to:
  • the sector capacity of the first memory sector is increased, and the sector capacity of the second memory sector is reduced.
  • the memory adjustment module 802 is also used to:
  • the first starting address or the first ending address of the first memory slice is adjusted, and the distance between the first starting address and the first ending address is increased after the address adjustment;
  • the second start address or the second end address of the second memory area is adjusted, and the distance between the adjusted second start address and the second end address is reduced.
  • the memory adjustment module 802 is also used to:
  • the movement path corresponding to the smallest number among the number of patches is determined as the minimum movement path.
  • the memory adjustment module 802 is also used to:
  • the second memory area corresponding to the minimum migration path with the shortest path is reduced.
  • the memory adjustment module 802 is also used to:
  • the sector capacity of the first memory sector is reduced.
  • the memory adjustment module 802 is also used to:
  • the business unit size refers to the number of minimum memory units that are processed at a single time during business processing
  • the least common multiple of the size of each business unit is determined as the memory adjustment granularity.
  • the memory adjustment granularity refers to the baseline number of the minimum memory unit adjusted during the area capacity adjustment process.
  • the adjusted area capacity is an integer of the memory adjustment granularity. times;
  • the slice capacity of the first memory slice is increased, and the slice capacity of the second memory slice is reduced.
  • the memory partition module 801 is also used to:
  • the memory node is divided into slices to obtain memory slices corresponding to different service types, wherein the service usage frequency is positively correlated with the slice capacity of the memory slice.
  • the memory partition module 801 is also used to:
  • the processing time for each data node to process the received data is determined.
  • the data node refers to the node that processes the memory node data.
  • the first data rate refers to the data node's received data.
  • Rate, the second data rate refers to the rate at which the data node processes data;
  • the memory is divided into nodes to obtain the memory nodes.
  • the device also includes:
  • the frequency acquisition module is used to read the interruption frequency of the memory area from the interruption frequency statistics table, wherein the interruption frequency statistics table stores the interruption frequency of the memory area corresponding to each service type, and the interruption frequency is updated when the interruption is triggered.
  • the memory manager in the computer device first determines the memory area corresponding to the different service data based on the service types corresponding to the different service data. Afterwards, the capacity of each memory area can be dynamically adjusted according to the frequency when the memory usage is greater than the memory waterline during business processing. This can increase the area capacity of memory areas with higher interrupt frequency and reduce the area capacity of memory areas with lower interrupt frequency.
  • the shard capacity of the shard Compared with the method in the related art of estimating the business to maximize the use of memory and planning the memory capacity, in the embodiment of the present application, through the dynamic memory management mechanism, the capacity of the memory sections corresponding to different business types can be reasonably adjusted, thereby improving the memory usage. , helps save memory space. And because the area capacity is adjusted based on the interrupt frequency, the frequent triggering of interrupts can be reduced, which helps to reduce power consumption and improve the efficiency of batch processing of business data.
  • the device provided in the above embodiments is only exemplified by the division of the above functional modules.
  • the above function allocation can be completed by different functional modules as needed, that is, the internal structure of the device is divided into Different functional modules to complete all or part of the functions described above.
  • the apparatus and method embodiments provided in the above embodiments belong to the same concept, and the implementation process can be found in the method embodiments, which will not be described again here.
  • FIG. 9 shows a structural block diagram of a computer device 900 provided by an exemplary embodiment of the present application.
  • the computer device 900 in this application may include one or more of the following components: a processor 910 and a memory 920.
  • Processor 910 may include one or more processing cores.
  • the processor 910 uses various interfaces and lines to connect various parts of the entire electronic device 900, and executes by running or executing instructions, programs, code sets or instruction sets stored in the memory 920, and calling data stored in the memory 920.
  • the processor 910 may use at least one of digital signal processing (Digital Signal Processing, DSP), field-programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). implemented in hardware form.
  • the processor 910 may integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processor (Graphics Processing Unit, GPU), a modem, etc.
  • CPU Central Processing Unit
  • GPU Graphics Processing Unit
  • modem etc.
  • the CPU mainly handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content that needs to be displayed on the display; and the modem is used to handle wireless communications. It can be understood that the above modem may not be integrated into the processor 910 and may be implemented solely through a baseband chip.
  • the memory 920 may include a memory 921 and a memory manager 922.
  • the memory 921 includes Random Access Memory (RAM), and may also include Read-Only Memory (Read-Only Memory, ROM).
  • the memory 920 includes non-transitory computer-readable storage medium.
  • Memory 921 may be used to store instructions, programs, codes, sets of codes, or sets of instructions.
  • the memory 921 may include a program storage area and a data storage area, where the program storage area may store instructions for implementing the operating system and instructions for implementing at least one function (such as touch function, sound playback function, image playback function, etc.) , instructions for implementing each of the above method embodiments, etc.
  • the operating system can be an Android system (including an in-depth development system based on the Android system), an IOS system developed by Apple (including an in-depth development system based on the IOS system) or other systems.
  • the storage data area can also store data created during use of the computer device 900 (such as phone book, audio and video data, chat record data), etc.
  • the memory 920 may also include a memory manager 922, which may include programmable logic circuits and/or programs. Program instructions are used to manage the memory of the computer device 900.
  • the structure of the computer device 900 shown in the above figures does not constitute a limitation on the computer device 900.
  • the computer device may include more or fewer components than shown in the figures, or Combining certain parts, or different arrangements of parts.
  • the computer device 900 also includes radio frequency circuits, camera components, sensors, audio circuits, wireless fidelity (Wireless Fidelity, WiFi) components, power supplies, Bluetooth components and other components, which will not be described again here.
  • This application also provides a computer-readable storage medium.
  • the readable storage medium stores at least one instruction, at least one program, a code set or an instruction set.
  • the at least one instruction, the at least one program, the The code set or instruction set is loaded and executed by the processor to implement the memory management method provided by any of the above exemplary embodiments.
  • Embodiments of the present application provide a computer program product or computer program.
  • the computer program product or computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium.
  • the processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the memory management method provided in the above optional implementation.
  • Computer-readable media includes computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
  • Storage media can be any available media that can be accessed by a general purpose or special purpose computer.

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Abstract

La présente invention se rapporte au domaine de la gestion de mémoire. Sont divulgués un procédé et un appareil de gestion de mémoire, un gestionnaire de mémoire, ainsi qu'un dispositif et un support de stockage, ledit procédé consistant à : selon des types de service correspondant à différentes données de service, déterminer une zone de mémoire (101) ; et d'après la fréquence d'interruption de la zone de mémoire dans une procédure de traitement de service, ajuster la capacité de la zone de mémoire, la fréquence d'interruption se référant à une fréquence à laquelle la quantité d'utilisation de mémoire de la zone de mémoire est supérieure à un filigrane de mémoire, et le filigrane de mémoire étant une valeur seuil de la zone de mémoire permettant de déclencher une interruption (102).
PCT/CN2023/098519 2022-09-19 2023-06-06 Procédé et appareil de gestion de mémoire, gestionnaire de mémoire, dispositif et support de stockage WO2024060682A1 (fr)

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CN115421919A (zh) * 2022-09-19 2022-12-02 Oppo广东移动通信有限公司 内存管理方法、装置、内存管理器、设备及存储介质
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