WO2024054283A1 - Système et procédé de transmission du trafic de réseau - Google Patents

Système et procédé de transmission du trafic de réseau Download PDF

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Publication number
WO2024054283A1
WO2024054283A1 PCT/US2023/025820 US2023025820W WO2024054283A1 WO 2024054283 A1 WO2024054283 A1 WO 2024054283A1 US 2023025820 W US2023025820 W US 2023025820W WO 2024054283 A1 WO2024054283 A1 WO 2024054283A1
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WIPO (PCT)
Prior art keywords
circuit
frame
data frames
forwarder
specific information
Prior art date
Application number
PCT/US2023/025820
Other languages
English (en)
Inventor
Kristian Ehlers
Original Assignee
Microchip Technology Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US18/211,310 external-priority patent/US20240089202A1/en
Application filed by Microchip Technology Incorporated filed Critical Microchip Technology Incorporated
Publication of WO2024054283A1 publication Critical patent/WO2024054283A1/fr

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/251Cut-through or wormhole routing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/256Routing or path finding in ATM switching fabrics
    • H04L49/257Cut-through or wormhole routing

Definitions

  • the present disclosure relates to forwarding of traffic in a computer network.
  • network components including but not limited to switches and routers, are tasked with receiving data at their input ports, also termed ingress ports, and forwarding that received data through their output ports, also termed egress ports, and on to the proper destination. This process of sending incoming data on to the appropriate set of destinations is termed forwarding in computer networking.
  • a network component may receive an incoming frame at its ingress port. The frame of data is received in its entirety before a forwarding decision is made. Once the entire frame of data is received and buffered, the network component will compare the Cyclic Redundancy Check (CRC) data included in the frame to determine the correctness of the received data. If the CRC check indicates the data is correct, the data is forwarded to the appropriate Media Access Control (MAC) address.
  • CRC Cyclic Redundancy Check
  • CTF cut-through-forwarding
  • Cut-through forwarding is advantageous in many applications as it provides for low latency forwarding through a network component, and this low latency can be fixed and independent of frame size.
  • Cut-through forwarding may not detect and discard frames exposed to bit-errors before forwarding to the next destination in the network.
  • a first network component may begin to forward the start of a frame before the end of frame is received at its ingress port, forwarding the frame at its egress port to the proper destination at a second network component.
  • This second network component may receive the data frame at its ingress port, and similarly begin to forward the start of the frame before the end of the frame is received at its ingress port, forwarding the frame at its egress port to a third network component.
  • a data frame may be forwarded across many network components in a CTF network. When the end of the frame is received at the first network component, a CRC check may be performed.
  • erroneous data frames may be forwarded to many destinations in the network before errors are detected. Correcting these erroneous data frames increases the complexity of the network and increases latency. Additionally, a bit error in the frame fields used in the forwarding decision may cause data frames to be looped in the network as data frames are continually forwarded to incorrect destinations.
  • a mechanism is needed to prevent excess network traffic and unnecessary looping of data traffic in networks where cut-through forwarding is used.
  • the examples herein enable a device, system and method for low-latency network forwarding eliminating excessive network traffic and unnecessary looping of data.
  • the examples herein enable a device including an edge interface circuit to couple to a network component and to couple to a forwarder circuit.
  • the edge interface circuit receives data frames from the network component, prepends a framespecific information header to the received data frames and forwards the prepended data frames to the forwarder circuit.
  • the edge interface circuit receives data frames from the forwarder circuit, removes duplicate data frames and forwards non-duplicate data frames to the network component.
  • An internal interface circuit couples to an internal network segment and couples to the forwarder circuit, the internal interface circuit receives data frames from the internal network segment and forwards the received data frames to the forwarder circuit.
  • the internal interface circuit receives data frames from the forwarder circuit, removes duplicate data frames and forwards non-duplicate data frames to the internal network segment.
  • the examples herein enable a system including a network.
  • the network includes a plurality of network connected devices.
  • the network connected devices include an edge interface circuit coupled to a network component and coupled to a forwarder circuit, the edge interface circuit receives data frames from the network component, prepends a frame-specific information header to the received data frames and forwards the prepended data frames to the forwarder circuit.
  • the edge interface circuit receives data frames from the forwarder circuit, removes duplicate data frames and forwards non-duplicate data frames to the network component.
  • An internal interface circuit coupled to an internal network segment and coupled to the forwarder circuit, wherein the internal interface circuit receives data frames from the internal network segment and forwards the received data frames to the forwarder circuit.
  • the internal interface circuit receives data frames from the forwarder circuit, removes duplicate data frames and forwards non-duplicate data frames to the internal network segment.
  • the examples herein enable a method including the following operations: receiving a data frame at an edge interface circuit from a network component, generating a frame-specific information header based on the received data frame, prepending the frame-specific information header as a tag onto the received data frame to generate a prepended data frame, forwarding the prepended data frame to a forwarder circuit, receiving a data frame at an edge interface circuit from the forwarder circuit and discarding data frames with a detected error, identifying, based upon contents of a non-transitory memory and the frame-specific information header, duplicate received data frames, removing duplicate received data frames, removing the frame-specific information header from the non-duplicate received data frame to create an updated data frame, forwarding the updated data frame to a network destination through an egress port, receiving a data frame at an internal interface circuit from an internal network segment, forwarding the received data frame to the forwarder circuit, receiving a data frame at an internal interface circuit from the forwarder circuit, identifying, based upon contents of a non-transitory
  • the figures illustrate examples of systems for control of network traffic.
  • FIGURE 1 illustrates one of various examples of a computer network.
  • FIGURE 2 illustrates one of various examples of an edge circuit.
  • FIGURE 3 illustrates a method for control of network traffic.
  • FIGURE 1 illustrates one of various examples of a computer network 100.
  • the example of FIGURE 1 includes network components 110, 130, and 140.
  • Network components 110, 130 and 140 may include, but are not limited to bridges, switches and routers, without limitation. There is no requirement that network components 110, 130 and 140 be of the same type.
  • Internal network segment 150 may include one or more network components, the one or more network components utilizing a CTF protocol.
  • Edge circuits 115, 135, 145 may connect internal network segment 150 to, respectively, network components 110, 130, 140.
  • Cut-through forwarder circuits 151 and 152 of internal network segment 150 may forward data frames between edge circuits 115, 135, 145 using a CTF protocol.
  • Network component 110 may be coupled to internal network segment 150 through edge circuit 115.
  • Edge circuit 115 may include a first edge interface circuit 118 to communicate with network component 110 using a store-and-forward protocol.
  • First edge interface circuit 118 may include at least one ingress port 111 and at least one egress port 112.
  • First edge interface circuit 118 may receive data from network component 110 via ingress port 111.
  • First edge interface circuit may send data to network component 110 via egress port 112.
  • Edge circuit 115 may include one or more internal interface circuits 116, 117 to communicate with cut-through forwarder circuits 151 and 152 of internal network segment 150.
  • FIGURE 1 includes two cut-through forwarder circuits 151 and 152 of internal network segment 150, but this is not intended to be limiting. Other examples may include more cut-through forwarder circuits than those illustrated in FIGURE 1 or may include fewer cut-through forwarder circuits than those illustrated in FIGURE 1.
  • FIGURE 1 The specific configuration of network components and specific paths between network components as illustrated in FIGURE 1 is for illustrative purposes and is not intended to be limiting.
  • Edge circuit 115 may receive a frame of data at first edge interface circuit 118 from network component 110 via ingress port 111.
  • the frame of data received at edge circuit 115 may contain identification information.
  • Edge circuit 115 may include an error detector circuit 172 to detect errors in the received data frame. Error detector circuit 172 may perform a CRC check or other error detection check on the received data frame.
  • Edge circuit 115 may perform a CRC check or other error detection check on the received data frame.
  • Edge circuit 115 may prepend a frame-specific information header to the received data frame to create a prepended data frame.
  • the frame specific information header may be generated by identification circuit 175.
  • Identification circuit 175 may be implemented in hardware or software, or a combination thereof. Identification circuit 175 may be integrated into first edge interface circuit 118, or may be separate component.
  • the frame-specific information header may include the source MAC address for the received data frame.
  • the frame-specific information header may include an identifier associated with the received data frame. This identifier may also be termed a frame number. The identifier or frame number may distinguish a first received data frame, received from a particular MAC address, from a second received data frame received from the same MAC address at an earlier or later point in time.
  • the frame-specific information header may be part of a tag prepended to the received data frame to generate the prepended data frame.
  • the tag may be prepended by tag insertion circuit 176.
  • Tag insertion circuit 176 may be coupled to identification circuit 175, and may be implemented in hardware or software, or a combination thereof.
  • Tag insertion circuit 176 may be integrated into first edge interface circuit 118, or may be a separate component.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to other destinations in the network.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to forwarder circuit 152 of internal network segment 150 via forwarder circuit 113, internal interface circuit 117 and path 162.
  • the prepended data frame with the prepended frame-specific information header may be forwarded by forwarder circuit 113 to forwarder circuit 151 of internal network segment 150 via forwarder circuit 113, internal interface circuit 116 and path 161.
  • Edge circuit 115 may receive a frame of data at internal interface circuit 116 via path 161.
  • the frame of data received at edge circuit 115 may contain identification information.
  • Edge circuit 115 may update portions of the received data frame and forward the updated data frame to network component 110 using a S&F protocol via egress port 112.
  • Edge circuit 115 may include an error detector circuit 172 to detect errors in the received data frame and discard data frames with a detected error. Error detector circuit 172 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded.
  • Edge circuit 115 may read the portion of the received data frame comprising the frame-specific information header. The frame-specific information header may be present at a predetermined location in the received data frame.
  • Edge circuit 115 may perform a lookup operation in cooperation with a Remove Duplicates Table (RDT) 171 in edge circuit 115 to determine if the frame-specific information header in the received data frame matches the frame-specific information header of a previous data frame that has already been forwarded.
  • the frame-specific information header may be stored in RDT 171 in edge circuit 115.
  • the 171 may be a non-transitory memory. If the frame-specific information header of the received data frame is listed in RDT 171, the received data frame may be discarded and not forwarded since it has already been forwarded through egress port 112. The lookup operation and discarding of duplicate data frames may be implemented by a duplicates removal circuit 173. Duplicates removal circuit 173 may be implemented in hardware or software, or a combination thereof. If the frame-specific information header of the received data frame is not listed in RDT 171, the data frame may be termed a non-duplicate data frame, and edge circuit 115 may add the frame-specific information header to RDT 171. After performing the lookup operation, edge circuit 115 may remove the frame-specific information header from the data frame to create an updated data frame.
  • the removal of the frame-specific information header may be implemented by a tag removal circuit 174.
  • Tag removal circuit 174 may be implemented in hardware or software, or a combination thereof.
  • the updated data frame may be forwarded to first edge interface circuit 118 via forwarder circuit 113.
  • the updated data frame may be forwarded to network component 110 via first edge interface circuit 118 at egress port 112.
  • Edge circuit 115 may receive a frame of data at internal interface circuit 117 via path 162.
  • the frame of data received at edge circuit 115 may contain identification information.
  • Edge circuit 115 may update portions of the received data frame and forward the updated data frame to network component 110 using a S&F protocol via egress port 112 in first edge interface circuit 118.
  • Edge circuit 115 may include an error detector circuit 172 to detect errors in the received data frame and discard data frames with a detected error. Error detector circuit
  • Edge circuit 115 may read the portion of the received data frame comprising the frame-specific information header.
  • the frame-specific information header may be present at a predetermined location in the received data frame.
  • Edge circuit 115 may perform a lookup operation in cooperation with RDT 171 to determine if the frame-specific information header matches the frame-specific information header of a previous data frame that has already been forwarded. If the frame-specific information header of the received data frame is listed in RDT 171, the received data frame may be discarded and not forwarded since it has already been forwarded through egress port 112 of first edge interface circuit 118.
  • the lookup operation and discarding of duplicate data frames may be implemented by duplicates removal circuit 173. If the frame-specific information header of the received data frame is not listed in RDT 171, the data frame may be termed a non-duplicate data frame, and edge circuit 115 may add the frame-specific information header to RDT 171. After performing the lookup operation, edge circuit 115 may remove the frame-specific information header from the data frame to create an updated data frame. The removal of the frame-specific information header may be implemented by tag removal circuit 174. The updated data frame may be forwarded to first edge interface circuit 118 via forwarder circuit 113. The updated data frame may be forwarded to network component 110 at egress port 112.
  • Network component 140 may be coupled to edge circuit 145.
  • Edge circuit 145 may include one or more edge interface circuits 148, 149 to communicate with network component 140 using a store-and-forward protocol.
  • First edge interface circuit 148 may communicate with network component 140 via ingress port 141 and egress port 142.
  • Second edge interface circuit 149 may communicate with network component 140 via ingress port 143 and egress port 144.
  • Edge circuit 145 may include one or more internal interface circuits 146, 147 to communicate with other network components in internal network segment 150.
  • Edge circuit 145 may receive a frame of data at first edge interface circuit 148 from network component 140 via ingress port 141.
  • Edge circuit 145 may include an error detector circuit 182 to detect errors in the received data frame. Error detector circuit 182 may perform a CRC check or other error detection check on the received data frame.
  • the frame of data received at edge circuit 145 may contain identification information.
  • Edge circuit 145 may prepend frame-specific information header in the received data frame to create a prepended data frame.
  • the frame-specific information header may be generated by an identification circuit 185 of edge circuit 145.
  • Identification circuit 185 may be implemented in hardware or software, or a combination thereof. Identification circuit 185 may be integrated into first edge interface circuit 148, or may be a separate component.
  • the frame-specific information header may include an identifier associated with the received data frame.
  • the frame-specific information header may be part of a tag prepended to the received data frame to generate a prepended data frame.
  • the tag may be prepended by tag insertion circuit 186 of edge circuit 145.
  • Tag insertion circuit 186 may be coupled to identification circuit 185, and may be implemented in hardware or software, or a combination thereof.
  • the prepended data frame with the prepended framespecific information header may be forwarded to cut-through forwarder circuit 151 of internal network segment 150 via forwarder circuit 174, internal interface circuit 146 and path 166.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to edge circuit 135 via forwarder circuit 174, internal interface circuit 147 and path 164.
  • Edge circuit 145 may receive a frame of data at second edge interface circuit 149 from network component 140 via ingress port 143.
  • Edge circuit 145 may include an error detector circuit 182 to detect errors in the received data frame. Error detector circuit 182 may perform a CRC check or other error detection check on the received data frame.
  • the frame of data received at edge circuit 145 may contain identification information.
  • Edge circuit 145 may prepend a frame-specific information header in the received data frame to create a prepended data frame.
  • the frame-specific information header may be generated by identification circuit 185.
  • Identification circuit 175 may be integrated into second edge interface circuit 149, or may be a separate component.
  • the frame-specific information header may include an identifier associated with the received data frame. The identifier may also be termed a frame number.
  • the identifier or frame number may distinguish a first received data frame, received from a particular MAC address, from a second received data frame received from the same MAC address at an earlier or later point in time.
  • the frame-specific information header may be part of a tag prepended to the frame of data.
  • the tag may be inserted by tag insertion circuit 186.
  • Tag insertion circuit 186 may be integrated into second edge interface circuit 149, or may be a separate component.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to other destinations in the network.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to edge circuit 135 via forwarder circuit 174, internal interface circuit 147 and path 164.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to cut-through forwarder circuit 151 of internal network segment 150 via forwarder circuit 174, internal interface circuit 146 and path 166.
  • Edge circuit 145 may receive a frame of data at first internal interface circuit 146 via path 166.
  • Edge circuit 145 may include an error detector circuit 182 to detect errors in the received data frame and discard data frames with a detected error. Error detector circuit 182 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded.
  • the frame of data received at edge circuit 145 may contain identification information.
  • Edge circuit 145 may update portions of the received data frame and forward the updated data frame to network component 140 using a S&F protocol via egress port 142.
  • Edge circuit 145 may read the portion of the received data frame comprising the frame-specific information header.
  • Edge circuit 145 may perform a lookup operation in cooperation with RDT 181 in edge circuit 145 to determine if the frame-specific information header matches the frame-specific information header of a previous data frame that has already been forwarded.
  • the frame-specific information header may be stored in RDT 181 in edge circuit 145.
  • RDT 181 may be a non-transitory memory. If the frame-specific information header of the received data frame is listed in RDT 181, the received data frame may be discarded and not forwarded since it has already been forwarded via egress port 142.
  • Edge circuit 145 may include an error detector circuit 182 to detect errors in the received data frame and discard data frames with a detected error. The lookup operation and discarding of duplicate data frames may be implemented by duplicates removal circuit 183 in edge circuit 145.
  • Duplicates removal circuit 183 may be implemented in hardware or software, or a combination thereof.
  • Duplicates removal circuit 183 may include a first circuit to detect duplicate data frames forwarded to egress port 142 and a second circuit to detect duplicate data frames forwarded to egress port 144. If the frame-specific information header of the received data frame is not listed in RDT 181, the data frame may be termed a non-duplicate data frame, and edge circuit 145 may add the frame-specific information header to RDT 181. After performing the lookup operation, edge circuit 145 may remove the frame-specific information header from the data frame to create an updated data frame. The removal of the frame-specific information header may be implemented by tag removal circuit 184 in edge circuit 145.
  • the tag removal circuit 184 may be implemented in hardware or software, or a combination thereof.
  • the updated data frame may be forwarded to first edge interface circuit 148 via forwarder circuit 174.
  • the updated data frame may be forwarded to network component 140 via first edge interface circuit 148 at egress port 142.
  • Edge circuit 145 may receive a frame of data at internal interface circuit 147 via path 164.
  • Edge circuit 145 may include an error detector circuit 182 to detect errors in the received data frame and discard data frames with a detected error. Error detector circuit 182 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded.
  • the frame of data received at edge circuit 145 may contain identification information.
  • Edge circuit 145 may update portions of the received data frame and forward the updated data frame to network component 140 using a S&F protocol via egress port 144.
  • Edge circuit 145 may read the portion of the received data frame comprising the frame-specific information header. The frame-specific information header may be present at a predetermined location in the received data frame.
  • Edge circuit 145 may perform a lookup operation in cooperation with RDT 181 to determine if the frame-specific information header matches the frame-specific information header of a previous data frame that has already been forwarded.
  • the frame-specific information header may be stored in RDT 181 in edge circuit 145.
  • RDT 181 may be a non-transitory memory. For data frames forwarded to egress port 144, if the frame-specific information header of the received data frame is listed in RDT 181, the received data frame may be discarded and not forwarded since it has already been forwarded through egress port 144.
  • the received data frame may be discarded and not forwarded since it has already been forwarded through egress port 142.
  • the lookup operation and discarding of duplicate data frames may be implemented by duplicates removal circuit 183.
  • the data frame may be termed a non-duplicate data frame, and edge circuit 145 may add the frame-specific information header to RDT 181.
  • the data frame may be termed a non-duplicate data frame, and edge circuit 145 may add the frame-specific information header to RDT 181.
  • edge circuit 145 may remove the frame-specific information header from the data frame to create an updated data frame.
  • the removal of the frame-specific information header may be implemented by tag removal circuit 184 in edge circuit 145.
  • the updated data frame may be forwarded to second edge interface circuit 149 via forwarder circuit 174.
  • the updated data frame may be forwarded to network component 140 via second edge interface circuit 149 at egress port 144.
  • Edge circuit 135 may include a first edge interface circuit 138 to communicate with network component 130 using a store-and-forward protocol.
  • First edge interface circuit 138 may communicate with network component 130 via ingress port 132 and egress port 131.
  • Edge circuit 135 may include one or more internal interface circuits 136, 137 to communicate with internal network segment 150.
  • Edge circuit 135 may receive a frame of data at first edge interface circuit 138 via ingress port 132.
  • Edge circuit 135 may include an error detector circuit 192 to detect errors in the received data frame. Error detector circuit 192 may perform a CRC check or other error detection check on the received data frame.
  • the frame of data received at edge circuit 135 may contain identification information.
  • Edge circuit 135 may prepend a frame-specific information header in the received data frame to create a prepended data frame.
  • the frame-specific information header may be generated by an identification circuit 195.
  • Identification circuit 195 may be implemented in hardware or software, or a combination thereof.
  • the frame-specific information header may include an identifier associated with the received data frame. This identifier may also be termed a frame number.
  • the frame-specific information header may be part of a tag prepended to the received data frame to generate a prepended data frame.
  • the tag may be prepended by tag insertion circuit 196.
  • Tag insertion circuit 196 may be coupled to identification circuit 195, and may be implemented in hardware or software, or a combination thereof.
  • Tag insertion circuit 196 may be integrated into first edge interface circuit 138, or may be a separate component.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to edge circuit 145 via forwarder circuit 133, internal interface circuit 137 and path 164.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to cut-through forwarder circuit 151 of internal network segment 150 via forwarder circuit 133, internal interface circuit 137 and path 165.
  • the prepended data frame with the prepended frame-specific information header may be forwarded to cut-through forwarder circuit 152 of internal network segment 150 via forwarder circuit 133, internal interface circuit 136 and path 163.
  • Edge circuit 135 may receive a frame of data at first internal interface circuit 136 via path 163.
  • Edge circuit 135 may include an error detector circuit 192 to detect errors in the received data frame and discard data frames with a detected error. Error detector circuit 192 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded.
  • the frame of data received at edge circuit 135 may contain identification information.
  • Edge circuit 135 may update portions of the received data frame and forward the updated data frame to network component 130 using a S&F protocol via egress port 131.
  • Edge circuit 135 may read the portion of the received data frame comprising the frame-specific information header. The frame-specific information header may be present at a predetermined location in the received data frame.
  • Edge circuit 135 may perform a lookup operation to determine if the frame-specific information header matches the framespecific information header of a previous data frame that has already been forwarded.
  • the frame-specific information header may be stored in RDT 191 in edge circuit 135.
  • RDT 191 may be a non-transitory memory. If the frame-specific information header of the received data frame is listed in RDT 191, the received data frame may be discarded and not forwarded since it has already been forwarded through egress port 131.
  • the lookup operation and discarding of duplicate data frames may be implemented by a duplicates removal circuit 193 of edge circuit 135.
  • the duplicates removal circuit may be implemented in hardware or software, or a combination thereof.
  • the data frame may be termed a non-duplicate data frame, and edge circuit 135 may add the frame-specific information header to RDT 191.
  • edge circuit 135 may remove the frame-specific information header from the data frame to create an updated data frame.
  • the removal of the frame-specific information header may be implemented by a tag removal circuit 194 of edge circuit 135.
  • the tag removal circuit 194 may be implemented in hardware or software, or a combination thereof.
  • the updated data frame may be forwarded to edge interface circuit 138 via forwarder circuit 133.
  • the updated data frame may be forwarded to network component 130 via edge interface circuit 138 at egress port 131.
  • Error detector circuit 192 may be included in duplicates removal circuit 193, or may be a separate circuit.
  • Edge circuit 135 may receive a frame of data at internal interface circuit 137 via path 164. Edge circuit 135 may receive data at internal interface circuit 137 via path 165. Edge circuit 135 may include an error detector circuit 192 to detect errors in the received data frame and discard data frames with a detected error. Error detector circuit 192 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded. The frame of data received at edge circuit 135 may contain identification information. Edge circuit 135 may update portions of the received data frame and forward the updated data frame to network component 130 using a S&F protocol via egress port 131. Edge circuit 135 may read the portion of the received data frame comprising the frame-specific information header.
  • Edge circuit 135 may perform a lookup operation in cooperation with RDT 191 to determine if the frame-specific information header matches the frame-specific information header of a previous data frame that has already been forwarded. If the frame-specific information header of the received data frame is listed in RDT 191, the received data frame may be discarded and not forwarded since it has already been forwarded through egress port 131. If the frame-specific information header of the received data frame is not listed in RDT 191, the data frame may be termed a non-duplicate data frame, and edge circuit 135 may add the frame-specific information header to RDT 191. After performing the lookup operation, edge circuit 135 may remove the frame-specific information header from the data frame to create an updated data frame.
  • the removal of the frame-specific information header may be implemented by tag removal circuit 194 in edge circuit 135.
  • the updated data frame may be forwarded to edge interface circuit 138 via forwarder circuit 133.
  • the updated data frame may be forwarded to network component 130 via edge interface circuit 138 via egress port 131.
  • the example illustrated in FIGURE 1 is merely for illustrative purposes and is not intended to limit the invention.
  • the example illustrated in FIGURE 1 includes a specific number of network components, edge interface circuits, internal interface circuits, and network components, cut-through forwarder circuits of internal network segments and of edge circuits.
  • the specific paths between network components, edge interface circuits, internal interface circuits, cut-through forwarder circuits, and edge circuits illustrated in FIGURE 1 is for illustrative purposes and is not intended to limit the invention.
  • FIGURE 1 may include more network components than the number of network components illustrated in FIGURE 1.
  • Other examples not illustrated in FIGURE 1 may include fewer network components than the number of network components illustrated in FIGURE 1.
  • FIGURE 1 may include more edge circuits than the number of edge circuits illustrated in FIGURE 1.
  • Other examples not illustrated in FIGURE 1 may include fewer edge circuits than the number of edge circuits illustrated in FIGURE 1.
  • FIGURE 1 may include more edge interface circuits than the number of edge interface circuits illustrated in FIGURE 1.
  • Other examples not illustrated in FIGURE 1 may include fewer edge interface circuits than the number of edge interface circuits illustrated in FIGURE 1.
  • FIGURE 1 may include more internal interface circuits than the number of internal interface circuits illustrated in FIGURE 1.
  • Other examples not illustrated in FIGURE 1 may include fewer internal interface circuits than the number of internal interface circuits illustrated in FIGURE 1.
  • FIGURE 1 may include more network components than the number of network components illustrated in FIGURE 1.
  • Other examples not illustrated in FIGURE 1 may include fewer network components than the number of network components illustrated in FIGURE 1.
  • Other examples not illustrated in FIGURE 1 may include different network components than the specific network components illustrated in FIGURE 1.
  • FIGURE 2 illustrates one of various examples of an edge circuit 200.
  • Edge circuit 200 may represent one of various examples of edge circuit 145 as illustrated in FIGURE 1.
  • first edge interface circuit 270 and second edge interface circuit 275 may interface with a network component 201
  • first internal interface circuit 280 and second internal interface circuit 285 may interface with internal network segment 202.
  • Internal network segment 202 may be one of various examples of internal network segment 150, as illustrated and described in reference to FIGURE 1.
  • Edge circuit 200 may include RDT 290.
  • RDT 290 may be a non-transitory memory.
  • first edge interface circuit 270, second edge interface circuit 275, first internal interface circuit 280 and second internal interface circuit 285 may respectively include an RDT.
  • an RDT may be shared by more than one of first edge interface circuit 270, second edge interface circuit 275, first internal interface circuit 280 and second internal interface circuit 285.
  • First edge interface circuit 270 may include error detector circuit 296. Error detector circuit 296 may generate an output signal based on detection of an error.
  • Second edge interface circuit 275 may include error detector circuit 297. Error detector circuit 297 may generate an output signal based on detection of an error.
  • First internal interface circuit 280 may include error detector circuit 298. Error detector circuit 298 may generate an output signal based on detection of an error.
  • Second internal interface circuit 285 may include error detector circuit 299.
  • the example illustrated in FIGURE 2 illustrates a separate error detector circuit for, respectively, first edge interface circuit 270, second edge interface circuit 275, first internal interface circuit 280 and second internal interface circuit 285, but this is not intended to be limiting. In one of various examples, a single error detector circuit may be shared by more than one of first edge interface circuit 270, second edge interface circuit 275, first internal interface circuit 280 and second internal interface circuit 285.
  • Forwarder circuit 205 may receive data from first edge interface circuit 270, second edge interface circuit 275, first internal interface circuit 280 and second internal interface circuit 285 and may forward the received data to the proper destination.
  • First edge interface circuit 270 may receive a data frame from forwarder circuit 205 via path 210.
  • the data frame may be received by error detector circuit 296.
  • Error detector circuit 296 may check for errors in the data frame and may discard frames with detected errors. Checking for errors may be a CRC check or another error check technique.
  • Error detector circuit 296 may detect errors in the data frame and may provide an error output to duplicates removal circuit 211.
  • Duplicates removal circuit 211 may remove data frames with errors based on the error output.
  • Duplicates removal circuit 211 may include a controller circuit to perform a lookup operation to determine if the frame-specific information header of the received frame of data matches the frame-specific information header of a previous frame of data that has already been forwarded at egress port 272.
  • duplicates removal circuitry 211 may be responsive to controller 295. If the frame-specific information header of the received data is listed in RDT 290, the received frame is discarded by duplicates removal circuit 211 and not forwarded since it has already been forwarded through egress port 272. If the frame-specific information header of the received data is not listed in RDT 290, the data frame may be termed a non-duplicate data frame, and controller circuit 295 may add the framespecific information header to RDT 290.
  • Tag removal circuit 212 may remove the framespecific information header from the frame and forward the updated frame from first edge interface circuit 270 to network component 201 at egress port 272. Error detector circuit 296 may be included in duplicates removal circuit 211, or may be a separate circuit as illustrated in FIGURE 2.
  • First edge interface circuit 270 may receive a frame of data from network component 201 via ingress port 271.
  • Ingress port 271 may be coupled to identification circuit 222.
  • Identification circuit 222 may prepend a frame-specific information header to the received data frame.
  • the frame-specific information header may include an identifier associated with the received data frame. This identifier may also be termed a frame number. The identifier or frame number may distinguish a first received data frame, received from a particular MAC address, from a second received data frame received from the same MAC address at an earlier or later point in time.
  • Identification circuit 222 may be coupled to tag insertion circuit 221.
  • Tag insertion circuit 221 may combine the frame-specific information header with the received data frame to create a prepended data frame.
  • the prepended data frame may be forwarded through path 220 to forwarder circuit 205 for forwarding to other destinations on the network.
  • Second edge interface circuit 275 may receive a frame of data from forwarder circuit 205 via path 230.
  • Network component 201 may interface to second edge interface circuit 275.
  • the data frame may be received by error detector circuit 297.
  • Error detector circuit 297 may check for errors in the data frame and may provide an error output to duplicates removal circuit 231. Checking for errors may be a CRC check or another error check technique.
  • Duplicates removal circuit 231 may remove data frames with errors based on the error output.
  • Duplicates removal circuit 231 may include a controller circuit to perform a lookup to determine if the frame-specific information header of the received frame of data matches the frame-specific information header of a previous frame of data that has already been received. Alternately, operation of duplicates removal circuit 231 may be responsive to controller 295.
  • the received frame is discarded by duplicates removal circuit 231 and not forwarded since it has already been forwarded through egress port 277.
  • the data frame may be termed a non-duplicate data frame, and controller circuit 295 may add the frame-specific information header to RDT 290.
  • Tag removal circuit 232 may remove the frame-specific information header from the frame and forward the updated frame from second edge interface circuit 275 at egress port 277.
  • Error detector circuit 297 may be included in duplicates removal circuit 231, or may be a separate circuit as illustrated in FIGURE 2.
  • Second edge interface circuit 275 may receive a frame of data via ingress port 276.
  • Ingress port 276 may be coupled to identification circuit 242.
  • Identification circuit 242 may prepend a frame-specific information header to the received frame.
  • the frame-specific information header may include an identifier associated with the received data frame. This identifier may also be termed a frame number. The identifier or frame number may distinguish a first received data frame, received from a particular MAC address, from a second received data frame received from the same MAC address at an earlier or later point in time.
  • Identification circuit 242 may be coupled to tag insertion circuit 241.
  • Tag insertion circuit 241 may prepend the frame-specific information header to the received data to create a prepended data frame.
  • the prepended data frame including the frame-specific information header may be forwarded through path 240 to forwarder circuit 205 for forwarding to other destinations on the network.
  • Edge circuit 200 may receive a data frame from internal network segment 202 at first internal interface circuit 280 via first ingress port 282.
  • the received data frame may be forwarded to forwarder circuit 205 via first egress port 250.
  • First internal interface circuit 280 may forward a data frame over second egress port 281.
  • the data frame may be received from forwarder circuit 205 via second ingress port 255.
  • the data frame may be received by error detector circuit 298.
  • Error detector circuit 298 may check for errors in the data frame and may provide an error output to duplicates removal circuit 251. Checking for errors may be a CRC check or another error check technique.
  • Duplicates removal circuit 251 may remove data frames with errors based on the error output.
  • Duplicates removal circuit 251 may read the portion of the received data frame comprising the framespecific information header.
  • Duplicates removal circuit 251 may include a controller circuit to perform a lookup operation and determine if the frame-specific information header of the received frame of data matches the frame-specific information header of a previous frame of data that has already been received and forwarded by second egress port 281. Alternately, operation of duplicates removal circuit 251 may be responsive to controller 295. If the framespecific information header of the received data is listed in RDT 290, the received frame is discarded and not forwarded since it has already been forwarded through second egress port 281.
  • the data frame may be termed a non-duplicate data frame, and controller circuit 295 may add the information to the RDT 290.
  • First internal interface circuit 280 may forward the frame via second egress port 281.
  • Error detector circuit 298 may be included in duplicates removal circuit 251, or may be a separate circuit as illustrated in FIGURE 2.
  • Edge circuit 200 may receive a data frame from internal network segment 202 at second internal interface circuit 285 via first ingress port 287. Received data may be forwarded to forwarder circuit 205 via first egress port 260.
  • Second internal interface circuit 285 may forward a data frame over second egress port 286.
  • Data may be received from forwarder circuit 205 via second ingress port 265.
  • the data frame may be received by error detector circuit 299.
  • Error detector circuit 299 may check for errors in the data frame and may provide an error output to duplicates removal circuit 261. Checking for errors may be a CRC check or another error check technique.
  • Duplicates removal circuit 261 may remove data frames with errors based on the error output. Duplicates removal circuit 261 may read the portion of the received data frame comprising the frame-specific information header.
  • Duplicates removal circuit 261 may include a controller circuit to perform a lookup to determine if the frame-specific information header matches the frame-specific information of a previous frame of data that has already been forwarded by second egress port 286. Alternately, operation of duplicates removal circuit 231 may be responsive to controller 295. If the frame-specific information header of the received data is listed in RDT 290, the received frame is discarded and not forwarded since it has already been forwarded through second egress port 286. If the frame-specific information header of the received data is not listed in the RDT 290, the data frame may be termed a non-duplicate data frame, and controller circuit 295 may add the frame-specific information header to RDT 290. Second egress port 286 may forward the data to internal network segment 202. Error detector circuit 299 may be included in duplicates removal circuit 261, or may be a separate circuit as illustrated in FIGURE 2.
  • FIGURE 3 illustrates a method for control of network traffic.
  • a device as previously illustrated and described in reference to FIGURE 2 may execute the illustrated method.
  • a data frame may be received by an edge interface circuit from a network component.
  • the edge interface circuit may generate frame identification information associated with the data frame.
  • the frame-specific information header may include an identifier for the received data frame. This identifier may also be termed a frame number. The identifier or frame number may distinguish a first received data frame, received from a particular MAC address, from a second received data frame received from the same MAC address at an earlier or later point in time.
  • frame-specific information header may be prepended as a tag onto the received data frame to generate a prepended data frame.
  • the prepended data frame may be forwarded to a forwarder circuit.
  • a data frame may be received at an edge interface circuit from the forwarder circuit.
  • the data frame received at the edge interface circuit may be a prepended data frame as described in reference to operations 305 through 320, inclusive.
  • An error detection operation may be performed on the received data frame and data frames with detected errors may be removed.
  • duplicate data frames received at the edge interface circuit may be selectively removed.
  • the frame-specific information header may be read from a portion of the received data frame.
  • the frame-specific information header may be present at a predetermined location in the received data frame.
  • a lookup operation may determine if the frame-specific information header in the received data frame matches the frame-specific information header of a previous data frame that has already been forwarded.
  • the frame-specific information header may be stored in an RDT. If the frame-specific information header of the received data frame is listed in the RDT, the received data frame may be discarded and not forwarded since it has already been forwarded.
  • the frame-specific information header may be removed from the received data frame to create an updated data frame if the received data frame is not a duplicate.
  • the updated data frame may be forwarded to a network component through an egress port.
  • a data frame may be received at an internal interface circuit from a network component.
  • the received data frame may be forwarded to a forwarder circuit.
  • a data frame may be received at an internal interface circuit from a forwarder circuit.
  • the data frame received at the internal interface circuit may be a prepended data frame as described in reference to operations 305 to 320, inclusive.
  • An error detection operation may be performed on the received data frame and data frames with detected errors may be removed.
  • the received data frame may be selectively removed.
  • Frame-specific information header may be read from a portion of the received data frame.
  • Frame-specific information header may be present at a predetermined location in the received data frame.
  • a lookup operation may determine if the frame-specific information header in the received data frame matches the frame-specific information header of a previous data frame that has already been forwarded.
  • the frame-specific information header may be stored in an RDT. If the frame-specific information header of the received data frame is listed in the RDT, the received data frame may be discarded and not forwarded since it has already been forwarded.
  • non-duplicate received data frames may be forwarded to a network component.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

Un dispositif de commande du trafic réseau peut comprendre une pluralité de circuits d'interface périphérique et de circuits d'interface interne, chacun couplé à un ou plusieurs composants du réseau. Le dispositif peut ajouter des informations d'identification de trame à des trames de données reçues et éliminer des trames de données dupliquées lorsque des informations d'identification sont détectées plusieurs fois. Le dispositif peut stocker des informations d'identification de trame dans un dispositif de mémoire non transitoire et effectuer une opération de consultation pour identifier des trames de données dupliquées et éliminer des boucles dans le réseau.
PCT/US2023/025820 2022-09-08 2023-06-21 Système et procédé de transmission du trafic de réseau WO2024054283A1 (fr)

Applications Claiming Priority (4)

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US202263404736P 2022-09-08 2022-09-08
US63/404,736 2022-09-08
US18/211,310 US20240089202A1 (en) 2022-09-08 2023-06-19 System and method for forwarding network traffic
US18/211,310 2023-06-19

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3439210A1 (fr) * 2017-07-31 2019-02-06 Mitsubishi Electric R&D Centre Europe B.V. Commutation à traversée transparente fiable pour des normes de réseaux ieee 802.1 sensibles au temps
US10917504B1 (en) * 2018-09-05 2021-02-09 Amazon Technologies, Inc. Identifying the source of CRC errors in a computing network
EP3893457A1 (fr) * 2019-01-07 2021-10-13 Huawei Technologies Co., Ltd. Procédé et dispositif de transmission de données

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3439210A1 (fr) * 2017-07-31 2019-02-06 Mitsubishi Electric R&D Centre Europe B.V. Commutation à traversée transparente fiable pour des normes de réseaux ieee 802.1 sensibles au temps
US10917504B1 (en) * 2018-09-05 2021-02-09 Amazon Technologies, Inc. Identifying the source of CRC errors in a computing network
EP3893457A1 (fr) * 2019-01-07 2021-10-13 Huawei Technologies Co., Ltd. Procédé et dispositif de transmission de données

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