WO2024051245A1 - Signal processing method and apparatus - Google Patents

Abstract

Provided in the present application are a signal processing method and apparatus. The method comprises: a sending apparatus generating a first signal according to a first sequence and N data symbols, wherein the first sequence includes L elements, the maximum periodic auto-correlation sidelobe of the first sequence is less than or equal to a first threshold value, each data symbol among the N data symbols includes L chips arranged in sequence, the L chips arranged in sequence include chips bearing pulses, the chips bearing the pulses correspond, on a one-to-one basis, to elements, element values of which are specified values, in the first sequence, and N and L are both positive integers; the sending apparatus sending the first signal to a receiving apparatus; and the receiving apparatus parsing the first signal. By means of the method and apparatus provided in the present application, the situation where pulses borne by chips with opposite polarities among overlapping chips offset each other can be reduced, such that the packet error rate of a system can be reduced, and the anti-interference performance of the system is improved, thereby improving the communication quality of the system.

Description

Signal processing methods and devices

This application claims priority to the Chinese patent application filed with the China Patent Office on September 9, 2022, with the application number 202211102610.3 and the application title "Signal Processing Method and Device", the entire content of which is incorporated into this application by reference.

Technical field

The present application relates to the field of communications, and more specifically, to a signal processing method and device.

Background technique

Ultra wideband (UWB) technology is a wireless carrier communication technology that uses nanosecond-level non-sinusoidal narrow pulses to transmit data. Because UWB technology has the advantages of strong multipath resolution, low power consumption, and strong confidentiality, UWB technology has become one of the popular physical layer technologies for short-distance, high-speed wireless networks. The structure of the physical protocol data unit (PPDU) of the UWB system includes a physical layer (physical, PHY) bearer (payload) field. The PHY bearer field carries one or more data symbols. Each data symbol uses several pulses to carry several bits of the encoded signal. In the data symbol structure, each pulse occupies one chip (chip) time.

Multipath is a common phenomenon in communications, where radio waves take multiple paths from a transmitting antenna to a receiving antenna. From the time domain analysis, signals of different paths in multipath signals have different delays when they arrive at the receiving device. Signals with different delays arriving at the receiving device will also overlap in time at the receiving device, causing inter-symbol interference.

In UWB systems, multipath effects also have a negative impact on communication quality. For example, some or all of the chips carried by signals on different paths will overlap. Especially when the time difference between multipath signals arriving at the receiving device is an integer multiple of the chip time (that is, the time occupied by one chip), in other words, the delay between multipath signals arriving at the receiving device differs by an integer number of chip times. When the receiving device synthesizes multipath signals, if there are pulses in the overlapping chips, then these pulses will be completely aligned, and the pulses carried by the chips with opposite polarity will cancel out, and the packet error rate of the system will be greatly increased. increase, thereby significantly reducing communication quality.

Therefore, how to improve the communication quality of the system has become an urgent problem to be solved.

Contents of the invention

This application provides a signal processing method and device, which can reduce the packet error rate of the system, improve the anti-interference performance of the system, and thereby improve the communication quality of the system.

A first aspect provides a signal processing method, which can be performed by a receiving device, or can also be performed by a component of the receiving device. The method includes: receiving a first signal, the first signal is obtained according to a first sequence and N data symbols, the first sequence contains L elements, and the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the th A threshold value, each of the N data symbols includes L sequentially arranged chips, and the L sequentially arranged chips include pulse-carrying chips, and the pulse-carrying chips are identical to the first There is a one-to-one correspondence between elements in the sequence whose element values are specified values, and N and L are both positive integers; analyze the first signal.

In the above solution, when there is a multipath effect in the system, the first signal received by the receiving device may include multiple signals transmitted through different paths, that is, multipath signals. Since the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, the number of overlapping chip pulses on each data symbol in the multipath signal received by the receiving device will be as small as possible. Compared with signals that are not generated based on the first sequence, it can reduce the situation where the pulses carried by chips with opposite polarities among the overlapping chips will cancel out, thereby reducing the packet error rate of the system and improving the anti-interference performance of the system. Improve the communication quality of the system.

A second aspect provides a signal processing method, which method is performed by a transmitting device corresponding to the method of the first aspect. The method can also be carried out by components of the transmitting device. The method includes: generating a first signal based on a first sequence and N data symbols, the first sequence containing L elements, the maximum periodic autocorrelation side lobe of the first sequence being less than or equal to a first threshold, and the N data symbols Each data symbol in contains L sequentially arranged chips, and the L sequentially arranged chips include pulse-carrying chips, and the pulse-carrying chips are identical to the elements whose values in the first sequence are specified values. The elements correspond one to one, and N and L are both positive integers; send the first signal.

In the above solution, when there is a multipath effect in the system, the first signal received by the receiving device may include multiple signals transmitted through different paths, that is, multipath signals. Since the maximum periodic autocorrelation side lobe of the first sequence used by the sending device to generate the first signal is less than or equal to the first threshold, the number of chips that overlap on each data symbol in the multipath signal received by the receiving device has a pulse number The number will be as small as possible. Compared with signals that are not generated based on the first sequence, it can reduce the situation where the pulses carried by chips with opposite polarities among the overlapping chips will cancel out, thereby reducing the packet error rate of the system and improving the anti-interference performance of the system. Improve the communication quality of the system.

In a third aspect, a signal processing device is provided. The device includes: a transceiver unit configured to receive a first signal. The first signal is obtained based on a first sequence and N data symbols. The first sequence includes L elements, the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, each of the N data symbols contains L sequentially arranged chips, and the L sequentially arranged codes The chip includes a pulse-carrying chip, and the pulse-carrying chip has a one-to-one correspondence with an element whose element value is a specified value in the first sequence. N and L are both positive integers; a processing unit is used to analyze the first signal.

In a fourth aspect, a signal processing device is provided. The device includes: a transceiver unit configured to generate a first signal based on a first sequence and N data symbols. The first sequence contains L elements. The first sequence The maximum periodic autocorrelation side lobe is less than or equal to the first threshold, each of the N data symbols includes L sequentially arranged chips, and the L sequentially arranged chips include chips carrying pulses, The pulse-carrying chips correspond one-to-one to the elements in the first sequence whose element values are specified values, and N and L are both positive integers; the processing unit is used to send the first signal.

Combined with any one of the first to fourth aspects, in some implementations, the prescribed value is 1, among the L elements of the first sequence, K elements are 1, L-K elements are 0, and the A threshold is obtained based on K and L, K≤L and K is a positive integer.

Combined with any one of the first to fourth aspects, in some implementations, the first threshold is expresses right Rounded up.

Combined with any one of the first to fourth aspects, in some implementations, the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, including:

The maximum periodic autocorrelation side lobe of the first sequence is equal to or equal to or less than

Combined with any one of the first to fourth aspects, in some implementations, the first sequence is obtained based on a second sequence containing L-1 elements, and the periodic autocorrelation side lobe of the second sequence is constant value.

Combined with any one of the first to fourth aspects, in some implementations, the second sequence is an m-sequence or a Legendre sequence.

Combined with any one of the first to fourth aspects, in some implementations, the first sequence is obtained based on a second sequence containing L-1 elements, including: the first sequence is a pair of L-1 elements. The third sequence of elements is obtained by performing first processing, and the first processing includes at least one of cyclic shift, inversion, and negation; the third sequence is obtained based on the second sequence.

Combined with any one of the first to fourth aspects, in some implementations, the first sequence is obtained according to a genetic algorithm.

Combined with any one of the first to fourth aspects, in some implementations, L=8, the first sequence is: {0, 0, 0, 1, 0, 1, 1, 1}; or, {0, 0, 1, 0, 0, 1, 1, 1}; or, {0, 0, 1, 0, 1, 0, 1, 1}; or, {0, 0, 0, 1, 1 ,0,1,1}.

Combining any one of the first to fourth aspects, in some implementations, L=16, the first sequence is: {0, 0, 0, 0, 1, 0, 0, 1, 1, 0 ,1,0,1,1,1,1}; or, {1,1,1,1,0,1,1,0,0,1,0,1,0,0,0,0}; or, {0,0,0,1,0,1,1,1,1,0,0,1,1,0,1,0}; or, {1,0,0,1,0,1 ,0,1,0,0,1,1,1,1,0,0}.

Combined with any one of the first to fourth aspects, in some implementations, L=32, the first sequence is: {0, 0, 0, 1, 1, 0, 1, 0, 0, 1 ,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0,0,0,1,1,1,1,1}; or, {0 ,0,1,0,1,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0,0 , 0, 1, 1, 1, 1, 1}; or, {0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, 1 ,0,1,1,1,0,1,1,0,0,0,1,1,1,1,1}; or, {1,0,1,1,0,1,0,0 ,0,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,1,0,0,0,1,1,1,0}.

In a fifth aspect, a communication device is provided, which is used to perform the method in any possible implementation manner of the first aspect or the second aspect. Specifically, the device may include units and/or modules for performing the method in any possible implementation of the first aspect or the second aspect, such as a transceiver unit and/or a processing unit.

In a possible implementation, the transceiver unit may be a transceiver, or an input/output interface; the processing unit may be at least one processor, or a processing circuit. Alternatively, the transceiver may be a transceiver circuit. Alternatively, the input/output interface may be an input/output circuit.

A sixth aspect provides a communication device, characterized by including a processor and an interface circuit, the interface circuit being used to receive signals from other communication devices and transmit them to the processor or to send signals from the processor to Other communication devices, the processor is used to implement the method in any possible implementation manner of the above-mentioned first aspect or second aspect through logic circuits or execution of code instructions.

In a seventh aspect, a communication device is provided, including a processor and a memory. The processor is used to read the memory The stored instructions can receive signals through the transceiver and transmit signals through the transmitter to execute the method in any possible implementation manner of the first aspect or the second aspect.

An eighth aspect provides a computer-readable storage medium, characterized in that a computer program or instructions are stored in the storage medium, and when the computer program or instructions are executed by a communication device, any of the first or second aspects can be realized. A method among possible implementations.

A ninth aspect provides a computer program product containing instructions, which when the computer program product is run on a communication device, causes the communication device to execute the method in any of the possible implementations of the first aspect or the second aspect.

A tenth aspect provides a computer program instruction that, when run on a computer, causes the computer to execute the method in any of the possible implementations of the first aspect or the second aspect.

Description of the drawings

Figure 1 is a schematic diagram of two application scenarios provided by this application.

Figure 2 shows a schematic diagram of the structure of a physical protocol data unit of the UWB system.

Figure 3 shows a schematic structural diagram of data symbols in the case of average PRF=249.6MHz.

FIG. 4 shows a schematic diagram of an example of the structure of a convolutional code encoder in a UWB system to which this application is applicable.

FIG. 5 shows a schematic diagram of an example of a scrambler structure applicable to the present application.

Figure 6 shows a schematic block diagram of two possible data symbol structures.

FIG. 7 shows a schematic diagram of the signal processing method 100 provided by this application.

FIG. 8 shows a schematic diagram of the basic structure of a linear feedback shift register applicable to this application.

FIG. 9 is a schematic diagram showing an example of the correspondence relationship between data symbol #1 and the first sequence.

Figure 10 shows a schematic block diagram of a genetic algorithm applicable to this application.

FIG. 11 is a schematic diagram showing an example of the correspondence relationship between data symbol #1 and the first sequence.

Figure 12 is a schematic block diagram of the communication device provided by this application.

Figure 13 is another schematic block diagram of the communication device provided by this application.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

The technical solution provided by this application can be applied to wireless personal area network (WPAN). The standard adopted by WPAN is the Institute of Electrical and Electronics Engineers (IEEE) 802.15 system. WPAN can be used for communication between digital auxiliary equipment within a small range such as phones, computers, and accessory equipment. Its working range is generally within 10 meters (m). As examples, technologies that can support wireless personal area networks include but are not limited to: Bluetooth, ZigBee, ultra wideband (UWB), infrared data association (IrDA) infrared connection technology, home Radio frequency (HomeRF), etc. From the perspective of network composition, WPAN can be located at the bottom of the entire network architecture and is used for wireless connections between devices within a small range, that is, point-to-point short-distance connections, which can be regarded as short-distance wireless communication networks. According to different application scenarios, WPAN can be divided into high rate (HR)-WPAN and low rate (LR)-WPAN. Among them, HR-WPAN can be used to support various high-rate multimedia applications, including high-speed Quality audio and video distribution, multi-megabyte music and image file transfer, and more. LR-WPAN can be used for general business in daily life.

In WPAN, according to the communication capabilities of the device, it can be divided into full-function device (FFD) and reduced-function device (RFD). RFD is mainly used for simple control applications, Such as light switches, passive infrared sensors, etc., the amount of data transmitted is small, the transmission resources and communication resources are not occupied, and the cost of RFD is low. FFDs can communicate with each other, and FFDs and RFDs can also communicate with each other. Usually, RFDs do not communicate directly with each other, but communicate with FFDs, or forward data through an FFD. The FFD associated with an RFD may also be called the coordinator of the RFD. The coordinator may also be called a personal area network (PAN) coordinator or central control node, etc. The PAN coordinator is the master control node of the entire network, and there is a PAN coordinator in each ad hoc network, which is mainly used for membership management, link information management, and packet forwarding functions. Optionally, the device in the embodiment of this application may be a device that supports multiple WPAN standards such as 802.15.4a and 802.15.4z, as well as those currently under discussion or subsequent versions.

In this application, the above-mentioned devices may be tags, communication servers, routers, switches, network bridges, computers or mobile phones, home smart devices, vehicle communication devices, wearable devices, etc. Wearable devices, also known as wearable smart devices, are a general term for applying wearable technology to intelligently design daily wear and develop wearable devices, such as glasses, gloves, watches, clothing, and shoes. Wearable devices are portable devices that are worn directly on the body or integrated into the user's clothing or accessories. Wearable devices are not just hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly defined wearable smart devices include full-featured, large-sized devices that can achieve complete or partial functions without relying on smartphones, such as smart watches or smart glasses, and those that only focus on a certain type of application function and need to cooperate with other devices such as smartphones. Use, such as various types of smart bracelets, smart jewelry, etc. for physical sign monitoring.

In this embodiment of the present application, the above-mentioned device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. This hardware layer includes hardware such as central processing unit (CPU), memory management unit (MMU) and memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as Linux operating system, Unix operating system, Android operating system, iOS operating system or Windows operating system, etc. This application layer includes applications such as browsers, address books, word processing software, and instant messaging software. Moreover, the embodiments of the present application do not specifically limit the specific structure of the execution subject of the method provided by the embodiments of the present application, as long as the program recorded in the code of the method provided by the embodiments of the present application can be executed according to the method provided by the embodiments of the present application. It suffices to communicate by method. For example, the execution subject of the method provided by the embodiment of the present application may be FFD or RFD, or a functional module in FFD or RFD that can call a program and execute the program.

The above introduction about WPAN is only an example, which does not limit the scope of protection of the embodiments of the present application.

This application is used to support IEEE 802.11ax next-generation wireless fidelity (Wi-Fi) protocols, such as 802.11be, Wi-Fi 7 or extremely high throughput (EHT), such as 802.11be next-generation , Wi-Fi 8, Wi-Fi artificial intelligence (AI) and other 802.11 series protocol wireless LAN systems can also be applied to UWB-based wireless personal area network systems and sensing systems. It should be noted that the following describes the embodiments of the present application by taking application to a UWB-based wireless personal area network system as an example.

It can be understood that the embodiments of the present application can also be applied to other communication systems, such as sixth generation (6th generation, 6G) mobile communication systems, fifth generation (5th generation, 5G) systems, long term evolution (long term evolution, LTE) system etc. The embodiments of this application can also be used in future communication systems. The embodiments of the present application can also be used for device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication ( machine type communication (MTC), and the Internet of things (IoT) communication system or other communication systems. The communication system applicable to this application is not limited to this, and will be described uniformly here, and will not be described in detail below.

In this embodiment of the present application, the sending device and/or the receiving device may be a station (STA) in a wireless local area network (WLAN). For example, the site can be a mobile phone that supports Wi-Fi communication function, a tablet computer that supports Wi-Fi communication function, a set-top box that supports Wi-Fi communication function, a smart TV that supports Wi-Fi communication function, or a smart TV that supports Wi-Fi communication function. Smart wearable devices, vehicle-mounted communication devices that support Wi-Fi communication functions, computers that support Wi-Fi communication functions, etc. Optionally, the site can support the 802.11be standard. The site can also support multiple WLAN standards of the 802.11 family such as 802.11be, 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b and 802.11a.

In addition, the sending end device and/or the receiving end device in the embodiment of the present application can also be an access point (AP) in WLAN, and the access point can be a terminal device (such as a mobile phone) that enters the wired (or wireless) network. Network access points are mainly deployed inside homes, buildings, and campuses. The typical coverage radius is tens to hundreds of meters. Of course, they can also be deployed outdoors. The access point is equivalent to a bridge connecting the wired network and the wireless network. Its main function is to connect various wireless network clients together, and then connect the wireless network to the Ethernet. Specifically, the access point can be a terminal device (such as a mobile phone) or a network device (such as a router) with a Wi-Fi chip. The access point can be a device that supports the 802.11be standard. The access point can also be a device that supports multiple WLAN standards of the 802.11 family such as 802.11be, 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a.

Access points and sites can also be devices used in the Internet of Vehicles, IoT nodes, sensors, etc. in the Internet of Things (IoT), smart cameras, smart remote controls, smart water meters and electricity meters in smart homes, and Sensors in smart cities, etc.

The following is a brief introduction to the application scenarios applicable to this application in conjunction with Figure 1, as follows.

Figure 1 is a schematic diagram of two application scenarios provided by this application. The system 101 shown in (A) in Figure 1 is a communication system with star topology, and the system 102 shown in (B) in Figure 1 is a peer to peer topology. Communication Systems.

As shown in (A) of Figure 1 , the system 101 may include multiple FFDs and multiple RFDs, and the multiple FFDs and multiple RFDs may form a star topology communication system. Among them, one FFD among multiple FFDs is a PAN coordinator. In a star topology communication system, the PAN coordinator can transmit data with one or more other devices, that is, multiple devices can establish one-to-many or many-to-many devices. One-to-one data transmission architecture.

As shown in (B) of Figure 1 , the system 102 may include multiple FFDs and one RFD, and the multiple FFDs and one RFD may form a point-to-point topology communication system. Among them, one FFD among multiple FFDs is a PAN coordinator. In a point-to-point topology communication system, a many-to-many data transmission architecture can be established between multiple different devices.

It should be understood that (A) in Figure 1 and (B) in Figure 1 are simplified schematic diagrams for ease of understanding and do not constitute a limitation on the application scenarios of the present application. For example, the system 101 and/or the system 102 may also include other FFDs and/or RFDs.

UWB technology can transmit data using nanosecond-level non-sinusoidal narrow pulses, which occupies a wide spectrum range. Since the pulses used by UWB technology to transmit data are narrow and the radiation spectrum density is extremely low, UWB technology has the advantages of strong multipath resolution, low power consumption, and strong confidentiality. Currently, UWB technology has been written into the IEEE 802 series of wireless standards, and the WPAN standard IEEE 802.15.4a based on UWB technology has been released, as well as its evolved version IEEE 802.15.4z. Currently, the next generation WPAN standard 802.15.4ab of UWB technology is being formulated. It has also been put on the agenda.

Figure 2 shows a schematic diagram of the structure of a physical protocol data unit (PPDU) of the UWB system. As shown in Figure 2, PPDU includes a synchronization header (SHR), a physical header (PHR) and a physical layer (physical, PHY) payload field. The PHY payload field can also be Understood as the physical service data unit (PSDU).

Among them, the modulation method used in the PHY bearer field varies according to the mean pulse repetition frequency (pulse repetition frequency, PRF) of the sending device. The larger the average PRF, the more pulses can be transmitted in the same time, resulting in a greater transmission rate. Taking the current highest average PRF = 249.6 MHz as an example, the data symbol structure of its load is shown in Figure 3.

Figure 3 shows a schematic structural diagram of data symbols in the case of average PRF=249.6MHz. As shown in Figure 3, the bidirectional arrow in the figure indicates the location of the burst, each box represents a chip, and the lateral distance occupied by each box is one chip time, that is, T _chip . The time occupied by the data symbols shown in Figure 3 is T _dsym . For data symbols containing 16 chips, each data symbol uses 8 pulses to carry the two bits after channel encoding. Among them, 4 pulses are a group, and Figure 3 includes two groups of pulses. Each bit occupies 4 pulses, and the time occupied by each group of pulses is T _burst , that is, 4 T _chips . Each group of pulses is followed by a guard interval of 4 T _chip lengths, and no pulse is emitted during the guard interval.

FIG. 4 shows a schematic diagram of an example of the structure of a convolutional code encoder with a limit length of 7 in the UWB system to which the present application is applicable. In Figure 4, D represents the shift register, and + represents binary addition. For example, the encoded output bits g ₀ ⁽ⁿ⁾ and g ₁ ⁽ⁿ⁾ using the convolutional code shown in Figure 4 are respectively mapped to two sets of pulses of the data symbols shown in Figure 3 according to Table 1, and then the pairs are mapped to two sets of pulses. The data on the group pulse is scrambled by the scrambler shown in Figure 5. Among them, the initial state of the scrambler is the first 15 bits of the binary sequence obtained by removing 0 from the ternary sequence in the SHR and setting -1 to 0. Finally, a corresponding pulse signal is generated based on the scrambled result, 0 corresponds to a positive pulse, and 1 corresponds to a negative pulse.

Table 1

FIG. 5 shows a schematic diagram of an example of a scrambler structure applicable to the present application. In Figure 5, D represents the shift register, and + represents binary addition. S _j to S _j -15 are all scrambling code sequences, where S _j is the scrambling code sequence input to the scrambler. S _n is the time-varying spreading code output by the scrambler.

In order to support higher transmission rates, one way is to reduce the number of pulses corresponding to each bit, for example, each bit is mapped to two pulses, so that the transmission rate can be improved compared to the data symbol structure shown in Figure 3 double. Figure 6 shows a schematic block diagram of two possible data symbol structures. As shown in (a) in Figure 6, one data symbol corresponds to two groups of pulses, and two pulses are one group. As shown in (b) in Figure 6, one data symbol corresponds to a group of pulses, and 4 pulses are a group.

Multipath is a common phenomenon in communications, where radio waves take multiple paths from a transmitting antenna to a receiving antenna. From the time domain analysis, signals of different paths in multipath signals have different delays when they arrive at the receiving device. Signals with different delays arriving at the receiving device may also overlap in time at the receiving device, causing inter-symbol interference.

In the UWB system, when the time difference between multipath signals arriving at the receiving device is an integer multiple of the chip time, in other words, when the delay between multipath signals arriving at the receiving device differs by an integer multiple, the signals in different paths Some or all of the chips will overlap completely. When the receiving device synthesizes multipath signals, when the polarities of the overlapping chips corresponding to signals of different paths are opposite, the pulses carried by the overlapping chips will cancel out, and the packet error rate of the system will increase significantly. Significantly reduces communication quality.

Therefore, when the time difference between multipath signals arriving at the receiving device is an integer multiple of the chip time, how to reduce the packet error rate of the system has become an urgent problem to be solved. In view of this, this application provides a signal processing method and device.

The signal processing method 100 provided by this application will be introduced below with reference to Figures 7 to 11.

FIG. 7 shows a schematic diagram of the signal processing method 100 provided by this application.

S101. The sending device generates a first signal based on the first sequence and N data symbols.

Among them, the first sequence contains L elements. The maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold. Each of the N data symbols contains L sequentially arranged chips. The L sequenced chips contain the pulse-carrying chips. The chip carrying the pulse corresponds one-to-one to the element in the first sequence whose element value is a specified value, and N and L are both positive integers.

It should be understood that the maximum periodic autocorrelation side lobe of the first sequence can be understood as the maximum value of the side lobe of the periodic autocorrelation function of the first sequence, or the peak value of the side lobe of the periodic autocorrelation function of the first sequence.

Taking the specified value as 1 as an example, assume that among the L elements of the first sequence, K elements are 1 and L-K elements are 0. Then, the first threshold can be obtained according to K and L, K≤L and K is a positive integer.

For example, the first threshold is expresses right Rounded up. Further, "the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold" can be understood to mean that the maximum periodic autocorrelation side lobe of the first sequence is equal to Or the maximum periodic autocorrelation side lobe of the first sequence is equal to Or the maximum periodic autocorrelation side lobe of the first sequence is less than

Taking the prescribed value as 1 as an example, the chip carrying the pulse corresponds one-to-one to the element whose element value is 1 in the first sequence. Further, the chips that do not carry pulses correspond one-to-one to the elements whose element value is 0 in the first sequence.

It should be noted that the chip carrying the pulse in each data symbol corresponds one-to-one to the element with an element value of 1 in the first sequence. It does not limit that the pulses in each data symbol are all positive pulses or negative pulses, but It means that there is a pulse in the chip corresponding to the element value of the first sequence being 1 in each data symbol. For example, the sign of the pulse in each data symbol can be determined based on the information being sent. Alternatively, the sign of the pulse in each data symbol can be determined based on the scrambler shown in Figure 5. For details, please refer to the description of Figure 5.

S102. The sending device sends a first signal to the receiving device. Correspondingly, the receiving device receives the first signal from the sending device.

It should be understood that due to the multipath effect, the first signal may reach the receiving device through multiple paths during transmission, and the first signals passing through different paths may have different delays in reaching the receiving device.

S103. The receiving device analyzes the first signal.

It should be understood that, assuming that the receiving device receives multiple first signals from different paths, when parsing the multiple received first signals, some or all of the chips carried by the multiple signals will overlap together. Especially when the time difference between multipath signals arriving at the receiving device is an integer multiple of the chip time, if there are pulses in the overlapping chips, these pulses will be perfectly aligned.

In the above scheme, the sending device generates a first signal according to the first sequence and N data symbols, and determines the chip carrying the pulse in each data symbol through the first sequence. Since the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the At a threshold, the number of overlapping chip pulses on each data symbol in the multipath signal will be as small as possible. Compared with the structure of the data symbols shown in Figure 2 or Figure 5, it reduces the situation where the pulses carried by the opposite polarity chips in the overlapping chips will cancel out, thereby reducing the packet error rate of the system and improving the system's immunity. interference performance, thereby improving the communication quality of the system.

Or, taking the specified value as 1 as an example, assume that among the L elements of the first sequence, K elements are 1 and LK elements are 0. Then, the first threshold can be obtained according to K and L, K≤L and K is a positive integer. Optionally, the first threshold is the minimum value of the maximum periodic autocorrelation side lobe of the first sequence, When the maximum periodic autocorrelation side lobe of the first sequence is equal to the first threshold, that is, reaches the minimum value, the number of overlapping chip pulses on each data symbol in the multipath signal is the least. At this time, the system has the best anti-interference performance.

The method of determining the first threshold is explained in detail below with an example.

Example 1, assume that the S sequence is a sequence containing L elements, and the L elements include two elements, 1 and 0. The periodic autocorrelation function A(τ) of the S sequence is defined as shown in Formula 1.

Among them, s represents the S sequence, and s(k) represents the element value at the k+1th position in the S sequence. 0≤k≤L-1, and k is an integer. (k+τ) _{mod L} represents the remainder of k+τ divided by L, or it represents the remainder of k+τ to L. s(k+τ) _modL represents the element value at the (k+τ) _{mod L} position in the S sequence, τ≥0 and τ is an integer. A(τ) is the output result after periodic autocorrelation of the S sequence. The output result is the sum of the periodic autocorrelation main lobe and periodic autocorrelation side lobes of the S sequence. Moreover, the larger the value of A(τ), the higher the degree of autocorrelation of the S sequence; the smaller the value of A(τ), the lower the degree of autocorrelation of the S sequence. Generally speaking, the periodic autocorrelation main lobe of the S sequence is the maximum value of A(τ).

In Example 1, for convenience of explanation, each of the N data symbols is referred to as data symbol #1 below.

According to the correspondence between the pulse-carrying chip in data symbol #1 and the element with an element value of 1 in the S sequence, Formula 1 may also include the following meanings. Among them, s can also represent data symbol #1 containing L chips. The value of s(k) can also indicate whether there is a pulse on the k-th chip in data symbol #1 containing L chips. Among them, s(k)=1, it can mean that there is a pulse on the kth chip in the data symbol #1 containing L chips, and s(k)=0, it can mean the data symbol # containing L chips. There is no pulse on the kth chip in 1. Similarly, the value of s(k+τ) _modL can also represent the (k+τ) mod L-th chip _in data symbol #2 containing L chips that coincides with the k-th chip in data symbol #1 _. Whether there are pulses on the chip. Among them, data symbol #2 does not belong to the above-mentioned N data symbols. It should be understood that if the kth chip in data symbol #1 and the (k+τ) _modL chip in data symbol #2 have opposite polarities, the kth chip in data symbol #1 has the same polarity as the (k+τ) modL chip in data symbol #2. When the (k+τ) _{mod L} chips in symbol #2 all have pulses, the pulses on the two chips will cancel each other out. In other words, one of the pulses on the k-th chip in data symbol #1 and the pulse on the (k+τ) _{mod L} -th chip in data symbol #2 are positive pulses, and the other pulse is negative. In the case of pulses, the pulses on the two chips will cancel each other out. In a possible implementation, data symbol #2 belongs to M data symbols, and the transmitting end generates the second signal based on the S sequence and M data symbols, where M is a positive integer. Each of the M data symbols contains L sequentially arranged chips. The L sequenced chips contain the pulse-carrying chips. The chip carrying the pulse corresponds one-to-one to the element whose element value is the specified value in the S sequence, and M is a positive integer. Furthermore, there is a time difference in the delay between the first signal and the second signal reaching the receiving device. The first signal and the second signal may be understood as signals transmitted through different paths among the multipath signals mentioned above. The value of A(τ) can be understood as the number of pulses with interference on data symbol #1 when there is multipath signal interference with a delay difference of τ chip time. Moreover, the larger the value of A(τ), the greater the number of pulses that interfere with data symbol #1; the smaller the value of A(τ), the smaller the number of pulses that interfere with data symbol #1. τ≥0 and τ is an integral number.

As mentioned above, the first signal and the second signal in Example 1 can be understood as signals transmitted through different paths among the multipath signals mentioned above. The following description takes the example that the time difference between the delay of the first signal and the second signal reaching the receiving device is an integer multiple of the chip time.

Example 2, do not consider the case of τ=0. Then, when τ≠0, the larger the value of A(τ), that is, the larger the periodic autocorrelation side lobe of the S sequence, the greater the number of interference pulses on data symbol #1; the value of A(τ) The smaller it is, that is, the smaller the periodic autocorrelation side lobe of the S sequence is, it means that the number of pulses with interference on data symbol #1 is smaller.

It should be understood that the smaller the periodic autocorrelation side lobes of the S sequence are, the smaller the maximum periodic autocorrelation side lobes of the S sequence are. Then when the maximum periodic autocorrelation side lobes of the S sequence reach its minimum value, all periodic autocorrelation side lobes of the S sequence are smaller than the minimum value of the maximum periodic autocorrelation side lobes. The following formula reasoning is used to determine the minimum value of the maximum periodic autocorrelation side lobe.

Assuming that the S sequence contains K 1's and LK 0's, according to Formula 1 and sequence design theory, the following Formula 2 and Formula 3 can be obtained.
A(0)=K (Formula 2)

According to Formula 2 and Formula 3, Formula 4 when τ≠0 can be obtained.

It can be seen from Formula 4 that when L and K remain unchanged, The value of is a fixed value, that is, the sum of the values of all periodic autocorrelation side lobes of the S sequence is a fixed value.

It should be understood that when the sum of the values of all periodic autocorrelation side lobes of the S sequence is a fixed value, if the side lobes of the periodic autocorrelation function of the S sequence are a constant value, then the maximum periodic autocorrelation side lobe of the S sequence reaches the minimum. value.

When the side lobe of the periodic autocorrelation function of the S sequence is a constant value, Formula 5 can be obtained.

in, Indicates the maximum periodic autocorrelation side lobe of the S sequence. expresses right Rounded up.

It can be seen from the above that the minimum value of the maximum periodic autocorrelation side lobe of the S sequence is or,

Then, according to the minimum value of the maximum periodic autocorrelation side lobe of the S sequence, the first threshold is determined as The S sequence that meets the following conditions can be the first sequence: the maximum periodic autocorrelation side lobe of the sequence is equal to or equal to or less than

Here are several ways to generate the first sequence.

Method 1: Generate a first sequence based on a second sequence whose periodic autocorrelation side lobes are constant values, and the second sequence includes L-1 elements.

The second sequence may be an m-sequence or a Legendre sequence. The autocorrelation function side lobes of the second sequence provided in this application are constant values.

The following takes the second sequence as an m-sequence as an example to introduce the method of generating the first sequence based on the second sequence.

The m sequence is also called the longest linear feedback shift register sequence. In this application, the m sequence is the sequence with the longest period generated by a linear feedback shift register (LFSR). The basic structure of LFSR is shown in Figure 8. In Figure 8, D represents the shift register and + represents binary addition. Generally, the output result G(X) of the LFSR shown in Figure 8 can be expressed by a polynomial as shown below:
G(X)＝g _m X ^m +g _m-1 X ^m-1 +…+g ₁ X+g ₀ (Formula 6)

Among them, g _i is the feedback coefficient, its value is 0 or 1, and it is a binary number. When it is 0, it indicates that the feedback branch does not exist, and when it is 1, it indicates that the feedback branch exists. As can be seen from Figure 8, the output of LFSR depends on the current state of the shift register. When its corresponding polynomial cannot be factored, that is, when G(X) cannot be written as the product of two polynomials, starting from the non-zero initial state, LFSR can traverse all 2 ^m -1 non-zero states, and During this period, a binary sequence with a length of 2 ^m -1 is output, which is the binary m sequence.

Moreover, the complementary sequence of the m sequence is the sequence obtained by replacing element 1 with 0 and 0 with 1 in the m sequence. Therefore, the periodic autocorrelation side lobe of the complementary sequence of the m sequence is also a constant value. The second sequence used to generate the first sequence may therefore also include the complement of the m-sequence. Similarly, when the second sequence includes a Legendre sequence, the second sequence may also include a complementary sequence of the Legendre sequence.

Considering that the data symbols in the UWB system generally include an even number of chips, the number of elements of the m-sequence and the Legendre sequence are both odd. In one implementation, one element is inserted into the second sequence containing L-1 elements to obtain a new sequence (hereinafter referred to as the fourth sequence for convenience of explanation). It should be understood that the fourth sequence may include multiple possible sequences. The sequence with the smallest maximum periodic autocorrelation function among the fourth sequences may be the first sequence.

The following takes m-sequences with lengths of 7, 15, or 31 as an example to give several examples of the first sequence generated based on the m-sequence. Table 2 shows m-sequences with lengths of 7, 15 or 31 respectively.

Table 2

It should be noted that the m sequences shown in Table 2 are only examples. Specifically, the sequence shown in Table 2 is one of equivalent sequences of the same length. The equivalent sequence can be understood as a sequence obtained by performing cyclic shift and/or reverse order operations on the sequence. Taking the m sequence of length 7 in Table 2 as an example, the equivalent sequence can be {0, 1, 0, 1, 1, 1, 0} obtained by cyclic shift, or {1, 1, 1, 0, 1, 0, 0}, or still So there are other equivalent sequences obtained by circular shift and reverse order operations. Other equivalent sequences of the m sequence can be obtained by performing cyclic shifts and/or reverse order operations on the sequences in Table 2.

Similarly, the complementary sequence of the m sequence may be a sequence obtained by inverting the m sequence shown in Table 2, or may be a sequence obtained by inverting other equivalent sequences of the m sequence shown in Table 2.

Whether the value of the one-bit element inserted in the second sequence is 0 or 1 can be determined based on the second sequence. For example, if the second sequence is an m sequence or its equivalent sequence, the inserted element value is 0; if the complementary sequence of the m sequence is selected, the inserted element value is 1. In other words, inserting one element into the second sequence results in a sequence in which the number of elements with a value of 0 is equal to the number of elements with a value of 1.

Table 3 shows examples of first sequences with lengths of 8, 16, and 32 respectively generated according to Table 2. In Table 3, the third column is the maximum periodic autocorrelation side lobe corresponding to the first sequence in the second column; the fourth column is the maximum periodic autocorrelation side lobe corresponding to the sequence length. The fifth column is the first threshold corresponding to the sequence length. Specifically, three first sequences with a sequence length of 8 in Table 3 are generated based on one second sequence with a sequence length of 7 in Table 2. Two first sequences with a sequence length of 16 in Table 3 are generated based on one second sequence with a sequence length of 15 in Table 2. The three first sequences with a sequence length of 32 in Table 3 are respectively generated based on the three second sequences with a sequence length of 31 in Table 2.

table 3

Alternatively, in an implementation manner, the first sequence may also be obtained by subjecting the sequence in Table 3 (for convenience of explanation, hereafter referred to as the third sequence #1) to the first process. The first processing includes at least one of circular shift, negation, and reverse order operations. For example, the first sequence may be the equivalent sequence of the third sequence #1.

The above-mentioned "one-to-one correspondence between chips carrying pulses and elements whose element values are specified values in the first sequence" will be introduced below in conjunction with Table 3 and Figure 9. Specifically, the chip carrying the pulse corresponds one-to-one to the element whose element value is 1 in the first sequence.

FIG. 9 is a schematic diagram showing an example of the correspondence relationship between data symbol #1 and the first sequence. As shown in Figure 9, the structure of data symbol #1 of the UWB system is constructed according to the first sequence. Data symbol #1 contains 8 chips, and the sequence {0, 0, 0, 1, 0, 1, 1, 1} in Table 3 is selected as the first sequence. The two-way arrow in Figure 9 indicates the location of the pulse (burst), each box represents a chip (chip), and the time occupied by each box is one chip time, that is, T _chip . Data symbol #1 takes up time T _dsym .

It should be noted that this application does not limit the number of pulses in data symbol #1 occupied by each bit. For example, The structure of the data symbol can be similar to that shown in Figure 2, with each bit occupying 4 pulses in data symbol #1. For another example, the structure of the data symbol shown in FIG. 5 may be similar, with each bit occupying 2 pulses in data symbol #1. Alternatively, each bit may occupy 1 pulse in data symbol #1, or the number of pulses in data symbol #1 occupied by each bit may also be other values.

It should also be noted that the first signal may include one or more PPDUs as shown in Figure 2, and the PHY bearer field in one PPDU can carry N data symbols as shown in Figure 9. In FIG. 9 , only one data symbol among N data symbols is used as an example for explanation.

Similarly, the structure of data symbol #2 and the corresponding relationship between data symbol #2 and the first sequence can also be referred to Figure 9 .

Method 2: Based on the genetic algorithm and the coordinate descent algorithm, a sequence with a maximum periodic autocorrelation function side lobe less than or equal to the first threshold is searched for as the first sequence.

Figure 10 shows a schematic block diagram of a genetic algorithm applicable to this application. As shown in Figure 10, each individual in the initialization population is a potential solution, or, a potential first sequence. In the second method, each individual is a sequence of length L or containing L elements. Evaluate the fitness of individuals in the population: The quality of the solution can be expressed based on fitness (that is, the function value of the fitness function). For example, the fitness function in method 2 is The smaller the function value of f(x), the better the solution; the larger the function value of f(x), the worse the solution. Selection: Select a better solution based on the fitness function, and give priority to pairwise reproduction. Crossover: Select a hybridization point and exchange chromosomes on both sides. For example, in method 2, the parent sequence and the descendant sequence are merged. Mutation: Each position will have a small probability of mutation. For example, in method two, the parent sequence is mutated to generate a descendant sequence.

The coordinate descent method (coordinate descent, CD) applicable to this application is a non-gradient optimization algorithm. This algorithm performs a one-dimensional search along a coordinate direction at the current point in each iteration to find the local minimum of a function. Cycle through different coordinate directions throughout the process.

A specific algorithm example is given below for method 2.

The initialization parameters include: the number of parent sequences N _P , the number of descendant sequences N _O , the number of restarted evolutions G _RS , the maximum number of evolutions G _max , the number of individuals generated by reset evolution N _RS , and the current number of evolutions k=1.

Initialization parameters can be understood as a specific example of the initialization population mentioned above.

Step 1: Randomly generate N _P parent sequences x _i , i=1,2,L N _P . Use CD to perform local search on N _P parent sequences x _i to obtain the set {P=( _xi , f _P (i))|i=1,2,L N _P }.

For example, step 1 can be understood as a specific example of the coordinate descent algorithm.

Step 2: Start the evolution iteration, and randomly select N _O sequences x _k from the set P, k=1,2, L N _O . Mutating two positions in each of the N _O sequences x _k generates a daughter sequence x _k '. It will be appreciated that mutations can be made at all possible two positions in each sequence. Use CD to perform a local search on the descendant sequence x _k ', and obtain the set {O'=(x _k ',f _O (k))|k=1,2,L N _O }. Among them, the set O' is the set of N _O sequences with the best fitness (that is, the function value of the fitness function is the smallest) among the descendant sequences x _k ', and their corresponding fitness function values.

Arrange the set P∪O in ascending order according to the function value of the fitness function f _O (k), select the top N _P individuals to form a new parent set P, and set k=k+1.

For example, step 2 can be understood as a specific example of the combination of coordinate descent algorithm, selection, crossover, and mutation.

Step 3. If mod(k,N _RS )≠0, skip step 3. Among them, mod(k,N _RS ) means that k modulates N _RS . If mod(k, N _RS )=0, re-randomly generate N _RS parent sequences x _i , i= _NP +1, N _P +2, L N _P +N _RS . _Use CD to perform a local search on N _RS parent sequences x _i , and obtain the set {( _xi , f _RS (i))|i=NP +1, N _P +2, L N _P +N _RS }. Merge the set {( _xi ,f _RS (i))|i= _NP +1, N _P +2, L N _P +N _RS } with the new parent sequence set P generated in step 2 Obtain the sequence set {P=P∪(x _i , f _P (i))|i= _NP +1, N _P +2, L N _P +N _RS }.

For example, step 3 can be understood as a specific example of evolution.

Step 4, repeat step 2 until k ≥ G _max , end the program. The set P obtained when the program ends is the target sequence set. Output the sequence corresponding to the target sequence set, which is the first sequence.

Table 4 shows examples of first sequences with lengths of 8, 16, and 32 respectively generated according to the above algorithm example. Among them, the third column is the maximum periodic autocorrelation side lobe corresponding to the first sequence in the second column; the fourth column is the maximum periodic autocorrelation side lobe corresponding to the sequence length. The fifth column is the first threshold corresponding to the sequence length.

Table 4

Alternatively, in an implementation manner, the first sequence may also be obtained by performing the first processing on the sequence in Table 4 (for convenience of explanation, hereafter referred to as the third sequence #2). The first processing includes at least one of circular shift, negation, and reverse order operations. For example, the first sequence may be the equivalent sequence of the third sequence #2.

The above-mentioned "one-to-one correspondence between chips carrying pulses and elements whose element values are specified values in the first sequence" will be introduced below in conjunction with Table 4 and Figure 11. Specifically, the chip carrying the pulse corresponds one-to-one to the element whose element value is 1 in the first sequence.

FIG. 11 is a schematic diagram showing an example of the correspondence relationship between data symbol #1 and the first sequence. As shown in FIG. 11, the structure of data symbol #1 of the UWB system is constructed according to the first sequence. Data symbol #1 contains 8 chips, and the sequence {0, 0, 0, 1, 1, 0, 1, 1} in Table 4 is selected as the first sequence.

The two-way arrow in Figure 11 indicates the location of the pulse (burst), each box represents a chip (chip), and the time occupied by each box is one chip time, that is, T _chip . Data symbol #1 takes up time T _dsym .

It should be noted that this application does not limit the number of pulses in data symbol #1 occupied by each bit. For example, the structure of the data symbol shown in FIG. 2 may be similar, with each bit occupying 4 pulses in data symbol #1. For another example, the structure of the data symbol shown in FIG. 5 may be similar, with each bit occupying 2 pulses in data symbol #1. Alternatively, each bit may occupy 1 pulse in data symbol #1, or the number of pulses in data symbol #1 occupied by each bit may also be other values.

It should also be noted that the first signal may include one or more PPDUs as shown in Figure 2, and the PHY bearer field in one PPDU can carry N data symbols as shown in Figure 11. In Figure 11, only one data symbol among N data symbols is used as an example for explanation.

Similarly, the structure of data symbol #2 and the corresponding relationship between data symbol #2 and the first sequence can also be referred to Figure 11.

Some examples of the first sequence of length 16 generated according to the above algorithm examples are given below in conjunction with Table 5.

table 5

Alternatively, in an implementation manner, the first sequence may also be obtained by first processing the sequence in Table 5 (for convenience of explanation, hereafter referred to as third sequence #2). The first processing includes at least one of circular shift, negation, and reverse order operations. For example, the first sequence may be the equivalent sequence of the third sequence #2.

It can be understood that, in order to implement the functions in the above embodiments, the sending device and the receiving device include corresponding hardware structures and/or software modules that perform each function. Those skilled in the art should easily realize that the units and method steps of each example described in conjunction with the embodiments disclosed in this application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed by hardware or computer software driving the hardware depends on the specific application scenarios and design constraints of the technical solution.

Figures 12 and 13 are schematic structural diagrams of possible communication devices provided by embodiments of the present application. These communication devices can be used to implement the functions of the sending device or the receiving device in the above method embodiments, and therefore can also achieve the beneficial effects of the above method embodiments. In the embodiment of the present application, the communication device may be a sending device or a receiving device, or may be a module (such as a chip) applied to the sending device or the receiving device.

As shown in FIG. 12 , the communication device 1100 includes a processing unit 1110 and a transceiver unit 1120 . The communication device 1100 is used to implement the functions of the sending device or the receiving device in the method embodiments shown in FIGS. 7 to 11 .

When the communication device 1100 is used to implement the function of the receiving device in the method embodiment shown in Figure 7: the transceiving unit 1120 is used to receive the first signal, which is obtained according to the first sequence and N data symbols, The first sequence includes L elements, the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, each of the N data symbols includes L sequentially arranged chips, and the L The sequentially arranged chips include pulse-carrying chips, and the pulse-carrying chips correspond one-to-one to the elements in the first sequence whose element values are specified values. N and L are both positive integers; the transceiver unit 1120 also used to parse the first signal.

When the communication device 1100 is used to implement the function of the sending device in the method embodiment shown in Figure 7: the processing unit 1110 is used to generate a first signal according to a first sequence and N data symbols, where the first sequence contains L elements , the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, each of the N data symbols includes L sequentially arranged chips, and the L sequentially arranged chips include Chips carrying pulses are in one-to-one correspondence with elements in the first sequence whose element values are specified values, and N and L are both positive integers; the transceiver unit 1120 is used to send the first signal.

For a more detailed description of the processing unit 1110 and the transceiver unit 1120, please refer to the relevant descriptions in the method embodiments shown in FIGS. 7 to 11 .

As shown in FIG. 13 , the communication device 1200 includes a processor 1210 and an interface circuit 1220 . The processor 1210 and the interface circuit 1220 are coupled to each other. It can be understood that the interface circuit 1220 may be a transceiver or an input-output interface. Optionally, the communication device 1200 may also include a memory 1230 for storing instructions executed by the processor 1210 or input data required for the processor 1210 to run the instructions or data generated after the processor 1210 executes the instructions.

When the communication device 1200 is used to implement the method shown in Figure 13, the processor 1210 is used to implement the functions of the above-mentioned processing unit 1110, and the interface circuit 1220 is used to implement the functions of the above-mentioned transceiver unit 1120.

When the above communication device is a chip applied to a receiving device, the receiving device chip implements the functions of the receiving device in the above method embodiment. The receiving device chip receives data from other modules in the receiving device (such as radio frequency modules or antennas). Information is sent by the sending device or to the receiving device; or the receiving device chip sends information to other modules (such as radio frequency modules or antennas) in the receiving device, and the information is sent by the receiving device to the sending device.

When the above communication device is a chip applied to a sending device, the terminal chip implements the functions of the sending device in the above method embodiment. The chip of the sending device receives information from other modules (such as radio frequency modules or antennas) in the sending device, and the information is sent by the receiving device to the sending device; or, the chip of the sending device sends information to other modules (such as radio frequency modules) in the base station. or antenna) to send information, which is sent by the sending device to the receiving device.

It can be understood that the processor in the embodiment of the present application can be a central processing unit (Central Processing Unit, CPU), or other general-purpose processor, digital signal processor (Digital Signal Processor, DSP), or application specific integrated circuit. (Application Specific Integrated Circuit, ASIC), Field Programmable Gate Array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. A general-purpose processor can be a microprocessor or any conventional processor.

The method steps in the embodiments of the present application can be implemented in hardware or in software instructions that can be executed by a processor. Software instructions can be composed of corresponding software modules, and the software modules can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory In memory, register, hard disk, mobile hard disk, CD-ROM or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from the storage medium and write information to the storage medium. The storage medium may also be an integral part of the processor. The processor and storage media may be located in an ASIC. Additionally, the ASIC can be located in the base station or terminal. The processor and storage medium may also exist as discrete components in the base station or terminal.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on the computer, the processes or functions described in the embodiments of the present application are executed in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, a network device, a user equipment, or other programmable device. The computer program or instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer program or instructions may be transmitted from a website, computer, A server or data center transmits via wired or wireless means to another website site, computer, server, or data center. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available media may be magnetic media, such as floppy disks, hard disks, and tapes; optical media, such as digital video optical disks; or semiconductor media, such as solid-state hard drives. The computer-readable storage medium may be volatile or nonvolatile storage media, or may include both volatile and nonvolatile types of storage media.

In the various embodiments of this application, if there is no special explanation or logical conflict, the terms and/or descriptions between different embodiments are consistent and can be referenced to each other. The technical features in different embodiments are based on their inherent Logical relationships can be combined to form new embodiments.

In this application, "at least one" refers to one or more, and "plurality" refers to two or more. "And/or" describes the relationship between associated objects, indicating that there can be three relationships, for example, A and/or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural. In the text description of this application, the character "/" generally indicates that the related objects before and after are an "or"relationship; in the formula of this application, the character "/" indicates that the related objects before and after are a kind of "division" Relationship. "Including at least one of A, B and C" can mean: Includes A; includes B; includes C; includes A and B; includes A and C; includes B and C; includes A, B, and C.

It can be understood that the various numerical numbers involved in the embodiments of the present application are only for convenience of description and are not used to limit the scope of the embodiments of the present application. The size of the serial numbers of the above processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic.

Claims (26)

1. A signal processing method, characterized by including:

   Receive a first signal, the first signal is obtained based on a first sequence and N data symbols, the first sequence contains L elements, and the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, each of the N data symbols includes L sequentially arranged chips, and the L sequentially arranged chips include pulse-carrying chips, and the pulse-carrying chips are consistent with the The elements in the first sequence whose element values are the specified values correspond one to one, and N and L are both positive integers;

   Parse the first signal.
2. A signal processing method, characterized by including:

   A first signal is generated according to a first sequence and N data symbols, the first sequence contains L elements, the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to a first threshold, and among the N data symbols Each data symbol includes L sequentially arranged chips, and the L sequentially arranged chips include pulse-carrying chips, and the pulse-carrying chips have a specified value with the element in the first sequence. The elements of the value correspond one to one, and N and L are both positive integers;

   Send the first signal.
3. The method according to claim 1 or 2, characterized in that the prescribed value is 1, among the L elements of the first sequence, K elements are 1, L-K elements are 0, and the first threshold It is obtained based on K and L, K≤L and K is a positive integer.
4. The method according to any one of claims 1 to 3, characterized in that the first threshold is expresses right Rounded up.
5. The method of claim 4, wherein the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to a first threshold, including:

   The maximum periodic autocorrelation side lobe of the first sequence is equal to or equal to or less than
6. The method according to any one of claims 1 to 5, characterized in that the first sequence is obtained according to a second sequence containing L-1 elements, and the periodic autocorrelation side lobes of the second sequence are is a constant value.
7. The method of claim 6, wherein the second sequence is an m-sequence or a Legendre sequence.
8. The method according to claim 6 or 7, characterized in that the first sequence is obtained according to a second sequence containing L-1 elements, including:

   The first sequence is obtained by performing first processing on a third sequence containing L elements, and the first processing includes at least one of circular shift, inversion, and negation;

   The third sequence is obtained based on the second sequence.
9. The method according to any one of claims 1 to 5, characterized in that the first sequence is obtained according to a genetic algorithm.
10. The method according to any one of claims 1 to 9, characterized in that, L=8, and the first sequence is:

    {0, 0, 0, 1, 0, 1, 1, 1}; or,

    {0, 0, 1, 0, 0, 1, 1, 1}; or,

    {0, 0, 1, 0, 1, 0, 1, 1}; or,

    {0, 0, 0, 1, 1, 0, 1, 1}.
11. The method according to any one of claims 1 to 9, characterized in that, L=16, and the first sequence is:

    {0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 1, 1, 1}; or,

    {1,1,1,1,0,1,1,0,0,1,0,1,0,0,0,0}; or,

    {0,0,0,1,0,1,1,1,1,0,0,1,1,0,1,0}

    {1,0,0,1,0,1,0,1,0,0,1,1,1,1,0,0}.
12. The method according to any one of claims 1 to 9, characterized in that, L=32, and the first sequence is:

    {0,0,0,1,1,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0 ,0,0,1,1,1,1,1}; or,

    {0,0,1,0,1,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0 ,0,0,1,1,1,1,1}; or,

    {0,0,1,1,0,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0 ,0,0,1,1,1,1,1}; or,

    {1,0,1,1,0,1,0,0,0,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,1 ,0,0,0,1,1,1,0}.
13. A signal processing device, characterized by including:

    A transceiver unit configured to receive a first signal. The first signal is obtained based on a first sequence and N data symbols. The first sequence contains L elements. The maximum periodic autocorrelation side lobe of the first sequence is Less than or equal to the first threshold, each of the N data symbols includes L sequentially arranged chips, and the L sequentially arranged chips include pulse-carrying chips. The chips correspond one-to-one to the elements in the first sequence whose element values are specified values, and N and L are both positive integers;

    A processing unit configured to analyze the first signal.
14. A signal processing device, characterized by including:

    A transceiver unit configured to generate a first signal based on a first sequence and N data symbols, the first sequence including L elements, the maximum periodic autocorrelation side lobe of the first sequence being less than or equal to a first threshold, the Each of the N data symbols includes L sequenced chips including pulse-carrying chips that are identical to the first sequence The elements whose element values are the specified values correspond one to one, and N and L are both positive integers;

    A processing unit configured to send the first signal.
15. The device according to claim 13 or 14, characterized in that the prescribed value is 1, among the L elements of the first sequence, K elements are 1, L-K elements are 0, and the first threshold It is obtained based on K and L, K≤L and K is a positive integer.
16. The device according to any one of claims 13 to 15, characterized in that the first threshold is expresses right Rounded up.
17. The device according to claim 16, wherein the maximum periodic autocorrelation side lobe of the first sequence is less than or equal to the first threshold, including:

    The maximum periodic autocorrelation side lobe of the first sequence is equal to or equal to or less than
18. The device according to any one of claims 13 to 17, characterized in that the first sequence is obtained according to a second sequence containing L-1 elements, and the periodic autocorrelation side lobes of the second sequence is a constant value.
19. The device according to claim 18, wherein the second sequence is an m-sequence or a Legendre sequence.
20. The device according to claim 18 or 19, characterized in that the first sequence is obtained according to a second sequence containing L-1 elements, including:

    The first sequence is obtained by performing first processing on a third sequence containing L elements, and the first processing includes at least one of circular shift, inversion, and negation;

    The third sequence is obtained based on the second sequence.
21. The device according to any one of claims 13 to 19, characterized in that the first sequence is obtained according to a genetic algorithm.
22. The device according to any one of claims 13 to 21, characterized in that, L=8, and the first sequence is:

    {0, 0, 0, 1, 0, 1, 1, 1}; or,

    {0, 0, 1, 0, 0, 1, 1, 1}; or,

    {0, 0, 1, 0, 1, 0, 1, 1}; or,

    {0, 0, 0, 1, 1, 0, 1, 1}.
23. The device according to any one of claims 13 to 21, characterized in that, L=16, and the first sequence is:

    {0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 1, 1, 1}; or,

    {1,1,1,1,0,1,1,0,0,1,0,1,0,0,0,0}; or,

    {0,0,0,1,0,1,1,1,1,0,0,1,1,0,1,0}

    {1,0,0,1,0,1,0,1,0,0,1,1,1,1,0,0}.
24. The device according to any one of claims 13 to 21, characterized in that, L=32, and the first sequence is:

    {0,0,0,1,1,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0 ,0,0,1,1,1,1,1}; or,

    {0,0,1,0,1,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0 ,0,0,1,1,1,1,1}; or,

    {0,0,1,1,0,0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0 ,0,0,1,1,1,1,1}; or,

    {1,0,1,1,0,1,0,0,0,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,1 ,0,0,0,1,1,1,0}.
25. A communication device, characterized by including:

    Memory, used to store computer instructions;

    A processor, configured to execute computer instructions stored in the memory, so that the communication device performs the method as described in any one of claims 1 and 3 to 12, or performs the method as described in any one of claims 2 to 12 method described in the item.
26. A computer-readable storage medium, characterized in that it is used to store a computer program, the computer program includes instructions for implementing the method according to any one of claims 1 and 3 to 12, or the computer The program includes instructions for implementing a method as claimed in any one of claims 2 to 12.