WO2024041576A1 - Procédé et système de migration en direct pour machine virtuelle, dispositif, et support de stockage - Google Patents

Procédé et système de migration en direct pour machine virtuelle, dispositif, et support de stockage Download PDF

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Publication number
WO2024041576A1
WO2024041576A1 PCT/CN2023/114506 CN2023114506W WO2024041576A1 WO 2024041576 A1 WO2024041576 A1 WO 2024041576A1 CN 2023114506 W CN2023114506 W CN 2023114506W WO 2024041576 A1 WO2024041576 A1 WO 2024041576A1
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Prior art keywords
host
dirty
acceleration device
round
rdma
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PCT/CN2023/114506
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English (en)
Chinese (zh)
Inventor
田殿臣
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阿里云计算有限公司
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Publication of WO2024041576A1 publication Critical patent/WO2024041576A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G06F2009/4557—Distribution of virtual machine instances; Migration and load balancing

Definitions

  • This application relates to the field of cloud computing technology, and in particular to a method, device, system and storage medium for live migration of virtual machines.
  • the memory is large and the dirty page rate is extremely high. Under normal networks, it is difficult for live migration to achieve iterative convergence.
  • Various aspects of this application provide a method, equipment, system and storage medium for live migration of a virtual machine to improve the problem of resource occupation of the source host by the live migration of the virtual machine.
  • Embodiments of the present application provide a live migration system for virtual machines, including: a source host, its corresponding first acceleration device, and a destination host;
  • the first acceleration device is configured to read dirty page information from the source host during the live migration process; search for source address information of dirty pages to be transmitted in this round based on the dirty page information; The address information is sent to the destination host;
  • the destination host is used to obtain the source address information; initiate a dirty page read request based on the source address information; and use the first acceleration device to obtain dirty pages to be transmitted in this round from the source host. .
  • Embodiments of the present application also provide a method for live migration of a virtual machine, which is suitable for the first acceleration device configured for the source host.
  • the method includes:
  • the read dirty page to be transmitted in this round is provided to the destination host in response to the dirty page read request.
  • Embodiments of the present application also provide a method for live migration of a virtual machine, which is suitable for a second acceleration device configured for the destination host.
  • the method includes:
  • the dirty page read request initiated by the destination host based on the source address information use the first acceleration device to read the dirty pages to be transmitted in this round from the source host;
  • the acquired dirty pages to be transferred in this round are written into the destination host.
  • Embodiments of the present application also provide an acceleration device that is connected to the source host and includes a dirty page iteration component and a communication component;
  • the dirty page iteration component is used to read dirty page information from the source host during the live migration process; search the source address information of the dirty page to be transmitted in this round based on the dirty page information; The address information is sent to the destination host for the destination host to initiate a dirty page read request based on the source address information;
  • the communication component is used to read the dirty pages to be transmitted in this round from the source host; send the read dirty pages to be transmitted in this round to the destination host through the communication component in response to The dirty page read request.
  • Embodiments of the present application also provide an acceleration device that is connected to the destination source host and includes a dirty page iteration component and a communication component;
  • the dirty page iteration component is configured to receive the source address information of dirty pages to be transmitted in this round provided by the first acceleration device configured for the source host during the live migration process; and provide the source address information to the destination. host machine;
  • the communication component is configured to use the first acceleration device to read the dirty pages to be transmitted in this round from the source host according to the dirty page read request initiated by the destination host based on the source address information. ;Write the obtained dirty pages to be transferred in this round into the destination host.
  • Embodiments of the present application also provide a computer-readable storage medium that stores computer instructions.
  • the computer instructions are executed by one or more processors, the one or more processors are caused to perform the aforementioned live migration of the virtual machine. method.
  • acceleration devices there are acceleration devices corresponding to the source host and the destination host respectively.
  • the acceleration device reads dirty page information from the source host during the live migration process. ; Find the source address information of the dirty page to be transmitted in this round based on the dirty page information; send the source address information to the destination host side; and on the destination host side, the source address information can be obtained; based on the source address A dirty page read request is initiated based on the information, and the acceleration device on the source host side is used to read the dirty pages to be transmitted in this round from the source host.
  • an acceleration device By configuring an acceleration device on the source host side, all the live migration work of the control plane and data plane can be moved to the acceleration device for execution. Only the destination host and The live migration work can be completed with the cooperation of acceleration equipment, which realizes the zero dependence of the live migration work on the source host resources. Even when the source host computing resources are all occupied, the performance of the live migration will not be affected, and the hot migration will not be affected.
  • the migration feature implements zero jitter for running virtual machines on the source host.
  • Figure 1a is a schematic structural diagram of a virtual machine live migration system provided by an exemplary embodiment of the present application
  • Figure 1b is a schematic structural diagram of another virtual machine live migration system provided by an exemplary embodiment of the present application.
  • Figure 2 is a schematic diagram of a hardware implementation of an acceleration device provided by an exemplary embodiment of the present application
  • Figure 3 is a schematic flowchart of a virtual machine live migration method provided by another exemplary embodiment of the present application.
  • Figure 4 is a schematic flowchart of another virtual machine live migration method provided by another exemplary embodiment of the present application.
  • Figure 5 is a schematic structural diagram of an acceleration device provided by another exemplary embodiment of the present application.
  • Figure 6 is a schematic structural diagram of another acceleration device provided by yet another exemplary embodiment of the present application.
  • acceleration devices there are acceleration devices corresponding to the source host and the destination host respectively.
  • the acceleration device reads data from the source host during the live migration process. Get the dirty page information; find the source address information of the dirty page to be transmitted in this round based on the dirty page information; send the source address information to the destination host side; and on the destination host side, the source address information can be obtained ; Initiate a dirty page read request based on the source address information, and use the acceleration device on the source host side to read the dirty pages to be transmitted in this round from the source host.
  • an optimization solution for the traditional live migration architecture is provided.
  • an acceleration device on the source host side
  • all the live migration work of the control plane and data plane can be offloaded on the source host side. It is executed on the acceleration device, and the hot migration work can be completed only by the cooperation of the destination host and the acceleration device.
  • This realizes the zero dependence of the hot migration work on the resources of the source host, even when the computing resources of the source host are all occupied. In this case, the performance of live migration is not affected, and the live migration function achieves zero jitter for the virtual machines running on the source host.
  • Figure 1a is a schematic structural diagram of a virtual machine live migration system provided by an exemplary embodiment of the present application. As shown in the picture As shown in 1a, the system includes: a source host, its corresponding first acceleration device, and a destination host.
  • the virtual machine live migration system provided in this embodiment inherits the traditional pre-copy live migration solution and improves it.
  • the pre-copy live migration scheme is that the source host sends the memory data to the destination host through iteration. All memory data is sent in the first round of iteration, and the dirty pages in the previous round of pre-copying are sent in each subsequent round. , the last round is the shutdown copy stage, the source host is suspended, memory update is stopped, and the dirty pages are copied to the destination host as a whole.
  • the virtual machine migration system provided in this embodiment improves both the dirty page iteration process and the dirty page transmission process in the pre-copy live migration solution.
  • the source host refers to the host where the virtual machine to be migrated is located, and the destination host is the host to which the virtual machine to be migrated is to be migrated.
  • the pre-copy hot migration solution multiple rounds of migration are required.
  • this embodiment will describe the technical solution from the perspective of one of the migration processes. It should be understood that the same technical solution can be used to implement migration during each round of migration. What is special is the first round of migration process in the pre-copy live migration solution. In the first round of migration process, all memory pages in the dirty page information can be considered as dirty pages without performing a dirty page search operation. On this basis, all memory data in the source host can be migrated to the destination host according to the technical solution provided in this embodiment.
  • the first acceleration device configured for the source host can read dirty page information from the source host during the live migration process.
  • Dirty page information can be used to store flags indicating whether several memory pages allocated to a virtual machine are dirty pages.
  • the first acceleration device can be externally connected to the source host, and of course, can also be integrated in the source host.
  • This embodiment does not limit the actual connection methods of the two parties.
  • a dirty page bitmap can be used as the dirty page information, and the dirty page bitmap can be a binary sequence. It should be understood that the dirty page information in this embodiment can also adopt other information forms, and is not limited to dirty page bitmaps.
  • the virtual machine corresponds to a dirty page bitmap containing 128 bits.
  • the ones bit represents whether a memory page is a dirty page. If the first bit of the dirty page bitmap is 1, it means that the first memory page is a dirty page; if the second bit of the dirty page bitmap is 0, it means that the second bit of the memory page is dirty. memory page is not a dirty page.
  • the dirty page bitmap exists on the source host and can usually be maintained by KVM (Kernel-based Virtual Machine, kernel-based virtual machine) on the source host.
  • the dirty page iteration process (that is, the work of the control plane) in the pre-copy live migration solution can be all moved to the first acceleration device.
  • the source address information of the dirty pages to be transmitted in this round can be searched based on the dirty page information.
  • the first acceleration device may traverse the dirty page information, that is, scan the dirty page information bit by bit to discover the source address information of the dirty page.
  • the source address information is used to represent the location of dirty pages in the memory space of the source host.
  • the dirty page iteration process will be completely decoupled from the source host.
  • the process has zero dependence on the resources in the source host, that is, the process does not need to occupy the CPU resources in the source host.
  • the first acceleration device may send the source address information of the dirty pages to be transmitted in this round to the destination host.
  • a customized hot migration program can be run on the destination host. Since there will be a large number of idle resources on the destination host before the hot migration is completed, in this embodiment, a customized hot migration program on the destination host can be used. idle resources to support the operation of the live migration program. For example, the destination host usually reserves CPU resources for the virtual machines to be migrated. In this embodiment, the live migration program can use the CPU resources designated for the migrated virtual machines on the destination host to support the hot migration. Run the migration program. It should be understood that before the migration of the virtual machine is completed, the CPU resources designated for the migrated virtual machine are idle and available. Of course, this is only exemplary. In this embodiment, other idle resources on the destination host can also be used to support the running of the live migration program thereon, and this embodiment does not limit this.
  • the destination host can cooperate with the first acceleration device based on the customized live migration program running on it to implement the dirty page transmission process (that is, the data plane work) in the pre-copy live migration.
  • the destination host can initiate a dirty page read request based on the obtained source address information. Since this embodiment has changed the architecture in which the source host actively pushes dirty pages in the traditional solution, here, the destination host can also assign the destination address information of the dirty pages to be transmitted in this round to the destination host. It is also carried in the dirty page read request so that after the dirty page is read back, it can be written to the correct location in the memory space of the destination host.
  • the address allocated for memory data on the source host and the address reserved for memory data on the destination host usually correspond one-to-one. Therefore, the destination host can receive the source address information. Based on this correspondence, the destination address corresponding to the dirty page can be found conveniently and quickly, and carried in the dirty page read request.
  • Figure 1b is a schematic structural diagram of another virtual machine live migration system provided by an exemplary embodiment of the present application.
  • a second acceleration device can also be configured on the destination host side.
  • the destination host also cooperates with the first acceleration device and the second acceleration device to implement pre- The dirty page transfer process in copy live migration (that is, the work of the data side).
  • the first acceleration device can send the source address information of the dirty page to be transmitted to the second acceleration device.
  • the received source address information can be provided to the destination host, and the destination host can be triggered to generate a dirty page read request.
  • the destination host can send the dirty page read request to its corresponding second acceleration device.
  • the first acceleration device can be used according to the dirty page read request initiated by the destination host.
  • the acceleration device reads the dirty pages to be transferred in this round from the source host. That is, the first acceleration device and the second acceleration device can cooperate with each other to respond to the dirty page read request initiated by the destination host.
  • the first acceleration device Since the first acceleration device is connected to the source host, the first acceleration device can read the dirty pages to be transmitted in this round from the source host and return them to the second acceleration device. It should be noted that in this embodiment, the first acceleration device and the second acceleration device cooperate with each other to read dirty pages to be transmitted in this round, and there is no need to limit the reading order of dirty pages.
  • the first acceleration device can read the dirty pages to be transmitted in this round from the source host in a direct memory access (DMA) manner; Dirty pages waiting for transmission are provided to the second acceleration device.
  • the DMA method can support the first acceleration device to successfully read the dirty pages to be transferred in this round from the source host without relying on the CPU resources of the source host. In this way, the dirty page transfer process will be completely decoupled from the source host.
  • the process has zero dependence on the resources in the source host, that is, the process does not need to occupy the CPU resources in the source host.
  • the first acceleration device can provide the dirty pages to be transferred in this round to the destination host.
  • the first acceleration device can return the dirty pages to be transmitted in this round to the second acceleration device; the second acceleration device can write the acquired dirty pages to be transmitted in this round. into the destination host.
  • the second acceleration device can write the dirty pages to be transferred in this round into the destination host in a direct memory access DMA manner.
  • the dirty page read request initiated by the destination host carries the destination address information of the dirty page on the destination host. Therefore, here, the second acceleration device can follow the destination address in the dirty page read request.
  • the information writes the received dirty pages to be transferred in this round to the corresponding address in the destination host.
  • the destination host can receive the dirty page to be transferred in this round written by its corresponding second acceleration device, thereby completing the migration of dirty pages in this round.
  • the source host CPU is not involved in the entire dirty page transfer process. Only the destination host CPU and the first acceleration device (and the second acceleration device in the preferred solution) are involved to complete the dirty page transfer. Therefore, on the one hand, zero consumption of CPU resources of the source host is achieved, and the virtual machines running on the source host will not experience business jitters due to contention for CPU resources; on the other hand, the performance of dirty page transmission will not be affected. Due to the limitation of the source host's CPU resources, dirty pages can be transported through the idle CPU on the destination host and the acceleration devices on both sides, so that the dirty page transmission performance can always be maintained at the peak of the hardware and the performance of dirty page transmission can be guaranteed.
  • acceleration devices there are acceleration devices corresponding to the source host and the destination host respectively.
  • the acceleration device reads dirty pages from the source host during the live migration process. information; search for the source address information of the dirty page to be transmitted in this round based on the dirty page information; send the source address information to the destination host side; and on the destination host side, the source address information can be obtained; based on the source A dirty page read request is initiated based on the address information, and the acceleration device on the source host side is used to read the dirty pages to be transmitted in this round from the source host.
  • an optimization solution for the traditional live migration architecture is provided.
  • remote direct memory access may be used to implement sinking of the dirty page transfer process.
  • the destination host can generate a remote direct memory access RDMA instruction as a dirty page read request based on the source address information and the destination address information assigned to the dirty page to be transferred in this round on the destination host;
  • the destination host can send a remote direct memory access command to the second acceleration device.
  • the first acceleration device can be used to read the dirty pages to be transmitted in this round from the source host in accordance with the remote direct memory access RDMA method.
  • the destination host can also use the first acceleration device to read the current round of dirty pages to be transferred from the source host in accordance with the remote direct memory access RDMA method.
  • FIG. 2 is a schematic diagram of a hardware implementation of an acceleration device provided by an exemplary embodiment of the present application.
  • the first acceleration device may include a first RDMA component
  • the second acceleration device may include a second RDMA component.
  • the RDMA component has RDMA communication capabilities.
  • programmable devices such as FPGA can be used to simulate RDMA components
  • RDMA network cards can also be used as RDMA components
  • other ASIC-based devices with RDMA capabilities can also be used as RDMA components.
  • the RDMA instructions issued by the destination host for each dirty page to be transmitted in this round can be stored in the sending queue; each RDMA The instructions are encapsulated into RDMA read messages and then sent to the receive queue maintained in the first RDMA component; for the first RDMA component, the source address information of the relevant dirty page can be parsed from the RDMA read message in the receive queue; The relevant dirty page read from the source host according to the source address information is encapsulated into an RDMA response message and sent to the second RDMA component. Specifically, it can be sent to a response queue maintained by the second RDMA component. In this way, the first RDMA component can assist the second RDMA component in reading the dirty pages to be transmitted in this round from the source host in accordance with the remote direct memory access RDMA method.
  • the completion queue can also be maintained in the second RDMA component.
  • the RDMA component can maintain the completion status of dirty pages to be transferred in this round in the completion queue.
  • a completion queue for dirty pages to be transmitted in this round can be pre-created in the second RDMA component.
  • the second RDMA component can fill in the corresponding dirty pages in the completion queue after completing the transmission of any dirty page in the queue.
  • the completion flag corresponding to the page so that the destination host can sense the completion status of each dirty page in the completion queue by pulling it.
  • the destination host can confirm that all dirty pages to be transferred in this round have been transferred, and can start the next round of migration. It should be understood that other methods can be used between the destination host and the second RDMA component to synchronize whether all dirty pages to be transferred in this round have been completed. For example, the second RDMA component can generate a A notification event is provided to the destination host so that the destination host can sense which dirty pages have been transferred and can independently determine whether all dirty pages to be transferred in this round have been completed, etc. This embodiment does not limit this.
  • the first RDMA component and the second RDMA component can maintain their respective related queues in accordance with the RDMA standard protocol and exchange related messages to respond to the RDMA command initiated by the destination host in an RDMA manner.
  • the first RDMA component and the second RDMA component can also respond to the RDMA request initiated by the destination host according to other customized transmission protocols. That is, the first RDMA component and the second RDMA component can also respond to the RDMA request initiated by the destination host according to other customized transmission protocols.
  • the details of the interaction between the two RDMA components are not limited to the above exemplary solution and will not be described in detail here.
  • the first acceleration device may also include the first dirty page. Iteration component, the second acceleration device may also include a second dirty page iteration component.
  • the dirty page iteration component can be implemented using a system-level SOC chip or a dedicated host.
  • the SOC chip can be called a system on a chip. It is a product, an integrated circuit with a dedicated purpose, which contains a complete system and all the contents of embedded software. Therefore, it is particularly suitable for the dirty page iteration process in this embodiment.
  • the logic is complex but the calculation amount is small.
  • the SCO chip can excellently complete the dirty page information traversal during the dirty page iteration process.
  • a dedicated host When a dedicated host is used to implement the dirty page iteration component, multiple source hosts can share the same dedicated host, and the dedicated host can provide dirty page iteration function support for different source hosts, for example. , this dedicated host can run different dirty page iteration processes for different source hosts to isolate the dirty page iteration work corresponding to different source hosts.
  • the working logic of each dirty page iteration process can refer to the first acceleration device mentioned above. The description of the dirty page iteration process will not be repeated here.
  • the first dirty page iteration component can be responsible for reading the dirty page information from the source host during the live migration process, and searching the source address information of the dirty pages to be transmitted in this round based on the dirty page information. , and operations such as sending the source address information to the second acceleration device; the second dirty page iteration component is responsible for providing the source address information to the destination host.
  • the aforementioned RDMA component can be used as a hardware bridge between the dirty page iteration component and the source/destination host.
  • the first dirty page iteration component can use the first RDMA component as a hardware bridge (for example, FPGA channel) to read dirty page information from the source host, and the second dirty page iteration component and the destination host can also use a second RDMA
  • the component acts as a hardware bridge to transfer the address information of dirty pages to be transmitted in this round, etc.
  • this is only exemplary, and this embodiment is not limited thereto.
  • the acceleration device may include an RDMA component and a dirty page iteration component.
  • the dirty page iteration component may be used in the sinking dirty page iteration process, and the RDMA component may be used in the sinking dirty page transmission process.
  • TCP can be used to implement the dirty page transmission process.
  • the acceleration device can be implemented using a SOC chip or a dedicated host.
  • the RDMA component no longer needs to be configured in the acceleration device.
  • the SOC chip or dedicated host corresponding to the source host can directly read the dirty page information and dirty pages to be transmitted from the source host through DMA and other methods, and the acceleration devices at both ends can interact through the TCP protocol.
  • the SOC chip external to the destination host or the dedicated host can directly receive the dirty page read request from the destination host through DMA or other methods or write the dirty pages to be transferred in this round to the destination host.
  • This embodiment does not limit the communication method used in the dirty page transmission process.
  • appropriate hardware forms can be used to implement the acceleration device.
  • communication methods such as RDMA can be used to implement the dirty page transmission process in virtual machine live migration.
  • the entire process does not require the participation of the source host, ensuring zero dependence on the source host.
  • the dirty page transfer process can be completed unilaterally on the destination host, achieving a pre-copy hot migration effect similar to post-copy, that is, the work that originally needs to be performed in the source host is transferred to the destination host To execute, this can achieve zero occupation of source host resources.
  • it can eliminate the virtual machine jitter problem caused by live migration.
  • it can make the live migration performance independent of the CPU resources in the source host, thereby stabilizing Maintain high performance for thermal migration.
  • FIG 3 is a schematic flowchart of a virtual machine live migration method provided by another exemplary embodiment of the present application.
  • the method can be executed by an acceleration device.
  • the acceleration device can be implemented as a combination of software and/or hardware.
  • the acceleration device can Integrated into the first acceleration device configured for the source host. Referring to Figure 3, the method includes:
  • Step 300 During the live migration process, read dirty page information from the source host;
  • Step 301 Find the source address information of the dirty pages to be transmitted in this round based on the dirty page information
  • Step 302 Send the source address information to the destination host, so that the destination host can initiate a dirty page read request based on the source address information;
  • Step 303 Read the dirty pages to be transmitted in this round from the source host
  • Step 304 Send the read dirty page to be transmitted in this round to the destination host in response to the dirty page read request.
  • step 302 includes:
  • Step 304 includes: sending the read dirty pages to be transmitted in this round to the second acceleration device to cooperate with the second acceleration device in responding to the dirty page read request.
  • step 303 may include:
  • the dirty pages to be transferred in this round are read from the source host.
  • the destination host can generate a remote direct memory access RDMA instruction as a dirty page read request based on the source address information and the destination address information assigned to the dirty page to be transferred in this round on the destination host; and sends the remote direct memory access command to the second acceleration device;
  • the step of sending the read dirty pages to be transferred in this round to the second acceleration device may include: sending the read dirty pages to be transferred in this round to the second acceleration device in a remote direct memory access RDMA manner.
  • the first acceleration device includes a first RDMA component
  • the second acceleration device includes a second RDMA component
  • the method specifically includes:
  • the RDMA read message sent by the second RDMA component is stored in the receiving queue.
  • the RDMA read message is caused by the second RDMA component storing the RDMA instructions issued by the destination host for each dirty page to be transmitted in this round into the sending queue and processing Generated by encapsulating each RDMA instruction;
  • the first RDMA component and the second RDMA component are implemented using an FPGA, an RDMA network card, or other ASIC-based devices with RDMA capabilities.
  • the first acceleration device further includes a first dirty page iteration component
  • the second acceleration device further includes a second dirty page iteration component
  • the first dirty page iteration component is responsible for steps 300-302.
  • the first dirty page iteration component and the second dirty page iteration component adopt system-level SOC chips. Or a dedicated host for implementation.
  • the first acceleration device and the second acceleration device are implemented using a SOC chip or a dedicated host.
  • the first acceleration device and the second acceleration device read the current cycle from the source host according to the TCP protocol. Dirty pages to be transferred.
  • FIG 4 is a schematic flowchart of another live migration method of a virtual machine provided by another exemplary embodiment of the present application.
  • the method can be executed by an acceleration device.
  • the acceleration device can be implemented as a combination of software and/or hardware.
  • the acceleration device Can be integrated into the second acceleration device configured for the destination host. Referring to Figure 4, the method includes:
  • Step 400 During the live migration process, receive the source address information of the dirty pages to be transmitted in this round provided by the first acceleration device configured for the source host;
  • Step 401 Provide the source address information to the destination host
  • Step 402 According to the dirty page read request initiated by the destination host based on the source address information, use the first acceleration device to read the dirty pages to be transmitted in this round from the source host;
  • Step 403 Write the acquired dirty pages to be transferred in this round into the destination host.
  • step 403 includes: writing the dirty pages to be transferred in this round into the destination host in a direct memory access DMA manner.
  • the destination host can generate a remote direct memory access RDMA instruction as a dirty page read request based on the source address information and the destination address information assigned to the dirty page to be transferred in this round on the destination host; Send the remote direct memory access instruction to the second acceleration device; step 402 may include:
  • the first acceleration device is used to read the dirty pages to be transferred in this round from the source host.
  • the first acceleration device includes a first RDMA component
  • the second acceleration device includes a second RDMA component
  • the method specifically includes:
  • the RDMA component parses the source address information of the relevant dirty pages from the RDMA read message in the receiving queue; encapsulates the relevant dirty pages read from the source host based on the source address information into an RDMA response message and sends it to the second RDMA components.
  • the method further includes: maintaining the completion status of the dirty pages to be transmitted in this round in the completion queue, so that the destination host can determine the completion status of the dirty pages to be transmitted in this round based on the completion status of the dirty pages to be transmitted in the completion queue. After all dirty pages have been migrated, the next round of migration is started.
  • the first RDMA component and the second RDMA component are implemented using an FPGA, an RDMA network card, or other ASIC-based devices with RDMA capabilities.
  • the first acceleration device also includes a first dirty page iteration component
  • the second acceleration device also includes a second dirty page iteration component
  • the second dirty page iteration component is responsible for providing the source address information to The operation of the destination host.
  • the first dirty page iteration component and the second dirty page iteration component are implemented using a system-level SOC chip or a dedicated host.
  • the first acceleration device and the second acceleration device are implemented using a SOC chip or a dedicated host.
  • the first acceleration device and the second acceleration device read the current cycle from the source host according to the TCP protocol. Dirty pages to be transferred.
  • FIG. 5 is a schematic structural diagram of an acceleration device provided by another exemplary embodiment of the present application.
  • the acceleration device can be connected to the source host.
  • the acceleration device includes: a dirty page iteration component 51 and a communication component 52;
  • the dirty page iteration component 51 is used to read dirty page information from the source host during the live migration process; find the source address information of the dirty pages to be transmitted in this round based on the dirty page information; and send the source address information to the destination host. , for the destination host to initiate a dirty page read request based on the source address information;
  • the communication component 52 is used to read the dirty pages to be transferred in this round from the source host; and send the read dirty pages to be transferred in this round to the destination host in response to the dirty page reading request.
  • the destination host is configured with a second acceleration device.
  • the dirty page iteration component 51 can be used to:
  • the dirty page iteration component 51 can be used to: send the read dirty pages to be transferred in this round to the second acceleration device to cooperate with the third acceleration device.
  • the second acceleration device responds to dirty page read requests.
  • the communication component 52 can be used to:
  • the dirty pages to be transferred in this round are read from the source host.
  • the destination host can transfer data to the destination host based on the source address information and dirty pages to be transmitted in this round.
  • the destination address information allocated on the host generates a remote direct memory access RDMA instruction as a dirty page read request; and sends the remote direct memory access instruction to the second acceleration device;
  • the communication component 52 can be used to: send the read dirty pages to be transferred in this round to the second acceleration device according to the remote direct memory access RDMA method. Second acceleration device.
  • the communication component 52 may include a first RDMA component
  • the second acceleration device may include a second RDMA component
  • the dirty page iteration component 51 may be used for:
  • the RDMA read message sent by the second RDMA component is stored in the receiving queue.
  • the RDMA read message is caused by the second RDMA component storing the RDMA instructions issued by the destination host for each dirty page to be transmitted in this round into the sending queue and processing Generated by encapsulating each RDMA instruction;
  • the first RDMA component and the second RDMA component are implemented using an FPGA, an RDMA network card, or other ASIC-based devices with RDMA capabilities.
  • the dirty page iteration component in the current acceleration device and the dirty page iteration component in the second acceleration device connected to the destination host are implemented using a system-level SOC chip or a dedicated host.
  • the acceleration device and the second acceleration device are implemented using SOC chips or dedicated hosts.
  • the acceleration device and the second acceleration device read the current round of transmission from the source host according to the TCP protocol. Dirty pages.
  • the acceleration device also includes: power supply component 53 and other components.
  • FIG. 6 is a schematic structural diagram of another acceleration device provided by yet another exemplary embodiment of the present application.
  • the acceleration device can be connected to the destination host.
  • the acceleration device includes: a dirty page iteration component 61 and a communication component 62;
  • the dirty page iteration component 61 is configured to receive the source address information of dirty pages to be transmitted in this round provided by the first acceleration device configured for the source host during the live migration process; provide the source address information to the destination host;
  • the communication component 62 is configured to use the first acceleration device to read the dirty pages to be transmitted in this round from the source host according to the dirty page read request initiated by the destination host based on the source address information. page; write the obtained dirty page to be transferred in this round into the destination host.
  • the communication component 62 when the communication component 62 writes the obtained dirty pages to be transferred in this round to the destination host, it can be used to: write the dirty pages to be transferred in this round to the destination in a direct memory access DMA manner. in the host machine.
  • the destination host can generate a remote direct memory access RDMA instruction as a dirty page read request based on the source address information and the destination address information assigned to the dirty page to be transferred in this round on the destination host; Send the remote direct memory access command to the current acceleration device; in the process of using the first acceleration device to read the dirty pages to be transmitted in this round from the source host, the communication component 62 can be used to:
  • the first acceleration device is used to read the dirty pages to be transferred in this round from the source host.
  • the first acceleration device includes a first RDMA component
  • the communication component 62 may include a second RDMA component; the method specifically includes:
  • the RDMA component parses the source address information of the relevant dirty pages from the RDMA read message in the receiving queue; encapsulates the relevant dirty pages read from the source host based on the source address information into an RDMA response message and sends it to the second RDMA components.
  • the dirty page iteration component 61 can also be used to: maintain the completion status of the dirty pages to be transmitted in this round in the completion queue, so that the destination host can use the completion status of the dirty pages to be transmitted in the completion queue according to the completion status of the dirty pages to be transmitted in this round. After confirming that all dirty pages to be transferred in this round have been migrated, start the next round of migration.
  • the first RDMA component and the second RDMA component are implemented using an FPGA, an RDMA network card, or other ASIC-based devices with RDMA capabilities.
  • the first dirty page iteration component in the first acceleration device on the source host and the dirty page iteration component 61 on this acceleration side are implemented using a system-level SOC chip or a dedicated host.
  • the first acceleration device and the current acceleration device are implemented using SOC chips or dedicated hosts.
  • the first acceleration device and the current acceleration device read the current round of transmission from the source host according to the TCP protocol. Dirty pages.
  • the acceleration device also includes: power supply component 63 and other components.
  • embodiments of the present application also provide a computer-readable storage medium storing a computer program.
  • the computer program When executed, it can implement each step that can be executed by the first acceleration device or the second acceleration device in the above method embodiment.
  • embodiments of the present application may be provided as methods, systems, or computer program products. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment that combines software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
  • computer-usable storage media including, but not limited to, disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may also be stored in a computer-readable memory that causes a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including the instruction means, the instructions
  • the device implements the functions specified in a process or processes of the flowchart and/or a block or blocks of the block diagram.
  • These computer program instructions may also be loaded onto a computer or other programmable data processing device, causing a series of operating steps to be performed on the computer or other programmable device to produce computer-implemented processing, thereby executing on the computer or other programmable device.
  • Instructions provide steps for implementing the functions specified in a process or processes of a flowchart diagram and/or a block or blocks of a block diagram.
  • a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
  • processors CPUs
  • input/output interfaces network interfaces
  • memory volatile and non-volatile memory
  • Memory may include non-permanent storage in computer-readable media, random access memory (RAM) and/or non-volatile memory in the form of read-only memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media.
  • RAM random access memory
  • ROM read-only memory
  • flash RAM flash random access memory
  • Computer-readable media includes both persistent and non-volatile, removable and non-removable media that can be implemented by any method or technology for storage of information.
  • Information may be computer-readable instructions, data structures, modules of programs, or other data.
  • Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), and read-only memory.
  • PRAM phase change memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • RAM random access memory
  • read-only memory read-only memory
  • ROM read-only memory
  • EEPROM electrically erasable programmable read-only memory
  • flash memory or other memory technology
  • compact disc read-only memory CD-ROM
  • DVD digital versatile disc
  • Magnetic tape cartridges magnetic tape storage or other magnetic storage devices or any other non-transmission medium that can be used to store information that can be accessed by a computing device.
  • computer-readable media does not include transitory media, such as modulated data signals and carrier waves.

Abstract

Les modes de réalisation de la présente demande concernent un procédé et un système de migration en direct pour une machine virtuelle, ainsi qu'un dispositif, et un support de stockage. Un schéma d'optimisation est proposé pour des architectures de migration en direct classiques. Un hôte source est configuré avec un dispositif d'accélération, de sorte que, sur le côté hôte source, toutes les opérations de migration en direct d'un plan de commande et d'un plan de données peuvent être attribuées au dispositif d'accélération pour exécution, et les opérations de migration en direct peuvent être réalisées simplement au moyen de la coopération d'un hôte de destination et du dispositif d'accélération. De cette manière, une dépendance nulle aux ressources de l'hôte source par les opérations de migration en direct est réalisée, de sorte que la performance de migration en direct n'est pas affectée même lorsque toutes les ressources de calcul de l'hôte source sont occupées, et la fonction de migration en direct réalise une gigue nulle pour une machine virtuelle s'exécutant sur l'hôte source.
PCT/CN2023/114506 2022-08-26 2023-08-23 Procédé et système de migration en direct pour machine virtuelle, dispositif, et support de stockage WO2024041576A1 (fr)

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CN116541135A (zh) * 2023-07-06 2023-08-04 无锡沐创集成电路设计有限公司 一种加速rdma设备热迁移的方法、装置、设备及介质

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