WO2024040750A1

WO2024040750A1 - Access control method for scalar processing unit, and scalar processing unit

Info

Publication number: WO2024040750A1
Application number: PCT/CN2022/130376
Authority: WO
Inventors: 李晶晶
Original assignee: 上海登临科技有限公司
Priority date: 2022-08-26
Filing date: 2022-11-07
Publication date: 2024-02-29
Also published as: CN115129480B; CN115129480A

Abstract

An access control method for a scalar processing unit, and a scalar processing unit. The scalar processing unit is connected to a resource access requester outside the scalar processing unit. The method comprises: receiving a resource access instruction, which is sent by a resource access requester (S210); according to an access object of the resource access instruction, determining whether there is a resource access conflict in the resource access instruction (S220); if there is a resource access conflict in the resource access instruction, according to the priority of the resource access instruction, determining whether to add the resource access instruction to a buffer queue (S230); and if the resource access instruction is added to the buffer queue, and when the conflict is resolved, concurrently executing the resource access instruction in the buffer queue, in which resource access instruction there is no resource access conflict (S240). By means of the solution, instruction backlogs of a buffer queue can be quickly alleviated, and a performance loss caused by a resource access conflict is compensated for, thereby increasing the utilization rate of a bandwidth of a scalar register, and alleviating subsequent potential resource access conflicts.

Description

Access control method of scalar processing unit and scalar processing unit

Cross-references to related applications

This application claims priority to the Chinese patent application with application number 202211028891.2 and titled "Access Control Method for Scalar Processing Unit and Scalar Processing Unit" submitted to the State Intellectual Property Office of China on August 26, 2022, the entire content of which is incorporated by reference. incorporated in this application.

Technical field

The present application relates to the field of processor technology, and in particular to an access control method for a scalar processing unit, a scalar processing unit, and a resource access system.

Background technique

Graphics Processing Unit (GPU), also known as display core, visual processor, and display chip, is a type of processor that is specially used on personal computers, workstations, game consoles, and some mobile devices (such as tablets, smartphones, etc.) A microprocessor that performs image operations.

Currently, the GPU computing core is based on the SIMD (Single Instruction Multiple Data) hardware architecture to fully improve the parallelism of data operations. However, there are some global data types. This type of data does not belong to a certain thread. Therefore, for a thread group, the operation of this type of global data only needs to be executed once and does not need to be executed once by each thread in the thread group. This type of data does not belong to a certain thread. The operations are collectively referred to as scalar instruction operations and are sent to the scalar processing unit for execution. The results of the operations are stored in scalar registers in the form of scalars. Limited by the capacity and bandwidth of scalar registers, there is competition for access to scalar register resources. Competition will cause blocking of the scalar processing unit instruction pipeline, thereby reducing the performance of the scalar processing unit.

Contents of the invention

Embodiments of the present application provide an access control method for a scalar processing unit to solve the problem of competition in accessing scalar register resources, resulting in blocking of the instruction pipeline of the scalar processing unit and reduced performance.

Embodiments of the present application provide an access control method for a scalar processing unit. The scalar processing unit is connected to a resource access requester external to the scalar processing unit. The method includes:

Receive the resource access instruction sent by the resource access requester;

Determine whether there is a resource access conflict in the resource access instruction according to the access object of the resource access instruction;

If there is a resource access conflict in the resource access instruction, determine whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction;

If the resource access instructions are added to the buffer queue, when the conflict is resolved, the resource access instructions in the buffer queue that do not have resource access conflicts are executed concurrently.

In an embodiment, the priority of the resource access instruction may be related to the priority of the resource access requester.

In an embodiment, the priority may be a fixed configuration or a dynamic configuration.

In one embodiment, if there is a resource access conflict in the resource access instruction, determining whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction may include:

If there is a resource access conflict in the resource access instruction, and the priority of the resource access instruction is lower than the priority of the instruction to be executed by the access object, the resource access instruction is added to the buffer queue.

In one embodiment, the resource access instruction includes a scalar instruction and an access request; if there is a resource access conflict in the resource access instruction, and the priority of the resource access instruction is lower than the priority of the instruction to be executed by the access object, Priority, adding the resource access instructions to the buffer queue, may include:

If there is a resource access conflict between the scalar instruction and the access request, compare the priorities between the scalar instruction and the access request;

If the priority of the scalar instruction is lower than the priority of the access request, add the scalar instruction to the buffer queue;

If the priority of the access request is lower than the priority of the scalar instruction, the access request is added to the buffer queue.

In one embodiment, the scalar processing unit includes a pre-control unit, a scalar register group, a post-control unit and an arithmetic unit connected in sequence, the resource access instructions include scalar instructions, and the concurrent execution of the buffer queue Resource access instructions without resource access conflicts may include:

The pre-control unit obtains the source operand corresponding to each scalar instruction from the scalar register group according to the scalar instructions that do not have resource access conflicts in the buffer queue;

The post-control unit temporarily stores the source operand corresponding to each scalar instruction in an internal buffer, and selects the corresponding type of scalar instruction to send to the operation unit according to the type and operating status of the operation unit;

The operation unit performs operations on the source operand corresponding to the scalar instruction according to the received scalar instruction.

In one embodiment, the pre-control unit obtains the source operand corresponding to each scalar instruction from the scalar register group according to the scalar instructions that do not have resource access conflicts in the buffer queue, which may include:

The front-end control unit selects multiple scalar instructions without resource access conflicts from the buffer queue according to the principle of selecting different instruction categories;

The selected multiple scalar instructions are sent in parallel to the scalar register corresponding to each instruction type in the scalar register group, so as to obtain the source operand corresponding to each scalar instruction from the scalar register group.

The front-end control unit selects scalar instructions without resource access conflicts from the buffer queue in order according to the first-in, first-out principle;

The selected plurality of scalar instructions are sent to the scalar register group in parallel to obtain the source operand corresponding to each scalar instruction from the scalar register group.

The pre-control unit randomly selects scalar instructions without resource access conflicts from the buffer queue;

The selected scalar instructions are sent to the scalar register group in parallel to obtain the source operand corresponding to each scalar instruction from the scalar register group.

In one embodiment, there are multiple computing units. According to the type and operating status of the computing unit, selecting a corresponding type of scalar instruction and sending it to the computing unit may include:

According to the type and operating status of each computing unit, a scalar instruction of the corresponding type is selected and sent to the computing unit in the idle state.

In one embodiment, the resource access requester includes an instruction scheduling unit or a scalar access client, and the resource access instruction includes a scalar instruction sent by the instruction scheduling unit or an access request sent by the scalar access client; Determining whether a resource access conflict exists in the resource access instruction according to the access object of the resource access instruction may include:

According to the access object of the resource access instruction, determine whether the access object of the resource access instruction has unfinished instructions;

If the access object has unfinished instructions, it is determined that the resource access instruction has a resource access conflict.

In one embodiment, the resource access requester includes an instruction scheduling unit and a scalar access client, and the resource access instruction includes a scalar instruction sent by the instruction scheduling unit and an access request sent by the scalar access client; Determining whether a resource access conflict exists in the resource access instruction according to the access object of the resource access instruction may include:

Determine whether the first access object and the second access object are the same according to the first access object of the scalar instruction and the second access object of the access request;

If the first access object and the second access object are the same, it is determined that there is a resource access conflict between the scalar instruction and the access request;

If the first access object and the second access object are different, determine whether there is a resource access conflict in the scalar instruction and the access request respectively.

In one embodiment, determining whether there is a resource access conflict in each of the scalar instruction and the access request may include:

Determine whether the first access object and the second access object have unfinished instructions respectively;

If the first access object has unfinished instructions, it is determined that the scalar instruction has a resource access conflict;

If the second access object has unfinished instructions, it is determined that the access request contains a resource access conflict.

Determine whether the access bandwidth of the first access object and the access bandwidth of the second access object are all occupied;

If the access bandwidth of the first access object is all occupied, it is determined that the scalar instruction has a resource access conflict;

If all the access bandwidth of the second access object is occupied, it is determined that the access request contains a resource access conflict.

In one embodiment, the unexecuted instructions include instructions being executed and instructions to be executed.

The embodiment of the present application also provides a scalar processing unit, which may include:

A front-end control unit, configured to connect to a resource access requester outside the scalar processing unit, receive a resource access instruction sent by the resource access requester, and determine whether the resource access instruction is based on the access object of the resource access instruction. There is a resource access conflict; if there is a resource access conflict in the resource access instruction, it is determined whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction; if the resource access instruction is added to the buffer queue, when When the conflict is resolved, resource access instructions that do not have resource access conflicts in the buffer queue are simultaneously sent;

A scalar register group, connected to the pre-control unit, used to receive the resource access instruction and obtain the internally stored source operand corresponding to the resource access instruction;

A post-control unit, connected to the scalar register, is used to temporarily store the source operand corresponding to each scalar instruction in an internal buffer when the resource access instruction includes a scalar instruction, and perform the operation according to the type and operation of the arithmetic unit. Status, select the corresponding type of scalar instruction and send it to the computing unit;

The operation unit is connected to the post-control unit and is used to perform operations on the source operands corresponding to the scalar instructions according to the received scalar instructions.

The embodiment of this application also provides a resource access system, which may include:

The scalar processing unit described in the above embodiments; the resource access instructions include scalar instructions and access requests;

An instruction dispatch unit is connected to the scalar processing unit and used to send scalar instructions to the scalar processing unit;

A scalar access client is connected to the scalar processing unit and used to send an access request to the scalar processing unit.

According to the technical solution provided by the above embodiments of the present application, when a resource access conflict exists in a resource access instruction, it is determined whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction. When the conflict is resolved, there is no concurrent execution buffer queue. Resource access instructions with resource access conflicts can quickly alleviate the instruction backlog in the buffer queue, compensate for the performance loss caused by instruction pipeline blocking caused by resource access conflicts, improve scalar register bandwidth utilization, and quickly alleviate subsequent potential resource access conflicts.

Description of drawings

In order to explain the technical solutions of the embodiments of the present application more clearly, the drawings required to be used in the embodiments of the present application will be briefly introduced below.

Figure 1 is a schematic architectural diagram of a resource access system provided by an embodiment of the present application;

Figure 2 is a schematic flow chart of an access control method for a scalar processing unit provided by an embodiment of the present application;

Figure 3 is a detailed flow chart of step 220 in the corresponding embodiment of Figure 2;

Figure 4 is a detailed flow chart of step 240 in the embodiment corresponding to Figure 2.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Similar reference numerals and letters refer to similar items in the following figures, so that once an item is defined in one figure, it does not need further definition or explanation in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", etc. are only used to differentiate the description and cannot be understood as indicating or implying relative importance.

Figure 1 is a schematic architectural diagram of a resource access system provided by an embodiment of the present application. The resource access system may include a scalar processing unit 110, an instruction dispatch unit 120, and a scalar access client 130. Scalar processing unit 110 may connect instruction dispatch unit 120 and scalar access client 130 . The resource access system described above is located inside the GPU.

There may be one or more scalar access clients 130 , and the scalar access clients 130 refer to modules inside the GPU that need to access the scalar register group 112 . Scalar access client 130 may send an access request to scalar processing unit 110 . The scalar processing unit 110 may process the access requests sent by the scalar access client 130 in order according to the priority of the scalar access client 130 . The priority of the scalar access client 130 can be fixed or dynamically configured. After obtaining the corresponding data according to the access request, the scalar processing unit 110 may return the data to the scalar access client 130 .

The instruction scheduling unit 120 may receive instructions sent from outside the resource access system and determine the instruction type according to the decoding information of the instruction. The instruction type may be a scalar instruction or a vector instruction. The basic operation object of vector instructions is vector, that is, a group of numbers arranged in order. The operation object of scalar instructions is a single number. Instruction dispatch unit 120 may send scalar instructions to scalar processing unit 110 . When there is no resource access conflict for the scalar instruction, the scalar processing unit 110 can obtain the source operand corresponding to the scalar instruction from the internal scalar register, cache the source operand, and perform processing on the source operand by the internal arithmetic unit corresponding to the scalar instruction. Operation.

As shown in FIG. 1 , the scalar processing unit 110 includes a pre-control unit 111 , a scalar register group 112 , a post-control unit 113 and an arithmetic unit 114 .

The front-end control unit 111 may be used to connect a resource access requester external to the scalar processing unit 110 . Resource access requestors may include instruction dispatch unit 120 and/or scalar access client 130. The front-end control unit 111 may be configured to receive resource access instructions sent by the resource access requester; the resource access instructions may include scalar instructions sent by the instruction scheduling unit 120 and/or access requests sent by the scalar access client 130 .

The front-end control unit 111 can determine whether the resource access instruction has a resource access conflict according to the access object of the resource access instruction; if the resource access instruction has a resource access conflict, it determines whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction. , where the priority of the resource access instruction may be related to the priority of the resource access requester. For example, if the priority of the scalar access client 130 is higher than the priority of the instruction dispatch unit 120, then the priority of the access request is higher than the priority of the scalar instruction. If the priority of a certain scalar access client X is higher than the priority of other scalar access clients 130 , then the priority of the access request of this scalar access client X is higher than the priority of the access request of other scalar access clients 130 . If the resource access instruction is added to the buffer queue, when the conflict is resolved, the resource access instruction without resource access conflict in the buffer queue is simultaneously sent to the scalar register group 112 . The execution process of the front-end control unit 111 is detailed in the method embodiment below and will not be described again here. When the conflict is resolved, the front-end control unit 111 simultaneously issues multiple non-conflicting instructions. Therefore, it can compensate for the performance loss caused by instruction pipeline blocking caused by resource access conflicts, improve the scalar register bandwidth utilization, and effectively alleviate the problem. Or eliminate subsequent potential resource access conflicts between the scalar access client 130 and the instruction dispatch unit 120 . Since the resource access instructions are decoded before conflict checking, all resource access instructions can share the decoding function of the front-end control unit 111, thus saving hardware overhead and reducing power consumption.

The scalar register group 112 can be connected to the front-end control unit 111. The scalar register group 112 can include multiple scalar registers, can be used to receive resource access instructions, and can obtain source operands corresponding to internally stored resource access instructions. For example, the source operand stored corresponding to the address information can be obtained based on the address information contained in the resource access instruction. When the resource access instruction includes an access request sent by the scalar access client 130, the front-end control unit 111 returns the obtained source operand to the scalar access client 130.

The post control unit 113 can be connected to the scalar register group and the operation unit 114, and can be used to temporarily store the source operand corresponding to each scalar instruction in an internal buffer when the resource access instruction includes a scalar instruction, and perform the operation according to the operation unit 114 Based on the type and running status, a scalar instruction of the corresponding type is selected and sent to the computing unit 114 . The types of operation unit 114 may include logical operation type, multiplication operation type, branch control type and memory access type. The running status can be busy status and idle status. There may be multiple computing units 114 of each type (only one is shown in FIG. 1 for illustration). Therefore, scalar instructions of the same type as those of the arithmetic unit 114 can be sent to the arithmetic unit 114 in the idle state. Multiple scalar instructions can share the buffer of the post-control unit 113, thus saving hardware overhead and reducing power consumption.

The operation unit 114 may be configured to perform operations on the source operands corresponding to the scalar instruction according to the received scalar instruction. This solution does not increase the computing resource overhead of the computing unit 114, but by adding a small amount of shared buffers and control logic, multiple scalar instructions can be executed concurrently, thus effectively alleviating the blocking of the scalar instruction pipeline caused by pre-resource access conflicts. and the backlog of scalar instructions. Once the instruction pipeline blocking is lifted, cached scalar instructions can be executed with the highest degree of concurrency, maximizing the use of scalar register bandwidth, and clearing the backlog of scalar instruction buffer queues to compensate for the previously lost clock cycles of pipeline blocking.

FIG. 2 is a schematic flowchart of an access control method for a scalar processing unit provided by an embodiment of the present application. This method may be performed by scalar processing unit 110. The scalar processing unit 110 can connect to a resource access requester external to the scalar processing unit 110. As shown in FIG. 2, the method includes the following steps S210 to S240.

Step S210: Receive the resource access instruction sent by the resource access requester.

The resource access requester refers to the sender of the resource access instruction. The resource access requester may be the instruction scheduling unit 120, the scalar access client 130, or both. Therefore, the resource access instruction may be a scalar instruction sent by the instruction scheduling unit 120, or it may be an access request sent by the scalar access client 130, or it may include both a scalar instruction and an access request. Specifically, the pre-control unit 111 of the scalar processing unit 110 may receive the resource access instruction sent by the resource access requester.

In one embodiment, the resource access requester includes the instruction dispatch unit 120 and the scalar access client 130, so the resource access instruction may include a scalar instruction and an access request. The above step S210 specifically includes: receiving the scalar instruction sent by the instruction scheduling unit 120 and receiving the access request sent by the scalar access client 130 .

Step S220: Determine whether there is a resource access conflict in the resource access instruction according to the access object of the resource access instruction.

The access object refers to the scalar register specifically accessed by the resource access instruction. Resource access conflict means that the access object of the resource access instruction has unfinished instructions (including instructions to be executed and instructions that are being executed), so the resource access instruction cannot be executed immediately. For example, if the access requests of the scalar access client group 130 all occupy the access bandwidth of the scalar register group 112, the scalar instructions of the instruction scheduling unit 120 will be blocked. At this time, the scalar instructions may be considered to have resource access conflicts. For example, if a scalar instruction and an access request access the same access object at the same time, then for the scalar instruction, there is an unfinished access request on the access object, and for the access request, there is an unfinished scalar instruction on the access object. , then there is a resource access conflict between the scalar instruction and the access request.

After receiving the resource access instruction (which may be a scalar instruction or an access request), the front-end control unit 111 of the scalar processing unit 110 decodes and parses the access object from the resource access instruction, and then performs a resource check to determine whether there is a resource access conflict. . The process of resource checking is as follows: according to the access object of the resource access instruction, it can be judged whether the access object of the resource access instruction has unfinished instructions; if the access object has unfinished instructions, it is determined that the resource access instruction has a resource access conflict.

The unexecuted instructions may include instructions being executed and instructions to be executed. Instructions to be executed can be temporarily stored in the buffer queue. Unfinished instructions may include access requests or scalar instructions. If the access object has instructions being executed and instructions to be executed in the buffer queue, the resource access instruction is considered to have a resource access conflict. On the contrary, it is considered that there is no resource access conflict and can be executed immediately.

Step S230: If there is a resource access conflict in the resource access instruction, determine whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction.

Since multiple scalar access clients 130 are configured with priorities, there is a sequence in which they respond to access requests sent by different scalar access clients 130 . The execution sequence (i.e. priority) of scalar instructions and access requests can also be configured in advance. In one embodiment, the priority can be fixed or dynamically configured. That is to say, the priority can be always fixed or can be reconfigured with time or user instructions. Resource access instructions with high priority are executed first, so resource access instructions with low priority can be temporarily added to the buffer queue and wait for execution.

In one embodiment, if there is a resource access conflict in the resource access instruction and the priority of the resource access instruction is lower than the priority of the instruction to be executed by the access object, the resource access instruction is added to the buffer queue.

The pre-control unit 111 can compare the priorities between the resource access instructions and the access object instructions to be executed, and if the priority of the resource access instructions is not the highest, add the resource access instructions to the buffer queue. On the contrary, if the resource access instruction has the highest priority and the access object has no instructions being executed, the resource access instruction can be executed immediately. If the access object has an instruction being executed, the resource access instruction can be temporarily added to the buffer queue.

Step S240: If the resource access instruction is added to the buffer queue, when the conflict is resolved, concurrently execute the resource access instruction in the buffer queue that does not have a resource access conflict.

When the access object is in an idle state, the conflict can be considered to be resolved. For example, if the access request of the scalar access client 130 fully occupies the access bandwidth of the scalar register group 112, a resource access conflict occurs. When the scalar access client 130 releases part of the scalar register access bandwidth, resource access instructions without resource access conflicts in the buffer queue can be executed concurrently.

Concurrent execution refers to selecting resource access instructions without resource access conflicts from the buffered queue for parallel processing. This compensates for the performance loss caused by instruction pipeline blocking caused by resource access conflicts, improves scalar register bandwidth utilization, and can also effectively alleviate or eliminate subsequent potential resource access conflicts between the scalar access client 130 group and the scalar instruction pipeline.

In one embodiment, one or more resource access instructions without resource access conflicts may be selected from the buffer queue according to the scheduling policy and sent to the scalar register group 112 . The scheduling strategy can be to select one or more resource access instructions without resource access conflicts from the buffer queue in order according to the first-in-first-out principle; it can also be randomly selected; it can also be based on the principle of selecting different instruction categories from the buffer queue. Multiple scalar instructions without resource access conflicts are selected from the queue, so that different types of instructions can be processed in parallel.

In one embodiment, when the resource access instruction includes a scalar instruction and an access request; as shown in Figure 3, the above step S220 specifically includes:

Step S221: Based on the first access object of the scalar instruction and the second access object of the access request, determine whether the first access object and the second access object are the same.

The first access object refers to the access object of the scalar instruction sent by the instruction dispatch unit 120, and the second access object refers to the access object of the access request sent by the metric access client 130. For distinction, they are called the first access object and the second access object respectively.

Step S222: If the first access object and the second access object are the same, it is determined that there is a resource access conflict between the scalar instruction and the access request.

In one embodiment, if there is a resource access conflict between a scalar instruction and an access request, the priorities between the scalar instruction and the access request can be compared, and the scalar instruction or access request with a lower priority can be added to the buffer queue.

If the priority of the scalar instruction is lower, the scalar instruction can be added to the buffer queue corresponding to the scalar instruction, and when the conflict is resolved, the scalar instructions in the buffer queue that do not have resource access conflicts are executed concurrently. If the access object has no unfinished instructions, the access request can be executed immediately. If the access object has unfinished instructions, the access request can be temporarily added to the buffer queue corresponding to the access request, and when the conflict is resolved, access requests in the buffer queue that do not have resource access conflicts are concurrently executed.

Similarly, if the access request has a lower priority, the access request can be added to the buffer queue corresponding to the access request. If the access object has no unfinished instructions, the scalar instruction can be executed immediately. The relative priorities of scalar instructions and access requests can be fixed or dynamically configured.

Step S222': If the first access object and the second access object are different, determine whether there is a resource access conflict in the scalar instruction and the access request respectively.

In one embodiment, it can be determined whether the first access object and the second access object have unfinished instructions. If the first access object has unfinished instructions, it is determined that the scalar instruction has a resource access conflict. If the second access object has unfinished instructions, it is determined that the scalar instruction has a resource access conflict. The object has unfinished instructions, and it is determined that the access request has a resource access conflict.

Unexecuted instructions include instructions being executed and instructions to be executed. Uncompleted instructions may include previously received access requests and may also include previously received scalar instructions. If the access object of the scalar instruction (ie, the first access object) has an instruction being executed or an instruction to be executed, the scalar instruction has a resource access conflict. On the contrary, if there is no resource access conflict for the scalar instruction, the pre-control unit 111 can immediately send the scalar instruction to the scalar register group 112 . If the access object of the access request (ie, the second access object) has an instruction being executed or an instruction to be executed, the access request has a resource access conflict. On the contrary, if there is no resource access conflict in the access request, the pre-control unit 111 can immediately send the access request to the scalar register group 112 .

In other embodiments, in order to determine whether there is a resource access conflict between the scalar instruction and the access request, it can also be determined whether the access bandwidth of the first access object is fully occupied. If the access bandwidth of the first access object is fully occupied, then the scalar There is a resource access conflict in the instruction. On the contrary, if the access bandwidth of the first access object is not fully occupied, it is considered that there is no conflict. In the same way, determine whether the access bandwidth of the second access object is fully occupied. If the access bandwidth of the second access object is fully occupied, the access request has a resource access conflict. On the contrary, if the access bandwidth of the second access object is not fully occupied. occupied, it is considered that there is no conflict.

It should be noted that for an access request, the front-end control unit 111 can obtain the data corresponding to the access request and return the data to the scalar access client 130 that sent the access request. For scalar instructions, the operation unit 114 inside the scalar processing unit 110 needs to perform operations on the source operands corresponding to the scalar instructions, and the operation results can be re-stored in the scalar register.

In one embodiment, referring to the corresponding embodiment of Figure 1, the scalar processing unit 110 includes a pre-control unit 111, a scalar register group 112, a post-control unit 113 and an arithmetic unit 114 connected in sequence. When the resource access instruction includes a scalar instruction , as shown in Figure 4, the above step S240 concurrently executes resource access instructions that do not have resource access conflicts in the buffer queue, specifically including the following steps:

Step S241: The front-end control unit 111 obtains the source operand corresponding to each scalar instruction from the scalar register group 112 according to the scalar instructions that do not have resource access conflicts in the buffer queue.

Specifically, the front-end control unit 111 may send scalar instructions that do not have resource access conflicts in the buffer queue to the scalar register group 112 in parallel. After each issued scalar instruction passes one or more clock cycles, all source operands corresponding to each scalar instruction are obtained. The source operand refers to the data at the specified address obtained according to the scalar instruction.

In one embodiment, the pre-control unit can select multiple scalar instructions without resource access conflicts from the buffer queue according to the principle of selecting different instruction categories; and send the selected multiple scalar instructions to the scalar register group in parallel. The scalar register corresponding to each instruction type is used to obtain the source operand corresponding to each scalar instruction in the scalar register group.

For example, scalar instructions can be classified according to their functions (such as logical operation instructions, control instructions). Multiple scalar registers in a scalar register group can also be grouped, and scalar registers in the same group are used for processing. For scalar instructions of the same category, in order to improve access efficiency, scalar instructions of different categories without resource access conflicts can be selected and sent to different groups of scalar registers in parallel. In other embodiments, scalar instructions without resource access conflicts may be selected sequentially according to the first-in-first-out principle; or scalar instructions without resource access conflicts may be randomly selected.

Step S242: The post-control unit 113 temporarily stores the source operand corresponding to each scalar instruction in an internal buffer, and selects the corresponding type of scalar instruction and sends it to the operation unit 114 according to the type and operating status of the operation unit 114.

The post control unit 113 has a built-in shared buffer. The buffer is shared by all types of scalar instructions. The source operands obtained by all sent instructions are temporarily stored in the buffer. If a certain scalar instruction has obtained all source operands, they are stored in the buffer. Within the buffer, the scalar instruction enters the pending execution state. The post control unit 113 can control the concurrent execution of different types of scalar instructions in a pending execution state.

Specifically, a corresponding type of scalar instruction to be executed may be selected according to the type and operating status of the computing unit 114 and sent to the computing unit 114 . The types of operation unit 114 include logical operation type, multiplication operation type, branch control type, and memory access type. The operating status includes busy state and idle state. Therefore, the scalar instructions of the logical operation type to be executed can be sent to the idle status of the logical operation type. The operation unit 114 of the multiplication operation class may send the scalar instruction of the multiplication operation class to be executed to the idle operation unit 114 of the multiplication operation class, and so on.

Step S243: The operation unit 114 operates on the source operand corresponding to the scalar instruction according to the received scalar instruction.

After receiving the corresponding type of scalar instruction, the operation units 114 of different types can perform operations on the source operation data corresponding to the scalar instruction, and then return the operation results to the scalar register. As a result, different types of scalar instructions can be executed concurrently, alleviating the backlog of instructions and improving processing performance.

The technical solution provided by the above embodiments of the present application shares the decoding and resource checking functions of the front control unit 111 and the buffer of the rear control unit 113, thereby saving hardware costs and improving efficiency in a low-cost manner. The concurrency of instruction execution of the scalar processing unit 110 compensates for the performance loss caused by blocking the instruction pipeline due to resource access conflicts, while effectively mitigating subsequent potential resource access conflicts.

If a scalar register resource access conflict occurs and blocks the instruction pipeline, the blocked scalar instructions can enter the buffer queue of the pre-control unit 111. When the blocking is released, the scalar processing unit 110 executes multiple scalar register resource accesses with the highest degree of concurrency. Conflicting instructions maximize the use of scalar register access bandwidth, increase the number of instructions executed in a single cycle, compensate for the performance loss caused by pipeline blocking caused by scalar register access conflicts, quickly alleviate the instruction backlog in the buffer queue, and alleviate subsequent potential Resource access violation.

In the several embodiments provided in this application, the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are only illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible implementation architecture, functions and functions of the devices, methods and computer program products according to multiple embodiments of the present application. operate. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of code that contains one or more executable functions for implementing the specified logical function instruction. In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two consecutive blocks may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the functionality involved. It will also be noted that each block of the block diagram and/or flowchart illustration, and combinations of blocks in the block diagram and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts. , or can be implemented using a combination of specialized hardware and computer instructions.

In addition, each functional module in each embodiment of the present application can be integrated together to form an independent part, each module can exist alone, or two or more modules can be integrated to form an independent part.

If functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods of various embodiments of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code. .

Industrial applicability

The present application provides an access control method for a scalar processing unit and a scalar processing unit. The scalar processing unit is connected to a resource access requester external to the scalar processing unit. The method includes: receiving a resource access request sent by the resource access requester. Instruction; determine whether there is a resource access conflict in the resource access instruction according to the access object of the resource access instruction; if there is a resource access conflict in the resource access instruction, determine whether to send the resource access instruction according to the priority of the resource access instruction. The resource access instruction is added to the buffer queue; if the resource access instruction is added to the buffer queue, when the conflict is resolved, the resource access instructions in the buffer queue that do not have a resource access conflict are executed concurrently. This solution can quickly alleviate the instruction backlog in the buffer queue, compensate for performance losses caused by resource access conflicts, improve scalar register bandwidth utilization, and alleviate subsequent potential resource access conflicts.

In addition, it can be understood that the access control method of the scalar processing unit and the scalar processing unit of the present application are reproducible and can be used in various industrial applications. For example, the access control method and scalar processing unit of the present application can be used in a processor that needs to use a scalar processing unit to perform image operations.

Claims

An access control method for a scalar processing unit, characterized in that the method includes:

Receive resource access instructions sent by the resource access requester;

Determine whether there is a resource access conflict in the resource access instruction according to the access object of the resource access instruction;

If there is a resource access conflict in the resource access instruction, determine whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction;

If the resource access instruction is added to the buffer queue, when the conflict is resolved, concurrently execute the resource access instruction in the buffer queue that does not have a resource access conflict;

The scalar processing unit includes a pre-control unit, a scalar register group, a post-control unit and an arithmetic unit connected in sequence, the resource access instructions include scalar instructions, and there is no resource access conflict in the concurrent execution of the buffer queue. Resource access instructions, including:

The pre-control unit obtains the source operand corresponding to each scalar instruction from the scalar register group according to the scalar instructions that do not have resource access conflicts in the buffer queue;

The post-control unit temporarily stores the source operand corresponding to each scalar instruction in an internal buffer, and selects the corresponding type of scalar instruction to send to the operation unit according to the type and operating status of the operation unit;

The operation unit performs operations on the source operand corresponding to the scalar instruction according to the received scalar instruction.
The method according to claim 1, characterized in that the priority of the resource access instruction is related to the priority of the resource access requester.
The method according to claim 1 or 2, characterized in that the priority is a fixed configuration or a dynamic configuration.
The method according to any one of claims 1 to 3, characterized in that if there is a resource access conflict in the resource access instruction, it is determined whether to send the resource access instruction according to the priority of the resource access instruction. Join the buffer queue, including:

If there is a resource access conflict in the resource access instruction, and the priority of the resource access instruction is lower than the priority of the instruction to be executed by the access object, the resource access instruction is added to the buffer queue.
The method of claim 4, wherein the resource access instruction includes a scalar instruction and an access request; if there is a resource access conflict in the resource access instruction, and the priority of the resource access instruction is lower than the The priority of the instruction to be executed on the access object is specified, and the resource access instruction is added to the buffer queue, including:

If there is a resource access conflict between the scalar instruction and the access request, compare the priorities between the scalar instruction and the access request;

If the priority of the scalar instruction is lower than the priority of the access request, add the scalar instruction to the buffer queue;

If the priority of the access request is lower than the priority of the scalar instruction, the access request is added to the buffer queue.
The method according to any one of claims 1 to 5, characterized in that the pre-control unit obtains each scalar from the scalar register group according to the scalar instructions that do not have resource access conflicts in the buffer queue. The source operands corresponding to the instruction include:

The front-end control unit selects multiple scalar instructions without resource access conflicts from the buffer queue according to the principle of selecting different instruction categories;

The selected multiple scalar instructions are sent in parallel to the scalar register corresponding to each instruction type in the scalar register group, so as to obtain the source operand corresponding to each scalar instruction from the scalar register group.
The method according to any one of claims 1 to 5, characterized in that the pre-control unit obtains each scalar from the scalar register group according to the scalar instructions that do not have resource access conflicts in the buffer queue. The source operands corresponding to the instruction include:

The front-end control unit selects scalar instructions without resource access conflicts from the buffer queue in order according to the first-in, first-out principle;

The selected plurality of scalar instructions are sent to the scalar register group in parallel to obtain the source operand corresponding to each scalar instruction from the scalar register group.
The method according to any one of claims 1 to 5, characterized in that the pre-control unit obtains each scalar from the scalar register group according to the scalar instructions that do not have resource access conflicts in the buffer queue. The source operands corresponding to the instruction include:

The pre-control unit randomly selects scalar instructions without resource access conflicts from the buffer queue;

The selected scalar instructions are sent to the scalar register group in parallel to obtain the source operand corresponding to each scalar instruction from the scalar register group.
The method according to any one of claims 1 to 8, characterized in that there are multiple computing units, and according to the type and operating status of the computing unit, a corresponding type of scalar instruction is selected and sent to the computing unit ,include:

According to the type and operating status of each computing unit, a scalar instruction of the corresponding type is selected and sent to the computing unit in the idle state.
The method according to any one of claims 1 to 4, characterized in that the resource access requester includes an instruction scheduling unit or a scalar access client, and the resource access instruction includes a scalar instruction sent by the instruction scheduling unit. Or the access request sent by the scalar access client; determining whether there is a resource access conflict in the resource access instruction according to the access object of the resource access instruction, including:

According to the access object of the resource access instruction, determine whether the access object of the resource access instruction has unfinished instructions;

If the access object has unfinished instructions, it is determined that the resource access instruction has a resource access conflict.
The method according to any one of claims 1 to 9, characterized in that the resource access requester includes an instruction scheduling unit and a scalar access client, and the resource access instruction includes a scalar instruction sent by the instruction scheduling unit and the access request sent by the scalar access client; determining whether there is a resource access conflict in the resource access instruction according to the access object of the resource access instruction, including:

Determine whether the first access object and the second access object are the same according to the first access object of the scalar instruction and the second access object of the access request;

If the first access object and the second access object are the same, it is determined that there is a resource access conflict between the scalar instruction and the access request;

If the first access object and the second access object are different, determine whether there is a resource access conflict in the scalar instruction and the access request respectively.
The method according to claim 11, wherein the step of determining whether there is a resource access conflict in each of the scalar instruction and the access request includes:

Determine whether the first access object and the second access object have unfinished instructions respectively;

If the first access object has unfinished instructions, it is determined that the scalar instruction has a resource access conflict;

If the second access object has unfinished instructions, it is determined that the access request contains a resource access conflict.
The method according to claim 11, wherein the step of determining whether there is a resource access conflict in each of the scalar instruction and the access request includes:

Determine whether the access bandwidth of the first access object and the access bandwidth of the second access object are all occupied;

If the access bandwidth of the first access object is all occupied, it is determined that the scalar instruction has a resource access conflict;

If all the access bandwidth of the second access object is occupied, it is determined that the access request contains a resource access conflict.
The method according to claim 10 or 12, characterized in that the unexecuted instructions include instructions being executed and instructions to be executed.
A scalar processing unit, characterized by including:

A front-end control unit, configured to connect to a resource access requester outside the scalar processing unit, receive a resource access instruction sent by the resource access requester, and determine whether the resource access instruction is based on the access object of the resource access instruction. There is a resource access conflict; if there is a resource access conflict in the resource access instruction, it is determined whether to add the resource access instruction to the buffer queue according to the priority of the resource access instruction; if the resource access instruction is added to the buffer queue, when When the conflict is resolved, resource access instructions that do not have resource access conflicts in the buffer queue are simultaneously sent;

A scalar register group, connected to the pre-control unit, used to receive the resource access instruction and obtain the internally stored source operand corresponding to the resource access instruction;

A post-control unit, connected to the scalar register, is used to temporarily store the source operand corresponding to each scalar instruction in an internal buffer when the resource access instruction includes a scalar instruction, and perform the operation according to the type and operation of the arithmetic unit. Status, select the corresponding type of scalar instruction and send it to the computing unit;

The operation unit is connected to the post-control unit and is used to perform operations on the source operands corresponding to the scalar instructions according to the received scalar instructions.
A resource access system, characterized by including:

The scalar processing unit of claim 15; the resource access instructions include scalar instructions and access requests;

An instruction dispatch unit is connected to the scalar processing unit and used to send scalar instructions to the scalar processing unit;

A scalar access client is connected to the scalar processing unit and used to send an access request to the scalar processing unit.