WO2024023479A1

WO2024023479A1 - Driver circuitry and operation

Info

Publication number: WO2024023479A1
Application number: PCT/GB2022/051964
Authority: WO
Inventors: Angus Black; Ross Crawford Morgan; Malcolm Blyth
Original assignee: Cirrus Logic International Semiconductor Limited
Priority date: 2022-07-27
Filing date: 2022-07-27
Publication date: 2024-02-01

Abstract

A driver (300, 400) for driving a transducer has nodes for connection to high-side and low-side voltage supplies, an output node (301) and nodes (N1-N4) for connecting first and second capacitors (C1, C2). A network of switches is configured such that switching driver can be selectively switched between any of a first switch state in which a voltage at the output node is the high-side voltage supply, a second switch state in which the voltage at the output node is the low-side voltage supply, a third switch state in which the voltage at the output node is higher that the high-side voltage supply by an amount equal to the input voltage; a fourth switch state in which the voltage at the output node is higher that the high-side voltage supply by an amount equal to twice the input voltage and a fifth switch state in which the voltage at the output node is lower than the low-side voltage supply by an amount equal to the input voltage.

Description

DRIVER CIRCUITRY AND OPERATION

The field of representative embodiments of this disclosure relates to methods, apparatus and/or implementations concerning or relating to driver circuits, and in particular to switching driver circuits as may be used to drive a transducer.

Many electronic devices include transducer driver circuitry for driving a transducer with a suitable driving signal, for example for driving an audio, ultrasonic or haptic output transducer of the host device or a connected accessory with an appropriate driving signal.

In some applications the driver circuitry may include a switching amplifier stage, e.g. a class-D amplifier output stage or the like, for generating the drive signal. Switching amplifier stages can be relatively power efficient and thus can be advantageously used in some applications. A switching amplifier stage generally operates to switch an output node between defined high-side and low-side switching voltages, with a duty cycle that provides a desired average output voltage, over the course of the duty cycle, for the drive signal.

Figure 1 is a schematic illustration of a switching driver circuit 100 for driving a load 101 , such as an audio output transducer. In the example of figure 1 , drivers 102-1 and 102-2 are arranged to drive the load in a bridge-tied-load (BTL) configuration and thus the load 101 is connected on each side to an output node 103 of the respective driver. The drivers 102-1 and 102-2 can collectively be seen as H-bridge driver, as would be understood by one skilled in the art. The output node 103 of each driver 102-1 and 102-2 is switched between a high-side voltage VH and a low-side voltage VL, for example between a positive supply voltage and ground, with controlled duty cycles so as to control the voltage across the load 104. Figure 1 illustrates that each of the drivers 102-1 and 102-2 comprise switches 104a and 104b, which may be typically implemented as MOSFETs, for selectively connecting the output node 103 of the driver to the high-side voltage or the low-side voltage. Modulators 105-1 and 105-2 control the duty-cycle of the switching of the switches 104a and 104b of the respective driver 102-1 and 102-2 based on the input signal. The modulators 105-1 and 105-2 (which are illustrated separately but which may be combined as a single modulator for driving the switches on both sides of the load) may generate PWM or PDM switching signals based on an input signal Sin, as will be understood by one skilled in the art. The drivers 102-1 and 102-2 can thus be seen as generating respective first and second drive signals which are components of a differential driving signal for driving the load.

Each of the first and second driving signals may be generated to have a voltage, on average over the course of a switching cycle, in the range from substantially VH to VL by controlling the duty-cycle (in terms of the proportion of time that the output node is coupled to the high-side voltage VH) between 100% and 0%. The differential voltage across the load can thus vary within the range of +Vin to -Vin, where Vin is the input voltage defined by the high-side and low-side supply voltages VH and VL, i.e, Vin = VH - VL.

Figure 1 illustrates an example of a BTL driver, but it will be understood that in some implementations a transducer may be driven in a single ended configuration by just one driver, e.g. driver 102-1 , with the other side of the load being coupled to a fixed DC voltage, which may for instance be a midpoint voltage between VH and VL, in which case the voltage across the load can be varied from +Vin/2 to -Vin/2.

In the example of figure 1 , the input voltage should therefore be sufficient to provide the desired range for the output signal across the load.

In at least some applications it may be desirable to generate drive signals with relatively high amplitudes. This may therefore typically require the input voltage for the driver circuit 100, i.e. the voltage difference between VH and VL, to be relatively high to provide the required output range.

For instance, piezoelectric or piezo transducers or ceramic transducers are increasingly being proposed for use in some applications, for instance for audio, ultrasonic or haptics output, and may be considered as an alternative to conventional cone and voice-coil type speaker or resonant actuators or the like. Piezoelectric transducers may be advantageous in some applications, especially for portable electronics devices such as mobile telephones, laptop and tablet computers and the like, due to their thin form factor, which may be beneficial in meeting the demand for increasing functionality in such devices without significantly increasing their size. Piezoelectric transducers are also increasingly finding application as transducers for ultrasonic and range-finding systems. Piezoelectric transducers may also be used as input transducers or sensors in some applications. Piezoelectric transducers may, however, relatively high driving voltages, say of the order of tens of volts or so.

Using high input voltages can, however, result in relatively large voltages stresses across the switches of the driver, which may require the use of devices with high voltage tolerances, which may not be practical for some applications, or which may add to the cost of the circuitry.

Also, in any case, in the example of figure 1 , the output node 103 of each of the drivers 102-1 and 102-2 is switched, each switching cycle, between the high-side and low-side voltage VH in a switching cycle, which define the full output range of the driver circuit 100. As will be understood by one skilled in the art, the variation in voltage at the output node 103 over the switching cycle can impact load current ripple and the amount of EMI (electromagnetic interference) generated in use, which it may be beneficial to minimise.

Embodiments of the present disclosure relate to improved driving circuits.

According to an aspect of the disclosure there is provided a switching driver for outputting an output signal to drive a transducer based on an input signal comprising: high-side and low-side supply nodes for connection to high-side and low-side voltage supplies defining an input voltage; an output node for outputting the output signal; first and second capacitor nodes for connecting a first capacitor; third and fourth capacitor nodes for connecting a second capacitor; a network of switches connected to the high-side and low-side supply nodes, the first, second, third and fourth capacitor nodes and the output node, wherein the network of switches is configured such that switching driver can be selectively switched between any of a first set of switch states, wherein the first set of switch states comprises at least: a first switch state in which a voltage at the output node is the high-side voltage supply; a second switch state in which the voltage at the output node is the low-side voltage supply; a third switch state in which the voltage at the output node is first positive boosted voltage which is higher that the high-side voltage supply by an amount equal to the input voltage; a fourth switch state in which the voltage at the output node is second positive boosted voltage which is higher that the high-side voltage supply by an amount equal to twice the input voltage; and a fifth switch state in which the voltage at the output node is a first negative boosted voltage which is lower than the low-side voltage supply by an amount equal to the input voltage.

The switching driver may further comprise a controller configured to control switching of the network of switches between selected switch states of said first set of switch states with a controlled duty cycle based on the input signal. In some examples, the controller may be configured such that, in use, switching between said first set of switch states charges both the first and second capacitors to the input voltage. In some examples, in each of the first and second switch states, both of the first and second capacitors are connected between the high-side and low-side supply nodes to be charged to the input voltage. In the third switch state, one of the first and second capacitors may be connected in series between the high-side supply node and the output node and the other of the first and second capacitors may be connected to be charged to the input voltage. In the fourth switch state both the first and second capacitors may be connected in series between the high-side supply node and the output node. In the fifth switch state the second capacitor may be connected in series between the low-side supply node and the output node and the first capacitor may be connected between the high-side and low- side supply nodes to be charged to the input voltage. In some examples, the controller may be configured to operate the switching driver in at least one of: a first mode in which the switching driver switches between the first and second switch states; a second mode in which the switching driver switches between the third and first switch states; a third mode in which the switching driver switches between the fourth switch state and one of either of the third switch state or the first switch state; and a fourth mode in which the switching driver switches between the second and fifth switch states. In some examples, in the third switch state, the second capacitor may be connected in series between the high-side supply node and the output node and the first capacitor may be connected between the high-side and low-side supply nodes to be charged to the input voltage. The network of switches may be configured such that switching driver can further be selectively switched to a sixth switch state in which the first capacitor is connected in series between the high-side supply node and the output node so that the voltage at the output node is the first positive boosted voltage which is higher that the high-side supply voltage by an amount equal to the input voltage and the second capacitor is connected in parallel with the first capacitor to be charged. The controller may be configured such that in the second mode, one of more cycles of switching between the third switch state and the first switch state are interspersed with one or more cycles of switching between the sixth switch state and the first switch state.

In some examples, in the first switch state, each of the output node, the first capacitor node and third capacitor node may be connected to the high-side supply node and each of the second and fourth capacitor nodes may be connected to the low-side supply node. In the second switch state each of the first capacitor node and third capacitor node may be connected to the high-side supply node and each of the output node, the second capacitor node and the fourth capacitor node may be connected to the low-side supply node. In the third switch state, each of the first capacitor node and the fourth capacitor node may be connected to the high-side supply node, the output node may be connected to the third capacitor node and the second capacitor node may be connected to the low- side supply node. In the fourth switch state, the second capacitor node may be connected to the high-side supply node, the first capacitor node may be connected to the fourth capacitor node and the third capacitor node may be connected to the output node. In the fifth switch state, the third capacitor node may be connected to the low-side supply node, the fourth capacitor node may be connected to the output node, the first capacitor node may be connected to the high-side supply node and the second capacitor node may be connected to the low-side supply node. The network of switches may also be configured such that switching driver can further be selectively switched to a sixth switch state in which each of the second and fourth capacitor nodes is connected to the high-side supply node and each of the first and third capacitor nodes is connected to the output node. In some examples, the controller may be configured such that, in use, switching between the different states of the first set of switch states charges the first capacitor to the input voltage and charges the second capacitor to twice the input voltage. In such examples, in the first switch state, the first capacitor may be connected between the high-side and low-side supply nodes to be charged to the input voltage. In the second switch state, the first capacitor may be connected in series with the high-side supply node to the charge the second capacitor to twice the input voltage. In the third switch state, the first capacitor may be connected in series with the high-side supply node to provide the output voltage and charge the second capacitor to twice the input voltage. In the fourth switch state, the second capacitor may be connected in series between the high-side supply node and the output node and the first capacitor may be connected between the high-side and low-side supply nodes to be charged to the input voltage. In the fifth switch state, the second capacitor may be connected in series between the high-side supply node and the output node to provide negative boosting and the first capacitor may be connected between the high-side and low-side supply nodes to be charged to the input voltage. The network of switches may also be configured such that switching driver can further be selectively switched to at least one of: a sixth switch state in which the voltage at the output node is a third positive boosted voltage which is higher that the high-side voltage supply by an amount equal to three times the input voltage; and a seventh switch state in which the voltage at the output node is a second negative boosted voltage which is lower than the low-side voltage supply by an amount equal to twice the input voltage.

The controller may be configured to operate the switching driver in at least one of: a first mode in which the switching driver switches between the first and second switch states; a second mode in which the switching driver switches between the third and first switch states; a third mode in which the switching driver switches between the fourth switch state and the third switch state; a fourth mode in which the switching driver switches between the second and fifth switch states; and a fifth mode in which the switching driver switches between one of the second and fifth switch states and the seventh switch state.

In some examples, in the first switch state each of the output node, the first capacitor node and third capacitor node may be connected to the high-side supply node, the second capacitor node may be connected to the low-side supply node and the fourth capacitor node may be left floating. In the second switch state, the second capacitor node may be connected to the high-side supply node, the first capacitor node may be connected to the third capacitor node, and both of the fourth capacitor node and the output node may be connected to the low-side supply node, In the third switch state, the second capacitor node may be connected to the high-side supply node, the first capacitor node may be connected to both the third capacitor node and the output node, and the fourth capacitor node may be connected to the low-side supply node. In the fourth switch state, both of first and fourth capacitor nodes may be connected to the high-side supply node, the second capacitor node may be connected to the low-side supply node, and the third capacitor node may be connected to the output node. In the fifth switch state, each of the first and third capacitor nodes may be connected to the high-side supply node, the second capacitor node may be connected to the low-side supply node, and the fourth capacitor node may be connected to the output node. In some examples, the network of switches may also be configured such that switching driver can further be selectively switched to at least one of: a sixth switch state in which the second capacitor node is connected to the high-side supply node, the first capacitor node is connected to the fourth capacitor node and the third capacitor node is connected to the output node; and a seventh switch state in which the first capacitor node is connected to the high-side supply node, the second capacitor node is connected to the low-side supply node, the third capacitor node is connected to the low-side supply node and the fourth capacitor node is connected to the output node.

In some examples, the network of switches and controller may be configured such that the switching driver can be further switched between a second set of switch states wherein the second set of switch states comprises a corresponding switch state that generates the same voltage at the output node as the first to fifth switch states of the first set, wherein switching between switch states of the second set charges both of the first and second capacitors to the input voltage. The controller may be configured to selectively switch the switching driver between the switch states of the first set or the switch states of the second set based on at least one of: the high-side supply voltage, the input voltage, and a received control signal.

In some examples, the network of switches may comprise: a first switching path for selectively coupling the high-side supply node to the first capacitor node; a second switching path for selectively coupling the low-side supply node to the second capacitor node; a third switching path for selectively coupling the high-side supply node to the second capacitor node; a fourth switching path for selectively coupling the first capacitor node to a first intermediate node; a fifth switching path for selectively coupling the first intermediate node to the second intermediate node; a sixth switching path for selectively coupling the second intermediate node to either of the second capacitor node or the low- side supply node; a seventh switching path for selectively coupling the first intermediate node to the third capacitor node; an eighth switching path for selectively coupling the second intermediate node to the fourth capacitor node; a ninth switching path for selectively coupling the third capacitor node to the output node; and a tenth switching path for selectively coupling the fourth capacitor node to the output node.

In some implementations, the switching driver may be configured together with a second switching driver, having the same structure, to drive the transducer in a bridge-tied-load configuration.

In another aspect there is provided a switching driver for outputting an output signal to drive a transducer based on an input signal comprising: high-side and low-side supply nodes for connection to high-side and low-side voltage supplies defining an input voltage; an output node for outputting the output signal; capacitor nodes for connecting first and second capacitors; a network of switches connected to the high-side and low-side supply nodes, the capacitor nodes and the output node; and a controller for controlling switching of the network of switches; wherein the network of switches and the controller are configured such that: each of the first and second capacitors can be charged to the input voltage; the first capacitor can selectively connected to the high-side supply node to provide a first positive boosted voltage; the second capacitor can be selectively connected to the high-side supply node to provide the first positive boosted voltage or in series with the first capacitor connected to the high-side supply node to provide a second positive boosted voltage; the second capacitor can be selectively connected to the low-side supply node to provide a first negative boosted voltage; and the output node can be selectively connected to receive any of the high-side voltage supply, the low-side voltage supply, the first positive boosted voltage, the second positive boosted voltage or the first negative boosted voltage.

In a further aspect there is provided a switching driver for outputting an output signal to drive a transducer based on an input signal comprising: high-side and low-side supply nodes for connection to high-side and low-side voltage supplies defining an input voltage; an output node for outputting the output signal; capacitor nodes for connecting first and second capacitors; and a network of switches connected to the high-side and low-side supply nodes, the capacitor nodes and the output node; a controller for controlling switching of the network of switches; wherein the network of switches and the controller are configured such that: the first capacitor can be charged to the input voltage and the second capacitor can be charged to twice the supply voltage; the first capacitor can be selectively connected to the high-side supply to provide a first positive boosted voltage; the second capacitor can be selectively connected to the high-side supply to provide a second positive boosted voltage; the second capacitor can be selectively connected to the high-side supply in series with the first capacitor, where the first capacitor provides a positive boost and the second capacitor provides a negative boost to prove a first negative boosted voltage; the second capacitor can be selectively connected in series with the low-side supply to provide a second negative boosted voltage; and the output node can be selectively connected to receive any of the high-side voltage supply, the low-side voltage supply, the first positive boosted voltage, the second positive boosted voltage, the first negative boosted voltage or the second negative boosted voltage.

Embodiments also relate to a driver circuit of any of the embodiments described herein comprising the transducer. The transducer may be at least one of an audio output transducer and a haptic output transducer. The transducer may be a piezoelectric or ceramic transducer. Embodiments also relate to an electronic device comprising a driver circuit of any of the embodiments described herein. It should be noted that, unless expressly indicated to the contrary herein or otherwise clearly incompatible, then any feature described herein may be implemented in combination with any one or more other described features.

For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which:

Figure 1 illustrates one example of a conventional driver circuit for driving a load in a bridge-tied-load configuration;

Figure 2 illustrates example output waveforms of a switching driver according to an embodiment;

Figure 3 illustrates one example of a driver circuit according to an embodiment;

Figure 4 illustrates another example a driver circuit according to an embodiment; and

Figure 5 illustrates a driver circuit in a bridge-tied-load configuration.

The description below sets forth example embodiments according to this disclosure. Further example embodiments and implementations will be apparent to those having ordinary skill in the art. Further, those having ordinary skill in the art will recognize that various equivalent techniques may be applied in lieu of, or in conjunction with, the embodiments discussed below, and all such equivalents should be deemed as being encompassed by the present disclosure.

Embodiments of the disclosure relate to driver circuitry for driving a transducer. Embodiments of the disclosure also relate to methods of operation of driver circuitry. Embodiments may be suitable for driving a reactive load such as a piezoelectric transducer, although embodiments may be implemented to drive other types of transducer.

At least some embodiments of the present disclosure relate to switching drivers for generating a drive signal at a driver output node. The switching driver is operable in a plurality of different driver operating modes, wherein, in each of the different driver operating modes, the output node is switched between two switching voltages, where the switching voltages are different in the different modes of operation. Thus, in a given driver mode of operation, the switching driver operates to switch the driver output node between the relevant switching voltages with a controlled duty cycle so as to provide the drive signal with an average voltage (over the course of a cycle period) within a voltage range defined by the switching voltages. However, in a different driver mode of operation, the switching voltages are different so as to provide, in that driver mode, a different voltage range for the drive signal. The overall output voltage range for the switching driver may thus be defined by the different driver modes of operation, and each individual driver mode of operation may provide only part of the overall output voltage range, that is, the voltage range between the two switching voltages in a given mode forms only a part or a subset of the overall output voltage range.

The switching driver thus switches between two defined switching voltages with a controlled duty cycle to provide the drive signal at the driver output node with a desired average output voltage. In use, the average output voltage can vary within a defined voltage range between a peak high voltage VH and a peak low voltage VL. However, rather than switch a driver output node between these peak high and low voltage levels of the output range, as would be conventional for the drivers discussed with respect to figure 1 , the switching driver of embodiments of the disclosure is operable to switch between two switching voltages which form a subset, or only part, of the full output range between VH and VL. Thus, in each driver mode of operation, the output node is switched between two switching voltages that differ from one another by less than the full output range, but the full output range can be provided by varying the driver mode of operation, as necessary.

Thus, a given peak-to-peak voltage variation for the driver signal can be achieved using switching voltages with a voltage difference which is lower than the peak-to-peak variation. Using switching voltages with a lower voltage difference can be beneficial in terms of reduced switching losses and reduced radiated emissions, as well as reducing the requirement for a significant output inductance.

Figure 2 illustrates this principle. Figure 2 illustrates the switching waveforms at an output node of a switching driver according to one example and the resulting average voltage 201 over a duty cycle, i.e. the desired voltage of the drive signal output from the switching driver. It should be noted that figure 2 illustrates the switching waveforms for the driver signal generated at one driver output node, i.e. as would be applied to just one side of the load.

In this example, the drive signal may vary within a full output range between a peak low voltage VL and a peak high voltage VH. In this example, however, the switching driver is operable in different driver modes. In one mode of operation an output node of the switching driver may be switched between the peak high voltage VH and a first intermediate voltage V1 . In another mode of operation, the output node may be switched between the first intermediate voltage V1 and a second intermediate voltage V2. In a further mode of operation, the output node may be switched between the second intermediate voltage V2 and the peak low voltage VL.

To generate a drive signal with a voltage in the range between the peak high voltage VH and the intermediate voltage V1 , the output stage may operate in the mode that switches between VH and V1 . For a drive voltage which is between the first intermediate voltage V1 and the second intermediate voltage, the output node may be switched between V1 and V2, and if the desired voltage for the drive signal is between V2 and the peak low voltage VL, the switching driver may operate in the mode to switch the voltage at the output node between V2 and the peak low voltage VL. In each case, the duty cycle is controlled appropriately to provide the desired average voltage.

Figure 2 illustrates that the full driver output range between VL and VH is provided by three different driver operating modes. However, in other embodiments, there may be a different number of driver operating modes across a full output range of the switching output stage, for instance in some embodiments there may be just two driver operating modes or there may be more than three driver operating modes. The voltage ranges for the driver operating modes, defined by the switching voltages, may be defined so that the respective voltage ranges of the driver operating modes are contiguous and nonoverlapping and collectively cover the whole of the full output range of the switching driver. In other embodiments however it may be advantageous to have some overlap between the output voltage ranges in the different driver operating modes. In some embodiments the magnitude of the voltage range of each of the driver operating modes, i.e. the voltage difference between the relevant two switching voltages: VL and V2, V2 and V1 , or V1 and VH; may be the same as one another, although in some cases, it may be advantageous with regard to the operation of the driver for the voltage difference between the relevant switching voltages of at least one mode to be different to that of another mode.

It will be understood that the reference to a voltage range, for the switching driver in a given operating mode, refers to the voltage of the drive signal at the driver output node (in terms of the average voltage over the course of a switching cycle) in that driver operating mode. The actual voltage that is applied across the load will, of course, depend on the voltage on the other side of the load, e.g. a defined DC voltage for a single-ended configuration or the voltage of a second drive signal on the other side of the load generated by another driver for a BTL configuration. The output signal range, for the output signal applied across the load, may therefore be different to the driver voltage range. For instance with reference to figure 2, if a defined DC voltage Vdc on the other side of the load was set to be a midpoint voltage between V1 and V2, then the switched driver may operate in the mode with switching voltages V1 and V2 for low output signal levels, up to a magnitude of (V1-V2)/2 and may swap to switching voltages V1 and VH for higher positive output signal values (up to VH-Vdc) and swap to switching voltages VL and V2 for greater negative output signal values (down to VL-Vdc).

As used herein the term driver operating mode will thus refer to the operation of a driver on one side of the load only, and the reference to a driver output voltage or output voltage range, or just voltage range, will refer to the voltage of a drive signal at the diver output node. For at least some BTL configurations, each side of the load may be seen as being driven by a respective driver, i.e. there are first and second drivers for driving both sides of the load. In some implementations, as will be discussed in more detail below, both of the drivers of a BTL implementation may be separately operable in different modes, in which case an overall BTL operating mode may be defined by the individual operating modes of the individual drivers.

The switching driver may be configured to receive a high-side supply voltage and a low- side supply voltage, for instance a positive supply voltage and ground, which define an input voltage with a magnitude which is significantly lower than the full peak-to-peak output voltage range of the switching driver. Operating in the different driver operating modes also means that the voltage difference between the switching voltages is significantly less than the full output range of the switching driver, even when operating to provide a drive signal voltage near the peak high output voltage VH. In this way, the maximum voltage stress across components of the switching driver can be kept to a magnitude which is lower than, and in some implementations significantly lower than, the peak-to-peak output voltage range of the switching driver. This can advantageously allow the use of components, e.g. transistors such as FETs, with a voltage tolerance which may be significantly lower than the peak-to-peak output voltage of the driver circuit.

In addition, switching between voltages that differ by less than the peak high and peak low voltages VH and VL can reduce EMI and/or unwanted current ripple, compared to switching between VH and VL.

Figure 3 illustrates one example of a switching driver 300 according to an embodiment. Figure 3 illustrates a switching driver 300 as may be used to drive one side of a load 104, which could be used to drive the load in a single-ended implementation, with the other side of the load connected to a fixed De voltage, which could be used together with another switching driver for driving the load in a BTL configuration.

The switching driver 300 has an output node 301 for connection to the load 104. Figure 3 also illustrates that there may be a series inductance 302 in the load path, e.g. the load 104 may be connected in series with an inductor 302. Especially for piezoelectric transducers, the capacitive nature of such transducers means that it may generally be beneficial to include an inductor in series with the transducer. The inductor 302 may help suppress the switching ripple at the switching frequency, whilst allowing the current to flow for the signal band of interest, e.g. at audio or ultrasonic frequencies. In some implementations, however, the series inductance 302 may not be required.

The switching driver 300 receives high-side and low-side supply voltages, at respective high-side and low-side supply nodes 303 and 304. In the example of figure 3, the high- side voltage supply is a positive voltage VSLIP and the low-side voltage supply is ground (0V). These voltages define the input voltage Vin for the driver circuit, which in this example is equal to VSLIP. The high-side voltage supply, VSLIP, may, in some implementations be (in at least some use cases) derived from a battery voltage, which may be regulated and/or level shifted to provide an appropriate supply voltage VSLIP for the switching driver 300.

The switching driver 300 of figure 3 also comprise first and second capacitor nodes N1 and N2 for connection to a first capacitor C1 and third and fourth capacitor nodes N3 and N4 for connection to a second capacitor C2. A network of switches, that define a number of different switching paths, interconnect the supply node 303 and 304, with the capacitor nodes N1 - N4 and output node 301 .

The network of switches includes switching paths SW01 and SW02 for selectively connecting the output node 301 to the third or fourth capacitor nodes respectively. The switching paths SW01 and SW02 can be seen as providing an output bridge stage 305, which is connected between the third and fourth capacitor nodes N3 and N4, which is similar in some respects to the output bridge of one of the drivers 102-1 or 102-2 of figure 1. However, as will be described in more detail below, the control of the switching of these switching paths may, in at least some driver modes, be different to a convention bridge stage.

The network of switching paths also includes switching paths SW3A to SW5B that, together with first and second capacitors C1 and C2, provide a variable boost stage 308.

The variable boost stage stage 308 includes switching paths SW3A, SW3B and SW3C, which, together with the first capacitor C1 effectively provide a first sub-stage. The first capacitor C1 is coupled between the first and second capacitor nodes N1 and N2. Switching paths SW3A and SW3B selectively connect nodes N1 and N2 to the high-side and low-side supply voltages respectively, in this example VSLIP and ground. In use, with switching paths SW3A and SW3B closed (and switching path SW3C open), the capacitor node N1 and N2 of the first sub-stage are substantially equal to the respective high-side and low-side supply voltages and the first capacitor C1 is charged to a voltage equal to the input voltage. Switching path SW3C selectively connects the high-side supply voltage to the second capacitor node N2. With switching path SW3C closed (and the switching paths SW3A and SW3B open), node N2 of the first stage is driven to be substantially equal to the high-side supply voltage, i.e. +VSLIP in this example, and the voltage at node N1 is positively boosted by the capacitor voltage, i.e. to +2VSLIP in this example.

Switching paths SW4A and SW4B selectively connect the first and second capacitor nodes to respective intermediate nodes 306 and 307, which can be seen as intermediate nodes between the first sub-stage and a second sub-stage formed by the second capacitor C2, together with switching paths SW5A, SW5B and SW5C. Switching paths SW5A and SW5B selectively connect the third and fourth capacitor nodes N3 and N4 to first and second intermediate nodes and switching path SW5C selectively connects the intermediate nodes.

With switching paths SW5A and SW5B closed (and SW5C open) the second sub-stage passes the voltages at the first and second intermediate nodes 306 and 307 to the third and fourth capacitor nodes N3 and N4 and charges the second capacitor C2. With switching paths SW5C and SW5B closed (and SW5A open) the voltage on the second capacitor can provide positive boosting of the voltage at the first intermediate node 306 at the third capacitor node N3. With switching paths SW5C and SW5A closed (and SW5B open) the voltage on the second capacitor can provide negative boosting of the voltage at the first intermediate node 306 at the fourth capacitor node N4.

The switching driver 300 of figure 3 is selectively operable in a plurality of different switch state to selectively output either of the received high-side and low-side supply voltages, first or second positive boosted voltages or a first negative boosted voltage. For the example of figure 3, where the high-side and low-side voltage inputs are +VSLIP and ground respectively, the switching driver may selectively provide a voltage of any of 0V, +VSLIP, +2VSLIP, +3VSLIP or -VSUP at the output node 301. The switching driver may be switched between any of these output voltages in a controlled manner so as to provide a desired output signal.

To generate an output voltage of +VSLIP, the switching driver 300 may be operable in a switch state in which switching paths SW3A, SW4A and SW5A may all be closed to provide the supply voltage VSLIP to node N3 and the output switch SW01 closed to provide this voltage to the output node 301. Switching paths SW3B, SW4B and SW5B may also be closed so that this switch state also charges both capacitors C2 and C1 to the voltage VSLIP.

A similar switch state, with SW3A, SW4A, SW5A, SW3B, SW4B and SW5B all closed, can be used to provide 0V as an output, but in this state, output switching path SW02 of the output stage 305 closed is closed and switching path SW01 is open.

To provide the first positive boosted output of +2VSLIP, the boosting can be selectively provided by the first sub-stage or by the second sub-stage of the variable boost stage stage 308. In other words, the switching driver may be operable in either of two different switch states to provide the first positive boosted voltage +2VSLIP to the output. In one of these two switch states, switching path SW3A and SW4A may be closed (and SW3C open) to provide the supply voltage VSLIP to the intermediate node 306. Switching path SW3B may be closed to provide charging of the capacitor C1 of the first sub-stage. In this switch state, the boosting is provided by the second sub-stage with switching paths SW5C and SW5B closed (and SW5A and SW4B open) so as to drive node N3 to +2VSLIP (with the voltage at node N4 being +VSLIP). Switching path SW01 of the output stage 305 may be closed to provide this voltage to the output node 301.

In the alternative switch state for outputting +2VSLIP, switching path SW3C is closed (and SW3A and SW3B open) so that node N2 is driven to +VSLIP and the capacitor C1 of the first boost sub-stage positively boosts the voltage at node N1 to +2VSLIP. Switching paths SW4A, SW5A, SW4B and SW5B may be closed (and SW5C open) so that the second variable boost sub-stage passes the voltages at the first and second intermediate node 306 and 307 without boosting. In this state, the capacitor C2 of the second boost sub-stage is connected between +2VSLIP at node N3 and +VSLIP at node N4 and is thus charged to the input voltage.

To provide the voltage +3VSLIP, the switching driver 300 may be operated in a switch state with switching paths SW3C, SW4A, SW5C and SW5B closed (and SW3A, SW3B, SW4B and SW5A open). This provides the voltage +3VSLIP at node N3 and the voltage +2VSUP at node N4. To provide the output voltage -VSUP, the switching driver 300 may be operated in a switch state in which switching paths SW3B, SW4B, SW5C and SW5A are closed (with SW3C, SW5A and SW4B open) so as to connect node N3 to ground. With capacitor C2 being previously charged by the input voltage to VSLIP, this drives the voltage at node N4 to -VSUP, which can be provided to the output node by closing output switch SW02. In this state, switching path SW4A is open to isolate node N1 from ground at the intermediate node 306 and prevent the first capacitor C1 from being discharged, and switching path SW5B is likewise open to isolate node N4 from ground at the intermediate node 307. In this state switch SW3A may be closed so as to charge the capacitor C1 to VSLIP, ready for use in another state.

The switching driver 300 of figure 3 is thus operable so that the output node 301 can be controllably switched between any of the possible switching voltages, which in this example are: -VSUP, 0V, +VSLIP, +2VSLIP and +3VSLIP. The switching driver may be operated in any of a plurality of different modes where the relevant switching voltages are different in each mode, e.g. the may be a first (unboosted) mode where the output 301 is switched between the switching voltages 0V and +VSLIP, a first (single positive boost) mode where the output node 301 is switched between the switching voltages +VSLIP and +2VSLIP, a third (double positive boost) mode where the output node 301 is switched between the switching voltages +2VSLIP and +3VSLIP and a fourth (single negative boost) where the output node 301 is switched between the switching voltages -VSUP and 0V.

In the first (unboosted) mode, the high-side and low-side voltages may be effectively supplied to the nodes N3 and N4 and the output bridge 305 may be switched between these voltages with a controlled duty cycle and thus the load current can be drawn directly from the supply voltage. For each of the other modes, the variable boost stage 308 of the switching driver could be switched to the relevant switch state to provide the desired switching voltages at the nodes N3 and N4, and the switches SW01 and SW02 of the output bridge stage switched with a controlled duty cycle to provide the desired output signal. It will be understood, however, that in the boosted modes of operation, at least one of the capacitors C2 and C1 will be connected in series with the load during at least part of the duty cycle and thus may be discharged by the load current, e.g. in a positive boost mode a positive load current will be drawn from the relevant capacitor, which will lead to voltage droop of the relevant capacitor over time.

In some cases, the capacitors C2 and C1 may be sufficient large so as to hold sufficient charge for the maximum expected period of operation in a boost mode (for the maximum expected load current). It will be understood that for audio drivers and the like, the boosted modes may only be required for relatively high instantaneous signal levels, which may only occur periodically, and thus continuous operation in a boosted mode may not be expected.

In some implementations, however, it may be desirable to operate the switching driver so as to allow for capacitor recharging in at least some of the boosted modes of operation.

For operation in the second (single positive boost) mode, i.e. to switch the output between switching voltages of +VSLIP and +2VSLIP, this can be achieved by periodically swapping between the two switch states discussed above that provide the voltages +2VSLIP and +VSLIP at the nodes N3 and N4. As discussed above, one state uses capacitor C1 for boosting (i.e. capacitor C1 is connected in series between the high-side supply and node N3) whilst charging capacitor C2, whilst the other state uses capacitor C2 for boosting whilst charging capacitor C1. The variable boost stage 308 of the switching driver 301 could thus be switched between these two states at any suitable frequency so as so as to maintain charge on both capacitors C2 and C1 for providing the boosting. For instance, the switching driver may alternate between the different states for generating +2VSLIP in successive switching cycles. In this case the switches SW01 and SW02 of output bridge 305 may be switched (within each cycle period) with the controlled duty cycle, whereas the variable boost stage 308 may be switched between the two different switch states at the PWM cycle frequency (but not duty cycle controlled).

For the second (double positive boost) mode, both capacitors C1 and C2 are connected in the series between the high-side supply voltage to drive the voltage at node N3 to +3VSLIP (with node N4 as +2VSLIP). In this case, if the variable boost stage 308 of the switching driver were switched to generate these voltages at the third and fourth capacitor nodes and then maintained in that state throughout several switching cycle, with the output bridge 305 being switched with a controlled duty cycle, there would be no recharging of the capacitors C2 or C1. To allow for some recharging, the output bridge 305 may instead be controlled so that switch SW01 is maintained closed or on (with SW02 open or off) so that the output node 301 is continually connected to node N3 and the variable boost stage 308 may be switched between different switch states so as to modulate the voltage at the node N3 between +3VSLIP and +2VSLIP with a controlled duty cycle.

For instance, the variable boost stage 308 of the switching driver 301 could be switched between the switch state which provides +3VSLIP at node N3 and either one of the switch states which provides +2VSLIP at node N3. During the part of the switching cycle where the output is +2VSLIP, one of the capacitors will be recharged, as discussed above. The relevant +2VSLIP switch state could be alternated each switching cycle so that the capacitor that is recharged to +2VSLIP during part of the duty cycle is alternated. This may provide sufficient top-up of charge of the relevant capacitors for an expected period of operation in this mode.

Alternatively, in this third (double positive boosted) mode of operation, the variable boost stage 308 may be switched so as to modulate the voltage at the node N3 between +3VSLIP and +VSLIP with a controlled duty cycle. The variable boost stage 308 could thus be switched between the state which provides +3VSLIP at node N3 and the state where the high-side supply voltage VSLIP is connected to node N3, with both the capacitors C2 and C1 being charged. In this case, the third mode would correspond to modulating the voltage at the output node 301 between +3VSLIP and +VSLIP, and thus the difference between the switching voltages in this third mode would be equal to 2VSLIP. Whilst this may result in a greater amount of switching ripple and/or EMI, it may allow the use of smaller capacitors than would otherwise be the case and/or prevent an undesirable amount of voltage droop in operation.

For the fourth (single negative boost) mode, capacitor C2 is connected in series with the low-side supply voltage to negatively boost the voltage at node N4 to -VSUP (with node N3 at ground). In this case, if the variable boost stage 308 were maintained in the same state throughout the cycle period and the output bridge 305 was switched with a controlled duty cycle, there would be no recharging of the capacitor C2 and a load current could reduce the magnitude of the voltage across capacitor C2. To allow for some recharging, the output bridge 305 may instead be controlled so that switch SW02 is maintained closed or on (with SW01 open or off) so that the output node 301 is continually connected to node N4 and the variable boost stage 308 may be switched so as to modulate the voltage at the node N3 between 0V and -VSUP with a controlled duty cycle.

For instance, the variable boost stage 308 could be switched between the state which provides -VSUP at node N4 (and 0V at node N3) and the state which provides 0V at node N4 and VSLIP at node N3 - which would thus restore the voltage of the capacitor C2.

Figure 4 illustrates another example of a switching driver circuit 400 according to an embodiment, in which similar components as discussed with reference to figure 3 are identified by the same references. The example of figure 4 again includes an output bridge stage 403 with first and second output switches SW01 and SW02 connected between third and fourth switching capacitor nodes N3 and N4 and a variable boost stage 308 with first and second capacitors C1 and C2 and a network of switching paths. The network of switching paths includes switching paths SW3A, SW3B, SW3C, SW4A, SW5C, SW5A and SW4B which provide similar connections as discussed with reference to figure 3, but omits switching path SW4B and instead provides a switching path SW6 for connecting the second intermediate node 307 (which is the low-side connection of switching path SW5C) directly to ground. This provides a more efficient ground connection arrangement. However, it will be noted that generating the output voltage of +3VSLIP involves node 307 being driven to a voltage +2VSLIP (by closing switching paths SW3C, SW4A and SW5C along with SW4B) and thus, in use when generating the +3VSLIP output voltage, a voltage difference of 2VSLIP will be applied across switching path SW6, which thus should be appropriately rated to tolerate such a voltage.

The example of figure 4 may be operated in a similar manner as discussed with reference to figure 3, with switching path SW6 being closed to connect node 307 to ground any time that switching paths SW4B of figure 3 would have been closed at the same as switching path SW3B. Thus, in operation, each of the capacitors C1 and C2 may be charged by the high-side and low-side voltages, i.e. each capacitor may be charged to the input voltage, so to VSLIP in this example, and selectively used to provide boosting so that the switching driver can output any of -VSUP, 0V, +VSLIP, +2VSLIP or +3VSLIP.

The switching driver of figure 4 may, alternatively be operated so that capacitors C1 and C2 are charged to different voltages to one another, and in particular so that capacitor C1 may be charged to the input voltage, i.e. to a voltage of VSLIP, whilst capacitor C2 may be charged to twice the input voltage, i.e. to a voltage of 2VSLIP. This allows the switching driver to selectively output a voltage of +4VSLIP (with both charged capacitors in series with the supply voltage VSLIP) and/or a voltage of -2VSLIP (using the second capacitor C2 for negative boosting).

The first sub-stage capacitor C1 can be charged to VSLIP, with switching paths SW3A and SW3B closed (and SW3C open). The second sub-stage capacitor C2 can be charged to 2VSLIP, by using charged capacitor C1 in series with the high-side supply VSLIP to drive node N3 to +2VSLIP, i.e. with switching paths SW3C, SW4A and SW5A closed (and SW3A, SW3B and SW5C open), whilst connecting node N4 to ground by closing switching paths SW5B and SW6.

Having capacitor C2 charged to 2VSLIP does mean that the voltage difference between the nodes N3 and N4 will be equal to 2VSLIP. However, the output node 301 can still be controllably switched between switching voltages that vary from one another by an amount equal to just VSLIP by switching the variable boost stage 308 to vary the voltage at a relevant one of nodes N3 and N4 with a controlled duty cycle. The switching driver 400 may thus be operable in a plurality of modes, wherein each mode comprises switching between a high state for outputting the high voltage for that state and a low state for outputting the low voltage for that mode, with a controlled duty cycle.

For instance, the switching driver 400 of figure 4 may be operable in a first (unboosted) mode of operation to switch the output node 301 between high and low voltages of +VSLIP and 0V, i.e. the supply voltages. In the high state for the first mode, to generate the output of +VSLIP, switching paths SW3A, SW4A and SW5A may be closed (with SW3C and SW5C open) to connect the supply voltage VSLIP to node N3 at the same time that switch SW01 is closed and SW02 open. In this high state, switching path SW3B may be closed so that capacitor C1 is charged to VSLIP and switching path SW5B open so that the low side of capacitor C2 is left floating. For the low state for the first mode, to generate the output of 0V, switching paths SW6 and SW5B, may be closed (with SW5C open) to connect the ground supply to node N4 at the same time that switch SW02 is closed and SW01 open. In this low state, switching paths SW3C, SW4A and SW5A may be closed (with SW3A, SW3B and SW5C open) to drive the node N3 to +2VSLIP to charge capacitor C2 to 2VSLIP. In this first mode, the output bridge 305 is thus switched according to the controlled duty cycle in phase with the variable boost stage 308.

The switching driver may be operable in a second (single positive boost) mode of operation to switch the output node 301 between high and low voltages of +2VSLIP and +VSLIP. In the high state for the second mode, to generate the output of +2VSLIP, switching paths SW3C, SW4A, SW5A may be closed (with SW3A, SW3B and SW5C open) to drive node N3 to +2VSLIP. In this high state, switching paths SW5B and SW6 may be closed so that capacitor C2 is charged to +2VSLIP. The low state for this second mode may the same as the high state for the first mode, to connect the supply voltage VSLIP to node N3 and charge the capacitor C1. In this second mode, the voltage at node N3 is thus switched with the controlled duty cycle and thus switch SW01 of the output stage is on (and SW02 off) throughout the whole switching cycle.

The switching driver may be operable in a third (double positive boost) mode of operation to switch the output node 301 between high and low voltages of +3VSLIP and +2VSLIP. In the high state for the third mode, to generate the output of +3VSLIP, switching paths SW3A, SW4A, SW5C and SW5B may be closed (with SW3C, SW4A and SW6 open) so that the voltage on capacitor C2 drives node N3 to +3VSLIP. In this high state, switching path SW3B may be closed so that capacitor C1 is charged to VSLIP. The low state for this third mode may the same as the high state for the second mode, to use the capacitor C1 to drive node N3 to +2VSLIP and charge the capacitor C2. In this third mode, the voltage at node N3 is thus switched with the controlled duty cycle and thus switch SW01 of the output stage is on (and SW02 off) throughout the whole switching cycle.

The switching diver may be operable in a fourth (triple positive boost) mode of operation to switch the output node 301 between high and low voltages of +4VSLIP and +3VSLIP. In the high state for the fourth mode, to generate the output of +4VSLIP, switching paths SW3C, SW4A, SW5C and SW5B may be closed (with SW3A, SW3B, SW5A and SW6 open) so that the voltage on capacitors C1 and C2 drive node N3 to +4VSLIP. The low state for this fourth mode may the same as the high state for the third mode, to use the capacitor C2 to drive node N3 to +3VSLIP and charge the capacitor C1. In this fourth mode, the voltage at node N3 is thus switched with the controlled duty cycle and thus switch SW01 of the output stage is on (and SW02 off) throughout the whole switching cycle.

It will be noted that operation in this fourth mode does allow the capacitor C1 to be recharged in the low state, but there is no recharging of capacitor C2. As discussed above, in some implementations the size of the capacitors may be sufficient so as to be able to deliver the required charge without an unacceptable voltage droop during the likely expected duration of operation in a particular mode, and in at least some applications it may be expected that operation in the fourth mode, to provide an output signal that has an value, on average over the course of the whole switching cycle, in the range of +3VSLIP to +4VSLIP, may only be required rarely and for relatively short periods. In some applications, however, the fourth mode may not be used, or one or more cycles of operation in the fourth mode may be alternated with one or more cycles in an alternative mode where the output node 301 is switched between high and low voltages of +4VSLIP and +2VSLIP. The low state for this alternative mode may be the same as the low state for the third mode, to use the capacitor C1 to drive node N3 to +2VSLIP and charge the capacitor C2. Alternating between the main fourth mode, which switches between +4VSLIP and +3VSLIP, and the alternative fourth mode, which switches between +4VSLIP and +2VSLIP can allow both capacitors C1 and C2 to be charged.

The switching driver may be operable in a fifth (single negative boost) mode of operation to switch the output node 301 between high and low voltages of 0V and -VSUP. The high state for the fifth mode may be the same of the low state of the first mode, which thus connects the ground supply to node N4 and uses capacitor C1 to drive node N3 to +2VSLIP to charge the capacitor C2. In the low state for this fifth mode, switching paths SW3A, SW4A and SW5A may be closed (with SW3C and SW5C open) to drive the node N3 to VSLIP, with switching path SW3B closed to charge the capacitor C1 to VSLIP. Switching path SW5B is open, so that the voltage across capacitor C2 drives the voltage at node N4 to -VSUP. In this fifth mode, the voltage at node N4 is thus switched with the controlled duty cycle and thus switch SW02 of the output stage is on (and SW01 off) throughout the whole switching cycle.

The switching diver may be operable in a sixth (double negative boost) mode of operation to switch the output node 301 between high and low voltages of -VSUP and -2VSLIP. The high state for the sixth mode may be the same of the low state of the fifth mode. In the low state for this sixth mode, switching paths SW6, SW5C and SW5A may be closed (with SW5B open) to connect the node N3 to the ground supply and drive the node N4 to -2VSLIP. In this low state, switching paths SW3A and SW3B may be closed (with SW3C and SW4A open) to charge the capacitor C1. In this sixth mode, the voltage at node N4 is thus switched with the controlled duty cycle and thus switch SW02 of the output stage is on (and SW01 off) throughout the whole switching cycle.

It will be noted, however, that in this sixth mode the capacitor C2 is not recharged in either state. Again, this may be acceptable for some applications. Alternatively a seventh (double negative boost) mode may be preferred in which the output node 301 between high and low voltages of 0V and -2VSLIP. The high state for the seventh mode may be the same of the low state of the first mode, which thus connects the ground supply to node N4 and uses capacitor C1 to drive node N3 to +2VSLIP to recharge the capacitor C2. The low state for the seventh mode may be the same as the low state for the sixth mode which thus uses capacitor C2 to driver node N4 to -2VSLIP and which also recharges capacitor C1. Operating in this seventh mode thus allows an output signal with a value, on average over the course of the whole switching cycle, down to -2VSLIP but also allows recharging of both capacitors over the course of the switching cycle. Thus, in some implementations operation in the seventh mode may be preferred to operation in the sixth mode.

The ability to operate with the capacitor C2 of the second sub-stage charged to twice the input voltage whilst the capacitor C1 of the first sub-stage is charged to the input voltage can thus extend the operating range of the switching driver and allow delivery of more power to the load, without requiring additional boost sub-stages. The switching driver of figure 4 can thus, in use, be controllably switched between selected switch states of a set of switching states to provide the different operating modes, but dependent on the set of switching states used the first and first capacitors may be each charged to the input voltage or the capacitor C1 of the first sub-stage may be charged to the input voltage whilst the capacitor C2 of the second sub-stage may be charged to twice the input voltage. A controller 309 may be configured to control switching of the switching driver to control the set of switch states used and to select the relevant switch states and control the duty cycle based on an input signal Sin.

In some cases the controller 309 may be configured to always use one set of switch states or the other set of switch states. In some embodiments, however, the controller 309 may be operable to select the set of switch states, i.e. to operate the switching driver to switch between a first set of switch states to charge both capacitors to the input voltage or to operate the switching driver to switch between a second set of switch states with the capacitor C2 being charged to twice the input voltage. As noted above, charging the capacitor C2 to twice the input voltage and switching between the relevant set of switch states may allow for a greater output range. This can deliver more power to the load for a given input voltage. In some embodiments, operation with the first or second switch states may be based on an indication of the high-side voltage supply or the input voltage, or in response to some control signal, e.g. indicating a power demand or system operating mode, e.g. a high-power mode.

In general, therefore the switching drivers of any of the examples figures 3 and 4 have high-side and low-side supply nodes for connection to high-side and low-side voltage supplies, e.g. VSLIP and ground, defining an input voltage and an output node 301 for outputting the output signal. First and second capacitor nodes N1 and N2 allow for connection of first capacitor C1 and third and fourth capacitor nodes N3 and N4 allow for connection of second capacitor C2. A network of switches is connected to the high-side and low-side supply nodes, the first, second, third and fourth capacitor nodes and the output node and is configured such that switching driver can be selectively switched between any of a first set of switch states. The first set of switch states may comprise at least first switch state in which a voltage at the output node is the high-side voltage supply, e.g. VSLIP, a second switch state in which the voltage at the output node is the low-side voltage supply, e.g. ground; a third switch state in which the voltage at the output node is first positive boosted voltage which is higher that the high-side voltage supply by an amount equal to the input voltage, i.e. a voltage of +2VSLIP, a fourth switch state in which the voltage at the output node is second positive boosted voltage which is higher that the high-side voltage supply by an amount equal to twice the input voltage, i.e. +3VSLIP and fifth switch state in which the voltage at the output node is a first negative boosted voltage which is lower than the low-side voltage supply by an amount equal to the input voltage, i.e. a voltage of -VSUP. In the example of figure 4 the first set of switch states may also include one or both of a sixth switch in which the voltage at the output node is third positive boosted voltage which is higher that the high-side voltage supply by an amount equal to three times the input voltage, i.e. +4VSLIP state or a seventh switch state in which the voltage at the output node is a second negative boosted voltage which is lower than the low-side voltage supply by an amount equal to the input voltage, i.e. a voltage of -2VSLIP.

The examples of figures 3 and 4 have been illustrated with a single transistor switch for each of the switching paths, but in some implementations one or more of the relevant switching paths could be implemented by more than one transistor. For example, particular for switching path SW6 of the figure 4 example, it may be advantageous to implement the switching path with at least two transistors in series, which are connected with their body diodes in the opposite orientation to one another to prevent unwanted conduction when the relevant switching path is open, for instance when node N4 is driven to a negative voltage, there could potentially be conduction from ground via SW6 and SW5B with just a single switch in each switching path as illustrated. The switching drivers illustrated in figure 3 or 4 may be implemented by any suitable transistor devices, such as with NFET devices, for each of the switching paths.

Figures 3 and 4 illustrates example, where there are two sub-stages of the variable boost stage for providing selective positive boosting, a first sub-stage, comprising capacitor C1 and switches SW3A-C, and a second sub-stage comprising capacitor C2 and associated switches, but it will be understood that other arrangements are possible, for instance there may be more selective boosting sub-stages to allow more output voltage ranges. Such additional boosting stages could comprise another capacitor for selective boosting, but in some cases one or more sub-stage may be implemented for inductive boosting. It should be noted that whilst the examples of figures 3 and 4 have been described in terms of providing a boosted voltage, e.g. by charging the capacitors C1 and C2 to the input voltage or a multiple of the input voltage and then selectively using the capacitors for positive or negative boosting, the same principles could be applied for generating other voltage levels. For instance, instead of first and second boosting sub-stages, at least one of the sub-stages could be a buck stage or a buck boost stage, and thus at least one of the capacitors could be charged to a voltage which is a fraction of the input voltage. For example, with two capacitors, the capacitors could be charged in series between the supply voltages VSLIP and ground and controlled so that each capacitor is charged to a voltage equal to +VSUP/2, although other arrangements may be possible.

It will be understood that the switching drivers of figures 3 and 4 may be implemented as an integrated circuit (IC), but in some embodiments the capacitors C1 and C2 may not be integrated components and may be separate components which are connected to the IC in use, i.e. the capacitors C1 and C2 may be off-chip.

In the example of figure 3, the maximum voltage stress across any of the individual switching paths can be limited to be substantially equal to the input voltage. As noted, typically, each switching path may implemented with a transistor, e.g. a MOSFET, as a switch and this means that a drain-source voltage tolerance of the transistor need only be sufficient to withstand a voltage of magnitude equal to the input voltage supply to the variable boost stage. Note that, in some cases, for correct operation of the transistor it may be beneficial to implement at least some of the transistor in doped wells which are driven with voltages based on the switching voltages, as will be understood by one skilled in the art. For the embodiment of figure 4, the maximum voltage stress across any of the switching paths may be equal to twice the input voltage.

The input voltage for the switching driver may thus define the voltage tolerance required for the switches of the switch network of the variable boost stage and also define the voltage range of the different operating modes, and hence the overall voltage range of the switching driver.

In some examples the switching driver may be arranged to drive a transducer load in a single-ended configuration. In some implementations, however, a driver circuit may comprise two switching drivers arranged to drive a load in a BTL configuration. Figure 5 illustrates a driving circuit 500 according to an embodiment with respective first and second switching drivers 501-1 and 501-2 for driving the load in a BTL arrangement. Each of the switching drivers 501-1 and 501-2 may be a switching driver according to the embodiments discussed with reference to figure 3 or figure 4. In the example of figure 5 the two switching drivers 501-1 and 501-2 are provided with the same high-side and low-side voltage inputs as one another, in this example VSLIP and ground.

Note that in a BTL configuration where the first and second switching drivers 501-1 and 501-2 are a switching driver such as discussed with reference to any of figures 3 or 4, it would be possible for the first and second switching drivers to share the first boosting sub-stage, i.e. capacitor C1 may be shared between the first switching driver 501-1 and the second switching driver 501-2. For example, with reference to figure 3, the nodes N 1 and N2 may be connected to nodes N3 and N4 of the first switching driver by switches SW4A, SW4B and SW4C as illustrated and also connected to corresponding nodes of the second switching driver by a corresponding set of switches, and the same may generally apply for the example of figure 4. This means switching driver such as described with reference to figures 3 or 4 may be implemented in a BTL configuration using just three capacitors.

Figure 5 illustrates that the switching of each switching driver 501-1 and 501-2 may be controlled by a controller 502. The controller 502 receives the input signal Sin and based on the input signal Sin, determines the appropriate driver mode of operation for each of the switching drivers 501-1 and 501-2 and generates switching control signals for controlling the relevant switches of the network of switches so as to set an appropriate switch state to select the mode of operation. The controller also generates the relevant switching control signals for the output switch of the output stage of each of the switching drivers 501-1 and 501-2 to alternate between the relevant switching voltages with an appropriate duty cycle so as to provide the desired voltage at each driver output node and hence the desired differential voltage across the load.

In some cases, the controller may be operable to control one of the switching drivers to provide an output voltage that does not vary throughout the switching cycle, e.g. to provide a maintained DC voltage, whilst the other switching driver is operated in a selected driver mode, i.e. to operate in a single-ended type mode. Such operation may be advantages in some implementations at some signal levels in terms of power output and/or efficiency.

As mentioned, the switching driver may be suitable for driving an output transducer. The output transducer may be, in some implementations, be an audio output transducer such as a loudspeaker or the like. The output transducer may be a haptic output transducer. In some implementation the output transducer may be driven in series with an inductor, i.e. there may be an inductor in an output path between an output node of the switching driver and the load. In some implementations the transducer may be a piezoelectric or ceramic transducer.

Embodiments may be implemented as an integrated circuit. Embodiments may be implemented in a host device, especially a portable and/or battery powered host device such as a mobile computing device for example a laptop, notebook or tablet computer, or a mobile communication device such as a mobile telephone, for example a smartphone. The device could be a wearable device such as a smartwatch. The host device could be a games console, a remote control device, a home automation controller or a domestic appliance, a toy, a machine such as a robot, an audio player, a video player. It will be understood that embodiments may be implemented as part of a system provided in a home appliance or in a vehicle or interactive display. There is further provided a host device incorporating the above-described embodiments.

The skilled person will recognise that some aspects of the above-described apparatus and methods, for instance aspects of controlling the switching control signals to implement the different modes, may be embodied as processor control code, for example on a non-volatile carrier medium such as a disk, CD- or DVD-ROM, programmed memory such as read only memory (Firmware), or on a data carrier such as an optical or electrical signal carrier. For some applications, embodiments may be implemented on a DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit) or FPGA (Field Programmable Gate Array). Thus, the code may comprise conventional program code or microcode or, for example code for setting up or controlling an ASIC or FPGA. The code may also comprise code for dynamically configuring re-configurable apparatus such as re-programmable logic gate arrays. Similarly, the code may comprise code for a hardware description language such as Verilog ^TM or VHDL (Very high-speed integrated circuit Hardware Description Language). As the skilled person will appreciate, the code may be distributed between a plurality of coupled components in communication with one another. Where appropriate, the embodiments may also be implemented using code running on a field-(re)programmable analogue array or similar device in order to configure analogue hardware.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single feature or other unit may fulfil the functions of several units recited in the claims. Any reference numerals or labels in the claims shall not be construed so as to limit their scope.

Claims

1 . A switching driver for outputting an output signal to drive a transducer based on an input signal comprising: high-side and low-side supply nodes for connection to high-side and low- side voltage supplies defining an input voltage; an output node for outputting the output signal; first and second capacitor nodes for connecting a first capacitor; third and fourth capacitor nodes for connecting a second capacitor; a network of switches connected to the high-side and low-side supply nodes, the first, second, third and fourth capacitor nodes and the output node, wherein the network of switches is configured such that switching driver can be selectively switched between any of a first set of switch states, wherein the first set of switch states comprises at least: a first switch state in which a voltage at the output node is the high-side voltage supply; a second switch state in which the voltage at the output node is the low- side voltage supply; a third switch state in which the voltage at the output node is first positive boosted voltage which is higher that the high-side voltage supply by an amount equal to the input voltage; a fourth switch state in which the voltage at the output node is second positive boosted voltage which is higher that the high-side voltage supply by an amount equal to twice the input voltage; and a fifth switch state in which the voltage at the output node is a first negative boosted voltage which is lower than the low-side voltage supply by an amount equal to the input voltage.

2. The switching driver of claim 1 comprising a controller configured to control switching of the network of switches between selected switch states of said first set of switch states with a controlled duty cycle based on the input signal.

3. The switching driver of claim 2 wherein the controller is configured such that, in use, switching between said first set of switch states charges both the first and second capacitors to the input voltage.

4. The switching driver of claim 3 wherein: in each of the first and second switch states both of the first and second capacitors are connected between the high-side and low-side supply nodes to be charged to the input voltage; in the third switch state one of the first and second capacitors is connected in series between the high-side supply node and the output node and the other of the first and second capacitors is connected to be charged to the input voltage; in the fourth switch state both the first and second capacitors are connected in series between the high-side supply node and the output node; and in the fifth switch state the second capacitor is connected in series between the low-side supply node and the output node and the first capacitor is connected between the high-side and low-side supply nodes to be charged to the input voltage.

5. The switching driver of claim 4 wherein the controller is configured to operate the switching driver in at least one of: a first mode in which the switching driver switches between the first and second switch states; a second mode in which the switching driver switches between the third and first switch states; a third mode in which the switching driver switches between the fourth switch state and one of either of the third switch state or the first switch state; and a fourth mode in which the switching driver switches between the second and fifth switch states.

6. The switching driver of claim 4 or claim 5 wherein: in the third switch state the second capacitor is connected in series between the high-side supply node and the output node and the first capacitor is connected between the high-side and low-side supply nodes to be charged to the input voltage; the network of switches is configured such that switching driver can further be selectively switched to a sixth switch state in which the first capacitor is connected in series between the high-side supply node and the output node so that the voltage at the output node is the first positive boosted voltage which is higher that the high-side supply voltage by an amount equal to the input voltage and the second capacitor is connected in parallel with the first capacitor to be charged; and the controller is configured such that in the second mode one of more cycles of switching between the third switch state and the first switch state are interspersed with one or more cycles of switching between the sixth switch state and the first switch state.

7. The switching driver of any of claims 3 to 6 wherein: in the first switch state each of the output node, the first capacitor node and third capacitor node is connected to the high-side supply node and each of the second and fourth capacitor nodes is connected to the low-side supply node; in the second switch state each of the first capacitor node and third capacitor node is connected to the high-side supply node and each of the output node, the second capacitor node and the fourth capacitor node is connected to the low-side supply node; in the third switch state each of the first capacitor node and the fourth capacitor node are connected to the high-side supply node, the output node is connected to the third capacitor node and the second capacitor node is connected to the low-side supply node; in the fourth switch state the second capacitor node is connected to the high-side supply node, the first capacitor node is connected to the fourth capacitor node and the third capacitor node is connected to the output node; and in the fifth switch state the third capacitor node is connected to the low-side supply node, the fourth capacitor node is connected to the output node, the first capacitor node is connected to the high-side supply node and the second capacitor node is connected to the low-side supply node. 8. The switching driver of claim 7 wherein the network of switches is configured such that switching driver can further be selectively switched to a sixth switch state in which each of the second and fourth capacitor nodes is connected to the high-side supply node and each of the first and third capacitor nodes is connected to the output node.

9. The switching driver of claim 2 wherein the controller is configured such that, in use, switching between said first set of switch states charges the first capacitor to the input voltage and charges the second capacitor to twice the input voltage.

10. The switching driver of claim 9 wherein: in the first switch state the first capacitor is connected between the high-side and low-side supply nodes to be charged to the input voltage; in the second switch state the first capacitor is connected in series with the high- side supply node to the charge the second capacitor to twice the input voltage; in the third switch state the first capacitor is connected in series with the high-side supply node to provide the output voltage and charge the second capacitor to twice the input voltage; in the fourth switch state the second capacitor is connected in series between the high-side supply node and the output node and the first capacitor is connected between the high-side and low-side supply nodes to be charged to the input voltage; and in the fifth switch state the second capacitor is connected in series between the high-side supply node and the output node to provide negative boosting and the first capacitor is connected between the high-side and low-side supply nodes to be charged to the input voltage.

11. The switching driver of claim 10 wherein the network of switches is configured such that switching driver can further be selectively switched to at least one of: a sixth switch state in which the voltage at the output node is a third positive boosted voltage which is higher that the high-side voltage supply by an amount equal to three times the input voltage; and a seventh switch state in which the voltage at the output node is a second negative boosted voltage which is lower than the low-side voltage supply by an amount equal to twice the input voltage.

12. The switching driver of claim 11 wherein the controller is configured to operate the switching driver in at least one of: a first mode in which the switching driver switches between the first and second switch states; a second mode in which the switching driver switches between the third and first switch states; a third mode in which the switching driver switches between the fourth switch state and the third switch state; a fourth mode in which the switching driver switches between the second and fifth switch states; and a fifth mode in which the switching driver switches between one of the second and fifth switch states and the seventh switch state.

13. The switching driver of any of claims 9 to 12 wherein: in the first switch state each of the output node, the first capacitor node and third capacitor node is connected to the high-side supply node, the second capacitor node is connected to the low-side supply node and the fourth capacitor node is left floating; in the second switch state the second capacitor node is connected to the high- side supply node, the first capacitor node is connected to the third capacitor node, and both of the fourth capacitor node and the output node are connected to the low-side supply node; in the third switch state the second capacitor node is connected to the high-side supply node, the first capacitor node is connected to both the third capacitor node and the output node, and the fourth capacitor node is connected to the low-side supply node; in the fourth switch state both of first and fourth capacitor nodes are connected to the high-side supply node, the second capacitor node is connected to the low-side supply node, and the third capacitor node is connected to the output node; and in the fifth switch state each of the first and third capacitor nodes are connected to the high-side supply node, the second capacitor node is connected to the low-side supply node, and the fourth capacitor node is connected to the output node. The switching driver of any of claims 9 to 13 wherein the network of switches is configured such that switching driver can further be selectively switched to at least one of: a sixth switch state in which the second capacitor node is connected to the high- side supply node, the first capacitor node is connected to the fourth capacitor node and the third capacitor node is connected to the output node; and a seventh switch state in which the first capacitor node is connected to the high- side supply node, the second capacitor node is connected to the low-side supply node, the third capacitor node is connected to the low-side supply node and the fourth capacitor node is connected to the output node. The switching driver of any of claims 9 to 14 wherein the network of switches and controller are configured such that the switching driver can be further switched between a second set of switch states wherein the second set of switch states comprises a corresponding switch state that generates the same voltage at the output node as the first to fifth switch states of the first set, wherein switching between switch states of the second set charges both of the first and second capacitors to the input voltage. The switching driver of claim 15 wherein the controller is configured to selectively switch the switching driver between the switch states of the first set or the switch states of the second set based on at least one of: the high-side supply voltage, the input voltage, and a received control signal. The switching driver of any preceding claim wherein the network of switches comprises: a first switching path for selectively coupling the high-side supply node to the first capacitor node; a second switching path for selectively coupling the low-side supply node to the second capacitor node; a third switching path for selectively coupling the high-side supply node to the second capacitor node; a fourth switching path for selectively coupling the first capacitor node to a first intermediate node; a fifth switching path for selectively coupling the first intermediate node to the second intermediate node; a sixth switching path for selectively coupling the second intermediate node to either of the second capacitor node or the low-side supply node; a seventh switching path for selectively coupling the first intermediate node to the third capacitor node; an eighth switching path for selectively coupling the second intermediate node to the fourth capacitor node; a ninth switching path for selectively coupling the third capacitor node to the output node; and a tenth switching path for selectively coupling the fourth capacitor node to the output node.

18. The switching driver of any preceding claim wherein the switching driver is configured together with a second switching driver having the same structure to drive the transducer in a bridge-tied-load configuration.

19. A switching driver for outputting an output signal to drive a transducer based on an input signal comprising: high-side and low-side supply nodes for connection to high-side and low-side voltage supplies defining an input voltage; an output node for outputting the output signal; capacitor nodes for connecting first and second capacitors; a network of switches connected to the high-side and low-side supply nodes, the capacitor nodes and the output node; and a controller for controlling switching of the network of switches; wherein the network of switches and the controller are configured such that: each of the first and second capacitors can be charged to the input voltage; the first capacitor can selectively connected to the high-side supply node to provide a first positive boosted voltage; the second capacitor can be selectively connected to the high-side supply node to provide the first positive boosted voltage or in series with the first capacitor connected to the high-side supply node to provide a second positive boosted voltage; the second capacitor can be selectively connected to the low-side supply node to provide a first negative boosted voltage; and the output node can be selectively connected to receive any of the high- side voltage supply, the low-side voltage supply, the first positive boosted voltage, the second positive boosted voltage or the first negative boosted voltage. A switching driver for outputting an output signal to drive a transducer based on an input signal comprising: high-side and low-side supply nodes for connection to high-side and low-side voltage supplies defining an input voltage; an output node for outputting the output signal; capacitor nodes for connecting first and second capacitors; and a network of switches connected to the high-side and low-side supply nodes, the capacitor nodes and the output node; a controller for controlling switching of the network of switches; wherein the network of switches and the controller are configured such that: the first capacitor can be charged to the input voltage and the second capacitor can be charged to twice the supply voltage; the first capacitor can be selectively connected to the high-side supply to provide a first positive boosted voltage; the second capacitor can be selectively connected to the high-side supply to provide a second positive boosted voltage; the second capacitor can be selectively connected to the high-side supply in series with the first capacitor, where the first capacitor provides a positive boost and the second capacitor provides a negative boost to prove a first negative boosted voltage; the second capacitor can be selectively connected in series with the low- side supply to provide a second negative boosted voltage; and the output node can be selectively connected to receive any of the high- side voltage supply, the low-side voltage supply, the first positive boosted voltage, the second positive boosted voltage, the first negative boosted voltage or the second negative boosted voltage.