WO2024010845A1

WO2024010845A1 - Stack electronic article surveillance (eas) label

Info

Publication number: WO2024010845A1
Application number: PCT/US2023/026987
Authority: WO
Inventors: Zhonghe Ji; Alan Green; Kenichiro Uemizu; Jason Wang
Original assignee: Checkpoint Systems, Inc.
Priority date: 2022-07-07
Filing date: 2023-07-06
Publication date: 2024-01-11

Abstract

Electronic article surveillance (EAS) labels and, more specifically, multiple layer stack EAS labels are described herein. An example EAS label includes a base. The base includes a planar capacitor defining a footprint on a first layer and a planar inductor on a second layer defining a central area where electromagnetic field flux passes through. The second layer is a different layer than the first layer. The planar capacitor and the planar inductor are connected between the first and layer and the second layer via a first set of stack terminals. Additionally, the footprint of the planar inductor is not within the central area.

Description

TITLE

STACK ELECTRONIC ARTICLE SURVEILLANCE (EAS) LABEL

CROSS-REFERENCE TO RELATED APPLICAITONS

[0001] The present application claims priority to and the benefit of U.S. Provisional Application 63/358,907 filed on July 7, 2022 titled “STACK ELECTRONIC ARTICLE SURVEILLANCE (EAS) LABEL,” the disclosure of which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

[0002] The present invention is generally related to electronic article surveillance (EAS) labels and, more specifically, multiple layer stack EAS labels.

BACKGROUND

[0003] Radio frequency (“RF”) labels (sometimes referred to as “electronic article surveillance labels” or “EAS labels”) are commonly used in a number of settings, including in retail loss prevention. A RF label may be affixed to a sale item. Retail theft prevention systems (sometimes referred to as “EAS systems”) use antennas to detect RF labels that are affixed to sale items. If the label is not deactivated at a point-of-sale during a sales transaction, the EAS system will detect the RF label when the RF label is in within range of the EAS system. The EAS system is often disposed near the exit of a store so that the range monitors for RF labels leaving the store.

[0004] The EAS system may use a transmitter to emit a signal at a predetermined RF frequency. The RF label is tuned to the predetermined frequency so that it responds to the signal and a receiver detects the RF label response. This response can then be used for determining whether to set off an alarm or not. An alarm may be triggered because the removal of an active RF label from the retail establishment is likely to be associated with an attempted theft. SUMMARY

[0005] A stack electronic article surveillance (EAS) label includes planar capacitive and inductive components to provide a target LC resonance with an equivalent or higher voltage response to EAS labels with larger footprints. The layers of the stack EAS label are electrical coupled via cross-layer connections (sometimes referred to as “stack terminals”). The stack EAS label include a base and one or more stack boosters that each including at least one planar inductor. The stack booster(s) increase a number of coils of the EAS label without decreasing the effective area inside the coil where electromagnetic filed flux passes through. Because each of the layers is thin when designing a stack EAS label for a particular application, one or more stack booster(s) are added to obtain the desired voltage response with a target footprint. In such a manner, for example, the stack EAS labels with smaller footprints may have similar or better responses than conventional EAS labels with larger footprints. Using stack terminals, pass- through terminals, cutouts and bypasses, the layers of the stack EAS labels may be stacked in any order that allows the various layers to be electrically coupled in series or in parallel to achieve the desired voltage response and the desired LC resonance.

[0006] An example EAS label includes a base. The base includes a planar capacitor defining a footprint on a first layer and a planar inductor on a second layer defining a central area where electromagnetic field flux passes through. The second layer is a different layer than the first layer. The planar capacitor and the planar inductor are connected between the first and layer and the second layer via a first set of stack terminals. Additionally, the footprint of the planar inductor is not within the central area.

[0007] An example EAS label includes a base and a stack booster. The base includes a planar capacitor, a planar inductor, and a dielectric film. The planar capacitor and the planar inductor are coplanar on the dielectric film and form one layer. The stack booster includes at least one inductive layer. The stack booster electrically coupled to the base via stack terminals. [0008] An example EAS label includes at least one capacitive layer, multiple planar coil layers, and at least one carrier layer. The multiple planar coil layers are stacked on top of each other to define an inductive coil providing a total number of coil turns and define an area inside the inductive coil. The at least one capacitive layer is stacked on and electrically coupled to at least one of the multiple planar coil layers. The least one carrier layer supports the multiple planar coil layers. The at least one capacitive layer is within a footprint defined by coils of the multiple planar coil layers.

[0009] In one aspect, provided is an electronic article surveillance (EAS) label comprising: a base including a planar capacitor defining a footprint on a first layer and a planar inductor on a second layer defining a central area where electromagnetic field flux passes through, the second layer being a different layer, wherein the planar capacitor and the planar inductor are connected between the first and layer and the second layer via a first set of stack terminals; and wherein the footprint of the planar inductor is not within the central area.

[0010] In one embodiment, the EAS label comprises a stack booster including at least one inductive layer, the stack booster electrically coupled to the base via a second set of stack terminals.

[0011] In one embodiment, the at least one inductive layer of the stack booster includes a first inductive layer and a second inductive layer physically and electrically coupled to the first inductive layer.

[0012] In one embodiment, the first inductive layer and the second inductive layer are electrically connected in series.

[0013] In one embodiment, the at least one inductive layer of the stack booster includes a first inductive layer, a second inductive layer physically and electrically coupled to the first inductive layer, and a third inductive layer physically and electrically coupled to the second inductive layer.

[0014] In one embodiment, at least two of the first inductive layer, the second inductive layer, and the third inductive layer are electrically connected in series

[0015] In one embodiment, the at least one inductive layer of the stack booster includes a first inductive layer, a second inductive layer physically and electrically coupled to the first inductive layer, a third inductive layer physically and electrically coupled to the second inductive layer, and a fourth layer physically and electrically coupled to the third inductive layer.

[0016] In one embodiment, at least two of the first inductive layer, the second inductive layer, the third inductive layer, and the fourth inductive layer are electrically connected in series.

[0017] In one embodiment, the planar inductor of the base defines a first stack terminal, a second stack terminal, and a pass through terminal to facilitate electrically coupling the planar inductor and the planar capacitor of the base and the at least one inductive layer of the stack booster.

[0018] In one embodiment, the EAS label comprises an adhesive layer configured to affix the EAS label to an object, and wherein the base is coupled to the adhesive layer and the stack booster is coupled to the base.

[0019] In one embodiment, the EAS label comprises an adhesive layer configured to affix the EAS label to an object, and wherein the stack booster is coupled to the adhesive layer and the base is coupled to the stack booster.

[0020] In one embodiment, the planar inductor of the base includes a first number of coils and defines an effective area inside the first number of coils where electromagnetic field flux passes through, and wherein the at least one inductive layer of the stack booster includes a second number of coils and increases a total number of coils for the EAS label without decreasing the effective area.

[0021] In one embodiment, the EAS label comprise a carrier layer between the planar inductor of the base and the inductive layer of the stack booster, the carrier layer hosting a special function layer.

[0022] In one embodiment, the special function layer includes an antenna affixed to the carrier layer; and a radio frequency identification (RFID) integrated circuit electrically coupled to the antenna.

[0023] In one embodiment, the EAS label comprises an additional capacitive layer electrically coupled in parallel with the planar capacitor of the base.

[0024] In another aspect, provided is an electronic article surveillance (EAS) label comprising: a base including a planar capacitor, a planar inductor, and a dielectric film, the planar capacitor and the planar inductor being coplanar on the dielectric film and forming one layer; and a stack booster including at least one inductive layer, the stack booster electrically coupled to the base via stack terminals.

[0025] In one embodiment, at least a portion of the planar capacitor and a portion of the dielectric film fold about a folding point.

[0026] In one embodiment, the planar inductor of the base and the at least one inductive layer of the stack booster define a central area where electromagnetic field flux passes through, and wherein when the at least a portion of the planar capacitor is folded about the folding point, the least a portion of the planar capacitor is not within the central area.

[0027] In one embodiment, the at least one inductive layer of the stack booster is formed on the dielectric film, and wherein, to form the stack booster, the dielectric film is folded about a folding point to align the at least one inductive layer of the stack booster with the planar inductor of the base. [0028] In still another aspect, provided is an electronic article surveillance label comprising: at least one capacitive layer; multiple planar coil layers stacked on top of each other to define an inductive coil providing a total number of coil turns and defining an area inside the inductive coil, the at least one capacitive layer is stacked on and electrically coupled to at least one of the multiple planar coil layers; and at least one carrier layer supporting the multiple planar coil layers; wherein the at least one capacitive layer is within a footprint defined by coils of the multiple planar coil layers.

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Operation of the present disclosure may be better understood by reference to the following detailed description taken in connection with the following illustrations, wherein: [0030] FIGS. 1A, IB, 1C illustrate various views of examples of stack electronic article surveillance (EAS) label, according to the teachings of this disclosure.

[0031] FIGS ID, IE, and IF illustrate examples of a stack EAS label with a base layer stack with a capacitive boost-tune layer.

[0032] FIGS. 2A, 2B, 2C, and 2D illustrate examples of an EAS label with a base layer stack with an inductive boost-tune layer, according to the teachings of this disclosure.

[0033] FIGS. 3A, 3B, and 3C illustrate examples of an EAS label with a base layer stack with an inductive and a capacitive boost-tune layer, according to the teachings of this disclosure.

[0034] FIGS. 4 A, 4B, and 4C illustrate examples of an EAS label with a base layer stack and a booster stack with two inductive boost-tune layers, according to the teachings of this disclosure.

[0035] FIGS. 5A, 5B, and 5C illustrate examples of an EAS label with a base layer stack and a booster stack with two inductive boost-tune layers and a capacitive boost tune layer, according to the teachings of this disclosure. [0036] FIGS. 6 A, 6B, and 6C illustrate examples of an EAS label with a base layer stack and a booster stack with three inductive boost-tune layers, according to the teachings of this disclosure.

[0037] FIGS 7 A and 7B illustrate examples of an EAS label with a base layer stack and a booster stack with three inductive boost-tune layers and a capacitive boost tune layer, according to the teachings of this disclosure.

[0038] FIGS. 8A 8B, and 8C illustrate examples of a base layer stack EAS with dual inductive boost-tune layers, according to the teachings of this disclosure.

[0039] FIGS. 9A and 9B illustrates an example base layer stack EAS with a folded inductive boost-tune layer.

[0040] FIGS. 10A, 10B, and 10C illustrate an example stack EAS label with an UHF RFID layer as a special function layer, in accordance with the teachings of this disclosure.

[0041] FIGS. 11 A and 1 IB illustrate an example stack EAS label with a deactivation fuse layer as a special function layer, in accordance with the teachings of this disclosure.

[0042] FIGS. 12A and 12B illustrate an example stack EAS label with a light emitting diode (LED) indicator layer as a special function layer, in accordance with the teachings of this disclosure.

[0043] FIGS. 13A and 13B illustrate an example stack EAS label with an e-ink display layer as a special function layer, in accordance with the teachings of this disclosure.

[0044] FIG. 14 illustrates an example stack EAS label with a temperature monitoring layer as a special function layer, in accordance with the teachings of this disclosure

DETAILED DESCRIPTION

[0045] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. It is to be understood that other embodiments may be utilized, and structural and functional changes may be made without departing from the respective scope of the present disclosure. Moreover, features of the various embodiments may be combined or altered without departing from the scope of the present disclosure. As such, the following description is presented by way of illustration only and should not limit in any way the various alternatives and modifications that may be made to the illustrated embodiments and still be within the spirit and scope of the present disclosure.

[0046] As used herein, the words “example” and “exemplary” mean an instance, or illustration. The words “example” or “exemplary” do not indicate a key or preferred aspect or embodiment. The word “or” is intended to be inclusive rather an exclusive, unless context suggests otherwise. As an example, the phrase “A employs B or C,” includes any inclusive permutation (e.g., A employs B; A employs C; or A employs both B and C). As another matter, the articles “a” and “an” are generally intended to mean “one or more” unless context suggests otherwise. [0047] Electronic article surveillance (EAS) labels are comprised of a resonant circuit (sometimes referred to as an “LC circuit) that is active when the EAS label passes through an electromagnetic field (e.g., generated by security pedestals, etc.). The EAS labels include inductors. An electromagnetic field induces current in the inductors and that current flows through the circuit of the EAS label. The current creates a voltage (Vi) cross a capacitor, which represents the strength of LC resonance. The voltage (Vi) is characterized by Equation 1 below.

Vi = 2nfNSQB (Equation 1)

In Equation 1 above, is the resonance frequency (e.g., 8.2 MHz, etc.), N is the number of coil turns of the inductor, S is the effective area inside the coil where electromagnetic filed flux passes through, Q is a quality factor of resonance, and B is Electromagnetic field strength at where the EAS label is placed. In general, a higher voltage and a stronger resonance strength mean a better chance of being detected by the antenna of the security pedestal. Additionally, when designing EAS labels, the number of coil turns of the inductor (TV) and the effective area inside the coil where electromagnetic field flux passes through (5) are changeable. Conventionally, with a planar coil design, a greater number of turns (N) tends to (i) reduce the effective area inside the coil (5) and/or (ii) increase the footprint of the EAS label. Because RF labels are affixed to external surfaces of the items, the size of the labels is a concern because the labels can obscure product packaging and information. As such, retail establishments that employ RF labels desire smaller labels with better detection performance. Additionally, as use of these labels grow, manufacturers are sensitive to manufacturing waste and resource usage, with manufactures endeavoring to reduce the footprint of the label and reduce materials used. While reducing size and materials, customers expect the labels to provide the same or better performance as conventional EAS labels, such as permanent deactivation, soft deactivation, and/or EAS/RFID multi-function on a single label, etc. As such, there is a need for EAS labels that have a relatively small footprint and have a high voltage (Vi) response, where number of turns (N) can be increased to compensate for a smaller effective area inside the coil (S) that is a result of the relatively small EAS label footprint.

[0048] As described herein, a stack EAS label includes planar components (e.g., planar inductors, planar capacitors, low profile integrated circuits, etc.) to provide a target LC resonance with an equivalent or higher voltage (Vi) response to EAS labels with larger footprints. Each layer of the stack EAS label includes one component. The layers of the stack EAS label are electrical coupled via cross-layer connections. The stack EAS label includes (i) base layer(s) that include a planar inductor (e.g., as one layer) and at least one planar capacitor (e.g., as another layer) and (ii) one or more boost-tune layers each including a planar inductor or a capacitor. As used herein, the one or more boost-tune layers may be collectively referred to as a “stack booster.” In some examples, in the base layer(s) may include the planar inductor as an inductive layer and the planar capacitor as a capacitive layer stacked on top of each other, or a single layer with the planar inductor and the planar capacitor. In some examples, the stack EAS label may include layers with additional functions, such as radio-frequency identification (RFID), smart integrated circuits (ICs), and/or permanent deactivation devices and/or fuses, etc. The boost-tune layers may be electrically connected to the inductive layer in series and/or in parallel. The stack EAS label may also include one or more carrier layers and, in some examples, an adhesive layer to affix the stack EAS label to an object (e.g., packaging of a retail product, etc.), face cover layer, release liner layer, web support layer, etc. The inductive layer includes a number of turns ( ) and has an area (S') inside the coil. The inductive boost-tune layers include a number of turn (HBI- .- BL) and have the area (5) inside the coil. The area (S) inside the coil of the inductive layer and the boost layer(s) are coaxial such that flux passes though the inductive layer coaxially with the boost layer(s). As such, the number of turns (N) for the stack EAS label is m + nBi+...nBL. For example, the number of turns (N) for a dual boost-tune inductive layer stack EAS label is + UBI + nB2. As used herein an n-layer (e.g., dual layer, triple layer, quad layer, etc.) stack EAS label refers to the inductive layer plus the number of boost layers. Because each of the layers is thin (e.g., 0.05 millimeters (mm), etc ), when designing a stack EAS label for a particular application, boost layers can be added to obtain the desired voltage (Vi) response. As a consequence, for example, stack EAS labels with smaller footprints (e.g., 25 mm x 25 mm, etc.) may have similar or better responses than conventional EAS labels with larger footprints (e.g., 40 mm x 40 mm, etc.). Using stack terminals, pass-through terminals, cutouts and bypasses, the layers of the stack EAS labels may be stacked in any order that allows the vanous layers to be electncally coupled in series or in parallel to achieve the desired voltage (Vi) response and the desired LC resonance.

[0049] FIGS. 1A, IB, 1C illustrate various views of an example base layers stack EAS label

100. ID, IE, IF illustrate various views of another example base layer EAS label 100 with capacitive boost-tune layer 102. FIG 1A is an exploded perspective view of the base layers EAS label 100. FIG. IB illustrated an equivalent circuit diagram for the base layers EAS label 100 of FIG. 1A. FIG. 1C is a conceptual layer view of the base layers EAS label 100 of FIG. 1A illustrating the various layers of the single layer EAS label 100 as described herein. FIG ID is an exploded perspective view of the EAS label 100 with the capacitive boost-tune layer 101. FIG. IE illustrated an equivalent circuit diagram for the EAS label 100 of FIG. ID. FIG. IF is a conceptual layer view of the EAS label 100 of FIG. ID illustrating the various layers of the single layer EAS label 100 with the capacitive boost-tune layer 101 as described herein. In the illustrated examples, the shape of the single layer EAS labels 100 is rectangular. Alternatively, in some examples, the shape of the single layer EAS labels 100 may be circular, ovoid, or polygonal (e.g., hexagonal, heptagonal, octagonal, etc.).

[0050] In the illustrated examples of FIG. 1 A and 1C, the base layers stack EAS label 100 has a base capacitive layer 102, a base inductive layer 104, and a carrier 106. In in the illustrated example, the base capacitive layer 102 is a capacitor with stack terminals 108A and 108B. In some examples, the capacitor comprises to electrode plates separated by a dielectric film, allowing the base capacitive layer 102 to be relatively thin. In some examples, the capacitor may define a dimple on one of the electrode plates (e.g., a small section where the electrode plate is thinner). In such examples, to disable the capacitor (and thus the single layer EAS label 100), the base layers stack EAS label 100 is exposed to an electric field strong enough for the capacitor to short at the dimple (e.g., stronger than the one produced by a security pedestal, etc.).

[0051] The base inductive layer 104 includes stack terminals 110A and HOB. The base inductive layer 104 is made of a conductive material and is configured to define a number of coils (n). In the illustrated example, the base inductive layer 104 defines six coils. The base inductive layer 104 also defines an area inside the coil (<S) 112 though which electromagnetic filed flux passes. In the illustrated example, the stack terminals 110A and HOB of the base inductive layer 104 are electrically coupled to the stack terminals 108 A and 108B of the base capacitive layer 102. In FIGS. 1A and IB, (i) one of the stack terminals 110A of the base inductive layer 104 is electrically connected to one of the stack terminals 108A of the base capacitive layer 102 at point “A” and (ii) one of the stack terminals 110B of the base inductive layer 104 is electrically connected to one of the stack terminals 108B of the base capacitive layer 102 at point “B.” In some examples, the base inductive layer 104 may include pass- through terminals (not shown) that are not electrically connected to the coils of the base inductive layer 104 to facilitate connection between other layers.

[0052] In the illustrated examples of FIGS. ID, IE and IF, the base layers stack EAS label 100 includes the base capacitive layer 102, the base inductive layer 104, the carrier layer 106, and a capacitive boost-tune layer 101. The capacitive boost-tune layer 101 may be used, for example to tune the resonance of the base layers stack EAS label 100 to a designated frequency band. The capacitive boost-tune layer 101 includes stack terminals 116A and 116B. In the illustrated example, the capacitive boost-tune layer 101 is between the base inductive layer 104 and the carrier layer 106; however, the capacitive boost-tune layer 101 may be positioned elsewhere (e.g., on top of the base capacitive layer 102). In the illustrated example, because the base capacitive layer 102 is connected in parallel with the capacitive boost-tune layer 101, (i) one of the stack terminals 110A of the base inductive layer 104 is electrically connected to one of the stack terminals 108A of the base capacitive layer 102 and one of the stack terminals

116A of the capacitive boost-tune layer 101 at point “A” and (ii) one of the stack terminals

HOB of the base inductive layer 104 is electrically connected to one of the stack terminals

108B of the base capacitive layer 102 and one of the stack terminals 116B of the capacitive boost-tune layer 101 at point at point “B.”

[0053] In the illustrated example of FIG. 1A, the capacitive layer 102 is configured to not overlap with the area inside the coil (S) 112. In the illustrated example of FIG. ID. both the capacitive layer 102 and the capacitive boost-tune layer 101 are configured to not overlap with the area inside the coil (5) 112. In some examples, the capacitive layer 102 and/or the capacitive boost-tune layer 101 are configured to confirm to a footprint defined by coils of the base inductive layer 104. For example, the shape of the capacitive layer 102 and/or the capacitive boost-tune layer 101 may defined by the shape of the coils of the inductive layer 104 to keep the capacitive layer 102 and/or the capacitive boost-tune layer 101 clear from the area inside the coil (5) 112. In the illustrated examples, because the base inductive layer 104 and the capacitive layer 102 and/or the capacitive boost-tune layer 101 are not coplanar and the capacitive layer 102 and/or the capacitive boost-tune layer 101 are not within the area inside the coil (S) 112, the stack EAS label 100 provides better performance than an non-stack EAS label where the inductor and the capacitor are coplanar because in the stack EAS label 100 as described herein, the capacitor does not interfere with the area inside the coil (S) 112. That is, in traditional EAS label designs, the co-planar capacitor effectively makes the area inside the coil (S smaller, decreasing the non-stack EAS label’s voltage response (Vi). As described below in connection with at least FIGS. 8A, 8B, 8C below, there are alternatively and/or additional methods to overcome the deficiency of the non-stack EAS label (e.g., modify the capacitor, adding inductive layers to a stack booster, etc.).

[0054] FIGS. 2A, 2B, 2C, and 2D illustrate examples of stack EAS labels 200A and 200B (collectively “stack EAS labels 200”) which include one inductive boost-tune layer. FIG 2A is an exploded perspective view of the EAS label 200 A. FIG. 2B illustrated an equivalent circuit diagram for the EAS label 200A and 200B of FIGS. 2A and 2D. FIG. 2C is a conceptual layer view of the single layer EAS label 200A of FIG. 2A illustrating the various layers of the dual layer EAS label 200A as described herein. In the illustrated examples, the dual layer stack EAS labels 200 include the base EAS label 100 (e.g., the base capacitive layer 102, the base inductive layer 104, and the carrier 106) and a stack booster 202. In the illustrated example, the base inductive layer 104 of the base EAS label 100 includes a pass-through terminal 204. The stack booster 202 includes an inductive layer 206 (sometimes referred to an “inductive boosttune layer 206”) that defines a coil and includes stack terminals 208A and 208B. In the illustrated examples, the stack booster 202 includes one inductive boost-tune layer; however, as described below, the stack booster 202 may include multiple inductive boost-tune layers (e.g., 1-15 inductive boost-tune layers, etc.). In the illustrated example, the carrier layer 106 of the base EAS label 100 is between the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the stack booster 202. The inductive layer 206 of the stack booster 202 defines an area inside the coil (S) 110 that is coaxial and substantially the same as the area inside the coil (5) 112 of the base inductive layer 104 of the base EAS label 100.

[0055] In the illustrated example, because the base inductive layer 104 of the base EAS label 100 is connected in series with the inductive layer 206 of the stack booster 202, (i) one of the stack terminals 110A of the base inductive layer 104 is electrically connected to one of the stack terminals 108 A of the base capacitive layer 102 at point “A,” (ii) one of the stack terminals 108B of the base capacitive layer 102 is electrically connected to one of the stack terminals 208A of the inductive layer 206 at point “B” (e.g., via the pass-through terminal 204), and (iii) one of the stack terminals 208B of the inductive layer 206 is electrically connected to one of the stack terminals 110B of the base inductive layer 104 at point “C.” In the illustrated example, the carrier layer 106 of the base EAS label 100 is configured to facilitate the electrical connections between the other layers 102, 104, and 206.

[0056] FIG. 2D illustrates another example of the stack EAS label 200B. In the illustrated example, the base capacitive layer 102 of the base EAS label 100 is positioned between the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the stack booster 202. The capacitive layer 104 of the base EAS label 100 defines a cutout 210 to facilitate the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the booster 202 being electrically connected in serial. In the illustrated example, (i) one of the stack terminals 110A of the base inductive layer 104 is electrically connected to one of the stack terminals 108 A of the base capacitive layer 102 at point “A,” (ii) one of the stack terminals 108B of the base capacitive layer 102 is electrically connected to one of the stack terminals 208A of the inductive layer 206 at point “B”, and (iii) one of the stack terminals 208B of the inductive layer 206 is electrically connected to one of the stack terminals HOB of the base inductive layer 104 at point “C” (e g., by passing through the cutout 210 of the base capacitive layer 102). In the illustrated example, the carrier layer 106 of the base EAS label 100 is configured to facilitate the electrical connections between the other layers 102, 104, and 206.

[0057] FIGS. 3A, 3B, and 3C illustrate examples of stack EAS labels 300A and 300B with expanded capacitance (collectively “stack EAS labels 300”). FIG 3A is an exploded perspective view of the stack EAS label 300A. FIG. 3B illustrated an equivalent circuit diagram for the stack EAS label 300A and 300B of FIG. 3A and 3C. In the illustrated examples, the stack EAS labels 300 includes the base EAS label 100 and the stack booster 202. The base EAS label 100 includes the base capacitive layer 102, the base inductive layer 104, and the carrier layer 106. The stack booster 202 includes the inductive layer 206 and a boost-tune capacitive layer 302, which includes a first stack terminal 304A and a second stack terminal 304B. As described herein, the boost-tune capacitive layer 302 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 in parallel. However, alternatively in some examples, the boost-tune capacitive layer 302 maybe electrically coupled to the base capacitive layer 102 of the base EAS label 100 in series.

[0058] In the illustrated example of FIG. 3 A, (i) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the base inductive layer 104 of the base EAS label 100 and the boost-tune capacitive layer 302 at point “A” via the stack terminals 108A, 110A, and 304A (e.g., via the pass-through terminal 204 of the inductive layer 206), (ii) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the inductive layer 206 of the booster 202 and the boost-tune capacitive layer 302 at point “B” via the stack terminals 108B, 208A, and 304B (e.g., via the pass-through terminal 204 of the base capacitive layer 102), and (iii) the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the booster 202 are electrically connected at point “C” via the stack terminals HOB and 208B.

[0059] FIG. 3C illustrates the stack EAS label 300B in a different physical configuration that is electncally the same as the stack EAS label 300A of FIG. 3A. The base capacitive layer 102 of the base EAS label 100 and the boost-tune capacitive layer 302 are between the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the booster 202. However, the layers 102, 104, 206, and 302 may be arranged in any order, using the stack terminals 108A, 108B, 110A, 110B, 208A, 208B, 304A, and 304B, the pass-through terminals 204, and/or the cutouts 210 to electrically couple the layers 102, 104, 206, and 302 as desired (e.g., with the inductive layers 104 and 206 in series or parallel and with the capacitive layers 102 and 302 in series or parallel. In the illustrated example, (i) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the base inductive layer 104 of the base EAS label 100 and the boost-tune capacitive layer 302 at point “A” via the stack terminals 108 A, 110A, and 304A, (ii) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the inductive layer 206 of the booster 202 and the boost-tune capacitive layer 302 at point “B” via the stack terminals 108B, 208A, and 304B, and (iii) the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the booster 202 are electrically connected at point “C” via the stack tenninals HOB and 208B (e.g., via the cutouts 210 of the capacitive layers 102 and 302).

[0060] FIGS. 4 A, 4B, and 4C illustrate examples of stack EAS labels 400A and 400B (collectively “stack EAS labels 400”). FIG 4A is an exploded perspective view of the stack EAS label 400A. FIG. 4B illustrated an equivalent circuit diagram for the stack EAS label 400A and 400B of FIG. 4A, and 4C. In the illustrated example, the stack booster 202 of the stack EAS labels 400 include the first inductive layer 206 and a second inductive layer 402 (sometimes referred to as the “boost-tune inductive layers”). Adding the additional inductive layer 402 increase the number of coils (N) of the stack EAS label 400 and thus increasing the voltage (Vi) response without increasing the footprint of the stack EAS label 400 that covers, for example, packaging. Depending on the order of the layers 102, 104, 206, and 402, the coils of the one or more of the inductive layers 206 and 402 of the booster 202 may define a bypass section 404 that facilitated an electrical connection between layers on either side of the inductive layer in question. The second inductive layer 402 includes a first stack terminal 406A and a second stack terminal 406B.

[0061] In the illustrated example of FIG. 4A, (i) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the base inductive layer 104 at point “A” via the stack terminals 108A and 110A, (ii) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the first inductive layer 206 of the booster 202 at point “B” via the stack terminals HOB and 208B, (hi) the first inductive layer 206 and the second inductive layer 402 of the booster 202 are electrically coupled at point “C” via the stack terminals 208A and 406A, and (iv) the second inductive layer 402 is electrically coupled to the base capacitive layer 102 at point “D” via the stack terminals 108B and 406B (e.g., via the pass-through terminal 204 and the bypass section 404).

[0062] FIC. 4C illustrates the stack EAS label 400B that has an alternate arrangement of layers to the triple layer stack EAS label 400A of FIG. 4A. In the illustrated example, the order of the layers is: (i) the base inductive layer 104 of the base EAS label 100, (ii) the carrier layer 106, (iii) the first inductive layer 206 of the booster 202, (iv) the base capacitive layer 102 of the base EAS label 100, (v) the second capacitive layer 402 of the booster 202, and (vi) another carrier layer 106. The layers may be in any order as long as the inductive layers 104, 206, and 402 are affixed to different sides of the carrier layers 106. In the illustrate example, (i) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 at point “A” via the stack terminals 108A and 110A, (ii) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the first inductive layer 206 of the booster 202 at point “B” via stack terminals 110B and 208B, (iii) the first inductive layer 206 of the booster 202 is electrically coupled to the second inductive layer 402 of the booster 202 at point “C” via the stack terminals 208A and 406A, and (iv) the second inductive layer 402 of the booster 202 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 at point “D” via the stack terminals 108B and 406B.

[0063] FIGS. 5A, 5B, and 5C illustrate examples of stack EAS labels 500A and 500B including a base stack EAS (e.g., the base stack EAS label 100 of FIG 1A) and a stack booster 202 with two inductive and one capacitive boost-tune layers (collectively “stack EAS labels 500”). FIG 5 A is an exploded perspective view of the stack EAS label 500 A. FIG. 5B illustrates an equivalent circuit diagram for the stack EAS label 500A and 500B of FIG. 5A and 5C. In the illustrated examples, the stack EAS labels 500 includes the base EAS label 100 and the stack booster 202. The base EAS label 100 includes the base capacitive layer 102, the base inductive layer 104, and the carrier layer 106. The stack booster 202 includes the first inductive layer 206, the second inductive layer 402, and a boost-tune capacitive layer 502, which includes a first stack terminal 504A and a second stack terminal 504B. As described herein, the additional capacitive layer 502 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 in parallel. However, alternatively in some examples, the boost-tune capacitive layer 502 maybe electrically coupled to the base capacitive layer 102 of the base EAS label 100 in series. The stack booster 202 of the stack EAS labels 500 may include more boost-tune capacitive layers connected in series and/or in parallel to achieve the desired LC resonance for the stack EAS labels 500.

[0064] In the illustrated example of FIG. 5 A, (i) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the inductive layer 104 of the base EAS label 100 and the boost-tune capacitive layer 502 at point “A” via the stack terminals 108A, 110A, and 504A,

(ii) the inductive layer 102 of the base EAS label 100 and the first inductive layer 206 of the stack booster 202 are electrically coupled at point “B” via the stack terminals HOB and 208B,

(iii) the first inductive layer 206 and the second inductively layer 402 of the stack booster 202 are electncally coupled at point “C” via the stack terminals 208A and 406A, (iv) the boost-tune capacitive layer 502, the second inductive layer 402, and the base capacitive layer 102 are electrically coupled at point “D” via the stack terminals 108B, 406B, and 504B (e.g., via the pass-through terminal 204 of the base inductive layer 104 of the base EAS label 100).

[0065] FIG. 5C illustrates the stack EAS label 500B as an example of an EAS label with a different physical configuration with electrical connections that are the same as the stack EAS label 500A of FIG. 5 A. The stack EAS label 500B may have different electrical characteristics (e.g., inductive layers with a different number of coils, capacitive layers with different capacitance values, etc.) where, for example, size and/or manufacturing may provide advantages with the layers in a different order. The base capacitive layer 102 of the base EAS label 100 and the boost-tune capacitive layer 502 are between the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the stack booster 202. However, the layers 102, 104, 206, and 302 may be arranged in any order, using the stack terminals 108 A, 108B, 110A, HOB, 208A, 208B, 304A, and 304B, the pass-through terminals 204, and/or the cutouts 210 to electrically couple the layers 102, 104, 206, and 302 as desired (e.g., with the inductive layers 104 and 206 in series or parallel and with the capacitive layers 102 and 502 in series or parallel. In the illustrated example, (i) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the base inductive layer 104 of the base EAS label 100 and the boost-tune capacitive layer 502 at point “A” via the stack terminals 108A, 110A, and 504 A, (ii) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the inductive layer 206 of the booster 202 and the boost-tune capacitive layer 502 at point “B” via the stack terminals 108B, 208A, and 504B, and (iii) the base inductive layer 104 of the base EAS label 100 and the inductive layer 206 of the stack booster 202 are electrically connected at point “C” via the stack terminals HOB and 208B (e.g., via the cutouts 210 of the capacitive layers 102 and 502).

[0066] FIGS. 6 A, 6B, and 6C illustrate examples of stack EAS labels 600A and 600B (collectively “stack EAS labels 600”). FIG 6A is an exploded perspective view of the stack EAS label 600A. FIG. 6B illustrated an equivalent circuit diagram for the stack EAS label 600A and 600B of FIG. 6A, and 6C. In the illustrated example, the stack booster 202 of the quad layer stack EAS labels 600 include a first inductive layer 206, a second inductive layer 402, and a third inductive layer 602 (sometimes referred to as “boost-tune inductive layers”). Adding the additional boost-tune inductive layer 602 increase the number of coils (N) of the stack EAS label 600. In the illustrated example, the stack EAS labels 600 have a dimension (d) of 20 mm x 20 mm. The third inductive layer 602 includes a first stack terminal 604A and a second stack terminal 604B. For simplicity of illustration, the carrier layers 106 are not illustrated in FIGS. 6A and 6C. Each of the inductive layers 102, 206, 402, and 602 are mounted on one side of a carrier layer 106, such that the stack EAS label 600 has two carrier layers 106.

[0067] In the illustrated example of FIG. 6A, (i) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the base capacitive layer 102 at point “A” via the stack terminals 108A and 110A, (ii) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the first inductive layer 206 of the booster 202 at point “B” via the stack terminals HOB and 208A, (iii) the first inductive layer 206 of the booster 202 is electrically coupled to the second inductive layer 402 at point “C” via the stack terminals 208B and 406B, (iv) the second inductive layer 402 is electrically coupled to the third inductive layer 602 at point “D” via the stack terminals 406A and 604B, and (v) the third inductive layer 602 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 at point “E” via the stack terminals 108B and 604B (e.g., via the pass-through terminal 204 of the base inductive layer 104 of the base EAS label 100).

[0068] FIG. 6C illustrates the stack EAS label 600B as an example of an EAS label with a different physical configuration with electrical connections that are equivalent to the stack EAS label 600A of FIG. 6A. The earner layers 106 are not illustrated in FIG. 6B. However, in the illustrated example, the inductive layers 104, 206, 402, and 602 are arranges such that only two carriers layers 106 are used. In the illustrated example, (i) the base capacitive layer 102 of the base EAS label 100 is electrically coupled to the base inductive layer 104 at point “A” via the stack terminals 108A and 11 A, (ii) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the first inductive layer 206 of the booster 202 at point “B” via the stack terminals HOB and 208A, (iii) the first inductive layer 206 of the booster 202 is electrically coupled to the second inductive layer 402 at point “C” via the stack terminals 208B and 406A (e.g., via the cutout 210), (iv) the second inductive layer 402 is electrically coupled to the third inductive layer 602 at point “D” via the stack terminals 406B and 604A, (v) the third inductive layer 602 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 at point “E” via the stack terminals 108B and 604A.

[0069] FIGS. 7 A and 7B illustrate examples of stack EAS labels 700 with expanded capacitance. FIG 7A is an exploded perspective view of the stack EAS label 700. FIG. 7B illustrates an equivalent circuit diagram for the stack EAS label 700. In the illustrated example, the stack EAS label 700 includes the base EAS label 100 and the stack booster 202. The base EAS label 100 includes the base capacitive layer 102, the base inductive layer 104, and the carrier layer (not shown). The stack booster 202 includes the first inductive layer 206, the second inductive layer 402, the third inductively layer 602, and the boost-tune capacitive layer 502. As described herein, the boost-tune capacitive layer 502 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 in parallel. However, alternatively in some examples, the boost-tune capacitive layer 502 maybe electrically coupled to the base capacitive layer 102 of the base EAS label 100 in series. The quad layer stack EAS label 700 may include more boost-tune capacitive layers connected in series and/or in parallel to achieve the desired LC resonance for the stack EAS labels 700.

[0070] In the illustrated example of FIG. 7A, (i) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the base capacitive layer 102 and the boost-tune capacitive layer 502 at point “A” via the stack terminals 108A, 110A, and 504A (e.g., via the pass-through terminal 204 of the third inductive layer 602), (ii) the base inductive layer 104 of the base EAS label 100 is electrically coupled to the first inductive layer 206 of the booster 202 at point “B” via the stack terminals HOB and 208A, (iii) the first inductive layer 206 of the booster 202 is electrically coupled to the second inductive layer 402 at point “C” via the stack terminals 208B and 406B, (iv) the second inductive layer 402 is electrically coupled to the third inductive layer 602 at point “D” via the stack terminals 406A and 604B, and (v) the third inductive layer 602 is electrically coupled to the base capacitive layer 102 of the base EAS label 100 and the boosttune capacitive layer 502 at point “E” via the stack terminals 108B, 504B, and 604B (e.g., via the pass-through terminal 204 of the base inductive layer 104 of the base EAS label 100).

[0071] FIGS. 8A, 8B, and 8Cillustrate examples of stack EAS labels 800A, 800B, and 800C, wherein the base layer is a coplanar EAS circuit 802 with a planar inductor 804 coplanar with a planar capacitor 806 and a dielectric film layer 808. The planar capacitor 806 has a first electrode plate 809A and a second electrode plate 809B. The first electrode plate 809A, the second electrode plate 809B, and the dielectric film layer 808 form the planar capacitor 806. In the illustrated example, a portion of the dielectric film layer 808 acts as a carrier layer for the planar inductor 804. In the illustrated example, to boost the performance (e.g., the voltage (Vi) response, etc.) and/or tune its resonant frequency, a stack booster 810 is added. In the illustrated example, the stack booster 810 includes two boost-tune inductive layers 812A and 812B (collectively referred to as “boost-tune inductive layers 812”), one on each side of a carrier 814 of the stack booster 810. In the illustrated example, the boost-tune inductive layers 812 have the same polarization in a magnetic field and have different configurations of stack terminals to facilitate electrically coupling the layers 802, 812A, and 812B. For examples, the stack terminals 816 and the pass through terminals 818 may be in different locations on each of the boost-tune inductive layers 812. However, as described above, the stack booster 810 may include additional inductive layers. The inductive layers 812 of the stack booster 810 may be electrically coupled in serial or in parallel. FIG. 8A illustrates the stack booster 810 being affixed to the coplanar EAS circuit 802 on top of the capacitive layer 806. FIG. 8B illustrates the stack booster 810 being affixed to the coplanar EAS circuit 802 below the inductive layer 802. As best illustrated by FIG. 8B, in some examples, the planar capacitor 806 of the coplanar EAS circuit 802 may fold about a folding point 820 such that the planar capacitor 806 (e g., the first electrode plate 809A, the second electrode plate 809B, and the portion of the dielectric film layer 808 sandwiched between the first electrode plate 809A and the second electrode plate 809B) are no longer coplanar with the planar inductor 804. FIG. 8C illustrates a portion of the dielectric film layer 808 acting as a carrier layer for the planar inductor 804 and the boost-tune inductive layer 812A of the stack booster 802 is etched or otherwise affixed to the carrier layer 814.

[0072] FIGS. 9A and 9B illustrate an example stack EAS label 900 that, during manufacturing, is folded. FIG. 9A illustrates perspective view of the stack EAS label 900 in a partially folded position. FIG. 9B illustrates a cross section view along line X-X of the stack EAS label 900 in a folded position. Initially, the second electrode plate 809B, the planar inductor 804, and the boost-tune inductive layer 812 are coplanar and are etched or otherwise placed on one side of the dielectric film layer 808. The first electrode plate 809A and a welding plate 902 are etched or otherw ise placed on the opposite side of the dielectric film layer 808. A folding point 904 is defined by the dielectric film layer 808.

[0073] The folding point 904 is also defined between the planar inductor 804 and the boosttune inductive layer 812. In the illustrated example, the folding point 904 is defined through a connection interface 906. In such examples, the planar inductor 804 and the boost-tune inductive layer 812 are electncally coupled at the connection interface 906 and connection interface is configured such that the planar inductor 804 and the boost-tune inductive layer 812 are electrically coupled while the stack EAS label 900 is and is not folded at the folding point 904. Alternatively, in some example, the planar inductor 804 and the boost-tune inductive layer 812 may each have corresponding stack terminals that are embedded within the dielectric film layer 808 to provide an electrical connection when the stack EAS label 900 is folded. Additionally, the folding point 904 is defined between the second electrode plate 809B and the welding plate 902. The first electrode plate 809A, the second electrode plate 809B, and the dielectric film layer 808 form a planar capacitor.

[0074] During manufacturing, when the stack EAS label 900 is folded about the folding point 904, the welding plate 902 is welded or otherwise secured to at least a portion of the first electrode plate 809A. In some examples, when stack terminals are used to provide cross-layer connection, the stack terminals may also be welded or otherwise secured to each other.

[0075] FIGS. 10A, 10B, 10C, 11 A, 11B, 12A, 12B, 13A, 13B, and 14 illustrate stack EAS labels 1000, 1100, 1200, 1300, and 1400 that include layers that incorporate functions other than tuning the resonance or voltage response of the EAS label. These layers are sometimes referred to as “special function layers.” The special function layer may be coplanar with another layer (e.g., on the same side of the same carrier layer 106) or is a distinct layer (e.g., connected via stack terminals, etc.). Generally, the metallic components of the special function layers are positioned to not interfere with the effective area inside the coil where electromagnetic field flux passes through (5). For example, the metallic components may be position outside of the coils of the inductive layers (e.g., on the same carrier plane 106) or may have a similar footprint as the capacitive layer(s). FIGS. 10A, 10B, and 10C illustrate an example stack EAS label 1000 with an ultra-high frequency (UHF)-Radio-frequency identification (RFID) function integrated into a stack EAS label as a special function layer. The EAS label 1000 may be based on, for example, any of the stack EAS labels 200A, 200B, 300A, 300B, 400A, 400B, 500A, 500B, 600A, 600B, 700, and 900 described above. In the illustrated example, the dual function label 1000 includes the stack EAS circuit 1002 and a UHF circuit 1004. In the illustrated example, the UHF circuit 1004 is on one of the carrier layers 106 of the stack EAS circuit 1002 and is coplanar with one of the planar inductors. The UHF circuit 1004 includes an UHF antenna 1006 and RFID integrated circuit (IC) 1008. The RFID IC 1008 may be a high frequency (HF) RFID IC or an ultra-high frequency (UHF) RFID IC. As illustrated in FIGS. 10A, 10B, and 10C, for HF RFID applications and near-field communication (NFC) applications, the EAS label 900 with the integrated UHF-RFID functions maintains the benefits of the stack EAS label as described above. For example, incorporating the UHF circuit 1004 into the stack EAS circuit 1002 may reduce the size of the HF RFID or NFC label while maintaining its performance.

[0076] FIGS. 11 A and 1 IB illustrate an example stack EAS label 1100 with a deactivation fuse layer 1102 as a special function layer. FIG. 11 A is an exploded perspective view of the example stack EAS label 1100. FIG. 1 IB illustrates an equivalent circuit diagram for the example stack EAS label 1100 of FIG. 11A. The stack EAS label 1100 may be based on, for example, any of the stack EAS labels 200A, 200B, 300A, 300B, 400A, 400B, 500A, 500B, 600A, 600B, 700, and 900 described above. In the illustrated example, the deactivation fuse layer 1102 has a footprint that corresponds to the footprint of the capacitive layer 102 of the base 100. In the illustrated example, the deactivation fuse layer 1102 is connected in parallel to the capacitor layer 102 of the base 100. The deactivation fuse layer 1102 permanently short circuits when the label is placed in an extremely strong magnetic field (e.g., via deactivation device), bypassing the capacitive layer 102. Thus, exposing the EAS label 1100 to the strong magnetic field permanently disables the stack EAS label 1100.

[0077] FIGS. 12A and 12B illustrate an example stack EAS label 1200 with a light emitting diode (LED) indicator 1202 as a special function layer. FIG. 12A is an exploded perspective view of the example stack EAS label 1200. FIG. 12B illustrates an equivalent circuit diagram for the example stack EAS label 1200 of FIG. 12A. The stack EAS label 1200 may be based on, for example, any of the stack EAS labels 200A, 200B, 300A, 300B, 400A, 400B, 500A, 500B, 600 A, 600B, 700, and 900 described above. In the illustrated example, the LED indicator 1202 has a footprint that corresponds to the footprint of the capacitive layer 102 of the base 100. In the illustrated example, the LED indicator 1202 includes an LED 1204 and stack terminals 1206A and 1206B. The LED indicator 1202 indicates if the EAS label 1200 is functional (e.g., is enabled or disabled, is operational, etc.). In the illustrated example, the LED 1204 is connected in parallel to the capacitor 102 of the base 100. The LED 1204 lights up when the EAS label 1200 is present in the magnetic field (e.g., generated by a security pedestal) with the expected resonant frequency (e.g., with 8.2 MHz resonant frequency band). When the EAS tag is deactivated and/or otherwise rendered inoperable (e.g., damaged, etc.), the LED 1204 does not light.

[0078] FIGS. 13A and 13B illustrate an example stack EAS label 1300 with an e-ink display

1302 as a special function layer. FIG. 13A is an exploded perspective view of the example stack EAS label 1300. FIG. 13B illustrates an equivalent circuit diagram for the example stack EAS label 1300 of FIG. 13A. The stack EAS label 1300 may be based on, for example, any of the stack EAS labels 200A, 200B, 300A, 300B, 400A, 400B, 500A, 500B, 600A, 600B, 700, and 900 described above. In the illustrated example, the e-ink display 1302 has a footprint that corresponds to the footprint of the capacitive layer 102 of the base 100. The e-ink display 1302 is an electronic display device that displays, for example, product information (e.g., serial number, a unique identifying code, a logo, etc.) when powered. In the illustrated example, the e-ink display 1302 is connected in parallel to the capacitor 102 of the base 100. The stack EAS label 1302 provides power to the e-ink display 1302 when the label 1302 is present in the magnetic field (e.g., generated by a security pedestal) with the expected resonant frequency (e.g., with 8.2 MHz resonant frequency band).

[0079] FIG. 14 illustrate an example stack EAS label 1400 with a temperature monitor 1402 as a special function layer. FIG. 14 is an exploded perspective view of the example stack EAS label 1400. The stack EAS label 1400 may be based on, for example, any of the stack EAS labels 200A, 200B, 300A, 300B, 400A, 400B, 500A, 500B, 600A, 600B, 700, and 900 described above. The temperature monitor 1402 monitors the article’s surface temperature. The temperature monitor 1402 changes color when article’s surface temperature exceeds a setting value. In some examples, the change in color is irreversible. The EAS label 1400 may be, for example, used as part of a food label placed on frozen food products. In such an example, the temperature monitor 1402 ensures the frozen food product it attaches to has been keep under proper temperature.

[0080] The layers described above in FIGS. 10A, 10B, 10C, 11A, 11B, 12A, 12B, 13A, 13B, and 14 are examples of functions enabled by the special function layers. Other functions or configurations (e.g., resettable fuse, speakers, other tracking and/or communication technology, etc.) may also incorporated into a special function layer. Additionally, in some examples, a stack EAS label may include more than one of the special functions layers described above.

[0081] Although the embodiments of the present invention have been illustrated in the accompanying drawings and described in the foregoing detailed description, it is to be understood that the present disclosure is not to be limited to just the embodiments disclosed, but that the disclosure described herein is capable of numerous rearrangements, modifications and substitutions without departing from the scope of the claims hereafter. The terms “includes,” “including,” and “include” are inclusive and have the same scope as “comprises,” “comprising,” and “comprise” respectively. The claims as follows are intended to include all modifications and alterations insofar as they come within the scope of the claims or the equivalent thereof.

Claims

CLAIMS Having thus described the invention, the following is claimed:

1. An electronic article surveillance (EAS) label comprising: a base including a planar capacitor defining a footprint on a first layer and a planar inductor on a second layer defining a central area where electromagnetic field flux passes through, the second layer being a different layer, wherein the planar capacitor and the planar inductor are connected between the first and layer and the second layer via a first set of stack terminals; and wherein the footprint of the planar inductor is not within the central area.

2. The EAS label of claim 1, further comprising a stack booster including at least one inductive layer, the stack booster electrically coupled to the base via a second set of stack terminals.

3. The EAS label of claim 2, wherein the at least one inductive layer of the stack booster includes a first inductive layer and a second inductive layer physically and electrically coupled to the first inductive layer.

4. The EAS label of claim 3, wherein the first inductive layer and the second inductive layer are electrically connected in series.

5. The EAS label of claim 2, wherein the at least one inductive layer of the stack booster includes a first inductive layer, a second inductive layer physically and electrically coupled to the first inductive layer, and a third inductive layer physically and electrically coupled to the second inductive layer.

6. The EAS label of claim 5, wherein at least two of the first inductive layer, the second inductive layer, and the third inductive layer are electrically connected in series.

7. The EAS label of claim 2, wherein the at least one inductive layer of the stack booster includes a first inductive layer, a second inductive layer physically and electrically coupled to the first inductive layer, a third inductive layer physically and electrically coupled to the second inductive layer, and a fourth layer physically and electrically coupled to the third inductive layer.

8. The EAS label of claim 7, wherein at least two of the first inductive layer, the second inductive layer, the third inductive layer, and the fourth inductive layer are electrically connected in series.

9. The EAS label of claim 2, wherein the planar inductor of the base defines a first stack terminal, a second stack terminal, and a pass through terminal to facilitate electrically coupling the planar inductor and the planar capacitor of the base and the at least one inductive layer of the stack booster.

10. The EAS label of claim 2, further comprising an adhesive layer configured to affix the EAS label to an object, and wherein the base is coupled to the adhesive layer and the stack booster is coupled to the base.

11. The EAS label of claim 2, further comprising an adhesive layer configured to affix the EAS label to an object, and wherein the stack booster is coupled to the adhesive layer and the base is coupled to the stack booster.

12. The EAS label of claim 2, wherein the planar inductor of the base includes a first number of coils and defines an effective area inside the first number of coils where electromagnetic field flux passes through, and wherein the at least one inductive layer of the stack booster includes a second number of coils and increases a total number of coils for the EAS label without decreasing the effective area.

13. The EAS label of claim 2, further comprising a carrier layer between the planar inductor of the base and the inductive layer of the stack booster, the carrier layer hosting a special function layer.

14. The EAS label of claim 13, wherein the special function layer includes an antenna affixed to the carrier layer; and a radio frequency identification (RFID) integrated circuit electrically coupled to the antenna.

15. The EAS label of claim 14, wherein square footprint is between 7 millimeters and 25 millimeters on each side.

16. An electronic article surveillance (EAS) label comprising: a base including a planar capacitor, a planar inductor, and a dielectric film, the planar capacitor and the planar inductor being coplanar on the dielectric film and forming one layer; and a stack booster including at least one inductive layer, the stack booster electrically coupled to the base via stack terminals.

17. The EAS label of 16, wherein at least a portion of the planar capacitor and a portion of the dielectric film fold about a folding point.

18. The EAS label of claim 17, wherein the planar inductor of the base and the at least one inductive layer of the stack booster define a central area where electromagnetic field flux passes through, and wherein when the at least a portion of the planar capacitor is folded about the folding point, the least a portion of the planar capacitor is not within the central area.

19. The EAS label of claim 1 , wherein the at least one inductive layer of the stack booster is formed on the dielectric film, and wherein, to form the stack booster, the dielectric film is folded about a folding point to align the at least one inductive layer of the stack booster with the planar inductor of the base.

20. An electronic article surveillance label comprising: at least one capacitive layer; multiple planar coil layers stacked on top of each other to define an inductive coil providing a total number of coil turns and defining an area inside the inductive coil, the at least one capacitive layer is stacked on and electrically coupled to at least one of the multiple planar coil layers; and at least one carrier layer supporting the multiple planar coil layers; wherein the at least one capacitive layer is within a footprint defined by coils of the multiple planar coil layers.