WO2024004470A1

WO2024004470A1 - Control circuit for converter circuit and control method for converter circuit

Info

Publication number: WO2024004470A1
Application number: PCT/JP2023/019633
Authority: WO
Inventors: 和憲木寺
Original assignee: パナソニックＩｐマネジメント株式会社
Priority date: 2022-06-30
Filing date: 2023-05-26
Publication date: 2024-01-04

Abstract

A control circuit (2) comprises: a first comparator (61), a first peak hold circuit (71), a first A/D conversion unit, a first control unit, and a first D/A conversion unit (212). The first comparator (61) outputs a first switching signal (Sig1) by comparing a detection voltage (Vd) and a first reference potential (DA1). The first peak hold circuit (71) holds a first peak value that is either the maximum value or the minimum value of the detection voltage (Vd). The first A/D conversion unit performs A/D conversion on the first peak value. The first control unit determines a digital value of the first reference potential (DA1) on the basis of the voltage output by the first A/D conversion unit. The first D/A conversion unit (212) performs D/A conversion on the digital value of the first reference potential (DA1), and outputs the converted value as the first reference potential (DA1) to the first comparator (61).

Description

Converter circuit control circuit and converter circuit control method

The present invention relates to a control circuit for a converter circuit that converts an input voltage into a desired voltage and outputs it, and a method for controlling the converter circuit.

Patent Document 1 discloses a DC-DC converter that converts DC power between an input electric wire and an output electric wire.

JP 2018-057203 Publication

The present invention provides a control circuit for a converter circuit that can be easily controlled with a desired reactor current even when the converter circuit is controlled at a relatively high frequency.

A control circuit for a converter circuit according to one aspect of the present invention includes a reactor, a first switch element and a second switch element connected to the reactor, and alternately switches the first switch element and the second switch element. This is a control circuit for a converter circuit that converts an input voltage into a desired voltage and outputs it by turning it on and off. The control circuit includes a first comparator, a first peak hold circuit, a first A/D conversion section, a first control section, and a first D/A conversion section. The first comparator turns on/off each of the first switch element and the second switch element by comparing a detection voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential. A first switching signal for switching off is output. The first peak hold circuit holds a first peak value that is either a maximum value or a minimum value of the detected voltage. The first A/D converter performs A/D conversion on the first peak value held by the first peak hold circuit. The first control section determines a digital value of the first reference potential based on the voltage output from the first A/D conversion section. The first D/A converter performs D/A conversion on the digital value of the first reference potential determined by the first controller, and outputs the digital value as the first reference potential to the first comparator.

A method for controlling a converter circuit according to one aspect of the present invention includes a reactor, and a first switch element and a second switch element connected to the reactor, and wherein the first switch element and the second switch element are alternately switched. This is a method of controlling a converter circuit that converts an input voltage into a desired voltage and outputs it by turning it on and off. In the control method, each of the first switch element and the second switch element is turned on/off by comparing a detection voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential. A first switching signal for switching is output. In the control method, a first peak value that is either a maximum value or a minimum value of the detected voltage is held. In the control method, the held first peak value is A/D converted. In the control method, a digital value of the first reference potential is determined based on the A/D converted voltage. In the control method, the determined digital value of the first reference potential is subjected to D/A conversion, and is set as the first reference potential.

The control circuit for the converter circuit of the present invention has the advantage that even when controlling the converter circuit at a relatively high frequency, it is easy to control with a desired reactor current.

FIG. 1 is a circuit diagram showing the configuration of a converter circuit and a basic control circuit. FIG. 2 is a waveform diagram when the converter circuit operates as a boost chopper. FIG. 3 is a circuit diagram showing the configuration of the control circuit of the converter circuit according to the embodiment. FIG. 4 is a waveform diagram of the detected voltage. FIG. 5 is an output waveform diagram of the peak hold circuit. FIG. 6 is a circuit diagram showing the configuration of a control circuit of a converter circuit according to a first modification of the embodiment. FIG. 7 is a circuit diagram showing the configuration of a control circuit of a converter circuit according to a second modification of the embodiment.

(Embodiment)
[1. Technical background]
First, the technical background that led to the invention of a control circuit for a converter circuit according to an embodiment will be explained using a converter circuit 200 and a basic control circuit 20 shown in FIG. FIG. 1 is a circuit diagram showing the configuration of a converter circuit 200 and a basic control circuit 20.

The converter circuit 200 is a synchronous rectification bidirectional converter circuit. As shown in FIG. 1, in the converter circuit 200, the power supply 3 is connected between the first high potential terminal P11 and the first low potential terminal P12, and the power supply 3 is connected between the second high potential terminal P21 and the second low potential terminal P22. When a load 4 is connected between them, a step-up chopper operation is performed to step up the input voltage supplied from the power supply 3 and output it to the load 4, thereby functioning as a step-up converter circuit. Further, in the converter circuit 200, a load 4 is connected between the first high potential terminal P11 and the first low potential terminal P12, and a power supply 3 is connected between the second high potential terminal P21 and the second low potential terminal P22. When connected, it performs a step-down chopper operation that steps down the input voltage supplied from the power supply 3 and outputs it to the load 4, and functions as a step-down converter circuit.

The potential of the first low potential terminal P12 is lower than the potential of the first high potential terminal P11, and the potential of the second low potential terminal P22 is lower than the potential of the second high potential terminal P21. Further, the first low potential terminal P12 and the second low potential terminal P22 are connected and have the same potential.

The converter circuit 200 includes a first capacitor C1, a second capacitor C2, a reactor L1, a first switch element S1, a second switch element S2, a first gate resistor Rg1, a second gate resistor Rg2, and a second capacitor C2. 1 drive circuit 11, a second drive circuit 12, and a current detector 5. Converter circuit 200 is controlled by basic control circuit 20 .

The first capacitor C1 is connected between the first high potential terminal P11 and the first low potential terminal P12. Further, the second capacitor C2 is connected between the second high potential terminal P21 and the second low potential terminal P22. The first capacitor C1 and the second capacitor C2 are both aluminum electrolytic capacitors, for example.

The reactor L1 has a first end (the left end in FIG. 1) connected to the first high potential terminal P11, and a second end (the right end in FIG. 1) the connection point between the first switch element S1 and the second switch element S2. It is connected to the.

The first switch element S1 and the second switch element S2 are both transistors such as normally-off type MOSFETs (Metal Oxide Semiconductor Field-Effect Transistors), and are connected in series. The drain of the first switch element S1 is connected to the second high potential terminal P21, and the source of the second switch element S2 is connected to the first low potential terminal P12 and the second low potential terminal P22. Further, the source of the first switching element S1 and the drain of the second switching element S2 are connected to the second end of the reactor L1. Further, the gate of the first switch element S1 is connected to the first drive circuit 11 via the first gate resistor Rg1, and the gate of the second switch element S2 is connected to the second drive circuit 11 via the second gate resistor Rg2. It is connected to circuit 12.

Note that both the first switch element S1 and the second switch element S2 are not limited to MOSFETs, and may be other transistors such as IGBTs (Insulated Gate Bipolar Transistors) or GaN (Gallium Nitride) transistors.

The first drive circuit 11 receives a first control signal Sig10 from the basic control circuit 20 and sends a first drive signal for applying a drive voltage to the gate of the first switch element S1 via the first gate resistor Rg1. This is a circuit that outputs Sig11. The first control signal Sig10 is a signal that instructs to turn on or turn off the first switch element S1. That is, the first drive circuit 11 receives the first control signal Sig10 from the basic control circuit 20 and outputs the first drive signal Sig11, thereby driving the first switch element S1.

Specifically, when the first drive signal Sig11 is at a high level, the gate capacitance (input capacitance) of the first switch element S1 is charged, thereby turning on the first switch element S1. On the other hand, when the first drive signal Sig11 is at a low level, the charges accumulated in the gate capacitance of the first switch element S1 are discharged, thereby turning off the first switch element S1.

The second drive circuit 12 receives a second control signal Sig20 from the basic control circuit 20 and sends a second drive signal for applying a drive voltage to the gate of the second switch element S2 via the second gate resistor Rg2. This is an IC that outputs Sig21. The second control signal Sig20 is a signal that instructs to turn on or turn off the second switch element S2. That is, the second drive circuit 12 receives the second control signal Sig20 from the basic control circuit 20 and drives the second switch element S2.

Specifically, when the second drive signal Sig21 is at a high level, the gate capacitance (input capacitance) of the second switch element S2 is charged, thereby turning on the second switch element S2. On the other hand, when the second drive signal Sig21 is at a low level, the charges accumulated in the gate capacitance of the second switch element S2 are discharged, thereby turning off the second switch element S2.

The current detector 5 detects the reactor current IL, which is the current flowing through the reactor L1. The detection result of the current detector 5 is output to the basic control circuit 20 as a detection voltage Vd corresponding to the detected reactor current IL.

The basic control circuit 20 is realized, for example, by a microcomputer, but may also be realized by a processor or a dedicated circuit. The functions of the basic control circuit 20 are realized by hardware such as a microcomputer or processor constituting the basic control circuit 20 executing a computer program (software) stored in a memory.

When the converter circuit 200 operates as a boost chopper, the basic control circuit 20 boosts the input voltage by alternately turning on the first switch element S1 and the second switch element S2. Furthermore, when the converter circuit 200 operates as a step-down chopper, the basic control circuit 20 steps down the input voltage by alternately turning on the first switch element S1 and the second switch element S2. In either case, the basic control circuit 20 controls the first switch element S1 and the second switch element S2 by PWM (Pulse Width Modulation) control. That is, the basic control circuit 20 adjusts the input voltage by adjusting the duty ratio of each of the first control signal Sig10 outputted to the first drive circuit 11 and the second control signal Sig20 outputted to the second drive circuit 12. Step up or step down the voltage to the desired output voltage.

Specifically, the basic control circuit 20 calculates the average value of the detected voltage Vd (in other words, the average value of the reactor current IL), and sets the first value so that the calculated average value of the detected voltage Vd becomes the target value. The duty ratio of each of the control signal Sig10 and the second control signal Sig20 is adjusted. The target value is appropriately set depending on the desired output voltage.

FIG. 2 is a waveform diagram when converter circuit 200 operates as a boost chopper. In FIG. 2, "IL" indicates a reactor current flowing through reactor L1. Moreover, in FIG. 2, "S1" indicates the drive voltage applied to the gate of the first switch element S1, and "S2" indicates the drive voltage applied to the gate of the second switch element S2. In each of "S1" and "S2", "H" indicates that the drive voltage is at a high level and the switch element is in the on state, and "L" indicates that the drive voltage is at a low level and the switch element is in the on state. is in the off state. In addition, in FIG. 2, description is omitted about the dead time when both the 1st switch element S1 and the 2nd switch element S2 are turned off.

As shown in FIGS. 1 and 2, the converter circuit 200 controls the reactor current IL by alternately turning on and off the first switch element S1 and the second switch element S2 by the basic control circuit 20, and the input Converts the voltage to the desired voltage and outputs it.

Incidentally, in recent years, there has been a desire for smaller reactors in converter circuits. As a means of reducing the size of the reactor, it is conceivable to control the switching of the converter circuit at a relatively high frequency of, for example, 100 kHz or more. This is because if switching control is performed in this manner, the inductance required for the reactor can be reduced.

However, when switching the converter circuit at a relatively high frequency as described above, the reactor current changes quickly (becomes steep), making it difficult to control the reactor current to the desired peak current. , a problem arises.

For example, in the basic control circuit 20 described above, on/off of the first switch element S1 and the second switch element S2 is controlled based on the average value of the reactor current IL. Therefore, even if the reactor current IL suddenly changes, for example, it is not possible to control the on/off of the first switch element S1 and the second switch element S2 based on the instantaneous value of the reactor current IL. control that follows. As described above, unless control can be performed to follow the steep changes in reactor current IL, it is impossible to perform control such as suppressing, for example, an excessive current momentarily flowing through reactor L1.

Here, it is conceivable to control the first switch element S1 and the second switch element S2 based on the instantaneous value of the reactor current IL. However, in the A/D (Analog to Digital) conversion section of a general control circuit used as a control circuit of a converter circuit, such as a microcomputer, the sampling speed is not fast enough to follow the steep changes in the reactor current IL. is not large.

For this reason, in such a control circuit, for example, the instantaneous value of the reactor current IL is acquired with a delay from the timing when the reactor current IL reaches its peak, which makes it impossible to perform control that follows steep changes in the reactor current IL. First, there is a problem in that it cannot be controlled with a desired reactor current IL.

In view of the above, the inventors came to create the present disclosure.

Hereinafter, embodiments will be specifically described with reference to the drawings. Note that the embodiments described below are all inclusive or specific examples. The numerical values, shapes, materials, components, arrangement positions and connection forms of the components, steps, order of steps, etc. shown in the following embodiments are merely examples, and do not limit the present invention. Further, among the constituent elements in the following embodiments, constituent elements that are not described in the independent claims will be described as arbitrary constituent elements.

Note that each figure is a schematic diagram and is not necessarily strictly illustrated. Further, in each figure, substantially the same configurations are denoted by the same reference numerals, and overlapping explanations may be omitted or simplified.

[2. composition]
Hereinafter, the control circuit 2 (hereinafter also simply referred to as "control circuit 2") of the converter circuit according to the embodiment will be described using FIG. 3. FIG. 3 is a circuit diagram showing the configuration of the control circuit 2 of the converter circuit according to the embodiment. In FIG. 3, illustration of the converter circuit is omitted except for the current detector 5. Furthermore, in the embodiment, the converter circuit to be controlled by the control circuit 2 is the same as the converter circuit 200 that performs a step-up chopper operation, so a description thereof will be omitted here.

As shown in FIG. 3, the control circuit 2 includes a first control circuit 21, a second control circuit 22, a first comparator 61, a second comparator 62, a first peak hold circuit 71, and a second control circuit 21. A peak hold circuit 72 is provided.

The first comparator 61 generates a first switching signal Sig1 for switching on/off of each of the first switching element S1 and the second switching element S2 by comparing the detection voltage Vd and the first reference potential DA1. Output. Here, the first switching signal Sig1 is a signal for turning off the second switching element S2 and turning on the first switching element S1. Specifically, the first comparator 61 outputs the first switching signal Sig1 when the detection voltage Vd exceeds the first reference potential DA1.

Here, the detection voltage Vd is obtained by detecting the reactor current IL flowing through the reactor L1 with the current detector 5. FIG. 4 is a waveform diagram of the detection voltage Vd. In FIG. 5, "DA1" indicates the first reference potential DA1, and "DA2" indicates the second reference potential DA2 (described later). The current detector 5 converts the detected value of the reactor current IL into a level-shifted voltage signal so that the detected voltage Vd is approximately within the range between the first reference potential DA1 and the second reference potential DA2. , outputs the detection voltage Vd.

The second comparator 62 generates a second switching signal Sig2 for switching on/off of each of the first switching element S1 and the second switching element S2 by comparing the detection voltage Vd and the second reference potential DA2. Output. Here, the second switching signal Sig2 is a signal for turning off the first switching element S1 and turning on the second switching element S2. Specifically, the second comparator 62 outputs the second switching signal Sig2 when the detection voltage Vd becomes lower than the second reference potential DA2.

The first peak hold circuit 71 holds a first peak value that is either the maximum value or the minimum value of the detection voltage Vd. In the embodiment, the first peak hold circuit 71 holds the first peak value, which is the maximum value of the detection voltage Vd. In other words, it can be said that the first peak hold circuit 71 holds the maximum peak value of the reactor current IL.

The first peak hold circuit 71 is reset by the first reset signal Re1. That is, when the first reset signal Re1 is input while the first peak hold circuit 71 is holding the first peak value, it releases the holding of the first peak value. In the embodiment, the first reset signal Re1 is the second switching signal Sig2 output by the second comparator 62. Therefore, the first peak hold circuit 71 is reset by the second switching signal Sig2.

The second peak hold circuit 72 holds a second peak value, which is different from the first peak value, of the maximum value and the minimum value of the detection voltage Vd. In the embodiment, the second peak hold circuit 72 holds the second peak value, which is the minimum value of the detection voltage Vd. In other words, it can be said that the second peak hold circuit 72 holds the minimum peak value of the reactor current IL.

The second peak hold circuit 72 is reset by the second reset signal Re2. That is, when the second reset signal Re2 is input while the second peak hold circuit 72 is holding the second peak value, it releases the holding of the second peak value. In the embodiment, the second reset signal Re2 is the first switching signal Sig1 output by the first comparator 61. Therefore, the second peak hold circuit 72 is reset by the first switching signal Sig1.

FIG. 5 is an output waveform diagram of the peak hold circuits (first peak hold circuit 71 and second peak hold circuit 72). In FIG. 5, "V1" indicates the output voltage of the first peak hold circuit 71, and "V2" indicates the output voltage of the second peak hold circuit 72.

As shown in FIG. 5, when the detection voltage Vd reaches the maximum value at time t1, in other words, the reactor current IL reaches the maximum peak value, the output voltage V1 of the first peak hold circuit 71 reaches the maximum value (that is, the first peak value). Thereafter, when the second switching signal Sig2 (that is, the first reset signal Re1) is input to the first peak hold circuit 71 at time t2, the first peak hold circuit 71 is reset. The input timing of the second switching signal Sig2 is approximately the same as the timing at which the detection voltage Vd reaches the minimum value, in other words, the reactor current IL reaches the minimum peak value.

Further, as shown in FIG. 5, when the detected voltage Vd reaches the minimum value at time t2, in other words, the reactor current IL reaches the minimum peak value, the output voltage V2 of the second peak hold circuit 72 reaches the minimum value (that is, second peak value). Thereafter, when the first switching signal Sig1 (that is, the second reset signal Re2) is input to the second peak hold circuit 72 at time t3, the second peak hold circuit 72 is reset. The input timing of the first switching signal Sig1 is approximately the same as the timing at which the detection voltage Vd reaches its maximum value, in other words, the reactor current IL reaches its maximum peak value.

The first control circuit 21 is realized, for example, by a microcomputer, but may also be realized by a processor or a dedicated circuit. The functions of the first control circuit 21 are realized by hardware such as a microcomputer or processor constituting the first control circuit 21 executing a computer program (software) stored in a memory.

The first control circuit 21 includes a control section 210, an A/D conversion section 211, a first D/A (Digital to Analog) conversion section 212, and a second D/A conversion section 213.

The A/D converter 211 obtains the output voltage of the first peak hold circuit 71 by A/D converting it. Further, the A/D converter 211 obtains the output voltage of the second peak hold circuit 72 by A/D converting it. Here, the sampling rate of the A/D converter 211 is such that sampling is possible during the period in which the first peak hold circuit 71 and the second peak hold circuit 72 respectively hold the first peak value and the second peak value. It's speed.

Therefore, the A/D converter 211 functions as a first A/D converter that A/D converts the first peak value held by the first peak hold circuit 71. Further, the A/D converter 211 functions as a second A/D converter that A/D converts the second peak value held by the second peak hold circuit 72. The A/D converter 211 converts the output voltage of the first peak hold circuit 71 into an A/D converter to obtain a first voltage value, and the output voltage of the second peak hold circuit 72 into an A/D converter converts the output voltage into a second voltage value. , are individually output to the control unit 210.

The control unit 210 determines the digital value of the first reference potential DA1 based on the first voltage value output by the A/D conversion unit 211. That is, the control section 210 functions as a first control section that determines the digital value of the first reference potential DA1 based on the voltage output by the first A/D conversion section. Further, the control unit 210 determines the digital value of the second reference potential DA2 based on the second voltage value output by the A/D conversion unit 211. That is, the control section 210 functions as a second control section that determines the digital value of the second reference potential DA2 based on the voltage output by the second A/D conversion section.

Specifically, the control unit 210 controls the first voltage value, that is, the first peak value held by the first peak hold circuit 71, and the second voltage value, that is, the second peak value held by the second peak hold circuit 72. The maximum peak value and the minimum peak value of the reactor current IL are referred to by referring to. Thereby, the control unit 210 adjusts the digital value of the first reference potential DA1 and the second reference potential DA2 so that the reactor current IL has a desired magnitude based on the maximum peak value and minimum peak value of the reactor current IL. Determine the digital value.

The first D/A conversion unit 212 performs D/A conversion on the digital value of the first reference potential DA1 determined by the control unit 210 (first control unit), and converts the digital value of the first reference potential DA1, which is an analog value, to the first comparator. Output to 61.

The second D/A conversion unit 213 performs D/A conversion on the digital value of the second reference potential DA2 determined by the control unit 210 (second control unit), and converts the digital value of the second reference potential DA2, which is an analog value, to the second comparator. Output to 62.

The second control circuit 22 is realized, for example, by a microcomputer, but may also be realized by a processor or a dedicated circuit. The functions of the second control circuit 22 are realized by hardware such as a microcomputer or processor constituting the second control circuit 22 executing a computer program (software) stored in a memory.

The second control circuit 22 outputs a first control signal Sig10 and a second control signal Sig20 based on the first switching signal Sig1 output from the first comparator 61. Specifically, when the first switching signal Sig1 is input, the second control circuit 22 turns off the second switch element S2 by outputting the second control signal Sig20 at a low level. Thereafter, after counting the dead time, the second control circuit 22 turns on the first switch element S1 by outputting the first control signal Sig10 at a high level.

Further, the second control circuit 22 outputs the first control signal Sig10 and the second control signal Sig20 based on the second switching signal Sig2 output from the second comparator 62. Specifically, when the second switching signal Sig2 is input, the second control circuit 22 turns off the first switch element S1 by outputting the first control signal Sig10 at a low level. Thereafter, after counting the dead time, the second control circuit 22 turns on the second switch element S2 by outputting a high-level second control signal Sig20.

Note that in each of the first control signal Sig1 and the second control signal Sig2, the high level and low level may be reversed.

[advantage]
As described above, in the control circuit 2 according to the embodiment, the first peak hold circuit 71 holds the first peak value, which is either the maximum value or the minimum value of the detection voltage Vd. Therefore, the A/D converter 211 (first A/D converter) performs A/D conversion on the first peak value held by the first peak hold circuit 71, thereby increasing the maximum peak value and the minimum value of the reactor current IL. It is possible to obtain either one of the peak values indirectly.

In other words, in the control circuit 2 according to the embodiment, even if the sampling speed is not high enough to allow the first A/D converter to follow a steep change in the reactor current IL, the maximum peak value and the minimum peak value of the reactor current IL can be It is possible to control the reactor current IL with reference to either one of them. Therefore, the control circuit 2 according to the embodiment has the advantage that even when controlling the converter circuit 200 at a relatively high frequency, it is easy to control with a desired reactor current IL.

Furthermore, in the control circuit 2 according to the embodiment, the second peak hold circuit 72 holds a second peak value, which is different from the first peak value, of the maximum value and the minimum value of the detection voltage Vd. Therefore, the A/D converter 211 (the first A/D converter and the second A/D converter) receives the first peak value held by the first peak hold circuit 71 and the first peak value held by the second peak hold circuit 72. By A/D converting the second peak values, it is possible to indirectly obtain both the maximum peak value and the minimum peak value of the reactor current IL.

In other words, in the control circuit 2 according to the embodiment, even if the sampling speed of both the first A/D converter and the second A/D converter is not high enough to follow a steep change in the reactor current IL, the reactor current It is possible to control the reactor current IL with reference to both the maximum peak value and minimum peak value of IL. For this reason, the control circuit 2 according to the embodiment has the advantage that even when controlling the converter circuit 200 at a relatively high frequency, it is easy to control with a desired reactor current IL with higher accuracy.

(Modified example)
Although the embodiments have been described above, the present invention is not limited to the above embodiments. Modifications of the embodiment will be listed below.

(First modification)
FIG. 6 is a circuit diagram showing the configuration of a control circuit 2A (hereinafter simply referred to as "control circuit 2A") of a converter circuit according to a first modification of the embodiment. As shown in FIG. 6, the control circuit 2A according to this modification outputs the second switching signal Sig2 instead of including the second comparator 62, the second peak hold circuit 72, and the second D/A converter 213. The control circuit 2 is different from the control circuit 2 according to the embodiment in that it includes a signal output section 214 that outputs a signal.

The signal output unit 214 calculates the average value of the detected voltage Vd (in other words, the average value of the reactor current IL), and outputs the second switching signal Sig2 when the calculated average value of the detected voltage Vd reaches the target value. .

That is, in this modification, the control circuit 2A controls the reactor current IL by referring to only one of the maximum peak value and the minimum peak value (here, only the maximum peak value) of the reactor current IL. ing. In this modification, the reactor current IL is also controlled by referring to either the maximum peak value or the minimum peak value of the reactor current IL, so even when controlling the converter circuit 200 at a relatively high frequency, the desired This has the advantage of being easy to control with the reactor current IL.

Note that in the example shown in FIG. 6, the control circuit 2A includes a signal output that outputs the second switching signal Sig2 instead of including the second comparator 62, the second peak hold circuit 72, and the second D/A converter 213. 214, but is not limited thereto. For example, the control circuit 2A may include a signal output section that outputs the first switching signal Sig1 instead of including the first comparator 61, the first peak hold circuit 71, and the first D/A conversion section 212. . In this case, the signal output section may be configured to calculate the average value of the detected voltages Vd, and output the first switching signal Sig1 when the calculated average value of the detected voltages Vd reaches a target value.

(Second modification)
FIG. 7 is a circuit diagram showing the configuration of a control circuit 2B (hereinafter simply referred to as "control circuit 2B") of a converter circuit according to a second modification of the embodiment. As shown in FIG. 7, the control circuit 2B according to this modification example further includes a differential amplifier 8 and a third D/A converter 215. It differs from

The difference amplifier 8 amplifies the difference between the third reference potential DA3, which is input to the first comparator 61 and is higher than the first reference potential DA1, and the detection voltage Vd, and outputs the amplified difference to the first comparator 61. That is, in this modification, the output voltage Vd' of the differential amplifier 8 is input to the first comparator 61 instead of the detection voltage Vd. The output voltage Vd' is not the detection voltage Vd itself, but is a voltage that changes depending on the magnitude of the detection voltage Vd, and is a voltage that corresponds to the detection voltage Vd.

The third D/A converter 215 performs D/A conversion on the digital value of the third reference potential DA3 determined based on the digital value of the first reference potential DA1 determined by the controller 210 (first controller), and converts it into an analog It is output to the differential amplifier 8 as the third reference potential DA3.

The control circuit 2B according to this modification has an advantage in that the resolution for controlling the reactor current IL can be increased by increasing the resolution of the detection voltage Vd input to the control circuit 2B. The above advantages will be specifically explained below.

In general, in a microcomputer or the like used in a control circuit of a converter circuit, the resolution of the D/A converter is lower than that of the A/D converter. For example, while the resolution of the A/D converter is 12 bits, the resolution of the D/A converter may be 8 bits. In this way, when the resolution of the D/A converter is lower than that of the A/D converter, there is a problem that the resolution of the control circuit for controlling the reactor current IL is limited to the resolution of the D/A converter. be.

Therefore, in the control circuit 2B according to this modification, the above problem is solved by using the differential amplifier 8. As a specific example, a description will be given assuming that the resolution of the first D/A converter 212 and the third D/A converter 215 is 0.1V. Here, in the control circuit 2A according to the first modification, since the first reference potential DA1 can only be changed in increments of 0.1V at the minimum, the reactor in response to a change smaller than 0.1V in the detection voltage Vd. Current IL cannot be controlled.

On the other hand, in the control circuit 2B according to the present modification, the first comparator 61 compares the detected voltage Vd' obtained by amplifying the difference between the detected voltage Vd and the third reference potential DA3 with the difference amplifier 8 and the first reference potential DA1. do. Therefore, in this modification, even if the first reference potential DA1 can only be changed in increments of 0.1V at the minimum, the reactor current IL is controlled in response to a change in the detection voltage Vd that is smaller than 0.1V. It is possible to do this.

For example, the description will be made assuming that the first reference potential DA1 is 0.1V, the third reference potential DA3 is 1V, the gain of the differential amplifier 8 is 4 times, and the detection voltage Vd is 1.025V. In this case, the output voltage Vd' of the differential amplifier 8 is Vd'=(1.025-1)×4=0.1V. Therefore, in the control circuit 2B according to the present modification, the first comparator 61 compares the output voltage Vd' and the first reference potential DA1 to detect a change in the detected voltage Vd that is smaller than 0.1V. Also, it is possible to control the reactor current IL with a resolution doubled according to the gain of the differential amplifier 8.

Note that in the example shown in FIG. 7, the control circuit 2B has a configuration including the differential amplifier 8 at the front stage of the first comparator 61, but the configuration is not limited to this. For example, the control circuit 2B may include a differential amplifier at the front stage of the second comparator 62 instead of the first comparator 61. In this case, the difference amplifier amplifies the difference between the fourth reference potential higher than the second reference potential DA2 input to the second comparator 62 and the detection voltage Vd, and outputs the difference to the second comparator 62. It is sufficient if it is configured. Further, in this case, the control section 21 may include a fourth D/A conversion section that outputs the fourth reference potential instead of the third D/A conversion section 215.

Further, for example, the configuration of the control circuit 2B is also applicable to the control circuit 2 according to the embodiment. That is, in the control circuit 2 according to the embodiment, not only the differential amplifier 8 may be provided before the first comparator 61, but also a differential amplifier may be provided before the second comparator 62. In this case, the control unit 21 may further include not only the third D/A converter 215 but also a fourth D/A converter.

(Other variations)
In the embodiment described above, the control section 210 serves as both the first control section and the second control section, but is not limited thereto. For example, the first control section and the second control section may be mutually independent circuits.

In the above embodiment, the A/D converter 211 also serves as the first A/D converter and the second A/D converter, but the invention is not limited thereto. For example, the first A/D converter and the second A/D converter may be mutually independent circuits.

In the above embodiment, the current detector 5 is placed before the reactor L1, but the present invention is not limited thereto. For example, the current detector 5 may be placed after the reactor L1. Moreover, the number of current detectors 5 may be two, and one may be connected in series to the 1st switch element S1, and the other may be connected in series to the 2nd switch element S2. In this case, one current detector 5 indirectly detects the reactor current IL by detecting the current flowing through the first switch element S1, and the other current detector 5 detects the current flowing through the second switch element S2. By detecting , the reactor current IL is indirectly detected.

In the above embodiment, the converter circuit 200 is a bidirectional converter circuit, but is not limited to this. For example, converter circuit 200 may be a step-up converter circuit or a step-down converter circuit.

In the above embodiment, the converter circuit 200 is a half-bridge switching converter circuit having the first switch element S1 and the second switch element S2, but is not limited to this. For example, the converter circuit 200 may be a full-bridge switching converter circuit configured by connecting two series-connected switching elements in parallel to each other. In this case as well, the control circuit 2 controls to alternately turn on/off a pair of switch elements corresponding to the first switch element S1 and another pair of switch elements corresponding to the second switch element S2. do it.

Other embodiments may be obtained by making various modifications to each embodiment that those skilled in the art can think of, or by arbitrarily combining the components and functions of each embodiment without departing from the spirit of the present invention. The present invention also includes such forms.

(summary)
As described above, the

control circuits

2, 2A, 2B of the converter circuit 200 according to the first aspect include the reactor L1, and the first switch element S1 and the second switch element connected to the reactor L1, This is a control circuit for a converter circuit 200 that converts an input voltage into a desired voltage and outputs the desired voltage by alternately turning on and off the first switch element S1 and the second switch element S2. The

control circuits

2, 2A, and 2B include a first comparator 61, a first peak hold circuit 71, a first A/D conversion section (A/D conversion section 211), and a first control section (control section 210). , a first D/A converter 212. The first comparator 61 compares the detection voltage Vd obtained by detecting the reactor current IL flowing through the reactor L1 with the first reference potential DA1, thereby determining whether each of the first switch element S1 and the second switch element S2 A first switching signal Sig1 for switching on/off is output. The first peak hold circuit 71 holds a first peak value that is either the maximum value or the minimum value of the detection voltage Vd. The first A/D converter A/D converts the first peak value held by the first peak hold circuit 71. The first control section determines the digital value of the first reference potential DA1 based on the voltage output by the first A/D conversion section. The first D/A conversion section 212 performs D/A conversion on the digital value of the first reference potential DA1 determined by the first control section, and outputs it to the first comparator 61 as the first reference potential DA1.

According to this, there is an advantage that even when controlling converter circuit 200 at a relatively high frequency, it is easy to control with a desired reactor current IL.

Further, in the first aspect, the control circuit 2 of the converter circuit 200 according to the second aspect includes the second comparator 62, the second peak hold circuit 72, and the second A/D conversion section (A/D conversion section 211), a second control section (control section 210), and a second D/A conversion section 213. The second comparator 62 generates a second switching signal Sig2 for switching on/off of each of the first switching element S1 and the second switching element S2 by comparing the detection voltage Vd and the second reference potential DA2. Output. The second peak hold circuit 72 holds a second peak value different from the first peak value of the maximum value and the minimum value of the detection voltage Vd. The second A/D converter performs A/D conversion on the second peak value held by the second peak hold circuit 72. The second control unit determines the digital value of the second reference potential DA2 based on the voltage output from the second A/D converter. The second D/A conversion section 213 performs D/A conversion on the digital value of the second reference potential DA2 determined by the second control section, and outputs it to the second comparator 62 as the second reference potential DA2.

According to this, even when controlling the converter circuit 200 at a relatively high frequency, there is an advantage that it is easier to control with a desired reactor current IL with higher accuracy.

Further, in the control circuit 2 of the converter circuit 200 according to the third aspect, in the second aspect, the first peak hold circuit 71 is reset by the second switching signal Sig2, and the second peak hold circuit 72 is reset by the second switching signal Sig2. It is reset by the switching signal Sig1.

According to this, there is an advantage that the first peak hold circuit 71 can be reset at an appropriate timing in synchronization with the on/off timing of the first switch element S1 and the second switch element S2.

Furthermore, the control circuit 2B of the converter circuit 200 according to the fourth aspect further includes a differential amplifier 8 in any one of the first to third aspects. The difference amplifier 8 amplifies the difference between the third reference potential DA3, which is higher than the first reference potential DA1 input to the first comparator 61, and the detection voltage Vd, and outputs the amplified difference to the first comparator 61.

According to this, there is an advantage that by increasing the resolution of the detection voltage Vd input to the control circuit 2B, the resolution of controlling the reactor current IL can be increased.

Further, a control method for a converter circuit 200 according to a fifth aspect includes a reactor L1, a first switch element S1 and a second switch element connected to the reactor L1, and a first switch element S1 and a second switch element connected to the reactor L1. This is a method of controlling the converter circuit 200 that converts an input voltage into a desired voltage and outputs the desired voltage by alternately turning on and off the element S2. In the control method, each of the first switch element S1 and the second switch element S2 is turned on/off by comparing the detection voltage Vd obtained by detecting the reactor current IL flowing through the reactor L1 with the first reference potential DA1. A first switching signal Sig1 for switching off is output. In the control method, the first peak value, which is either the maximum value or the minimum value of the detection voltage Vd, is held. In the control method, the held first peak value is A/D converted. In the control method, the digital value of the first reference potential DA1 is determined based on the first A/D converted voltage. In the control method, the determined digital value of the first reference potential DA1 is subjected to D/A conversion and is set as the first reference potential DA1.

According to this, there is an advantage that even when controlling the converter circuit 200 at a relatively high frequency, it is easy to control with a desired reactor current IL.

2, 2A, 2B Control circuit 200 Converter circuit 210 Control section (first control section, second control section)
211 A/D converter (first A/D converter, second A/D converter)
212 1st D/A converter 213 2nd D/A converter 5 Current detector 61 1st comparator 62 2nd comparator 71 1st peak hold circuit 72 2nd peak hold circuit 8 Difference amplifier DA1 1st reference potential DA2 2nd 2 reference potential DA3 3rd reference potential IL Reactor current L1 Reactor S1 1st switch element S2 2nd switch element Sig1 1st switching signal Sig2 2nd switching signal Vd Detection voltage

Claims

It has a reactor and a first switch element and a second switch element connected to the reactor, and converts the input voltage into a desired voltage by alternately turning on and off the first switch element and the second switch element. A control circuit for a converter circuit that outputs a
A first switch for switching on/off of each of the first switch element and the second switch element by comparing a detection voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential. a first comparator that outputs a switching signal;
a first peak hold circuit that holds a first peak value that is either the maximum value or the minimum value of the detected voltage;
a first A/D converter that A/D converts the first peak value held by the first peak hold circuit;
a first control unit that determines a digital value of the first reference potential based on the voltage output by the first A/D conversion unit;
a first D/A converter that performs D/A conversion on a digital value of the first reference potential determined by the first controller and outputs the digital value as the first reference potential to the first comparator;
Control circuit for converter circuit.
a second comparator that outputs a second switching signal for switching on/off of each of the first switching element and the second switching element by comparing the detected voltage and a second reference potential;
a second peak hold circuit that holds a second peak value different from the first peak value among the maximum value and minimum value of the detected voltage;
a second A/D converter that A/D converts the second peak value held by the second peak hold circuit;
a second control unit that determines a digital value of the second reference potential based on the voltage output by the second A/D conversion unit;
further comprising a second D/A converter that performs D/A conversion on the digital value of the second reference potential determined by the second controller and outputs the digital value as the second reference potential to the second comparator;
A control circuit for a converter circuit according to claim 1.
The first peak hold circuit is reset by the second switching signal,
the second peak hold circuit is reset by the first switching signal;
A control circuit for a converter circuit according to claim 2.
further comprising a difference amplifier that amplifies a difference between a third reference potential higher than the first reference potential input to the first comparator and the detected voltage and outputs the amplified difference to the first comparator;
A control circuit for a converter circuit according to claim 1 or 2.
It has a reactor and a first switch element and a second switch element connected to the reactor, and converts the input voltage into a desired voltage by alternately turning on and off the first switch element and the second switch element. A method for controlling a converter circuit that outputs
A first switch for switching on/off of each of the first switch element and the second switch element by comparing a detection voltage obtained by detecting a reactor current flowing through the reactor with a first reference potential. Outputs the switching signal,
holding a first peak value that is either the maximum value or the minimum value of the detection voltage;
A/D converting the held first peak value,
determining a digital value of the first reference potential based on the A/D converted voltage;
D/A converting the determined digital value of the first reference potential, and setting it as the first reference potential;
Control method of converter circuit.