WO2024000549A1 - 控制系统、车载显示装置及调光方法 - Google Patents

控制系统、车载显示装置及调光方法 Download PDF

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Publication number
WO2024000549A1
WO2024000549A1 PCT/CN2022/103195 CN2022103195W WO2024000549A1 WO 2024000549 A1 WO2024000549 A1 WO 2024000549A1 CN 2022103195 W CN2022103195 W CN 2022103195W WO 2024000549 A1 WO2024000549 A1 WO 2024000549A1
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Prior art keywords
gamma
voltage
chip
circuit
subcircuit
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PCT/CN2022/103195
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English (en)
French (fr)
Inventor
赵成杰
胡文杰
李强
赖政德
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280002054.4A priority Critical patent/CN117642810A/zh
Priority to PCT/CN2022/103195 priority patent/WO2024000549A1/zh
Publication of WO2024000549A1 publication Critical patent/WO2024000549A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/18—Construction of rack or frame

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a control system, a vehicle-mounted display device and a dimming method.
  • OLED Organic Light-Emitting Diode
  • OLED display panels are the main development trend in the field of display technology. Among them, vehicle-mounted displays using OLED display panels have opened up a new window for the construction of an ecosystem of human-vehicle interaction.
  • a vehicle-mounted display is a display device placed on a vehicle for displaying pictures or playing videos.
  • Vehicle-mounted displays have high requirements on product life and reliability.
  • the service life of automotive-grade products must be at least 10 years.
  • some embodiments of the present disclosure provide a control system, which includes: a timing control subcircuit, a gamma register subcircuit, a source driver subcircuit, and a power management subcircuit.
  • the timing control subcircuit is electrically connected to the gamma register subcircuit and the source driving subcircuit
  • the gamma register subcircuit is electrically connected to the source driving subcircuit
  • the power management subcircuit is electrically connected to The timing control subcircuit, the gamma register subcircuit and the source driving subcircuit are electrically connected.
  • the timing control sub-circuit is configured to read the pre-stored binding point data to generate a voltage binding point signal and transmit it to the gamma register sub-circuit, and receive N gamma signals provided by the source driving sub-circuit. voltage and generate M register values, and M is greater than N, the timing control subcircuit is further configured to, in response to a signal received at the client assembly, transmit the register value to the source driver subcircuit.
  • the gamma register subcircuit is configured to generate an analog gamma voltage signal in response to a first voltage signal received at the power management subcircuit and a voltage tie point signal received at the timing control subcircuit. transmitted to the source driver subcircuit.
  • the source driving sub-circuit is configured to receive a plurality of the analog gamma voltage signals, generate a plurality of the gamma voltages between two adjacent analog gamma voltage signals, and respond to the timing sequence
  • the control subcircuit receives the register value signal, generates a data signal and transmits it to the display panel.
  • the power management subcircuit is configured to generate a first voltage signal and transmit it to the gamma register subcircuit, and to generate an operating voltage and transmit it to the timing control subcircuit and the source driving subcircuit.
  • the timing control subcircuit at least includes: a first memory, a timing control chip, and a second memory.
  • the first memory is configured to pre-store binding point data.
  • the timing control chip is electrically connected to the first memory, and the timing control chip is configured to read the binding point data of the first memory, generate the voltage binding point signal, and receive the signal transmitted by the source driver sub-circuit.
  • N gamma voltages generate M register values and store them.
  • the timing control chip is also configured to read the register values and transmit them to the source driver in response to the signal received at the client assembly. subcircuit.
  • a second memory is electrically connected to the timing control chip, and the second memory is configured to receive and store M register values transmitted by the timing control chip.
  • the gamma register sub-circuit at least includes a gamma chip, and the gamma chip is electrically connected to the timing control chip, the source driver sub-circuit and the power management sub-circuit.
  • the gamma chip is configured to generate and transmit an analog gamma voltage signal in response to the voltage tie point signal received at the timing control chip and the first voltage signal received at the power management subcircuit. to the source driver subcircuit.
  • the source driver sub-circuit at least includes a source driver chip, and the source driver chip is electrically connected to the timing control chip and the gamma chip.
  • the source driver chip is configured to receive an analog gamma voltage signal output by the gamma chip and generate a gamma voltage; and receive a signal output by the timing control chip and transmit a data signal to the display panel.
  • the power management sub-circuit at least includes a power management chip, the power management chip and the timing control chip, the gamma chip, the source driver chip, the level shift sub-circuit and the Display panel electrical connections.
  • the power management chip is configured to provide an operating voltage to the timing control chip, provide a first voltage signal to the gamma chip and the source driver chip, and provide high/low voltage to the level shift sub-circuit. level signal, and provide a reset signal to the display panel.
  • control system further includes a level shift sub-circuit, which is electrically connected to the timing control sub-circuit and the power management chip.
  • control system further includes a level shift chip, the level shift chip is electrically connected to the timing control chip and the power management chip respectively, and the level shift chip is configured to respond to The timing control chip receives the signal, generates a second signal and transmits it to the display panel.
  • some embodiments of the present disclosure also provide a vehicle-mounted display device, including: a display panel and a control system as described in any of the above embodiments. Wherein, the display panel is electrically connected to the control system.
  • some embodiments of the present disclosure also provide a dimming method for a vehicle-mounted display device, which is applied to the vehicle-mounted display device as described in any of the above embodiments, wherein the control system of the vehicle-mounted display device sends a signal to the display panel. Transmit data signals.
  • the dimming method of the vehicle-mounted display device includes: generating a plurality of gamma voltages arranged in order from large to small or from small to large. Based on a plurality of the gamma voltages, a dithering algorithm is used to generate a plurality of register values. Modulate a gamma curve, and generate a corresponding section of the gamma curve according to the plurality of register values and the brightness of the display panel.
  • the power management subcircuit of the control system is configured to provide a first voltage signal to the gamma register subcircuit of the control system, and the timing control subcircuit of the control system is configured to, A plurality of voltage tie point signals are provided to the gamma register subcircuit.
  • the method of generating a plurality of gamma voltages arranged in order from large to small or from small to large includes: generating a plurality of simulated gamma voltages according to the first voltage signal and the plurality of voltage binding point signals, each The voltage tie point signal corresponds to an analog gamma voltage.
  • Two adjacent simulated gamma voltages are respectively set at both ends of a plurality of resistors connected in series. The voltage between the two ends of each resistor is a gamma voltage.
  • the two adjacent simulated gamma voltages generate multiple small ones. to the gamma voltages arranged in sequence.
  • the number of gamma voltages is 256.
  • the method of using a dithering algorithm to generate multiple register values based on multiple gamma voltages includes: multiple adjacent pixels on the display panel form a pixel group, and the pixels The gray level of each pixel in the group corresponds to one of the plurality of gamma voltages, and the gray level value of the pixel group is the average value of the gray level values of the multiple pixels.
  • the gamma voltages of the plurality of pixels corresponding to the gray scale of the pixel group are a register value corresponding to the gray scale of the pixel group.
  • the number of adjacent pixels in the pixel group is at least two, and the grayscale value of each pixel is the same and/or continuous, and the number of register values is at least 512. .
  • the method of using a dithering algorithm to generate multiple register values based on multiple gamma voltages includes: within consecutive multiple frames of images, the pixels on the display panel are The average of the grayscale values in is the display grayscale of any pixel.
  • the gamma voltage corresponding to the gray level of any pixel in the continuous multi-frame image is a register value corresponding to the display gray level.
  • the grayscale value of any pixel is the same and/or continuous, and the number of the register values is at least 512.
  • control system transmits data signals to the display panel.
  • the dimming method of the vehicle-mounted display device further includes: the vehicle-mounted display device modulating the data signal from a continuous signal to a pulse signal. According to the duty cycle of the pulse signal and the brightness of the display panel, the maximum register value corresponding to the pixel of the display panel, the corresponding gamma curve is selected according to the maximum register value corresponding to the pixel.
  • selecting the corresponding gamma curve according to the maximum register value corresponding to the pixel includes: the maximum value among the register values corresponding to the gamma curve, and the The maximum register value corresponding to the pixel is consistent.
  • the brightness of the continuous multi-frame images of the display panel decreases or increases, the gamma curve is constant, and the brightness of the current frame image in the continuous multi-frame images is different from the brightness of the next frame image.
  • the ratio is the same as the ratio of the duty cycle of the pulse signal forming the current frame image to the duty cycle of the pulse signal forming the subsequent frame image.
  • the number of pulses of the data signal forming one frame of image is four.
  • the pulse signal has a duty cycle greater than or equal to 9%.
  • a computer-readable storage medium stores computer instructions that can be run on a processor.
  • the computer instructions are executed by the processor, the vehicle-mounted display device of any of the above embodiments is implemented.
  • One or more steps in a dimming method is provided.
  • a computer program product is provided.
  • the computer program product When the computer program product is run on a computer, it causes the computer to execute one or more steps in the dimming method of the vehicle-mounted display device according to any of the above embodiments.
  • Figure 1 is a structural diagram of a display device provided by some embodiments of the present disclosure.
  • Figure 2 is a circuit diagram of a control system provided by some embodiments of the present disclosure.
  • Figure 3 is a circuit diagram of a timing control subcircuit provided by some embodiments of the present disclosure.
  • FIG. 4 is a circuit diagram of another control system provided by some embodiments of the present disclosure.
  • Figure 5 is a flow chart of the operation of the control system provided by some embodiments of the present disclosure.
  • Figure 6 is a step diagram of a dimming method for a display device according to some embodiments of the present disclosure
  • Figure 7 is a structural diagram of a display panel provided by some embodiments of the present disclosure.
  • Figure 8 is a process diagram of the first dithering algorithm provided by some embodiments of the present disclosure.
  • Figure 9 is a process diagram of the second dithering algorithm provided by some embodiments of the present disclosure.
  • Figure 10 is a process diagram of the third dithering algorithm provided by some embodiments of the present disclosure.
  • Figure 11 is a structural diagram of a gamma curve of the brightness of a partial display panel provided by some embodiments of the present disclosure.
  • Figure 12 is a structural diagram of multiple gamma segments of a register value-grayscale brightness value provided by some embodiments of the present disclosure
  • Figure 13 is a structural diagram of multiple gamma segments of another register value-grayscale brightness value provided by some embodiments of the present disclosure.
  • Figure 14 is a step diagram of a gamma voltage generation method provided by some embodiments of the present disclosure.
  • Figure 15 is a process diagram of the fourth dithering algorithm provided by some embodiments of the present disclosure.
  • Figure 16 is a process diagram of the fifth dithering algorithm provided by some embodiments of the present disclosure.
  • Figure 17 is a process diagram of the sixth dithering algorithm provided by some embodiments of the present disclosure.
  • Figure 18 is a structural diagram of an enable signal of a display panel under different brightnesses provided by some embodiments of the present disclosure.
  • first and second are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Therefore, features defined as “first” and “second” may explicitly or implicitly include one or more of these features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.
  • At least one of A, B and C has the same meaning as “at least one of A, B or C” and includes the following combinations of A, B and C: A only, B only, C only, A and B The combination of A and C, the combination of B and C, and the combination of A, B and C.
  • a and/or B includes the following three combinations: A only, B only, and a combination of A and B.
  • the term “if” is optionally interpreted to mean “when” or “in response to” or “in response to determining” or “in response to detecting,” depending on the context.
  • the phrase “if it is determined" or “if [stated condition or event] is detected” is optionally interpreted to mean “when it is determined" or “in response to the determination" or “on detection of [stated condition or event]” or “in response to detection of [stated condition or event]”.
  • Example embodiments are described herein with reference to cross-sectional illustrations and/or plan views that are idealized illustrations.
  • the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes in the drawings due, for example, to manufacturing techniques and/or tolerances are contemplated.
  • example embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result from, for example, manufacturing. For example, an etched area shown as a rectangle will typically have curved features. Accordingly, the regions shown in the figures are schematic in nature and their shapes are not intended to illustrate the actual shapes of regions of the device and are not intended to limit the scope of the exemplary embodiments.
  • a display device which may be, for example, a mobile phone, a tablet computer, a personal digital assistant (PDA), a television, a vehicle-mounted computer, a wearable display device, etc.
  • the display device 1000 may be, for example, a vehicle-mounted display.
  • the display device 1000 includes a display panel 100 .
  • the embodiments of the present disclosure are introduced by taking a vehicle-mounted display as an example.
  • the display device 1000 includes a display panel 100 and a control system.
  • the display panel 100 may be an OLED display panel, and the following introduction takes the OLED display panel as an example.
  • the control system is used to drive the display panel 100 to operate.
  • the control system may include: source driver sub-circuit, timing controller, level shifter, etc.
  • the control system of consumer-standard products often uses highly integrated chips to reduce product volume.
  • highly integrated chips are often used in the source driver subcircuit, timing controller and level shifter of display devices such as mobile phones and televisions.
  • the high integration and high complexity of the chip may cause the risk of reduced reliability, and the service life cycle will be significantly reduced. Overall, the reliability of the control system will be reduced.
  • the reliability of the display device 1000 will be reduced, and the product life will be significantly reduced.
  • Vehicle-mounted displays have high requirements on product life and reliability, and the service life must be at least 10 years. Products with the above consumer specifications cannot meet the performance requirements of vehicle-mounted displays.
  • the control system 200 includes: a timing control subcircuit 210, a gamma register subcircuit 220, a source driver subcircuit 230, and a power management subcircuit. 240 and level shift subcircuit 250.
  • the timing control subcircuit 210 is electrically connected to the gamma register subcircuit 220 and the source driving subcircuit 230
  • the gamma register subcircuit 220 and the source driving subcircuit 230 are electrically connected
  • the power management subcircuit 240 is connected to the timing control subcircuit 210 and 230
  • the gamma register sub-circuit 220 is electrically connected to the source driving sub-circuit 230
  • the level shift sub-circuit 250 is electrically connected to the timing control sub-circuit 210 and the power management sub-circuit 240.
  • the timing control subcircuit 210 is configured to read the pre-stored binding point data and generate a voltage binding point signal 211, transmit the voltage binding point signal 211 to the gamma register subcircuit 220, and the receiving source driving subcircuit 230 provides N gamma voltages and generate M register values, and M is greater than N, the timing control subcircuit 210 is further configured to transmit the register values to the source driver subcircuit in response to the signal received at the client assembly. 230.
  • the gamma register subcircuit 220 is configured to generate an analog gamma voltage signal 221 in response to the first operating voltage 241 received at the power management subcircuit 240 and the voltage tie point signal 211 received at the timing control subcircuit 210. transmitted to the source driver subcircuit.
  • the source driving subcircuit 230 is configured to receive a plurality of analog gamma voltage signals 221 and generate a plurality of gamma voltages between two adjacent analog gamma voltage signals 221 , and in response to the timing control subcircuit 210 The register value signal 212 is received, a data signal 231 is generated and transmitted to the display panel 100 .
  • the power management subcircuit 240 is configured to generate a first operating voltage 241 and transmit it to the gamma register subcircuit 220 , and to generate an operating voltage and transmit it to the timing control subcircuit 210 and the source driving subcircuit 230 .
  • the level shift sub-circuit 250 is configured to generate a second signal 251 based on the high/low level signal 242 received at the power management sub-circuit 240 in response to the timing control signal 213 received at the timing control sub-circuit 210. transmitted to the display panel 100.
  • the timing control subcircuit 210 uses a serial communication bus to communicate with the gamma register subcircuit 220.
  • the timing control subcircuit 210 and the gamma register subcircuit 220 can use an integrated circuit bus (Inter-Integrated Circuit, IIC ) to communicate.
  • IIC Inter-Integrated Circuit
  • the timing control subcircuit 210 and the source driving subcircuit 230 are electrically connected using a Mini-LVDS interface to realize the purpose of transmitting electrical signals from the timing control subcircuit 210 to the source driving subcircuit 230 .
  • the power management sub-circuit 240 generates various voltages and provides them to corresponding modules.
  • the power management sub-circuit 240 provides the second working voltage 243 for the timing control sub-circuit 210.
  • the voltage of the second working voltage 243 may be 1.8 V and 1.1V.
  • the power management subcircuit 240 provides the first operating voltage 241 for the source driving subcircuit 230, the power management subcircuit 240 provides the third operating voltage 244 for the gamma register subcircuit 220, and the power management subcircuit 240 provides a high voltage for the level shift subcircuit. /Low level signal 242, the power management sub-circuit 240 can also provide a reset signal 245 for the display panel 100.
  • the power management subcircuit 240 can provide power to other modules through connection traces or flexible circuit boards fixed on the substrate or printed circuit board.
  • the gamma register sub-circuit 220 generates the analog gamma voltage signal 221 and transmits it to the source driver sub-circuit 230.
  • the gamma register sub-circuit 220 can be connected through a connection trace or a flexible circuit fixed on the substrate or printed circuit board.
  • the board transmits an analog gamma voltage signal to source driver subcircuit 230 .
  • the gamma register sub-circuit 220 can transmit the timing control signal 213 to the level shift sub-circuit 250 through connection traces fixed on the substrate or printed circuit board or a flexible circuit board.
  • the timing control subcircuit 210 serves as a central control unit, responsible for data calculation and processing, receiving LVDS signals and Reset signals sent by the client assembly, and the source driver subcircuit 230 receives the timing control subcircuit 210
  • the transmitted register value signal 212 is converted from digital to analog by the source driver sub-circuit and then transmitted to the display panel 100.
  • the source driver sub-circuit 230 and the timing control sub-circuit 210 communicate through the Mini-LVDS interface.
  • Each module is responsible for a single function, and the integration level of each module is low. Therefore, the reliability of each module is high. Modules with low integration and single function are cascaded to form a complete system. Compared with single modules with high integration and multi-function, they have more stable performance. In other words, using a control system with low integration and single function, Compared with a control system composed of a highly integrated and multi-functional single module, it has higher stability and better reliability, thereby greatly improving the stability of the vehicle display device.
  • the timing control subcircuit 210 at least includes: a first memory 214 , a timing control chip 215 and a second memory 216 .
  • the first memory 214 is configured to pre-store binding point data.
  • the timing control chip 215 is electrically connected to the first memory 214.
  • the timing control chip 215 at least also has a jitter calculation module 217 that can perform a jitter algorithm.
  • the timing control chip 215 is configured to read the binding point data of the first memory 214 and generate a voltage.
  • the tied point signal and the N gamma voltages transmitted by the receiving source driver sub-circuit generate M register values and store them.
  • the timing control chip 215 is also configured to read the register values in response to the signal received at the client assembly. and transmitted to the source driver subcircuit.
  • the second memory 216 is electrically connected to the timing control chip 215 , and the second memory 216 is configured to receive and store the M register values transmitted by the timing control chip 215 .
  • the first memory 214 may be an Electrically Erasable Programmable Read-Only Memory (EEPROM), and the first memory 214 may be used for pre-stored binding point data.
  • the control system can read the pre-stored binding point data and generate the register value through data calculation.
  • the second memory 216 can be a coded flash memory (FLASH chip). The second memory 216 can be used to store register values. The control system can read the stored register values and control the brightness of the display panel according to the data of the client assembly. .
  • the first memory 214 saves data and is not easy to lose, and its reading and writing speed is relatively slow, and the memory of the first memory 214 is small.
  • the second memory 216 reads data quickly and has a relatively large memory. As pre-stored data, the tied point data is rarely read by the vehicle-mounted display device during normal operation, and the tied point data contains less content and requires a small storage space. Therefore, it is suitable to use the first memory 214 because the register value content is relatively large. , which requires a large storage space and is often read during the operation of the vehicle-mounted display device, so the register value is suitable for being stored in the second memory 216 .
  • the first memory 214 and the second memory 216 will not interfere with each other, further improving the reliability of the control system, and both are suitable for storing corresponding data.
  • the gamma register subcircuit 220 at least includes a gamma chip 222 , and the gamma chip 222 is electrically connected to the timing control chip 215 , the source driver subcircuit 230 and the power management subcircuit 240 .
  • the gamma chip 222 is configured to generate an analog gamma voltage signal 221 and transmit it to the source driver in response to the voltage tie point signal 211 received at the timing control chip 215 and the first voltage signal 241 received at the power management subcircuit 240 Subcircuit 230.
  • gamma register subcircuit 220 includes a gamma chip 222 and a voltage regulator.
  • the voltage reducer is electrically connected to the gamma chip 222.
  • the gamma chip 222 reads the voltage binding point signal and passes the received first voltage signal 241 through the voltage regulator to generate a group of voltages arranged in ascending order from small to large.
  • the group consists of
  • the voltages arranged in order from small to large may be, for example: simulated gamma voltage signal GM1, simulated gamma voltage signal GM2, simulated gamma voltage signal GM3, simulated gamma voltage signal GM4, simulated gamma voltage signal GM5, simulated gamma voltage signal GM6, simulated gamma voltage signal GM7, simulated gamma voltage signal GM8 and simulated gamma voltage signal GM9.
  • the simulated gamma voltage signals 221 (GM1 ⁇ GM9) are also transmitted to the source driving subcircuit by the gamma chip 222 for calculation.
  • the source driving sub-circuit 230 at least includes a source driving chip 232 and a plurality of resistors connected in series, where the multiple resistors connected in series form a resistor string, and both ends of the resistor string can be connected to
  • the source driver chip 232 is electrically connected, and the two ends of each resistor in a resistor string can be a gamma voltage output terminal.
  • the source driver chip 232 is electrically connected to the timing control chip 215 and the gamma chip 222 .
  • the source driver chip 232 is configured to receive the analog gamma voltage signal 221 output by the gamma chip 222 and generate a gamma voltage; and receive the signal output by the timing control chip 215 and transmit the data signal to the display panel 100 .
  • the source driver chip 232 receives the analog gamma voltage signal 221 transmitted by the gamma chip 222.
  • the source driver chip 232 receives the analog gamma voltage signal GM1 and the analog gamma voltage signal GM2, where the analog gamma voltage signal GM1 and the analog gamma voltage signal GM2 are transmitted to both ends of the resistor string in one-to-one correspondence, and the voltage across each resistor in the resistor string is a gamma voltage.
  • the power management sub-circuit 240 at least includes a power management chip 246, a timing control chip 215, a gamma chip 222, a source driver chip 232, and a level shift sub-circuit 250. and the display panel 100 are electrically connected.
  • the power management chip 246 is configured to provide an operating voltage to the timing control chip 215, a second voltage signal 241 to the gamma chip 222, a second operating voltage 244 to the source driver chip 232, and a level shift sub-circuit 250.
  • a high/low level signal 242, and a reset signal 245 is provided to the display panel 100.
  • the power management chip 246 is used to generate various voltages required by the control system and provide the voltages to corresponding chips or modules to enable the control system to operate normally.
  • the power management chip 246 can provide the working voltages 1.8V and 1.1V to the timing control chip 215 .
  • the power management chip 246 can provide the second operating voltage 244 to the gamma chip 222 and the source driver chip 232.
  • the first voltage signal 241 generates the analog gamma voltage signal 221 (GM1 ⁇ GM9) under the control of the gamma chip 222.
  • the second The operating voltage 244 is applied as an operating voltage to the source driver chip 232 .
  • control system also includes a level shift chip 252.
  • the level shift chip 252 is electrically connected to the timing control chip 215 and the power management subcircuit 240 respectively.
  • the level shift chip 252 is configured as , in response to the signal received at the timing control chip 215, the second signal 251 is generated and transmitted to the display panel.
  • the level shift chip 252 receives the signal transmitted by the timing control chip 215, generates a second signal 251 and transmits it to the gate driving circuit (Gate on Array, GOA) on the display panel 100.
  • the second signal 251 can be, for example Clock signal, start signal, etc.
  • the second signal 251 can control the operation of the GOA circuit on the display panel 100.
  • the source driver chip 232 transmits the data signal 231 to the display panel 100.
  • the second signal 251 and the data signal 231 cooperate to control the operation of the display panel 100.
  • each module of the control system operates in cooperation with each other.
  • Figure 5 shows the operation process of the control system.
  • the gamma chip 222 receives the first operating voltage 241 , and the timing control chip 215 reads the pre-stored binding point data in the first memory 214 and generates a voltage binding point signal, and then transmits it to the gamma chip 222 .
  • the gamma chip 222 generates nine analog gamma voltage signals 221 (GM1 ⁇ GM9). After the nine analog gamma voltage signals 221 (GM1 ⁇ GM9) pass through the source driver chip 232, two adjacent analog gamma voltage signals 221 256 gamma voltages are generated through multiple series voltage divisions, and the timing control chip 215 receives the 256 gamma voltages.
  • Part of the timing control chip 215 serves as the jitter calculation module 217 to convert the 256 gamma voltages through jitter calculation.
  • the timing control chip 215 and the external fixture 260 perform gamma debugging, so that the display panel generates corresponding gamma curves based on the register values under different brightnesses and stores them in the second memory 216 .
  • the external fixture 260 is a debugging device installed in the production line and used to debug the monitor or display panel to ensure that the user display effect reaches the standard after leaving the factory.
  • some embodiments of the present disclosure also provide a vehicle-mounted display device, including a control system and a display panel as in any one of the embodiments of the above aspect.
  • the display panel is electrically connected to the control system.
  • control system is used to drive the display panel to operate.
  • the display device On the premise that the reliability of the control system is high, the display device has high reliability and long life, which meets the high requirements for product life and reliability of vehicle-mounted displays.
  • the vehicle-mounted display device provided by the present disclosure can also be applied to other places besides vehicles, such as trains, ferries and other places that have higher requirements on the life and reliability of the display.
  • the control system used in the vehicle-mounted display device provided by the present disclosure can also be applied to other displays that require higher lifespan and reliability.
  • the low-integration source driver chip outputs a lower number of gray levels, only 8 bits.
  • the source driver chip can only generate 256 voltage values.
  • the 256 voltage values are arranged in order from small to large, which can be voltage value V1, voltage value V2...voltage value V256, and each voltage value corresponds to a Grayscale.
  • the display panel of the OLED display device has a brightness adjustment range, and the display brightness of the display device can be changed within the brightness adjustment range.
  • the gray scale is matched with the corresponding voltage value.
  • the voltage value corresponding to the gray scale of the maximum brightness pixel in the display panel is the higher value among the 256 voltage values.
  • the voltage values that can be selected by other pixels of the display panel should be lower than the voltage value corresponding to the gray level of the pixel with the maximum brightness.
  • the display brightness when the display brightness is high, the range of selectable voltage values for gray scale is larger, and when the display brightness is low, the range of selectable voltage values for gray scale is smaller.
  • the display brightness when the display brightness is low, because the number of voltage values that can be selected for gray scale is small, the display panel cannot distinguish the display colors very well. For example, when the display brightness is low, the voltage value corresponding to the gray scale of the brightest pixel of the display panel is low.
  • the voltage value corresponding to the gray scale of the brightest pixel of the display panel can be the voltage value V100, the voltage value V80, or the voltage value Value V50, that is to say, when the display brightness is low, the voltage value corresponding to the gray level of each pixel of the display panel can be in the range of voltage value V1 to voltage value V100, the range of voltage value V1 to voltage value V80, or the voltage value Select within the range of V1 to voltage value V50.
  • the voltage value corresponding to the gray scale of each pixel of the display panel can be selected from the voltage value V1 to the voltage value V100.
  • the gray scale can be adjusted in the range from the voltage value V1 to the voltage value V100.
  • Each voltage value corresponds to a gray scale.
  • the gray scale corresponding to voltage value V1 has the lowest value (minimum brightness), and the gray scale corresponding to voltage value V100 has the largest value (maximum brightness).
  • the brightness of the pixels can be adjusted within a range of 100 gray levels.
  • the number of gray scales corresponding to each pixel of the display panel is small.
  • the gray scale and the actual color of the image cannot be well matched, which may cause the colors of the display screen to not be clearly distinguished. , so color cast may occur under different display brightness.
  • some embodiments of the present disclosure also provide a dimming method for a vehicle-mounted display device, as shown in FIG. 6 , which is applied to the vehicle-mounted display device according to any of the above embodiments.
  • Light methods include:
  • a dithering algorithm is used to generate multiple register values
  • the gamma voltages can be 256, and each gamma voltage corresponds to a gray scale. That is to say, in step S1, any pixel of the display panel can be at most 256. Adjust within a grayscale range.
  • Figures 8 to 10 and Figures 15 to 17 show the process of using a dithering algorithm to expand the range of the register value.
  • Figures 8 to 10 show a dithering algorithm method.
  • Figure 15 Figure 17 shows another way of dithering algorithm.
  • the display panel includes a display area AA and a peripheral area BB provided at least on one side of the display area.
  • a plurality of pixels P are arranged in an array in the display area AA, and each pixel P includes a plurality of sub-pixels.
  • multiple sub-pixels are scanned line by line.
  • Each sub-pixel forms a different luminous brightness under the control of different data signals, that is, each sub-pixel generates a different gray scale. In this way, all sub-pixels on the display panel generate picture.
  • the number of gray levels is 256, and for a 10-bit vehicle-mounted display device, the number of gray levels is 1024. Therefore, the higher the number of bits in the vehicle-mounted display device, the greater the gray-scale range, and the image The changes in light and shade will be smoother.
  • a dithering algorithm can be used to expand the number of gray levels of the vehicle-mounted display device.
  • the dithering algorithm refers to controlling the grayscale of a certain pixel or adjacent pixels in adjacent frames through time or space so that the entire screen can obtain grayscales that cannot be produced originally, thereby expanding the number of grayscales.
  • the original 256 gray levels can be divided into new gray levels with a larger number of parts, where each new gray level corresponds to a register value.
  • each new gray level is a superposition state of multiple original gray levels, that is, a register value corresponds to a set of gamma voltages, that is to say, a register value corresponds to a new gray level, and a new gray level It is the superposition state of multiple original gray levels corresponding to a set of gamma voltages.
  • the superposition state of multiple original gray levels is the gray level corresponding to a register value.
  • the gray level corresponding to the register value is called Virtual grayscale.
  • two adjacent pixels can be selected as a group, and the two adjacent pixels are the first pixel P1 and the second pixel P2 respectively.
  • the gray level of each pixel can be any one of two consecutive gray levels.
  • the gray level of the first pixel P1 can be the gray level Gx
  • the gray level of the second pixel P2 can be the gray level Gx, that is, the two The virtual gray level of two adjacent pixels is Gx
  • the gray level of the first pixel P1 can be the gray level Gy
  • the gray level of the second pixel P2 can be the gray level Gy, that is, the virtual gray level of two adjacent pixels is Gy
  • the gray level of the first pixel P1 can be the gray level Gx
  • the gray level of the second pixel P2 can be the gray level Gy, that is, the virtual gray level of two adjacent pixels is a mixed state of one Gx and one Gy
  • the number of virtual gray levels of two adjacent pixels is twice the number of original gray levels. That is, when the number of gray levels is 256, the number of virtual gray levels is 512.
  • the four adjacent pixels are the first pixel P1, the second pixel P2, the third pixel P3 and the fourth pixel P4 in sequence, where the gray level of each pixel can be two consecutive Any of the gray levels, for example, the gray level of the first pixel P1 may be the gray level Gx, the gray level of the second pixel P2 may be the gray level Gy, the gray level of the third pixel P1 may be the gray level Gy and the fourth
  • the gray level of a pixel can be a gray level Gy, and the virtual gray levels of four adjacent pixels can be a mixed state of one gray level Gx and three gray levels Gy.
  • the gray level of the first pixel P1 may be gray level Gx
  • the gray level of the second pixel P2 may be gray level Gx
  • the gray level of the third pixel P1 may be gray level Gy
  • the gray level of the fourth pixel may be gray level.
  • the virtual gray levels of four adjacent pixels can be a mixed state of two gray levels Gx and two gray levels Gy.
  • the gray level of the first pixel P1 may be gray level Gx
  • the gray level of the second pixel P2 may be gray level Gx
  • the gray level of the third pixel P1 may be gray level Gx
  • the gray level of the fourth pixel may be gray level.
  • level Gy then the virtual gray levels of four adjacent pixels can be a mixed state of three gray levels Gx and one gray level Gy.
  • the number of virtual gray scales is three times more than the number of gray scales corresponding to the gamma voltage.
  • the virtual gray scales The number is 4 times the number of gray levels corresponding to the gamma voltage. That is, when the number of gray levels is 256, the number of virtual gray levels is 1024.
  • the register values are arranged in order from small to large according to the corresponding brightness, which is the register value J0, register value J1...register value J1023.
  • the number of implemented register values is expanded from 8 bits to 10 bits, and the number of new register values is 1024.
  • the display panel can adjust the brightness value (DBV) to control the display brightness, and each DBV corresponds to a different gamma curve.
  • DBV brightness value
  • Figure 11 shows a gamma curve, in which the abscissa represents the brightness of the pixel's external output or the gray scale of its external expression (hereinafter referred to as the gray scale), and the ordinate represents the gray scale brightness value of the corresponding output of the pixel.
  • the gray scale brightness value refers to the perceived brightness of different gray scales under different brightness conditions of the display panel.
  • the relationship between the input gray level and the corresponding output gray level brightness value needs to be set as follows: the gray level brightness value is proportional to the ⁇ power of the gray level, This relationship between the gray-scale brightness value and the gray scale is called the gamma curve of the vehicle-mounted display device.
  • the value of ⁇ is set to 2.2 ⁇ 0.2, so that the displayed picture is close to the picture actually seen by human eyes.
  • Each brightness value of the display panel corresponds to a different gamma curve.
  • each brightness value corresponds to a gamma segment (Bands)
  • each gamma segment includes 256 gray levels
  • gamma curves of different gamma segments correspond to different brightness of the display panel.
  • the gamma curve of one gamma segment can correspond to the brightness of the display panel being 5 nits, or the gamma curve of another gamma segment.
  • the gamma curve can correspond to a display panel with a brightness of 800 nits.
  • the gray-scale brightness value corresponding to the gamma curve of the gamma segment can be matched with the corresponding register value.
  • Each gamma voltage corresponds to a register value.
  • Each register value can represent A grayscale (brightness), so the grayscale on the abscissa can be replaced with a register value.
  • each register value represents a virtual gray scale (brightness).
  • the virtual gray scale on the abscissa can be replaced by the register value.
  • the display panel matches the corresponding gamma segment.
  • the register value range of the gamma segment corresponding to the display panel under high brightness is larger than the register value range of the gamma segment corresponding to the display panel under low brightness. Therefore, the gray scale of the display panel under low brightness cannot be matched with the register value. , causing the color distinction of the display panel to be indistinct under low brightness, which may cause color cast in the display screen.
  • Figure 13 expands the range of register values. Even under low brightness, the gray scale of the display panel matches enough register values to make color distinction obvious and the color fidelity of the display screen to be high.
  • the register value corresponding to the 256 gray levels in the gamma segment is between the register value J0 and the register value matching the maximum brightness of the pixel corresponding to the gamma curve of the gamma segment.
  • the maximum register value in the gamma curve of the gamma segment is different, so the range of the register value for searching for the 256 gray levels of each gamma curve is different.
  • the highest brightness of the gamma segment corresponding to a gamma curve with a brightness of 800 nits matches the register value J950
  • the 256 gray levels of a gamma curve with a brightness of 800 nits can be in the range from register value J0 to register value J950 Find the value within.
  • the highest brightness of the gamma segment corresponding to the gamma curve with a brightness of 300 nits matches the register value J400
  • the 256 gray levels of the gamma curve with a brightness of 300 nits can be in the range from register value J0 to register value J400 Find the value within.
  • the dithering algorithm is used to expand the range of register values.
  • the gamma segment of the gamma curve corresponds to 256 gray levels.
  • the corresponding gray level can be found for each gray level. register value.
  • the low-integration source driver chip can only provide 8-bit grayscale, the entire control system can provide a 10-bit register value, allowing the display panel to present grayscales that could not be produced before. Overall, the number of grayscales is expanded. .
  • the display panel displays images without color shift or with a small color shift, and low-integration hardware can provide a higher-quality display image.
  • the power management subcircuit of the control system is configured to provide the first voltage signal to the gamma register subcircuit of the control system
  • the timing control subcircuit of the control system is configured to provide the first voltage signal to the gamma register subcircuit. Provide multiple voltage binding point signals.
  • the gamma voltage generation method includes:
  • Two adjacent simulated gamma voltages are respectively set at both ends of multiple resistors connected in series. The voltage between the two ends of each resistor is a gamma voltage. Two adjacent simulated gamma voltages generate multiple small ones. to the gamma voltage arranged in sequence.
  • the gamma register subcircuit receives a voltage binding point signal, and can generate multiple analog gamma voltages through a voltage reducer according to the first voltage signal, and each voltage binding point signal generates an analog gamma voltage, for example , the number of voltage binding point signals can be nine, and accordingly the number of simulated gamma voltages is nine.
  • the nine simulated gamma voltages are arranged in order from small to large voltage values: simulated gamma voltage GM1, simulated gamma voltage GM2, simulated gamma voltage GM3...analog gamma voltage GM9.
  • the gamma register sub-circuit transmits the simulated gamma voltage to the source driver sub-circuit.
  • the source driver sub-circuit obtains the gamma voltage by resistor series voltage division.
  • the source driver sub-circuit includes a circuit with multiple resistors connected in series, for example The number of resistors can be 32. Two adjacent gamma analog voltages are transmitted to both ends of a circuit with multiple resistors connected in series. The voltage across each resistor is a gamma voltage.
  • the simulated gamma voltage GM1 is transmitted to one end of a circuit with multiple resistors connected in series
  • the simulated gamma voltage GM2 is transmitted to the other end of the circuit with multiple resistors connected in series.
  • the circuit with multiple resistors connected in series has 32 resistors, and each resistor The voltage at both ends is a gamma voltage, so 32 gamma voltages can be generated between the simulated gamma voltage GM1 and the simulated gamma voltage GM2. In this way, eight groups of gamma voltages can be generated. Each group of gamma voltages is generated by dividing two adjacent analog gamma voltages through resistor strings. The number of gamma voltages in each group is 32, that is, a total of 256 gamma voltages.
  • the embodiments of the present disclosure do not limit the number of simulated gamma voltages generated by the gamma register sub-circuit, nor do they limit the number of gamma voltages generated by each resistor string in the source driver sub-circuit. It can be understood that the total number of gamma voltages is the product of the number of simulated gamma voltages and the number of resistors in a resistor string. The total number of gamma voltages should match the number of gray levels in the grayscale image. For example, the total number of gamma voltages can be 16, 32, or 256. In the present disclosure, the number of gamma voltages can be extended to 256.
  • the voltage binding point signal By controlling the voltage binding point signal, the voltage between two adjacent simulated gamma voltages can be controlled, and then the gamma voltage accuracy (or the size of the gamma voltage) can be controlled.
  • the present disclosure can use less integrated hardware to generate Higher precision gamma voltage, and can relatively control the size of the gamma voltage.
  • the dithering algorithm includes: multiple adjacent pixels on the display panel form a pixel group, the gray level of each pixel in the pixel group corresponds to one of the multiple gamma voltages, and the pixel group
  • the gray level value of is the average of the gray level values of multiple pixels.
  • the gamma voltages of multiple pixels corresponding to the gray level of the pixel group are a register value corresponding to the gray level of the pixel group.
  • the dithering algorithm can be performed by controlling adjacent pixels in a spatial manner. Controlling the gray level changes of adjacent pixels can make the adjacent pixels appear as a variety of gray levels as a whole. This method has been explained above and will not be repeated here.
  • the dithering algorithm includes: within consecutive multiple frames of images, the average value of the grayscale values of the pixels on the display panel in each frame of the image is any The grayscale of the pixel display.
  • the gamma voltage corresponding to the gray level of any pixel in a continuous multi-frame image is a register value corresponding to the display gray level.
  • the grayscale value of any pixel is the same and/or continuous, and the number of the register values is at least 512.
  • the dithering algorithm can also use time to control the grayscale of pixels when displaying adjacent frame images.
  • the overall virtual gray scale presented in the display screen may be a mixed state of one gray scale Gx and one gray scale Gy.
  • the virtual grayscale presented by the pixel as a whole in the display images of two adjacent frames can be grayscale Gx.
  • the grayscale of any pixel in the display panel in the first frame of the image is Gy
  • the grayscale of the second frame of the image is Gy
  • the virtual grayscale presented by the pixel as a whole in the display images of two adjacent frames Can be grayscale Gy.
  • the number of virtual gray levels is doubled compared to the number of gray levels corresponding to the gamma voltage, that is, when the number of gray levels is 256, the number of virtual gray levels is 512.
  • the gray level of any pixel in the display panel in the first frame is Gx
  • the gray level in the second frame is Gy
  • the gray level in the third frame is Gy
  • the grayscale of the fourth frame image is Gy
  • the grayscale of any pixel in the display panel in the first frame of the image is Gx
  • the grayscale of the second frame of the image is Gx
  • the grayscale of the third frame of the image is Gy
  • the grayscale of the fourth frame of the image is Gy
  • the overall virtual gray level presented by the pixel in the display screen of four adjacent frames can be a mixed state of two gray levels Gx and two gray levels Gy.
  • the grayscale of any pixel in the display panel in the first frame of the image is Gx
  • the grayscale of the second frame of the image is Gx
  • the grayscale of the third frame of the image is Gx
  • the grayscale of the fourth frame of the image is Gy
  • the overall virtual gray level presented by the pixel in the display screen of four adjacent frames can be a mixed state of three gray levels Gx and one gray level Gy.
  • the number of virtual gray levels is three times greater than the number of gray levels corresponding to the gamma voltage.
  • the number of virtual gray levels is four times the number of gray levels corresponding to the gamma voltage, that is, the gray
  • the number of virtual gray levels is 1024.
  • the register values represented by the brightness from small to large are register value J0, register value J1...register value J1023.
  • the range of register values is expanded from 8 bits to 10 bits, and the number of register values is 1024.
  • the pixels of the display panel need to adjust the gray scale within a certain register value range to form a certain display brightness and the display screen will not produce color shift.
  • the pixel with the largest gray scale value in the display panel should decrease as the display brightness decreases.
  • the pixels in the display panel can select virtual gray values. The range of steps is reduced, that is, the range of selectable register values for pixels in the display panel is reduced.
  • Embodiments of the present disclosure extend the range of register values to 10 bits. However, when the display panel is in low grayscale, the range of selectable register values for pixels in the display panel is smaller. In this state, the image formed by the display panel There may be color shifts.
  • the dimming method of the vehicle-mounted display device provided in some embodiments of the present disclosure also includes:
  • the vehicle-mounted display device modulates the data signal from a continuous signal to a pulse signal
  • the maximum register value corresponding to the pixel of the display panel is selected according to the maximum register value corresponding to the pixel.
  • the pixel brightness (gray scale) of the display panel can be controlled by modulating the power of the data signal.
  • the range of virtual gray scales that the pixels can select is smaller.
  • the number of first register values described in Table 1 refers to the number of selectable register values for each pixel of the display panel when the data signal output by the control system is a continuous signal under the corresponding brightness of the display panel.
  • Table 1 shows The number of second register values mentioned above refers to the number of selectable register values for each pixel of the display panel when the data signal output by the control system is modulated into a pulse signal under the corresponding brightness of the display panel.
  • the duty cycle described in Table 1 refers to the duty cycle of the data signal output by the control system modulated into a pulse signal.
  • the pixels can select values within six virtual gray levels. That is to say, at this time, the display panel may display a color shift due to a small number of virtual grayscales.
  • the overall luminous brightness of a pixel within a frame of image decreases, but the pixel's luminous brightness after receiving each pulse signal is higher than the overall luminous brightness of a frame of image. That is to say, when the brightness of the display panel decreases, the instantaneous brightness of the pixel Therefore, using the display panel dimming method provided by the present disclosure, the display panel should refer to the gamma curve corresponding to the instantaneous brightness of the pixel under a certain brightness. Because the instantaneous brightness is higher than the brightness of the display panel, it can be seen that the range of virtual gray levels that can be selected by the pixel is expanded. That is to say, using the display panel dimming method provided by the present disclosure, the register value range of the display panel will be different under low brightness. Big improvement.
  • the pixels can select a value from six register values.
  • the duty cycle of the pulse signal is 9%, and the pixel can select a value from 69 register values.
  • the data signal is modulated from a continuous signal to a pulse signal, that is, the overall luminous brightness of the pixel in one frame of image is reduced, so as to reduce the brightness of the display panel to 5 nits.
  • the brightness is higher than 5 nits, that is to say, the selection range of the virtual gray scale of the pixel can be larger.
  • the display panel brightness is 5 nits, and the display panel The number of selectable virtual gray levels for a pixel is 69. At this time, the display image of the display panel has more color distinctions, and the color shift is significantly improved.
  • the pixels have more register value selection ranges.
  • the display panel dimming method provided by the present disclosure when the display panel is at low brightness, the picture display is clearer and the color shift phenomenon is significantly improved.
  • the brightness of consecutive multiple frames of images gradually decreases or increases.
  • the gamma curve corresponding to the display brightness is constant, the ratio of the brightness of the current frame image in the continuous multi-frame image to the brightness of the next frame image, the duty cycle of the data signal forming the current frame image, and the duty cycle of the data signal forming the next frame image The ratios of the duty cycles of the data signals are the same.
  • the user adjusts the display brightness of the vehicle-mounted display device (for example, by dragging a brightness slider on the display screen of the vehicle-mounted display device to adjust the brightness of the display screen of the vehicle-mounted display device).
  • display brightness or a display device in which the vehicle-mounted display device automatically adjusts its own display brightness in response to changes in the brightness of the surrounding environment.
  • the continuous multiple frame images can be gradually lowered or raised.
  • the duty cycle by controlling the duty cycle, the brightness of the multi-frame image can be controlled to decrease or increase.
  • the greater the duty cycle the lower the brightness of the image. Therefore, the change amplitude of the duty cycle of the data signal forming each frame of image should not be too large to avoid brightness jumps caused by excessive changes in brightness.
  • the way in which the vehicle-mounted display device modulates the data signal into a pulse signal may be that the source driver sub-circuit converts the data signal into a pulse signal, or the level shift sub-circuit transmits a control signal to the GOA circuit, and the GOA circuit output enables The signal can control the on and off of the current path that transmits the data signal to the pixel driving circuit, and realizes the modulation of the continuous data signal into a pulse signal.
  • the number of pulses of the data signal forming one frame of image is four.
  • the data signal used by the vehicle-mounted OLED display device to form each frame of image includes 4 pulses.
  • the number of pulses of the enable signal EM that controls the on and off of the current path that transmits the data signal to the pixel drive circuit is 4.
  • the duty cycle of the enable signal EM is 97%
  • the brightness of the corresponding display panel can be 815 nits.
  • the duty cycle of the enable signal EM can be 48%
  • the brightness of the corresponding display panel can be 815 nits.
  • the duty cycle of the enable signal EM is 9%, the brightness of the corresponding display panel can be 5 nits.
  • the duty cycle of the enable signal directly affects the duty cycle of the data signal, that is, the duty cycle of the enable signal is the same as the duty cycle of the data signal.
  • the power of the data signal is reduced accordingly.
  • the data signal forming one frame of image may include 16 or 32 pulse signals, such as a mobile phone using an OLED display panel.
  • the pulse signal has a duty cycle greater than or equal to 9%.
  • the duty cycle of the pulse signal is 9%, the brightness of the display panel is 5 nits.
  • the minimum display brightness of 5 nits can meet the minimum brightness requirements of some display panels.
  • the duty cycle of the pulse signal is too low, the OLED display panel may not emit light stably.
  • Some embodiments of the present disclosure also provide a computer-readable storage medium.
  • the computer-readable storage medium stores computer instructions that can be run on a processor. When the computer instructions are executed by the processor, the above dimming method for a vehicle-mounted display device is implemented. one or more steps in .
  • the computer-readable storage media may include, but are not limited to: magnetic storage devices (for example, hard disks, floppy disks or tapes, etc.), read-only memory (ROM, Read-Only Memory), random access memory, etc. Access memory (RAM, Random Access Memory), erasable programmable read-only memory (EPROM, Erasable Programmable Read-Only Memory) and other media that can store program code.
  • magnetic storage devices for example, hard disks, floppy disks or tapes, etc.
  • ROM read-only memory
  • RAM Random Access Memory
  • EPROM Erasable Programmable Read-Only Memory
  • Some embodiments of the present disclosure also provide a computer program product, which, when run on a computer, causes the computer to perform one or more steps in the above dimming method for a vehicle-mounted display device.
  • the computer storage media or computer program products provided by the embodiments of the present disclosure are used to execute the dimming method of the vehicle-mounted display device provided above. Therefore, the beneficial effects it can achieve can be referred to the corresponding methods provided above. The beneficial effects will not be repeated here.

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Abstract

一种控制系统、显示装置及调光方法，应用于车载显示屏领域，包括：时序控制子电路、伽马寄存器子电路、源驱动子电路以及电源管理子电路；其中，时序控制子电路与伽马寄存器子电路、源驱动子电路电连接，伽马寄存器子电路和源驱动子电路电连接，电源管理子电路与时序控制子电路、伽马寄存器子电路和源驱动子电路电连接。

Description

控制系统、车载显示装置及调光方法 技术领域
本公开涉及显示技术领域，尤其涉及一种控制系统、车载显示装置及调光方法。
背景技术
有机发光二极管(Organic Light-Emitting Diode，OLED)，具有全固态结构、高亮度、全视角、响应速度快、工作温度范围宽、可实现柔性显示等一系列优点。OLED显示面板是显示技术领域中的主要发展趋势，其中，采用OLED显示面板的车载显示器为人车交互的生态系统的构建开辟了新窗口。
车载显示器是一种放置于车辆上的用于显示图片或播放视频的显示装置，车载显示器对产品寿命、信赖性要求很高，车规产品的使用周期至少要达到10年以上。
公开内容
第一方面，本公开的一些实施例提供一种控制系统，所述控制系统包括：时序控制子电路、伽马寄存器子电路、源驱动子电路以及电源管理子电路。其中，所述时序控制子电路与所述伽马寄存器子电路、所述源驱动子电路电连接，所述伽马寄存器子电路和所述源驱动子电路电连接，所述电源管理子电路与所述时序控制子电路、所述伽马寄存器子电路和所述源驱动子电路电连接。
其中，所述时序控制子电路被配置为，读取预先存储的绑点数据生成电压绑点信号，并传输至所述伽马寄存器子电路，以及接收所述源驱动子电路提供的N个伽马电压，并生成M个寄存器值，且所述M大于N，所述时序控制子电路还被配置为，响应于在客户端总成处接收的信号，将所述寄存器值传输至所述源驱动子电路。
所述伽马寄存器子电路被配置为，响应于在所述电源管理子电路处接收的第一电压信号和在所述时序控制子电路处接收的电压绑点信号，生成模拟伽马电压信号并传输至源驱动子电路。
所述源驱动子电路被配置为，接收多个所述模拟伽马电压信号，并在相邻两个模拟伽马电压信号之间生成多个所述伽马电压，以及响应于在所述时序控制子电路处接收所述寄存器值信号，生成数据信号并传输至显示面板。
所述电源管理子电路被配置为，生成第一电压信号并传输至所述伽马寄存器子电路，以及生成工作电压并传输至所述时序控制子电路和所述源驱动子电路。
在一些实施例中，所述时序控制子电路至少包括：第一存储器、时序控制芯片和第二存储器。第一存储器被配置为预存绑点数据。时序控制芯片与所述第一存储器电连接，所述时序控制芯片被配置为读取所述第一存储器的绑点数据，生成所述电压绑点信号，以及接收所述源驱动子电路传输的N个伽马电压，生成M个寄存器值并储存，所述时序控制芯片还被配置为，响应于所述客户端总成处接收的信号，读取所述寄存器值并传输至所述源驱动子电路。第二存储器与所述时序控制芯片电连接，所述第二存储器被配置为接收并存储所述时序控制芯片传输的M个寄存器值。
在一些实施例中，所述伽马寄存器子电路至少包括伽马芯片，所述伽马芯片与所述时序控制芯片、所述源驱动子电路以及所述电源管理子电路电连接。
所述伽马芯片被配置为，响应于在所述时序控制芯片处接收的所述电压绑点信号和在所述电源管理子电路处接收的第一电压信号，生成模拟伽马电压信号并传输至源驱动子电路。
在一些实施例中，所述源驱动子电路至少包括源驱动芯片，所述源驱动芯片与所述时序控制芯片、所述伽马芯片电连接。所述源驱动芯片被配置为，接收所述伽马芯片输出的模拟伽马电压信号，生成伽马电压；以及接收所述时序控制芯片输出的信号，向所述显示面板传输数据信号。
在一些实施例中，所述电源管理子电路至少包括电源管理芯片，所述电源管理芯片与时序控制芯片、所述伽马芯片、所述源驱动芯片、所述电平位移子电路和所述显示面板电连接。所述电源管理芯片被配置为，向所述时序控制芯片提供工作电压，向所述伽马芯片和所述源驱动芯片提供第一电压信号，向所述电平位移子电路提供高/低电平信号，以及向所述显示面板提供复位信号。
在一些实施例中，所述控制系统还包括电平位移子电路，所述电平位移子电路与所述时序控制子电路、所述电源管理芯片电连接。
在一些实施例中，所述控制系统还包括电平位移芯片，所述电平位移芯片分别与所述时序控制芯片和电源管理芯片电连接，所述电平位移芯片被配置为，响应于在所述时序控制芯片接收的信号，生成第二信号并传输至显示面板。
第二方面，本公开的一些实施例还提供一种车载显示装置，包括：显示面板和如上述任一项实施例所述的控制系统。其中，显示面板与所述控制系统电连接。
第三方面，本公开的一些实施例还提供一种车载显示装置的调光方法，应用于如上述任一项实施例所述的车载显示装置，其中所述车载显示装置的控制系统向显示面板传输数据信号。
所述车载显示装置的调光方法包括：生成多个由大到小或由小到大依次排列的伽马电压。以多个所述伽马电压为基础，采用抖动算法生成多个寄存器值。调制伽马曲线，根据所述多个寄存器值和所述显示面板的亮度，生成对应的一段所述伽马曲线。
在一些实施例中，所述控制系统的电源管理子电路被配置为，向所述控制系统的伽马寄存器子电路提供第一电压信号，且所述控制系统的时序控制子电路被配置为，向所述伽马寄存器子电路提供多个电压绑点信号。
所述生成多个由大到小或由小到大依次排列的伽马电压的方法包括：根据所述第一电压信号和所述多个电压绑点信号生成多个模拟伽马电压，每个电压绑点信号对应一个模拟伽马电压。相邻两个模拟伽马电压分别设置于串联的多个电阻的两端，每个电阻两端之间的电压为一个伽马电压，所述相邻两个模拟伽马电压生成多个由小到大依次排列的所述伽马电压。
在一些实施例中，所述伽马电压的数量为256个。
在一些实施例中，所述以多个所述伽马电压为基础，采用抖动算法生成多个寄存器值的方法包括：所述显示面板上相邻的多个像素为一个像素组，所述像素组内的每个像素的灰阶与多个所述伽马电压中的一个伽马电压对应，所述像素组的灰阶的数值为所述多个像素的灰阶的数值的均值。所述像素组的灰阶对应的所述多个像素的伽马电压，为所述像素组的灰阶对应的一个寄存器值。
在一些实施例中，所述像素组内相邻的像素的数量为至少为两个，且所述每个像素的灰阶的数值相同和/或连续，所述寄存器值的数量至少为512个。
在一些实施例中，所述以多个所述伽马电压为基础，采用抖动算法生成多个寄存器值的方法包括：连续的多帧图像内，所述显示面板上的像素在每一帧图像中的灰阶的数值的均数，为所述任一像素的显示灰阶。所述任一像素在所述连续的多帧图像内的灰阶对应的伽马电压，为所述显示灰阶对应的一个寄存器值。
在一些实施例中，所述相邻的至少两帧图像内，所述任一像素的灰阶的数值相同和/或连续，所述寄存器值的数量至少为512个。
在一些实施例中，所述控制系统向所述显示面板传输数据信号。
所述车载显示装置的调光方法还包括：所述车载显示装置将所述数据信号由连续信号调制为脉冲信号。根据所述脉冲信号的占空比和所述显示面板的亮度，所述显示面板的像素对应的最大寄存器值，根据所述像素对应的最大寄存器值选择对应的所述伽马曲线。
在一些实施例中，所述根据所述像素对应的最大寄存器值选择对应的所述伽马曲线，包括：所述伽马曲线对应的所述寄存器值中的最大值，与所述显示面板的像素对应的最大寄存器值一致。
在一些实施例中，所述显示面板的连续多帧图像的亮度降低或升高，所述伽马曲线一定时，所述连续多帧图像中的当前帧图像的亮度与后一帧图像的亮度比值，和形成所述当前帧图像的所述脉冲信号的占空比与形成所述后一帧图像的所述脉冲信号的占空比的比值，相同。
在一些实施例中，形成一帧图像的数据信号的脉冲数量为4。
在一些实施例中，脉冲信号的占空比大于或等于9％。
第四方面，提供一种计算机可读存储介质，计算机可读存储介质存储有可在处理器上运行的计算机指令，计算机指令被处理器执行时实现如上述任一项实施例的车载显示装置的调光方法中的一个或多个步骤。
第五方面，提供一种计算机程序产品，当计算机程序产品在计算机上运行时，使得计算机执行如上述任一项实施例的车载显示装置的调光方法中的一个或多个步骤。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为本公开的一些实施例提供的一种显示装置的结构图；
图2为本公开的一些实施例提供的一种控制系统的电路图；
图3为本公开的一些实施例提供的一种时序控制子电路的电路图；
图4为本公开的一些实施例提供的另一种控制系统的电路图；
图5为本公开的一些实施例提供的控制系统运行的流程图；
图6为本公开的一些实施例提供的显示装置的调光方法的步骤图；
图7为本公开的一些实施例提供的显示面板的结构图；
图8为本公开的一些实施例提供的第一种抖动算法的过程图；
图9为本公开的一些实施例提供的第二种抖动算法的过程图；
图10为本公开的一些实施例提供的第三种抖动算法的过程图；
图11为本公开的一些实施例提供的部显示面板亮度的伽马曲线的结构图；
图12为本公开的一些实施例提供的一种寄存器值-灰阶亮度值的多个伽 马段的结构图；
图13为本公开的一些实施例提供的另一种寄存器值-灰阶亮度值的多个伽马段的结构图；
图14为本公开的一些实施例提供的一种伽马电压生成方法的步骤图；
图15为本公开的一些实施例提供的第四种抖动算法的过程图；
图16为本公开的一些实施例提供的第五种抖动算法的过程图；
图17为本公开的一些实施例提供的第六种抖动算法的过程图；
图18为本公开的一些实施例提供的显示面板在不同亮度下的使能信号的结构图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“耦接”和“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。又如，描述一些实施例时可能使用了术语“耦接”以表明两个或两个以上部件有直接物理接触或电接触。然而，术语“耦接”或“通信耦合(communicatively coupled)”也可能指两个或两个以上部件彼此间并无直 接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”，包括以下三种组合：仅A，仅B，及A和B的组合。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出的值。
如本文所使用的那样，“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
本公开的一些实施例提供一种显示装置，该显示装置例如可以是手机、平板电脑、个人数字助理(personal digital assistant，PDA)、电视机、车载电脑、可穿戴显示设备等。如图1所示，该显示装置1000例如可以为车载显示器，显示装置1000包括显示面板100。本公开的实施例以车载显示器为例进行介绍。
在一些实施例中，显示装置1000包括显示面板100和控制系统。显示面板100可以为OLED显示面板，以下以OLED显示面板为例进行介绍。控制 系统用于驱动显示面板100运行，控制系统可以包括：源驱动子电路、时序控制器以及电平位移器等，其中，消费规格产品的控制系统经常使用高集成度的芯片以缩小产品体积、降低成本，例如手机、电视机等显示装置的源驱动子电路、时序控制器以及电平位移器常使用高集成度的芯片。芯片的高集成和高复杂度，可能造成可靠性降低的风险，使用周期大幅下降，整体而言，控制系统的可靠性下降，相应地，显示装置1000可靠性降低，产品寿命大幅下降。
车载显示器对产品的寿命和信赖性要求很高，使用周期至少要达到10年以上，如上述消费规格的产品无法满足车载显示器的性能要求。
基于此，本公开的一些实施例提供一种控制系统200，如图2所示，控制系统200包括：时序控制子电路210、伽马寄存器子电路220、源驱动子电路230、电源管理子电路240以及电平位移子电路250。其中，时序控制子电路210与伽马寄存器子电路220、源驱动子电路230电连接，伽马寄存器子电路220和源驱动子电路230电连接，电源管理子电路240与时序控制子电路210、伽马寄存器子电路220和源驱动子电路230电连接，电平位移子电路250与时序控制子电路210、电源管理子电路240电连接。
其中，时序控制子电路210被配置为，读取预先存储的绑点数据并生成电压绑点信号211，将电压绑点信号211传输至伽马寄存器子电路220，以及接收源驱动子电路230提供的N个伽马电压，并生成M个寄存器值，且M大于N，时序控制子电路210还被配置为，响应于在客户端总成处接收的信号，将寄存器值传输至源驱动子电路230。
伽马寄存器子电路220被配置为，响应于在电源管理子电路240处接收的第一工作电压241和在时序控制子电路210处接收的电压绑点信号211，生成模拟伽马电压信号221并传输至源驱动子电路。
源驱动子电路230被配置为，接收多个模拟伽马电压信号221，并在相邻两个模拟伽马电压信号221之间生成多个伽马电压，以及响应于在时序控制子电路210处接收寄存器值信号212，生成数据信号231并传输至显示面板100。
电源管理子电路240被配置为，生成第一工作电压241并传输至伽马寄存器子电路220，以及生成工作电压并传输至时序控制子电路210和源驱动子电路230。
电平位移子电路250被配置为，响应于在时序控制子电路210处接收的时序控制信号213，根据在电源管理子电路240处接收的高/低电平信号242，生成第二信号251并传输至显示面板100。
在一些示例中，时序控制子电路210采用串行通信总线与伽马寄存器子电路220通讯，例如，时序控制子电路210和伽马寄存器子电路220可以采用集成电路总线(Inter-Integrated Circuit，IIC)进行通讯。时序控制子电路210与源驱动子电路230采用Mini-LVDS接口电连接，实现时序控制子电路210向源驱动子电路230传输电信号的目的。
电源管理子电路240生成各路电压并提供至对应的各模块，示例性地，电源管理子电路240为时序控制子电路210提供第二工作电压243，例如第二工作电压243的电压可以为1.8V和1.1V。电源管理子电路240为源驱动子电路230提供第一工作电压241，电源管理子电路240为伽马寄存器子电路220提供第三工作电压244，电源管理子电路240为电平位移子电路提供高/低电平信号242，电源管理子电路240还可以为显示面板100提供复位信号245。电源管理子电路240可通过固定于基板或印刷电路板上的连接走线或者柔性线路板向其它各模块供电。
在一些示例中，伽马寄存器子电路220生成模拟伽马电压信号221并传输至源驱动子电路230，伽马寄存器子电路220可通过固定于基板或印刷电路板上的连接走线或者柔性线路板向源驱动子电路230传输模拟伽马电压信号。同理，伽马寄存器子电路220可以通过固定于基板或印刷电路板上的连接走线或者柔性线路板向电平位移子电路250传输时序控制信号213。
在本公开的一些实施例中，时序控制子电路210作为中央控制单元，负责数据运算和处理工作，接收客户端总成发送的LVDS信号和Reset信号，源驱动子电路230接收时序控制子电路210传输的寄存器值信号212，源驱动子电路对寄存器值信号212数模转换后传输至显示面板100，其中，源驱动子电路230和时序控制子电路210之间通过Mini-LVDS接口通讯。各模块负责单一功能，且每个模块的集成度较低，因此，每个模块的可靠性较高。低集成度且单一功能的各模块级联构成一条完整系统，相比于高集成度且多功能单一模块，具有更加稳定的性能，也就是说，采用低集成度且单一功能构成的控制系统，比高集成度且多功能单一模块构成的控制系统稳定性高，可靠性好，继而大幅提升车载显示装置的稳定性。
在一些实施例中，如图3和图4所示，时序控制子电路210至少包括：第一存储器214、时序控制芯片215和第二存储器216。其中，第一存储器214被配置为预存绑点数据。时序控制芯片215与第一存储器214电连接，时序控制芯片215中至少还具有可进行抖动算法的抖动计算模块217，时序控制芯片215被配置为读取第一存储器214的绑点数据，生成电压绑点信号，以及 接收源驱动子电路传输的N个伽马电压，生成M个寄存器值并储存，时序控制芯片215还被配置为，响应于客户端总成处接收的信号，读取寄存器值并传输至源驱动子电路。第二存储器216与时序控制芯片215电连接，第二存储器216被配置为接收并存储时序控制芯片215传输的M个寄存器值。
在一些示例中，第一存储器214可以为带电可擦可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)，第一存储器214可以用于预存的绑点数据。控制系统可以读取预存的绑点数据，并经过数据计算生成寄存器值。第二存储器216可以为编码型快闪记忆体(FLASH芯片)，第二存储器216可用于储存寄存器值，控制系统可以读取储存寄存器值，并根据客户端总成的数据，控制显示面板的亮度。
第一存储器214保存数据不易丢失，读写速度相对较慢，且第一存储器214的内存较小，第二存储器216读取数据速度较快，内存相对较大。绑点数据作为预存数据，车载显示装置在正常工作中很少被读取，且绑点数据的内容较少，所需要的存储空间小，适合采用第一存储器214，寄存器值的内容相对较多，所需要的存储空间大，在车载显示装置运行过程中经常被读取，因此寄存器值适合存储至第二存储器216。第一存储器214和第二存储器216相互不会造成干扰，进一步提高控制系统的可靠性，且两者均适合对应的储存数据。
在一些实施例中，如图4所示，伽马寄存器子电路220至少包括伽马芯片222，伽马芯片222与时序控制芯片215、源驱动子电路230以及电源管理子电路240电连接。伽马芯片222被配置，响应于在时序控制芯片215处接收的电压绑点信号211和在电源管理子电路240处接收的第一电压信号241，生成模拟伽马电压信号221并传输至源驱动子电路230。
示例性地，伽马寄存器子电路220包括伽马芯片222和降压器。降压器与伽马芯片222电连接，伽马芯片222读取电压绑点信号，将接收的第一电压信号241通过降压器产生一组由小到大依次排列的电压，该一组由小到大依次排列的电压例如可以为：模拟伽马电压信号GM1、模拟伽马电压信号GM2、模拟伽马电压信号GM3、模拟伽马电压信号GM4、模拟伽马电压信号GM5、模拟伽马电压信号GM6、模拟伽马电压信号GM7、模拟伽马电压信号GM8和模拟伽马电压信号GM9。该模拟伽马电压信号221(GM1～GM9)还被伽马芯片222传输至源驱动子电路进行计算。
在一些实施例中，如图4所示，源驱动子电路230至少包括源驱动芯片232和串联的多个电阻，其中，串联的多个电阻为一个电阻串，所述电阻串两端可以与源驱动芯片232电连接，一个电阻串中每个电阻的两端可以为一个 伽马电压输出端。源驱动芯片232与时序控制芯片215、伽马芯片222电连接。源驱动芯片232被配置为，接收伽马芯片222输出的模拟伽马电压信号221，生成伽马电压；以及接收时序控制芯片215输出的信号，向显示面板100传输数据信号。
在一些示例中，源驱动芯片232接收伽马芯片222传输的模拟伽马电压信号221，例如源驱动芯片232接收模拟伽马电压信号GM1和模拟伽马电压信号GM2，其中，模拟伽马电压信号GM1和模拟伽马电压信号GM2一一对应的传输至电阻串的两端，电阻串的每个电阻两端的电压即为一个伽马电压。
在一些实施例中，如图4所示，电源管理子电路240至少包括电源管理芯片246，电源管理芯片246与时序控制芯片215、伽马芯片222、源驱动芯片232、电平位移子电路250和显示面板100电连接。
电源管理芯片246被配置为，向时序控制芯片215提供工作电压，向伽马芯片222提供第二电压信号241，和向源驱动芯片232提供第二工作电压244，向电平位移子电路250提供高/低电平信号242，以及向显示面板100提供复位信号245。
在一些示例中，电源管理芯片246用于生成控制系统需要的各路电压，并将电压提供至对应的芯片或模块，使控制系统正常运行。例如电源管理芯片246可以向时序控制芯片215提供工作电压1.8V和1.1V。电源管理芯片246可以向伽马芯片222和源驱动芯片232提供第二工作电压244，第一电压信号241在伽马芯片222的控制下生成模拟伽马电压信号221(GM1～GM9)，第二工作电压244在源驱动芯片232作为工作电压被应用。
在一些实施例中，如图4所示，控制系统还包括电平位移芯片252，电平位移芯片252分别与时序控制芯片215和电源管理子电路240电连接，电平位移芯片252被配置为，响应于在时序控制芯片215接收的信号，生成第二信号251并传输至显示面板。
在一些示例中，电平位移芯片252接收时序控制芯片215传输的信号，生成第二信号251并传输至显示面板100上的栅极驱动电路(Gate on Array，GOA)，第二信号251例如可以时钟信号、起始信号等。
第二信号251可以控制显示面板100上的GOA电路运行，源驱动芯片232向显示面板100传输数据信号231，第二信号251和数据信号231配合，实现控制显示面板100运行。
在本公开中，控制系统的各模块相互配合运行，如图5示出了控制系统的运行流程。
具体地，伽马芯片222接收第一工作电压241，且时序控制芯片215读取第一存储器214中预存的绑点数据并生成电压绑点信号后，传输至伽马芯片222。伽马芯片222生成9个模拟伽马电压信号221(GM1～GM9)，9个模拟伽马电压信号221(GM1～GM9)经过源驱动芯片232后，其中相邻两个模拟伽马电压信号221通过多个串联电压分压生成256个伽马电压，时序控制芯片215接收256个伽马电压，其中，时序控制芯片215的部分位置作为抖动计算模块217，通过抖动计算将256个伽马电压转换为1024个寄存器值，时序控制芯片215和外部治具260进行伽马调试，使显示面板在不同亮度下，以寄存器值生成对应的伽马曲线并储存至第二存储器216内。其中，外部治具260是设置于生产线内，用于调试显示器或显示面板使之出厂后保证用户显示效果达到标准的调试设备。
另一方面，本公开的一些实施例还提供一种车载显示装置，包括如上述一方面中任一项实施例的控制系统以及显示面板。其中，显示面板与控制系统电连接。
在一些实施例中，控制系统用于驱动显示面板运行，在控制系统的可靠性较高的前提下，显示装置的可靠性高，寿命长，符合车载显示器对产品寿命和信赖性的高要求。
当然，本公开提供的车载显示装置还可以应用于除车辆之外的其它地方，例如，火车、轮渡等对显示器的寿命和可靠性要求较高的场所。或者，本公开提供的车载显示装置所应用的控制系统，还可以应用于其它对寿命和可靠性要求较高的显示器。
在一些实施例中，低集成度的源驱动芯片输出的灰阶数量较低，仅为8比特。示例性地，源驱动芯片只能产生256份电压值，其中，256份电压值以其数值从小到大依次排列可以为电压值V1、电压值V2……电压值V256，每份电压值对应一个灰阶。
通常，OLED显示装置的显示面板具有一亮度调节范围，显示装置的显示亮度能够在该亮度调节范围内变化。在不同的显示亮度下，为确保显示面板的显示画面能够清晰的区分色彩。因此在不同显示亮度下，将灰阶与对应的电压值匹配。具体地，在显示亮度较高时，显示面板中最大亮度的像素的灰阶对应的电压值为256份电压值中数值较高的一个。在该显示亮度下，显示面板的其它像素可以选择的电压值，应低于最大亮度的像素的灰阶对应的电压值。也就是说，在显示亮度较高时，灰阶可选择的电压值的范围较大，而显示亮度较低时，灰阶可选择的电压值的范围较小。尤其是在显示亮度较低时，因为灰阶 可以选择的电压值数量少，显示面板的不能很好区分显示色彩。示例性地，显示亮度较低时，显示面板的最亮像素的灰阶对应的电压值较低，显示面板的最亮像素的灰阶对应的电压值可以为电压值V100、电压值V80或者电压值V50，也就是说，在显示亮度较低时，显示面板的各像素的灰阶对应的电压值可以在电压值V1至电压值V100的范围、电压值V1至电压值V80的范围或电压值V1至电压值V50的范围内选择。
以显示面板的各像素的灰阶对应的电压值可以在电压值V1至电压值V100的范围选择为例，在此显示亮度下，可以电压值V1至电压值V100范围下进行灰阶调控，每个电压值对应一个灰阶，电压值V1对应的灰阶的数值最低(亮度最小)，电压值V100对应的灰阶的数值最大(亮度最大)。也就是说，显示面板在此显示亮度下，像素的亮度可在100个灰阶范围内调控。
可以理解的是，显示面板的各像素对应的灰阶数量较少，显示面板的图像显示时，因灰阶和图像的实际色彩不能很好的匹配，可能造成显示画面的色彩不能清楚的区分出来，因此在不同显示亮度下可能造成色偏的情况发生。
基于此，又一方面，本公开的一些实施例还提供一种车载显示装置的调光方法，如图6所示，应用于如上述任一项实施例的车载显示装置，车载显示装置的调光方法包括：
S1、生成多个由大到小或由小到大依次排列的伽马电压；
S2、以多个伽马电压为基础，采用抖动算法生成多个寄存器值；
S3、调制伽马曲线，根据多个寄存器值和显示面板的亮度，生成对应的一段伽马曲线。
在一些示例中，伽马电压有多个，例如伽马电压可以为256个，每个伽马电压对应一个灰阶，也就是说，在步骤S1中，显示面板的任一像素最多可以在256个灰阶范围内调整。
在步骤S2中，图8至图10以及图15至图17示出的采用抖动算法对寄存器值的范围进行拓展的过程，其中，图8至图10示出一种抖动算法的方式，图15至图17示出另一种抖动算法的方式。
如图7所示，显示面板包括显示区AA和至少设置于显示区一侧的周边区BB，在显示区AA内阵列布置有多个像素P，每个像素P包括多个子像素。显示面板在显示过程中，多个子像素被逐行扫描，每个子像素在不同数据信号的控制下形成不同的发光亮度，即每个子像素生成不同灰阶，如此，所有子像素在显示面板上生成画面。
对于8比特的车载显示装置，灰阶数量为256个，10比特的车载显示装 置，灰阶数量为1024个，因此，位数越高的车载显示装置，灰阶范围也就越大，图像的明暗变化也就越平滑。对于8比特的车载显示装置可采用抖动算法进行扩大车载显示装置的灰阶数量。
其中，抖动算法是指，通过时间或者空间方式控制相邻帧的某个像素或相邻像素的灰阶来使得整个屏幕得到原本无法产生的灰阶，从而将灰阶数量拓展。也就是说，采用抖动算法，可以将原256份灰阶划分为份数更多的新灰阶，其中，每个新灰阶对应一个寄存器值。可以理解的是，每个新灰阶是多个原灰阶的叠加状态，即一个寄存器值和一组伽马电压对应，也就是说，一个寄存器值对应一个新灰阶，而一个新灰阶是一组伽马电压对应的多个原灰阶的叠加状态，其中，多个原灰阶的叠加状态是一个寄存器值对应的灰阶，为方便区分，以下将寄存器值对应的灰阶称为虚拟灰阶。
如图8至图10所示，以在空间方式控制相邻像素的灰阶为例，可以选取两个相邻像素为一组，两个相邻像素分别为第一像素P1和第二像素P2，其中每个像素的灰阶可以为两个连续灰阶中的任一个，如此，第一像素P1的灰阶可以为灰阶Gx、第二像素P2的灰阶可以为灰阶Gx，即两个相邻像素的虚拟灰阶为Gx；或者，第一像素P1的灰阶可以为灰阶Gy、第二像素P2的灰阶可以为灰阶Gy，即两个相邻像素的虚拟灰阶为Gy；或者，第一像素P1的灰阶可以为灰阶Gx、第二像素P2的灰阶可以为灰阶Gy，即两个相邻像素的虚拟灰阶为一个Gx和一个Gy的混合状态；如此，两个相邻像素的虚拟灰阶的数量是原灰阶的数量的两倍。即灰阶的数量为256个时，虚拟灰阶的数量为512个。
或者可以选取四个相邻像素为一组，四个相邻像素依次第一像素P1、第二像素P2、第三像素P3和第四像素P4，其中每个像素的灰阶可以为两个连续灰阶中的任一个，例如，第一像素P1的灰阶可以为灰阶Gx，第二像素P2的灰阶可以为灰阶Gy，第三像素P1的灰阶可以为灰阶Gy和第四像素的灰阶可以为灰阶Gy，则四个相邻像素的虚拟灰阶可以为一个灰阶Gx和三个灰阶Gy混合状态。或者，第一像素P1的灰阶可以为灰阶Gx，第二像素P2的灰阶可以为灰阶Gx，第三像素P1的灰阶可以为灰阶Gy和第四像素的灰阶可以为灰阶Gy，则四个相邻像素的虚拟灰阶可以为两个灰阶Gx和两个灰阶Gy混合状态。或者，第一像素P1的灰阶可以为灰阶Gx，第二像素P2的灰阶可以为灰阶Gx，第三像素P1的灰阶可以为灰阶Gx和第四像素的灰阶可以为灰阶Gy，则四个相邻像素的虚拟灰阶可以为三个灰阶Gx和一个灰阶Gy混合状态。
如此，在灰阶Gx和灰阶Gy，还新增有三个虚拟灰阶，虚拟灰阶的数量相较于伽马电压对应的灰阶的数量多出了3倍，也就是说，虚拟灰阶的数量是伽马电压对应的灰阶的数量的4倍，即灰阶的数量为256个时，虚拟灰阶的数量为1024个，寄存器值以对应的亮度从小到大依次排列，为寄存器值J0、寄存器值J1……寄存器值J1023。实现寄存器值的数量由8比特拓展至10比特，新的寄存器值的数量为1024个。
在一些实施例中，如图11所示，显示面板的可以调控亮度值(DBV)来控制显示亮度，每个DBV对应于不同的伽马曲线。
由于人眼对较黑暗环境下的亮度的敏感程度，要比对较光亮环境下的亮度的敏感程度高许多，因此人眼感觉与亮度之间的关系并不是线性关系，而是呈现一定的规律。图11示出了一种伽马曲线，其中横坐标代表像素对外输出的亮度或者对外表现的灰阶(以下简称灰阶)，纵坐标代表像素对应输出的灰阶亮度值，在本公开中，灰阶亮度值是指，在显示面板在不同亮度下，对不同灰阶的感受亮度。为了使OLED显示装置的显示效果符合人眼视觉感受，需要使所输入的灰阶与对应输出的灰阶亮度值之间的关系设定为，灰阶亮度值正比于灰阶的γ次方，这种灰阶亮度值与灰阶之间的关系称为车载显示装置的伽马曲线。示例性的，将γ的值设定为2.2±0.2，以使所显示的画面与人眼实际所看到的画面接近。
显示面板的每个亮度值对应不同的伽马曲线，相应地，在寄存器值-灰阶亮度值的坐标系内，每个亮度值对应一个伽马段(Bands)，每个伽马段均包括256个灰阶，不同伽马段的伽马曲线对应于显示面板不同的亮度，例如一个伽马段的伽马曲线可以对应显示面板的亮度为5尼特的情况，或者另一个伽马段的伽马曲线可以对应显示面板的亮度为800尼特的情况。
伽马段的伽马曲线对应的灰阶亮度值，可与对应的寄存器值匹配，如图12所示，寄存器值共256个，每个伽马电压对应一个寄存器值，每个寄存器值可表示一个灰阶(亮度)，因此可将横坐标的灰阶采用寄存器值替换。
同理，如图13所示，寄存器值共1024个，每个寄存器值表示一个虚拟灰阶(亮度)，可将横坐标的虚拟灰阶采用寄存器值替换。
如图12和图13所示，显示面板在不同亮度下，显示面板与对应的伽马段匹配。显示面板在高亮度下对应的伽马段的寄存器值，比显示面板在低亮度下对应的伽马段的寄存器值范围大，因此，显示面板在低亮度下的灰阶与寄存器值不能完成匹配，造成显示面板在低亮度下，颜色区分不明显，可能造成显示画面色偏的现象。
图13将寄存器值的范围扩大，即使在低亮度下，显示面板的灰阶与足够的寄存器值匹配，使颜色区分明显，显示画面的色彩保真度高。
需要说明的是，图12和图13中的寄存器值的数值一致时，其对应的灰阶和虚拟灰阶(亮度)并不相同。图12中的寄存器值是在最暗和最亮之间具有256份亮度等级，图13中的寄存器值是在最暗和最亮之间具有1024份亮度等级。
可以理解的是，与该伽马段中的256个灰阶对应的寄存器值，在寄存器值J0，至与伽马段的伽马曲线对应的像素最大亮度匹配的寄存器值之间。显示面板在不同亮度，伽马段的伽马曲线中最大寄存器值不同，因此每个伽马曲线的256个灰阶进行寻值的寄存器值的范围不同。
例如，亮度为800尼特的伽马曲线对应的伽马段的最高亮度与寄存器值J950匹配，亮度为800尼特的伽马曲线的256个灰阶可以在寄存器值J0至寄存器值J950的范围内寻值。或者，亮度为300尼特的伽马曲线对应的伽马段的最高亮度与寄存器值J400匹配，亮度为300尼特的伽马曲线的256个灰阶可以在寄存器值J0至寄存器值J400的范围内寻值。
采用抖动算法，将寄存器值的范围扩大，如图13所示，显示面板在不同亮度对应的伽马曲线，该伽马曲线的伽马段对应256个灰阶，每个灰阶可以寻找到对应的寄存器值。使低集成度的源驱动芯片在仅能提供8比特的灰阶时，整个控制系统能够提供10比特的寄存器值，使显示面板能够呈现之前无法产生的灰阶，整体来看将灰阶数拓展。继而使不同亮度下，显示面板呈现的画面的不会出现色偏或者色偏较小的情况，在低集成度硬件能够提供质量较高的显示画面。
在一些实施例中，控制系统的电源管理子电路被配置为，向控制系统的伽马寄存器子电路提供第一电压信号，且控制系统的时序控制子电路被配置为，向伽马寄存器子电路提供多个电压绑点信号。
如图14所示，伽马电压生成方法包括：
S11、根据第一电压信号和多个电压绑点信号生成多个模拟伽马电压，每个电压绑点信号对应一个模拟伽马电压。
S12、相邻两个模拟伽马电压分别设置于串联的多个电阻的两端，每个电阻两端之间的电压为一个伽马电压，相邻两个模拟伽马电压生成多个由小到大依次排列的伽马电压。
在一些示例中，伽马寄存器子电路接受电压绑点信号，并根据第一电压信号通过降压器可以生成多个模拟伽马电压，每个电压绑点信号对应生成一个 模拟伽马电压，例如，电压绑点信号可以为九个，相应地模拟伽马电压的数量为九个，九个模拟伽马电压以电压值的由小到大依次排列为：模拟伽马电压GM1、模拟伽马电压GM2、模拟伽马电压GM3……模拟伽马电压GM9。
伽马寄存器子电路将模拟伽马电压传输至源驱动子电路，源驱动子电路采用电阻串分压的方式获取伽马电压，具体地，源驱动子电路包括一条多个电阻串联的电路，例如电阻的数量可以为32个，相邻的两个伽马模拟电压分别传输至多个电阻串联的电路的两端，每个电阻两端的电压即为一个伽马电压。示例性地，模拟伽马电压GM1传输至多个电阻串联的电路的一端，模拟伽马电压GM2传输至多个电阻串联的电路的另一端，多个电阻串联的电路的电阻为32个，每个电阻两端的电压为一个伽马电压，如此模拟伽马电压GM1和模拟伽马电压GM2之间可以生成32个伽马电压。如此可以生成八组伽马电压，每组伽马电压为相邻两个模拟伽马电压通过电阻串分压生成，每组伽马电压的数量为32个，即伽马电压共256个。
需要说明的是，本公开的实施例中不限定伽马寄存器子电路生成的模拟伽马电压的数量，同样不限定源驱动子电路中每个电阻串生成的伽马电压数量。可以理解的是，伽马电压的总数是模拟伽马电压的数量与一个电阻串中电阻数量的乘积。伽马电压的总数应与灰度图中灰阶数量匹配，例如，伽马电压的总数可以为16个、32个或256个。在本公开中，伽马电压的数量可以扩展至256个。
通过控制电压绑点信号，可以控制相邻两个模拟伽马电压之间的电压，继而可以控制伽马电压精度(或伽马电压的大小)，本公开可采用集成度较低的硬件，生成较高精度的伽马电压，且能够相对控制伽马电压的大小。
在一些实施例中，抖动算法包括：显示面板上相邻的多个像素为一个像素组，像素组内的每个像素的灰阶与多个伽马电压中的一个伽马电压对应，像素组的灰阶的数值为多个像素的灰阶的数值的均值。
像素组的灰阶对应的多个像素的伽马电压，为像素组的灰阶对应的一个寄存器值。
在一些示例中，抖动算法可以采用空间方式控制相邻像素进行，控制相邻像素的灰阶变化可使相邻像素整体表现为多种灰阶。本方式已在上文阐述，在此不做赘述。
在另一些实施例中，如图15至图17所示，抖动算法包括：连续的多帧图像内，显示面板上的像素在每一帧图像中的灰阶的数值的均数，为任一像素的显示灰阶。任一像素在连续的多帧图像内的灰阶对应的伽马电压，为显示灰 阶对应的一个寄存器值。
在一些实施例中，所述相邻的至少两帧图像内，所述任一像素的灰阶的数值相同和/或连续，所述寄存器值的数量至少为512个。
在一些示例中，抖动算法还可以采用时间方式进行控制像素在显示相邻帧图像时的灰阶。
示例性地，选取两个相邻帧图像，显示面板中任一像素在第一帧图像的灰阶为Gx，在第二帧图像的灰阶为Gy，则该像素在两个相邻帧的显示画面中整体呈现出的虚拟灰阶可以为一个灰阶Gx和一个灰阶Gy混合状态。
或者，显示面板中任一像素在第一帧图像的灰阶为Gx，在第二帧图像的灰阶为Gx，则该像素在两个相邻帧的显示画面中整体呈现出的虚拟灰阶可以为灰阶Gx。
或者，显示面板中任一像素在第一帧图像的灰阶为Gy，在第二帧图像的灰阶为Gy，则该像素在两个相邻帧的显示画面中整体呈现出的虚拟灰阶可以为灰阶Gy。
如此，虚拟灰阶的数量相较于伽马电压对应的灰阶的数量多出了一倍，即灰阶的数量为256个时，虚拟灰阶的数量为512个。
在另一些示例中，选取四个相邻帧图像，显示面板中任一像素在第一帧图像的灰阶为Gx，在第二帧图像的灰阶为Gy，在第三帧图像的灰阶为Gy，在第四帧图像的灰阶为Gy，则该像素在四个相邻帧的显示画面中整体呈现出的虚拟灰阶可以为一个灰阶Gx和三个灰阶Gy混合状态。
或者，显示面板中任一像素在第一帧图像的灰阶为Gx，在第二帧图像的灰阶为Gx，在第三帧图像的灰阶为Gy，在第四帧图像的灰阶为Gy，则该像素在四个相邻帧的显示画面中整体呈现出的虚拟灰阶可以为两个灰阶Gx和两个灰阶Gy混合状态。
或者，显示面板中任一像素在第一帧图像的灰阶为Gx，在第二帧图像的灰阶为Gx，在第三帧图像的灰阶为Gx，在第四帧图像的灰阶为Gy，则该像素在四个相邻帧的显示画面中整体呈现出的虚拟灰阶可以为三个灰阶Gx和一个灰阶Gy混合状态。
如此，虚拟灰阶的数量相较于伽马电压对应的灰阶的数量多出了3倍，也就是说，虚拟灰阶的数量是伽马电压对应的灰阶的数量的4倍，即灰阶的数量为256个时，虚拟灰阶的数量为1024个，寄存器值以表示的亮度从小到大依次为寄存器值J0、寄存器值J1……寄存器值J1023。寄存器值的范围由8比特拓展至10比特，寄存器值的数量为1024个。
在不同的显示亮度下，显示面板的像素需要在一定的寄存器值范围内调整灰阶，以形成一定的显示亮度且显示画面不会产生色偏。具体地，在不同的显示亮度下，显示面板中灰阶的值最大的像素，应随着显示亮度的下降而下降，相应地，随显示亮度的下降，显示面板中的像素可选择的虚拟灰阶的范围减小，即显示面板中的像素可选择的寄存器值的范围减小。
本公开的实施例将寄存器值的范围扩展至10比特，但是，显示面板在低灰阶下，显示面板中的像素可选择的寄存器值的范围较小，在此状态下，显示面板形成的图像可能会存在色偏的情况。
基于此，本公开的一些实施例中提供的车载显示装置的调光方法还包括：
H1、车载显示装置将数据信号由连续信号调制为脉冲信号；
H2、根据脉冲信号的占空比和显示面板的亮度，显示面板的像素对应的最大寄存器值，根据像素对应的最大寄存器值选择对应的伽马曲线。
在一些示例中，通过调制数据信号的功率可以控制显示面板的像素亮度(灰阶)，显示面板在低亮度下，像素可选择的虚拟灰阶的范围较小，例如，如表1所示，表1所述的第一寄存器值的数量是指，在对应的显示面板的亮度下，控制系统输出的数据信号为连续信号时，显示面板的个像素可选择的寄存器值的数量，表1所述的第二寄存器值的数量是指，在对应的显示面板的亮度下，控制系统输出的数据信号调制为脉冲信号时，显示面板的个像素可选择的寄存器值的数量。表1所述的占空比是指控制系统输出的数据信号调制为脉冲信号的占空比。
Figure PCTCN2022103195-appb-000001
表1
例如，显示面板在5尼特的调光亮度下，且控制系统输出的数据信号为连续信号，像素可在六个虚拟灰阶内选值。也就是说，此时，显示面板显示图像可能因虚拟灰阶数量较少造成显示画面色偏的情况发生。
像素在一帧图像内整体的发光亮度降低，但是像素在接收每个脉冲信后发光亮度高于一帧图像内整体的发光亮度，也就是说，在显示面板的亮度降低时，像素的瞬时亮度提高，因此，采用本公开提供的显示面板调光方法，显示面板在一定亮度下，应当参考像素的瞬时亮度对应的伽马曲线。因为瞬时亮度高于显示面板的亮度，因此可知像素可选择的虚拟灰阶的范围扩大，也就是说，采用本公开提供的显示面板调光方法，显示面板在低亮度下，寄存器值范围会有较大的提升。
示例性地，显示面板为5尼特，未采用本公开提供的显示面板调光方法时，像素可以在六个寄存器值中选值。采用本公开提供的显示面板调光方法后，脉冲信号的占空比为9％，像素可以在69个寄存器值中选值。
例如表1所示，将数据信号由连续信号调制为脉冲信号，即像素在一帧图像内整体的发光亮度降低，达到降低显示面板亮度为5尼特的目的，像素在每次发光时的瞬时亮度高于5尼特，也就是说，像素的虚拟灰阶的选择范围可以更大，例如，脉冲信号(数据信号)的占空比为9％时，显示面板亮度为5尼特，显示面板的像素可选择的虚拟灰阶的数量为69个。此时，显示面板的显示图像具有更多色彩区分，色偏的情况明显改善。
像素具有更多的寄存器值的选值范围，采用本公开提供的显示面板调光方法，显示面板的为低亮度时，画面显示更加清晰，色偏现象明显改善。
在一些实施例中，显示面板的亮度变化时，连续多帧图像的亮度逐步降低或升高。在显示亮度对应的伽马曲线一定时，连续多帧图像中的当前帧图像的亮度与后一帧图像的亮度比值，与形成当前帧图像的数据信号的占空比和形成后一帧图像的数据信号的占空比的比值相同。
在一些示例中，在车载显示装置的实际使用过程中，用户调节车载显示装置的显示亮度(例如，通过拖动车载显示装置的显示屏上的亮度滑条，来调节车载显示装置的显示屏的显示亮度)，或者车载显示装置响应于周围环境亮度的变化自动调整自身显示亮度的显示装置。
车载显示装置或显示面板调整亮度的过程中，为防止出现亮度跳变的问题，可以使连续多帧图像逐步降低或升高的方式进行。保持显示面板的显示亮度对应的伽马曲线一定，通过控制占空比，可以控制多帧图像的亮度降低或升高，具体地，占空比越大，图像的亮度越低。因此形成每帧图像的数据信号的占空比的变化幅度不宜过大，避免因为亮度变化过大造成亮度跳变的现象。
在一些实施例中，车载显示装置调制数据信号为脉冲信号的方式可以是源驱动子电路将数据信号转换为脉冲信号，或者电平位移子电路向GOA电路 传输控制信号，GOA电路输出的使能信号能够控制数据信号传输至像素驱动电路的电流通路的导通和截止，实现连续的数据信号调制为脉冲信号。
在一些实施例中，形成一帧图像的数据信号的脉冲数量为4。示例性地，车载OLED显示装置形成每一帧图像的数据信号包括4个脉冲。
示例性地，如图18所示，一帧图像内，控制数据信号传输至像素驱动电路的电流通路的导通和截止的使能信号EM的脉冲数量为4个，例如，结合图18和表1可知，使能信号EM的占空比为97％时，其对应的显示面板的亮度可以为815尼特，使能信号EM的占空比可以为48％时，其对应的显示面板的亮度为390尼特至500尼特之间，使能信号EM的占空比为9％时，其对应的显示面板的亮度可以为5尼特。可以理解的是，使能信号的占空比直接影响数据信号的占空比，也就是说，使能信号的占空比与数据信号的占空比相同。另外，数据信号的占空比不同时，数据信号的功率相应降低。
需要说明的是，在一些其它类型的OLED显示装置，形成一帧图像的数据信号可以包括16或32个脉冲信号，例如一种采用OLED显示面板的手机。
在一些实施例中，脉冲信号的占空比大于或等于9％。示例性地，脉冲信号的占空比为9％时，此时显示面板的亮度为5尼特，最低5尼特的显示亮度可以满足一些显示面板最低亮度的要求。当然，脉冲信号的占空比过低，可能会导致OLED显示面板不能稳定发光。
本公开的一些实施例还提供一种计算机可读存储介质，计算机可读存储介质存储有可在处理器上运行的计算机指令，计算机指令被处理器执行时实现如上的车载显示装置的调光方法中的一个或多个步骤。
需要说明的是，本公开实施例提供的计算机可读存储介质可以包括，但不限于：磁存储器件(例如，硬盘、软盘或磁带等)，只读存储器(ROM，Read-Only Memory)，随机存取存储器(RAM，Random Access Memory)，可擦写可编程只读存储器(EPROM，Erasable Programmable Read-Only Memory)等各种可以存储程序代码的介质。
本公开的一些实施例还提供一种计算机程序产品，当该计算机程序产品在计算机上运行时，使得该计算机执行如上的车载显示装置的调光方法中的一个或多个步骤。
本公开实施例提供的计算机存储介质或者计算机程序产品均用于执行上文所提供的车载显示装置的调光方法，因此，其所能达到的有益效果可参考上文所提供的对应的方法中的有益效果，此处不再赘述。
以上，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此， 任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。

Claims (22)

  1. 一种控制系统，包括：时序控制子电路、伽马寄存器子电路、源驱动子电路以及电源管理子电路；其中，所述时序控制子电路与所述伽马寄存器子电路、所述源驱动子电路电连接，所述伽马寄存器子电路和所述源驱动子电路电连接，所述电源管理子电路与所述时序控制子电路、所述伽马寄存器子电路和所述源驱动子电路电连接；
    其中，所述时序控制子电路被配置为，读取预先存储的绑点数据生成电压绑点信号，并传输至所述伽马寄存器子电路，以及接收所述源驱动子电路提供的N个伽马电压，并生成M个寄存器值，且所述M大于N，所述时序控制子电路还被配置为，响应于在客户端总成处接收的信号，将所述寄存器值传输至所述源驱动子电路；
    所述伽马寄存器子电路被配置为，响应于在所述电源管理子电路处接收的第一电压信号和在所述时序控制子电路处接收的电压绑点信号，生成模拟伽马电压信号并传输至源驱动子电路；
    所述源驱动子电路被配置为，接收多个所述模拟伽马电压信号，并在相邻两个模拟伽马电压信号之间生成多个所述伽马电压，以及响应于在所述时序控制子电路处接收寄存器值信号，生成数据信号并传输至显示面板；
    所述电源管理子电路被配置为，生成第一电压信号并传输至所述伽马寄存器子电路，以及生成工作电压并传输至所述时序控制子电路和所述源驱动子电路。
  2. 根据权利要求1所述的控制系统，其中，所述时序控制子电路至少包括：
    第一存储器，被配置为预存绑点数据；
    时序控制芯片，与所述第一存储器电连接，所述时序控制芯片被配置为读取所述第一存储器的绑点数据，生成所述电压绑点信号，以及接收所述源驱动子电路传输的N个伽马电压，生成M个寄存器值并储存，所述时序控制芯片还被配置为，响应于所述客户端总成处接收的信号，读取所述寄存器值并传输至所述源驱动子电路；
    第二存储器，与所述时序控制芯片电连接，所述第二存储器被配置为接收并存储所述时序控制芯片传输的M个寄存器值。
  3. 根据权利要求1或2所述的控制系统，其中，所述伽马寄存器子电路至少包括伽马芯片，所述伽马芯片与所述时序控制芯片、所述源驱动子电路以及所述电源管理子电路电连接；
    所述伽马芯片被配置为，响应于在所述时序控制芯片处接收的所述电压 绑点信号和在所述电源管理子电路处接收的第一电压信号，生成模拟伽马电压信号并传输至源驱动子电路。
  4. 根据权利要求1至3任一项所述的控制系统，其中，所述源驱动子电路至少包括源驱动芯片，所述源驱动芯片与所述时序控制芯片、所述伽马芯片电连接；
    所述源驱动芯片被配置为，接收所述伽马芯片输出的模拟伽马电压信号，生成伽马电压；以及接收所述时序控制芯片输出的信号，向所述显示面板传输数据信号。
  5. 根据权利要求1至3任一项所述的控制系统，其中，所述电源管理子电路至少包括电源管理芯片，所述电源管理芯片与时序控制芯片、所述伽马芯片、所述源驱动芯片、所述电平位移子电路和所述显示面板电连接；
    所述电源管理芯片被配置为，向所述时序控制芯片提供工作电压，向所述伽马芯片和所述源驱动芯片提供第一电压信号，向所述电平位移子电路提供高/低电平信号，以及向所述显示面板提供复位信号。
  6. 根据权利要求1至5任一项所述的控制系统，其中，所述控制系统还包括电平位移子电路，所述电平位移子电路与所述时序控制子电路、所述电源管理芯片电连接。
  7. 根据权利要求6所述的控制系统，其中，所述控制系统还包括电平位移芯片，所述电平位移芯片分别与所述时序控制芯片和电源管理芯片电连接，所述电平位移芯片被配置为，响应于在所述时序控制芯片接收的信号，生成第二信号并传输至显示面板。
  8. 一种车载显示装置，包括：
    如权利要求1至7任一项所述的控制系统；
    显示面板，与所述控制系统电连接。
  9. 一种车载显示装置的调光方法，应用于如权利要求8所述的车载显示装置，其中所述车载显示装置的控制系统向显示面板传输数据信号；
    所述车载显示装置的调光方法包括：
    生成多个由大到小或由小到大依次排列的伽马电压；
    以多个所述伽马电压为基础，采用抖动算法生成多个寄存器值；
    调制伽马曲线，根据所述多个寄存器值和所述显示面板的亮度，生成对应的一段所述伽马曲线。
  10. 根据权利要求9所述的车载显示装置的调光方法，其中，所述控制系统的电源管理子电路被配置为，向所述控制系统的伽马寄存器子电路提供第 一电压信号，且所述控制系统的时序控制子电路被配置为，向所述伽马寄存器子电路提供多个电压绑点信号；
    所述生成多个由大到小或由小到大依次排列的伽马电压的方法包括：
    根据所述第一电压信号和所述多个电压绑点信号生成多个模拟伽马电压，每个电压绑点信号对应一个模拟伽马电压；
    相邻两个模拟伽马电压分别设置于串联的多个电阻的两端，每个电阻两端之间的电压为一个伽马电压，所述相邻两个模拟伽马电压生成多个由小到大依次排列的所述伽马电压。
  11. 根据权利要求9所述的车载显示装置的调光方法，其中，所述伽马电压的数量为256个。
  12. 根据权利要求9至11任一项所述的车载显示装置的调光方法，其中，所述以多个所述伽马电压为基础，采用抖动算法生成多个寄存器值的方法包括：
    所述显示面板上相邻的多个像素为一个像素组，所述像素组内的每个像素的灰阶与多个所述伽马电压中的一个伽马电压对应，所述像素组的灰阶的数值为所述多个像素的灰阶的数值的均值；
    所述像素组的灰阶对应的所述多个像素的伽马电压，为所述像素组的灰阶对应的一个寄存器值。
  13. 根据权利要求12所述的车载显示装置的调光方法，其中，所述像素组内相邻的像素的数量为至少为两个，且所述每个像素的灰阶的数值相同和/或连续；
    所述寄存器值的数量至少为512个。
  14. 根据权利要求9至11任一项所述的车载显示装置的调光方法，其中，所述以多个所述伽马电压为基础，采用抖动算法生成多个寄存器值的方法包括：
    连续的多帧图像内，所述显示面板上的像素在每一帧图像中的灰阶的数值的均数，为任一像素的显示灰阶；
    所述任一像素在所述连续的多帧图像内的灰阶对应的伽马电压，为所述显示灰阶对应的一个寄存器值。
  15. 根据权利要求14所述的车载显示装置的调光方法，其中，所述相邻的至少两帧图像内，所述任一像素的灰阶的数值相同和/或连续；
    所述寄存器值的数量至少为512个。
  16. 根据权利要求9至15任一项所述的车载显示装置的调光方法，其中， 所述控制系统向所述显示面板传输数据信号；
    所述车载显示装置的调光方法还包括：
    所述车载显示装置将所述数据信号由连续信号调制为脉冲信号；
    根据所述脉冲信号的占空比和所述显示面板的亮度，所述显示面板的像素对应的最大寄存器值，根据所述像素对应的最大寄存器值选择对应的所述伽马曲线。
  17. 根据权利要求16所述的车载显示装置的调光方法，其中，所述根据所述像素对应的最大寄存器值选择对应的所述伽马曲线，包括：
    所述伽马曲线对应的所述寄存器值中的最大值，与所述显示面板的像素对应的最大寄存器值一致。
  18. 根据权利要求16所述的车载显示装置的调光方法，其中，所述显示面板的连续多帧图像的亮度降低或升高，所述伽马曲线一定时；
    所述连续多帧图像中的当前帧图像的亮度与后一帧图像的亮度比值，和形成所述当前帧图像的所述脉冲信号的占空比与形成所述后一帧图像的所述脉冲信号的占空比的比值，相同。
  19. 根据权利要求16至18任一项所述的车载显示装置的调光方法，其中，形成一帧图像的数据信号的脉冲数量为4。
  20. 根据权利要求16至18任一项所述的车载显示装置的调光方法，其中，所述脉冲信号的占空比大于或等于9％。
  21. 一种计算机可读存储介质，所述计算机可读存储介质存储有可在处理器上运行的计算机指令，所述计算机指令被所述处理器执行时实现如权利要求9～20中任一项所述的车载显示装置的调光方法中的一个或多个步骤。
  22. 一种计算机程序产品，当所述计算机程序产品在计算机上运行时，使得所述计算机执行如权利要求9～20中任一项所述的车载显示装置的调光方法中的一个或多个步骤。
PCT/CN2022/103195 2022-06-30 2022-06-30 控制系统、车载显示装置及调光方法 WO2024000549A1 (zh)

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