WO2023278861A1 - Systèmes et procédés de mesure d'impédance d'un élément de batterie - Google Patents

Systèmes et procédés de mesure d'impédance d'un élément de batterie Download PDF

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Publication number
WO2023278861A1
WO2023278861A1 PCT/US2022/035996 US2022035996W WO2023278861A1 WO 2023278861 A1 WO2023278861 A1 WO 2023278861A1 US 2022035996 W US2022035996 W US 2022035996W WO 2023278861 A1 WO2023278861 A1 WO 2023278861A1
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WIPO (PCT)
Prior art keywords
measurement
charge
impedance
voltage
current
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PCT/US2022/035996
Other languages
English (en)
Inventor
Daniel A. KONOPKA
John Richard HOWLETT III
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Iontra LLC
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Application filed by Iontra LLC filed Critical Iontra LLC
Priority to KR1020247003641A priority Critical patent/KR20240027801A/ko
Priority to CN202280050710.8A priority patent/CN117693882A/zh
Priority to AU2022301001A priority patent/AU2022301001A1/en
Priority to EP22748164.5A priority patent/EP4364264A1/fr
Priority to CA3223271A priority patent/CA3223271A1/fr
Publication of WO2023278861A1 publication Critical patent/WO2023278861A1/fr

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/389—Measuring internal impedance, internal conductance or related variables
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/003—Measuring mean values of current or voltage during a given time interval
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/30—Measuring the maximum or the minimum value of current or voltage reached in a time interval
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16—Spectrum analysis; Fourier analysis
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16—Spectrum analysis; Fourier analysis
    • G01R23/20—Measurement of non-linear distortion
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/385—Arrangements for measuring battery or accumulator variables
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits

Definitions

  • Embodiments of the present invention generally relate to systems and methods for charging of one or more battery cells, and more specifically to methods for determining impedance of a battery cell, the impedance determination for use in optimizing a charging signal to charge one or more battery cells.
  • One aspect of the present disclosure related to a method for monitoring an electrochemical device.
  • the method may include the operations of obtaining, via a processing device, a measurement of a first characteristic of an electrochemical device during a first period of a charge waveform applied to the electrochemical device, obtaining, via the processing device, a measurement of a second characteristic of the electrochemical device during a second period of a charge waveform applied to the electrochemical device, the second period occurring after the first period, and calculating an impedance parameter for the electrochemical device based on the measurement of the first characteristic and the measurement of the second characteristic.
  • FIG. 1 Another aspect of the present disclosure involves a system for charging an electrochemical device, where the system may include a processing unit, such as a controller, operably coupled with a first memory and a second memory.
  • the memories may be relatively small dedicated circular buffers of some form of RAM, such as DRAM, SRAM, and the like although other memory types are possible as well as partitioning a memory into distinct blocks of memory.
  • the first memory includes a first measurement of an electrochemical device and the second memory includes a second measurement of the electrochemical device. Measurements of the electrochemical device, e.g., voltage and current measurements of a battery, may be interleaved and alternatingly stored in the respective memories.
  • the processing unit is configured to compute an operational characteristic, such as some representation of impedance to the charge signal, of the electrochemical device from the first measurement and the second measurement.
  • the system may further include a first multiplexor operably coupled with the first memory and the second memory, where the multiplexor is controlled to sequence storage of the first measurement in the first memory and the second measurement in the second memory.
  • the interleaved measurements may similarly be interleaved into the respective memories.
  • the first measurement is stored in a first memory location of the first memory and the second measurement is stored in a second memory location of the second memory, wherein the first memory location is aligned with the second memory location.
  • the system may access the first out memory location of each memory, and the interleaved measurements will be each available.
  • system may further include a second multiplexor operably coupled with an analog to digital converter, where the analog to digital converter is operably coupled with the first multiplexor.
  • the second multiplexor is controlled to alternately access a first measurement circuit to obtain the first measurement and a second measurement circuit to obtain the second measurement, and the analog to digital converter alternatively digitizes the first measurement and the second measurement and provides the digitized measurements to the first multiplexor to sequence storage of the first measurement in the first memory and the second measurement in the second memory.
  • aspects of the present disclosure involve a system for an electrochemical device involving a processing arrangement to obtain a first measurement of a first current from a first memory, the first measurement of an electrochemical device (e.g., a battery) during a first period of a charge or discharge waveform at the electrochemical device and obtain a second measurement of a second voltage from a second memory, the second measurement of the electrochemical device during a second period of a charge or discharge waveform at the electrochemical device where the second period occurs after the first period.
  • the processing arrangement calculates an impedance characteristic for the electrochemical device based on the first measurement of the first current and the second measurement of the second voltage.
  • the first measurement may be a current amplitude responsive to a charge or discharge signal applied to the electrochemical device and the second measurement may be a voltage amplitude responsive to a charge or discharge signal applied to the electrochemical device, with the controller calculating an impedance ratio from the current amplitude measurement and the corresponding voltage amplitude measurement and obtaining based on the impedance ratio, the impedance characteristic of the electrochemical device.
  • Figure 1A is a schematic diagram illustrating a first circuit for charging a battery cell utilizing a charge signal shaping circuit in accordance with one embodiment.
  • Figure 1 B is a signal diagram of a charge signal for a battery cell and the component harmonics of the charge signal in accordance with one embodiment.
  • Figure 1C is a graph of measured real impedance values of a battery cell to corresponding frequencies of a charge signal applied to the battery cell in accordance with one embodiment.
  • Figure 2 is a signal diagram of a measured variation in current across a battery cell in response to a voltage-controlled discrete charge period in accordance with one embodiment.
  • Figure 3 is a flowchart illustrating a method for determining an impedance of a battery cell at various times based on measured characteristics of waveforms at the battery cell in accordance with one embodiment.
  • Figure 4A is a signal diagram of a measured variation in current across a battery cell in response to a first applied voltage discrete charge period in accordance with one embodiment.
  • Figure 4B is a signal diagram of a measured variation in current across a battery cell in response to a second applied voltage discrete charge period in accordance with one embodiment.
  • Figure 4C is a signal diagram of a measured variation in current across a battery cell in response to a third applied voltage discrete charge period in accordance with one embodiment.
  • Figure 5 is a signal diagram of a measured variation in current across a battery cell in response to a voltage-controlled discrete charge period in accordance with one embodiment.
  • Figure 6A is a second signal diagram of a measured variation in current across a battery cell in response to a voltage-controlled discrete charge period in accordance with one embodiment.
  • Figure 6B is a third signal diagram of a measured variation in current across a battery cell in response to a voltage-controlled discrete charge period in accordance with one embodiment.
  • Figure 7 is a schematic diagram illustrating a second circuit for charging a battery cell based on a measured impedance value in accordance with one embodiment.
  • Figure 8A is a signal diagram of measured currents into a battery cell in blocks of time for determining impedance values at the battery cell in accordance with one embodiment.
  • Figure 8B is a signal diagram of measured voltages across a battery cell in blocks of time for determining impedance values at the battery cell in accordance with one embodiment.
  • Figure 9 is a flowchart illustrating a method for determining an impedance parameter of a battery cell based on measurements of the battery cell taken at different time periods in accordance with one embodiment.
  • Figure 10 is a signal diagram illustrating time windows where voltage and current measurements of a charge signal are interleaved for multiplexed storage into respective memory banks.
  • Figure 11 is a diagram illustrating an example of a computing system which may be used in implementing embodiments of the present disclosure.
  • aspects of the present disclosure involve optimizing a charge signal corresponding to a harmonic, or harmonics, associated with minimum real or resistance and/or minimum imaginary or reactance impedance values of a battery cell.
  • a charge signal may improve the efficiency when charging the battery cell by reducing lost energy due to high impedance at the electrodes of the battery cell.
  • a charge signal associated with a high impedance at the electrodes of the battery cell may result in many inefficiencies, including capacity losses, heat generation, imbalance in electro- kinetic activity throughout the battery cell, undesirable electro-chemical response at the charge boundary, and damage to the materials within the battery cell that may damage the battery and degrade the life of the battery cell.
  • measurement of the impedance at the battery cell at different times or stages of a charging sequence as the impedance profile of the battery cell changes may further improve the charging of the battery cell.
  • altering charging characteristics based on such impedance changes may further benefit the battery system in various ways.
  • Implementations may include measuring the impedance of a battery to, in some instances, determine a frequency component or harmonic that defines, at least a portion, of a waveform shape for charging the battery.
  • the charge waveform may be of any form or shape and may include both periodic and aperiodic portions.
  • the systems and methods described herein may apply to any type of charge signal that includes at least one harmonic.
  • the impedance values, including both a real component value and/or an imaginary component value, of the battery may be obtained in a variety of ways or methods.
  • references to impedance herein may refer to complex impedance expressed in a polar form in which a magnitude value represents a ratio of a voltage amplitude across the battery cell to a current amplitude through the battery cell and a phase value representing a phase shift by which the current leads, lags, or is in phase with the voltage at the battery cell.
  • the references to impedance herein may also refer to complex impedance expressed in a Cartesian form, derived from the polar form, in which a real component or value represents the resistance at the battery cell and an imaginary component represents the reactance at the battery cell.
  • the systems and methods described may determine such values from a ratio of a voltage amplitude across the battery cell to a current amplitude through the battery cell (or magnitude of the impedance) and a phase difference of the current signal in relationship to the voltage signal (or phase shift of the impedance).
  • different characteristics of the battery cell may be measured, determined, or estimated.
  • a conductance and/or susceptance, or any other admittance aspect, either alone or in combination, of the battery may be measured or obtained during charging of the battery.
  • Still other characteristics of the battery may be obtained and/or estimated, such as power delivered, voltage measurements, current measurements, and the like.
  • the systems and methods described herein may measure or otherwise obtain such values of admittance, power or other representative values indicative of the flow of current to the electrochemical device (e.g., charge current into the device), responsive to the charge waveform and based on some aspect of a defined harmonic of the charge waveform, and use such values to tailor a charge signal.
  • the tailoring of the waveform involves optimizing, and defining, a harmonic feature of the waveform based on one or more such representative values.
  • the impedance at the battery cell may be measured or estimated from a discrete charge period of a charge waveform being applied to the battery or from multiple discrete charge periods applied to the battery.
  • aspects of the amplitude and time components of the voltage and current components of the charge signal at the battery cell may be measured and/or estimated.
  • aspects of the amplitude and time components of the voltage and current components of the charge signal over multiple discrete charge periods or at various times may be measured and/or estimated.
  • aspects discussed herein with reference to measurements obtained during one discrete charge period of a charge waveform may similarly apply to measurements obtained over multiple discrete charge periods or at other various times of the charge waveform.
  • the measured differences between the amplitude and time components of the voltage and current waveforms may be used to determine or estimate the magnitude, phase shift, real, and/or imaginary values of the impedance at the battery cell.
  • real and imaginary impedance values may be determined from differences at a leading edge of a charge discrete charge period that is defined from a known harmonic with the differences in the amplitude of the voltage and current waveforms taken at a known point or points of the harmonic/waveform edge.
  • aspects of the impedance may be approximated from amplitude measurements of the voltage and current portions at other points of a charge waveform.
  • the various measurements of the voltage and current waveforms of the charge signal may be adjusted based on weighted values applied to the measurements.
  • the voltage and current waveforms of the charge signal may be determined or measured to determine or estimate the impedance at the battery cell.
  • hundreds or thousands of measurements of the voltage and current portion of the charge signal may be obtained and analyzed via a digital processing system.
  • more measurements of the waveforms may provide a more accurate analysis of the effect of the waveforms on the impedance of the battery cell to better determine the frequency effect of impedance, and design the waveform based on the frequency.
  • a charge waveform may be applied to a battery cell and parameters associated with different portions of the waveform may be measured or estimated.
  • One or more key impedance parameters may be calculated from the measured portions of the waveform.
  • the key impedance parameters may be determined via a processor configured to calculate or estimate the various key impedance parameters from the measured attributes at the battery cell at various sections of a charge waveform.
  • Separate control processes may adjust and/or optimize the components of the charge waveform based on the key impedance parameters. Each controller may represent a separate process working to optimize different parts of the waveform concurrently or individually in sequence.
  • one or more of the impedance parameters may be weighted and a score, error, probability, or other feedback measurement may be determined from the weighted impedance values.
  • the feedback measurement may be increased until an optimized or highest score is achieved.
  • the controllers may control the charge waveform based on the calculated feedback measurements.
  • the controllers of the charge waveform may act concurrently with rules, or in a predefined sequence (which may be overridden in the event of certain triggers defined by programmed rules).
  • calculating or estimating the parameters of a battery cell may include obtaining a measurement of a first characteristic of the battery cell during a first block of time and storing the measurement in a storage or memory device and obtaining a measurement of a second characteristic of the battery cell during second block of time later than the first block.
  • a measurement of a current flowing into the battery cell may be obtained from a current measurement circuit and provided to a circuit controller for storage during a first time block of a charging waveform.
  • the charging waveform may be a repeating signal such that a shape of the charging waveform may be the same or similar for each time block of the waveform.
  • a voltage across the battery cell may be measured by a voltage measurement circuit and provided to the circuit controller for storage.
  • the battery cell may then use the stored measurement values to estimate some characteristic or parameter of the battery cell.
  • the stored measurement values may be used to estimate an impedance parameter of the battery cell, although other characteristics such as an estimated power, an imaginary impedance value, a conductance value, a susceptance value, and others.
  • the circuit controller may divide the voltage measurement by the current measurement to estimate the impedance over the multiple time blocks of the charge waveform. Such an approach may be utilized by circuit controllers with limited processing capabilities.
  • the system may be deployed in an environment where more sophisticated and expensive processors and memory are not necessarily available for commercially practical applications.
  • the circuit controller may process the measurements at a speed that matches the processing capabilities of the circuit controller.
  • the calculated or estimated characteristic of the battery cell may be utilized by the circuit controller to shape or otherwise alter a charge waveform used to charge the battery cell, as explained in more detail herein.
  • battery and “battery cell” in the art and herein can be used in various ways and may refer to an individual cell having an anode and cathode separated by an electrolyte as well as a collection of such cells connected in various arrangements.
  • a battery or battery cell is a form of electrochemical device. Batteries generally comprise repeating units of sources of a countercharge and first electrode layers separated by an ionically conductive barrier, often a liquid or polymer membrane saturated with an electrolyte. These layers are made to be thin so multiple units can occupy the volume of a battery, increasing the available power of the battery with each stacked unit.
  • the systems and methods described may apply to many different types of batteries ranging from an individual cell to batteries involving different possible interconnections of cells such as cells coupled in parallel, series, and parallel and series.
  • the systems and methods discussed herein may apply to a battery pack comprising numerous cells arranged to provide a defined pack voltage, output current, and/or capacity.
  • the implementations discussed herein may apply to different types of electrochemical devices such as various different types of lithium batteries including but not limited to lithium -metal and lithium-ion batteries, lead acid batteries, various types of nickel batteries, and solid-state batteries, to name a few.
  • the various implementations discussed herein may also apply to different structural battery arrangements such as button or “coin” type batteries, cylindrical cells, pouch cells, and prismatic cells.
  • FIG. 1A is a schematic diagram illustrating an example charge circuit 100 for recharging a battery 104 in accordance with one embodiment.
  • the circuit 200 may include a power source 102, which may be a voltage source or a current source.
  • the power source 102 is a direct current (DC) voltage source, although alternating current (AC) sources are also contemplated.
  • the power source 102 supplies a charge current for recharging a battery cell 104.
  • the circuit 100 of Fig. 1A may include a charge signal shaping circuit 106 between the power source 102 and the battery cell 104 to shape the charge signal for use in charging the battery 104.
  • a circuit controller 110 may be in communication with the charge signal shaping circuit 106 and provide one or more inputs to the charge signal shaping circuit 106 to control the shaping and/or define harmonic components of the charge signal.
  • One particular implementation of the charge shaping circuit 106 is described in greater detail in co-filed United States Non-Provisional Application 17/232,975 titled “Systems and Methods for Battery Charging”, the entirety of which is incorporated by reference herein.
  • the circuit controller 110 may control the charge shaping circuit 106 to shape the waveforms of the charge signal based on one or impedance measurements or other characteristics of the battery cell 104.
  • the charge signal shaping circuit 106 may be controlled to alter energy from the power source 102 to generate a charge waveform that at least partially corresponds to a harmonic associated with a minimum real impedance value, a minimum imaginary impedance value, a maximum conductance value, an optimal susceptance value, and the like of the battery cell 104.
  • the circuit controller 110 may communicate with an impedance measurement circuit 108 connected to the battery cell 104 to measure cell voltage and charge current, as well as other cell attributes like temperature and measure or calculate the impedance across the electrodes of the cell 104.
  • impedance may be measured based on the applied waveforms and may include a real or resistance value and an imaginary or reactance value.
  • impedance may be measured based on the applied waveforms and may include a magnitude value determined from a ratio of a voltage amplitude and a current amplitude and a phase shift value determined from a lag of a current signal in relation to a voltage signal.
  • the impedance of the battery cell or cells 104 may vary based on many physical of chemical features of the cell, including number and configuration of cells, a state of charge and/or a temperature of the cell(s).
  • the impedance measurement circuit 108 may be controlled by the circuit controller 110 to determine various impedance values of the battery cell 104 during recharging of the cell, among other times, and provide the measured impedance values to the circuit controller 110.
  • a real component of the measured impedance of the battery cell 104 may be provided to the charge signal shaping circuit 106 by the circuit controller such that energy from the power source 102 may be sculpted into one or more charge waveforms that correspond to a harmonic associated with a minimum real impedance value of the battery cell 104.
  • the circuit controller 110 may generate one or more control signals based on the received real impedance value and provide those control signals to the charge signal shaping circuit 106. The control signals may, among other functions, shape the charge waveform to include a harmonic component corresponding to the real impedance value.
  • Waveforms generated from a conventional power supply may be comprised of multiple harmonic components.
  • Figure 1 B illustrates an example a sequence of waveforms 120, which could be applied to charge a battery cell 104.
  • the waveform signal 120 is comprised of several sinusoidal signals, or harmonics, of different frequencies.
  • the waveform signal 120 is a summation of sinusoidal signal 122 of a first frequency, sinusoidal signal 124 of a second frequency, sinusoidal signal 126 of a third frequency, and sinusoidal signal 128 of a fourth frequency.
  • sinusoidal harmonics 122-128 comprise the waveform signal 120 of Figure 1 B.
  • aspects of the present disclosure involve, controlling the shape of the waveforms, including magnitude and timing of harmonics, in such a signal and using that shaped signal to charge a battery cell, where various aspects of the waveforms, e.g., a leading edge, a body, and/or a trailing edge, may be created through a harmonic or combination of harmonic components.
  • various aspects of the waveforms e.g., a leading edge, a body, and/or a trailing edge
  • the impedance at the battery cell 104 due to the application of a waveform signal 120 may be dependent upon the harmonics or frequencies contained within the charge signal.
  • the signal may include a sequence of pulses that each consist of various frequency harmonics as introduced with regard to Fig. 1 B.
  • the uncontrolled implicit harmonics of the pulses may be associated with relatively high impedances at the battery cell 104 should such an uncontrolled pulse signal be applied in charging, lowering the efficiency of the square wave to charge the battery cell 104.
  • generating or shaping a charge signal to remove or diminish harmonics at which high impedance is present at the battery cell 104 may improve the efficiency in charging the battery, reduce heat generated during charging, reduce damage to the anode or cathode, reduce charging time, allow for more capacity to be used, and/or increase battery life.
  • Figure 1C is a graph 132 illustrating a relationship between a real impedance value (axis 134) of a battery cell 104 to corresponding harmonics (illustrated as logarithmic frequency axis (axis 136)) included in a charge signal applied to the battery cell.
  • the plot 138 illustrates real impedance values across the electrodes of a battery cell 104 at the various frequencies of a sinusoidal component of a charge signal that may applied as a charge signal.
  • the real impedance values 138 may vary based on the frequency of the charge signal, with relatively lower impedances between initially higher impedances at lower frequencies and then a relatively rapid increase in real impedance values at harmonics higher than the frequency at which the lowest impedance is found.
  • the plot 138 of real impedance values for the battery cell 104 indicates a minimum real impedance value 140 that corresponds to a particular charge signal frequency 142, labeled as f Min .
  • the plot of real impedance values 138 for the battery cell 104 may be dependent on many factors of the cell, such as battery chemistry, state of charge, temperature, composition of charge signal, and the like.
  • the frequency f Min 142 corresponding to the minimum real impedance value 140 of the battery cell 104 may similarly be dependent upon the characteristics of the particular battery cell 104 under charge.
  • the frequency f Min 142 may correspond to other aspects of the battery cell 104, such as the configuration of the cells in a pack and the connections between the cells in the pack.
  • the charge signal shaping circuit 106 may provide, in response to one or more control signals from the circuit controller 110, a charge discrete charge period similar to that illustrated in Figure 2.
  • Figure 2 is a signal diagram of a measured voltage 202 across a battery cell (illustrated as the solid line 202 labeled “V”) and a measured current 204 at battery cell (illustrated as the dashed line 204 labeled ⁇ ”) versus time 206 in response to a charge signal applied to the battery cell in accordance with one embodiment.
  • the charge signal shaping circuit 106 may control the voltage 202 or current 204 across battery cell to include a shaped front edge 209 (sometimes corresponding to a harmonic associated with an impedance measurement at the battery cell), a constant or near constant body portion 203 (which may correspond to an upper voltage limit of the power source 102 or a maximum voltage or current level the system may apply to the battery at the time), and a sharp falling edge 205.
  • the current 204 component of the discrete charge period 201 may lag behind the voltage component 202. More particularly, the current 204 at the battery cell may take some time to return to zero after the voltage 202 to the battery is removed at the falling edge 205 of the discrete charge period 201.
  • some implementations of the discrete charge period 201 may include the voltage 202 of the charge signal controlled to drive the voltage below a transition voltage corresponding to a zero current at the battery cell, represented in Figure 2 as portion 214 of the discrete charge period.
  • the transition voltage is the voltage of a charge signal at which current flow into the battery is reversed and may be similar to the float voltage of the battery cell.
  • driving the voltage 214 below the transition voltage, which may be zero, for a period of time following the falling edge 205 of the discrete charge period may drive the current 204 to zero amps at a faster rate as compared to a discrete charge period without such a momentary negative voltage portion.
  • the duration TT 216, during which the voltage 214 is controlled below the transition voltage corresponding to a zero current may be determined or set by the circuit controller 110 to minimize the time for the current 204 at the battery cell 104 to return to zero amps.
  • another discrete charge period 201 may be applied to the battery cell 104.
  • the resting voltage 230 may be stabilized without external control in addition to the current 204 returning to zero amps prior to the next discrete charge period 201 being applied to the battery cell 104. In either instance, it may be desirable to minimize or control the amount of discharge that occurs at the end of the discrete charge period 201 before the application of another charge discrete charge period.
  • the circuit controller 110 may control an impedance measurement circuit 108 to measure the impedance at the battery cell 104 and use such measurements to control the charge signal shaping circuit 106 to generate one or more additional or future charge discrete charge periods based on the measured impedances.
  • the impedance at the battery cell 104 may correspond to the harmonics of the charge signal
  • efficiency of charging the battery cell may be improved by limiting the harmonics in a charge signal to those at or near the frequency fiui n 142 and/or shaping the leading edge corresponding to those frequencies.
  • the circuit of Figure 1A may be configured or designed to obtain impedance values at the battery cell 104 at various points during a discrete charge period or over multiple discrete charge periods to determine the impedance profile of the battery cell 104 and adjust additional or future charge periods in response.
  • the circuit controller 110 may control the impedance measurement circuit 108 to obtain other characteristics of the battery cell 104 and/or charge signal applied to the battery cell and use the obtained characteristics to estimate an impedance at the battery cell.
  • impedance values of the battery cell 104 may be measured or estimated based on amplitude and time features of the voltage waveform 202 and/or the current waveform 204 measured at the battery cell by the impedance measurement circuit 108.
  • FIG. 3 is a flowchart illustrating one method for determining impedance values of a battery cell at various times based on measured characteristics of waveforms at the battery cell in accordance with one embodiment.
  • the operations of the method may be performed by components of the impedance measuring circuit 108, perhaps in response to one or more control signals provided by the circuit controller 110. Other components of the circuit 100, however, may perform one or more of the operations of the method 300. Further, the measurements of the waveforms may be obtained through one or more hardware components, one or more software programs, or a combination of hardware and software components. Also, one or more of the operations described may not be performed and the operations may be performed in any order.
  • the impedance measurement circuit 108 may obtain amplitude and/or time measurements of voltage and current waveforms at the battery cell 104 at various times during the application of the discrete charge period to the battery cell 104.
  • a voltage waveform such as waveform 202
  • a current waveform such as waveform 204
  • the circuit 100 of Figure 1A may include voltage-controlled components such that the voltage waveform 202 controls the recharge of the battery cell 104.
  • the circuit 100 may include current-controlled components such that a current waveform is shaped by the charge signal shaping circuit 106 to recharge the battery cell 104. Regardless of the type of waveform applied, a voltage at the battery 104 and a measured current at the battery at various times and in response to the discrete charge period applied to the battery cell may be determined or measured.
  • the impedance measurement circuit 108 may obtain a first voltage measurement Vo and a first current measurement lo may be obtained at a first time 218.
  • the first time 218 may correlate to a time when the current at the battery cell 104 is zero amps before the application of the discrete charge period 201 to the battery cell 104.
  • voltage Vo may be a floating voltage of the battery cell 104.
  • the represented values of the voltage component 202 and the current component 207 may be scaled and overlaid such that the signals may be illustrated in the same plot, despite being measured in different units.
  • x-axis 206 may represent both zero amps for the current plot 207 and a transition voltage value (in some instances more or less than a zero value) for the voltage plot 202.
  • Additional voltage and current measurements may be taken later corresponding to the waveforms of the discrete charge period 201.
  • the impedance measurement circuit 108 may measure the voltage Vi 220 at the peak of the leading edge 209 of the voltage waveform 202.
  • the impedance measurement circuit 108 may measure a time difference Ti-v between the initial voltage measurement Vo and the time at which voltage Vi 220 occurs.
  • the time difference Ti-v may be used, as explained below, to determine a reactance value or phase shift value of the impedance at the battery cell 104.
  • the impedance measurement circuit 108 may measure the current h 222 at the peak of the leading edge 211 of the current waveform 207.
  • the impedance measurement circuit 108 may measure a time difference Ti. ⁇ between the initial current measurement lo and the time at which current 222 occurs.
  • the current waveform 204 is delayed in relation to the controlled voltage waveform 202 such that Tu occurs after Ti-v.
  • Additional amplitude values of the voltage waveform 202 and the current waveform 204 may be taken at the falling edge 205 of the discrete charge period 201.
  • the impedance measurement circuit 108 may measure the voltage V2212 and the current I2224 at the occurrence of the falling edge 205 of the discrete charge period 201.
  • less than all of the voltage 202 of the discrete charge period 201 is converted to charge current 204 such that there is some difference between the applied voltage and the received current at the battery cell 104.
  • Still additional time measurements may be taken by the impedance measurement circuit 108.
  • a voltage V3 and time difference T2 226 between the initial voltage measurement Vo and the time at which voltage V3 occurs may be obtained when the current waveform 204 returns to zero amps.
  • time difference T2226 may be referred to as the fade time as a measure of the time to bring the current waveform 204 to zero amps.
  • the voltage V3 may be below the transition voltage for the battery cell 104 to aid in driving the current to zero amps.
  • the charge signal for the battery cell 104 may be controlled to wait until the voltage and current at the battery cell 104 returns to a rest state corresponding to zero amps and the voltage at the transition voltage for the battery cell.
  • the impedance measurement circuit 108 may further measure a time difference T3 228 between the initial voltage measurement Vo and the time at which voltage the voltage waveform 202 returns to the transition voltage and the current waveform 204 returns to zero amps. In some instances, an additional rest period may be added to the charge signal before an additional discrete charge period is generated for the battery cell 104 to prevent inefficiencies in the charge signal. [0046] It should be appreciated that any number and type of characteristics of the voltage and current waveforms 202, 204 may be measured or determined by the impedance measurement circuit 108 or the circuit controller 110.
  • amplitudes of the voltage waveform 202 and/or amplitudes of the current waveform 204 may be measured and a time difference of the occurrence of such amplitudes may be determined.
  • the points of the discrete charge period 201 at which the measurements are taken may be dependent upon the shaping of the discrete charge period by the circuit 100 as the measurements may be used to determine the characteristics of the shaped charge period, as described in more detail below.
  • the estimated real impedance ZR BODY may be approximated as the portion of the discrete charge period 201 at which the measurements V2 212 and I2 224 are taken may include many undistinguishable harmonics such that ZR BODY may include unknown reactance portions. Such difficulties are generally not present in the calculation of ZR EDGE as the leading edge 209 of the discrete charge period 201 may comprised of a single harmonic.
  • the impedance measurement circuit 108 may determine a difference in the time Ti-v and Ti-i and utilize the measured time difference to estimate an imaginary impedance value 208 at the peak of the leading edge 209 portion of the discrete charge period 201.
  • ZIMG_BODY may be roughly approximated by measuring the impedance characteristics during the time of the fade duration T T 216.
  • the imaginary component of the impedance at the falling edge 205 may relate to the duration T T 216 of the fade portion of the discrete charge period 201 such that the imaginary component may be estimated based on the measured duration TT 216.
  • many aspects of the impedance of the battery cell 104 may be determined or estimated based on any number of measurements of the discrete charge period 201 applied to the battery cell 104.
  • the circuit controller 110 may apply one or more of the calculated or determined impedance characteristics to one or more discrete charge period parameter controllers to determine adjustments to the shape of the discrete charge periods of the charge signal provided to the battery cell 104.
  • the controllers may utilize the impedance measurements or estimates as inputs to the controllers.
  • the determined impedance values may be weighted to adjust the effect of the measurements against other measurements or estimates.
  • any aspect of the waveforms 202, 204 may be weighted, not necessarily just against the impedance values, but a variety of parameters including peak values, % time utilization (where a square pulse at 50% duty would be 50% utilization, DC would be 100%), and the like.
  • the discrete charge period parameter controllers may adjust aspects of the charge waveform 201 to achieve an optimized charge waveform shape.
  • separate waveform parameter controllers may be configured to adjust or optimize a corresponding portion of the charge waveform 201.
  • the waveform parameter controllers may include a controller to optimize a harmonic of the leading edge portion 209 of the discrete charge period 201 , a controller to optimize the duration of the body portion 203 of the discrete charge period, a controller to optimize the lowest voltage magnitude at the bottom of the fade portion 214 of the discrete charge period, and/or a controller to optimize the rest period of the discrete charge period before a new discrete charge period is generated.
  • the ZR BODY and/or ZR EDGE determined above may be utilized to determine the harmonic of the leading edge portion 209 of the discrete charge period 201.
  • Other aspects or characteristics of the discrete charge period may also be optimized by one or more controllers.
  • Each discrete charge period parameter controller may receive an aspect of the impedance measurements or estimations, voltage measurements, current measurements, and the like of the charge waveform 201. Further, each controller may adjust weighting applied to the inputs to generate a highest optimization value for the corresponding portion of the discrete charge period 201 or to minimize damage to the battery cell 104, as explained in more detail below. Such optimization may occur separately or concurrently by the discrete charge period parameter controllers.
  • the controllers may execute sequentially based on one or more rules to determine the sequence of the execution. Further, the sequence of controller execution may be adjusted based on one or more event triggers obtained from the measurements of the charge waveform 201.
  • the circuit controller 110 may control the charge signal shaping circuit 106 to generate a discrete charge period based on the outputs from the discrete charge period parameters controllers.
  • the outputs from the discrete charge period parameter controllers provide an optimized discrete charge period 201 for applying charge to the battery cell while minimizing or reducing the impedance at the battery cell electrodes.
  • the translation of the controller outputs may generate the control signals for the shaping circuit 106 to adjust the shape of the discrete charge period to optimize the charge signal.
  • the discrete charge period parameter controller corresponding to the harmonic of the leading edge 209 of the discrete charge period 201 may output a frequency for the leading edge to optimize or reduce high frequency harmonics from the leading edge.
  • the circuit controller 110 may then generate one or more control signals for the shaping circuit 106 to adjust the harmonic of the leading edge of the discrete charge period to correspond to the output of the controller.
  • Other aspects of the discrete charge period may be similarly controlled based on the output of the discrete charge period parameter controllers, such as the duration of the discrete charge period and the voltage below the transition voltage for the fade portion of the discrete charge period.
  • the calculated or estimated impedance of the battery cell 104 may be used to adjust or control the shape of charge waveforms provided to the battery cell.
  • the circuit controller 110 may consider a state of charge or other characteristic in addition to the measured or estimated impedance values to control the charge signal shaping circuit 106 to generate a discrete charge period based on the obtained impedance measurements above.
  • the battery cell 104 may be determined, by the circuit controller 110, to have a state of charge below 10% with a float voltage below a nominal voltage at the start of a charging session.
  • the circuit controller 110 may control a discrete charge period generating circuit to adjust the discrete charge period in response to the determined impedances. For example, a subsequent discrete charge period may be controlled to have a similar shape as that illustrated in Figure 2.
  • the sinusoidal leading edge 209 of the subsequent discrete charge period 201 may be controlled to match a frequency that is above a frequency associated with a minimum impedance of the battery cell.
  • the frequency of the leading edge 209 may be selected by the circuit controller 110 such that the impedance at the battery cell 104 during the leading edge 209 is within a particular tolerance of the measured or calculated impedance values, such as within 12% of a measured minimum impedance (Z min ), a measured real impedance (Z r ), a calculated modulus impedance (Z m0d ), or any other impedance-based measurement or calculation.
  • the circuit controller 110 may then apply a constant voltage, sloped, or shaped for the body portion 203 of the discrete charge period 201.
  • the current may, in some instances, continue to rise as diffusive processes within the battery cell 104 may still be transient.
  • the duration of the body 203 may be adjusted by the circuit controller 110 such that the current peaks at the midpoint of the body 203. This may provide for the current to return, at the end of the body 203, to the same or similar value at the beginning of the body 203 portion, due to the onset of mass transport limitations and increasing voltage gradients between components within the cell.
  • the current may lag the voltage signal but may ultimately fall to zero magnitude.
  • the period 216 for the current to fall to zero magnitude may be controlled to be within an acceptable period (such as 15% of the leading edge period). In other instances, the current may be uncontrolled when returning to zero amps after the trailing edge 232 of the discrete charge period 201. This may provide for a lower peak voltage and peak current for a given target charge rate of the battery cell 104, which may minimize polarization, gas evolution, and temperature increase in the battery cell 104.
  • a suitable rest period between discrete charge periods may be based on the duration of the leading edge 209 and body 203 of the charge signal and may be applied to allow the battery cell 104 to dissipate additional heat while maintaining the target charge rate.
  • the impedance of the battery cell 104 may become increasingly sensitive to peak voltage and peak current of the discrete charge period.
  • the circuit controller 110 may adjust the harmonic of the body portion 203 of the discrete charge period 201 to center around the minimum impedance frequency, while the harmonic associated with the leading edge 202 may be selected to yield a narrower sinusoidal signal (a leading edge 209 with a shorter period).
  • These alterations to the discrete charge period may result in a higher average impedance at the battery cell 104 due to the faster leading edge, such as up to 25 % of the minimum impedance.
  • the current may require additional time to approach zero at the trailing edge 205 of the discrete charge period 201.
  • the voltage dip 214 at the end of the discrete charge period 201 may be decreased to as much as 2.6V instead of returning to the cell’s float voltage as above.
  • This voltage dip 214 may be held for a period that allows the current 232 to approach zero within 15% of the leading edge period, and is then gradually raised to the float voltage at a gradient to minimize partial discharge due to current overshoot below zero as well as current oscillation around zero.
  • the impedance of the battery cell may necessitate less variation between the frequency of the leading edge 209 and the frequency of the body 203 of the discrete charge period 201.
  • the discrete charge period 201 may be controlled to within a 22% deviation from the minimum impedance.
  • the impedance of the battery cell 104 may provide for a longer rest period between charge periods while becoming less sensitive to peak voltage and current values for a given charge rate. Adjustment to the discrete charge period 201 allows the charge system to maintain efficient charging with lower polarization and without excessive heat, electrochemical side reactions, or capacity loss.
  • a microcontroller or other digital-based measuring system may be utilized to calculate impedance of the battery cell 104 and control the charge waveform 201 in response.
  • three voltage measurements of a voltage signal such as voltage signal 202
  • three current measurements of a current signal 204 may be obtained.
  • the measurements may be obtained at the same time in the time domain in the time domain and may therefore be used to calculate two impedance values, Zi and Z2.
  • measurements Vi and may be obtained at the same time within the time domain of the discrete charge period. Additional measurements of the waveforms 202, 204 may also be obtained, as described above.
  • the impedance values Zi and Z2 may be used in a similar manner as described above to determine one or more features or aspects of a charge signal and may be utilized by the control circuit 110 to control aspects of the circuit 100 to shape the charge signal accordingly to generate the optimized charge signal from the combination of the controlled waveform.
  • the current through the battery cell 104 corresponds to the shape and characteristics of the voltage of the discrete charge period (for a voltage-controlled discrete charge period).
  • Figure 4A is a diagram of a voltage component 404 and a current component 406 of a discrete charge period 402 applied to a battery, with the voltage and current both measured. Similar to Figure 2, the discrete charge period 402 is generated through control of the voltage 404 of the signal 402 and may include a leading edge section 405, a body section 407, and a trailing section 409. In the example illustrated in Figure 4A, the voltage component 404 of the leading edge 405 may include a sharp edge reflective of a relatively high frequency harmonic.
  • the current at the battery cell may rise slower than the voltage and be delayed relative to the voltage.
  • the impedance at the battery cell 104 corresponds to a ratio of the voltage 404 and the current 406 components, it can be seen that a relatively high frequency leading edge harmonic of the discrete charge period 402 is associated with some impedance that effects the current component of the signal.
  • the voltage 408 may be controlled, in a body portion 407 of the discrete charge period 402, to be at a constant value.
  • the response in the current component 410 of the discrete charge period 402 may continue to rise through a portion of the body section 407 due to the impedance of the battery cell 104, which is illustrated in Figure 4A by the separation of the voltage signal 408 and the current signal 410 in the body portion.
  • the deviation between the voltage signal 408 and the current signal 410 in Figure 4A illustrates an approximation of the real component or magnitude of the impedance at the battery cell 104 and the delay in the current signal responding to the leading edge of the applied voltage 408 represents an imaginary component or phase shift of the impedance.
  • Plots of the voltage component 408 and the current component 410 may be scaled and overlaid to generate the signal diagrams of Figures 4A-4C.
  • the rate at which the current rises in the body section 407 may relate to the transition of the voltage signal 404 from the leading edge to the body section 407. Further, as mentioned above, the duration of the body portion 407 of additional or future discrete charge periods may be controlled such that the peak of the current 410 in the body section 407 occurs at the midpoint of the body section. Therefore, in some instances, a downward slope of the current component 410 of discrete charge period 402 during the body portion 407 may be monitored and/or measured and a trailing edge portion 409 of the discrete charge period may begin at a point when the current is projected to return to a similar current as at the beginning of the body portion.
  • the voltage 412 may be driven below the transition voltage for a period of time to drive the current 414 to zero amps at a faster rate as compared to a discrete charge period without such a shape.
  • the leading edge 425 of the discrete charge period 422 may be defined by a relatively lower frequency harmonic (a less sharp rate relative to the discrete charge period of Fig. 4A)) during the leading edge section 425.
  • the lower frequency harmonic leading voltage edge is associated with a lower impedance that is reflected by the current 426 portion of the discrete charge period 422 more closely following the curve of the voltage-controlled portion 424, both in amplitude and in time. Further, as the transition from the leading portion 425 to the body portion 427 is less severe, again relative to the discrete charge period of Fig.
  • the apex in the current portion 430 may be similarly less pronounced such that the current amplitude and/or shape more closely mirrors the voltage shape during the body portion.
  • a similar voltage dip 432 in the trailing portion 429 of the discrete charge period 422 as illustrated in the discrete charge period of Figure 4A may be present in the discrete charge period 422 of Figure 4B to drive the current 434 to zero amps in preparation for the transmission of another charging waveform.
  • the leading edge 445 of the voltage signal 444 may be defined by an even lower frequency harmonic as compared to those of Figs. 4A and 4B defining an even flatter rise.
  • the current 446 portion of the discrete charge period may even more closely mirror the curve of the voltage- controlled portion 444 in comparison to the discrete charge periods of Figures 4A and 4B.
  • the current 450 during the body portion 447 may have a small to no apex as previously mentioned, but may instead gradually decrease as the voltage 448 is maintained at a constant due to diffusive processes within the battery cell 104.
  • This discrete charge period 442 example may also include a voltage dip 452 in the trailing portion 449 of the discrete charge period 442 to drive the current 454 to zero amps.
  • Shaping the discrete charge period to charge a battery cell 104 may include a balancing of efficiency and delivery of maximum power per period.
  • the discrete charge period 402 of Figure 4A may provide a large amount of charge power as the voltage reaches the peak value rapidly such that the discrete charge period approaches a square-wave shape.
  • the sharp rise in the leading section 405 of the discrete charge period 402 followed by the sharp transition to the body portion 407 may introduce high harmonics in the signal. As discussed above with relation to Figure 1C, such high harmonics may cause a large impedance at the battery cell 104, resulting in large inefficiencies in the charging of the battery.
  • the discrete charge period 442 of Figure 4C may reduce or minimize the harmonics within the discrete charge period that provide a high impedance at the battery cell 104 due to the slower leading edge 445, the amount of mean power provided to the battery cell 104 (corresponding to the area under the discrete charge period) in this discrete charge period 442 is less than the discrete charge periods of Figures 4A and 4B.
  • the impedance may be reduced in comparison to the other charge signals, but less power is delivered to the battery cell 104 to charge the cell.
  • the discrete charge period 422 of Figure 4B provides a balance between the contrasting considerations of impedance and power delivery during charging of a battery cell.
  • a circuit controller 110 may monitor or measure the impedance at the battery cell 104 and adjust the shape, including any component thereof, of the discrete charge period in response.
  • the system may estimate one or more of the measurements described above.
  • Figure 5 illustrates a discrete charge period 501 , which may be a part of a charge signal for charging a battery cell 104.
  • the signal diagram 501 is similar to the discrete charge period 201 described above in relation to Figure 2, including the indication of points along the discrete charge period (both for the voltage component 502 of the discrete charge period 501 and the current component 503 of the discrete charge period).
  • the circuit controller 110 may determine a voltage at point 520, point 512, etc. and a current at point 522, point 524, etc. These measurements may be utilized to determine the impedance of the battery cell 104 at various times along the discrete charge period. However, rather than discrete measurements at one or more of these points, the system may instead estimate one or more of the measurements at the indicated points.
  • voltage Vi may be measured at the transition point 520 of the voltage component between the leading edge portion of the discrete charge period 501 and the body portion of the discrete charge period.
  • Current may similarly be measured at the transition point 522 for the current component of the discrete charge period.
  • the transition point 520 may be determined and the voltage measured accordingly based on the control of the voltage component - e.g., a measurement is made at the time when the voltage transitions from the leading edge to the constant body value. Since the current transition is not aligned with the voltage transition, the system cannot simply measure current at the same time it measures voltage at the transition point.
  • the circuit controller 110 may estimate one or more of the voltage, current, or time measurements discussed herein to improve the efficiency or accuracy of the impedance determinations at the battery cell 104.
  • the circuit controller 110 may obtain the rate of change of the voltage measurements of the voltage component 502 and the rate of change of the current measurements of the current component 503 during the leading edge portion of the charge signal.
  • the rate of change of the components may correlate to the slope of the corresponding charge signal components.
  • the point along the leading edge at which the slope or the rate of change is the maximum may be determined.
  • the maximum slope point 509 for the voltage component of the discrete charge period 501 may be obtained by measuring the voltage along the curve 502 to find the transition between an increasing rate of change and a decreasing rate of change. This inflection point 509 may be the maximum slope of the voltage curve 502.
  • the inflection point 507 for the current component 503 of the discrete charge period 501 may also be determined.
  • the system may estimate a time at which each respective component transitions from the leading edge portion to the body portion of the discrete charge period.
  • the leading edge of the discrete charge period is a sinusoidal shape, the inflection points 507 and 509 may be assumed to occur at the midpoint of the leading edge of the discrete charge period 501.
  • the circuit controller 110 may then estimate the transition point 522 or 520 from the leading edge to the body portion of the discrete charge period 501 as occurring at a point that is twice the duration from the initial point 518 to the midpoint 507 and 509 for the respective component of the discrete charge period.
  • the circuit controller 110 may obtain a voltage measurement at point 520 and a current measurement at point 522 based on this estimation.
  • the measurements of voltage and current at these estimated (or calculated) times may be used to determine ZR EDGE and/or ZIMG_EDGE, or any other impedance measurement discussed herein.
  • the circuit controller 110 may accept a certain amount of error in the voltage and/or current measurement in calculating the impedance at the battery cell 104. For example, for a voltage-controlled discrete charge period 504, the circuit controller 110 may determine point 520 as the point at which the controlled voltage signal transitions from the leading edge, sinusoidal signal to the constant voltage of the body portion. However, rather than estimating the corresponding transition point 522 for the current component 503 of the discrete charge period 501, the circuit controller 110 may obtain a current measurement at the time of transition point 520 or at some fixed time delay therefrom.
  • the voltage component of the discrete charge period 501 may not transition to the constant voltage of the body portion at the peak of the leading edge portion. Rather, as shown in Figure 6A, the voltage component 602 may be controlled to continue the sinusoidal shape until the current component 603 reaches the apex of the leading edge portion. More particularly, the leading edge portion of the discrete charge period 601 may include a single harmonic, sinusoidal shape, such that the current portion 603 following the voltage portion is a similar sinusoidal shape.
  • the time at which the apex of the current portion 603 of the discrete charge period 601 occurs may be accurately determined and the current at point 622 may be measured at the apex of the current portion of the leading edge.
  • the voltage portion 604 may be defined such that it transitions from an initial downward portion of the sinusoidal harmonic to a constant voltage for the body of the discrete charge period 601. Doing so, may cause a very low impedance at this point and may cause the body portion of the signal to be applied at a very low impedance.
  • the low impedance being exemplified by the little or no separation between the voltage and current components of the signals in the body portion of the discrete charge period.
  • the voltage portion 616 may be controlled to take on a Bessel Function shape of diminishing sinusoidal waves for the body portion of the discrete charge period 610. Controlling the voltage component 616 into a Bessel Function shape may reduce high harmonics that may be introduced in the transition from the sinusoidal leading edge to the constant voltage portion at point 620. However, the use of the Bessel Function signal shape may also reduce the power delivered to the battery cell 104. Through the use of the continued sinusoidal leading edge voltage signal 616, an accurate determination of the apex 620 of the current portion 614 of the leading edge may be obtained for a more accurate measurement of .
  • control circuit 110 may control the voltage portion of the discrete charge period 616 as a Bessel Function to occur at less than each of the discrete charge periods to the battery cell 104.
  • a Bessel Function discrete charge period 610 may occur once out of every 100 or 1000 discrete charge periods to obtain an accurate reading of h without reducing the power delivered at every discrete charge period.
  • the circuit controller 110 may calculate cumulative impedance for each portion or section of the discrete charge period 501. For example, the circuit controller 110 may obtain a voltage measurement and a current measurement for several points along the leading edge portion of the discrete charge period. Corresponding voltage measurements and current measurements may occur at the same time. Thus, although the current component 503 of the discrete charge period 501 is trailing the voltage component 502, the circuit controller 110 may obtain simultaneous voltage and current measurements to estimate a real impedance value or impedance magnitude value at the several points along the leading edge curve of the discrete charge period 501.
  • the impedance measurements at the various points along the leading edge may be summed to obtain a real impedance for the battery cell 104 during the entirety of the leading edge of the discrete charge period 501.
  • horizontally corresponding measurements of the two components 502, 503 may be obtained at various points along the leading edge of the discrete charge period 501.
  • the time between the occurrence of a particular voltage measurement and a corresponding current measurement may be obtained and an imaginary impedance value or impedance phase shift value for the battery cell 104 may be approximated from the measured values and time delay.
  • a series of such imaginary impedance measurements may be summed to obtain a cumulative imaginary impedance for the battery cell 104 during the leading edge portion.
  • Similar approaches may be performed for the body portion of the discrete charge period 501.
  • the summations of the impedances of the battery cell 104 for the portions of the discrete charge period 501 may then be utilized to adjust the shape of future waveforms, as explained above.
  • the circuit controller 110 may analyze other features of the leading edge of the discrete charge period 501 and adjust future discrete charge periods in response.
  • the circuit controller 110 may measure various points of the voltage component 502 and/or the current component 503 and compare the measurements to an example sine wave shape corresponding to the selected harmonic of the leading edge.
  • the leading edge portion of the discrete charge period 501 may include abnormalities from a true sine wave shape. These abnormalities may be detected by a comparison of the generated discrete charge period 501 to the example sine wave and adjustment to a future discrete charge period may be made by the circuit controller 110 to better approximate the example sine wave signal. Such adjustments may be made to the voltage component 502 and/or the current component 503 of the discrete charge period 501 to better approximate the example sine curve.
  • hundreds or thousands of measurements of the voltage and current portion of the charge signal may be obtained and analyzed via a digital processing system to shape the discrete charge period of the battery cell 104.
  • points of the discrete charge period may be analyzed via domain transformation between time and frequency.
  • the edges and body of the discrete charge period may not be defined as described above based on the measured impedance values. Instead, the discrete charge period may be controlled to take on a more arbitrary shape. Further, the rest period between discrete charge periods may be subject to the same analysis and distinctions between edge, body and rest periods may further erode.
  • voltage and current discrete charge periods may be measured in the time domain.
  • FFT Fast Fourier transform
  • many other types of transformations may be used to convert the measured time domain data to corresponding data in the frequency domain.
  • the selection of the type of transformation used may depend upon the format of the data, the type of noise and signal to noise ratio in the data, or the processor type of the circuit controller 110. One or more of these factors may allow some transforms to process faster or better than FFT.
  • each harmonic obtained from the transform of the discrete charge period may be independently analyzed, comparing voltage and current, to determine the independent contribution of each to impedance, power, peak voltage and current at the battery cell 104.
  • harmonics with relatively high impedance qualities at the battery cell 104 can be reduced in magnitude and others may be increased to produce a more ideal collection of harmonics of the discrete charge period 201.
  • the modified transforms may then be inversely transformed back into the time domain, yielding a new discrete charge period with a lower overall impedance that may be applied as an improved discrete charge period.
  • gating may be performed on the transformed discrete charge period to independently analyze individual sections of the discrete charge period, with each inversely transformed section rejoined to produce an improved form of the complete discrete charge period.
  • the process of gating the transformed discrete charge period may include transforming only a portion of the time domain data to the frequency domain for independent analysis.
  • the discrete charge period may be divided into fifths and each fifth independently evaluated along with or in lieu of whole wave analysis. This is especially useful when sections of the wave are heavily multi-modal in magnitude or harmonic content, such as body vs rest period.
  • the gating process may provide a more accurate estimation of an imaginary and real component of impedance, and may be useful in analyzing/reducing oscillations that can occur in the discrete charge period due to the impedance of the battery cell 104.
  • Gating may also provide a foundation for a mechanism of adjusting the total period of the discrete charge period. For example, a single gated section of the discrete charge period may include a portion of the rest period and adjustments to the harmonics of the section may reduce or extend the effective period.
  • a total impedance of the leading edge portion of the multiple discrete charge periods with elapsed time At may be determined by:
  • a total impedance of the body portion of the multiple discrete charge periods with elapsed time At may be determined by:
  • a maximum impedance for the body portion 203 of one or more discrete charge periods may be determined by: for measured values (i) between the start of the body portion to the end of the body portion.
  • a delta mean of the impedance for the body portion 203 of one or more discrete charge periods may be determined by:
  • a delta minimum of the impedance for the body portion 203 of one or more discrete charge periods may be determined by: for measured values (i) between the start of the body portion to the end of the body portion.
  • impedance measurements may be approximated from one or more centroid calculations. More particularly, the different portions of the discrete charge period, such as discrete charge period 201 of Figure 2, may include a centroid or arithmetic mean position of all of the points in the corresponding portion. This may aid in reducing noise in the impedance calculations discussed above. In one example, a centroid for the leading edge portion of the discrete charge period 201 and a centroid for the body portion of the discrete charge period may be calculated.
  • centroid points may be utilized by the circuit controller 110 as the impedance measurements for those portions of the discrete charge period and may be minimized to improve the efficiency of the applied discrete charge period to the battery cell 104.
  • the centroid of the voltage component 202 of the leading edge portion of the discrete charge period 201 may be calculated from: with ti corresponding to point 222 and to corresponding to point 218 and the maximum and minimum values corresponding to the maximum and minimum measured values within the leading edge portion.
  • the centroid of the current component 207 of the leading edge may be calculated from:
  • centroid of the voltage component of the body portion 203 of the discrete charge period 201 may be calculated from: with to corresponding to point 222 and ti corresponding to point 212 and the maximum and minimum values corresponding to the maximum and minimum measured values within the leading edge portion.
  • the centroid of the current component 204 of the body portion may be calculated from: [0076] From the centroid points calculated, real and imaginary impedance values for the leading edge portion may be calculated from:
  • R EDGE — a D I EDGE EDGE - r A_EDGE and centroid impedance modulus for the leading edge may be calculated from:
  • Real and imaginary impedance values for the body portion may be calculated from: and centroid impedance modulus for the body portion may be calculated from:
  • centroid calculations for the leading edge may not generally be utilized by the circuit controller 110 to determine the harmonic of the leading edge as such centroid calculations are arithmetic mean positions of all of the points in the corresponding portion. Rather, in some implementations, the centroid equations discussed above for the leading edge may be utilized by the circuit controller 110 to verify an estimate of the impedance at the leading edge, particularly for discrete charge periods that may include noise within the signal. Utilizing the centroid calculations to verify other estimations of the leading edge portion of the discrete charge period may improve the accuracy of such estimations used to shape additional discrete charge periods.
  • the estimated impedances obtained via one or more of the methods described herein and the estimated impedances based on the centroid calculations may be provided with a particular weighted value.
  • the weighted values assigned to the various methods for obtaining the impedance estimates may be based, in some instances, on an amount of noise in the discrete charge period.
  • centroid equations utilize a continuous integral function to determine the centroid of the waveform portions.
  • a centroid of a polygon approximating the shape of the portions of the charge waveform 201 may be calculated. It is noted that other methods for calculating a centroid depending upon an orientation of the polygon or ‘shape’ relative to a preferred axis may also be utilized. Rather, the equations provided below are simply an example of one collection of centroid calculations that may be performed. For example, the equation above to determine the centroid of the voltage component 202 of the leading edge portion of the discrete charge period 201 may be calculated as follows: where
  • the equation to determine the centroid of the time of the voltage component 202 of the leading edge portion of the discrete charge period may be calculated as follows:
  • centroid of the current component 207 of the leading edge may be calculated from:
  • the equation to determine the centroid of the time of the current component of the leading edge portion 211 of the discrete charge period 202 may be calculated as follows:
  • centroid of the voltage component of the body portion 203 of the discrete charge period 201 may be calculated from: where The equation to determine the centroid of the time of the voltage component 202 of the body portion of the discrete charge period may be calculated as follows:
  • centroid of the current component 207 of the body portion 203 of the discrete charge period 201 may be calculated from:
  • the equation to determine the centroid of the time of the current component of the leading edge portion 211 of the discrete charge period 202 may be calculated as follows:
  • real and/or imaginary impedance values for the body portion may be calculated from the centroid points calculated, such as: for a resistance calculation of the body portion and: for a time ratio edge centroid of the leading edge.
  • the circuit controller 110 for the charging circuit 100 may include a processing device for which fast and multi-variable calculations may not be available.
  • measurements taken over multiple periods of time may be obtained by the circuit controller 110 and combined by the circuit controller to measure or estimate a characteristic or parameters of the battery cell 104 of the charging circuit.
  • Figs. 7-8B One example of obtaining measurements of aspects of the battery cell 104 and combining such measurements is illustrated in Figs. 7-8B. More particularly, Fig. 7 is a schematic diagram illustrating a circuit for charging a battery based on a measured impedance value in accordance with one embodiment, Fig.
  • Fig. 8A is a signal diagram of measured currents into a battery cell in blocks of time
  • Fig. 8B is a signal diagram of measured voltages across a battery cell in blocks of time.
  • the charge circuit may obtain current and voltage measurements at the battery 104 at different blocks of time and combine aspects of the measurements to estimate characteristics of the battery cell 104, such as an estimated power at the battery or one or more impedance parameters of the battery. This method for processing the measurements may reduce the processing burden on a circuit controller 110 at any one time while still obtaining the impedance parameters for use in shaping a charge waveform for the battery.
  • Fig. 7 is a schematic diagram illustrating a circuit 700 for charging a battery 704 based on measurements of the battery obtained over a period of time.
  • the circuit 700 may include elements described above with reference to the charging circuit 100 of Fig. 1A, including power supply 702, circuit controller 706, and battery 704.
  • the circuit controller 706 may provide one or more control signals 730, 732 to elements of the circuit, e.g., circuit 724, to shape a current or voltage signal from the power supply 702 to charge the battery cell 704. While discussed in the context of charge, aspects of the system and method discussed may also apply to discharge control.
  • the circuit controller 706 may be implemented through a Field Programmable Gate Array (FPGA) device, a microcontroller, an Application- Specific Integrated Circuit (ASIC), or any other programmable processing device, with the particularly identified devices providing possibly more cost-effective performance in some applications where additional processing capabilities are limited or unnecessary and cost margins are important.
  • FPGA Field Programmable Gate Array
  • ASIC Application- Specific Integrated Circuit
  • the circuit controller 706 may include a charge signal shaping generator 710 functional block of the controller, the generator to determine the shape of the charge signal to be applied to the battery cell 704.
  • the charge signal shaping generator 710 of the circuit controller 706 may, in some instances, receive measurements of characteristics of the battery cell from a battery cell current measurement circuit 708 and/or a battery cell voltage measurement circuit 726 for use in determining impedance, which is in turn used to determine the shape of the charge signal.
  • the circuit controller 706 may include components utilized to receive and store the measurements of the battery cell characteristics for combination and calculation of an impedance parameter associated with the battery 704.
  • the circuit controller 706 may utilize the stored measurements of the battery characteristics to calculate or estimate a power level of the battery 704, among other parameters of the battery.
  • the circuit 700 may include one or more components to shape a charge signal for charging a battery 704.
  • the circuit 700 may include a first switching element, e.g., transistor 712, and a second switching element, e.g., transistor 714, connected in series to an output 734 of the power supply 702.
  • the first transistor 712 may receive an input signal, such as pulse-width modulation (PWM) control signal 730, from the signal shaping generator 710 to operate the first transistor 712 as a switching device or component.
  • PWM pulse-width modulation
  • the first transistor 712 may be any type transistor, e.g., a FET, or any type of controllable switching element for controllably connecting a first inductor 716 to the output 734 of the power supply 702.
  • the first transistor 712 may be a FET with a drain node connected to the first inductor 716, a source connected to the power supply 702, and a gate receiving the control signal 730 from the circuit controller.
  • the control signal 730 may be provided by the circuit controller 706 to control the operation of the first transistor 712 as a switch that, when closed, connects the first inductor 716 to the power supply 702 such that the charge signal from the power supply flows through the first inductor 716.
  • the second transistor 714 may receive a second input signal 732 and may also be connected to the drain of the first transistor 712 at node 736.
  • the second input signal 732 may be a PWM signal opposite of the first control signal 730 to the first transistor 712.
  • the first transistor 712 is closed to connect the first inductor 716 to the power supply 702
  • the second transistor 714 is open.
  • the first transistor 712 is open, conversely, the second transistor 714 is closed, connecting node 726 and the first inductor 716 to ground.
  • a sequence of charge signals is provided at node 736, which when applied to the inductor 716, and other components of circuit 724 depending on any given implementation, may shape various aspects of any charge signal applied to the battery 704.
  • a leading edge of the charge signal is defined to approximate a portion of a sinusoid at a frequency based on the impedance discussed herein.
  • the first control signal 730 and the second control signal 732 are described herein as opposing signals to control the transistors into opposing states, other techniques for controlling the switching elements 712, 714 may also be implemented with the circuit 700.
  • the inductor value, the capacitor value, the time and frequency of actuating the transistors, and other factors can be tailored to generate a waveform and particularly a waveform with controlled harmonics to the battery for charging the same.
  • the circuit 700 may include a first capacitor 722 connected between the output of the power supply 734 and ground.
  • a second capacitor 720 may be connected between the first inductor 716 (at node 738) and ground.
  • a second inductor 718 may be connected between node 738 and an anode of the battery cell 704.
  • the filter 724 of the circuit 700 may operate, in general, to define the shape of the charge signal and/or prevent rapid changes to the charge signal applied to the battery cell 704.
  • first inductor 716 and second inductor 718 may prevent a rapid increase in current transmitted to the battery cell 704. Such rapid increase in current may damage the battery cell 704 or otherwise be detrimental to the life of the battery cell.
  • the inductor may shape the waveform applied to the battery, and control of the signal applied to the inductor may provide for controlled shaping of the waveform.
  • capacitor 720 may store energy from the power supply 702 while first transistor 712 is closed. Upon opening of the first transistor 712, the capacitor 720 may provide current to the battery cell 704 through second inductor 718 to resist an immediate drop of current to the battery and may similarly be used to controllably shape the waveform applied to the battery.
  • charge circuit 700 may be included in charge circuit 700.
  • one or more of the components of the filter circuit 724 may be removed or altered as desired to filer the charge signal to the battery cell 704.
  • Many other types of components and/or configurations of components may also be included or associated with the charge circuit 700.
  • the circuit 700 of Fig. 7 is but one example of a battery cell charging circuit 700 and the techniques described herein for analyzing impedance for generating or otherwise determining control signals 730, 732 for shaping a charge signal.
  • the signal shaping generator 710 of the circuit controller 706 may control the shape of the charge signal based on feedback measurements of the battery 704.
  • circuit 700 may include a current measurement circuit 708 to measure the current into the battery cell (such as measured using a small resistor 728 in series with the application of the charge current to the battery) and a voltage measurement circuit 726 measuring the voltage across terminals of the battery 704. These measurements may be provided to the signal shaping generator 710 which may, in turn, control, via control signals 730, 732, the first transistor 712 and the second transistor 714 to adjust the shape of the charge signal to the battery 704. In other words, the signal shaping generator 710 may sculpt or otherwise define a shape of a charge signal transmitted to the battery cell 704 based on the measurements received from current measurement circuit 708 and/or voltage measurement circuit 726, as explained in more detail below.
  • the signal shaping generator 710 may process measurements obtained by the current measurement circuit 708 at a different time than measurements obtained by the voltage measurement circuit 726 to calculate or estimate an impedance parameter of the battery 704.
  • the circuit controller 706 may include additional measurement processing components, such as multiplexer device A 740, analog to digital converter 742, multiplexer device B 744, and one or more memory components (such as memory component A 746 and memory component B 748). More or fewer components may also be included with the circuit controller 706 and some components maybe combined into a single component, such as memory devices 746, 748 may be a single memory device or may be memory locations within a separate memory structure. The operations of the various components of the circuit controller 706 is discussed in more detail below.
  • the circuit controller 706 may control one or more components of the circuit 700 to utilize measurements of battery characteristics taken at different times to determine or estimate one or more impedance parameters of the battery 704 in response to a charge signal applied to the battery cell.
  • Fig. 8A illustrates a current component 800 of a series of charge energy packets defining a charge waveform provided to the battery 704, which may be based on control of the charge circuit 700 components by the circuit controller 710.
  • the current component 800 is shown on a graph with current values along the y-axis 802 and time along the x-axis 824.
  • the charge waveform includes a current component 800 that repeats over multiple blocks of time.
  • the signal diagram illustrates the current component 800 of the charge waveform over four blocks of periods of time, namely period block A 804, period block B 806, period block C 808, and period block D 810.
  • the period duration PA-PD for each of the time blocks may be same duration or take the same amount of time.
  • the circuit controller 706 may be programmed or otherwise configured to generate a repeating charge waveform, with each period of the repeating charge waveform occurring during one of the period durations. For example and as shown in Fig.
  • the circuit controller 706 may control other components of the charge circuit 700 to generate a first charge signal 812, followed by a second charge signal 814, followed by a third charge signal 816 during block A 804 of the charge waveform.
  • Each of the charge signals 812-816 may have a different duration than the other charge signals within the same block 804.
  • charge signal 812 may have a first duration
  • charge signal 814 may have a second duration different than the first duration
  • charge signal 816 may have yet a third duration.
  • the various example charge waveforms may vary depending on impedance among other things.
  • the same or similar charge waveform pattern may occur for each time block 804-810 of the charge waveform.
  • the same charge signals 812-816 may be repeated during time block B 806, time block C 808, and time block D 810.
  • the charge waveform may repeat any number of times during a charging process of the battery cell 704. In any given time block, there may be more or fewer charge signals, and the time duration of any block or charge waveform may vary.
  • the shape and number of charge waveforms may also vary from block to block.
  • each charge signal may correspond to a charge signal in the previous or multiple previous time blocks.
  • charge signal 818 of time block C 808 may be similar or the same as charge signal 812 of time block A 804, charge signal 820 of time block C may be similar or the same as charge signal 814 of time block A, and charge signal 822 of time block C may be similar or the same as charge signal 816 of time block A.
  • each of the signals within a block of time 804-810 is the same or similar to a previous block such that the charge waveform comprises a repeating pattern of charge signals.
  • the signals are shown with shaped leading edges, which are illustrative of harmonically tuned shaped signal blocks.
  • any given block may include specific harmonic components, and the leading edges of each may also be shaped.
  • a square or otherwise sharp edge pulse may be used with fairly low energy content and for a brief duration for the purpose of assessing impedance to present harmonics.
  • the signal diagram of Fig. 8A illustrates the charge component 800 of the charge signal applied to charge the battery cell 704.
  • Fig. 8B illustrates a signal diagram of measured voltages 850 across a battery cell in blocks of time for determining impedance values at the battery cell in accordance with one embodiment. Similar to the current component 800 discussed above, the voltage component 850 is illustrated on a graph with voltage values along the y-axis 852 and time along the x-axis 868.
  • the voltage component 850 of the charge waveform repeats over the same multiple blocks of time, namely period block A 854, period block B 856, period block C 858, and period block D 860.
  • the voltage component 850 of the charge waveform includes generally the same shape as the current component 800 such that the voltage component is a repeating signal for each time block 854-860. As such, a different shape of the charge waveform would be reflected in both the current component 800 and the voltage component 850.
  • Fig. 8A illustrates a measured current into the battery cell 704 as obtained from the current measurement circuit 708 in response to the charge waveform.
  • the current measurement circuit 708 may obtain the current measurement of h.
  • the current measurement circuit may obtain the current measurement of and, during charge signal 816, the current measurement circuit may obtain the current measurement of I3.
  • the current measurement circuit 708 may obtain the current measurement of U, the current measurement of I5 during charge signal 820, and the current measurement of ⁇ & during charge signal 822.
  • Current measurements may also be made during the charge signals of time block B 806 and time block D 810 by the current measurement circuit 706, although not illustrated in the signal diagram of Fig. 8A.
  • Fig. 8B illustrates a measured voltage across the battery cell 704 as obtained from the voltage measurement circuit 726 in response to the charge waveform.
  • the voltage measurement circuit 726 may obtain the voltage measurement of Vi
  • the current measurement circuit may obtain the voltage measurement of V2
  • the voltage measurement of V3 during charge signal 866.
  • Voltage measurements may also be made during the charge signals of time block A 854, time block C 858, and time block D 860 by the voltage measurement circuit 726, although not illustrated in the signal diagram of Fig. 8B.
  • the signal diagrams illustrated in Figs. 8A and 8B are one example of current and voltage measurements that may be obtained through circuit 700, although other examples may be implemented or performed by the circuit.
  • the circuit 700 may be configured to obtain voltage measurements during block A of the charge waveform and current measurements during block B.
  • the circuit 700 may be configured to obtain both voltage and current values in any block of the charge waveform.
  • the obtained measurements are not required to alternate between subsequent blocks. For example, voltage measurements may be obtained for a series of consecutive blocks (such as block A and block B) and current measurements may be obtained for one or more subsequent blocks (such as block C and block D). Further still, the measurements may be obtained in any order.
  • a voltage measurement may be obtained in time block A, followed by a current measurement in time block B and time block C, with another voltage measurement obtained in time block D.
  • any battery cell characteristic may be measured in any time block of the charge waveform and stored in a memory device 746, 748. Such measurements may be obtained in any order or sequence to provide processing flexibility to the circuit controller 706 in determining or estimating an operational parameter of the battery cell 704.
  • any battery cell characteristic may be measured and stored by the circuit controller 706 for use in determining a charge waveform shape.
  • other measurement circuits or devices such as a power measuring device, impedance measuring device, etc.
  • the additional battery characteristic measurements may be obtained over any number of time blocks as described herein, including alternating time blocks or in consecutive time blocks.
  • determination or estimation of the battery cell characteristic may include any number of the obtained measurements used to generate any number of battery cell characteristics that may be used to shape a charge waveform.
  • the current measurement circuit 708 and the voltage measurement circuit 726 may provide the obtained measurements to the circuit controller 706 for use in calculating or estimating an impedance or other operating characteristic of the battery cell 704.
  • some circuit controllers 706 may lack the processing power to perform the calculations at the speed at which the measurements are being provided.
  • relatively more sophisticated and expensive processors may not be specified, and hence it becomes necessary to process measurements without such processors.
  • Such circuit controllers 706 may be configured to execute one or more of the operations of the method 900 illustrated in Fig. 9. In particular, Fig.
  • FIG. 9 is a flowchart illustrating a method for 900 determining an operating characteristic of a battery cell based on measurements of the battery cell taken at different time periods in accordance with one embodiment.
  • One or more of the operations may be performed or executed by the circuit controller 706 of charging circuit 700, although other components of the charging circuit or in addition to the charging circuit may also perform one or more of the operations of the method 900.
  • Such operations may be executed through a software program, one or more hardware components, or a combination of software and hardware components.
  • the circuit controller 706 may be configured to receive a measurement of first battery cell characteristic during a first period of the charge waveform.
  • the current measurement circuit 708 may obtain current measurement h during charge signal 812 of time block A 804 and provide the current measurement to the circuit controller 706.
  • the controller in one possible arrangement, may poll or otherwise actively obtain the measurement from the current measurement circuit.
  • the controller 706 may access the current measurement I and it may be provided or transmitted to multiplexer device A 740 of circuit controller 706. Multiplexer device A 740 may be controlled by circuit controller 706 to receive the current measurement h and provide passthrough of the measurement to analog- to-digital converter (ADC) 742.
  • ADC analog- to-digital converter
  • Control of multiplexer device A 740 to allow passthrough of the current measurement may prevent transmission of a value from voltage measurement circuit 726 to the ADC 742.
  • the ADC 742 may convert the analog current measurement into a digital value.
  • the circuit controller 706 may control multiplexer device B 744 to allow passthrough of the output of the ADC 742 to be stored in memory A 746.
  • Memory A 746 may be any type of memory device and may, in some instances, operate as a first-in, first-out stack of measurement values.
  • the circuit controller 706 may receive and store one or more such current measurements during a time block, such as block A 804. For example, current measurement during charge signal 814 and current measurement I3 during charge signal 816 may also be provided and stored by the circuit controller 706 in memory A 746.
  • the circuit controller 706 may be configured to receive a measurement of a second battery cell characteristic during a second, later period of the charge waveform.
  • the voltage measurement circuit 726 may obtain voltage measurement Vi during charge signal 862 of time block B 856 and provide the voltage measurement to the circuit controller 706.
  • the voltage measurement Vi may be provided along the same path as the current measurement, namely through multiplexer device A 740, ADC 742, and multiplexer device B 744 of circuit controller 706.
  • the circuit controller 706 may provide one or more control signals to multiplexer device A 740, ADC 742, and multiplexer device B 744 to control the flow of the voltage measurement to memory device B 748 and, in some instances, prevent transmission of a value from current measurement circuit 708 to the ADC 742 during time block B 856.
  • Memory B 748 may also be any type of memory device and may, in some instances, operate as a first-in, first- out stack of measurement values. The voltage measurement values may therefore be received during time block B 856, occurring after time block A 804 in which the current measurements were received and stored.
  • the circuit controller 706 may also receive and store multiple voltage measurements during the time block, such as voltage measurement V2 during charge signal 862 and voltage measurement V3 during charge signal 866.
  • controller through control of the multiplexor 740, the controller alternates between current and voltage measurements.
  • the alternating current and voltage measurements are fed through the ADC 742, and control of the second multiplexor 744 alternates storing the digital values of the current and voltage measurements in memory A (746) and memory B (748).
  • analog to digital conversion may occur at the measurement circuits, in which case the ADC 742 may not be used.
  • the digital measurements, through control of a single multiplexor may be alternately stored in the memory A and memory B. In such a case, it may be that only a single multiplexor is present in or as an input to the controller 706.
  • the measurement values are aligned in the memory for further processing to determine impedance or other values.
  • the system may first sample one or more current measurements from Block A and store the one or more values in memory A.
  • the memories are described herein as distinct memory devices, but it should be recognized that the first memory and the second memory may be partitions of the same memory device.
  • the system may then sample one or more voltage measurements from Block B, and store the one or more values in memory B.
  • the Block A current measurement or measurements are stored in sequential memory locations.
  • the Block B voltage measurement or measurements are stored in sequential memory locations.
  • the memories A and B may be of the same size and type, and hence the current and voltage measurements are aligned in memory.
  • the controller accesses the memory A and memory B to perform a computation using the respective measurements
  • the respective measurements are automatically aligned by way of the access coordination, memory storage and arrangement. So, if three measurements are processed from each of Block A for current and then Block B for voltage, the first current value 11 is stored in a memory location of memory A, and the first voltage value V1 is stored in the same memory location of Memory B, and so on with respect to subsequent current and voltage measurements.
  • the system only need access the same memory location in each of memory A and B, and the correct comparative values will be automatically in the same memory locations by way of how the values are loaded in the respective memories.
  • Fig. 10 illustrates an example of interlacing voltage and current sampling, where the alternating voltage and current measurements may be alternately stored in the respective memories.
  • one memory will have a sequence of voltage measurements and other memory will have a sequence of current measurements.
  • a charge signal 1000 similar in shape to those described above with regard to Fig. 2 and otherwise, the system alternates between measurement and storage of discrete measurements of voltage and current.
  • a block would comprise only a single measurement of current or voltage at a discrete point in time.
  • current measurements ISn are interlaced with voltage measurements VSn.
  • the first sampling window covers a window time between when the harmonically tuned or otherwise shaped leading edge 209 (1009) transitions to the body portion 203 (1003).
  • the system compares voltage to current as discussed with regard to Figs. 2 - 6.
  • the system may also compute impedance using an average of the voltage measurements during a time window as compared to an average of the current measurements during the same time window, with the averaging computations shown in Fig. 10.
  • the system may compute impedance using a maximum voltage value compared to a maximum current value of the measured voltage and current values during a time window, with the maximizing formulas also shown in Fig. 10.
  • a second sample time window 1004 may be defined when the charge signal transitions to zero and/or a third sample time window 1006 may be defined during a rest period 1005 between charge signals.
  • the third sample time window may be defined during a time immediately preceding a charge signal when the current to the battery has settled to zero, whether in response to a negative voltage blip (e.g., below the terminal voltage) or otherwise after the charge current at the end of a voltage signal transitions to zero amps.
  • the circuit controller 706 may obtain a measurement of the first battery cell characteristic from memory A 746 and a measurement of the second battery cell characteristic from memory B 748.
  • the respective measurement in each memory queue are present at the memory locations that the controller accesses to perform the computation.
  • the circuit controller may therefore obtain current measurement h from memory A 746 and voltage measurement Vi from memory B 748.
  • the current measurement 11 and voltage measurement V2 become available at the same respective memory locations in the respective memories A and B.
  • any battery cell characteristic may be obtained and stored at any time by the circuit controller 706. Further, the circuit controller 706 may, in some instances, average one or more of the received battery cell characteristic measurements prior to or after storage. For example, the circuit controller 706 may average current values h, , and I 3 received during time block A 804 to determine an average current during the time block. Averaging may occur prior to loading the individual values in memory or after accessing values. In another example, circuit controller 706 may average measurement values from different time blocks, such as voltage value Vi from time block B 856 and voltage V4 from time block D 860. In general, the circuit controller 706 may average any number of measurement values from any number of time blocks either upon retrieving the values from the memory devices 746, 748 or prior to storage in the memory devices.
  • the circuit controller 706 may determine an estimated battery cell characteristic or value from the measurement values obtained from the memory 746, 748. For example, the circuit controller 706 may utilize the stored current values and voltage values to estimate an impedance parameter of the battery cell 704. In some instances, the obtained measurement values may be provided to the signal shaping generator 710 for use in generating control signals of the charging circuit 700. In other instances, the circuit controller 706 may calculate the estimated characteristic of the battery cell 704 from the stored measurement values and control the signal shaping generator 710 in response to the estimated characteristic. Regardless, the circuit controller 706 may shape a charge signal for the battery cell 704 through control of one or more components of the charge circuit 700 based on the estimated battery cell characteristic value determined from the stored measurement values. Further, the measurements may be measured during different blocks of a repeating charge signal to allow the circuit controller 706 to process the measurements at a speed for which the circuit controller is capable.
  • the charge waveform may comprise a repeating series of charge signals that may be of any shape and duration during which a current measurement and/or a voltage measurement may be obtained at the battery cell 704.
  • the current measurement circuit 708 may average a measured current over the entirety or a portion of a time block and/or the voltage measurement circuit 726 may average a measured voltage over the entirety of a portion of the time block.
  • Fig. 11 is a block diagram illustrating an example of a computing device or computer system 1100 which may be used in implementing the embodiments of the network disclosed above.
  • the computing device of Fig. 11 is one embodiment of a controller that performs one of more of the operations described above.
  • the computer system includes one or more processors 1102-1106.
  • Processors 1102-1106 may include one or more internal levels of cache (not shown) and a bus controller or bus interface unit to direct interaction with the processor bus 1112.
  • Processor bus 1112 also known as the host bus or the front side bus, may be used to couple the processors 1102-1106 with the system interface 1114.
  • System interface 1114 may be connected to the processor bus 1112 to interface other components of the system 1100 with the processor bus 1112.
  • system interface 1114 may include a memory controller 1118 for interfacing a main memory 1116 with the processor bus 1112.
  • the main memory 1116 typically includes one or more memory cards and a control circuit (not shown).
  • System interface 1114 may also include an input/output (I/O) interface 1120 to interface one or more I/O bridges or I/O devices with the processor bus 1112.
  • I/O controllers and/or I/O devices may be connected with the I/O bus 1126, such as I/O controller 1128 and I/O device 1130, as illustrated.
  • I/O device 1130 may also include an input device (not shown), such as an alphanumeric input device, including alphanumeric and other keys for communicating information and/or command selections to the processors 1102-1106.
  • an input device such as an alphanumeric input device, including alphanumeric and other keys for communicating information and/or command selections to the processors 1102-1106.
  • cursor control such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to the processors 1102-1106 and for controlling cursor movement on the display device.
  • System 1100 may include a dynamic storage device, referred to as main memory 1116, or a random access memory (RAM) or other computer-readable devices coupled to the processor bus 1112 for storing information and instructions to be executed by the processors 1102-1106.
  • Main memory 1116 also may be used for storing temporary variables or other intermediate information during execution of instructions by the processors 1102-1106.
  • System 1100 may include a read only memory (ROM) and/or other static storage device coupled to the processor bus 1112 for storing static information and instructions for the processors 1102-1106.
  • ROM read only memory
  • FIG. 11 is but one possible example of a computer system that may employ or be configured in accordance with aspects of the present disclosure.
  • the above techniques may be performed by computer system 1100 in response to processor 1104 executing one or more sequences of one or more instructions contained in main memory 1116. These instructions may be read into main memory 1116 from another machine-readable medium, such as a storage device. Execution of the sequences of instructions contained in main memory 1116 may cause processors 1102-1106 to perform the process steps described herein. In alternative embodiments, circuitry may be used in place of or in combination with the software instructions. Thus, embodiments of the present disclosure may include both hardware and software components.
  • a machine readable medium includes any mechanism for storing or transmitting information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). Such media may take the form of, but is not limited to, non-volatile media and volatile media. Non-volatile media includes optical or magnetic disks. Volatile media includes dynamic memory, such as main memory 816.
  • Machine-readable medium may include, but is not limited to, magnetic storage medium (e.g., floppy diskette); optical storage medium (e.g., CD-ROM); magneto-optical storage medium; read only memory (ROM); random access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory; or other types of medium suitable for storing electronic instructions.
  • magnetic storage medium e.g., floppy diskette
  • optical storage medium e.g., CD-ROM
  • magneto-optical storage medium e.g., magneto-optical storage medium
  • ROM read only memory
  • RAM random access memory
  • EPROM and EEPROM erasable programmable memory
  • flash memory or other types of medium suitable for storing electronic instructions.
  • Embodiments of the present disclosure include various steps, which are described in this specification. The steps may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special- purpose processor programmed with the instructions to perform the steps. Alternatively, the steps may be performed by a combination of hardware, software and/or firmware.
  • references to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure.
  • the appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments.
  • various features are described which may be exhibited by some embodiments and not by others.

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  • Engineering & Computer Science (AREA)
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Abstract

Des aspects de la présente divulgation concernent le système de charge (ou de décharge) d'un dispositif électrochimique, le système pouvant comprendre une unité de traitement, telle qu'un dispositif de commande, couplée de manière fonctionnelle à une première mémoire et à une seconde mémoire. La première mémoire comprend une première mesure du dispositif électrochimique et la seconde mémoire comprend une seconde mesure du dispositif électrochimique. Des mesures du dispositif électrochimique, par exemple des mesures de tension et de courant d'une batterie, peuvent être échantillonnées de manière entrelacée et stockées en alternance dans les mémoires respectives. L'unité de traitement calcule l'impédance du signal de charge à partir de la première mesure et de la seconde mesure.
PCT/US2022/035996 2021-07-01 2022-07-01 Systèmes et procédés de mesure d'impédance d'un élément de batterie WO2023278861A1 (fr)

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KR1020247003641A KR20240027801A (ko) 2021-07-01 2022-07-01 배터리 전지의 임피던스 측정을 위한 시스템 및 방법
CN202280050710.8A CN117693882A (zh) 2021-07-01 2022-07-01 用于电池单元的阻抗测量的系统和方法
AU2022301001A AU2022301001A1 (en) 2021-07-01 2022-07-01 Systems and methods for impedance measurement of a battery cell
EP22748164.5A EP4364264A1 (fr) 2021-07-01 2022-07-01 Systèmes et procédés de mesure d'impédance d'un élément de batterie
CA3223271A CA3223271A1 (fr) 2021-07-01 2022-07-01 Systemes et procedes de mesure d'impedance d'un element de batterie

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Citations (3)

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CN117693882A (zh) 2024-03-12
CA3223271A1 (fr) 2023-10-05

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