WO2023274125A1 - 一种指令处理方法及其相关设备 - Google Patents

一种指令处理方法及其相关设备 Download PDF

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Publication number
WO2023274125A1
WO2023274125A1 PCT/CN2022/101450 CN2022101450W WO2023274125A1 WO 2023274125 A1 WO2023274125 A1 WO 2023274125A1 CN 2022101450 W CN2022101450 W CN 2022101450W WO 2023274125 A1 WO2023274125 A1 WO 2023274125A1
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WIPO (PCT)
Prior art keywords
storage area
drawing instruction
starting position
size
index value
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PCT/CN2022/101450
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English (en)
French (fr)
Inventor
姜泽成
张文浩
罗备
邓一鑫
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP22831939.8A priority Critical patent/EP4343674A1/en
Publication of WO2023274125A1 publication Critical patent/WO2023274125A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/048—Interaction techniques based on graphical user interfaces [GUI]
    • G06F3/0481—Interaction techniques based on graphical user interfaces [GUI] based on specific properties of the displayed interaction object or a metaphor-based environment, e.g. interaction with desktop elements like windows or icons, or assisted by a cursor's changing behaviour or appearance
    • G06F3/04817—Interaction techniques based on graphical user interfaces [GUI] based on specific properties of the displayed interaction object or a metaphor-based environment, e.g. interaction with desktop elements like windows or icons, or assisted by a cursor's changing behaviour or appearance using icons
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/048—Interaction techniques based on graphical user interfaces [GUI]
    • G06F3/0487—Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser
    • G06F3/0488—Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management

Definitions

  • the present application relates to the technical field of image processing, and in particular to an instruction processing method and related equipment.
  • terminal devices With the rapid development of technology, users can implement various entertainment activities through terminal devices, such as listening to music, watching videos, playing games, and so on. In order to meet different needs of users, various types of applications are usually installed on the terminal device.
  • the central processing unit (central processing unit, CPU) of the terminal device usually needs to receive a large number of drawing instructions (draw call, DC) from the application, and These drawing instructions are sent to a graphics processing unit (graphics processing unit, GPU), so that the GPU obtains rendering data corresponding to these drawing instructions, and then renders a picture of the application based on the rendering data for viewing and use by the user.
  • drawing instructions draw call, DC
  • GPU graphics processing unit
  • the CPU When rendering an image frame of an application, the CPU needs to transmit a large number of drawing instructions to the GPU, that is, it needs to process a large number of drawing instructions, occupying a lot of CPU resources, resulting in a high load on the CPU.
  • the embodiment of the present application provides an instruction processing method and related equipment, which can enable the CPU to optimize part of the drawing instructions, and only need to send a small number of drawing instructions to the GPU, that is, the number of drawing instructions to be processed by the CPU is greatly reduced, which can save A certain amount of CPU resources can reduce the load on the CPU.
  • the first aspect of the embodiments of the present application provides an instruction processing method, the method including:
  • an application When an application initiates a rendering request of the current image frame to the CPU, it can send a first drawing instruction and a second drawing instruction to the CPU, wherein the first drawing instruction is used to indicate the first storage area, and the second drawing instruction is used to indicate the second In the storage area, the second storage area stores the second index value of the second data, and the third storage area stores the first index value and the second index value, and the first data and the second data are used for rendering the current image frame.
  • the CPU If the first storage area indicated by the first drawing instruction is not continuous with the second storage area indicated by the second drawing instruction, the CPU generates a third drawing instruction for indicating the third storage area, and the third storage area stores the first index value and the second index value, the third storage area is a continuous storage area, the third storage area is a different storage area from the first storage area, and the third storage area is a different storage area from the second storage area.
  • the CPU may send the third drawing instruction to the GPU, so that the GPU determines the third storage area according to the third drawing instruction, and obtains the first index value and the second index value from the third storage area, Then, the first data and the second data are obtained respectively based on the first index value and the second index value, so as to realize the rendering of the current image frame.
  • the CPU receives the first drawing instruction and the second drawing instruction from the application, the first storage area indicated by the first drawing instruction stores the first index value of the first data used to render the current image frame, and the second The second storage area indicated by the second drawing instruction stores the second index value of the second data used for rendering the current image frame. If the first storage area and the second storage area are discontinuous, a third drawing instruction for instructing a third storage area is generated, and the third storage area is a continuous storage area. Since the third storage area indicated by the third drawing instruction stores the first index value and the second index value, the CPU only needs to send the third drawing instruction to the GPU, so that the GPU can obtain the first data and the second index value based on the third drawing instruction.
  • the CPU can optimize part of the drawing instructions, and only need to send a small number of drawing instructions to the GPU, that is, the number of drawing instructions to be processed by the CPU is greatly reduced, which can save certain CPU resources and reduce the load on the CPU.
  • the first drawing instruction includes the starting position of the first storage area and the size of the first storage area
  • the second drawing instruction includes the starting position of the second storage area
  • generating the third drawing instruction for indicating the third storage area includes: if the starting position of the first storage area is different from that of the second storage area If the difference between the starting positions is not equal to the size of the first storage area, then a third drawing instruction for indicating the third storage area is generated.
  • the CPU can accurately determine the first storage area by calculating the difference between the starting position of the first storage area and the starting position of the second storage area, and detecting whether the difference is equal to the size of the first storage area. Whether the first storage area is continuous with the second storage area. When the difference is not equal to the size of the first storage area, the CPU may determine that the first storage area and the second storage area are discontinuous.
  • a The third drawing instruction includes: if the difference between the starting position of the first storage area and the starting position of the second storage area is not equal to the size of the first storage area, then obtain the third storage area; set the first index The value and the second index value are stored in a third storage area; and a third drawing instruction including a starting position of the third storage area and a size of the third storage area is generated.
  • the CPU determines that the first storage area and the second storage area are discontinuous, it can apply for a new continuous storage area as the third storage area.
  • the size of the third storage area is usually equal to the size of the first storage area and the size of the second storage area. The sum between the sizes of the two storage areas. Then, the CPU reads the first index value from the first storage area, reads the second index value from the second storage area, and stores the first index value and the second index value into the third storage area. Finally, the CPU generates a third drawing instruction including the starting position of the third storage area in the memory and the size of the third storage area, so the third drawing instruction can be used to indicate the third storage area.
  • the method further includes: if the difference between the starting position of the first storage area and the starting position of the second storage area is equal to the size of the first storage area, generating a A fourth drawing instruction for storing the starting position of the area and the size of the fourth storage area, the fourth storage area includes the first storage area and the second storage area.
  • the CPU can determine the difference between the first storage area and the second storage area. If the areas are continuous, then the CPU can regard the first storage area and the second storage area as a whole, that is, the fourth storage area.
  • the size of the fourth storage area is equal to the sum of the size of the first storage area and the size of the second storage area, and the starting position of the fourth storage area in the memory is the first storage area in the memory.
  • the CPU can generate a fourth drawing instruction including the starting location of the first storage area and the size of the fourth storage area, so the fourth drawing instruction can be used to indicate the fourth storage area.
  • obtaining the third storage area includes: if The first value determined according to the first drawing instruction and the second drawing instruction is not equal to the second value determined according to the fifth drawing instruction and the sixth drawing instruction, and the starting position of the first storage area is the same as the starting position of the second storage area If the difference between the positions is not equal to the size of the first storage area, the third storage area is obtained; wherein, the fifth drawing instruction is used to indicate the fifth storage area, and the fifth storage area stores the third index value of the third data , the sixth drawing instruction is used to indicate the sixth storage area, the sixth storage area stores the fourth index value of the fourth data, and the third data and the fourth data are used for rendering the previous image frame.
  • the CPU may obtain the first value determined according to the first drawing instruction and the second drawing instruction of the current image frame, and the second value determined according to the fifth drawing instruction and the sixth drawing instruction of the previous image frame, if The first value is not equal to the second value, and the first storage area and the second storage area are discontinuous, indicating that the third storage area has not been created before (that is, during the CPU processing the drawing instruction of the previous image frame), and the CPU can A new storage area is applied for as the third storage area, the first index value and the second index value are stored in the third storage area, and a third drawing instruction for indicating the third storage area is generated.
  • the method further includes: if the first value is equal to the second value, and the difference between the starting position of the first storage area and the starting position of the second storage area is not equal to the first size of the storage area, generate a third drawing instruction including the starting position of the third storage area and the size of the third storage area.
  • the first value is equal to the second value, and the first storage area and the second storage area are not continuous, it means that the third storage area has been created before, so the CPU can directly reuse the created third storage area , directly generate a third drawing instruction for indicating the third storage area.
  • the first value is a value obtained by performing hash calculation according to the first drawing instruction and the second drawing instruction
  • the second value is a value obtained by performing hash calculation according to the fifth drawing instruction and the sixth drawing instruction The resulting value.
  • the CPU may use information such as the location of the first storage area, the size of the first storage area, the location of the second storage area, and the size of the second storage area to perform hash calculations to obtain the first value.
  • the CPU may use information such as the location of the fifth storage area, the size of the fifth storage area, the location of the sixth storage area, and the size of the sixth storage area to perform hash calculation to obtain the second value.
  • the method further includes: sending the third drawing instruction to the GPU, so that the GPU determines the third storage area according to the third drawing instruction. area, and acquire the first index value and the second index value from the third storage area, and then respectively acquire the first data and the second data based on the first index value and the second index value, so as to realize the rendering of the current image frame.
  • the method further includes: sending the fourth drawing instruction to the GPU, so that the GPU draws according to the The four drawing instructions determine the fourth storage area, and obtain the first index value and the second index value from the fourth storage area, and then respectively obtain the first data and the second data based on the first index value and the second index value, thereby realizing Rendering of the current image frame.
  • the first drawing instruction and the second drawing instruction are consecutive drawing instructions.
  • the second aspect of the embodiment of the present application provides an instruction processing device, which includes: an acquisition module, configured to acquire a first drawing instruction and a second drawing instruction; a first generating module, configured to The first storage area is not continuous with the second storage area indicated by the second drawing instruction, and then a third drawing instruction for indicating the third storage area is generated; wherein, the first storage area stores the first index value of the first data, The second storage area stores the second index value of the second data, the third storage area stores the first index value and the second index value, the third storage area is a continuous storage area, and the first data and the second data are used for Renders the current image frame.
  • the CPU receives the first drawing instruction and the second drawing instruction from the application, the first storage area indicated by the first drawing instruction stores the first index value of the first data used to render the current image frame, and the second The second storage area indicated by the second drawing instruction stores the second index value of the second data used for rendering the current image frame. If the first storage area is not continuous with the second storage area, a third drawing instruction for indicating a third storage area is generated, and the third storage area is a continuous storage area. Since the third storage area indicated by the third drawing instruction stores the first index value and the second index value, the CPU only needs to send the third drawing instruction to the GPU, so that the GPU can obtain the first data and the second index value based on the third drawing instruction.
  • the CPU can optimize part of the drawing instructions, and only need to send a small number of drawing instructions to the GPU, that is, the number of drawing instructions to be processed by the CPU is greatly reduced, which can save certain CPU resources and reduce the load on the CPU.
  • the first drawing instruction includes the starting position of the first storage area and the size of the first storage area
  • the second drawing instruction includes the starting position of the second storage area
  • the first generating module uses If the difference between the initial position of the first storage area and the initial position of the second storage area is not equal to the size of the first storage area, a third drawing instruction for indicating the third storage area is generated.
  • the first generating module is configured to: if the difference between the starting position of the first storage area and the starting position of the second storage area is not equal to the size of the first storage area, then Acquire the third storage area; store the first index value and the second index value in the third storage area; generate a third drawing instruction including the starting position of the third storage area and the size of the third storage area.
  • the device further includes: a second generating module, configured to if the difference between the initial position of the first storage area and the initial position of the second storage area is equal to the initial position of the first storage area size, generate a fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area, and the fourth storage area includes the first storage area and the second storage area.
  • a second generating module configured to if the difference between the initial position of the first storage area and the initial position of the second storage area is equal to the initial position of the first storage area size, generate a fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area, and the fourth storage area includes the first storage area and the second storage area.
  • the first generation module is configured to, if the first value determined according to the first drawing instruction and the second drawing instruction is not equal to the second value determined according to the fifth drawing instruction and the sixth drawing instruction, And the difference between the starting position of the first storage area and the starting position of the second storage area is not equal to the size of the first storage area, then acquire the third storage area; wherein, the fifth drawing instruction is used to indicate the fifth In the storage area, the fifth storage area stores the third index value of the third data, the sixth drawing instruction is used to indicate the sixth storage area, the sixth storage area stores the fourth index value of the fourth data, the third data and the Four data are used to render the previous image frame.
  • the device further includes: a third generation module, configured to: if the first value is equal to the second value, and the starting position of the first storage area is between the starting position of the second storage area is not equal to the size of the first storage area, then a third drawing instruction including the start position of the third storage area and the size of the third storage area is generated.
  • a third generation module configured to: if the first value is equal to the second value, and the starting position of the first storage area is between the starting position of the second storage area is not equal to the size of the first storage area, then a third drawing instruction including the start position of the third storage area and the size of the third storage area is generated.
  • the first value is a value obtained by performing hash calculation according to the first drawing instruction and the second drawing instruction
  • the second value is a value obtained by performing hash calculation according to the fifth drawing instruction and the sixth drawing instruction The resulting value.
  • the device further includes: a sending module, configured to send the third drawing instruction to the GPU.
  • the device further includes: a sending module, configured to send the fourth drawing instruction to the GPU.
  • the first drawing instruction and the second drawing instruction are consecutive drawing instructions.
  • the third aspect of the embodiment of the present application provides a terminal device, the terminal device includes a memory and a processor; the memory stores codes, the processor is configured to execute the codes, and when the codes are executed, the terminal device performs the same as the first aspect Or the method described in any possible implementation manner of the first aspect.
  • a fourth aspect of the embodiments of the present application provides a computer storage medium, the computer storage medium stores one or more instructions, and when executed by one or more computers, the instructions cause one or more computers to implement the first aspect or the first aspect.
  • the method described in any possible implementation manner In one aspect, the method described in any possible implementation manner.
  • a fifth aspect of the embodiments of the present application provides a computer program product, the computer program product stores instructions, and when the instructions are executed by a computer, the computer implements the first aspect or any one of the possible implementations of the first aspect. Methods.
  • the CPU receives the first drawing instruction and the second drawing instruction from the application, the first storage area indicated by the first drawing instruction stores the first index value of the first data used to render the current image frame, and the second The second storage area indicated by the drawing instruction stores the second index value of the second data used for rendering the current image frame. If the first storage area and the second storage area are discontinuous, a third drawing instruction for instructing a third storage area is generated, and the third storage area is a continuous storage area. Since the third storage area indicated by the third drawing instruction stores the first index value and the second index value, the CPU only needs to send the third drawing instruction to the GPU, so that the GPU can obtain the first data and the second index value based on the third drawing instruction.
  • the CPU can optimize part of the drawing instructions, and only need to send a small number of drawing instructions to the GPU, that is, the number of drawing instructions to be processed by the CPU is greatly reduced, which can save certain CPU resources and reduce the load on the CPU.
  • FIG. 1 is a schematic structural diagram of a terminal device provided in an embodiment of the present application.
  • FIG. 2 is another schematic structural diagram of a terminal device provided by an embodiment of the present application.
  • FIG. 3 is a schematic flowchart of an instruction processing method provided in an embodiment of the present application.
  • FIG. 4 is a schematic diagram of the corresponding relationship between VBO and EBO provided by the embodiment of the present application.
  • Fig. 5 is a schematic diagram of the EBO provided by the embodiment of the present application.
  • Fig. 6 is another schematic diagram of the EBO provided by the embodiment of the present application.
  • FIG. 7 is another schematic flowchart of the instruction processing method provided by the embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of an instruction processing device provided by an embodiment of the present application.
  • the embodiment of the present application provides an instruction processing method and related equipment, which can enable the CPU to optimize part of the drawing instructions, and only need to send a small number of drawing instructions to the GPU, that is, the number of drawing instructions to be processed by the CPU is greatly reduced, which can save A certain amount of CPU resources can reduce the load on the CPU.
  • terminal devices With the rapid development of technology, users can implement various entertainment activities through terminal devices, such as listening to music, watching videos, playing games, and so on. In order to meet different needs of users, various types of applications are usually installed on the terminal device.
  • the CPU of the terminal device In order to render a certain picture (also referred to as an image frame) of some large-scale applications, the CPU of the terminal device usually needs to receive a large number of drawing instructions from the application and send these drawing instructions to the GPU. After the GPU obtains these drawing instructions, it can obtain the corresponding rendering data in the storage area indicated by these drawing instructions, and then render the image of the application based on the rendering data for viewing and use by the user.
  • the CPU When rendering an image frame of an application, the CPU needs to transmit a large number of instructions to the GPU, that is, it needs to process a large number of instructions, occupying a lot of CPU resources, resulting in a high load on the CPU.
  • Fig. 1 is a schematic structural diagram of a terminal device provided by an embodiment of the present application. As shown in Fig.
  • the terminal device includes: a processor 101, a microcontroller unit (microcontroller unit, MCU) 103, a memory 105, and a modem (modem) 107 , a radio frequency (radio frequency, RF) module 109, a Wi-Fi module 111, a Bluetooth module 113, a sensor 114, a positioning module 150, an input/output (input/output, I/O) device 115 and other components. These components may communicate over one or more communication buses or signal lines.
  • a processor 101 a microcontroller unit (microcontroller unit, MCU) 103, a memory 105, and a modem (modem) 107 , a radio frequency (radio frequency, RF) module 109, a Wi-Fi module 111, a Bluetooth module 113, a sensor 114, a positioning module 150, an input/output (input/output, I/O) device 115 and other components.
  • RF radio frequency
  • Wi-Fi Wireless Fidelity
  • Each component of the terminal device 100 is specifically introduced below in conjunction with FIG. 1:
  • the processor 101 is the control center of the mobile phone 100 and connects various components of the terminal device 100 by various interfaces and buses.
  • processor 101 may include one or more processing units.
  • Computer programs such as the operating system 161 and application programs 163 shown in FIG. 1 are stored in the memory 105 .
  • the processor 101 is configured to execute the computer program in the memory 105, so as to realize the functions defined by the computer program.
  • the system 161 can be used to implement the application preloading method provided by the embodiment of the present application).
  • the memory 105 also stores data other than computer programs, such as data generated during the running of the operating system 161 and application programs 163 .
  • the storage 105 is a non-volatile storage medium, generally including internal memory and external storage.
  • the memory includes but is not limited to random access memory (Random Access Memory, RAM), or cache (cache).
  • External memory includes but not limited to flash memory (flash memory), hard disk, optical disk, universal serial bus (universal serial bus, USB) disk, etc., wherein, the hard disk can include hard disk drive (hard disk drive, HDD) and solid state hard drive (solid state disk, SSD).
  • flash memory flash memory
  • hard disk hard disk drive, HDD
  • solid state hard drive solid state disk, SSD
  • the memory 105 may be independent and connected to the processor 101 through a bus; the memory 105 and the processor 101 may also be integrated into a chip subsystem.
  • the MCU 103 is a coprocessor for acquiring and processing data from the sensor 114.
  • the processing capability and power consumption of the MCU 103 are smaller than that of the processor 101, but it has the feature of "always on” and can be used when the processor 101 is in Continuously collect and process sensor data in sleep mode to ensure the normal operation of the sensor with extremely low power consumption.
  • the MCU 103 may be a sensor hub chip.
  • Sensors 114 may include light sensors, motion sensors.
  • the light sensor may include an ambient light sensor and a proximity sensor, wherein the ambient light sensor may adjust the brightness of the display 151 according to the brightness of the ambient light, and the proximity sensor may turn off the power of the display screen when the terminal device 100 moves to the ear. .
  • the accelerometer sensor can detect the size of (generally three-axis) acceleration in various directions, and can detect the size and direction of gravity when stationary; the sensor 114 can also include a gyroscope, a barometer, a hygrometer, Other sensors such as thermometers and infrared sensors will not be described in detail here.
  • the MCU 103 and the sensor 114 can be integrated on the same chip, or they can be separate components connected by a bus.
  • the Modem 107 and the radio frequency module 109 constitute the communication subsystem of the terminal device 100, and are used to realize the main functions of wireless communication standard protocols such as 3GPP and ETSI. Among them, Modem 107 is used for codec, signal modulation and demodulation, equalization, etc.
  • the radio frequency module 109 is used for receiving and sending wireless signals, and the radio frequency module 109 includes but not limited to an antenna, at least one amplifier, a coupler, a duplexer, and the like. The radio frequency module 109 cooperates with the Modem 107 to realize the wireless communication function.
  • the Modem 107 can be used as an independent chip, or can be combined with other chips or circuits to form a system-on-chip or an integrated circuit. These chips or integrated circuits can be applied to all terminal devices that implement wireless communication functions, including: mobile phones, computers, notebooks, tablets, routers, wearable devices, automobiles, home appliances, etc.
  • the terminal device 100 can also use the Wi-Fi module 111, the Bluetooth module 113, etc. to perform wireless communication.
  • the Wi-Fi module 111 is used to provide the terminal device 100 with network access complying with Wi-Fi related standard protocols.
  • the terminal device 100 can access a Wi-Fi access point through the Wi-Fi module 111 and then access the Internet.
  • the Wi-Fi module 111 can also serve as a Wi-Fi wireless access point, and can provide Wi-Fi network access for other terminal devices.
  • the Bluetooth module 113 is used to implement short-distance communication between the terminal device 100 and other terminal devices (such as mobile phones, smart watches, etc.).
  • the Wi-Fi module 111 in the embodiment of the present application may be an integrated circuit or a Wi-Fi chip, etc.
  • the Bluetooth module 113 may be an integrated circuit or a Bluetooth chip.
  • the positioning module 150 is used to determine the geographic location of the terminal device 100 . It can be understood that the positioning module 150 may specifically be a receiver of a global positioning system (global position system, GPS) or Beidou satellite navigation system, Russian GLONASS and other positioning systems.
  • GPS global position system
  • Beidou satellite navigation system Russian GLONASS and other positioning systems.
  • the Wi-Fi module 111, the Bluetooth module 113 and the positioning module 150 may be separate chips or integrated circuits, or may be integrated together.
  • the Wi-Fi module 111, the Bluetooth module 113 and the positioning module 150 can be integrated on the same chip.
  • the Wi-Fi module 111, the Bluetooth module 113, the positioning module 150 and the MCU 103 can also be integrated into the same chip.
  • the input/output device 115 includes, but is not limited to: a display 151 , a touch screen 153 , and an audio circuit 155 and so on.
  • the touch screen 153 can collect touch events of the user of the terminal device 100 on or near it (for example, the user uses any suitable object such as a finger or a stylus to operate on the touch screen 153 or near the touch screen 153), and Send the collected touch events to other devices (such as the processor 101).
  • the user's operation near the touch screen 153 can be referred to as floating touch; through the floating touch, the user can select, move or drag a target (such as an icon, etc.) without directly touching the touch screen 153 .
  • the touch screen 153 can be realized by various types such as resistive, capacitive, infrared, and surface acoustic wave.
  • the display (also referred to as a display screen) 151 is used to display information input by the user or information presented to the user.
  • the display may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like.
  • the touch screen 153 can be covered on the display 151, and when the touch event is detected by the touch screen 153, it is sent to the processor 101 to determine the type of the touch event, and then the processor 101 can provide corresponding visual output on the display 151 according to the type of the touch event .
  • the touch screen 153 and the display 151 are used as two independent components to realize the input and output functions of the terminal device 100, in some embodiments, the touch screen 153 and the display 151 can be integrated to realize the functions of the mobile phone 100. input and output functions.
  • the touch screen 153 and the display 151 can be configured on the front of the terminal device 100 in the form of a full panel, so as to realize a frameless structure.
  • the audio circuit 1155 , the speaker 116 and the microphone 117 can provide an audio interface between the user and the terminal device 100 .
  • the audio circuit 109 can transmit the electrical signal converted from the received audio data to the loudspeaker 113, and the loudspeaker 113 converts it into a sound signal output; After being received, it is converted into audio data, and then the audio data is sent to another terminal device through the Modem 107 and the radio frequency module 109, or the audio data is output to the memory 105 for further processing.
  • the terminal device 100 may also have a fingerprint identification function.
  • a fingerprint collection device may be configured on the back of the terminal device 100 (for example, under the rear camera), or a fingerprint collection device may be configured on the front of the terminal device 100 (for example, under the touch screen 153 ).
  • a fingerprint collection device may be configured in the touch screen 153 to realize the fingerprint recognition function, that is, the fingerprint collection device may be integrated with the touch screen 153 to realize the fingerprint recognition function of the terminal device 100 .
  • the fingerprint collecting device is configured in the touch screen 153 , may be a part of the touch screen 153 , or may be configured in the touch screen 153 in other ways.
  • the main component of the fingerprint collection device in the embodiment of the present application is a fingerprint sensor, which can use any type of sensing technology, including but not limited to optical, capacitive, piezoelectric or ultrasonic sensing technologies.
  • the operating system 161 carried by the terminal device 100 may be iOS, Android, Microsoft or other operating systems, which is not limited in this embodiment of the present application.
  • the operating system 161 can execute each step in the instruction processing method shown in FIG. 3 , which can be specifically implemented by the application processor 101 executing the program stored in the memory 105 .
  • FIG. 2 is another schematic structural diagram of the terminal device provided by the embodiment of the present application. As shown in Fig. 2, the terminal device can be logically divided into a hardware layer, an operating system layer and an application layer, and each layer will be introduced below:
  • the hardware layer may include processing devices such as a central processing unit (central processing unit, CPU) and a graphics processing unit (graphic processing unit, GPU) (equivalent to a specific implementation of the processor 101 in FIG. 1 ), and may also include a memory and storage devices such as external storage (equivalent to a specific implementation of memory 105 in FIG. accomplish).
  • processing devices such as a central processing unit (central processing unit, CPU) and a graphics processing unit (graphic processing unit, GPU) (equivalent to a specific implementation of the processor 101 in FIG. 1 ), and may also include a memory and storage devices such as external storage (equivalent to a specific implementation of memory 105 in FIG. accomplish).
  • the hardware layer 450 can also include the power supply, camera, radio frequency module, positioning module and WiFi module shown in Figure 1, and can also include other hardware modules not shown in Figure 1, such as a memory controller and display controllers etc.
  • the operating system layer may include a kernel layer and a system framework layer.
  • the kernel layer is used to provide low-level system components and services, such as system kernel and hardware drivers.
  • the system kernel can be used to implement various functions such as power management, memory management, and process management
  • the hardware drivers include drivers for devices such as GPUs, cameras, speakers, microphones, and positioning modules.
  • the system framework layer is used to provide various basic public components and services for each application in the application layer, for example, a graphics library and an instruction processing module for implementing the method provided by the embodiment of the present application.
  • the graphics library may also be referred to as a graphics application programming interface (application programming interface, API), for example, an open graphics library (open graphics library, OpenGL), Vulkan, and the like.
  • the application layer includes one or more applications, for example, camera software, communication software, office software and so on.
  • the application may initiate rendering requests for multiple consecutive image frames (for example, a video stream, etc.).
  • the rendering request of the image frame usually includes multiple drawing instructions (draw call, DC), and each drawing instruction can make the GPU realize the rendering of a part of the image in the image frame, so these multiple drawing instructions
  • the GPU may be instructed to render the image frame.
  • the application can send multiple drawing instructions of the image frame to the instruction processing module through the graphics API.
  • the instruction processing module may process the multiple drawing instructions (for example, perform a merge operation, etc.) to obtain a processed drawing instruction.
  • the instruction processing module may send the processed drawing instruction to the GPU through the GPU driver, so that the GPU completes the rendering of the image frame based on the processed drawing instruction.
  • FIG. 3 is a schematic flow chart of the instruction processing method provided by the embodiment of the present application.
  • the application of the terminal device may initiate a rendering request of multiple consecutive image frames to the CPU, and the processing of the rendering request of each image frame by the CPU is similar.
  • one of the image frames will be schematically described below, and this image frame will be set as the current image frame.
  • the application when it initiates a rendering request of the current image frame to the CPU, it will send multiple drawing instructions of the current image frame to the CPU, and the CPU can divide the multiple drawing instructions into multiple drawing instruction groups.
  • multiple drawing instruction groups all drawing instructions of each drawing instruction group are drawing instructions continuously received by the CPU (that is, all drawing instructions of each drawing instruction group are continuous drawing instructions), and the drawing instruction groups are inserted between The remaining types of instructions received by the CPU. For example, when a game application needs to render a picture, it needs to send drawing command 1, drawing command 2, drawing command 3, drawing command 4, drawing command 5, and drawing command 6 to the CPU to complete the rendering of the picture. In the process of receiving these 7 drawing instructions, the CPU also receives the data copy instruction 1 and data copy instruction 2 sent by the game application.
  • the order in which the CPU receives instructions is drawing instruction 1, drawing instruction 2, drawing instruction 3, and data copy instruction 1.
  • Drawing instruction 4, drawing instruction 5, data copy instruction 2, and drawing instruction 6, then, the CPU will group drawing instruction 1, drawing instruction 2, and drawing instruction 3 into one group, and divide drawing instruction 4 and drawing instruction 5 As a group, the drawing instructions 6 are grouped.
  • the method includes:
  • the CPU acquires a first drawing instruction and a second drawing instruction.
  • the first drawing instruction is used to indicate the first storage area
  • the second drawing instruction is used to indicate the second storage area.
  • the first storage area stores the first data of the first data. Index value
  • the second storage area stores the second index value of the second data
  • the first data and the second data are used to render the current image frame.
  • the CPU After the CPU receives a certain drawing instruction group including the first drawing instruction and the second drawing instruction, it can analyze the first drawing instruction and the second drawing instruction, so as to obtain the information contained in the first drawing instruction and the information contained in the second drawing instruction .
  • the first drawing instruction may include information such as the starting position of the first storage area in the memory and the size of the first storage area, which can be used to determine the location of the first storage area in the memory (equivalent to the first drawing instruction can be used to indicate the first storage area).
  • the first storage area stores a first index value, and the first index value is the location in the memory of the storage area storing the first data (so the first index value can also be called the index value of the first data), and the first data Used to render a portion of the image in the current image frame.
  • the second drawing instruction may include information such as the starting position of the second storage area in the memory and the size of the second storage area, and these information can be used to determine the location of the second storage area in the memory (equivalent to the second drawing instruction can be used to indicate a second storage area).
  • the second storage area stores a second index value, and the second index value is the location in memory of the storage area storing the second data (so the second index value can also be called the index value of the second data), and the second data Used to render another part of the image in the current image frame.
  • the first storage area and the second storage area are two storage areas in the vertex index buffer object (element buffer object, EBO) of the memory, and the storage area storing the first data and the storage area storing the second data are memory
  • EBO and VBO are two areas pre-allocated in the memory, VBO stores the data used to render the current image frame, and EBO stores the index value of the data used to render the current image frame.
  • FIG 4 is a schematic diagram of the corresponding relationship between VBO and EBO provided by the embodiment of the present application.
  • EBO is divided into multiple sizes Equal sub-storage areas, the size of each sub-storage area is 2 bytes, and each sub-storage area stores a sub-index value.
  • the VBO is also divided into multiple sub-storage areas of equal size, and each sub-storage area stores data for rendering image frames.
  • the sub-index value corresponds to a sub-storage area in the VBO (that is, the sub-index value corresponds to the memory location of a sub-storage area in the VBO, so the sub-index value corresponds).
  • the drawing instruction may include the starting position of a sub-storage area in the EBO in the memory, the number of sub-index values, and the type of the sub-index value (it can also be understood as the size of the sub-index value, Usually equal to the size of a sub-storage area in EBO) and other information.
  • the product of the number of sub-index values and the type of sub-index values is the size of the storage area formed by at least one sub-storage area (the number of sub-storage areas is equal to the number of sub-index values) in the EBO, so the drawing instruction contains
  • the starting position of a certain sub-storage area in the memory is the starting position of the storage area in the memory, and the position of the storage area in the memory can be determined according to the starting position of the storage area and the size of the storage area.
  • the storage area Since the storage area is composed of at least one sub-storage area in the EBO, the storage area stores at least one sub-index value. Based on the location of the storage area in memory, the storage area can be found and the part of the subindex value can be read from it. Based on this sub-index value, the corresponding sub-storage area can be found from the VBO, and the data for rendering the image frame can be read from it.
  • a certain drawing command contains information such as the starting position of the sub-storage area 3 in the EBO, the number of sub-index values is 3, and the size of the sub-index value is 2 bytes.
  • the size of storage area 1 (the storage area composed of sub storage area 3, sub storage area 4, and sub storage area 5 in EBO) is 6 bytes, and the starting position of storage area 1 is the location of sub storage area 3. The starting position, so the ending position of the storage area 1 can be calculated based on the size of the storage area 1 and the starting position of the storage area 1, which is equivalent to obtaining the position of the storage area 1.
  • sub-storage area 3, sub-storage area 4, and sub-storage area 5 respectively store sub-index value 3, sub-index value 4, and sub-index value 5, storage area 1 can be found based on the location of storage area 1, and can be read from it. This part of the index value. Since sub-index value 3, sub-index value 4 and sub-index value 5 are respectively the positions of sub-storage area 30, sub-storage area 40, and sub-storage area 50 in the VBO, and sub-storage area 30, sub-storage area 40, and sub-storage area 50 Data 3, data 4, and data 5 are stored respectively, so based on these index values, sub-storage area 30, sub-storage area 40, and sub-storage area 50 can be found, and data 3, data 4, and data 5 can be read therefrom.
  • sub-index value 3 may also be called a sub-index value of data 3
  • sub-index value 4 may also be called a sub-index value of data 4
  • sub-index value 5 may also be called a sub-index value of data 5 .
  • the size of the sub-storage area of the EBO is 2 bytes for schematic illustration, and does not limit the size of the sub-storage area of the EBO in this embodiment.
  • the size of the sub-storage area of the EBO can be determined according to Set the actual needs.
  • the storage area 1 is equivalent to the first storage area or the second storage area mentioned in this embodiment, then the first storage area may include at least one sub-storage area in the EBO , the first index value may include at least one sub-index value, and the first data may include data stored in at least one sub-storage area in the VBO.
  • the second storage area, the second index value and the second data which will not be repeated here.
  • the starting position of a certain sub-storage area in the memory in the EBO may be an offset value of the sub-storage area in the EBO.
  • the leftmost of sub-storage area 0 is taken as the reference point, and the offset value here is set to 0. Then, the distance between the leftmost side of the substorage area 3 and the leftmost side of the substorage area 0 is the offset value of the substorage area 3 .
  • vertex data or rendering data
  • information such as vertex coordinates, normals, colors, textures, etc., which will not be described in detail later.
  • the CPU detects whether the first storage area and the second storage area are continuous.
  • the CPU may detect whether the first storage area and the second storage area are continuous based on the information included in the first drawing instruction and the information included in the second drawing instruction.
  • the CPU can detect whether the first storage area and the second storage area are continuous in the following manner: first, the CPU calculates the distance between the starting position of the first storage area in the memory and the starting position of the second storage area in the memory difference. Then, the CPU judges whether the difference is equal to the size of the first storage area (assuming that the CPU first receives the first drawing command), if equal, it means that the first storage area and the second storage area are continuous, if not, it means that the first storage area area and the second storage area are not contiguous.
  • the CPU If the first storage area and the second storage area are discontinuous, the CPU generates a third drawing instruction for indicating the third storage area, the third storage area stores the first index value and the second index value, and the third storage area
  • the areas are continuous storage areas, the third storage area is a different storage area from the first storage area, and the third storage area is a different storage area from the second storage area.
  • the CPU can determine the first storage area and the second storage area discontinuous, so the CPU can generate a third drawing instruction for indicating the third storage area, the third storage area stores the first index value and the second index value, and the third storage area is a continuous storage area in the EBO.
  • the CPU can generate the third drawing instruction in the following manner: the CPU applies for a new continuous storage area in the EBO as the third storage area, and the size of the third storage area is usually equal to the size of the first storage area and the size of the second storage area and between the sizes of . Then, the CPU reads the first index value from the first storage area, reads the second index value from the second storage area, and stores the first index value and the second index value into the third storage area. Finally, the CPU acquires the starting position of the third storage area in the memory, and generates a third drawing instruction including the starting position of the third storage area in the memory and the size of the third storage area, so the third drawing instruction can be used for Indicates the third storage area.
  • Figure 5 is a schematic diagram of the EBO provided by the embodiment of the present application
  • the drawing instruction 1 includes information such as the starting position of the storage area 1 and the size of the storage area 1, and the size of the storage area 1 is 6 words section (that is, the number of sub-index values included in the drawing instruction 1 is 3, and the size of the sub-index values is 2 bytes).
  • the drawing instruction 2 includes information such as the starting position of the storage area 2 and the size of the storage area 2, and the size of the storage area 2 is 4 bytes (that is, the number of sub-index values included in the drawing instruction 2 is 2, and the size of the sub-index value is 2 bytes).
  • the CPU can determine the storage area 1 and storage area 2 are not consecutive. Then, the CPU can apply for a storage area 3 with a size of 10 bytes in EBO, store sub-index value 3, sub-index value 4, and sub-index value 5 in storage area 1, and store sub-index value 7 and sub-index value in the storage area 8 are sequentially stored in storage area 3. Finally, the CPU can generate a drawing instruction 3 that includes information such as the starting position of the storage area 3 and the size of the storage area 3.
  • the size of the storage area 3 is 10 bytes (that is, the number of sub-index values included in the drawing instruction 3 is 5, The size of the subindex value is 2 bytes).
  • the CPU If the first storage area and the second storage area are continuous, the CPU generates a fourth drawing instruction for instructing a fourth storage area, where the fourth storage area includes the first storage area and the second storage area.
  • the CPU can determine that the first storage area and the second storage area are continuous . Since the first storage area and the second storage area are continuous, the CPU can regard the first storage area and the second storage area as a whole, that is, the fourth storage area. It can be understood that the size of the fourth storage area is equal to the sum of the size of the first storage area and the size of the second storage area, and the starting position of the fourth storage area in the memory is the first storage area in the memory. , the CPU can generate a fourth drawing instruction including the starting location of the first storage area and the size of the fourth storage area, so the fourth drawing instruction can be used to indicate the fourth storage area.
  • the drawing instruction 1 includes information such as the starting position of the storage area 1 and the size of the storage area 1, and the size of the storage area 1 is 6 bytes (that is, the number of sub-index values included in the drawing instruction 1 is 3, and the size of the sub-index values is 2 bytes).
  • the drawing instruction 2 includes information such as the starting position of the storage area 2 and the size of the storage area 2, and the size of the storage area 2 is 4 bytes (that is, the number of sub-index values included in the drawing instruction 2 is 2, and the size of the sub-index value is 2 bytes).
  • the CPU can determine the storage area 1 and storage area 2 in a row. Then, the CPU can regard the storage area 1 and the storage area 2 as a whole, that is, the storage area 4, and generate a drawing instruction 4 containing information such as the starting position of the storage area 1 and the size of the storage area 4, and the size of the storage area 4 is 10 bytes (that is, the number of sub-index values included in the drawing instruction 4 is 5, and the size of the sub-index values is 2 bytes).
  • the CPU sends the third drawing instruction to the GPU.
  • the CPU After obtaining the third drawing instruction, the CPU sends the third drawing instruction to the GPU.
  • the CPU may analyze the third drawing instruction to obtain information such as the starting position of the third storage area in the memory and the size of the third storage area. Then, based on this part of the information, the GPU can determine the location of the third storage area in the memory, and find the third storage area in the EBO based on the location, so as to obtain the first index value and the second index value from the third storage area. Then, the GPU finds a corresponding storage area in the VBO based on the first index value, acquires the first data therefrom, and finds a corresponding storage area in the VBO based on the second index value, and acquires the second data therefrom. Finally, the GPU can use the first data and the second data to implement rendering of the current image frame.
  • the CPU sends the fourth drawing instruction to the GPU.
  • the CPU After obtaining the fourth drawing instruction, the CPU sends the fourth drawing instruction to the GPU.
  • the CPU may parse the fourth drawing instruction to obtain information such as the starting position of the first storage area in the memory and the size of the fourth storage area. Then, based on this part of the information, the GPU can determine the location of the fourth storage area in the memory, and find the fourth storage area in the EBO based on the location, so as to obtain the first index value and the second index value from the fourth storage area. Then, the GPU finds a corresponding storage area in the VBO based on the first index value, acquires the first data therefrom, and finds a corresponding storage area in the VBO based on the second index value, and acquires the second data therefrom. Finally, the GPU can use the first data and the second data to implement rendering of the current image frame.
  • drawing instruction group received by the CPU includes two drawing instructions (that is, the drawing instruction group only has the first drawing instruction and the second drawing instruction) for schematic illustration, and does not refer to this
  • the number of drawing instructions included in a drawing instruction group constitutes a limit.
  • the drawing instruction group may include three drawing instructions, namely a first drawing instruction, a second drawing instruction and a seventh drawing instruction, and the seventh drawing instruction is used to indicate the seventh storage area.
  • step 302 it is also necessary to detect whether the second storage area and the seventh storage area are continuous.
  • the specific process please refer to the related description of detecting whether the first storage area and the second storage area are continuous.
  • step 303 the determination condition for generating the third drawing command indicating the third storage area becomes: if the first storage area and the second storage area are discontinuous, and the second storage area and the seventh storage area are discontinuous , further, the size of the third storage area is the sum of the size of the first storage area, the size of the second storage area and the size of the seventh storage area.
  • step 304 the judgment condition for generating the fourth drawing instruction indicating the fourth storage area becomes, if the first storage area and the second storage area are continuous, and the second storage area and the seventh storage area are continuous, further Specifically, the fourth storage area is composed of the first storage area, the second storage area and the seventh storage area.
  • the drawing instruction group may also include four drawing instructions, five drawing instructions, etc. For details, please refer to the relevant description of the three drawing instructions, which will not be repeated here.
  • the CPU receives the first drawing instruction and the second drawing instruction from the application, the first storage area indicated by the first drawing instruction stores the first index value of the first data used to render the current image frame, and the second The second storage area indicated by the drawing instruction stores the second index value of the second data used for rendering the current image frame. If the first storage area and the second storage area are discontinuous, a third drawing instruction for instructing a third storage area is generated, and the third storage area is a continuous storage area. Since the third storage area indicated by the third drawing instruction stores the first index value and the second index value, the CPU only needs to send the third drawing instruction to the GPU, so that the GPU can obtain the first data and the second index value based on the third drawing instruction.
  • the CPU can optimize part of the drawing instructions, and only need to send a small number of drawing instructions to the GPU, that is, the number of drawing instructions to be processed by the CPU is greatly reduced, which can save certain CPU resources and reduce the load on the CPU.
  • FIG. 7 is another schematic flowchart of the instruction processing method provided by the embodiment of the present application.
  • a certain drawing instruction group of the current image frame is still used as a schematic illustration below, and it is assumed that the drawing instruction group includes a first drawing instruction and a second drawing instruction.
  • the method includes:
  • the CPU acquires a first drawing instruction and a second drawing instruction, the first drawing instruction is used to indicate the first storage area, the second drawing instruction is used to indicate the second storage area, and the first storage area stores the first Index value, the second storage area stores the second index value of the second data, and the first data and the second data are used to render the current image frame.
  • step 701 for the description of step 701, reference may be made to the related description of step 301 in the embodiment shown in FIG. 3 , and details are not repeated here.
  • the CPU detects whether the first value and the second value are the same, and whether the first storage area and the second storage area are continuous.
  • the CPU may determine the first value based on the information included in the first drawing instruction and the information included in the second drawing instruction. Specifically, the CPU can use information such as the location of the first storage area in the memory, the size of the first storage area, the location of the second storage area in the memory, and the size of the second storage area to perform hash calculations to obtain the first value , which is equivalent to performing hash calculation on the drawing instruction group including the first drawing instruction and the second drawing instruction to obtain the first value.
  • the CPU when the CPU processes the rendering request of the previous image frame, it has performed a hash calculation on each drawing instruction group of the previous image frame, and obtained each drawing instruction group of the previous image frame after hashing Calculated value. Then, when the CPU processes the rendering request of the current image frame, after obtaining the first value, the CPU can hash some drawing instruction groups of the previous image frame (these drawing instruction groups usually only contain two drawing instructions) The numerical value of is compared with the first numerical value to determine whether there is a certain drawing instruction group of the previous image frame. The numerical value after hash calculation is equal to the first numerical value. If yes, execute step 704 or step 706 respectively. If not , then execute step 705 or step 707 respectively.
  • the drawing instruction group includes the fifth drawing instruction and the sixth drawing instruction
  • the fifth drawing instruction is used to indicate the fifth storage area
  • the fifth The storage area stores the third index value of the third data
  • the sixth drawing instruction is used to indicate the sixth storage area
  • the sixth storage area stores the fourth index value of the fourth data
  • the third data and the fourth data are used for rendering
  • the CPU can directly obtain the location of the fifth storage area in the memory, the size of the fifth storage area, the location of the sixth storage area in the memory, the size of the sixth storage area and other information for hash calculation.
  • To obtain the second value compare the second value with the first value, check whether the two are equal, and check whether the first storage area and the second storage area are continuous.
  • step 302 For the description of whether the CPU detects whether the first storage area and the second storage area are continuous, reference may be made to the relevant description of step 302 in the embodiment shown in FIG. 3 , and details are not repeated here.
  • the CPU If the first value is equal to the second value, and the first storage area and the second storage area are discontinuous, the CPU generates a third drawing instruction for indicating the third storage area, and the third storage area stores the first index value and the second index value, the third storage area is a continuous storage area.
  • the first value is equal to the second value, and the first storage area and the second storage area are not continuous, it means that the first drawing command and the fifth drawing command are the same command, and the second drawing command and the sixth drawing command are the same command , the first storage area and the fifth storage area are the same storage area, the second storage area and the sixth storage area are the same storage area, the first index value and the third index value are the same index value, the second index value and the fourth The index value is the same index value, the first data and the third data are the same data, the second data and the fourth data are the same data, then, the CPU contains the fifth drawing instruction and the sixth drawing instruction for the previous image frame
  • a continuous storage area has been applied to EBO, that is, the third storage area (the size of the third storage area is usually equal to the sum of the size of the first storage area and the size of the second storage area ), and the first index value and the second index value are stored in the third storage area, it can be seen that the third storage area has been created before,
  • the CPU acquires the third storage area, stores the first index value and the second index value in the third storage area, And generate a third drawing instruction for indicating the third storage area.
  • the first value is not equal to the second value, and the first storage area and the second storage area are not continuous, it means that the first drawing command and the fifth drawing command are different commands, and the second drawing command and the sixth drawing command are different instruction, the first storage area and the fifth storage area are different storage areas, the second storage area and the sixth storage area are different storage areas, the first index value and the third index value are different index values, and the second index value and the fourth index value are different index values, the first data and the third data are different data, the second data and the fourth data are different data, then, the third storage area has not been created before, so in the During the processing of the drawing instruction group including the first drawing instruction and the second drawing instruction of the current image frame, the CPU needs to apply for a new continuous storage area in the EBO as the third storage area, and the size of the third storage area is usually equal to the first The sum between the size of the first storage area and the size of the second storage area.
  • the CPU reads the first index value from the first storage area, reads the second index value from the second storage area, and stores the first index value and the second index value into the third storage area. Finally, the CPU acquires the starting position of the third storage area in the memory, and generates a third drawing instruction including the starting position of the third storage area in the memory and the size of the third storage area, so the third drawing instruction can be used for Indicates the third storage area.
  • the CPU If the first value is equal to the second value, and the first storage area and the second storage area are continuous, the CPU generates a fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area, and the fourth The storage area includes a first storage area and a second storage area.
  • the CPU If the first value is not equal to the second value, and the first storage area and the second storage area are continuous, the CPU generates a fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area.
  • the CPU regards the first storage area and the second storage area as a whole, that is, the fourth storage area, wherein the fourth storage area
  • the size of the area is equal to the sum of the size of the first storage area and the size of the second storage area, and the starting position of the fourth storage area in the memory is the starting position of the first storage area in the memory, so the CPU can A fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area is generated. It can be seen that the fourth drawing instruction can be used to indicate the fourth storage area.
  • the CPU sends the third drawing instruction to the GPU.
  • the CPU sends the fourth drawing instruction to the GPU.
  • step 708 and step 709 For descriptions of step 708 and step 709, reference may be made to relevant descriptions of step 305 and step 306 in the embodiment shown in FIG. 3 , and details are not repeated here.
  • drawing instruction group of the current image frame received by the CPU contains two drawing instructions (that is, the drawing instruction group only has the first drawing instruction and the second drawing instruction) for schematic illustration , does not limit the number of drawing instructions included in the drawing instruction group.
  • the drawing instruction group may include three drawing instructions, namely a first drawing instruction, a second drawing instruction and a seventh drawing instruction, and the seventh drawing instruction is used to indicate the seventh storage area.
  • the second value is calculated according to the fifth drawing instruction, the sixth drawing instruction and the eighth drawing instruction (that is, the drawing instruction group of the previous image frame used to compare the values also needs to include three drawing instruction).
  • step 703 it is also necessary to detect whether the second storage area and the seventh storage area are continuous.
  • the determination condition for generating the third drawing command indicating the third storage area becomes: if the first storage area and the second storage area are not continuous, and the second storage area and the seventh storage area The areas are discontinuous.
  • the size of the third storage area is the sum of the size of the first storage area, the size of the second storage area and the size of the seventh storage area.
  • step 706 and step 707 the judgment condition for generating the fourth drawing command indicating the fourth storage area becomes, if the first storage area and the second storage area are continuous, and the second storage area and the seventh storage area Continuously, further, the fourth storage area is composed of the first storage area, the second storage area and the seventh storage area.
  • the drawing instruction group of the current image frame may also include four drawing instructions, five drawing instructions, etc. For details, please refer to the relevant description of the three drawing instructions, which will not be repeated here.
  • the CPU can optimize part of the drawing instructions only by using a very small amount of memory resources, so the CPU only needs to send Sending a small number of drawing instructions means that the number of drawing instructions to be processed by the CPU is greatly reduced, which can save a certain amount of CPU resources and reduce the load on the CPU. Furthermore, by comparing the hash values between consecutive image frames, the CPU can reuse the memory resources used to optimize the drawing instructions during the processing of the previous image frame during the processing of the current image frame, thereby improving the memory efficiency. resource utilization.
  • the test data of the application under the embodiment of the application is compared with the test data under the related technology, the average frame rate is increased from 58.6fps to 60.4fps, and the frame rate is increased by 1.8fps; the power consumption is reduced from 924.14mA to 892.94mA, the power consumption is reduced by 31.18mA; the jitter rate is reduced from 2.34% to 0.00%, the worst frame loss is reduced from 15 to 2; the single frame power is increased from 15.7mA to 14.8mA.
  • Fig. 8 is a schematic structural diagram of the instruction processing device provided by the embodiment of the present application. As shown in Fig. 8, the instruction processing device may be the aforementioned instruction processing module, and the device includes:
  • An acquiring module 801 configured to acquire a first drawing instruction and a second drawing instruction
  • the first generating module 802 is configured to generate a third drawing instruction indicating a third storage area if the first storage area indicated by the first drawing instruction is not continuous with the second storage area indicated by the second drawing instruction;
  • the first storage area stores the first index value of the first data
  • the second storage area stores the second index value of the second data
  • the third storage area stores the first index value and the second index value
  • the third The storage area is a continuous storage area, and the first data and the second data are used to render the current image frame.
  • the first drawing instruction includes the starting position of the first storage area and the size of the first storage area
  • the second drawing instruction includes the starting position of the second storage area
  • the first generating module 802 If the difference between the initial position of the first storage area and the initial position of the second storage area is not equal to the size of the first storage area, then generate a third drawing instruction for indicating the third storage area.
  • the first generating module 802 is configured to: if the difference between the starting position of the first storage area and the starting position of the second storage area is not equal to the size of the first storage area, Then acquire the third storage area; store the first index value and the second index value in the third storage area; generate a third drawing instruction including the starting position of the third storage area and the size of the third storage area.
  • the device further includes: a second generating module 803, configured to if the difference between the initial position of the first storage area and the initial position of the second storage area is equal to the first storage area size, generate a fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area, and the fourth storage area includes the first storage area and the second storage area.
  • a second generating module 803 configured to if the difference between the initial position of the first storage area and the initial position of the second storage area is equal to the first storage area size, generate a fourth drawing instruction including the starting position of the first storage area and the size of the fourth storage area, and the fourth storage area includes the first storage area and the second storage area.
  • the first generation module 802 is configured to if the first value determined according to the first drawing instruction and the second drawing instruction is not equal to the second value determined according to the fifth drawing instruction and the sixth drawing instruction , and the difference between the starting position of the first storage area and the starting position of the second storage area is not equal to the size of the first storage area, then the third storage area is acquired; wherein, the fifth drawing instruction is used to indicate the first Five storage areas, the fifth storage area stores the third index value of the third data, the sixth drawing instruction is used to indicate the sixth storage area, the sixth storage area stores the fourth index value of the fourth data, the third data and The fourth data is used for rendering the previous image frame.
  • the device further includes: a third generation module 804, configured to if the first value is equal to the second value, and the difference between the initial position of the first storage area and the initial position of the second storage area If the difference between them is not equal to the size of the first storage area, a third drawing instruction including the starting position of the third storage area and the size of the third storage area is generated.
  • a third generation module 804 configured to if the first value is equal to the second value, and the difference between the initial position of the first storage area and the initial position of the second storage area If the difference between them is not equal to the size of the first storage area, a third drawing instruction including the starting position of the third storage area and the size of the third storage area is generated.
  • the first value is a value obtained by performing hash calculation according to the first drawing instruction and the second drawing instruction
  • the second value is a value obtained by performing hash calculation according to the fifth drawing instruction and the sixth drawing instruction The resulting value.
  • the apparatus further includes: a sending module 805, configured to send the third drawing instruction to the GPU.
  • the apparatus further includes: a sending module 805, configured to send the fourth drawing instruction to the GPU.
  • the first drawing instruction and the second drawing instruction are consecutive drawing instructions.
  • the embodiment of the present application also relates to a computer storage medium, where one or more instructions are stored on the computer storage medium, and when the instructions are executed by one or more computers, the one or more computers implement the method described in FIG. 3 or FIG. 7 . Methods.
  • the embodiment of the present application also relates to a computer program product, the computer program product stores instructions, and when the instructions are executed by a computer, the computer implements the method as described in FIG. 3 or FIG. 7 .
  • the disclosed system, device and method can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.
  • the above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.
  • the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially or part of the contribution to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disc, etc., which can store program codes. .

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Abstract

本申请提供一种指令处理方法及其相关设备，可使得CPU优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。本申请的方法包括：获取第一绘制指令和第二绘制指令；若第一绘制指令指示的第一存储区域与第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令；其中，第一存储区域存有第一数据的第一索引值，第二存储区域存有第二数据的第二索引值，第三存储区域存有第一索引值和第二索引值，第三存储区域为连续的存储区域，第一数据和第二数据用于渲染当前图像帧。

Description

一种指令处理方法及其相关设备
本申请要求于2021年6月30日提交中国专利局、申请号为202110742725.8、发明名称为“一种指令处理方法及其相关设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及图像处理技术领域，尤其涉及一种指令处理方法及其相关设备。
背景技术
随着技术的飞速发展，用户可通过终端设备实现各种各样的娱乐活动，例如，听音乐、看视频、玩游戏等等。为了满足用户的不同需求，终端设备上通常可安装有各种类型的应用。
为了渲染某些大型应用的某一画面(也可称为图像帧)，终端设备的中央处理器(central processing unit，CPU)通常需要接收来自应用的大量绘制指令(draw call，DC)，并将这些绘制指令发送至图形处理器(graphics processing unit，GPU)，使得GPU获取与这些绘制指令对应的渲染数据，再基于渲染数据渲染出该应用的画面，以供用户观看和使用。
在渲染应用的某个图像帧时，CPU需要将大量的绘制指令传输至GPU，即需要处理大量的绘制指令，占用了较多的CPU资源，导致CPU的负载过高。
发明内容
本申请实施例提供了一种指令处理方法及其相关设备，可使得CPU优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。
本申请实施例的第一方面提供了一种指令处理方法，该方法包括：
当应用向CPU发起当前图像帧的渲染请求时，可向CPU发送第一绘制指令和第二绘制指令，其中，第一绘制指令用于指示第一存储区域，第二绘制指令用于指示第二存储区域，第二存储区域存有第二数据的第二索引值，第三存储区域存有第一索引值和第二索引值，第一数据和第二数据用于渲染当前图像帧。
若第一绘制指令指示的第一存储区域与第二绘制指令指示的第二存储区域不连续，CPU则生成用于指示第三存储区域的第三绘制指令，第三存储区域存有第一索引值和第二索引值，第三存储区域为连续的存储区域，第三存储区域与第一存储区域为不同的存储区域，第三存储区域与第二存储区域为不同的存储区域。
得到第三绘制指令后，CPU可将第三绘制指令发送至GPU，以使得GPU根据第三绘制指令确定第三存储区域，并从第三存储区域中获取第一索引值和第二索引值，再基于第一索引值和第二索引值分别获取第一数据和第二数据，从而实现当前图像帧的渲染。
从上述方法可以看出：CPU接收来自应用的第一绘制指令和第二绘制指令，第一绘制指令指示的第一存储区域存有用于渲染当前图像帧的第一数据的第一索引值，第二绘制指令指 示的第二存储区域存有用于渲染当前图像帧的第二数据的第二索引值。若第一存储区域与第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令，第三存储区域为连续的存储区域。由于第三绘制指令指示的第三存储区域存有第一索引值和第二索引值，故CPU仅需向GPU发送第三绘制指令，则可令GPU基于第三绘制指令获取第一数据和第二数据，从而利用第一数据和第二数据渲染当前图像帧。如此一来，CPU可优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。
在一种可能的实现方式中，第一绘制指令包含第一存储区域的起始位置以及第一存储区域的大小，第二绘制指令包含第二存储区域的起始位置，若第一绘制指令指示的第一存储区域与第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令包括：若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令。前述实现方式中，CPU可通过计算第一存储区域的起始位置与第二存储区域的起始位置之间的差值，并检测该差值是否等于第一存储区域的大小，从而精准确定第一存储区域与第二存储区域是否连续。当该差值不等于第一存储区域的大小，CPU则可确定第一存储区域与第二存储区域为不连续。
在一种可能的实现方式中，若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令包括：若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则获取第三存储区域；将第一索引值和第二索引值存入第三存储区域；生成包含第三存储区域的起始位置以及第三存储区域的大小的第三绘制指令。前述实现方式中，CPU确定第一存储区域和第二存储区域不连续后，可申请一块连续的新存储区域作为第三存储区域，第三存储区域的大小通常等于第一存储区域的大小以及第二存储区域的大小之间的和。然后，CPU从第一存储区域中读取第一索引值，从第二存储区域中读取第二索引值，并将第一索引值和第二索引值存入第三存储区域。最后，CPU生成包含第三存储区域在内存中的起始位置以及第三存储区域的大小的第三绘制指令，故第三绘制指令可用于指示第三存储区域。
在一种可能的实现方式中，该方法还包括：若第一存储区域的起始位置与第二存储区域的起始位置之间的差值等于第一存储区域的大小，则生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，第四存储区域包含第一存储区域与第二存储区域。前述实现方式中，当第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小时，CPU则可确定第一存储区域与第二存储区域连续，那么，CPU可将第一存储区域和第二存储区域视为一个整体，即第四存储区域。可以理解的是，第四存储区域的大小等于第一存储区域的大小以及第二存储区域的大小之间的和，第四存储区域在内存中的起始位置即为第一存储区域在内存中的起始位置，CPU则可生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，故第四绘制指令可用于指示第四存储区域。
在一种可能的实现方式中，若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则获取第三存储区域包括：若根据第一绘制指令和第二绘制指令确定的第一数值不等于根据第五绘制指令和第六绘制指令确定的第二数值，且第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则 获取第三存储区域；其中，第五绘制指令用于指示第五存储区域，第五存储区域存有第三数据的第三索引值，第六绘制指令用于指示第六存储区域，第六存储区域存有第四数据的第四索引值，第三数据和第四数据用于渲染前一图像帧。前述实现方式中，CPU可获取根据当前图像帧的第一绘制指令以及第二绘制指令确定的第一数值，以及前一图像帧的第五绘制指令以及第六绘制指令确定的第二数值，若第一数值不等于第二数值，且第一存储区域和第二存储区域不连续，说明第三存储区域在之前(即CPU处理前一图像帧的绘制指令的过程中)未创建，CPU则可申请一块新的存储区域作为第三存储区域，并将第一索引值和第二索引值存入第三存储区域，再生成用于指示第三存储区域的第三绘制指令。
在一种可能的实现方式中，该方法还包括：若第一数值等于第二数值，且第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成包含第三存储区域的起始位置以及第三存储区域的大小的第三绘制指令。前述实现方式中，若第一数值等于第二数值，且第一存储区域和第二存储区域不连续，说明第三存储区域在之前已创建，故CPU可直接复用已创建的第三存储区域，直接生成用于指示第三存储区域的第三绘制指令。
在一种可能的实现方式中，第一数值为根据第一绘制指令和第二绘制指令进行哈希计算所得到的数值，第二数值为根据第五绘制指令和第六绘制指令进行哈希计算所得到的数值。前述实现方式中，CPU可利用第一存储区域的位置、第一存储区域的大小、第二存储区域的位置、第二存储区域的大小等信息进行哈希计算，得到第一数值。同样地，CPU可利用第五存储区域的位置、第五存储区域的大小、第六存储区域的位置以及第六存储区域的大小等信息进行哈希计算，得到第二数值。
在一种可能的实现方式中，生成用于指示第三存储区域的第三绘制指令之后，该方法还包括：将第三绘制指令发送至GPU，以使得GPU根据第三绘制指令确定第三存储区域，并从第三存储区域中获取第一索引值和第二索引值，再基于第一索引值和第二索引值分别获取第一数据和第二数据，从而实现当前图像帧的渲染。
在一种可能的实现方式中，生成包含第一存储区域的大小与第四存储区域的大小的第四绘制指令之后，该方法还包括：将第四绘制指令发送至GPU，以使得GPU根据第四绘制指令确定第四存储区域，并从第四存储区域中获取第一索引值和第二索引值，再基于第一索引值和第二索引值分别获取第一数据和第二数据，从而实现当前图像帧的渲染。
在一种可能的实现方式中，第一绘制指令和第二绘制指令为连续的绘制指令。
本申请实施例的第二方面提供了一种指令处理装置，该装置包括：获取模块，用于获取第一绘制指令和第二绘制指令；第一生成模块，用于若第一绘制指令指示的第一存储区域与第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令；其中，第一存储区域存有第一数据的第一索引值，第二存储区域存有第二数据的第二索引值，第三存储区域存有第一索引值和第二索引值，第三存储区域为连续的存储区域，第一数据和第二数据用于渲染当前图像帧。
从上述装置可以看出：CPU接收来自应用的第一绘制指令和第二绘制指令，第一绘制指令指示的第一存储区域存有用于渲染当前图像帧的第一数据的第一索引值，第二绘制指令指示的第二存储区域存有用于渲染当前图像帧的第二数据的第二索引值。若第一存储区域与第 二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令，第三存储区域为连续的存储区域。由于第三绘制指令指示的第三存储区域存有第一索引值和第二索引值，故CPU仅需向GPU发送第三绘制指令，则可令GPU基于第三绘制指令获取第一数据和第二数据，从而利用第一数据和第二数据渲染当前图像帧。如此一来，CPU可优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。
在一种可能的实现方式中，第一绘制指令包含第一存储区域的起始位置以及第一存储区域的大小，第二绘制指令包含第二存储区域的起始位置，第一生成模块，用于若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令。
在一种可能的实现方式中，第一生成模块，用于：若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则获取第三存储区域；将第一索引值和第二索引值存入第三存储区域；生成包含第三存储区域的起始位置以及第三存储区域的大小的第三绘制指令。
在一种可能的实现方式中，该装置还包括：第二生成模块，用于若第一存储区域的起始位置与第二存储区域的起始位置之间的差值等于第一存储区域的大小，则生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，第四存储区域包含第一存储区域与第二存储区域。
在一种可能的实现方式中，第一生成模块，用于若根据第一绘制指令和第二绘制指令确定的第一数值不等于根据第五绘制指令和第六绘制指令确定的第二数值，且第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则获取第三存储区域；其中，第五绘制指令用于指示第五存储区域，第五存储区域存有第三数据的第三索引值，第六绘制指令用于指示第六存储区域，第六存储区域存有第四数据的第四索引值，第三数据和第四数据用于渲染前一图像帧。
在一种可能的实现方式中，该装置还包括：第三生成模块，用于若第一数值等于第二数值，且第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成包含第三存储区域的起始位置以及第三存储区域的大小的第三绘制指令。
在一种可能的实现方式中，第一数值为根据第一绘制指令和第二绘制指令进行哈希计算所得到的数值，第二数值为根据第五绘制指令和第六绘制指令进行哈希计算所得到的数值。
在一种可能的实现方式中，该装置还包括：发送模块，用于将第三绘制指令发送至GPU。
在一种可能的实现方式中，该装置还包括：发送模块，用于将第四绘制指令发送至GPU。
在一种可能的实现方式中，第一绘制指令和第二绘制指令为连续的绘制指令。
本申请实施例的第三方面提供了一种终端设备，该终端设备包括存储器和处理器；存储器存储有代码，处理器被配置为执行代码，当代码被执行时，终端设备执行如第一方面或第一方面任意一种可能的实现方式所述的方法。
本申请实施例的第四方面提供了一种计算机存储介质，该计算机存储介质存储有一个或多个指令，指令在由一个或多个计算机执行时使得一个或多个计算机实施第一方面或第一方面任意一种可能的实现方式所述的方法。
本申请实施例的第五方面提供了一种计算机程序产品，该计算机程序产品存储有指令，指令在由计算机执行时，使得计算机实施第一方面或第一方面任意一种可能的实现方式所述的方法。
本申请实施例中，CPU接收来自应用的第一绘制指令和第二绘制指令，第一绘制指令指示的第一存储区域存有用于渲染当前图像帧的第一数据的第一索引值，第二绘制指令指示的第二存储区域存有用于渲染当前图像帧的第二数据的第二索引值。若第一存储区域与第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令，第三存储区域为连续的存储区域。由于第三绘制指令指示的第三存储区域存有第一索引值和第二索引值，故CPU仅需向GPU发送第三绘制指令，则可令GPU基于第三绘制指令获取第一数据和第二数据，从而利用第一数据和第二数据渲染当前图像帧。如此一来，CPU可优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。
附图说明
图1为本申请实施例提供的终端设备的一个结构示意图；
图2为本申请实施例提供的终端设备的另一个结构示意图；
图3为本申请实施例提供的指令处理方法的一个流程示意图；
图4为本申请实施例提供的VBO和EBO之间的对应关系的一个示意图；
图5为本申请实施例提供的EBO的一个示意图；
图6为本申请实施例提供的EBO的另一示意图；
图7为本申请实施例提供的指令处理方法的另一流程示意图；
图8为本申请实施例提供的指令处理装置的一个结构示意图。
具体实施方式
本申请实施例提供了一种指令处理方法及其相关设备，可使得CPU优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的术语在适当情况下可以互换，这仅仅是描述本申请的实施例中对相同属性的对象在描述时所采用的区分方式。此外，术语“包括”和“具有”并他们的任何变形，意图在于覆盖不排他的包含，以便包含一系列单元的过程、方法、系统、产品或设备不必限于那些单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它单元。
随着技术的飞速发展，用户可通过终端设备实现各种各样的娱乐活动，例如，听音乐、看视频、玩游戏等等。为了满足用户的不同需求，终端设备上通常可安装有各种类型的应用。
为了渲染某些大型应用的某一画面(也可称为图像帧)，终端设备的CPU通常需要接收来自应用的大量绘制指令，并将这些绘制指令发送至GPU。GPU得到这些绘制指令后，可在这些绘制指令指示的存储区域中获取相应的渲染数据，再基于渲染数据渲染出该应用的画面，以 供用户观看和使用。
在渲染应用的某个图像帧时，CPU需要将大量的指令传输至GPU，即需要处理大量的指令，占用了较多的CPU资源，导致CPU的负载过高。
为了解决上述问题，本申请实施例提供了一种指令处理方法，该方法可通过终端设备实现，下文先对本申请实施例提供的终端设备进行介绍。图1为本申请实施例提供的终端设备的一个结构示意图，如图1所示，终端设备包括：处理器101、微控制器单元(microcontroller unit，MCU)103、存储器105、调制解调器(modem)107、射频(radio frequency，RF)模块109、Wi-Fi模块111、蓝牙模块113、传感器114、定位模块150、输入/输出(input/output,I/O)设备115等部件。这些部件可通过一根或多根通信总线或信号线进行通信。本领域技术人员可以理解，图1中示出的硬件结构并不构成对手机的限定，手机100可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
下面结合图1对终端设备100的各个部件进行具体的介绍：
处理器101是手机100的控制中心，利用各种接口和总线连接终端设备100的各个部件。在一些实施例中，处理器101可包括一个或多个处理单元。
存储器105中存储有计算机程序，诸如图1所示的操作系统161和应用程序163。处理器101被配置用于执行存储器105中的计算机程序，从而实现该计算机程序定义的功能，例如处理器101执行操作系统161从而在终端设备100上实现操作系统161的各种功能(例如，操作系统161可用于实现本申请实施例提供的应用预加载方法)。存储器105还存储有除计算机程序之外的其他数据，诸如操作系统161和应用程序163运行过程中产生的数据。存储器105为非易失性存储介质，一般包括内存和外存。内存包括但不限于随机存取存储器(Random Access Memory，RAM)，或高速缓存(cache)等。外存包括但不限于闪存(flash memory)、硬盘、光盘、通用串行总线(universal serial bus,USB)盘等，其中，硬盘可包含硬盘驱动器(hard disk drive，HDD)和固态硬盘(solid state disk，SSD)。计算机程序通常被存储在外存上，处理器在执行计算机程序前会将该程序从外存加载到内存。
存储器105可以是独立的，通过总线与处理器101相连接；存储器105也可以和处理器101集成到一个芯片子系统。
MCU 103是用于获取并处理来自传感器114的数据的协处理器，MCU 103的处理能力和功耗小于处理器101，但具有“永久开启(always on)”的特点，可以在处理器101处于休眠模式时持续收集以及处理传感器数据，以极低的功耗保障传感器的正常运行。在一个实施例中，MCU103可以为sensor hub芯片。传感器114可以包括光传感器、运动传感器。具体地，光传感器可包括环境光传感器及接近传感器，其中，环境光传感器可根据环境光线的明暗来调节显示器151的亮度，接近传感器可在终端设备100移动到耳边时，关闭显示屏的电源。作为运动传感器的一种，加速计传感器可检测各个方向上(一般为三轴)加速度的大小，静止时可检测出重力的大小及方向；传感器114还可以包括陀螺仪、气压计、湿度计、温度计、红外线传感器等其它传感器，在此不再赘述。MCU 103和传感器114可以集成到同一块芯片上，也可以是分离的元件，通过总线连接。
Modem 107以及射频模块109构成了终端设备100通信子系统，用于实现3GPP、ETSI等无线通信标准协议的主要功能。其中，Modem 107用于编解码、信号的调制解调、均衡等。 射频模块109用于无线信号的接收和发送，射频模块109包括但不限于天线、至少一个放大器、耦合器、双工器等。射频模块109配合Modem 107实现无线通信功能。Modem 107可以作为单独的芯片，也可以与其他芯片或电路在一起形成系统级芯片或集成电路。这些芯片或集成电路可应用于所有实现无线通信功能的终端设备，包括：手机、电脑、笔记本、平板、路由器、可穿戴设备、汽车、家电设备等。
终端设备100还可以使用Wi-Fi模块111，蓝牙模块113等来进行无线通信。Wi-Fi模块111用于为终端设备100提供遵循Wi-Fi相关标准协议的网络接入，终端设备100可以通过Wi-Fi模块111接入到Wi-Fi接入点，进而访问互联网。在其他一些实施例中，Wi-Fi模块111也可以作为Wi-Fi无线接入点，可以为其他终端设备提供Wi-Fi网络接入。蓝牙模块113用于实现终端设备100与其他终端设备(例如手机、智能手表等)之间的短距离通信。本申请实施例中的Wi-Fi模块111可以是集成电路或Wi-Fi芯片等，蓝牙模块113可以是集成电路或者蓝牙芯片等。
定位模块150用于确定终端设备100的地理位置。可以理解的是，定位模块150具体可以是全球定位系统(global position system，GPS)或北斗卫星导航系统、俄罗斯GLONASS等定位系统的接收器。
Wi-Fi模块111，蓝牙模块113和定位模块150分别可以是单独的芯片或集成电路，也可以集成到一起。例如，在一个实施例中，Wi-Fi模块111，蓝牙模块113和定位模块150可以集成到同一芯片上。在另一个实施例中，Wi-Fi模块111，蓝牙模块113、定位模块150以及MCU 103也可以集成到同一芯片中。
输入/输出设备115包括但不限于：显示器151、触摸屏153，以及音频电路155等等。
其中，触摸屏153可采集终端设备100的用户在其上或附近的触摸事件(比如用户使用手指、触控笔等任何适合的物体在触摸屏153上或在触控屏触摸屏153附近的操作)，并将采集到的触摸事件发送给其他器件(例如处理器101)。其中，用户在触摸屏153附近的操作可以称之为悬浮触控；通过悬浮触控，用户可以在不直接接触触摸屏153的情况下选择、移动或拖动目标(例如图标等)。此外，可以采用电阻式、电容式、红外线以及表面声波等多种类型来实现触摸屏153。
显示器(也称为显示屏)151用于显示用户输入的信息或展示给用户的信息。可以采用液晶显示屏、有机发光二极管等形式来配置显示器。触摸屏153可以覆盖在显示器151之上，当触摸屏153检测到触摸事件后，传送给处理器101以确定触摸事件的类型，随后处理器101可以根据触摸事件的类型在显示器151上提供相应的视觉输出。虽然在图1中，触摸屏153与显示器151是作为两个独立的部件来实现终端设备100的输入和输出功能，但是在某些实施例中，可以将触摸屏153与显示器151集成而实现手机100的输入和输出功能。另外，触摸屏153和显示器151可以以全面板的形式配置在终端设备100的正面，以实现无边框的结构。
音频电路1155、扬声器116、麦克风117可提供用户与终端设备100之间的音频接口。音频电路109可将接收到的音频数据转换后的电信号，传输到扬声器113，由扬声器113转换为声音信号输出；另一方面，麦克风114将收集的声音信号转换为电信号，由音频电路109接收后转换为音频数据，再通过Modem 107和射频模块109将音频数据发送给比如另一 终端设备，或者将音频数据输出至存储器105以便进一步处理。
另外，终端设备100还可以具有指纹识别功能。例如，可以在终端设备100的背面(例如后置摄像头的下方)配置指纹采集器件，或者在终端设备100的正面(例如触摸屏153的下方)配置指纹采集器件。又例如，可以在触摸屏153中配置指纹采集器件来实现指纹识别功能，即指纹采集器件可以与触摸屏153集成在一起来实现终端设备100的指纹识别功能。在这种情况下，该指纹采集器件配置在触摸屏153中，可以是触摸屏153的一部分，也可以以其他方式配置在触摸屏153中。本申请实施例中的指纹采集器件的主要部件是指纹传感器，该指纹传感器可以采用任何类型的感测技术，包括但不限于光学式、电容式、压电式或超声波传感技术等。
进一步地，终端设备100搭载的操作系统161可以为iOS、Android、Microsoft或者其它操作系统，本申请实施例对此不作任何限制。
操作系统161可执行如图3所示的指令处理方法中的各个步骤，具体可由应用处理器101执行存储器105中存储的程序来实现。
为了进一步理解终端设备与操作系统之间的关系，下文将结合图2对该关系做进一步的介绍。图2为本申请实施例提供的终端设备的另一个结构示意图，如图2所示，终端设备从逻辑上可划分为硬件层、操作系统层和应用层，下面将对各个层分别进行介绍：
硬件层可包含包括中央处理器(central processing unit,CPU)和图形处理器(graphic processing unit,GPU)等处理设备(相当于图1中的处理器101的一种具体实现)，还可以包括内存和外存等存储设备(相当于图1中的存储器105的一种具体实现)，还可以包括扬声器、麦克风、屏幕等输入输出设备(相当于图1中的I/O设备115的一种具体实现)。当然除此之外，硬件层450还可以包括图1中示出的电源、摄像头、射频模块、定位模块和WiFi模块，还可以包括图1中也没有示出的其他硬件模块，例如内存控制器和显示控制器等。
操作系统层可包含内核层和系统框架层。其中，内核层用于提供底层系统组件和服务，例如，系统内核以及硬件驱动程序等。其中，系统内核可用于实现电源管理、内存管理、进程管理等各种功能，硬件驱动程序包括GPU、照相机、扬声器、麦克风和定位模块等设备的驱动程序。
系统框架层用于为应用层中的各个应用提供各种基础的公共组件和服务，例如，图形库和用于实现本申请实施例提供的方法的指令处理模块等等。其中，图形库也可称为图形应用程序接口(application programming interface，API)，例如，开放图形库(open graphics library,OpenGL)、Vulkan等等。
应用层包含一个或多个应用，例如，摄像软件、通讯软件、办公软件等等。当某个应用启动后，该应用可发起多个连续图像帧(例如，一个视频流等等)的渲染请求。对于任意一个图像帧而言，该图像帧的渲染请求通常包含多个绘制指令(draw call，DC)，每个绘制指令可令GPU实现该图像帧中一部分图像的渲染，故这多个绘制指令可令GPU完成该图像帧的渲染。具体地，应用可通过图形API，将该图像帧的多个绘制指令发送至指令处理模块。接着，指令处理模块可对这多个绘制指令进行处理(例如，进行合并操作等等)，得到处理后的绘制指令。然后，指令处理模块可通过GPU的驱动程序，将处理后的绘制指令发送至GPU， 以使得GPU基于处理后的绘制指令完成该图像帧的渲染。
可以理解的是，由于指令处理模块设于终端设备的操作系统层中，而操作系统由终端设备的CPU运行，故指令处理模块执行的步骤也可视为CPU执行的步骤，后续不再赘述。
为了进一步理解CPU对绘制指令的处理过程，下文结合图3对该过程进行详细介绍(图3为本申请实施例提供的指令处理方法的一个流程示意图)。需要说明的是，终端设备的应用可向CPU发起多个连续图像帧的渲染请求，CPU对每个图像帧的渲染请求的处理是相似的。为了方便说明，下文将以其中一个图像帧进行示意性说明，并将该图像帧设为当前图像帧。
值得注意的是，应用向CPU发起当前图像帧的渲染请求时，会向CPU发送当前图像帧的多个绘制指令，CPU可将这多个绘制指令分为多个绘制指令组。在多个绘制指令组中，每个绘制指令组的所有绘制指令为CPU连续接收到的绘制指令(即每个绘制指令组的所有绘制指令为连续的绘制指令)，绘制指令组之间插入了CPU接收到的其余类型指令。例如，某个游戏应用需要渲染某一画面时，需向CPU发送绘制指令1、绘制指令2、绘制指令3、绘制指令4、绘制指令5以及绘制指令6，以完成该画面的渲染。CPU接收这7个绘制指令的过程中，还接收到了该游戏应用发送的数据拷贝指令1和数据拷贝指令2，CPU接收指令的顺序为绘制指令1、绘制指令2、绘制指令3、数据拷贝指令1、绘制指令4、绘制指令5、数据拷贝指令2、绘制指令6，那么，CPU则会将绘制指令1、绘制指令2和绘制指令3分为一组，将绘制指令4和绘制指令5分为一组，将绘制指令6分为一组。
由于CPU对当前图像帧的每个绘制指令组的处理是相似的，为了方便说明，下文将以当前图像帧的某一个绘制指令组进行示意性说明，设该绘制指令组包含第一绘制指令以及第二绘制指令。如图3所示，该方法包括：
301、CPU获取第一绘制指令和第二绘制指令，第一绘制指令用于指示第一存储区域，第二绘制指令用于指示第二存储区域，第一存储区域存有第一数据的第一索引值，第二存储区域存有第二数据的第二索引值，第一数据和第二数据用于渲染当前图像帧。
CPU接收到包含第一绘制指令以及第二绘制指令的某个绘制指令组后，可解析第一绘制指令以及第二绘制指令，从而得到第一绘制指令包含的信息以及第二绘制指令包含的信息。
具体地，第一绘制指令可包含第一存储区域在内存中的起始位置以及第一存储区域的大小等信息，这些信息可用于确定第一存储区域在内存中的位置(相当于第一绘制指令可用于指示第一存储区域)。第一存储区域存储有第一索引值，第一索引值为存储有第一数据的存储区域在内存中的位置(故第一索引值也可称为第一数据的索引值)，第一数据用于渲染当前图像帧中的一部分图像。同样地，第二绘制指令可包含第二存储区域在内存中的起始位置以及第二存储区域的大小等信息，这些信息可用于确定第二存储区域在内存中的位置(相当于第二绘制指令可用于指示第二存储区域)。第二存储区域存储有第二索引值，第二索引值为存储有第二数据的存储区域在内存中的位置(故第二索引值也可称为第二数据的索引值)，第二数据用于渲染当前图像帧中的另一部分图像。
第一存储区域和第二存储区域为内存的顶点索引缓冲对象(element buffer object，EBO)中的两个存储区域，存有第一数据的存储区域和存有第二数据的存储区域为内存的顶点缓冲对象(vertex buffer object，VBO)中的两个存储区域。EBO和VBO为内存中预先分配的两个区域，VBO存储有用于渲染当前图像帧的数据，EBO存储有用于渲染当前图像帧的数据 的索引值。
为了进一步理解上述各个概念，下文结合图4做进一步的介绍，图4为本申请实施例提供的VBO和EBO之间的对应关系的一个示意图，如图4所示，EBO被划分为多个大小相等的子存储区域，每个子存储区域的大小为2字节，且每个子存储区域存有一个子索引值。VBO也被划分多个大小相等的子存储区域，每个子存储区域存储有用于渲染图像帧的数据。对于任意一个子索引值而言，该子索引值与VBO中的一个子存储区域对应(即该子索引值为VBO中的一个子存储区域在内存中的位置，故该子索引值对应)。
对于CPU接收的某一个绘制指令，该绘制指令可包含EBO中某个子存储区域在内存中的起始位置、子索引值的数量、子索引值的类型(也可以理解为子索引值的大小，通常等于EBO中一个子存储区域的大小)等信息。其中，子索引值的数量与子索引值的类型的乘积即为EBO中至少一个子存储区域(子存储区域的数量等于子索引值的数量)构成的存储区域的大小，故该绘制指令包含的某个子存储区域在内存中的起始位置即为该存储区域在内存中的起始位置，根据该存储区域的起始位置以及该存储区域的大小，可确定该存储区域在内存中的位置。
由于该存储区域由EBO中至少一个子存储区域构成，故该存储区域存有至少一个子索引值。基于该存储区域在内存中的位置，可找到该存储区域，并从中读取这部分子索引值。基于这部分子索引值，可从VBO中找到相应的子存储区域，并从中读取用于渲染图像帧的数据。
如图4所示，设某个绘制指令包含EBO中子存储区域3的起始位置、子索引值的数量为3、子索引值的大小为2字节等信息，故该绘制指令所指示的存储区域1(由EBO中的子存储区域3、子存储区域4、子存储区域5构成的存储区域)的大小为6字节，且该存储区域1的起始位置即为子存储区域3的起始位置，故基于存储区域1的大小和存储区域1的起始位置可计算出存储区域1的终止位置，相当于得到存储区域1的位置。
由于子存储区域3、子存储区域4、子存储区域5分别存储有子索引值3、子索引值4和子索引值5，故基于存储区域1的位置可找到存储区域1，并从中可读取这部分索引值。由于子索引值3、子索引值4和子索引值5分别为VBO中子存储区域30、子存储区域40、子存储区域50的位置，且子存储区域30、子存储区域40、子存储区域50分别存储有数据3、数据4和数据5，故基于这部分索引值，可找到子存储区域30、子存储区域40、子存储区域50，并从中读取数据3、数据4和数据5。可见，子索引值3也可称为数据3的子索引值，子索引值4也可称为数据4的子索引值，子索引值5也可称为数据5的子索引值。
应理解，前述例子中，仅以EBO的子存储区域的大小为2字节进行示意性说明，并不对本实施例中EBO的子存储区域的大小构成限制，EBO的子存储区域的大小可根据实际需求进行设置。
还应理解，基于图4所示的例子可知，存储区域1等同于本实施例提及的第一存储区域或第二存储区域，那么，第一存储区域可包含EBO中的至少一个子存储区域，第一索引值可包含至少一个子索引值，第一数据可包含VBO中的至少一个子存储区域所存储的数据。同样地，第二存储区域、第二索引值和第二数据也是如此，此处不再赘述。
还应理解，本实施例中，EBO中某个子存储区域在内存中的起始位置可为该子存储区域在EBO中的偏移值。如图4所示，在EBO中，以子存储区域0的最左侧为参考点，此处的偏 移值设为0。那么，子存储区域3的最左侧与子存储区域0的最左侧之间的距离，即为子存储区域3的偏移值。
还应理解，本实施例中所涉及的数据，还可以称为顶点数据(或渲染数据)，包含顶点坐标、法线、颜色、纹理等信息，后续不再赘述。
302、CPU检测第一存储区域和第二存储区域是否连续。
得到第一绘制指令包含的信息以及第二绘制指令包含的信息后，CPU可基于第一绘制指令包含的信息以及第二绘制指令包含的信息，检测第一存储区域和第二存储区域是否连续。
具体地，CPU可通过以下方式检测第一存储区域和第二存储区域是否连续：首先，CPU计算第一存储区域在内存中的起始位置与第二存储区域在内存中的起始位置之间的差值。接着，CPU判断该差值是否等于第一存储区域的大小(设CPU先接收到第一绘制指令)，若相等，说明第一存储区域和第二存储区域连续，若不相等，说明第一存储区域和第二存储区域不连续。
303、若第一存储区域和第二存储区域不连续，CPU则生成用于指示第三存储区域的第三绘制指令，第三存储区域存有第一索引值和第二索引值，第三存储区域为连续的存储区域，第三存储区域与第一存储区域为不同的存储区域，第三存储区域与第二存储区域为不同的存储区域。
若第一存储区域在内存中的起始位置与第二存储区域在内存中的起始位置之间的差值不等于第一存储区域的大小，CPU可确定第一存储区域和第二存储区域不连续，故CPU可生成用于指示第三存储区域的第三绘制指令，第三存储区域存有第一索引值和第二索引值，第三存储区域为EBO中一块连续的存储区域。
具体地，CPU可通过以下方式生成第三绘制指令：CPU在EBO中申请一块连续的新存储区域作为第三存储区域，第三存储区域的大小通常等于第一存储区域的大小以及第二存储区域的大小之间的和。然后，CPU从第一存储区域中读取第一索引值，从第二存储区域中读取第二索引值，并将第一索引值和第二索引值存入第三存储区域。最后，CPU获取第三存储区域在内存中的起始位置，并生成包含第三存储区域在内存中的起始位置以及第三存储区域的大小的第三绘制指令，故第三绘制指令可用于指示第三存储区域。
如图5所示(图5为本申请实施例提供的EBO的一个示意图)，设绘制指令1包含存储区域1的起始位置以及存储区域1的大小等信息，存储区域1的大小为6字节(即绘制指令1包含的子索引值的数量为3、子索引值的大小为2字节)。绘制指令2包含存储区域2的起始位置以及存储区域2的大小等信息，存储区域2的大小为4字节(即绘制指令2包含的子索引值的数量为2、子索引值的大小为2字节)。
在EBO中，由于存储区域1的起始位置以及存储区域2的起始位置之间的差值为8字节，该差值大于存储区域1的大小，故CPU可确定存储区域1和存储区域2不连续。那么，CPU可在EBO申请一块大小为10字节的存储区域3，将存储区域1中的子索引值3、子索引值4以及子索引值5，存储区域中的子索引值7和子索引值8依次存入存储区域3中。最后，CPU可生成包含存储区域3的起始位置以及存储区域3的大小等信息的绘制指令3，存储区域3的大小为10字节(即绘制指令3包含的子索引值的数量为5、子索引值的大小为2字节)。
304、若第一存储区域和第二存储区域连续，CPU则生成用于指示第四存储区域的第四绘制指令，第四存储区域包含第一存储区域与第二存储区域。
若第一存储区域在内存中的起始位置与第二存储区域在内存中的起始位置之间的差值等于第一存储区域的大小，CPU可确定第一存储区域和第二存储区域连续。由于第一储区域和第二存储区域连续，CPU可将第一存储区域和第二存储区域视为一个整体，即第四存储区域。可以理解的是，第四存储区域的大小等于第一存储区域的大小以及第二存储区域的大小之间的和，第四存储区域在内存中的起始位置即为第一存储区域在内存中的起始位置，CPU则可生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，故第四绘制指令可用于指示第四存储区域。
如图6所示(图6为本申请实施例提供的EBO的另一示意图)，设绘制指令1包含存储区域1的起始位置以及存储区域1的大小等信息，存储区域1的大小为6字节(即绘制指令1包含的子索引值的数量为3、子索引值的大小为2字节)。绘制指令2包含存储区域2的起始位置以及存储区域2的大小等信息，存储区域2的大小为4字节(即绘制指令2包含的子索引值的数量为2、子索引值的大小为2字节)。
在EBO中，由于存储区域1的起始位置以及存储区域2的起始位置之间的差值为6字节，该差值等于存储区域1的大小，故CPU可确定存储区域1和存储区域2连续。那么，CPU可将存储区域1和存储区域2视为一个整体，即存储区域4，并生成包含存储区域1的起始位置以及存储区域4的大小等信息的绘制指令4，存储区域4的大小为10字节(即绘制指令4包含的子索引值的数量为5、子索引值的大小为2字节)。
305、CPU将第三绘制指令发送至GPU。
得到第三绘制指令后，CPU将第三绘制指令发送至GPU。CPU接收到第三绘制指令后，可解析第三绘制指令，得到第三存储区域在内存中的起始位置以及第三存储区域的大小等信息。接着，GPU基于这部分信息，可确定第三存储区域在内存中的位置，并基于该位置在EBO中找到第三存储区域，以从第三存储区域获取第一索引值和第二索引值。然后，GPU基于第一索引值在VBO中找到相应的存储区域，从中获取第一数据，并基于第二索引值在VBO中找到相应的存储区域，从中获取第二数据。最后，GPU可利用第一数据和第二数据，实现当前图像帧的渲染。
306、CPU将第四绘制指令发送至GPU。
得到第四绘制指令后，CPU将第四绘制指令发送至GPU。CPU接收到第四绘制指令后，可解析第四绘制指令，得到第一存储区域在内存中的起始位置以及第四存储区域的大小等信息。接着，GPU基于这部分信息，可确定第四存储区域在内存中的位置，并基于该位置在EBO中找到第四存储区域，以从第四存储区域获取第一索引值和第二索引值。然后，GPU基于第一索引值在VBO中找到相应的存储区域，从中获取第一数据，并基于第二索引值在VBO中找到相应的存储区域，从中获取第二数据。最后，GPU可利用第一数据和第二数据，实现当前图像帧的渲染。
应理解，本实施例中，仅以CPU接收到的某个绘制指令组包含两个绘制指令(即该绘制指令组仅有第一绘制指令和第二绘制指令)进行示意性说明，并不对该绘制指令组包含的绘制指令的数量构成限制。例如，该绘制指令组可包含三个绘制指令，即第一绘制指令、第二绘制指令以及第七绘制指令，第七绘制指令用于指示第七存储区域。那么，在步骤302中，还需检测第二存储区域以及第七存储区域是否连续，具体过程可参考检测第一存储区域以及 第二存储区域是否连续的相关说明部分。在步骤303中，生成用于指示第三存储区域的第三绘制指令的判定条件则变为：若第一存储区域和第二存储区域不连续，且第二存储区域和第七存储区域不连续，进一步地，第三存储区域的大小为第一存储区域的大小、第二存储区域的大小以及第七存储区域的大小之和。在步骤304中，生成用于指示第四存储区域的第四绘制指令的判断条件则变为，若第一存储区域和第二存储区域连续，且第二存储区域和第七存储区域连续，进一步地，第四存储区域由第一存储区域、第二存储区域以及第七存储区域构成。当然，该绘制指令组还可包含四个绘制指令，五个绘制指令等等，具体可参考三个绘制指令的相关说明，此处不再赘述。
本申请实施例中，CPU接收来自应用的第一绘制指令和第二绘制指令，第一绘制指令指示的第一存储区域存有用于渲染当前图像帧的第一数据的第一索引值，第二绘制指令指示的第二存储区域存有用于渲染当前图像帧的第二数据的第二索引值。若第一存储区域与第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令，第三存储区域为连续的存储区域。由于第三绘制指令指示的第三存储区域存有第一索引值和第二索引值，故CPU仅需向GPU发送第三绘制指令，则可令GPU基于第三绘制指令获取第一数据和第二数据，从而利用第一数据和第二数据渲染当前图像帧。如此一来，CPU可优化掉部分绘制指令，仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。
图7为本申请实施例提供的指令处理方法的另一流程示意图。为了方便说明，下文依旧以当前图像帧的某一个绘制指令组进行示意性说明，设该绘制指令组包含第一绘制指令以及第二绘制指令。如图7所示，该方法包括：
701、CPU获取第一绘制指令和第二绘制指令，第一绘制指令用于指示第一存储区域，第二绘制指令用于指示第二存储区域，第一存储区域存有第一数据的第一索引值，第二存储区域存有第二数据的第二索引值，第一数据和第二数据用于渲染当前图像帧。
本实施例中，关于步骤701的说明，可参考图3所示实施例中步骤301的相关说明部分，此处不再赘述。
702、获取根据第一绘制指令和第二绘制指令确定的第一数值，以及根据第五绘制指令和第六绘制指令确定的第二数值，第五绘制指令用于指示第五存储区域，第五存储区域存有第三数据的第三索引值，第六绘制指令用于指示第六存储区域，第六存储区域存有第四数据的第四索引值，第三数据和第四数据用于渲染前一图像帧。
703、CPU检测第一数值以及第二数值是否相同，且第一存储区域和第二存储区域是否连续。
得到第一绘制指令包含的信息以及第二绘制指令包含的信息后，CPU可基于第一绘制指令包含的信息以及第二绘制指令包含的信息确定第一数值。具体地，CPU可利用第一存储区域在内存中的位置、第一存储区域的大小、第二存储区域在内存中的位置、第二存储区域的大小等信息进行哈希计算，得到第一数值，相当于对包含第一绘制指令和第二绘制指令的绘制指令组进行哈希计算，得到第一数值。
值得注意的是，CPU在处理前一图像帧的渲染请求时，已对前一图像帧的每个绘制指令组进行了哈希计算，得到了前一图像帧的每个绘制指令组经过哈希计算后的数值。那么，CPU 在处理当前图像帧的渲染请求时，得到第一数值后，CPU可将前一图像帧的某些绘制指令组(这些绘制指令组通常仅包含两个绘制指令)经过哈希计算后的数值与第一数值比较，以确定是否存在前一图像帧的某一绘制指令组经过哈希计算后的数值与第一数值相等，若存在，则分别执行步骤704或步骤706，若不存在，则分别执行步骤705或步骤707。
为了方便说明，下文以前一图像帧的任意一个绘制指令组进行示意性介绍，假设该绘制指令组包含第五绘制指令以及第六绘制指令，第五绘制指令用于指示第五存储区域，第五存储区域存有第三数据的第三索引值，第六绘制指令用于指示第六存储区域，第六存储区域存有第四数据的第四索引值，第三数据和第四数据用于渲染前一图像帧，CPU可直接获取利用第五存储区域在内存中的位置、第五存储区域的大小、第六存储区域在内存中的位置、第六存储区域的大小等信息进行哈希计算后得到的第二数值，将第二数值与第一数值进行比较，检测二者是否相等，并检测第一存储区域和第二存储区域是否连续。
关于CPU检测第一存储区域和第二存储区域是否连续的说明，可参考图3所示实施例中步骤302的相关说明部分，此处不再赘述。
704、若第一数值等于第二数值，且第一存储区域和第二存储区域不连续，CPU则生成用于指示第三存储区域的第三绘制指令，第三存储区域存有第一索引值和第二索引值，第三存储区域为连续的存储区域。
若第一数值等于第二数值，且第一存储区域和第二存储区域不连续，说明第一绘制指令和第五绘制指令为相同的指令，第二绘制指令和第六绘制指令为相同的指令，第一存储区域和第五存储区域为同一存储区域，第二存储区域和第六存储区域为同一存储区域，第一索引值和第三索引值为同一索引值，第二索引值和第四索引值为同一索引值，第一数据和第三数据为同一数据，第二数据和第四数据为同一数据，那么，CPU在对前一图像帧的包含第五绘制指令和第六绘制指令的绘制指令组的处理过程中，已经向EBO申请了一块连续的存储区域，即第三存储区域(第三存储区域的大小通常等于第一存储区域的大小以及第二存储区域的大小之间的和)，且将第一索引值和第二索引值存入了第三存储区域中，可见，第三存储区域在之前已创建，故在对当前图像帧的包含第一绘制指令和第二绘制指令的绘制指令组的处理过程中，CPU可直接复用已创建的第三存储区域，即直接生成包含第三存储区域的初始位置以及第三存储区域的大小等信息的第三绘制指令。
705、若第一数值不等于第二数值，且第一存储区域和第二存储区域不连续，CPU则获取第三存储区域，将第一索引值和第二索引值存入第三存储区域，并生成用于指示第三存储区域的第三绘制指令。
若第一数值不等于第二数值，且第一存储区域和第二存储区域不连续，说明第一绘制指令和第五绘制指令为不同的指令，第二绘制指令和第六绘制指令为不同的指令，第一存储区域和第五存储区域为不同的存储区域，第二存储区域和第六存储区域为不同的存储区域，第一索引值和第三索引值为不同的索引值，第二索引值和第四索引值为不同的索引值，第一数据和第三数据为不同的数据，第二数据和第四数据为不同的数据，那么，第三存储区域在之前未创建，故在对当前图像帧的包含第一绘制指令和第二绘制指令的绘制指令组的处理过程中，CPU需在EBO中申请一块连续的新存储区域作为第三存储区域，第三存储区域的大小通常等于第一存储区域的大小以及第二存储区域的大小之间的和。然后，CPU从第一存储区域 中读取第一索引值，从第二存储区域中读取第二索引值，并将第一索引值和第二索引值存入第三存储区域。最后，CPU获取第三存储区域在内存中的起始位置，并生成包含第三存储区域在内存中的起始位置以及第三存储区域的大小的第三绘制指令，故第三绘制指令可用于指示第三存储区域。
706、若第一数值等于第二数值，且第一存储区域和第二存储区域连续，CPU则生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，第四存储区域包含第一存储区域与第二存储区域。
707、若第一数值不等于第二数值，且第一存储区域和第二存储区域连续，CPU则生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令。
无论第一数值是否等于第二数值，只要第一存储区域和第二存储区域连续，CPU则将第一存储区域和第二存储区域视为一个整体，即第四存储区域，其中，第四存储区域的大小等于第一存储区域的大小以及第二存储区域的大小之间的和，第四存储区域在内存中的起始位置即为第一存储区域在内存中的起始位置，故CPU可生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，可见，第四绘制指令可用于指示第四存储区域。
708、CPU将第三绘制指令发送至GPU。
709、CPU将第四绘制指令发送至GPU。
关于步骤708和步骤709的说明，可参考图3所示实施例中步骤305和步骤306的相关说明部分，此处不再赘述。
应理解，本实施例中，仅以CPU接收到的当前图像帧的某个绘制指令组包含两个绘制指令(即该绘制指令组仅有第一绘制指令和第二绘制指令)进行示意性说明，并不对该绘制指令组包含的绘制指令的数量构成限制。例如，该绘制指令组可包含三个绘制指令，即第一绘制指令、第二绘制指令以及第七绘制指令，第七绘制指令用于指示第七存储区域。那么，在步骤702中，第二数值为根据第五绘制指令、第六绘制指令以及第八绘制指令计算得到的(即用于比较数值的前一图像帧的绘制指令组也需包含三个绘制指令)。在步骤703中，还需检测第二存储区域以及第七存储区域是否连续，具体过程可参考检测第一存储区域以及第二存储区域是否连续的相关说明部分。在步骤704和步骤705中，生成用于指示第三存储区域的第三绘制指令的判定条件则变为：若第一存储区域和第二存储区域不连续，且第二存储区域和第七存储区域不连续，进一步地，第三存储区域的大小为第一存储区域的大小、第二存储区域的大小以及第七存储区域的大小之和。在步骤706和步骤707中，生成用于指示第四存储区域的第四绘制指令的判断条件则变为，若第一存储区域和第二存储区域连续，且第二存储区域和第七存储区域连续，进一步地，第四存储区域由第一存储区域、第二存储区域以及第七存储区域构成。当然，当前图像帧的该绘制指令组还可包含四个绘制指令，五个绘制指令等等，具体可参考三个绘制指令的相关说明，此处不再赘述。
本申请实施例中，CPU通过将不连续的存储区域中的索引值，放置于一块连续的存储区域中，仅需使用极少量的内存资源即可优化掉部分绘制指令，故CPU仅需向GPU发送少量的绘制指令，即CPU需处理的绘制指令的数量大幅度减少，可节省一定的CPU资源，降低CPU的负载。进一步地，CPU还通过比较连续图像帧之间的哈希值，可在当前图像帧的处理过程中，复用前一图像帧的处理过程中已用于优化绘制指令的内存资源，从而提高内存资源的利 用率。
此外，通过将本申请实施例提供的指令处理方法与相关技术的指令处理方法应用于同一款应用中，可得到该应用在本申请实施例下和相关技术下的测试数据比较结果，如表1所示：
表1
Figure PCTCN2022101450-appb-000001
基于表1可知，该应用在本申请实施例下的测试数据相较于相关技术下的测试数据，平均帧率由58.6fps提升到60.4fps，帧率提升1.8fps；功耗由924.14mA降低到892.94mA，功耗降低31.18mA；抖动率由2.34％降低到0.00％，最差丢帧由15降低到2；单帧功率由15.7mA提升到14.8mA。
以上是对本申请实施例提供的指令处理方法所进行的详细说明，以下将对本申请实施例提供的指令处理装置进行介绍。图8为本申请实施例提供的指令处理装置的一个结构示意图，如图8所示，该指令处理装置可以为前述的指令处理模块，该装置包括：
获取模块801，用于获取第一绘制指令和第二绘制指令；
第一生成模块802，用于若第一绘制指令指示的第一存储区域与第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令；
其中，第一存储区域存有第一数据的第一索引值，第二存储区域存有第二数据的第二索引值，第三存储区域存有第一索引值和第二索引值，第三存储区域为连续的存储区域，第一数据和第二数据用于渲染当前图像帧。
在一种可能的实现方式中，第一绘制指令包含第一存储区域的起始位置以及第一存储区域的大小，第二绘制指令包含第二存储区域的起始位置，第一生成模块802，用于若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令。
在一种可能的实现方式中，第一生成模块802，用于：若第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则获取第三存储区域；将第一索引值和第二索引值存入第三存储区域；生成包含第三存储区域的起始位置以及第三存储区域的大小的第三绘制指令。
在一种可能的实现方式中，该装置还包括：第二生成模块803，用于若第一存储区域的起始位置与第二存储区域的起始位置之间的差值等于第一存储区域的大小，则生成包含第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，第四存储区域包含第一存储区域与第二存储区域。
在一种可能的实现方式中，第一生成模块802，用于若根据第一绘制指令和第二绘制指令确定的第一数值不等于根据第五绘制指令和第六绘制指令确定的第二数值，且第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则获取第 三存储区域；其中，第五绘制指令用于指示第五存储区域，第五存储区域存有第三数据的第三索引值，第六绘制指令用于指示第六存储区域，第六存储区域存有第四数据的第四索引值，第三数据和第四数据用于渲染前一图像帧。
在一种可能的实现方式中，该装置还包括：第三生成模块804，用于若第一数值等于第二数值，且第一存储区域的起始位置与第二存储区域的起始位置之间的差值不等于第一存储区域的大小，则生成包含第三存储区域的起始位置以及第三存储区域的大小的第三绘制指令。
在一种可能的实现方式中，第一数值为根据第一绘制指令和第二绘制指令进行哈希计算所得到的数值，第二数值为根据第五绘制指令和第六绘制指令进行哈希计算所得到的数值。
在一种可能的实现方式中，该装置还包括：发送模块805，用于将第三绘制指令发送至GPU。
在一种可能的实现方式中，该装置还包括：发送模块805，用于将第四绘制指令发送至GPU。
在一种可能的实现方式中，第一绘制指令和第二绘制指令为连续的绘制指令。
需要说明的是，上述装置各模块/单元之间的信息交互、执行过程等内容，由于与本申请方法实施例基于同一构思，其带来的技术效果与本申请方法实施例相同，具体内容可参考本申请实施例前述所示的方法实施例中的叙述，此处不再赘述。
本申请实施例还涉及一种计算机存储介质，该计算机存储介质存储有一个或多个指令，该指令在由一个或多个计算机执行时使得一个或多个计算机实施如图3或图7所述的方法。
本申请实施例还涉及一种计算机程序产品，该计算机程序产品存储有指令，该指令在由计算机执行时，使得计算机实施如图3或图7所述的方法。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个 人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (23)

  1. 一种指令处理方法，其特征在于，所述方法包括：
    获取第一绘制指令和第二绘制指令；
    若所述第一绘制指令指示的第一存储区域与所述第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令；
    其中，所述第一存储区域存有第一数据的第一索引值，所述第二存储区域存有第二数据的第二索引值，所述第三存储区域存有所述第一索引值和所述第二索引值，所述第三存储区域为连续的存储区域，所述第一数据和所述第二数据用于渲染当前图像帧。
  2. 根据权利要求1所述的方法，其特征在于，所述第一绘制指令包含所述第一存储区域的起始位置以及所述第一存储区域的大小，所述第二绘制指令包含所述第二存储区域的起始位置，所述若所述第一绘制指令指示的第一存储区域与所述第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令包括：
    若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令。
  3. 根据权利要求2所述的方法，其特征在于，所述若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令包括：
    若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则获取第三存储区域；
    将所述第一索引值和所述第二索引值存入所述第三存储区域；
    生成包含所述第三存储区域的起始位置以及所述第三存储区域的大小的第三绘制指令。
  4. 根据权利要求2或3所述的方法，其特征在于，所述方法还包括：
    若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值等于所述第一存储区域的大小，则生成包含所述第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，所述第四存储区域包含所述第一存储区域与所述第二存储区域。
  5. 根据权利要求3所述的方法，其特征在于，所述若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则获取第三存储区域包括：
    若根据所述第一绘制指令和所述第二绘制指令确定的第一数值不等于根据第五绘制指令和第六绘制指令确定的第二数值，且所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则获取第三存储区域；
    其中，所述第五绘制指令用于指示第五存储区域，所述第五存储区域存有第三数据的第三索引值，所述第六绘制指令用于指示第六存储区域，所述第六存储区域存有第四数据的第四索引值，所述第三数据和所述第四数据用于渲染前一图像帧。
  6. 根据权利要求5所述的方法，其特征在于，所述方法还包括：
    若所述第一数值等于所述第二数值，且所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则生成包含所述第三存储区域的起始位置以及所述第三存储区域的大小的第三绘制指令。
  7. 根据权利要求5或6所述的方法，其特征在于，所述第一数值为根据所述第一绘制指令和所述第二绘制指令进行哈希计算所得到的数值，第二数值为根据所述第五绘制指令和所述第六绘制指令进行哈希计算所得到的数值。
  8. 根据权利要求1、2、3或6所述的方法，其特征在于，所述生成用于指示第三存储区域的第三绘制指令之后，所述方法还包括：
    将所述第三绘制指令发送至图形处理器GPU。
  9. 根据权利要求4所述的方法，其特征在于，所述生成包含所述第一存储区域的大小与第四存储区域的大小的第四绘制指令之后，所述方法还包括：
    将所述第四绘制指令发送至GPU。
  10. 根据权利要求1至9任意一项所述的方法，其特征在于，所述第一绘制指令和所述第二绘制指令为连续的绘制指令。
  11. 一种指令处理装置，其特征在于，所述装置包括：
    获取模块，用于获取第一绘制指令和第二绘制指令；
    第一生成模块，用于若所述第一绘制指令指示的第一存储区域与所述第二绘制指令指示的第二存储区域不连续，则生成用于指示第三存储区域的第三绘制指令；
    其中，所述第一存储区域存有第一数据的第一索引值，所述第二存储区域存有第二数据的第二索引值，所述第三存储区域存有所述第一索引值和所述第二索引值，所述第三存储区域为连续的存储区域，所述第一数据和所述第二数据用于渲染当前图像帧。
  12. 根据权利要求11所述的装置，其特征在于，所述第一绘制指令包含所述第一存储区域的起始位置以及所述第一存储区域的大小，所述第二绘制指令包含所述第二存储区域的起始位置，所述第一生成模块，用于若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则生成用于指示第三存储区域的第三绘制指令。
  13. 根据权利要求12所述的装置，其特征在于，所述第一生成模块，用于：
    若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则获取第三存储区域；
    将所述第一索引值和所述第二索引值存入所述第三存储区域；
    生成包含所述第三存储区域的起始位置以及所述第三存储区域的大小的第三绘制指令。
  14. 根据权利要求12或13所述的装置，其特征在于，所述装置还包括：第二生成模块，用于若所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值等于所述第一存储区域的大小，则生成包含所述第一存储区域的起始位置与第四存储区域的大小的第四绘制指令，所述第四存储区域包含所述第一存储区域与所述第二存储区域。
  15. 根据权利要求13所述的装置，其特征在于，所述第一生成模块，用于若根据所述第一绘制指令和所述第二绘制指令确定的第一数值不等于根据第五绘制指令和第六绘制指令确定的第二数值，且所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则获取第三存储区域；
    其中，所述第五绘制指令用于指示第五存储区域，所述第五存储区域存有第三数据的第三索引值，所述第六绘制指令用于指示第六存储区域，所述第六存储区域存有第四数据的第 四索引值，所述第三数据和所述第四数据用于渲染前一图像帧。
  16. 根据权利要求15所述的装置，其特征在于，所述装置还包括：第三生成模块，用于若所述第一数值等于所述第二数值，且所述第一存储区域的起始位置与所述第二存储区域的起始位置之间的差值不等于所述第一存储区域的大小，则生成包含所述第三存储区域的起始位置以及所述第三存储区域的大小的第三绘制指令。
  17. 根据权利要求15或16所述的装置，其特征在于，所述第一数值为根据所述第一绘制指令和所述第二绘制指令进行哈希计算所得到的数值，第二数值为根据所述第五绘制指令和所述第六绘制指令进行哈希计算所得到的数值。
  18. 根据权利要求11、12、13或16所述的装置，其特征在于，所述装置还包括：发送模块，用于将所述第三绘制指令发送至GPU。
  19. 根据权利要求14所述的装置，其特征在于，所述装置还包括：发送模块，用于将所述第四绘制指令发送至GPU。
  20. 根据权利要求11至19任意一项所述的装置，其特征在于，所述第一绘制指令和所述第二绘制指令为连续的绘制指令。
  21. 一种终端设备，其特征在于，所述终端设备包括存储器和处理器；所述存储器存储有代码，所述处理器被配置为执行所述代码，当所述代码被执行时，所述终端设备执行如权利要求1至10任一所述的方法。
  22. 一种计算机存储介质，其特征在于，所述计算机存储介质存储有一个或多个指令，所述指令在由一个或多个计算机执行时使得所述一个或多个计算机实施权利要求1至10任一所述的方法。
  23. 一种计算机程序产品，其特征在于，所述计算机程序产品存储有指令，所述指令在由计算机执行时，使得所述计算机实施权利要求1至10任意一项所述的方法。
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