WO2023273015A1 - 一种进程迁移方法、装置、计算设备以及存储介质 - Google Patents

一种进程迁移方法、装置、计算设备以及存储介质 Download PDF

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WO2023273015A1
WO2023273015A1 PCT/CN2021/124293 CN2021124293W WO2023273015A1 WO 2023273015 A1 WO2023273015 A1 WO 2023273015A1 CN 2021124293 W CN2021124293 W CN 2021124293W WO 2023273015 A1 WO2023273015 A1 WO 2023273015A1
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load
processor
task
active
computing device
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PCT/CN2021/124293
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English (en)
French (fr)
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叶中玉
周鹏
余昇锦
胡翔
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统信软件技术有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load

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  • the present invention relates to the field of the Internet, in particular to a process migration method, device, computing equipment and storage medium.
  • the current load balancing implementation uses the task layered load (task_h_load), which considers the load contribution of the current process to the current processor, and judges whether a task meets the migration conditions according to the size of the task layered load.
  • task_h_load the task layered load
  • the existing process migration methods have the following problems. In a full-load scenario, a high-load process may migrate across processors or even across memory nodes due to the influence of a background low-load process, causing serious cache failures and affecting Normal performance for high load processes.
  • the present invention is proposed to provide a process migration method, device, computing device, and storage medium that overcome the above problems or at least partially solve the above problems.
  • a process migration method which is executed in a computing device, and the method includes: determining the active process from each process based on the real load of each process in the processor; judging whether the active process is a processing the only active process in the processor; if it is not the only active process, sequentially determine the task layered load of the process; when the task layered load of the process meets the preset condition, migrate the process to other processors.
  • the step of sequentially determining the task layered load of the process includes: polling the linked list stored in each process in the processor to obtain each process The joining order of each process; according to the joining order of each process from the back to the front, the task layered load of the process is determined in turn.
  • a step is further included: counting the number of active processes in the processor .
  • the step of calculating the real load includes: obtaining time information of each process in a working state and a non-working state respectively; based on the time information, calculating the real load of each process .
  • the step of calculating the task hierarchical load includes: obtaining the number of processors of the process in the corresponding group; obtaining the process load of the process in the corresponding group; combining the process load with the The ratio of the number of processors mentioned above is used as the task layering load of the process.
  • the step of determining the active process from each process includes: if the real load of the process is greater than a preset load threshold, determining The process is active.
  • the step of migrating the process to another processor includes: judging whether the task hierarchical load of the process is less than the load half of the imbalance value; if so, migrate the process to a different processor.
  • a process migration device which includes: a process state determination module, adapted to determine the active process from each process based on the actual load of each process in the processor; a judgment module, adapted to It is used for judging whether the active process is the only active process in the processor; the process task hierarchical load determination module is suitable for sequentially determining the task hierarchical load of the process; and the process migration module is suitable for migrating the process to other processors.
  • a computing device comprising: at least one processor; and a memory storing program instructions, wherein the program instructions are configured to be executed by the at least one processor, the The program instructions described above include instructions for performing the methods described above.
  • a readable storage medium storing program instructions, and when the program instructions are read and executed by a computing device, the computing device is made to execute the above method.
  • the dual effects of the task real load of the process and the task layered load are considered comprehensively.
  • the low-load process newly added to the processor is preferentially migrated. Migration of the high real load process is avoided, thereby ensuring the normal performance of the high load process.
  • the influence of the background process on the main process is reduced, and the main process will not be affected by the background to cause process migration across processors or even across memory nodes.
  • the cache memory utilization rate The highest, the program running performance is also the best.
  • FIG. 1 shows a schematic diagram of a principle 100 of process migration
  • FIG. 2 shows a flowchart of a process migration method 200 in the prior art
  • FIG. 3 shows a schematic diagram of a computing device 300 according to one embodiment of the present invention
  • FIG. 4 shows a flowchart of a process migration method 400 according to an embodiment of the present invention.
  • FIG. 5 shows a structural diagram of a process migration apparatus 500 according to an embodiment of the present invention.
  • the load of the processor process queue is the sum of the loads of all processes on the process queue.
  • the load of a process is related to the actual running time of the process. Basically, the longer the continuous running time, the higher the load. Therefore, the goal of load balancing is to use processor computing resources as much as possible so that each process can get sufficient processor time. In order to achieve this goal, it is necessary to select a suitable process from a busy processor with a large number of processes in the run queue and a relatively large total load (generally, a process with a small load is easy to meet the migration conditions) and migrate to a relatively idle processor. superior.
  • FIG. 1 which shows a schematic diagram of a process migration principle 100
  • the processes running on processor 0 include process 1 , process 2 and process 3
  • the processes running on processor 1 include process 4 .
  • Processor 0 is a busy processor.
  • Process 3 in Processor 0 may be migrated to Processor 1 to achieve system load balancing.
  • FIG. 2 shows a flow chart of a method 200 for implementing process migration in the prior art.
  • each process on the busy processor is polled sequentially. Then judge whether the task layered load of the process meets the migration requirement. Finally, the process that meets the migration requirements is migrated from the busy processor to the idle processor.
  • the process migration method uses task layered load, that is, considers the load contribution of the current process to the current processor, and judges whether a task meets the migration condition according to the size of the task layered load.
  • the specified program is run with full threads.
  • Process 1 continuously running user process:
  • task group A there are a total of 10 processes in the group, distributed on 10 processors;
  • task group B there is a total of 1 process in the group, which is distributed on 1 processor;
  • the layered load of the background process > the layered load of the working process.
  • a process with a small load can easily meet the migration conditions, and when multiple tasks on one processor meet the migration conditions, then Migration is performed in the order in which tasks are added to the run queue, and the processes that join the run queue first are migrated first, so user processes that generally continue to run will be migrated away.
  • a high-load process may migrate across processors or even memory nodes due to the influence of a background low-load process. This will cause serious cache failure and affect the normal performance of the high-load process.
  • FIG. 3 shows a structural diagram of a computing device 300 according to an embodiment of the present invention.
  • computing device 300 in a basic configuration 302 , typically includes system memory 306 and one or more processors 304 .
  • a memory bus 308 may be used for communication between the processor 304 and the system memory 306 .
  • processor 304 may be any type of processing including, but not limited to, a microprocessor ( ⁇ P), microcontroller ( ⁇ C), digital signal processor (DSP), or any combination thereof.
  • Processor 304 may include one or more levels of cache such as L1 cache 310 and L2 cache 312 , processor core 314 and registers 316 .
  • Exemplary processor core 314 may include an arithmetic logic unit (ALU), a floating point unit (FPU), a digital signal processing core (DSP core), or any combination thereof.
  • ALU arithmetic logic unit
  • FPU floating point unit
  • DSP core digital signal processing core
  • An example memory controller 318 may be used with the processor 304 or, in some implementations, the memory controller 318 may be an internal part of the processor 304 .
  • system memory 306 may be any type of memory including, but not limited to: volatile memory (such as RAM), non-volatile memory (such as ROM, flash memory, etc.), or any combination thereof.
  • volatile memory such as RAM
  • non-volatile memory such as ROM, flash memory, etc.
  • the physical memory in the computing device usually refers to a volatile memory RAM, and the data in the disk needs to be loaded into the physical memory before being read by the processor 304 .
  • System memory 306 may include operating system 320 , one or more applications 322 , and program data 324 .
  • the application 322 is actually a plurality of program instructions, which are used to instruct the processor 304 to perform corresponding operations.
  • applications 322 may be arranged to execute instructions on an operating system with program data 324 by one or more processors 304 .
  • the operating system 320 may be, for example, Linux, Windows, etc., which includes program instructions for handling basic system services and performing hardware-dependent tasks.
  • the application 322 includes program instructions for realizing various user-desired functions.
  • the application 322 may be, for example, a browser, instant messaging software, software development tools (such as an integrated development environment IDE, a compiler, etc.), but is not limited thereto.
  • a driver module may be added to the operating system 320 .
  • the processor 304 When the computing device 300 starts to run, the processor 304 reads program instructions of the operating system 320 from the memory 306 and executes them.
  • the application 322 runs on the operating system 320, and uses the interface provided by the operating system 320 and the underlying hardware to realize various user-desired functions.
  • the application 322 is loaded into the memory 306 , and the processor 304 reads and executes the program instructions of the application 322 from the memory 306 .
  • Computing device 300 also includes storage device 332 , which includes removable storage 336 and non-removable storage 338 , both of which are connected to storage interface bus 334 .
  • Computing device 300 may also include interface bus 340 to facilitate communication from various interface devices (eg, output devices 342 , peripheral interfaces 344 , and communication devices 346 ) to base configuration 302 via bus/interface controller 330 .
  • Example output devices 342 include a graphics processing unit 348 and an audio processing unit 350. They may be configured to facilitate communication with various external devices such as a display or speakers via one or more A/V ports 352 .
  • Example peripherals interfaces 344 may include serial interface controller 354 and parallel interface controller 356, which may be configured to facilitate communication via one or more I/O ports 358 and input devices such as (e.g., keyboard, mouse, pen) , voice input device, touch input device) or other peripherals (such as printers, scanners, etc.) to communicate with external devices such as.
  • An example communication device 346 may include a network controller 360 that may be arranged to facilitate communication with one or more other computing devices 362 over a network communication link via one or more communication ports 364 .
  • a network communication link may be one example of a communication medium.
  • Communication media typically embodies computer readable instructions, data structures, program modules in a modulated data signal such as a carrier wave or other transport mechanism and may include any information delivery media.
  • a "modulated data signal" may be a signal that has one or more of its data sets or changes thereof in such a manner as to encode information in the signal.
  • communication media may include wired media such as a wired or dedicated-line network, and various wireless media such as acoustic, radio frequency (RF), microwave, infrared (IR) or other wireless media.
  • RF radio frequency
  • IR infrared
  • the term computer readable media as used herein may include both storage media and communication media.
  • Computing device 300 also includes a storage interface bus 334 coupled to bus/interface controller 330 .
  • the storage interface bus 334 is connected to the storage device 332, and the storage device 332 is suitable for data storage.
  • Exemplary storage devices 332 may include removable storage 336 (eg, CD, DVD, USB stick, removable hard disk, etc.) and non-removable storage 338 (eg, hard disk drive HDD, etc.).
  • application 322 includes a plurality of program instructions for performing method 400 .
  • FIG. 4 shows a flowchart of a process migration method 400 according to an embodiment of the present invention.
  • the method 400 is suitable for execution in a computing device, such as the aforementioned computing device 300 .
  • the purpose of the method 400 is to implement a method for process migration, starting from step S402.
  • step S402 based on the real load of each process in the processor, an active process is determined from each process.
  • step S402 before the execution of step S402, it has been determined that there is load imbalance in the computing device at this time, and the process on the processor needs to be migrated, and the load imbalance can be determined based on The aforementioned content or the existing load balancing strategy is known, and will not be repeated here.
  • process migration method is applicable to a scenario where each process runs on a processor at full load or close to full load, that is, the processor usage rate is close to 100%.
  • the real load of the process can be calculated through the following steps.
  • Step S422 obtaining the time information of each process in the working state and in the non-working state respectively.
  • the process runs intermittently. After running for a period of time, the processor will stop running the process for a period of time and turn to run other processes. When other processes are stopped running, the processor will then run the process again.
  • the time in the working state is the running time of the process.
  • step S424 the real load of each process is calculated based on the time information.
  • the process load is the accumulation of multiple running times, and the load in the previous running time needs to be attenuated, and the attenuation coefficient is related to the time when the process is in a non-working state.
  • the real load of the process After the real load of the process is obtained, it is compared with the preset load threshold. When the real load of the process is greater than the load threshold, the process is judged as an active process, otherwise it is an inactive process.
  • the setting of the load threshold may be set by those skilled in the art or according to the properties of the computing device, which is not limited in this embodiment.
  • step S404 it is determined whether the active process is the only active process in the processor.
  • step S402 the status of each process (active process or inactive process) in the processor has been determined through the actual load of each process, and it can be directly determined whether the target process is the only active process in the processor.
  • the number of active processes in the processor may be counted first before step S404 is executed.
  • step S406 if it is not the only active process, then sequentially determine the task hierarchical load of the process. Polling determines the task-tiered load of each process on that processor, starting with the last process enqueued to run.
  • the linked list stored with each process in the processor is polled to obtain the joining order of each process; the task hierarchical load of the process is sequentially determined according to the joining order of each process from back to front.
  • the process After the process joins the process queue, it will be placed at the head of the specified linked list. Therefore, starting from the head of the linked list, the process can be polled according to the time of joining the process queue. That is to say, the order of joining the process can be obtained by polling the linked list. Know.
  • the calculation steps of the task load of each process are as follows: obtain the number of processors of the process in the corresponding group; obtain the process load of the process in the corresponding group; compare the process load with the number of the processors Ratio, as the task-tiered load for the process.
  • calculation steps of the task load are applicable to a scenario where each process in the group is running at full load or close to full load on the processor.
  • the formula for calculating the conventional task layered load is as follows:
  • Task hierarchical load real load of the process * relative top-level load of the upper-level queue/load of the upper-level queue;
  • the process is located in task group 0, and there are 5 processors distributed in the group, and each process in task group 0 is running at full load.
  • step S408 when the task layered load of the process satisfies a preset condition, the process is migrated to other processors.
  • the load imbalance value is calculated according to the current load value of the computing device. It is judged whether the task layered load of the process is less than half of the load imbalance value. If so, migrate the process to another processor.
  • the load value of the computing device is not a fixed value, it changes with the operation of each process, therefore, the load imbalance value also changes from time to time. All in all, the smaller the task layering load, the easier it is to meet the conditions for migration.
  • FIG. 5 shows a structural diagram of a process migration apparatus 500 according to an embodiment of the present invention.
  • the device 500 includes a state determination module, adapted to determine the active process from each process based on the real load of each process in the processor; a judging module, adapted to judge whether the active process is the only active process in the processor. a process; a task-hierarchical load determination module adapted to sequentially determine a task-hierarchical load of the process; and a migration module adapted to migrate the process to another processor.
  • This embodiment considers the dual effects of the real load of the task and the layered load of the task on the load balancing task migration standard.
  • the process that is newly added to the processor is preferentially migrated. low load process.
  • the influence of the background process on the main process is reduced, and the main process will not be affected by the background to cause process migration across processors or even across memory nodes.
  • the cache memory utilization rate is the highest, and the program running performance is also low. most.
  • the various techniques described herein can be implemented in conjunction with hardware or software, or a combination thereof.
  • the method and device of the present invention, or certain aspects or parts of the method and device of the present invention may be embedded in a tangible medium, such as a removable hard disk, USB flash drive, floppy disk, CD-ROM or any other machine-readable storage medium
  • program code ie, instructions
  • a machine such as a computer
  • the program when the program is loaded into a machine such as a computer and executed by the machine, the machine becomes an apparatus for practicing the invention.
  • the computing device In the case of program code execution on a programmable computer, the computing device generally includes a processor, a storage medium readable by the processor (including volatile and non-volatile memory and/or storage elements), at least one input device, and at least one output device.
  • the memory is configured to store program code; the processor is configured to execute the method of the present invention according to instructions in the program code stored in the memory.
  • Readable media include, by way of example and not limitation, readable storage media and communication media.
  • Readable storage media store information such as computer readable instructions, data structures, program modules or other data.
  • Communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. Combinations of any of the above are also included within the scope of readable media.
  • modules or units or components of the devices in the examples disclosed herein may be arranged in the device as described in this embodiment, or alternatively may be located in a different location than the device in this example. in one or more devices.
  • the modules in the preceding examples may be combined into one module or furthermore may be divided into a plurality of sub-modules.
  • modules in the device in the embodiment can be adaptively changed and arranged in one or more devices different from the embodiment.
  • Modules or units or components in the embodiments may be combined into one module or unit or component, and furthermore may be divided into a plurality of sub-modules or sub-units or sub-assemblies.
  • All features disclosed in this specification including accompanying claims, abstract and drawings) and any method or method so disclosed may be used in any combination, except that at least some of such features and/or processes or units are mutually exclusive. All processes or units of equipment are combined.
  • Each feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
  • a processor with the necessary instructions for carrying out the described method or element of a method forms a means for carrying out the method or element of a method.
  • an element described herein of an apparatus embodiment is an example of a means for carrying out the function performed by the element for the purpose of carrying out the invention.

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Abstract

本发明公开了一种进程迁移方法、装置、计算设备以及存储介质，进程迁移方法在计算设备中执行，该方法包括：基于处理器中各进程的真实负载，从各进程中确定出活跃进程；判断活跃进程是否为处理器中的唯一活跃进程；若不是唯一活跃进程，则依序确定进程的任务分层负载；当进程的任务分层负载满足预设条件时，将进程迁移到其它处理器。

Description

一种进程迁移方法、装置、计算设备以及存储介质 技术领域.
本发明涉及互联网领域，具体涉及一种进程迁移方法、装置、计算设备以及存储介质。
背景技术
在多核SMP(对称多处理机)系统里，合理的任务调度是发挥多核系统潜力的重要前提。基于多核的调度，目前是在每个处理器上运行一个进程队列。并且，一个处于可执行状态的进程可以加入到其他运行队列上，来实现各个处理器之间的负载均衡，避免出现部分处理器忙碌，另一部分处理器空闲的情况。
目前的负载均衡实现，使用的是任务分层负载(task_h_load)，即考虑当前进程对当前处理器带来的负载贡献，根据任务分层负载的大小，来判断一个任务能否满足迁移的条件。但是，现有的进程迁移方法存在以下问题，在满负荷场景，会出现高负载进程由于一个后台低负载进程影响，发生跨处理器甚至跨内存节点迁移的现象，造成严重的缓存失效，进而影响高负载进程的正常性能。
发明内容
鉴于上述问题，提出了本发明以便提供一种克服上述问题或者至少部分地解决上述问题的进程迁移方法、装置、计算设备以及存储介质。
根据本发明的一个方面，提供一种进程迁移方法，在计算设备中执行，所述方法包括：基于处理器中各进程的真实负载，从各进程中确定出活跃进 程；判断活跃进程是否为处理器中的唯一活跃进程；若不是唯一活跃进程，则依序确定进程的任务分层负载；当进程的任务分层负载满足预设条件时，将进程迁移到其它处理器。
可选地，在根据本发明的进程迁移方法中，若不是唯一活跃进程，则依序确定进程的任务分层负载的步骤包括：轮询存储有处理器中各进程的链表，以获取各进程的加入顺序；按各进程从后往前的加入顺序，依次确定进程的任务分层负载。
可选地，在根据本发明的进程迁移方法中，在基于处理器中各进程的真实负载，从各进程中确定出活跃进程的步骤之后，还包括步骤：统计处理器中活跃进程的个数。
可选地，在根据本发明的进程迁移方法中，真实负载的计算步骤包括：分别获取各进程在处于工作状态下和处于非工作状态下的时间信息；基于时间信息，计算各进程的真实负载。
可选地，在根据本发明的进程迁移方法中，任务分层负载的计算步骤包括：获取进程在对应分组内的处理器个数；获取进程在对应分组内的进程负载；将进程负载与所述处理器的个数的比值，作为该进程的任务分层负载。
可选地，在根据本发明的进程迁移方法中，基于处理器中各进程的真实负载，从各进程中确定出活跃进程的步骤包括：若进程的真实负载大于预设的负载阈值，则确定该进程为活跃进程。
可选地，在根据本发明的进程迁移方法中，当进程的任务分层负载满足预设条件时，将进程迁移到其它处理器的步骤包括：判断进程的任务分层负载是否小于所述负载不均衡值的一半；若是，则将进程迁移到其他处理器。
根据本发明的又一个方面，提供了一种进程迁移装置，该装置包括：进程状态确定模块，适于基于处理器中各进程的真实负载，从各进程中确定出活跃进程；判断模块，适于判断活跃进程是否为处理器中的唯一活跃进程；进程任务分层负载确定模块，适于依序确定进程的任务分层负载；以及进程迁移模块，适于将进程迁移到其它处理器。
根据本发明的又一个方面，提供一种计算设备，包括：至少一个处理器；和存储有程序指令的存储器，其中，所述程序指令被配置为适于由所述至少一个处理器执行，所述程序指令包括用于执行上述方法的指令。
根据本发明的又一个方面，提供一种存储有程序指令的可读存储介质，当所述程序指令被计算设备读取并执行时，使得所述计算设备执行上述的方法。
根据本发明的方案，综合考虑了进程的任务真实负载以及任务分层负载的双重影响，当处理器上只有一个高真实负载的进程时，优先迁移新加入到该处理器上的低负载进程，避免迁移该高真实负载进程，进而保证了高负载进程的正常性能。
根据本发明的方案，在满线程用例场景下，减少了后台进程对主进程的影响，主要进程不会受后台影响而发生跨处理器甚至跨内存节点的进程迁移，此时高速缓冲存储器利用率最高，程序运行性能也最好。
上述说明仅是本发明技术方案的概述，为了能够更清楚了解本发明的技术手段，而可依照说明书的内容予以实施，并且为了让本发明的上述和其它目的、特征和优点能够更明显易懂，以下特举本发明的具体实施方式。
附图说明
通过阅读下文优选实施方式的详细描述，各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的，而并不认为是对本发明的限制。而且在整个附图中，用相同的参考符号表示相同的部件。在附图中：
图1示出了进程迁移的原理100示意图；
图2示出了现有技术中一种进程迁移方法200的流程图；
图3示出了根据本发明一个实施例的计算设备300的示意图；
图4示出了根据本发明一个实施例的进程迁移方法400的流程图。
图5示出了根据本发明一个实施例的进程迁移装置500的结构图。
具体实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例，然而应当理解，可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反，提供这些实施例是为了能够更透彻地理解本公开，并且能够将本公开的范围完整的传达给本领域的技术人员。
负载均衡里一个比较重要的部分，就是如何在处理器进程队列里选择合适的进程进行迁移。具体地，处理器进程队列的负载为进程队列上所有进程的负载之和，一个进程的负载与进程的实际运行时间有关，基本上连续运行时间越长，负载越高。因此负载均衡的目标就是尽可能的利用处理器算力资源，让每个进程能够得到充分的处理器时间。为了实现这个目标，需要从运行队列里进程比较多的、总负载比较大的忙碌处理器上，选择合适的进程(一般负载较小的进程容易满足迁移的条件)迁移到相对比较空闲的处理器上。
如图1所示，图1示出了进程迁移的原理100示意图，处理器0中运行的进程有进程1、进程2和进程3，处理器1中运行的进程有进程4。处理器0相较与处理1而言，属于忙碌处理器，此时，例如可以将处理器0中的进程3迁移至处理器1中，以此来实现系统的负载均衡。
图2示出现有技术中一种实现进程迁移方法200的流程图，在开始进程迁移流程后，首先按照顺序轮询忙碌处理器上的每个进程。然后判断进程的任务分层负载是否满足迁移要求。最后将满足迁移要求的进程从忙碌处理器上迁移至空闲处理器。该进程迁移方法使用的是任务分层负载，即考虑当前进程对当前处理器带来的负载贡献，根据任务分层负载的大小，来判断一个任务能否满足迁移的条件。
而任务分层负载在开启组调度的场景下，同一个组里运行的任务越多，由于一个任务组的权重在不主动调整时为默认值，因此平均到一个处理器上的任务权重小于标准值，导致任务的分层负载(task_h_load)＝任务负载/cpu个数，此时可能后台进程负载>＝工作进程负载。
在一个具体示例中，在开启组调度后，满线程运行指定程序。
进程1(持续运行的用户进程)：
位于任务组A内，组内一共10个进程，分布在10个处理器上；
进程负载task_load＝1000；
则进程的分层负载task_h_load＝1000/10＝100。
进程2(周期性运行的后台进程)：
位于任务组B内，组内一共1个进程，分布在1个处理器上；
进程负载task_load＝120；
则进程的分层负载task_h_load＝120/1＝120。
此时后台进程的分层负载>＝工作进程的分层负载，前述提到，一般负载较小的进程容易满足迁移的条件，并且，当一个处理器上多个任务都满足迁移的条件，那么按照任务加入运行队列的顺序进行迁移，优先迁移先加入运行队列的进程，所以一般持续运行的用户进程会被迁移走。在满负荷场景，会出现高负载进程由于一个后台低负载进程影响，发生跨处理器甚至跨内存节点迁移的现象，这会造成严重的缓存失效，进而影响高负载进程的正常性能。
为解决上述现有技术中存在的问题，提出本发明的技术方案。本发明的一个实施例提供了一种进程迁移方法，该进程迁移方法可以在计算设备中执行。具体地，图3示出了根据本发明一个实施例的计算设备300的结构图。如图3所示，在基本的配置302中，计算设备300典型地包括系统存储器306和一个或者多个处理器304。存储器总线308可以用于在处理器304和系统存储器306之间的通信。
取决于期望的配置，处理器304可以是任何类型的处理，包括但不限于：微处理器(μP)、微控制器(μC)、数字信息处理器(DSP)或者它们的任何组合。处理器304可以包括诸如一级高速缓存310和二级高速缓存312之类的一个或者多个级别的高速缓存、处理器核心314和寄存器316。示例的处理器核心314可以包括运算逻辑单元(ALU)、浮点数单元(FPU)、数 字信号处理核心(DSP核心)或者它们的任何组合。示例的存储器控制器318可以与处理器304一起使用，或者在一些实现中，存储器控制器318可以是处理器304的一个内部部分。
取决于期望的配置，系统存储器306可以是任意类型的存储器，包括但不限于：易失性存储器(诸如RAM)、非易失性存储器(诸如ROM、闪存等)或者它们的任何组合。计算设备中的物理内存通常指的是易失性存储器RAM，磁盘中的数据需要加载至物理内存中才能够被处理器304读取。系统存储器306可以包括操作系统320、一个或者多个应用322以及程序数据324。应用322实际上是多条程序指令，其用于指示处理器304执行相应的操作。在一些实施方式中，在一些实施方式中，应用322可以布置为在操作系统上由一个或多个处理器304利用程序数据324执行指令。操作系统320例如可以是Linux、Windows等，其包括用于处理基本系统服务以及执行依赖于硬件的任务的程序指令。应用322包括用于实现各种用户期望的功能的程序指令，应用322例如可以是浏览器、即时通讯软件、软件开发工具(例如集成开发环境IDE、编译器等)等，但不限于此。当应用322被安装到计算设备300中时，可以向操作系统320添加驱动模块。
在计算设备300启动运行时，处理器304会从存储器306中读取操作系统320的程序指令并执行。应用322运行在操作系统320之上，利用操作系统320以及底层硬件提供的接口来实现各种用户期望的功能。当用户启动应用322时，应用322会加载至存储器306中，处理器304从存储器306中读取并执行应用322的程序指令。
计算设备300还包括储存设备332，储存设备332包括可移除储存器336和不可移除储存器338，可移除储存器336和不可移除储存器338均与储存接口总线334连接。
计算设备300还可以包括有助于从各种接口设备(例如，输出设备342、外设接口344和通信设备346)到基本配置302经由总线/接口控制器330的通信的接口总线340。示例的输出设备342包括图形处理单元348和音频处 理单元350。它们可以被配置为有助于经由一个或者多个A/V端口352与诸如显示器或者扬声器之类的各种外部设备进行通信。示例外设接口344可以包括串行接口控制器354和并行接口控制器356，它们可以被配置为有助于经由一个或者多个I/O端口358和诸如输入设备(例如，键盘、鼠标、笔、语音输入设备、触摸输入设备)或者其他外设(例如打印机、扫描仪等)之类的外部设备进行通信。示例的通信设备346可以包括网络控制器360，其可以被布置为便于经由一个或者多个通信端口364与一个或者多个其他计算设备362通过网络通信链路的通信。
网络通信链路可以是通信介质的一个示例。通信介质通常可以体现为在诸如载波或者其他传输机制之类的调制数据信号中的计算机可读指令、数据结构、程序模块，并且可以包括任何信息递送介质。“调制数据信号”可以这样的信号，它的数据集中的一个或者多个或者它的改变可以在信号中编码信息的方式进行。作为非限制性的示例，通信介质可以包括诸如有线网络或者专线网络之类的有线介质，以及诸如声音、射频(RF)、微波、红外(IR)或者其它无线介质在内的各种无线介质。这里使用的术语计算机可读介质可以包括存储介质和通信介质二者。
计算设备300还包括与总线/接口控制器330相连的储存接口总线334。储存接口总线334与储存设备332相连，储存设备332适于进行数据存储。示例的储存设备332可以包括可移除储存器336(例如CD、DVD、U盘、可移动硬盘等)和不可移除储存器338(例如硬盘驱动器HDD等)。
在根据本发明的计算设备300中，应用322包括执行方法400的多条程序指令。
图4示出了根据本发明一个实施例的进程迁移方法400的流程图。方法400适于在计算设备(例如前述计算设备300)中执行。
如图4所示，方法400的目的是实现一种进程迁移方法，始于步骤S402，在步骤S402中，基于处理器中各进程的真实负载，从各进程中确定出活跃进程。
需要说明的是，根据本发明的实施方式，在该步骤S402执行之前，已然判断出此时计算设备中存在负载不均衡，需要将处理器上的进程进行迁移，对于负载不均衡的判断可基于前述内容或现有的负载均衡策略获知，在此不再赘述。
还需要说明的是，本实施例提供的进程迁移方法适用于各进程在处理器中满负荷运行或接近满负荷运行的场景，即处理器的占用率接近100％。
优选地，可通过以下步骤计算进程的真实负载。
步骤S422、分别获取各进程在处于工作状态下和处于非工作状态下的时间信息。
示例性地，进程运行时是间歇性的，运行一段时间后，处理器会停止运行该进程一段时间，转为运行其他进程，等其他进程处于停止运行时，接着处理器再运行该进程，进程处于工作状态下的时间即为该进程的运行时间。
在步骤S424中，基于时间信息，计算各进程的真实负载。
进程负载是多个运行时间的累加，而在先运行时间内的负载是需要衰减的，衰减系数与该进程处于非工作状态下的时间有关。
根据进程在每段运行区间内的时间与每段段运行区间的衰减系数计算得到真实负载，例如，在当前时间之前，该进程总共运行了3个时间区间，则该进程的真实负载＝(第一时间区间*第一衰减系数)+(第二时间区间*第二衰减系数)+(第三时间区间*第三衰减系数)。
在获得该进程的真实负载后与预设的负载阈值进行比较，当该进程的真实负载大于负载阈值时，则判断该进程为活跃进程，否则为非活跃进程。对于负载阈值的设定可由本领域技术人员进行设定或者根据计算设备的属性进行设定，本实施例对此不做限定。
在步骤S404中，判断活跃进程是否为处理器中的唯一活跃进程。在步骤S402中已经通过各进程的真实负载判断出该处理器中的各进程状态(活跃进程或非活跃进程)，可直接的判断还目标进程是否为该处理器中的唯一活跃进程。
需要说明的是，当该进程为处理器中的唯一活跃进程时，则直接跳过该进程，换言之，当该进程为处理器中的唯一进程，则放弃对该进程进行迁移。
当然，为方便判断处理器中活跃进程的数量，在执行步骤S404之前，可先统计处理器中活跃进程的个数。
在步骤S406中，若不是唯一活跃进程，则依序确定进程的任务分层负载。轮询确定该处理器上的每个进程的任务分层负载，从后加入运行队列的进程开始。
具体地，轮询存储有处理器中各进程的链表，以获取各进程的加入顺序；按各进程从后往前的加入顺序，依次确定进程的任务分层负载。
进程在加入进程队列后会放入指定链表的表头位置，因此从链表头开始轮询，就可以根据加入进程队列时间来轮询进程，也就是说进程的加入顺序通过轮询链表即可得知。
在一些实施例中，各进程的任务负载的计算步骤如下：获取进程在对应分组内的处理器个数；获取进程在对应分组内的进程负载；将进程负载与所述处理器的个数的比值，作为该进程的任务分层负载。
需要说明的是，该任务负载的计算步骤适用于分组内各进程在处理器上满负荷运行或接近满负荷运行的场景下。
在一个具体示例中，常规的任务分层负载的计算公式如下：
任务分层负载＝进程的真实负载*上级队列相对顶层负载/上级队列负载；
因此，任务分层负载/任务真实负载＝上级队列相对顶层负载/上级队列负载＝当前cpu组实体权重/1024＝当前进程负载/组内所有进程总负载；
所以当各个进程满负荷运行时，负载相同，当前进程负载/组内所有进程总负载近似为1/处理器的总数。
换言之，当分组中各进的在处理器上满负荷运行或者接近满负荷运行时，分组中各个进程负载相同，则各进程的任务分层负载＝进程负载/该进程在对应分组内的处理器个数。
在一个具体示例中，进程位于任务组0内，组内一共分布有5个处理器 上，且任务组0内的各进程处于满负荷运行。该进程的负载＝10；则该进程的任务分层负载＝10/5＝2。
在步骤S408中，当进程的任务分层负载满足预设条件时，将进程迁移到其它处理器。
具体地，根据计算设备当前的负载值，计算负载不均衡值。判断进程的任务分层负载是否小于所述负载不均衡值的一半。若是，则将进程迁移到其他处理器。
需要说明的是，计算设备的负载值并不是一个固定值，其随着各进程的运行而发生变化，因此，负载不均衡值也时时发生变化。总而言之，任务分层负载越小，越容易满足迁移的条件。
图5示出了根据本发明一个实施例的进程迁移装置500的结构图。
如图5所示，装置500包括状态确定模块，适于基于处理器中各进程的真实负载，从各进程中确定出活跃进程；判断模块，适于判断活跃进程是否为处理器中的唯一活跃进程；任务分层负载确定模块，适于依序确定进程的任务分层负载；以及迁移模块，适于将进程迁移到其它处理器。
需要说明的是，本实施例提供的进程迁移装置的原理与工作流程与前述进程迁移方法相似，相关之处可参考上述进程迁移方法说明，在此不再赘述。
本实施例在负载均衡的任务迁出标准上，综合考虑了任务真实负载以及任务分层负载的双重影响，当处理器上只有一个高真实负载的进程时，优先迁移新加入到处理器上的低负载进程。在满线程用例场景下，减少了后台进程对主进程的影响，主要进程不会受后台影响而发生跨处理器甚至跨内存节点的进程迁移，此时高速缓冲存储器利用率最高，程序运行性能也最好。
这里描述的各种技术可结合硬件或软件，或者它们的组合一起实现。从而，本发明的方法和设备，或者本发明的方法和设备的某些方面或部分可采取嵌入有形媒介，例如可移动硬盘、U盘、软盘、CD-ROM或者其它任意机器可读的存储介质中的程序代码(即指令)的形式，其中当程序被载入诸如计算机之类的机器，并被所述机器执行时，所述机器变成实践本发明的设备。
在程序代码在可编程计算机上执行的情况下，计算设备一般包括处理器、处理器可读的存储介质(包括易失性和非易失性存储器和/或存储元件)，至少一个输入装置，和至少一个输出装置。其中，存储器被配置用于存储程序代码；处理器被配置用于根据该存储器中存储的所述程序代码中的指令，执行本发明的方法。
以示例而非限制的方式，可读介质包括可读存储介质和通信介质。可读存储介质存储诸如计算机可读指令、数据结构、程序模块或其它数据等信息。通信介质一般以诸如载波或其它传输机制等已调制数据信号来体现计算机可读指令、数据结构、程序模块或其它数据，并且包括任何信息传递介质。以上的任一种的组合也包括在可读介质的范围之内。
在此处所提供的说明书中，算法和显示不与任何特定计算机、虚拟系统或者其它设备固有相关。各种通用系统也可以与本发明的示例一起使用。根据上面的描述，构造这类系统所要求的结构是显而易见的。此外，本发明也不针对任何特定编程语言。应当明白，可以利用各种编程语言实现在此描述的本发明的内容，并且上面对特定语言所做的描述是为了披露本发明的较佳实施方式。
在此处所提供的说明书中，说明了大量具体细节。然而，能够理解，本发明的实施例可以在没有这些具体细节的情况下被实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
类似地，应当理解，为了精简本公开并帮助理解各个发明方面中的一个或多个，在上面对本发明的示例性实施例的描述中，本发明的各个特征有时被一起分组到单个实施例、图、或者对其的描述中。然而，并不应将该公开的方法解释成反映如下意图：即所要求保护的本发明要求比在每个权利要求中所明确记载的特征更多特征。更确切地说，如下面的权利要求书所反映的那样，发明方面在于少于前面公开的单个实施例的所有特征。因此，遵循具体实施方式的权利要求书由此明确地并入该具体实施方式，其中每个权利要求本身都作为本发明的单独实施例。
本领域那些技术人员应当理解在本文所公开的示例中的设备的模块或单元或组件可以布置在如该实施例中所描述的设备中，或者可替换地可以定位在与该示例中的设备不同的一个或多个设备中。前述示例中的模块可以组合为一个模块或者此外可以分成多个子模块。
本领域那些技术人员可以理解，可以对实施例中的设备中的模块进行自适应性地改变并且把它们设置在与该实施例不同的一个或多个设备中。可以把实施例中的模块或单元或组件组合成一个模块或单元或组件，以及此外可以把它们分成多个子模块或子单元或子组件。除了这样的特征和/或过程或者单元中的至少一些是相互排斥之外，可以采用任何组合对本说明书(包括伴随的权利要求、摘要和附图)中公开的所有特征以及如此公开的任何方法或者设备的所有过程或单元进行组合。除非另外明确陈述，本说明书(包括伴随的权利要求、摘要和附图)中公开的每个特征可以由提供相同、等同或相似目的的替代特征来代替。
此外，本领域的技术人员能够理解，尽管在此所述的一些实施例包括其它实施例中所包括的某些特征而不是其它特征，但是不同实施例的特征的组合意味着处于本发明的范围之内并且形成不同的实施例。例如，在下面的权利要求书中，所要求保护的实施例的任意之一都可以以任意的组合方式来使用。
此外，所述实施例中的一些在此被描述成可以由计算机系统的处理器或者由执行所述功能的其它装置实施的方法或方法元素的组合。因此，具有用于实施所述方法或方法元素的必要指令的处理器形成用于实施该方法或方法元素的装置。此外，装置实施例的在此所述的元素是如下装置的例子：该装置用于实施由为了实施该发明的目的的元素所执行的功能。
如在此所使用的那样，除非另行规定，使用序数词“第一”、“第二”、“第三”等等来描述普通对象仅仅表示涉及类似对象的不同实例，并且并不意图暗示这样被描述的对象必须具有时间上、空间上、排序方面或者以任意其它方式的给定顺序。
尽管根据有限数量的实施例描述了本发明，但是受益于上面的描述，本技术领域内的技术人员明白，在由此描述的本发明的范围内，可以设想其它实施例。此外，应当注意，本说明书中使用的语言主要是为了可读性和教导的目的而选择的，而不是为了解释或者限定本发明的主题而选择的。因此，在不偏离所附权利要求书的范围和精神的情况下，对于本技术领域的普通技术人员来说许多修改和变更都是显而易见的。对于本发明的范围，对本发明所做的公开是说明性的而非限制性的，本发明的范围由所附权利要求书限定。

Claims (10)

  1. 一种进程迁移方法，在计算设备中执行，所述计算设备中驻留有多个处理器，所述方法包括：
    基于处理器中各进程的真实负载，从所述各进程中确定出活跃进程；
    判断所述活跃进程是否为所述处理器中的唯一活跃进程；
    若不是唯一活跃进程，则依序确定进程的任务分层负载；
    当所述进程的任务分层负载满足预设条件时，将所述进程迁移到其它处理器。
  2. 如权利要求1所述的方法，其中，所述若不是唯一活跃进程，则依序确定进程的任务分层负载的步骤包括：
    轮询存储有所述处理器中各进程的链表，以获取各进程的加入顺序；
    按各进程从后往前的加入顺序，依次确定进程的任务分层负载。
  3. 如权利要求1所述的方法，其中，在所述基于处理器中各进程的真实负载，从所述各进程中确定出活跃进程的步骤之后，还包括步骤：
    统计所述处理器中活跃进程的个数。
  4. 如权利要求1所述的方法，其中，所述真实负载的计算步骤包括：
    分别获取各进程在处于工作状态下和处于非工作状态下的时间信息；
    基于所述时间信息，计算各进程的真实负载。
  5. 如权利要求1所述的方法，其中，所述任务分层负载的计算步骤包括：
    获取进程在对应分组内的处理器个数；
    获取所述进程在对应分组内的进程负载；
    将所述进程负载与所述处理器的个数的比值，作为该进程的任务分层负载。
  6. 如权利要求1所述的方法，其中，所述基于处理器中各进程的真实 负载，从各进程中确定出活跃进程的步骤包括：
    若进程的真实负载大于预设的负载阈值，则确定该进程为活跃进程。
  7. 如权利要求2所述的方法，其中，所述当进程的任务分层负载满足预设条件时，将进程迁移到其它处理器的步骤包括：
    根据所述计算设备当前的负载值，计算负载不均衡值；
    判断所述进程的任务分层负载是否小于所述负载不均衡值的一半；
    若是，则将所述进程迁移到其他处理器。
  8. 一种进程迁移装置，包括：
    状态确定模块，适于基于处理器中各进程的真实负载，从所述各进程中确定出活跃进程；
    判断模块，适于判断所述活跃进程是否为所述处理器中的唯一活跃进程；
    任务分层负载确定模块，适于依序确定进程的任务分层负载；以及
    迁移模块，适于将所述进程迁移到其它处理器。
  9. 一种计算设备，包括：
    至少一个处理器；和
    存储有程序指令的存储器，其中，所述程序指令被配置为适于由所述至少一个处理器执行，所述程序指令包括用于执行如权利要求1-7中任一项所述方法的指令。
  10. 一种存储有程序指令的可读存储介质，当所述程序指令被计算设备读取并执行时，使得所述计算设备执行如权利要求1-7中任一项所述的方法。
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