WO2023250457A2 - Superconducting power devices - Google Patents

Abstract

Electric power devices, such as fault current limiters and transformers, are provided that employ superconducting linear media. The devices comprise primary and secondary superconducting portions maintained at a predetermined temperature. The fault limiting power devices respond to a fault in a multi-tiered fashion which will selectively exclude magnetic flux.

Description

SUPERCONDUCTING POWER DEVICES

[0001] This application claims the benefit of U.S. Provisional Patent Application Serial No. 63/366,927, filed June 24, 2022, and U.S. Provisional Patent Application Serial No. 63/374,321, filed September 1, 2022, the entireties of which are incorporated by reference herein.

[0002] This application is related to PCT Application Serial No. PCT/US22/13662, filed January 25, 2022, the entirety of which is incorporated by reference herein.

[0003] This application is related to U.S. Patent No. 10,899,575, issued January 26, 2021, the entirety of which is incorporated by reference herein.

[0004] This application is related to U.S. Application Serial No. 17/159,0347, filed January 26, 2021, the entirety of which is incorporated by reference herein.

FIELD OF THE INVENTION

[0005] Embodiments of the present invention are generally related to electric power devices consisting of at least partially of superconducting linear media. Such devices include fault current limiters, transformers, superconducting energy storage devices, etc., and devices supporting the same such as superconducting rotary couplers for electric machines, air core configurations, and associated winding techniques.

BACKGROUND OF THE INVENTION

[0006] Superconductors (sometimes referred to herein as "SC," which also refers to "superconducting") could one day be 100% efficient, allowing for the manufacture of innovative devices that can accommodate increased energy and power requirements in a compact package. Commercially available advanced SC products, such as magnets, cables, and cable magnets, are virtually non-existent because superconductors, including those that can tolerate higher temperatures, are fragile. More specifically, those of ordinary skill in the art will appreciate the fragile nature of existing SC media makes it extremely difficult/expensive to incorporate into viable devices.

[0007] High temperature superconducting (HTS) devices, i.e., those operating at liquid nitrogen (LN2) temperatures, are desired across many industries. Conventional copper (Cu) permanent magnet devices inherently have power output limitations generally associated with air gap magnetic flux density (B) and thermal output. The air gap is the non-magnetic space between the primary and secondary of any electromagnetic device. For example, addressing cooling needs in copper-based devices often increases system weight conventional devices use iron to increase the air gap (B) but also at the expense of increased weight. Conversely, a HTS device would possess no thermal loss and a six-fold power increase compared to a conventional device due to the B output.

[0008] In spite of the benefits HTS devices promise, no HTS or medium temperature superconducting (MTS) electrical devices, e.g., transformers and fault current limiters, have moved beyond laboratory-based demonstration models. Due to the aforementioned winding limitations, some HTS winding device machine manufacturing attempts have focused on making a pancake stack or HTS strip-based electric devices with limited protection from HTS winding and operational stresses. Pancake stacks increase harmonic content and move the coils further from the air gap, lowering the air gap B. Thus, pancake stacks are not well suited for complex winds, such as electric machine (motor/generator) armature coils, and are not curved to protect HTS medium, e.g., tape, from quenching (i.e., abnormal or unexpected transfer from superconducting to a resistive state) due to localized increases in magnetic flux. There have been no attempts to create a fully cold HTS device (a device with a cryogen-based primary and secondary) very much due to the difficulty of winding complex HTS coils. Other MTS solutions have lower material costs but, when reacted, are more fragile and have a higher cryostat cost and complexity associated with lower operating temperatures when using potentially dangerous cryogen.

[0009] One of ordinary skill in the art will appreciate that the current energy delivery system, often referred to as a "power grid," is woefully out of date. In addition, the transition to a modem power grid will create new technical challenges for an electric power system not designed for today's or future energy' requirements. Any new future grid or grid upgrade must be secure and enable remote reviewable power generation, a growing number of distributed energy' resources, energy' diversification, and smart power distribution. Issues include the need for fault current limiters (FCL), which are intended to limit the power of a disruptive power fault to acceptable levels, transformers, which are intended to change the voltage and current power ratio, and SC magnetic energy storage devices, which are intended to store electric power.

[0010] Those of ordinary skill in the art will appreciate that manufacturing for HTS applications requires complex geometric materials to experience low winding stress, which in turn allows increased operating values. This requirement is exacerbated when manufacturing complex geometric magnets categorized by their primary mounting and rotation needs, which include solenoid (often mounted on a common central turning platform), planar (such as a racetrack coil or a curved plane cos-theta magnet and often mounted on cylindrical tooling), and spherical (such as a baseball or yin-yang magnets). Advances in HTS operational values, their performance, the reliability of cryogenic systems, connections, etc., and the understanding that HTS material costs drop during production have collectively targeted SC manufacturing as the remaining issue for commercial SC applications.

SUMMARY OF THE INVENTION

[0011] One goal of embodiments of the present invention is to provide manufacturing methods for producing high-temperature superconducting (HTS) and medium-temperature superconducting (MTS) materials for use in commercial applications. It is, thus, a related goal of some embodiments of the present invention to provide HTS/MTS devices. For example, the method of one embodiment produces a robust magnet configuration for use in the first fully-cold (liquid cryogen) HTS linear, rotary, curve, etc., device. The devices described herein are designed to function at liquid nitrogen (LN2) temperatures using existing HTS material and/or traditional materials that support SC's lower cryogenic temperatures.

[0012] Compact Advanced Superconducting Devices. It is one aspect of some embodiments of the present invention to provide advanced, compact superconductor (SC) devices. The SC may be made or processed using the techniques described herein or in the patents/applications listed above. The contemplated compact devices include but are not limited to fault current limiters (FCL), SC energy storage (SMES) devices, SC transformers, and any device that includes or uses a high electromagnetic (EM) field and/or cunent partially-to-fully created by an advanced SC. Advanced SCs contain materials that allow SC operation at higher temperatures and are generally more, to significantly more, mechanically fragile. Although some of the instant disclosure is focused on compact systems, those of skill in the art will appreciate that SC devices of any size can be manufactured.

[0013] Fullv Cold HTS Device. It is one aspect of some embodiments of the present invention to provide a fully-cold electric device. As used herein, "fully cold "refers to both primary (e.g., Stator for an electric machine) and secondary (e.g., rotor for an electric machine, being at LN2 temperatures. The contemplated fully cold device can be an electric machine (e.g., motor/generator), a fault current limiter (FCL), a superconducting magnet energy storage (SEMS) device, a transformer (Xfmr), etc.

[0014] Air core devices. As mentioned above, many electric devices employ an iron core, which produces high B. Hybrid cores are also used but are not a good solution due to high B, which is far above iron (Fe) lamination saturation levels of ~0.6 to L IT for costly laminations and associated losses. Further, Fe is heavy and brittle at cryogenic temperatures. Accordingly, it is another aspect of some embodiments of the present invention to provide a device that employs an air core instead of an iron core to address high magnetic flux (B). Accordingly, such devices are lighter than traditional iron core devices, eliminate iron hysteresis loss, reduce circulating current losses, increase allowable primary and secondary coil winding areas, provide a flexible structure for large and complex well installation, use the complete B path or magnetic energy, and possess lower total harmonic distortion emanating from an associated electrical circuit. An air core design with no Fe B continuity needs means all magnets can be wound at once or into connectable sections when forming the final device.

[0015] Magnet End Turn Angling and Flux Exclusion. It is yet another aspect of some embodiments of the present invention to provide magnets with end turns formed of curved and/or tapered winding patterns to accommodate B path requirements, which lowers end losses. More specifically, because the highest HTS-induced current occurs when the external B is perpendicular to the tape width (tape being an example of linear media), each HTS tape is placed to set its width parallel to the highest B. Particularly due to SC flux exclusion, which can support B guidance, properly designed complex 3D shape SC magnets, allow compact and lighter sizing for high efficiency and B without exceeding SC critical values. In one contemplated HTS solenoid embodiment, a tapered HTS end has an angle that provides wind-on tapered end stack top, which produces a high packing factor HTS configuration that supports moving internal solenoid end B concentration safely beyond the end turns.

[0016] Toroidal magnet device. Some embodiments of the devices described herein, such as FCLs, Xfmrs, and SMES devices, possess toroids separated into radial and/or axial magnet components. For example, the winding robot automated production for magnets (WRAP-M) device described herein or in the patents/applications mentioned above permit winding SC and copper into connectable toroidal sections. One benefit of this configuration is the extreme B efficiency experience by toroids. One embodiment employs a toroidal magnet component separated into different primary toroidal windings along the magnet's winding axis and a secondary toroidal winding, radial along the winding axis, wherein SC is used to flux separate each axial magnet. During a controlled quench of the secondary toroidal winding, the primary toroidal winding inductance suddenly increases as each primary is flux-connected.

[0017] Torus Outer Winds for Toroidal Flux Exclusion. In some instances, the torus must have a good covering, such as a B exclusion covering, of the toroidal area where the conductor is spread out at the outer torus diameter. If so, conductors in a toroidal, poloidal, or another configuration can be connected to assist with covering. One embodiment provides a layer of toroidal conductors with a connected layer of poloidal conductors used to flux-exclude layers of an SC torus. [0018] B Isolation/Exclusion and Path Control. One key part of the invention design and process for that design is the ability to control the B path through B exclusion during different operational modes. For example, some embodiments control the B path, employ EM shielding, such as SC B exclusion use, and/or possess carefully designed geometries, e.g., toroidal magnets, for each phase to increase operational and system efficiency. These aspects also include compactness, weight, and the ability to place multiple phases within a single cryostat, which has extreme benefits such as those listed and minimizing thermal and electrical connections. Embodiments include both the SC FCL and SC FCL Xfmr described herein.

[0019] 3D device part printing. Embodiments of the present invention support improved manufacturability and part count, compactness and weight, power density, winding groups, cryo- to-conductive cooling, and cost.

[0020] Compact Device Cooling. One embodiment of the present invention incorporates a cryocooler and/or cryo head directly into the center solenoid and/or toroid cavity to provide thermal efficiency and faster cool-down times. The contemplated cryocooler also lessens faults due to hot spots, removes most, if not all, external cryogen connection concerns, and provides a compact system. One contemplated centrally located cryogen reservoir is configured to chill all the layers of the device and may allow for the ability to externally refill the reservoir. The outer wall may be vacuum jacketed with superinsulation. For compactness and efficiency, electrical leads inside COTS are vapor-cooled, cryo-bayonet connectors such as with Peltier leads.

[0021] Cryogen Pressure Pull. During cool down, back pressure will be created in a device's cryogen reservoir as the cryogen turns to a gas, delaying cooling and recovery times. Accordingly, some embodiments of the present invention employ a means for pressure pulling that helps remove the cryostat pre-cool down gas purge.

[0022] Cryogen Gas Venting Pipes. During a fault, the extreme liquid-to-gas expansion ratio (1 :694 for LN2-to-GN2) presents a concern for pressure release incidents and GN2 asphyxiation. Accordingly, some devices employ dedicated, thick-walled venting pipes with regularly spaced, redundant pressure relief valves (PRV) and high-pressure burst disks that remove GN2 from enclosed occupied areas while maintaining GN2 in the system for fast fault recovery.

[0023] Rotating Cryogen and Vacuum Equipment. Some embodiments of the present invention mount cryogen and vacuum equipment, such as cryoheads, cryocoolers, vacuum pumps, etc., directly on moving parts. One embodiment is an electric machine rotor that provides cooling and vacuum space options. One embodiment employs a center axis mount, possibly rotating on one or both sides of the device's center axis. One such embodiment employs lower-speed rotating equipment, such as direct-drive wind turbines. Another embodiment mounts equipment to outer radius rotors with an internal radius stator. To accommodate rotating configurations, special connections must often be used. Such connections may include: warm to cryo-cold gas and fluids, power connections, sensor connections, vacuum pulls, etc. Finally, for rotating connections, such as for a rotary or via some means of rotational motion, a specialized coupling for use such as cryogen, vacuum, power, and sensor lines or some other connection is required.

[0024] In one embodiment, rotor-based SC persistent switches are used to short an electric machine's field coils in a wound induction mode and in a synchronous mode when setting a field current. One embodiment of the present invention employs a rotary coupling that uses cryo-cooled HTS in a phased, such as +/- DC bus, configuration in the middle of the coupler. The HTS resides within the cryogen in/out flow lines to maintain the SC state for the HTS. Outside the cryogen lines, a slip ring sensor and control lines or field coil persistent switches for on/off control are placed outside the cryo and power rotor center. All coils share the same DC power.

[0025] Thin Magnet. As mentioned above, SC tape is one type of linear media used in the contemplated electnc device. An electnc device of one embodiment employs thin magnets with a primary coil (i.e., rotor) and a secondary coil (i.e., stator), which consists at least partially of rectangular HTS. One embodiment uses rectangular HTS (often 0.1mm wide HTS tape total of 1pm thick HTS) versus much wider cross-section geometry' (e.g., 2 to 12mm) by aligning tape length to the solenoid axis magnetic length. This orientation creates a shared mutual inductance area that removes embedded HTS B exclusion layer issues. This orientation also provides a high packing factor, resulting in very high inductance and efficiency, a high current per turn (and hence high B per turn), and a small air gap that facilitates power handling. Further, thin layers provide beter cooling paths versus common wire solenoids that possess many turns, where outer layers thermally insulate inner layers. These aspects of some embodiments allow for a closely packed, radial separated coil that performs like a single connected magnet when B exclusion is removed, such as when the secondary magnet(s) quench which then magnetically links the primary' magnets (such as Mode 2, as discussed in the SC FCL and SC FCL Xfmr later in this description). Loosely wound single to double-grouped turns aligned per layer in an open coil allows B penetration across winding layers. Closely wound turns for single to double-layer solenoids with SC B exclusion, which is particularly relevant for a wide SC tape, is optimal for a single coil B and secondary -to- overall coil EM shielding. These benefits are improved by employing many nested solenoids. In summary, "thin magnet" allows: 1) for increased power density and efficiency due to the extremely close nature of the HTS with a high current in each and with the B directly aimed at the air gap versus the more common Cu based coils that are further separated, much lower current, and often with the B aimed away from the air gap and relying upon Fe to direct their B to the air gap (power density is 1/6 to 1/10 of conventional and efficiency increases from 70-93% range to over 95% range, possibly >99%); 2) ideal EM shielding; 3) the possibility of providing a high inductance full-length coil; 4) increased HTS critical B lowering an undesired quench possibility (i.e., critical flux needed for higher energy/power SC based devices); and 5) improved cooling paths.

[0026] Contemplated SC devices include FCL, SMES, transformers, and hybrid devices that employ thin magnets. In many applications, the B is so high that "thin magnet" devices are hybrid- to-fully air core based, increasing efficiency by removing iron core hysteretic and conductive losses. In many embodiments, the "thin magnet" concept allows for very thin magnets, wherein one or multiple sets of primary and secondary solenoids are nested inside one another, improving magnetic coupling and SC flux exclusion.

[0027] Thin Magnet Winding. SC coils can be wound on top of one another with no splice within and across the single to multiple magnet winds (splices are standard practice for most HTS magnets joined together) with continuously connected coils. In one embodiment, continuous winds of all HTS concentric layers of the primary and the secondary are wound at simultaneously, starting with the smallest radius outwards. A secondary HTS end shield with an option of a minimal turn spiral, linear, etc. HTS configurations can short one or both ends of the secondary solenoidal magnet stack, which can then complete the closing of the secondary' electric loop by shorting the solenoid outer magnets with this secondary end shield. This secondary end shield will often use a smaller HTS tape with a lower critical current to promote a more controlled quench in the secondary end shield. As mentioned above, in one embodiment, the primary and secondary wound magnets are placed inside one another in a nested fashion, with each respective primary and secondary comprised of a continuous winding. An additional flat secondary end shield, which may wound in a pancake or bifilar fashion, can be placed at one or both ends of the primary and secondary nested magnets to further contain B. In one embodiment, the secondary coil is longer than the primary and a secondary end shield is placed in close proximity to the solenoid magnets, which will 1) improve primary isolation; 2) increase EM shielding; 3) removes harmonics; and 4) decrease unwanted HTS tape width induced B. The secondary end shield further provides controlled secondary quenching, and a simpler and improved cooling path with a large surface area to cool AC transients and quench energy'.

[0028] In some embodiments, multiple coiled layers are wound separately and are combined, with or without a splice between, into concentric solenoids. For example, each coil is wound onto a cylinder, e.g., fiberglass laminate garolite (G-10), which facilitates winding, provides structural support, and electrical insulation of coils, wherein the cryogen acts as a dielectric. G-10 inside grooves allow LN2 penetration. G-10 is also used to maintain coil size during thermal contraction and allow slight coil Lorentz force expansion. Any added dielectrics can be an LN2 permeable cold dielectric.

[0029] Embodiments of this thin magnet design include SC Xfmr and FCL devices. For example, the thin magnet SC FCL solenoidal and an SC FCL Xfmr toroidal embodiment is further discussed below.

[0030] WRAP-M Magnet Winding Machine. The aforementioned WRAP-M is capable of making complex compact, winding simple, thus, has the ability to wind multiple layers with no splice between concentric solenoids (e.g., HTS splices: two primary and HTS shunt at FCL input leads, two secondaries at solenoid to end connection) possible due to the low turns count and compact size. For continuous winds, WRAP-M winds all HTS concentric layers of the primary and separately the secondary at once, starting with the smallest radius outwards. The primary and secondary are then inserted inside of one another with the solenoid end shield at the preferred cooling end. Secondary turns can be wound to partially overlap to: 1) increase EM shielding, 2) remove harmonics, and 3) decrease unwanted HTS tape width induced B.

[0031] Cable magnet winds. Particularly for higher current transformer (Xfmr) and FCL embodiments, the contemplated fully transposed SC cable is used for both the HTS cable shunt and HTS windings to increase current handling and power rating, to lower AC loss by allowing a uniform current distribution, to support a uniform quench and thermal heating/cooling, and to provide mechanical support. A fully transposed SC cable is ideal for a cable magnet. An embodiment for special cases is a 2-tier (L-R) FCL with no HTS shunt resistive FCL. Here a primary var compensating capacitor (Zvc) with a series resistance is added to remove LC oscillating currents and lowers the primary impedance during normal operation allowing a second current path (I2).

[0032] Trapped Field Magnet. One embodiment of the present invention is a device using a passive secondary made up of SC trapped field magnets (TFM), possibly connected with HTS tape, which supports flux exclusion.

[0033] HTS used in devices. Insulated HTS is anticipated to control quench propagation versus all quench energy possibly going to a single location. An LN2 permeable cold dielectric of PPLP, G-10, or Ultem, and a semiconductor tape layer at exposed HTS edges for >5kV is used. No HTS with low dropouts is used. The HTS has significant copper to accept current during fault conditions. All conventional conductors are also maintained at LN2 temperatures to increase performance and lower losses. A wider HTS for the same power and size FCL provides a higher current output with a faster normal to fault mode response time.

[0034] Secondary End Shield. As introduced above, some contemplated devices employ components with minimal turn spiral, linear, etc., secondary HTS shield at one solenoid end that shorts the solenoidal secondaries and completes the closed loop by using a smaller HTS tape with a lower critical current. The secondary end shield provides 1) EM shielding efficiency, 2) controlled secondary quenching, and 3) a simpler cooling path with a large surface area for heating such as AC transients and quench energy. A SC Secondary End Shield can be used to further isolate the primary coils. The SC Secondary End Shield of one embodiment is connected to all other SC secondary coils and can be used to quench before the other secondary magnets, which leads to better quench and cooling control.

[0035] Primary End Shield. In one embodiment, the primary incorporates an end shield, e.g., a bifilar pancake, within voltage limits. As one of ordinary skill in the art will appreciate, a bifilar coil is a special type of pancake coil with a dual spiral that is short-circuited in the center. This configuration provides a side-by-side current path that cancels the self and induced B, hence lowering the coil inductance.

[0036] Superconducting Fault Current Limiters. As mentioned in several instances herein, embodiments of the present invention aim to produce an FCL that is a fully cold HTS device, a combined inductive and resistive type of FCL, and a multi-tiered FCL, enabling gnd modernization via improved stability. More specifically, it is another aspect of some embodiments of the present invention to provide an energy delivery system that is secure, resilient, reliable, and can handle stresses associated with fundamental changes in both supply-side and demand-side technologies. Grid modernization adds new forms of distributed generation, storage, and load capacity, higher density, bi-directional power flow, and far more interconnects to support growing demand, which increases the amount of power that can be supplied in any one branch. Therefore, the contemplated system includes branch circuits having upgraded fault-handing devices that can handle higher fault current limits, greater power transformer capabilities, greater energy storage capabilities, etc. The fault current limiters (FCL), transformers, SMES, etc., for incorporation into electrical power devices on grids, microgrids, and mobile platforms, are described below.

[0037] The FCL of one embodiment is capable of passive operational modes. More specifically, to operate effectively and safely, it is critical that a power grid isolates and recovers from electrical faults. The FCL of one embodiment allows direct connection of electrical components without the risk of cascading faults, distributes electric loads, and offers near-instantaneous isolation of fault state with rapid return to full or partial operation upon clearing of the fault. The FCL response is often set to a fault current below the desired system trip current of the circuit breakers and switch gear. In fault operations, redundant systems keep the remaining electrical system operating, and extra cryo cooling may be provided to assist with fault recovery. Once the fault is cleared, any extreme fault-damaged components are isolated and/or the remaining healthy components are recovered back to operational status with the fault-recovered system components. At a minimum, the contemplated SC fault current limiter acts as a high-power surge protector and power conditioner, reducing faults by 20-50% with minimum to no quenching or operational disturbance. Unlike conventional fault breakers and fuses, the contemplated SC fault cunent limiter is not a destructive fault system and, thus, allows quick fault recovery, often within milliseconds if no quench, due to adequate thermal load shedding.

[0038] The FCL of one embodiment of the present invention generally comprises a SC primary coil surrounded by a SC secondary coil, wherein the SC primary and secondary coils are surrounded by a Cu primary coil. The assemblage of coils are situated in a housing that also accommodates an end shield. The primary coil may surround a solid or hollow (i.e. , air) core. The core may comprise a reservoir for containing cryogen.

[0039] The housing also accommodates an HTS shunt connecting the overall device primary power input to output, which can be a length cable with a single fully transposed (FT) group of four (4) tapes per group. The FCL windings are designed to 1) maximize HTS stabilizer (the nonSC conductor in the HTS to protect the SC) fault protection (within size limits) to protect the HTS during a fault; 2) set the minimum number of parallel coils per operational for power handling and to enhance fault current response. In one embodiment, the % Rated Fault Current (I) is the setting for that FCL mode to quench and recover, including the LN2 bathed Cu coil. To save on HTS cost more parallel paths are provided that decrease inductance, with the tradeoff that quench energy removal increased. As mentioned above, because using the widest HTS for the desired power and size FCL, a higher current output is provided that reduces normal-to-fault mode response time. An HTS secondary incorporating the widest possible HTS allows for fewer turns and a lower L, thus provides an improved EM shielding layer. FCL designs described herein are configured to provide quench resistance (R), constant inductance (L), and copper (Cu) R energy dissipating modes, including FCL quench energy removal/loss.

[0040] Loosely wound single to double grouped turns aligned per layer in an open coil allows B penetration across layers. Due to closely wound turns with B exclusion, particularly for a wide SC tape, single to double layer solenoids with no turns covered by a separate SC layer is optimal for a single coil and improved by a design of many nested solenoids.

[0041] FCL of one embodiment also has a set coil number of turns and area, thereby providing optimal inductance for FCL response. The outer secondary coils are provided that have half the inner coil turns to assist with fast cooling of the outer HTS secondary and primary. The inner coil turns also facilitate parallel connection impedance matching. Those of ordinary skill in the art appreciate that embedding coils in layers that give an undesired thermal or B response is avoided. The FCL also has coil turns that are added for current balancing and to attain a common quench. The FCL may also allow the primary HTS coil to be set for high current operation with a lowered non-fault to high fault impedance. External power is connected to the innermost primary coil positioned about a cryocooler (i.e., the FCL's core) with a cryogen reservoir that provides enhanced cooling. The innermost coil is configured to receive the fault current and, thus, quenches initially. FCL quench energy loss/removal changes linearly with inductance but by cunent squared whereas the inductance time lag is an exponential with respect to the inductance. This response helps define desired fault limiting energy types and levels.

[0042] Reverse current connection. Adjacent primary' and secondary coils may comprise a reverse current connection between the primary' to secondary as well as secondary to secondary to further reduce common operation mutual inductance, response time, induced currents, and associated AC losses. A primary to primary non-reverse current connection embodiment is used to maintain a high mutual inductance such as for inductive FCL fault needs. Primary to primary reverse current connection embodiments include switching of primary' connections for current direction and lowered inductance operation.

[0043] Parallel connected radial and/or axial single magnets. Parallel connected radial and/or axial primary and/or secondary single magnet HTS winds are embodiments for any high current need.

[0044] The contemplated device is the first inductive and resistive HTS FCL, tiered FCL, HTS FCL to include complex curve multi-turn per layer, multiple concentric rings, SC primary and secondary coils (e.g., HTS primary and secondary coils) that allows a new EM configuration in a fully cold, both primary and secondary of the device are cryogen such as LN2 cooled, commercially viable device. This superconducting FCL can be passive or active alternating current (AC) and/or direct current (DC), compact and simple, low weight (air core and less Cu), and more reliable and less FCL and grid stressing because of the contemplated multi-tiered, high power FCL design. FCL tiered fault energy' removal: 1) allows gradually increasing the fault power reduction response, which self-protects the FCL as well as grid components by metering the fault power surge; 2) has faster fault and recovery times; 3) safely handles extreme continued faults even above the FCL rating where the SC theoretically has no voltage limit. If a high-power, long-term fault occurs beyond the FCL rating, then the FCL automatically responds and (even without cryogen) destructively fails to open circuit to protect the grid. Accordingly, the FCLs described herein are 100% reliable.

[0045] By employing the winding techniques described herein, thermal hot spots, which can lead to quenching, are reduced. The benefits of the FCL of one embodiment include: 1) only combined inductive and resistive type FCL known with multiple levels/tiers of fault protection (more capable and faster response and recovery times with less FCL and grid stress) (as further discussed below); 2) highest specific power and power density; 3) lowest voltage for same power, removing voltage derating while providing a higher safety rating; 4) no internal heat generation during normal operation, which leads to, 5) most compact (multiple co-axial solenoids and cryo cooling center); 6) lightest weight (air core, less turns, and most compact); 7) highest fault impedance per volume; 8) more reliable and less grid stressing since multi-tiered and limited splices; 9) less than half a cycle response time; 10) in normal operation negligible resistive losses and low impedance (air core and no coil B cross talk) thus minimized stray loss, no hysteretic losses, and more current per HTS tape and hence highest efficiency; 11) self-triggering; 12) self-recovery under load; 13) safely wound HTS commercial production magnets; 14) first ever complex curve multi-turn per layer and multi-layer HTS coils; 15) multiple HTS concentric rings; 16) fully cold device; 17) least amount of tape/wire required for an all HTS FCL; 18) lowest total lifetime cost; 19) longest life where cryogenic cooling slows to stops all chemical reactions such as surface oxidation and dielectric aging versus an elevated temperature device allowing a doubling of unit lifetime versus conventional FCLs; 20) no normal operation external electromagnetic (EM) fields; 21) increased safety through lowered voltages; 22) enables new grid demands and applications; 23) complies with new regulations; 24) manufacturing ease from winding to modular stockable/swappable subassemblies for all frame sizes. The performance increase is related to HTS conversion and proper use. Due to the extreme specific power, this FCL provides the greatest device and system benefits for the more power required where competing technologies are often too large or heavy.

[0046] In an FCL embodiment, air core FCL reactors require low normal operational impedance (Z) and a high, controllable fault impedance. Lower normal operational impedance also removes external EM. An inductive FCL desires a high inductance over resistance, providing an extremely fast and efficient fault operation. Ideally the primary impedance (Zp) [See Figures] increases by the equation [Zp = Zs * (Np/Ns)^A2], Hence, the best high impedance fault response is a higher number of primary turns (Np) and lower number of secondary turns (Ns). So, Np is also set higher for the second tier, inductive fault response. Ns is set low, 1 layer possible, with the main purpose of electromagnetic (EM) shielding the primary coils from one another during normal operation.

[0047] Multi-Tiered FCL. Although an all HTS FCL allows the most power-dense inductive fault capability of any FCL and the lowest non-fault energy loss operation for a resistive fault capability, a tiered FCL is further used to combine the advantages and remove the disadvantages of inductive and resistive type FCLs while dividing the fault energy. Each HTS fault mode separately removes a large amount of fault energy (the operational to quench energy, for L-Fault Mode this is proportional to the area under the FCL B curve) but at a much lower energy than all the fault energy of any single fault. This protects the FCL such as cryo cooling needs and hot spots where thermal energy is proportional to (current)^A2. A metered FCL response lowers grid stress and improves reliability. A multi-tiered design is only practical for a fully HTS FCL due to HTS power handling, fast quench, resistive rise, and B exclusion. Once the fault is cleared, a tiered design provides a faster recovery time as each tier separately recovers in the opposite order of fault operation.

[0048] The FCL of one embodiment of the present invention is capable of a 3-tiered (R/L-L-L/R modes) power handling methodology with all passive operating modes described herein.

[0049] - Mode 0 (Normal operation, no fault). During normal mode, all HTS has no resistance. Most current runs through the HTS shunt (Ii) in AC (alternating current) or in the HTS cable and coils (Ii and h) in DC (direct current). In AC, the B exclusion of the secondary shields the primary and Cu primary coils from one another. This greatly lowers the inductance and, hence, the primary impedance is limited to the winding leakage impedance. In DC, all cunent follows the lowest resistance paths with various levels of HTS quenches and increasing Cu resistance with no inductance effects.

[0050] - Mode 1 (R/L - Resistive/Inductive Fault Mode). Mode 1 is defined by a fault in the SC primary coil, wherein current is directed to the SC primary coil with induced current in the SC secondary coil providing the B exclusion effect. Mode 1 shorts the entire FCL with an HTS cable shunt that quenches well above operational currents, but less than half of the full FCL fault response design. The SC primary impedance is set to limit FCL Mode 1 fault energy. All current moves into the SC primary coil (h) which operates at higher power levels but with a powerlimiting SC primary coil reactance, mostly inductive. Low to medium-level fault energy is removed via the HTS shunt quench and lagged via the isolated SC primary coils. Accordingly, Mode 1 power conditions the line by clearing all partial power design faults in less than a 1/4 cycle due to the nature of the resistive circuit increase and recovers within milliseconds to seconds, depending upon loading. To provide a high power yet compact inductive FCL, multiple primary and secondary concentric HTS layers are wound together and work in parallel and connected in series and/or parallel depending on power handling.

[0051] - Mode 2 (L - Inductive Fault Mode). The FCL shifts to Mode 2 when the secondary quenches at a set full fault power level, which increases secondary resistance and decreases the induced current leading to the collapse of the secondary EM shield (Zs). The SC primary and shunt coils magnetically connect resulting in a high mutual inductance increase (ZP+ZPCU). The secondary windings generate a sudden, high resistance from their quench to further increase fault impedance. High level fault energy is removed via the secondary coils quench and lagged via the B-connected SC primary coils. This mode is set to clear all standard design faults within a 1/4 cycle due to the nature of the inductive circuit increase and then recover within 0. Isec to seconds, depending upon the secondary loading. Due to this HTS flux exclusion, the secondary radially inside each SC primary stops the SC primary concentric solenoid main B from connecting to itself and the secondary on both sides of each SC primary stops the SC primary coils from connecting to one another. Only SC primary stray B remains. All secondary windings are short-circuited for current balancing and to attain a common quench. To increase fault flux coupling, flux leakage is minimized by lowering the distance between winds and a parallel Cu primary is wound outside the outermost secondary for additional inductive fault impedance.

[0052] - Mode 3 (L(self)/R Fault Mode). In FCL Mode 3 the SC primary' coil quenches at a set full fault power lever and all remaining fault energy goes to the Cu primary coil that accepts negligible power during normal operation. At this point the entire FCL is inefficient but powerful at limiting the fault and the HTS must be protected. The full fault current (h) moves to the parallel conventional Cu primary resistor and inductor (Zpcu). The Cu primary is also cryogenically cooled to assist with power shedding. The parallel inductance is fully self-inductance because the mutual inductance with (Z_p) is removed once the SC primary and secondary HTS quench. The Cu primary will initially be at LN2 temperature, where Cu in LN2 has ~8x the conductance. As a fault persists the LN2 will boil off over time thus greatly increasing the Cu resistance which provides an optimal increasing variable resistive response. High-level fault energy is removed via the SC primary coils quench and increasing Cu primary resistance and lagged via the B connected Cu primary and SC primary coils. Mode 3 is set to remove remaining fault current within msec, then recover within seconds, depending upon loading, else minutes for extreme fault cases beyond FCL specifications. Due to the high Mode 3 cunent, after the LN2 level is diminished, in Mode 3 the Cu coil will quickly heat and risk the FCL failing open circuited. The SC FCL of this embodiment can safely handle an extreme continued fault due to the tiered fault energy removal technique lowering the full fault energy during and within each fault mode.

[0053] Transition into Modes 2 and 3 must account for sufficient Cu primary impedance to handle the high input current for a set voltage to remove a thermal runaway situation. Each mode, especially Mode 3, must not have less impedance than the prior mode else recovery will not occur. All fault mode values are set via the FCL design and readily changed by way of the manufacturing method, in one embodiment WRAP. Reverse winding of Xfmr magnets for induced current techniques and FCL operation may be employed. SC secondary coils have a reverse current connection option from the SC primary, within induced B reducing the SC primary B limits, to reduce common operation mutual inductance, response time, induced currents, and associated AC losses.

[0054] An FCL multi-tiered design of one embodiment is only practical for a fully HTS FCL due to HTS power handling, fast quench, resistive rise, and B exclusion. Although a fully HTS FCL allows the most power-dense inductive fault capability of any FCL, a 3-tiered (R/L-L-L/R modes) FCL is further used to combine the advantages and remove the disadvantages of inductive (ops.: a faster current transient is slowed with a lowering amplitude that lowers system stability and power transfer, while introducing perturbations) and resistive (ops.: dissipates energy' wherein normal operation voltage drop with a sudden, hard turn on with longer recovery) FCLs while dividing the fault energy. Each fault mode separately removes a large amount of fault energy, i.e., the operational to quench energy, for L-Fault Mode, which is proportional to the area under the curve (see, for example, Figs. 7b and l ib), but at a much lower energy than all the fault energy of any single fault. The tiered lower fault energy approach assists with lowering terminal overvoltage per fault and protects the FCL via quenching the entire SC volume of each mode at once, which removes hot spots where thermal energy is proportional to (current)^A2.

[0055] Although the forgoing concerns a 3-tier system, a 2-tier (L-R) FCL embodiment is also envisioned that comprises no HTS shunt resistive FCL. A SC primary var compensating capacitor (Zvc), with a series resistance to remove LC (inductive and capacitive) oscillating currents, lowers the SC primary impedance during normal operation allowing a second current path (h).

[0056] Superconducting Transformer with a SC FCL. The FCL concepts described herein, including the HTS and MTS embodiments, can be applied to an electrical transformer, i.e., a Xfmr that employs a SC FCL as described above (sometimes referred to herein as a FCL Xfmr or simply as a Xfmr). In one embodiment, the transformer is a high frequency transformer. One embodiment of such a Xfmr may include a 3D printed core to support more advanced needs, such as high frequency switching operations. During normal operation of 2 tiered transformer, the adjacent SC primary and secondary and B connected, but SC primary to SC primary and secondary to secondary are B isolated. Embodiments include both toroidal and solenoidal magnet configurations (see Figures). In a toroidal configuration, one embodiment of the transformer excludes outer Cu windings until a 2-tier quench event starts to occur. In a solenoidal configuration, one embodiment of the Cu windings is to place them on the outside of HTS magnets, thus minimizing their normal operation-induced losses._Like FCLs, the Xfmrs described herein operate in modes, which will be descnbed below.

[0057] Xfmr windings of one embodiment, are designed to: 1) maximize HTS stabilizer fault protection (within size limits) to protect the HTS during a fault; 2) set current high side for minimum the number of parallel coils per operational current (power handling) to save on HTS cost (L drops per parallel paths); then 3) fault current response [% Rated Fault Current (I) is the setting for that FCL mode to quench and recover, including the LN2 bathed Cu coil]; 4) set voltage high side to number of impedance matched parallel coils for desired voltage; then 5) fault current response; 6) use the widest HTS for the desired power and size providing a higher current output with a faster normal to fault mode response time; 7) low voltage, high current side is a wider HTS tape and hence expected to be the secondary wound over the SC primary (widest HTS secondary gives fewer turns with an improved EM shielding layer); 8) set coil number of turns and area giving L for Xfmr and FCL response (coils set to cunent balance and to attain a common quench); 9) do not embed coils in layers that give an undesired thermal or B response; 10) minimize prequench B leakage into Cu windings. The secondary outer diameter of the torus must have a good B exclusion covering the toroidal area at the location where conductor is spread out. A Cu sheet and/or poloidal magnet configuration secondary tapes coupled to the toroidal may be employed for this covering.

[0058] Similar to the SC FCL described above, the Xfmr of one embodiment of the present invention that utilizes a SC FCL is capable of a 3-tiered (L-R/L-R/L modes) power handling methodology with all passive operating modes described here.

[0059] - Mode 1 (L -Inductive Fault Mode). In Mode 1, the HTS inductance removes low energy faults above 100% rated Xfmr operation (lip and Iis). This mode power conditions the line by immediately working to clear all partial power design faults.

[0060] - Mode 2 (R/L - Resistive and Inductive Fault Mode). The Xfmr side that first exceeds the HTS critical current, usually the high Xfmr current side, quenches at 50% rated maximim fault current. This electrically connects that side's Cu Xfmr (e.g., bs) with the non-quenched HTS Xfmr side (e.g., lip). This mode is set to clear all standard design faults within a 1/4 cycle due to the nature of the resistive circuit increase and then recover within 0. 1 sec to seconds, depending upon the secondary loading.

[0061] - Mode 3 (R/L - Resistive and Inductive Fault Mode). The Xfmr side that next exceeds the HTS critical current, usually the low Xfmr current side, quenches at 75% rated max. fault current. This connects both Cu Xfmr sides (LP and Rs). At this point the entire FCL is inefficient but powerful at limiting the fault and the HTS must be protected. The Cu is cryogenically cooled to assist with power shedding. The Cu primary will initially be at LN2 temperature, where Cu in LN2 has about 8x the conductance. As a fault persists the LN2 will boil off over time, thus, greatly increasing the Cu resistance, which provides an optimal increasing variable resistive response. This mode is set to remove the fault within milliseconds then recover within seconds, depending upon loading, else minutes, for extreme fault cases beyond normal FCL specifications. Due to the high Mode 3 current, after the LN2 level is diminished, in Mode 3 the Cu coil will quickly heat and risk the FCL failing open circuited.

[0062] As is also the case for an SC FCL and FCL Xfmr, transition into Modes 2 and 3 must account for sufficient Cu primary impedance to handle the high input current for a set voltage to remove a thermal runaway situation. Each mode, especially Mode 3, must not have less impedance than the prior mode else recovery will not occur. All fault mode values are set via the FCL design and readily changed by way of the manufacturing method, in one embodiment WRAP. Reverse winding of Xfmr magnets for induced current techniques and FCL operation may be employed. SC secondary coils have a reverse current connection option from the SC primary, within induced B reducing the SC primary B limits, to reduce common operation mutual inductance, response time, induced currents, and associated AC losses.

[0063] An Xfmr with FCL multi-tiered design is only practical for a fully HTS FCL due to HTS power handling, fast quench, resistive rise, and B exclusion. A fully HTS FCL allows the most power dense inductive fault capability of any FCL. A 3-tiered (L-R/L-R/L modes) FCL is further used to combine the advantages and remove the disadvantages of inductive (ops.: a faster current transient is slowed with a lowering amplitude that lowers system stability and power transfer, while introducing perturbations) and resistive (ops.: dissipates energy wherein normal operation voltage drop with a sudden, hard turn on with longer recovery) FCLs while dividing the fault energy'.. Each fault mode separately removes a large amount of fault energy (the operational to quench energy') but at a much lower energy than all the fault energy' of any single fault. This tiered lower fault energy' assists with lowering terminal overvoltage per fault and protects the FCL via quenching the entire SC volume of each mode at once, which removes hot spots where thermal energy is proportional to (current)^A2.

[0064] Superconducting Fault Current Limiting Toroidal Transformer. A toroid is separated into axial and radial magnet components for a single to multi-phased, multi-tapped optional transformer (Xfrnr) with magnets that can overlap or be separated. Combining windings and phases into a single toroid lowers weight, size, capital and maintenance costs, and increases efficiency (a toroid is the most efficient B magnet path known) while providing a more reliable unit from less components.

[0065] In this embodiment, the toroid is separated into axial toroidal windings sections, such as phases, along the winding axis and radially separated into SC primary and secondary magnets of each phase in each axial section. Sections are wound in less than toroidal halves, such as thirds for a 3-phase device. Winding in thirds allows a 3-phase build on a single toroidal with no splice needed within magnets. Total B across all phases cancels due to phasing sequencing. Each phase separation will include a high-voltage dielectric that allows the B to pass and works in conjunction with the cryogen acting as a dielectric. Superconducting (SC) layers are used to radially B separate each magnet. SC and copper (Cu) toroidal sections are wound on top of one another and then connected. In this toroidal configuration, the Xfrnr excludes outer Cu windings until a quench, producing a very efficient Xfrnr and fast acting FCL operation.

[0066] In one embodiment, the high-temperature SC (HTS) "thin magnet" design will be wound into a toroidal pattern. The Xfrnr is evenly wound and electrically phased on a single toroid with a Cu Xfrnr on top of an SC Xfrnr. Each phased secondary is placed directly on top of the respective phased SC primary to support induced secondary Xfmr action. HTS B exclusion minimizes leakage B which keeps B in the toroid for the Xfmr action, shields each phase from induced currents from other phases, and allows an FCL option. The induced current in the HTS secondary (I is), Cu primary and secondary (lip and hs) are all wound such that both the HTS secondary Xfmr current as well as any leakage flux adds to the Xfmr action. For any B that may escape the inner toroid, the outer LN2 cooled Cu Xfmr toroid phase winding captures that B with a slight resistance but increases overall efficiency by removing any possible leakage B.

[0067] The secondary' is anticipated to be a larger width HTS than the SC primary to achieve an improved secondary B exclusion. The low voltage, high cunent side is a wider HTS tape and hence anticipated as the secondary wound over the SC primary. To remove leakage B into the Cu windings, the secondary outer diameter of the torus must have a good B exclusion covering the toroidal area at the location where conductor is spread out. Poloidal secondary tapes connected to the toroidal may be employed to assist with this covering. Full transposition cables, depending upon current rating and losses as well as cooling and structural needs from standard to fault operation, are an option as a higher current Xfmr side option. Reverse winding of Xfmr magnets for induced current techniques and FCL operation will be studied but are not anticipated to be employed.

[0068] Structurally, the toroid is held at phase change locations. This location also provides cryo paths to the toroidal center which can be conduction or bath cooled. Bath cryo cooling in the torus center is only possible when LN2 fault expansion concerns are removed. A cryocooler placed in toroidal center provides fast cooling options while minimizing any B that the cryocooler may see during Xfmr to fault operations.

[0069] Toroidal transformer experiences a highly efficient normal operations when the B path is fully enclosed in the toroid and the mutual inductance is sized well for the Xfmr action. When either SC side quenches, an instantaneous, resistive FCL action occurs. When the outer SC quenches, an instantaneous, inductive FCL action occurs leading to a 2-tier quench event.Jn one embodiment, the toroidal core is 3D printed.

[0070] Secondary Induced Heating Fix. A superconducting (SC) secondary stabilizer can receive appreciable heating after the SC quenches. One embodiment employs uninsulated HTS with a shorted Cu material, such as a sheet, wound into the middle of the secondary HTS to address this issue. The HTS greatly lowers any B heating when the secondary quenches. The Cu sheet not only provides a large Cu area for the current but, more importantly, effectively turns the entire secondary into a single turn that removes the large induced emf and all associated heating.

[0071] Superconducting Magnetic Energy Storage. The winding to application descriptions herein as applied to superconducting magnetic energy storage (SMES) including the embodiment of an HTS and MTS SMES. One embodiment is a compact HTS based "thin magnet" SMES. Another embodiment is a toroidal SMES which better approximates magnet B ideal limits as the device increases in size by reducing stray B.

[0072] Superconducting Flywheel Energy' Storage. The winding to application descriptions herein, such as "thin magnets", as applied to a superconducting flywheel energy storage including the embodiment of an HTS and MTS regular to high speed and power flywheel.

[0073] Superconducting High Field Magnets. The winding to application descriptions herein, such as "thin magnets", as applied to superconducting high field magnets including the embodiment of an HTS and MTS high field magnets for high energy physics (HEP) and fusion applications greater than three Tesla (T) magnets.

[0074] Superconducting Space EM Shielding. The winding to application descriptions herein, such as "thin magnets", as applied to superconducting electromagnetic (EM) shielding magnets including the embodiment of HTS and MTS EM shielding magnets.

[0075] Cryogen to other Supplemental Energy Storage and Generation. Storage is via cryogen gas expansion which is used to generate electricity for immediate use or further electrical storage. The cryogen energy generation system can be used independently or as part of larger systems such as via common cryogen gas and/or liquid connections. One embodiment, cryogen stations provide a smart grid detect and protect capability at each cryogen station as well as the use of cryogen for distributed energy storage when using the high cryo liquid to gas expansion ratios such as for LN2 expansion. System works for open and closed systems, particularly for LN2, and when cry o stations have LN2 generation onsite to generate excess LN2 into a storage tank which can also bleed into a gas or liquid based turbine or some propeller or equivalent flow interaction device to turn a generator or equivalent for electricity' generation when expanding back into GN2. This electricity is then used in many possible ways such as further electrical storage or conditioning such as through batteries, capacitors, ultracapacitors, and/or SMES, operating devices and equipment, and/or to send electrical power back into the lines directly or after electrical storage holding.

[0076] Power Conditioning System with High Frequency Transformer. Fast switching transformer and power conditioning system (PCS). One embodiment is a PCS designed to support lower end turn losses on an electric machine for applications such as a mobile platform such as electric aircraft. One embodiment of such a PCS is designed to support a high frequency Xfmr including the embodiment of a 3D printed core to support more advanced needs such as high frequency switching operations.

[0077] Power Conditioning System with Cryogen Cooling of Switch Gear, Cry ogen cooling for switching components and on same backplane. High switching speed with now cryogen thermal benefits leads to far more compact and higher power PCS.

[0078] Thus, it is one aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; and a shunt selectively interconnecting the power input to the power output.

[0079] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein a hollow portion or thermal conductive path portion of the core is configured to receive a cryogen.

[0080] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the primary coil is comprised of a conventional conductor.

[0081] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the superconducting primary and superconducting secondary coils are formed of wound high temperature superconducting tape, and the primary coil is comprised of copper.

[0082] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the superconducting primary and superconducting secondary coils thin magnets formed of wound high temperature superconducting tape of a rectangular profile.

[0083] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the shunt is a superconducting tape or cable.

[0084] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the at least one superconducting primary coil is comprised of a plurality of layers, wherein each layer has upper and/or lower edges that do not correspond to the upper and/or lower edges of an adjacent layer, which defines an end turn comprised of a curved or tapered winding pattern.

[0085] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the at least one superconducting primary coil defines a solenoid defining a solenoid axis corresponding to the magnetic field of the solenoid that extends generally along the length of the solenoid from the upper edge to the lower edge of at least one superconducting primary coil, wherein the superconducting primary' coil is formed of wound high temperature superconducting tape having a rectangular cross section, and wherein the tape width is aligned with the solenoid axis. [0086] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the at least one superconducting primary coil defines a solenoid defining a solenoid axis corresponding to the magnetic field of the solenoid that extends generally along the length of the solenoid from the upper edge to the lower edge of at least one superconducting primary coil, wherein the superconducting primary' coil is formed of wound high temperature superconducting tape having a rectangular cross section, and wherein the tape width is aligned with the solenoid axis, and wherein the tape is situated such that its width is parallel to the greatest magnetic flux generated by the solenoid.

[0087] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the core is interconnected to a cryogen source that is configured to continuously or periodically receive cryogen to maintain the temperature of at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil below a predetermined temperature.

[0088] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the core is a cryogen reservoir, and further comprising a cryocooler in thermal communication with the reservoir.

[0089] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the core is a cryogen reservoir, and further comprising a cryocooler in thermal communication with the reservoir, and wherein the core is at least partially comprised of the cryocooler.

[0090] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the shunt is a superconducting tape or cable, and wherein the superconducting primary coil, the superconducting secondary coil, and the primary coil define a combined inductive and resistive type superconducting FCL.

[0091] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil.

[0092] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and further comprising a primary var compensator configured to compensate for a predetermined impedance.

[0093] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein in mode 1, the superconducting secondary coils create a flux exclusion that isolates the superconducting primary coils.

[0094] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein in mode 1, the superconducting secondary coils create a flux exclusion that isolates the superconducting primary coils, and further comprising a secondary end shield located adjacent to the upper edge or lower edge of the superconducting secondary coil, the secondary end shield configured to isolate the primary coils.

[0095] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein in mode 1, the superconducting primary coil operates with the reactance of the primary coil that is mostly inductive.

[0096] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein in mode 1, all partial power design faults are cleared within a partial cycle.

[0097] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein in mode 2, the superconducting secondary coil generates a high resistance.

[0098] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein the at least one superconducting primary coil is comprised of a plurality of layers, wherein in mode 2, the layers magnetically connect to increase primary mutual inductance.

[0099] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary' coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the primary coil, and wherein in mode 3, the superconducting primary generates a high resistance, which sends all cunent to the quenched superconducting and non-superconducting coils.

[0100] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the superconducting secondary coil is comprised of uninsulated superconducting tape or cable with layers wound around a conventional conductor, wherein the conventional conductor is wound into a middle portion of the superconducting secondary coil.

[0101] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein the superconducting primary and superconducting secondary coils are formed of wound high temperature superconducting tape having a rectangular profile.

[0102] It is another aspect of some embodiments of the present invention to provide a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary' coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a shunt selectively interconnecting the power input to the power output, and wherein primary and superconducting secondary coils are comprised of superconducting tape or cable.

[0103] It is still yet another aspect of some embodiments of the present invention to provide a method of addressing a fault in a power grid comprising: providing a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; and a shunt comprised of a superconducting cable selectively interconnecting the power input to the power output; wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: passing a main power current through the shunt until the main power current exceeds a predetermined level; shifting the main power current to the superconducting primary coil when main power current exceeds the predetermined level, and inducing a secondary current in the superconducting secondary coil; shifting the main power current to the superconducting primary coil when the superconducting secondary coils quench; and shifting the main power current to the Cu primary when the superconducting primary coils, superconducting secondary coils, and shunt are quench.

[0104] It is yet another aspect of some embodiments of the present invention to provide an electrical transformer comprising: a primary magnet coil; a secondary magnet coil adjacent to the primary magnet coil; a superconducting primary magnet coil; a superconducting secondary magnet coil; wherein the primary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil are surrounded by a housing, such that an inner surface of the primary magnet coil defines an internal volume; and a power input interconnected to at least one of the n man- magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil; and a power output interconnected to at least one of the ri mary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil.

[0105] The Summary of the Invention is neither intended nor should it be construed as being representative of the full extent and scope of the present invention. That is, these and other aspects and advantages will be apparent from the disclosure of the invention(s) described herein. Further, the above-described embodiments, aspects, objectives, and configurations are neither complete nor exhaustive. As will be appreciated, other embodiments of the invention are possible using, alone or in combination, one or more of the features set forth above or described below. Moreover, references made herein to "the present invention" or aspects thereof should be understood to mean certain embodiments of the present invention and should not necessarily be construed as limiting all embodiments to a particular description. The present invention is set forth in various levels of detail in the Summary of the Invention as well as in the attached drawings and the Detailed Description and no limitation as to the scope of the present invention is intended by either the inclusion or non-inclusion of elements, components, etc. in this Summary of the Invention. Additional aspects of the present invention will become more readily apparent from the Detailed Description, particularly when taken together with the drawings.

[0106] The above-described benefits, embodiments, and/or characterizations are not necessarily complete or exhaustive, and in particular, as to the patentable subject matter disclosed herein. Other benefits, embodiments, and/or characterizations of the present invention are possible utilizing, alone or in combination, as set forth above and/or described in the accompanying figures and/or in the description herein below.

[0107] The phrases "at least one," "one or more," and "and/or," as used herein, are open-ended expressions that are both conjunctive and disjunctive in operation. For example, each of the expressions "at least one of A, B and C," "at least one of A, B, or C," "one or more of A, B, and C," "one or more of A, B, or C," and "A, B, and/or C" means A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B and C together.

[0108] Unless otherwise indicated, all numbers expressing quantities, dimensions, conditions, and so forth used in the specification and drawing figures are to be understood as being approximations which may be modified in all instances as required for a particular application of the novel assembly and method described herein.

[0109] The term "a" or "an" entity, as used herein, refers to one or more of that entity. As such, the terms "a" (or "an"), "one or more" and "at least one" can be used interchangeably herein.

[0110] The use of "including," "comprising," or "having" and variations thereof herein is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. Accordingly, the terms "including," "comprising," or "having" and variations thereof can be used interchangeably.

[OHl] It shall be understood that the term "means" as used herein shall be given its broadest possible interpretation in accordance with 35 U.S.C., Section 112(f). Accordingly, a claim incorporating the term "means" shall cover all structures, materials, or acts set forth herein, and all of the equivalents thereof. Further, the structures, materials, or acts and the equivalents thereof shall include all those described in the Summary, Brief Description of the Drawings, Detailed Description and in the appended drawing figures.

BRIEF DESCRIPTION OF THE DRAWINGS [0112] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and together with the general description of the invention given above and the detailed description of the drawings given below, serve to explain the principles of these inventions.

[0113] Fig. 1 is a perspective view of a superconducting fault current limiter of one embodiment of the present invention.

[0114] Fig. 2 is a cross-sectional, perspective view of the superconducting fault current limiter shown in Fig. 1.

[0115] Fig. 3 is a detailed view showing an upper portion of the superconducting fault current limiter shown in Fig. 1.

[0116] Fig. 3a is another detailed view showing the upper portion of the superconducting fault current limiter similar to Fig. 3, wherein end turn angling employed by some embodiments is shown in detail.

[0117] Fig. 4 is a detailed view showing lower portion of the superconducting fault current limiter shown in Fig. 1.

[0118] Fig. 5 is a cross-sectional perspective view of the coils employed by the embodiment shown in Fig. 1.

[0119] Fig. 6 is a detailed view of Fig. 5.

[0120] Fig. 7a is an electrical schematic of the fault current limiter shown in Fig. 1.

[0121] Fig. 7b is a physical schematic of the fault current limiter shown in Fig. 1.

[0122] Fig. 8a is an electrical schematic showing a normal operation mode of an AC system.

[0123] Fig. 8b is an electrical schematic showing a first fault current operation mode of the system depicted in Fig. 8a.

[0124] Fig. 8c is an electrical schematic showing a second fault current operation mode of the system depicted in Fig. 8a.

[0125] 8d is an electrical schematic showing a first fault current operation mode of the system depicted in Fig. 8a.

[0126] Fig. 9a is an electrical schematic showing a normal operation mode of an DC system. [0127] Fig. 9b is an electrical schematic showing a first fault current operation mode of the system depicted in Fig. 9a.

[0128] Fig. 9c is an electrical schematic showing a second fault current operation mode of the system depicted in Fig. 9a.

[0129] Fig. 10 is a cross-sectional view of a solenoidal superconducting fault current limiting transformer of one embodiment of the present invention.

[0130] Fig. 1 la is an electrical schematic of the solenoidal superconducting fault current limiting transformer shown in Fig. 10.

[0131] Fig. l ib is a physical schematic of the solenoidal superconducting fault current limiting transformer shown in Fig. 10.

[0132] Fig. 12 is a perspective view of a toroidal superconducting fault current limiting transformer of one embodiment of the present invention.

[0133] Fig. 13 is a cross-sectional view of the toroidal superconducting fault current limiting transformer shown in Fig. 12.

[0134] Fig. 14 is a detailed view showing a portion of the toroidal superconducting fault current limiter of Fig. 12.

[0135] Fig. 15 is a perspective view of the toroidal coil employed by the embodiment shown in Fig. 12.

[0136] Fig. 16a is an electrical schematic of a 2-tier toroidal superconducting fault current limiter.

[0137] Fig. 16b is a physical schematic of the fault limiting transformer depicted in Fig. 16a.

[0138] Fig. 16c is a top plan view of the 2-tier fault current limiting transformer of one embodiment of the present invention, wherein the toroid splits the phases around the circumference.

[0139] Fig. 17a is an electrical schematic of a 3 -tier toroidal superconducting fault current limiter.

[0140] Fig. 17b is a physical schematic of the 3-tier fault limiting transformer depicted in Fig. 17a.

[0141] Fig. 17c is a top plan view of the 3-tier fault current limiting transformer of one embodiment of the present invention, wherein the toroid splits the phases around the circumference. [0142] Fig. 18a is an electrical schematic showing a normal operation mode of the fault current limiting transformer of one embodiment.

[0143] Fig. 18b is a schematic showing a second operation mode of the system depicted in Fig. 18a.

[0144] Fig. 18c is a schematic showing a third operation mode of the system depicted in Fig. 18a.

[0145] The following component list and associated numbering found in the drawings is provided to assist in the understanding of one embodiment of the present invention:

# Component

2 Fault Current Limiter

4 SC Primary Coil

8 SC Secondary Coil

10 Insulation

12 Cu Primary Coil

18 Housing

20 End turn

24 End shield

34 Terminal

36 Reservoir

38 Port

40 Cryocooler

42 Port

50 Shunt

60 Transformer

64 Magnet assembly

68 SC Primary Magnet

72 SC Secondary Magnet

74 Cu Primary' Magnet

76 Cu Secondary Magnet

82 Housing

84 Terminal

200 Transformer

204 SC Primary Coil

208 SC Secondary Coil # Component

212 Cu Primary' Coil

224 End shield

236 Reservoir

240 Cryocooler

[0146] It should be understood that the drawings are not necessarily to scale. In certain instances, details that are not necessary for an understanding of the invention or that render other details difficult to perceive may have been omitted. It should be understood, of course, that the invention is not necessarily limited to the particular embodiments illustrated herein.

DETAILED DESCRIPTION

[0147] Fault Current Limiter

[0148] Figs. l-9c show a superconducting fault current limiter (FCL) 2 of one embodiment of the present invention that employs a tiered power handling methodology'. The FCL 2 is comprised of at least one SC primary coil 4 surrounded by or intermeshed with a SC secondary coil 8. The SC secondary coils 8 may be characterized by end turn angling 20 (see, Figs. 3a and 7b). In one embodiment, end turn angling 20 is formed by providing SC tape winds resulting of varied heights as shown in Fig. 3a. The coils 4,8 are separated by GIO electrical insulation layers 10 and are surrounded by a Cu primary coil 12, and the assemblage of coils 4, 8, 10, 12 are situated in a housing 18 that also accommodates an end shield 24.

[0149] The housing also accommodates an HTS shunt 50, and terminals 34 for interconnecting to a power grid. The housing may also accommodate a cryogen reservoir 36, that also may function as a core. The cryogen reservoir is filled by cryogen port 38. The FCL may be cooled by a cryocooler 40 with cryogen ports 42 connected to a compressor. The cryocooler is configured to circulate cryogen that keeps the cryogen in the reservoir at a predetermined temperature. In operation, once a fault is cleared, the tiered design provides a faster recovery time as each tier separately recovers and can operate at each fault level. All FCL modes, which will be discussed below, use an almost instantaneous recover}' flux-flow SC FCL design, where the critical HTS transport current, but not temperature, is not exceeded during a fault, wherein the common fluxflow negatives of more HTS required and the dependency of emerged resistance on instantaneous current, B, and temperature are removed when moving to the next tier.

[0150] To provide a high power and compact inductive FCL, multiple SC primary 4 and secondary 8 concentric HTS layers are wound together and work in parallel. B needs to complete a loop, so a full-length HTS secondary end shield 24 is placed on or both sides of each SC primary coil 4, providing SC primary B coil isolation. Due to the HTS B exclusion, the SC secondary coil located radially and axially inside each SC primary coil stops the SC primary concentric coil's main B from connecting to itself and the SC secondary coil on both sides of each SC primary coil stops the SC primary coils from connecting to one another. Only SC primary coil stray B remains. An odd number of SC secondary coils is often desired so that SC secondary even coil pairs are reverse-connected to cancel the emf, but one odd coil remains to induce a set current to achieve the desired quench profile. SC secondary coils or coil groups also have a reverse current connection option from the SC primary, within SC secondary B exclusion and induced B reducing the SC primary B operational limits, to further reduce common operation mutual inductance, response time, induced currents, and associated AC losses. SC primary to SC primary is not a reverse current connection so a high fault mutual inductance is maintained. To increase fault B coupling, B leakage is minimized by lowering the distance between winds but then winding structures must accommodate Lorentz forces.

[0151] As mentioned above, some embodiments employ an HTS cable shunt 50 configured to short the entire FCL. The contemplated shut enhances safe SC FCL operation, lowers grid stress, removes normal operational impedance, thereby improving FCL efficiency in a compact manner, and, counter an inductive FCL, reduces fault time constant and critical clearing time (CCT),even for low rotational inertia generators, and improves fault power factor and stability. With no fault, the HTS cable shut allows a no loss pass through up to the rated fault current. In FCL Mode 1 (Fig. 8b, R/L Fault Mode, Zshunt) the HTS cable quenches at 100% rated fault current. This starts the constant and increasing energy dissipation fault response. Because the HTS cable shunt is a short, the normal operation voltage drop is well below the FCL 5% desired maximum, AC losses are minimized, and a high substrate or preferred fast normal zone propagation velocity⁷ (NZPV) HTS and Cu core is used for HTS protection. Instead of using an HTS stack, an internally built FT cables greatly lower inductance and AC losses, uniformly distributes current, and can include a high twist angle to protect from Lorentz forces. If AC losses are still a concern, an HTS facing bifilar pancake, within voltage limits, is used.

[0152] Figs. 8a and 9a show a FCL normal Passive Mode 0 operation (i.e., lossless operations with no quench), wherein the HTS has no resistance and negligible inductance and AC losses. Most current (Ii) runs through the HTS shunt 50 in AC (Fig. 8a) or in the HTS shunt 50 and SC primary coils 4 (Ii and h) in DC (Fig. 9a). In AC, the B exclusion of the secondary⁷ shields the SC primary and Cu primary coils 12 from one another, which greatly lowers the inductance. This limits the SC primary⁷ impedance to the winding leakage impedance. In DC all current follows lowest resistance paths with various levels of HTS quench and increasing Cu resistance with no inductance effects, excluding periods of high transients for each mode.

[0153] Fig. 8b shows operation in Mode 1 (R/L Fault Mode), wherein the HTS cable quenches at 100% rated fault current. This starts the constant and increasing energy dissipation fault response.

[0154] Fig. 8c shows the FCL in Mode 2 (L Fault Mode), wherein the secondary' quenches at 175% rated fault current. This provides a sudden, high fault impedance as the SC primary coils mutually connect. The secondary substrate must be designed to handle all induced currents in this mode. All inner SC secondary coils see two SC primary coil sources versus the outer SC secondary coils and hence the inner SC secondary coils have around double the turns to allow a constant current transformer relationship. The parallel Cu primary, wound with square wire for a higher packing factor, is outside the outermost secondary for additional inductive fault impedance.

[0155] Fig. 8d shows the FCL in Mode 3, (L/R Fault Mode), wherein the SC primary quenches at 300% rated fault current and all remaining fault energy goes to the Cu primary up to an allowable 600% rated fault current. The Cu primary', with negligible power during normal operation, enters SC primary resistive fault mode with a very' high, increasing R and then L impedance. Unlike entering FCL Mode 2 with a set inductance increase, FCL Mode 3 entry must account for sufficient Cu primary impedance to handle the high input current for a set voltage to remove a thermal runaway situation. Each mode, especially Mode 3, must not have less impedance than the prior mode else recovery will not occur. All fault mode values are set via the FCL design and readily changed by selectively altering the manufacturing process, in some embodiments via the WRAP-M techniques mentioned above.

[0156] It has been found that secondary HTS stabilizer may be subjected to appreciable heating in Mode 2. One way to address this heating is to use uninsulated HTS with a shorted Cu sheet wound into the middle of the secondary' HTS. The HTS will exclude any B heating in Mode 1. In Mode 3 the Cu sheet not only provides a large Cu area for the current, but more importantly, in Mode 2 the sheet essentially makes the entire uninsulated secondary into a single magnetic winding turn, which then removes the large induced emf and all associated heating.

[0157] Figs. 9a-c show operation of the FCL for DC applications, including inductive operations with high transients. For any period of high transients, each operational mode will include its inductive fault response before advancing to the next sequential mode.

[0158] Figs. 10-1 lb show a solenoidal superconducting fault current limiting transformer 200 (FCL/Xfmr) of one embodiment of the present invention. The FCL Xfmr shown operates similar to the toroidal transformer described below but includes many of the features found in the FCL shown in Figs. 1 -7b. Here, an HTS Xfmr comprised of SC primary coils 204 and SC secondary coils 208 is surrounded by a Cu Xfmr comprised of Cu primary coils 212 (and perhaps Cu secondary coils, as employed by the toroidal embodiment shown in Fig. 13). The upper end shield 224 is also provided. Here, the reservoir is larger, wherein the inner diameter of the coils 204, 208 is spaced from the outer diameter of the cryocooler 240. One of skill in the art will appreciate that the reservoir of this embodiment may be more similar to that of Figs. 1 and 2 without departing from the scope of the invention.

[0159] Figs. 12-18c show a fully cold, HTS transformer 60. One embodiment is comprised of a single or multi-phased toroidal magnet assembly 64. Power capability is scalable by using a system of optimally sized parallel (cunent) and series (voltage) toroid segments or separate toroids, one toroidal per phase, stacked in a single cr ostat with a common cryo system. A phased toroid is separated into axial and radial magnet components for a single to multi-phased, multitapped Xfmr with magnets that can overlap or be separated. Sections are wound in less than toroidal halves, thirds for a 3-phase device. Winding in thirds allows a 3-phase build on a single toroidal with no splice needed within magnets. Combining windings and phases into a single toroid lowers weight, size, capital, maintenance costs, and increases efficiency (a high packing factor toroidal B path is the most efficient of any geometry) while providing a more reliable unit from fewer components. Total B across all phases cancels due to phasing sequencing removing external Xfmr phased-induced crosstalk. The maximum unit size is determined by limitations of soldering, thermal, cost, EM shielding, etc. Due to an air core design with no Fe B continuity needs, all magnets are wound at once or in sections to connect when forming the final device. Structurally, the toroid is held at phase change locations.

[0160] As shown in Figs. 13-15, the toroid is evenly wound and electrically phased into separate axial toroidal windings sections, one per phase, along the winding axis and radially separated into SC primary 68 and secondary 72 magnets of each phase in each axial section. The windings are enclosed in a housing 82, which also accommodates at least one terminal 84. The housing may also accommodate a cryogen reservoir 36, that also may function as a core. The cryogen reservoir may be filled by cryogen port 38. The FCL may be cooled by a cryocooler 40 with cryogen ports 42 that connect to a compressor.

[0161] As show n in Fig. 14, a Cu Xfmr comprised of a Cu primary magnet 74 (2P) and a Cu secondary magnet 76 (2S) is placed on top of the SC Xfmr (e.g., that employs primary 68 (IP) and secondary 72 (IS)), where each phased secondary (S) is placed directly on top of the respective phased primary (P) to support induced secondary Xfmr action. SC layers are used to radially B separate each magnet. In this toroidal configuration, the Xfmr excludes outer Cu windings until a quench, producing a very efficient Xfmr and fast-acting FCL operation. HTS B exclusion minimizes leakage B, which keeps B in the toroid for the Xfmr action, shields each phase from induced currents from other phases, and allows an FCL option. The SC secondary (Iis) and Cu primary and secondary (lip and hs), wound with square wire for a higher packing factor, are wound and connected such that the induced currents and any leakage flux adds to the Xfmr action. For any B that may escape the inner toroid, the outer LN2 cooled Cu Xfmr toroid phase winding captures that B with a slight resistance but increases overall efficiency by removing any possible leakage B.

[0162] The Xfmr shown in Figs. 12-16c is configured to provide similar operational modes as those described above with respect to Figs. l-9c. Again, an FCL within an Xfmr, or separate, must quickly increase the impedance while passively yet safely controlling the high-power path, both current and voltage. During all modes, the toroidal FCL acts as a Xfmr.

[0163] Figs. 17a-d represent the toroidal SC FCL Xfmr where three separate toroids each representing an option of an individual phase are contained within a single, common cryostat for compactness and simplicity.

[0164] Fig. 17c represents a single SC FCL Xfmr where multiple phases, in this case 3, are separated around the circumference of the toroid. Such a design allows a compact design with an efficient operational B path. If used in the 3 -tier configuration described in Fig. 17a-d, the resulting toroidal SC FCL Xfmr assembly contains 9 phases.

[0165] Fig. 18a shows FCL Mode 1 (L Fault Mode), wherein HTS inductance removes low energy faults above 100% rated Xfmr operation (lip and Iis). This mode power conditions the line by immediately working to clear all partial power design faults.

[0166] FCL Mode 2 (R/L Fault Mode): is shown in Fig. 18b, wherein the Xfmr side that first exceeds the HTS critical current, usually the high Xfmr current side, quenches at 50% rated maximum fault current. This electrically connects that side's Cu Xfmr (hs here) with the nonquenched HTS Xfmr side (lip here). This mode is set to clear all standard design faults within a 1/4 cycle due to the nature of the resistive circuit increase and then recover within O.lsec to seconds, depending upon the secondary loading.

[0167] Fig. 18c shows the FCL Mode 3 (R/L Fault Mode), wherein the Xfmr side that next exceeds the HTS critical current, usually the low Xfmr current side, quenches at 75% rated maximum fault cunent. This connects both Cu Xfmr sides (I2P and hs). At this point, the entire FCL is inefficient but powerful at limiting the fault, and the HTS must be protected. The Cu is cryogenically cooled to assist with power shedding. The Cu primary will initially be at LN2 temperature, where Cu in LN2 has ~8x the conductance. As a fault persists, the LN2 will boil off over time thus greatly increasing the Cu resistance, which provides an optimal increasing variable resistive response. This mode is set to remove the fault within milliseconds then recover within seconds, depending upon loading, else minutes for extreme fault cases beyond normal FCL specifications. Due to the high Mode 3 current, after the LN2 level is diminished, in Mode 3 the Cu coil will quickly heat and risk the FCL failing open circuited.

[0168] For an Xfmr FCL the HTS stabilizer may receive appreciable inductive coupling and heating in Modes 2 and 3. There are multiple solutions to address this situation. In one embodiment, the secondary induced heating fix as described above can be used. Alternatively, an uninsulated HTS with a shorted Cu sheet wound into the middle of each HTS coil may be employed. The HTS will exclude any B heating in Mode 1. In Modes 2 and 3, the Cu sheet provides a large Cu area for the current and makes the entire uninsulated secondary one turn, which then removes the large induced emf and all associated heating.

[0169] Once the fault is cleared, a tiered design provides a faster recovery time as each tier separately recovers and can operate at each fault level. All FCL modes use an almost instantaneous recover}' flux-flow SC FCL design, where the critical HTS transport current but not temperature is not exceeded during the fault. The common flux-flow negatives of more HTS required and the dependency of emerged resistance on instantaneous current, B, and temperature are removed when moving to the next tier.

Claims

Claims:

1. A superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; and a shunt selectively interconnecting the power input to the power output.

2. The superconducting fault current limiter of claim 1, wherein a hollow portion or thermal conductive path portion of the core is configured to receive a cryogen.

3. The superconducting fault current limiter of claim 1, wherein the primary coil is comprised of a conventional conductor.

4. The superconducting fault current limiter of claim 1, wherein the superconducting primary and superconducting secondary' coils are formed of wound high temperature superconducting tape, and the primary coil is comprised of copper.

5. The superconducting fault current limiter of claim 1, wherein the superconducting primary and superconducting secondary coils thin magnets formed of wound high temperature superconducting tape of a rectangular profile.

6. The superconducting fault current limiter of claim 1, wherein the shunt is a superconducting tape or cable.

7. The superconducting fault current limiter of claim 1, wherein the at least one superconducting primary coil is comprised of a plurality of layers, wherein each layer has upper and/or lower edges that do not correspond to the upper and/or lower edges of an adjacent layer, which defines an end turn comprised of a curved or tapered winding pattern.

8. The superconducting fault current limiter of claim 1, wherein the at least one superconducting primary coil defines a solenoid defining a solenoid axis corresponding to the magnetic field of the solenoid that extends generally along the length of the solenoid from the upper edge to the lower edge of at least one superconducting primary coil, wherein the superconducting primary coil is formed of wound high temperature superconducting tape having a rectangular cross section, and wherein the tape width is aligned with the solenoid axis.

9. The superconducting fault current limiter of claim 8, wherein the tape is situated such that its width is parallel to the greatest magnetic flux generated by the solenoid.

10. The superconducting fault current limiter of claim 1, wherein the core is interconnected to a cryogen source that is configured to continuously or periodically receive cryogen to maintain the temperature of at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil below a predetermined temperature.

11. The superconducting fault current limiter of claim 1, wherein the core is a cryogen reservoir, and further comprising a cryocooler in thermal communication with the reservoir.

12. The superconducting fault current limiter of claim 11, wherein the core is at least partially comprised of the cryocooler.

13. The superconducting fault current limiter of claim 1, wherein the shunt is a superconducting tape or cable, and wherein the superconducting primary coil, the superconducting secondary coil, and the primary coil define a combined inductive and resistive type superconducting FCL.

14. The superconducting fault current limiter of claim 1, wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: mode 0 associated with normal AC function characterized by a main power current present primarily in the shunt; mode 1, which occurs when the main power current exceeds a predetermined level, which quenches the shunt, which shifts the main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary coils quench, which shifts the main power current to the superconducting primary coil; and mode 3, which occurs when superconducting primary coils, superconducting secondary coils, and shunt are quenched, which shifts the main power current to the pnmary coil.

15. The superconducting fault current limiter of claim 14, further comprising a primary var compensator configured to compensate for a predetermined impedance.

16. The superconducting fault current limiter of claim 14, wherein in mode 1, the superconducting secondary coils create a flux exclusion that isolates the superconducting primary coils.

17. The superconducting fault current limiter of claim 16, further comprising a secondary end shield located adjacent to the upper edge or lower edge of the superconducting secondary coil, the secondary end shield configured to isolate the primary coils.

18. The superconducting fault current limiter of claim 14, wherein in mode 1, the superconducting primary coil operates with the reactance of the primary coil that is mostly inductive.

19. The superconducting fault current limiter of claim 14, wherein in mode 1, all partial power design faults are cleared within a partial cycle.

20. The superconducting fault current limiter of claim 14, wherein in mode 2, the superconducting secondary coil generates a high resistance.

21. The superconducting fault current limiter of claim 14, wherein the at least one superconducting primary coil is comprised of a plurality of layers, wherein in mode 2, the layers magnetically connect to increase primary mutual inductance.

22. The superconducting fault current limiter of claim 14, wherein in mode 3, the superconducting primary generates a high resistance, which sends all current to the quenched superconducting and non-superconducting coils.

23. The superconducting fault current limiter of claim 1, wherein the superconducting secondary coil is comprised of uninsulated superconducting tape or cable with layers wound around a conventional conductor, wherein the conventional conductor is wound into a middle portion of the superconducting secondary coil.

24. The superconducting fault current limiter of claim 1, wherein the superconducting primary and superconducting secondary coils are formed of wound high temperature superconducting tape having a rectangular profile.

25. The superconducting fault cunent limiter of claim 1, wherein primary and superconducting secondary coils are comprised of superconducting tape or cable.

26. A method of addressing a fault in a power grid comprising: providing a superconducting fault current limiter comprising: a core adapted to receive a cryogen; at least one superconducting primary coil positioned about the core and having an upper edge and a lower edge; at least one superconducting secondary coil positioned about the core and having an upper edge and a lower edge, the superconducting secondary coil positioned adjacent to the superconducting primary coil; a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil; a power input interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; a power output interconnected to at least one of the superconducting primary coil, the superconducting secondary coil, and the primary coil; and a shunt comprised of a superconducting cable selectively interconnecting the power input to the power output; wherein the shunt is a superconducting tape or cable, and wherein a plurality of operational modes are provided comprising: passing a main power current through the shunt until the main power current exceeds a predetermined level; shifting the main power current to the superconducting primary coil when main power current exceeds the predetermined level, and inducing a secondary current in the superconducting secondary coil; shifting the main power current to the superconducting primary coil when the superconducting secondary coils quench; and shifting the main power current to the Cu primary when the superconducting primary coils, superconducting secondary coils, and shunt are quench.

27. The method of claim 26, wherein a hollow portion or thermal conductive path portion of the core is configured to receive a cryogen.

28. The method of claim 26, wherein the primary coil is comprised of a conventional conductor.

29. The method of claim 26, wherein the fault current limiter further comprises a primary var compensator configured to compensate for a predetermined impedance.

30. The method of claim 26, wherein the superconducting secondary coils create a flux exclusion that isolate the superconducting primary' coils

31. The method of claim 26, wherein the fault current limiter further comprises a secondary end shield located adjacent to the upper edge or lower edge of the superconducting secondary coil, the secondary end shield configured to isolate the primary coils.

32. The method of claim 26, wherein the superconducting primary coil operates with the reactance of the primary coil that is mostly inductive.

33. The method of claim 26, wherein all partial power design faults are cleared within a partial cycle.

34. The method of claim 26, wherein the superconducting secondary coil generates a high resistance.

35. The method of claim 26, wherein the at least one superconducting primary coil is comprised of a plurality of layers, wherein in mode 2, the layers magnetically connect to increase primary mutual inductance.

36. The method of claim 26, wherein the superconducting primary coil generates a high resistance, which sends all cunent to the quenched superconducting and non- superconducting coils.

37. An electrical transformer comprising: a primary magnet coil; a secondary magnet coil adjacent to the primary magnet coil; a superconducting primary magnet coil; a superconducting secondary magnet coil; wherein the primary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil are surrounded by a housing, such that an inner surface of the primary magnet coil defines an internal volume; and a power input interconnected to at least one of the primary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil; and a power output interconnected to at least one of the primary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil.

38. The electrical transformer of claim 37, wherein the superconducting primary and superconducting secondary coils are formed of wound high temperature superconducting tape, and further comprising a primary coil positioned adjacent to the at least one superconducting primary coil and the at least one superconducting secondary coil.

39. The electrical transformer of claim 38, wherein the primary magnet coil, secondary magnet coil, and primary' coil are comprised of a conventional conductor.

40. The electrical transformer of claim 37, wherein internal volume defines a core interconnected to a cryogen source configured to continuously or periodically receive cryogen to maintain the temperature of at least one of the primary magnet coil, the secondary magnet coil, the superconducting primary magnet coil, the superconducting secondary magnet coil, and the primary coil below a predetermined temperature.

41. The electrical transformer of claim 38, wherein a plurality' of operational modes are provided comprising: mode 1, associated with normal AC function characterized by main power current to the superconducting primary coil, and which induces a secondary current in the superconducting secondary coil; mode 2, which occurs when the superconducting secondary coils quench, which shifts the main power current to the conventional conductor secondary coil as induced by the superconducting primary coil; and mode 3, which occurs when superconducting primary coils and superconducting secondary coils are quenched, which shifts the main power current to the primary coil.

42. The electrical transformer of claim 37, wherein the primary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil define a solenoid having a solenoid axis corresponding to the magnetic field of the solenoid that extends generally along the length of the solenoid from the upper edge to the lower edge of at least one superconducting primary coil, wherein the superconducting primary coil is formed of wound high temperature superconducting tape having a rectangular cross section, and wherein the tape width is aligned with the solenoid axis.

43. The electrical transformer of claim 42, wherein the tape is situated such that its width is parallel to the greatest magnetic flux generated by the solenoid.

44. The electrical transformer of claim 37, wherein the internal volume is a cryogen reservoir, and further comprising a cryocooler in thermal communication with the reservoir.

45 The electrical transformer of claim 37, wherein the internal volume accommodates a cryocooler.

46. The electrical transformer of claim 37, wherein the primary magnet coil, secondary magnet coil, superconducting primary magnet coil, and superconducting secondary magnet coil are in the shape of a toroid that is evenly wound and electrically phased into separate axial toroidal windings sections.

47. The electrical transformer of claim 46, wherein the superconducting secondary magnet coil magnetic flux separates superconducting rimary magnet coil from the primary magnet coil and secondary magnet coil.

48. The electrical transformer of claim 46, further comprising a layer of toroidal conductors with a connected layer of poloidal conductors.