WO2023245779A1 - 内存判定方法及装置、存储介质及电子设备 - Google Patents

内存判定方法及装置、存储介质及电子设备 Download PDF

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Publication number
WO2023245779A1
WO2023245779A1 PCT/CN2022/105733 CN2022105733W WO2023245779A1 WO 2023245779 A1 WO2023245779 A1 WO 2023245779A1 CN 2022105733 W CN2022105733 W CN 2022105733W WO 2023245779 A1 WO2023245779 A1 WO 2023245779A1
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memory
parsing
output information
memory block
result
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French (fr)
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陈庆峰
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Changxin Memory Technologies Inc
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Changxin Memory Technologies Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing

Definitions

  • the present disclosure relates to the field of integrated circuit technology, and specifically, to a memory determination method, a memory determination device, a computer-readable storage medium, and an electronic device.
  • the RMT (Rank Margin Tool) test is a test of the memory bit width margin. Its test results directly reflect the performance of the memory on the server motherboard.
  • a memory determination method which includes: guiding the output information after running the memory bit width margin test program back to the first memory block; analyzing the output information to obtain the analysis result; The parsing results are registered in the service table; in the memory test phase, the parsing results are obtained from the service table, and the parsing results are judged to obtain the judgment results.
  • guiding the output information back to the first memory block includes: modifying the underlying driver, selecting a piece of memory as the first memory block; and storing the output information in the The first memory block.
  • storing the output information in the first memory block includes: calling a function library for printing output information; modifying the printing part in the function library to Output the output information to the first memory block.
  • parsing the output information to obtain the parsing result includes: adding a parsing program in the basic input and output system, parsing the output information to obtain the parsing result;
  • the above analysis results are stored in the second memory block.
  • the parsing results include memory performance values.
  • registering the parsing result in a service table includes: copying the parsing result of the second memory block to the service of the system memory block. table.
  • the method includes: registering a driver in the service table for subsequent reading of the parsing result.
  • the method includes: writing the determination result into an identification code bit.
  • a memory determination device including: an information guidance module for guiding the output information after running the memory bit width margin test program back to the first memory block; and an analysis module for The output information is parsed to obtain parsing results; a registration module is used to register the parsing results into a service table; a determination module is used to obtain the parsing results from the service table during the memory test phase, and The analysis results are judged to obtain the judgment results.
  • the information guidance module is used to modify the underlying driver, select a piece of memory as the first memory block, and store the output information in the first memory block. .
  • the information guidance module is configured to call a function library for printing output information; modify the printing part in the function library to output the output information to the The first memory block.
  • the parsing module is used to add a parsing program in the basic input and output system, parse the output information to obtain the parsing result; and store the parsing result in the second memory in the block.
  • the parsing results include memory performance values.
  • the registration module is configured to copy the parsing result of the second memory block to the service table of the system memory block.
  • the device further includes: a reading module, configured to register a driver in the service table for subsequent reading of the parsing results.
  • the device further includes: an identification module, configured to write the determination result into an identification code bit.
  • a computer-readable storage medium is provided, a computer program is stored thereon, and when the computer program is executed by a processor, the above-mentioned memory determination method is implemented.
  • an electronic device including: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform the operation via executing the executable instructions. Execute the above memory determination method.
  • Figure 1 schematically shows a schematic diagram of an RMT testing process in the prior art
  • FIG. 2 schematically shows a step flow chart of a memory determination method according to an exemplary embodiment of the present disclosure
  • Figure 3 schematically shows a schematic diagram of an RMT testing process according to an exemplary embodiment of the present disclosure
  • Figure 4 schematically shows a block diagram of a memory determination device according to an exemplary embodiment of the present disclosure
  • FIG. 5 schematically shows a module diagram of an electronic device according to an exemplary embodiment of the present disclosure.
  • Example embodiments will now be described more fully with reference to the accompanying drawings.
  • Example embodiments may, however, be embodied in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concepts of the example embodiments.
  • the described features, structures or characteristics may be combined in any suitable manner in one or more embodiments.
  • numerous specific details are provided to provide a thorough understanding of embodiments of the disclosure.
  • those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of the specific details described, or other methods, components, devices, steps, etc. may be adopted.
  • well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the disclosure.
  • Memory is one of the important components in the computer. It is the bridge that communicates with the CPU. All programs in the computer run in the memory, so the performance of the memory has a great impact on the computer. Memory is also called internal memory. Its function is to temporarily store calculation data in the CPU and exchange data with external memories such as hard disks. As long as the computer is running, the CPU will transfer the data that needs to be calculated into the memory for calculation. When the calculation is completed, the CPU will send the results out. The operation of the memory also determines the stable operation of the computer. Memory is composed of memory chips, circuit boards, gold fingers and other parts.
  • Memory is the main storage component on the server motherboard and plays an important role in the computer storage hierarchy.
  • the stability and reliability of memory, as well as the compatibility of memory and motherboard are crucial to server design.
  • differences in memory of different brands, differences in server motherboard materials, PCB (Printed Circuit Board) layout and wiring design are all factors that affect the compatibility of server motherboards and memory. Therefore, RMT testing is an essential part of the server research and development process. Its test data can reflect the performance of the memory on the server motherboard to a certain extent. R&D personnel can evaluate the motherboard PCB device layout and routing design based on the test data to reduce project costs. risk.
  • RMT (Rank Margin Tool) is a memory performance determination program that is automatically run by the BIOS (Basic Input Output System) when booting. After the RMT program is run, the training results will be output through the Debug Port to obtain the memory bit width margin.
  • BIOS Basic Input Output System
  • BIOS is a set of programs solidified on a ROM (Read-Only Memory) chip on the motherboard of the computer. It saves the computer's most important basic input and output programs, system setting information, and self-test after booting. Programs and system self-starting programs. Its main function is to provide the lowest and most direct hardware settings and control for the computer.
  • the measurement items of the RMT test include timing parameters and voltage parameters.
  • the timing parameters include read timing tolerance, write timing tolerance and command timing tolerance;
  • the voltage parameters include the read reference voltage voltage tolerance. , write reference voltage voltage tolerance and command reference voltage voltage tolerance.
  • each parameter has a corresponding benchmark.
  • the read timing tolerance has a corresponding minimum read benchmark
  • the write timing tolerance has a corresponding minimum write benchmark
  • the command timing tolerance has a corresponding minimum command benchmark
  • read The voltage tolerance of the reference voltage has a corresponding minimum read reference voltage base
  • the write reference voltage voltage tolerance has a corresponding minimum write reference voltage base
  • the command reference voltage voltage tolerance has a corresponding minimum command reference voltage base.
  • test parameter value is less than its corresponding benchmark value, it means that this parameter is unqualified and the corresponding memory is defective. Only when all parameter values are greater than their corresponding benchmark values, it means that the corresponding memory is qualified.
  • FIG. 1 a schematic diagram of an RMT testing process in the prior art is shown.
  • a server 101 and a PC 102 are shown.
  • the server 101 is equipped with a test motherboard.
  • the test motherboard is equipped with a BMC (Baseboard Management Controller).
  • the server 101 and the PC 102 are connected through a serial port line. .
  • the server 101 serves as the slave computer and is responsible for running the test program and transmitting the test data through the serial port line.
  • the PC 102 serves as the host computer and receives the test data through the serial port line; then, the data is collected through manual operation and saved as RMT original data. Then the RMT original data is imported into the analysis tool through manual operation, and the RMT original data is processed by the analysis tool. The data is analyzed and the RMT test results are obtained. Finally, manual operation is used to make judgments based on the memory bit width margin value in the RMT test results, and mark defective products.
  • exemplary embodiments of the present disclosure first provide a memory determination method for performing an RMT test on the memory to determine the quality of the memory based on the bit width margin of the memory.
  • the above memory determination method may include:
  • Step S210 Direct the output information after running the memory bit width margin test program back to the first memory block
  • Step S220 Analyze the output information and obtain the analysis results
  • Step S230 Register the parsing results in the service table
  • Step S240 In the memory test stage, obtain the parsing results from the service table, judge the parsing results, and obtain the judgment results.
  • the memory determination method provided by the embodiment of the present disclosure redirects the output information after the memory bit width margin test program is run to the first memory block, that is, to the first memory block that runs the memory bit width margin test program.
  • the output information can be parsed in the first memory block.
  • the parsing results can be registered in the service table, so that during the memory test phase, the parsing results can be obtained directly from the service table. And judge the analysis results to obtain the judgment results. The entire testing, analysis and result determination process is completed in the first memory block. There is no need to set up the host computer and its peripheral equipment.
  • All testing processes can be completed in one slave computer, saving resources; in addition, the entire test During the process of analysis, analysis and result determination, there is no need for manual intervention, which can improve the efficiency of the test, reduce the time of the test process, avoid errors caused by human operations, and improve the accuracy of the test judgment.
  • step S210 the output information after running the memory bit width margin test program is directed back to the first memory block.
  • the above-mentioned memory width margin test program is the aforementioned RMT test program.
  • the memory width margin test program is automatically run in the basic input and output system BIOS to measure memory performance when the server is turned on. Judgment procedure.
  • the menu to control the execution of RMT testing can be set in the server's basic input and output system BIOS.
  • the RMT test menu can be set in the server's BIOS to automatically perform the RMT test during the server startup process. You can also turn off this option when you do not need to test RMT to reduce the impact of RMT testing on the system boot time.
  • the above-mentioned memory bit width margin test program is run on the first memory block, and the first memory block belongs to the server.
  • the above memory width margin test program is run on the server.
  • the output information obtained is not directed to the peripheral PC host computer through the serial port. Instead, it is redirected back to the server, and the server continues to perform subsequent operations.
  • the memory determination method provided by the exemplary embodiment of the present disclosure does not require additional host computers and peripheral equipment. Only the server is needed to complete the entire process from memory bit width margin testing to determination, thereby saving resources and simplifying the process. Test Equipment.
  • the output information after the memory bit width margin test program is run is mainly the log information during the execution of the RMT test, including (but not limited to) the executed actions and corresponding value.
  • the output information after the RMT test is mainly the log information during the execution of the RMT test, including (but not limited to) the executed actions and corresponding value.
  • the timing parameters include read timing tolerance, write timing tolerance and command timing tolerance
  • the voltage parameters include read reference voltage voltage tolerance, write reference voltage Voltage Tolerance and Command Reference Voltage Voltage Tolerance.
  • the original process performed by the serial port can be modified by modifying the underlying driver or the underlying BIOS code.
  • the output information outputted above is redirected to the first memory block.
  • the underlying BIOS code is the basic input and output system. It is a set of programs solidified on a ROM memory chip on the motherboard of the computer. It saves the computer's most important energy-saving input and output programs, system setting information, and automatic operation after booting. Check program and system auto-start program.
  • the underlying BIOS code can provide the lowest and most direct hardware settings and control for the computer.
  • the underlying driver is a program that implements human-computer interaction in the form of accessing the underlying hardware. Corresponding information interaction needs to be achieved between the driver and the application program.
  • the application program implements hardware control actions by sending corresponding instructions to the driver program.
  • the driver transmits the status of hardware reading and writing and the data obtained from the hardware to the application program to realize the interaction between the application program and the driver program.
  • the underlying driver is the basic program that makes the device work. It provides users with an interface for using the device.
  • the underlying driver is related to the hardware and can provide API function calling interfaces to the application layer.
  • the application layer can access the hardware by calling these interfaces without knowing the specific working conditions of the hardware.
  • An application program is a program written according to actual application requirements. It refers to the logical part of the code and directly calls the interface reserved by the underlying driver without caring about the underlying hardware implementation and implementation process.
  • a piece of memory can be selected as the first memory block by modifying the underlying driver.
  • the first memory block can be used as an information cache, and the output information can be stored in the first memory block, thus replacing the original memory block.
  • the output information output by the serial port is redirected to the first memory block.
  • the following interface functions for allocating memory can be used to modify memory through the underlying driver, or in the process of selecting memory:
  • GFP_KERNEL is a flag. You can use this flag to set the method of allocating memory. Currently, this GFP_KERNEL can sleep and has a normal priority. If it is GFP_ATOMIC, it has a high priority and is atomic and cannot sleep. You can pass kfree(rbuff ) to release.
  • kmalloc Similar to kmalloc, except that the memory allocated by kmalloc is continuous regardless of the virtual address or the physical address; while the memory allocated by vmalloc is only continuous at the virtual address, not necessarily at the physical address, so a table is needed. To establish the relationship between virtual addresses and scattered physical addresses, this will reduce the efficiency a lot, so this interface is generally used when large memory is to be allocated.
  • This interface is the kzalloc() interface with resource management.
  • Memory allocated using resource-managed functions is associated with the device to which it belongs. This memory is automatically released when the device is detached from the system or the device driver is uninstalled. Memory can also be released through devm_kfree().
  • slab allocator for memory allocation, where slab is equivalent to a cache.
  • Slab is usually divided into three states: full slab, partially full slab, and empty slab.
  • memory needs to be allocated next time it will first check whether there is a slab that meets the conditions. If not, a new slab will be created.
  • kmalloc is called, it will first check whether there is a slab that meets the conditions.
  • kmem_cache_create is used to create a new cache. This is typically performed during kernel initialization, or when a kernel module is first loaded.
  • kmem_cache_alloc To allocate an object from a named cache, you can use the kmem_cache_alloc function.
  • kmem_cache_free
  • printing information usually calls functions in the function library, so the printing function of the function library can be directly modified to the required printing method.
  • a function library for printing the output information can be called, and the printing part in the function library can be modified to output the output information to The first memory block.
  • the printing part refers to the information output part.
  • the printout information here belongs to RMT (Rank Margin Tool) print information. Modifying the printing part in the function library means finding out the printing part of the underlying BIOS code and modifying it.
  • step S220 the output information is analyzed and the analysis result is obtained.
  • the output information output by the RMT test is in log format, which is inconvenient for direct use, such as numerical judgment. Therefore, specific keywords need to be obtained to extract useful information, such as numerical values.
  • the output information in the first memory block can be parsed to extract useful information.
  • the parsing program is a type of high-level language translation program. It takes a source program written in a source language (such as BASIC) as input. After interpreting a sentence, it is submitted to the computer for execution. It does not form a target program.
  • a parser is a language processing program that can directly execute the source program or the internal form of the source program (intermediate code) when running a user program.
  • the advantages of the parsing program are: simple structure, easy to implement, easy program scheduling and modification, human-computer dialogue, and suitable for programming and execution in interactive conversation mode.
  • the parsing program consists of a master control program and several execution subroutines.
  • the working process of the parsing program is as follows: first, the master control program performs initial preparation work and configures the initial working state; then, a statement is taken from the source program and syntax check is performed. If there is an error in the syntax, an error message will be output; otherwise, the corresponding execution subroutine will be executed according to the determined statement type. After returning, check whether the parsing work is completed. If it is not completed, continue to parse the next statement; otherwise, perform necessary aftermath work.
  • the analysis results include memory performance values corresponding to timing parameters and voltage parameters, including: read timing tolerance, write timing tolerance, command timing tolerance, read reference voltage voltage tolerance, write Reference voltage voltage tolerance and command reference voltage voltage tolerance, etc.
  • the parsing result can be stored in the second memory block, where the second memory block is also the memory in the server, but the second memory block Belongs to a different memory block than the first memory block.
  • step S230 the parsing results are registered in the service table.
  • the second memory block can be taken out and moved to a memory space reserved by the system.
  • the memory block is divided into user-available space and system reserved space.
  • the move is mainly to reduce the memory space available to the user and increase the testable space for subsequent memory tests.
  • the testable space here is not The occupied user free space.
  • the second memory block itself is a system memory block, there is no need to perform the above moving operation.
  • the purpose of moving the second memory block to the memory space reserved by the system is to copy the parsing result of the second memory block to the service table of the system memory block, where,
  • the service table can be as shown in Table 1.
  • the service table can have multiple formats, which are not limited to the format shown in Table 1. Exemplary embodiments of the present disclosure have no special limitations on the format of the service table.
  • a driver while copying the parsing results to the service table of the system memory block, a driver can be registered in the service table for subsequent reading of the parsing results.
  • GUID is a globally unique identifier (globally unique identifier), which is a 128-bit binary numeric identifier generated by an algorithm. , available for all computers and networks that require a unique identifier.
  • GUID globally unique identifier
  • Drivers can use GUIDs to identify various items, and driver writers can create GUIDs for items such as device interface classes, custom PnP events, and custom WMI events.
  • Drivers include header files that define the GUID they use.
  • GUID GUID
  • the Initguid.h header file redefines the DEFINE_GUID macro to instantiate a GUID (instead of just declaring an EXTERN reference). Include this header file in the driver source file where the GUID should be instantiated. (User-mode applications include Objbase.h, which then includes GUID definitions).
  • a driver may contain multiple header files containing GUID definitions, including system-provided headers and third-party headers.
  • the parsing results may be identified by GUID.
  • the specific identification method will not be described here.
  • Step S240 In the memory test stage, obtain the parsing results from the service table, judge the parsing results, and obtain the judgment results.
  • the parsing results can be directly obtained from the service table for testing during the memory testing phase.
  • the memory testing phase may include a testing phase to determine the quality of the memory, that is, a phase to determine the quality of the memory based on the analysis results.
  • a new test item can be added in the memory test software that performs memory testing as a trigger point for parsing result determination, so that the test item can be used to trigger the parsing result determination.
  • the parsing result when the determination of the parsing result is triggered by a test item, the parsing result can be retrieved from the service table through the preset GUID to determine the parsing result.
  • each tolerance value corresponds to a benchmark value.
  • the read timing tolerance has a corresponding minimum read benchmark
  • the write timing tolerance has a corresponding minimum write benchmark
  • the command timing tolerance has a corresponding minimum write benchmark.
  • Minimum command reference the read reference voltage voltage tolerance has a corresponding minimum read reference voltage reference
  • the write reference voltage voltage tolerance has a corresponding minimum write reference voltage reference
  • the command reference voltage voltage tolerance has a corresponding minimum command reference voltage reference.
  • the judgment rule for the analysis results shown in Table 1 is: the tolerance value is greater than or equal to the benchmark value, indicating that the tolerance value meets the standard, that is, PASS; if the tolerance value is less than the benchmark value, then It means that the tolerance value of this item does not meet the standard, that is, FAIL. For a memory, as long as one of the tolerance values does not meet the standard, the memory is considered to be substandard.
  • the judgment result can be written into the identification code bit for identification.
  • the determination result can be written into a specific code bit of SPD (Serial presence detect) for identification.
  • SPD Serial presence detect
  • SPD is a standardized way to access information related to memory modules.
  • SPD itself is an electrically erasable programmable read-only memory.
  • other fields are reserved for manufacturers to use, so it can Use the reserved fields in SPD to mark the judgment results.
  • you can read the information in the specific code bit of SPD to know whether the memory module has been missed, and judge the RMT test result value to determine the quality of the memory module (checking for defective products), so that Test results can be traced and error prevention can be achieved.
  • step 1 boot up and perform the RMT test to obtain the test results, that is, the output information after the memory width margin test program is run; step 2, register the test results to the Service Table in the service table; then, enter the system loading stage, step 3, enter the memory test stage, start the memory test program; at the same time, step 4, take out the test results from the Service Table service table (it needs to be explained that the test here The result is the result after analysis); Step 5, after completing the memory test, that is, after judging the analysis result, the judgment result can be written in SPD.
  • the memory determination method redirects the output information after the memory bit width margin test program is run to the first memory block, that is, to the running memory bit width margin.
  • the output information can be parsed in the first memory block.
  • the parsing results can be registered in the service table, so that during the memory test phase, the output information can be directly obtained from the service table.
  • the entire testing, analysis and result determination process is completed in the first memory block. There is no need to set up the host computer and its peripheral equipment.
  • All testing processes can be completed in one slave computer, saving resources; in addition, the entire test , analysis and result judgment process, no manual intervention is required, which can improve the efficiency of the test, reduce the time of the test process, avoid errors caused by human operation, and improve the accuracy of the test judgment; finally, through the memory test
  • the final judgment results are marked. After marking, you can read the information in the specific code bits of the SPD to know whether the memory stick has been missed, and judge the RMT test result value to get the quality of the memory stick. (Troubleshooting of defective products), making the test results traceable and achieving the purpose of error prevention. .
  • the memory determination device 400 may include: an information guidance module 410, a parsing module 420, a registration module 430, a determination module 440, a reading module 450 and an identification module 460, wherein:
  • the information guidance module 410 can be used to guide the output information after the memory bit width margin test program is run back to the first memory block;
  • the parsing module 420 can be used to parse the output information and obtain parsing results
  • the registration module 430 can be used to register the parsing results into the service table
  • the determination module 440 can be used to obtain the parsing results from the service table during the memory test phase, determine the parsing results, and obtain the determination results.
  • the information guidance module 410 can be used to modify the underlying driver, select a piece of memory as the first memory block, and store the output information in the first memory block.
  • the information directing module 410 can be used to call a function library for printing output information; modify the printing part in the function library to output the output information to the first memory block.
  • the parsing module 420 can be used to add a parsing program in the basic input and output system, parse the output information to obtain parsing results, and store the parsing results in the second memory block.
  • the parsing results include memory performance values.
  • the registration module 430 may be used to copy the parsing result of the second memory block to the service table of the system memory block.
  • the device further includes:
  • the reading module 450 can be used to register the driver in the service table for subsequent reading of parsing results.
  • the device further includes:
  • the identification module 460 can be used to write the determination result into the identification code bit.
  • modules or units of the memory determination device are mentioned in the above detailed description, this division is not mandatory.
  • the features and functions of two or more modules or units described above may be embodied in one module or unit.
  • the features and functions of one module or unit described above may be further divided into being embodied by multiple modules or units.
  • an electronic device capable of implementing the above method is also provided.
  • FIG. 5 An electronic device 500 according to this embodiment of the present disclosure is described below with reference to FIG. 5 .
  • the electronic device 500 shown in FIG. 5 is only an example and should not impose any limitations on the functions and scope of use of the embodiments of the present disclosure.
  • electronic device 500 is embodied in the form of a general computing device.
  • the components of the electronic device 500 may include, but are not limited to: the above-mentioned at least one processing unit 510, the above-mentioned at least one storage unit 520, a bus 530 connecting different system components (including the storage unit 520 and the processing unit 510), and the display unit 540.
  • the storage unit 520 stores program code, and the program code can be executed by the processing unit 510, so that the processing unit 510 performs various examples according to the present disclosure described in the "Example Method" section of this specification.
  • sexual implementation steps For example, the processing unit 510 can perform step S210 as shown in Figure 2 to guide the output information after running the memory bit width margin test program back to the first memory block; step S220, analyze the output information to obtain Parsing results; step S230, register the parsing results in the service table; step S240, during the memory test phase, obtain the parsing results from the service table, judge the parsing results, and obtain the judgment results.
  • the storage unit 520 may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) 5201 and/or a cache storage unit 5202, and may further include a read-only storage unit (ROM) 5203.
  • RAM random access storage unit
  • ROM read-only storage unit
  • Storage unit 520 may also include a program/utility 5204 having a set of (at least one) program modules 5205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, Each of these examples, or some combination, may include the implementation of a network environment.
  • program/utility 5204 having a set of (at least one) program modules 5205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, Each of these examples, or some combination, may include the implementation of a network environment.
  • Bus 530 may be a local area representing one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, a graphics acceleration port, a processing unit, or using any of a variety of bus structures. bus.
  • Electronic device 500 may also communicate with one or more external devices 570 (e.g., keyboard, pointing device, Bluetooth device, etc.), may also communicate with one or more devices that enable a user to interact with electronic device 500, and/or with Any device that enables the electronic device 500 to communicate with one or more other computing devices (eg, router, modem, etc.). This communication may occur through input/output (I/O) interface 550.
  • the electronic device 500 may also communicate with one or more networks (eg, a local area network (LAN), a wide area network (WAN), and/or a public network, such as the Internet) through the network adapter 560. As shown, network adapter 560 communicates with other modules of electronic device 500 via bus 530.
  • network adapter 560 communicates with other modules of electronic device 500 via bus 530.
  • the example embodiments described here can be implemented by software, or can be implemented by software combined with necessary hardware. Therefore, the technical solution according to the embodiment of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, U disk, mobile hard disk, etc.) or on the network , including several instructions to cause a computing device (which may be a personal computer, a server, a terminal device, a network device, etc.) to execute a method according to an embodiment of the present disclosure.
  • a computing device which may be a personal computer, a server, a terminal device, a network device, etc.
  • a computer-readable storage medium is also provided, on which a program product capable of implementing the method described above in this specification is stored.
  • various aspects of the present disclosure can also be implemented in the form of a program product, which includes program code.
  • the program product is run on a terminal device, the program code is used to cause the The terminal device performs the steps according to various exemplary embodiments of the present disclosure described in the above "Example Method" section of this specification.
  • the program product for implementing the above method according to an embodiment of the present disclosure may adopt a portable compact disk read-only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer.
  • a readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.
  • the program product may take the form of any combination of one or more readable media.
  • the readable medium may be a readable signal medium or a readable storage medium.
  • the readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include: electrical connection with one or more conductors, portable disk, hard disk, random access memory (RAM), read only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.
  • a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave carrying readable program code thereon. Such propagated data signals may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above.
  • a readable signal medium may also be any readable medium other than a readable storage medium that can send, propagate, or transport the program for use by or in connection with an instruction execution system, apparatus, or device.
  • Program code embodied on a readable medium may be transmitted using any suitable medium, including but not limited to wireless, wireline, optical cable, RF, etc., or any suitable combination of the foregoing.
  • Program code for performing operations of the present disclosure may be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., as well as conventional procedural Programming language—such as "C" or a similar programming language.
  • the program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server execute on.
  • the remote computing device may be connected to the user computing device through any kind of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device, such as provided by an Internet service. (business comes via Internet connection).
  • LAN local area network
  • WAN wide area network

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Abstract

一种内存判定方法、内存判定装置、计算机可读存储介质及电子设备,涉及集成电路技术领域。该内存判定方法包括:将内存位宽余量测试程序运行后的输出信息导回第一内存区块(S210);对输出信息进行解析,获得解析结果(S220);将解析结果注册到服务表中(S230);在内存测试阶段,从服务表中获取解析结果,并对解析结果进行判定,获得判定结果(S240)。提供一种无需额外设置独立设备的RMT测试方法。

Description

内存判定方法及装置、存储介质及电子设备
相关申请的交叉引用
本申请要求于2022年06月24日提交的申请号为202210731466.3、名称为“内存判定方法及装置、存储介质及电子设备”的中国专利申请的优先权,该中国专利申请的全部内容通过引用全部并入本文。
技术领域
本公开涉及集成电路技术领域,具体而言,涉及一种内存判定方法、内存判定装置、计算机可读存储介质及电子设备。
背景技术
随着信息化时代的高速发展,互联网,人工智能等技术覆盖了社会的各个领域,这对服务器的数据处理能力及网络数据的传输能力都有了更高的要求。内存作为在服务器中负责如硬盘、主板、显卡等硬件与处理器之间数据交换和处理的“桥梁”,它对于服务器性能发挥着重要作用。
RMT(Rank Margin Tool)测试是对内存位宽余量的一种测试,它的测试结果直接反映了服务器主板上内存的性能。
现有的RMT测试中,需要有独立的设备进行测试和数据采集,无法与数据解析等过程共用一个设备,造成资源浪费。
发明内容
根据本公开的第一方面,提供一种内存判定方法,包括:将内存位宽余量测试程序运行后的输出信息导回第一内存区块;对所述输出信息进行解析,获得解析结果;将所述解析结果注册到服务表中;在内存测试阶段,从所述服务表中获取所述解析结果,并对所述解析结果进行判定,获得判定结果。
在本公开的一种示例性实施方式中,将输出信息导回第一内存区块,包括:修改底层驱动,选取一块内存作为所述第一内存区块;将所述输出信息存入所述第一内存区块。
在本公开的一种示例性实施方式中,将所述输出信息存入所述第一内存区块,包括:调用用于打印输出信息的函数库;修改所述函数库中的打印部分,以将所述输出信息输出至所述第一内存区块。
在本公开的一种示例性实施方式中,对所述输出信息进行解析,获得解析结果,包括:在基本输入输出系统中新增解析程序,解析所述输出信息获得所述解析结果;将所述解析结果存在第二内存区块中。
在本公开的一种示例性实施方式中,所述解析结果包括内存性能数值。
在本公开的一种示例性实施方式中,所述将所述解析结果注册到服务表中,包括:将所述第二内存区块的所述解析结果复制至系统内存区块的所述服务表中。
在本公开的一种示例性实施方式中,所述方法包括:在所述服务表中注册驱动,用于后续所述解析结果的读取。
在本公开的一种示例性实施方式中,所述方法包括:将所述判定结果写入标识码位。
根据本公开的第二方面,提供一种内存判定装置,包括:信息导向模块,用于将内存位宽余量测试程序运行后的输出信息导回第一内存区块;解析模块,用于对所述输出信息进行解析,获得解析结果;注册模块,用于将所述解析结果注册到服务表中;判定模块,用于在内存测试阶段,从所述服务表中获取所述解析结果,并对所述解析结果进行判定,获得判定结果。
在本公开的一种示例性实施方式中,所述信息导向模块,用于修改底层驱动,选取一 块内存作为所述第一内存区块;将所述输出信息存入所述第一内存区块。
在本公开的一种示例性实施方式中,所述信息导向模块,用于调用用于打印输出信息的函数库;修改所述函数库中的打印部分,以将所述输出信息输出至所述第一内存区块。
在本公开的一种示例性实施方式中,所述解析模块,用于在基本输入输出系统中新增解析程序,解析所述输出信息获得所述解析结果;将所述解析结果存在第二内存区块中。
在本公开的一种示例性实施方式中,所述解析结果包括内存性能数值。
在本公开的一种示例性实施方式中,所述注册模块,用于将所述第二内存区块的所述解析结果复制至系统内存区块的所述服务表中。
在本公开的一种示例性实施方式中,所述装置还包括:读取模块,用于在所述服务表中注册驱动,用于后续所述解析结果的读取。
在本公开的一种示例性实施方式中,所述装置还包括:标识模块,用于将所述判定结果写入标识码位。
根据本公开的第三方面,提供一种计算机可读存储介质,其上存储有计算机程序,所述计算机程序被处理器执行时实现上述的内存判定方法。
根据本公开的第四方面,提供一种电子设备,包括:处理器;以及存储器,用于存储所述处理器的可执行指令;其中,所述处理器配置为经由执行所述可执行指令来执行上述的内存判定方法。
附图说明
图1示意性示出了现有技术中一种RMT测试过程示意图;
图2示意性示出了根据本公开的示例性实施例的一种内存判定方法的步骤流程图;
图3示意性示出了根据本公开的示例性实施例的一种RMT测试过程示意图;
图4示意性示出了根据本公开的示例性实施例的内存判定装置的方框图;
图5示意性示出了根据本公开的示例性实施例的一种电子设备的模块示意图。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而,示例实施方式能够以多种形式实施,且不应被理解为限于在此阐述的范例;相反,提供这些实施方式使得本公开将更加全面和完整,并将示例实施方式的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施方式中。在下面的描述中,提供许多具体细节从而给出对本公开的实施方式的充分理解。然而,本领域技术人员将意识到,可以实践本公开的技术方案而省略所述特定细节中的一个或更多,或者可以采用其它的方法、组元、装置、步骤等。在其它情况下,不详细示出或描述公知技术方案以避免喧宾夺主而使得本公开的各方面变得模糊。
此外,附图仅为本公开的示意性图解,并非一定是按比例绘制。图中相同的附图标记表示相同或类似的部分,因而将省略对它们的重复描述。附图中所示的一些方框图是功能实体,不一定必须与物理或逻辑上独立的实体相对应。可以采用软件形式来实现这些功能实体,或在一个或多个硬件模块或集成电路中实现这些功能实体,或在不同网络和/或处理器装置和/或微控制器装置中实现这些功能实体。
附图中所示的流程图仅是示例性说明,不是必须包括所有的步骤。例如,有的步骤还可以分解,而有的步骤可以合并或部分合并,因此实际执行的顺序有可能根据实际情况改变。另外,下面所有的术语“第一”、“第二”、“第三”仅是为了区分的目的,不应作为本公开内容的限制。
内存是计算机中重要的部件之一,它是与CPU进行沟通的桥梁。计算机中所有程序的运行都是在内存中进行的,因此内存的性能对计算机的影响非常大。内存也被称为内存储 器,其作用是用于暂时存放CPU中的运算数据,以及与硬盘等外部存储器交换的数据。只要计算机在运行中,CPU就会把需要运算的数据调到内存中进行运算,当运算完成后CPU再将结果传送出来,内存的运行也决定了计算机的稳定运行。内存是由内存芯片、电路板、金手指等部分组成的。
内存是服务器主板上的主要存储部件,在计算机存储层次结构中占有重要地位。内存的稳定性与可靠性,以及内存与主板的兼容性对于服务器设计至关重要。而在服务器的设计与生产过程中,不同品牌内存的差异性、服务器主板材质的差异性、PCB(Printed Circuit Board)布局与走线设计等都是影响服务器主板与内存兼容性的因素。因此,RMT测试是服务器研发过程中必不可少的一环,其测试数据能在一定程度上反映服务器主板上内存的性能,研发人员可根据测试数据评估主板PCB器件布局与走线设计,降低项目风险。
RMT(Rank Margin Tool)是在开机时BIOS(Basic Input Output System,基本输入输出系统)自动运行的内存效能判定的程序,RMT程序运行后,会通过Debug Port调试端口输出训练的结果,从而得到内存的位宽余量。其中,BIOS是一组固化到计算机内主板上一个ROM(Read-Only Memory,只读存储器)芯片上的程序,它保存着计算机最重要的基本输入输出的程序、系统设置信息、开机后自检程序和系统自启动程序。其主要功能是为计算机提供最底层的、最直接的硬件设置和控制。
在实际应用中,RMT测试的量测项目包括时序参数和电压参数,其中,时序参数包括读取时序容限、写入时序容限和命令时序容限;电压参数包括读取参考电压电压容限、写入参考电压电压容限和命令参考电压电压容限。并且每一个参数都有对应的基准,例如,读取时序容限有对应的最小读取基准,写入时序容限有对应的最小写入基准,命令时序容限有对应的最小命令基准;读取参考电压电压容限有对应的最小读取参考电压基准,写入参考电压电压容限有对应的最小写入参考电压基准,命令参考电压电压容限有对应的最小命令参考电压基准。
在实际测试结果中,如果有一项测试的参数值小于其对应的基准值,就说明此参数不合格,其对应的内存为不合格品。也只有所有的参数值均大于其对应的基准值时,才说明所对应的内存为合格品。
参照图1,示出了现有技术中一种RMT测试过程示意图。在图1中,示出了服务器101和PC机102,服务器101上设有测试主板,测试主板上设有BMC(Baseboard Management Controller,基板管理控制器),服务器101和PC机102通过串口线相连。其中,服务器101作为下位机,负责运行测试程序,并将测试数据通过串口线传出。PC机102作为上位机,通过串口线接收测试数据;接着,通过人工操作收集数据,并保存为RMT原始数据,再由人工操作将RMT原始数据导入到解析工具中,并由解析工具对RMT原始数据进行解析,获得RMT测试结果。最后,由人工操作来根据RMT测试结果中的内存位宽余量数值进行判断,并标示不良品。
由上述的测试过程可以看出,在RMT测试过程中,除过测试主板外,还需要设置独立的PC机102进行数据收集和解析分析,整个过程无法共用一个整体设备,造成资源的浪费。另外,在整个作业过程中,有多处需要人工操作,人工操作的效率较低,使得整个测试过程用时较长,并且容易发生人为操作上的错误采集或结果判读,例如,遗漏采集、重复采集或取错不良品等。
基于此,本公开的示例性实施方式首先提供一种内存判定方法,用于对内存进行RMT测试,以根据内存的位宽余量来判定内存的好坏。
参照图2,示出了本公开实施例的一种内存判定方法的步骤流程图。在一种可行的实施方式中,上述内存判定方法可以包括:
步骤S210、将内存位宽余量测试程序运行后的输出信息导回第一内存区块;
步骤S220、对输出信息进行解析,获得解析结果;
步骤S230、将解析结果注册到服务表中;
步骤S240、在内存测试阶段,从服务表中获取解析结果,并对解析结果进行判定,获得判定结果。
本公开实施例提供的内存判定方法,通过将内存位宽余量测试程序运行后的输出信息重新导回至第一内存区块,也就是导回至运行内存位宽余量测试程序的第一内存区块中,可以在第一内存区块中对输出信息进行解析,获得解析结果后,并将解析结果注册到服务表中,以在内存测试阶段,可以直接从服务表中获取解析结果,并对解析结果进行判定,以获得判定结果。整个测试、解析以及结果判定过程均是在第一内存区块中完成的,无需额外设置上位机及其周边设备,在一个下位机中就可以完成所有测试过程,节约了资源;另外,整个测试、解析以及结果判定过程中,无需人工操作的介入,可以提高测试的效率,减少测试过程的用时,也能避免由于人为操作带来的错误,提高测试判定的准确性。
下面将结合具体实施方式对内存判定方法进行详细说明:
在步骤S210中,将内存位宽余量测试程序运行后的输出信息导回第一内存区块。
本公开示例性实施方式中,上述的内存位宽余量测试程序就是前述的RMT测试程序,内存位宽余量测试程序是服务器在开机时,在基本输入输出系统BIOS中自动运行的进行内存效能判定的程序。
在实际应用中,可以在服务器的基本输入输出系统BIOS中设置控制执行RMT测试的菜单,在进行RMT测试之前可以在服务器的BIOS中设置RMT测试菜单,以在服务器开机过程中自动进行RMT测试。也可以在不需要测试RMT是关闭该选项,以减少RMT测试对系统开机时间的影响。
本公开示例性实施方式中,上述的内存位宽余量测试程序是在第一内存区块上运行的,而第一内存区块属于服务器。也就是说,上述的内存位宽余量测试程序是在服务器上运行的,在运行完内存位宽余量测试程序后,所获得的输出信息并没有通过串口导向外设的PC上位机中,而是重新导回至服务器,继续由服务器执行后续的操作。由此可见,本公开示例性实施方式提供的内存判定方法,无需额外地设置上位机及周边配备,只需要服务器就可以完成内存位宽余量测试到判定的整个过程,从而可以节省资源,简化测试设备。
在实际应用中,内存位宽余量测试程序运行后的输出信息,也就是RMT测试后的输出信息主要是在执行RMT测试过程中的日志信息,包括(但不限于)执行的动作与相对应的数值。例如包括时序参数和电压参数及其对应的数值,其中,时序参数包括读取时序容限、写入时序容限和命令时序容限;电压参数包括读取参考电压电压容限、写入参考电压电压容限和命令参考电压电压容限。
本公开示例性实施方式中,在将内存位宽余量测试程序运行后的输出信息导回第一内存区块的过程中,可以通过修改底层驱动或者底层BIOS代码的方式,将原先由串口进行输出的上述输出信息重新导回至第一内存区块中。其中,底层BIOS代码是基本的输入输出系统,它是一组固化到计算机内主板上的一个ROM存储芯片上的程序,保存着计算机最重要的节能输入输出的程序、系统设置信息、开机后自检程序和系统自启动程序。底层BIOS代码可以为计算机提供最底层的最直接的硬件设置和控制。
其中,底层驱动是程序以访问底层硬件的形式实现人机交互,驱动程序和应用程序之间需要实现相应的信息交互,一方面,应用程序通过对驱动程序发送相应的指令,实现硬件控制的动作指令,另一方面,驱动程序将硬件读写的状态、从硬件上获得的数据传送给应用程序,实现应用程序与驱动程序间的交互。底层驱动是让设备工作的基本程序,它给用户提供了一个使用这个设备的接口。底层驱动与硬件相关,可以给应用层提供API函数调用接口,应用层可以通过调用这些接口去访问硬件,而不需要了解具体的硬件工作情况。应用程序是根据实际应用需求去编写的程序,指的是代码的逻辑部分,直接去调用底层驱动预留的接口,而不需要关心硬件底层的实现方式及实现过程。
在实际应用中,可以通过修改底层驱动,选取一块内存作为第一内存区块,该第一内存区块可以作为信息缓存,可以将输出信息存入到第一内存区块中,从而将原先由串口输出的输出信息重新导向至该第一内存区块中。
具体的,在实际应用中,通过底层驱动修改内存,或者说选取内存的过程中可以使用分配内存的以下几个接口函数:
1、rbuff=kmalloc(len+4,GFP_KERNEL)
其中,GFP_KERNEL是flag,可以通过该flag来设定分配内存的方式,目前这个GFP_KERNEL就是可以睡眠的,优先级普通;如果是GFP_ATOMIC则优先级高,是原子的,不能睡眠,可以通过kfree(rbuff)来释放。
2、rbuff=vmalloc(len)
类似于kmalloc,只不过kmalloc分配的内存不管是虚拟地址还是物理地址都是连续的;而vmalloc分配的只是在虚拟地址是连续的,在物理地址上不一定是连续的,所以在需要一张表来建立虚拟地址和分散物理地址的关系,这样就会使效率降低很多,所以一般这个接口用于要分配大内存时。
3、data=devm_kzalloc(&dev,sizeof(struct fts_ts_data),GFP_KERNEL)
这个接口是具有资源管理的kzalloc()接口。使用资源管理(resource-managed)函数分配的内存,是会与所属设备相关联。当设备从系统中分离或者设备驱动被卸载,该内存会被自动释放。也可以通过devm_kfree()来释放内存。
在有些情况下,当频繁申请小内存,要频繁进出内存时,可能会造成系统消耗较大,则可以使用slab分配器进行内存分配,其中,slab相当于高速缓存。slab通常分成三种状态:满的slab、部分满的slab、空的slab。当下一次需要分配内存时会先去看slab里面是否有满足条件的,如果没有就创建一个新的slab。当调用kmalloc时就会先去看slab是否有满足条件的。
另外,如果需要频繁创建很多相同类型的对象,可以考虑使用高速缓存,步骤如下:
a.内核函数kmem_cache_create用来创建一个新缓存。这通常是在内核初始化时执行的,或者在首次加载内核模块时执行。
b.要从一个命名的缓存中分配一个对象,可以使用kmem_cache_alloc函数。调用者提供了从中分配对象的缓存以及一组标志:voidkmem_cache_alloc(struct kmem_cache*cachep,gfp_t flags=GFP_KERNEL)。
c.最后进行内存释放:kmem_cache_free。
通过a、b两步就可以创建一个具体对象structftp的高速缓存,如果后面要经常创建和释放struct fts分配的空间,用slab就不用频繁的申请释放内存,提高了效率。
另外,在实际操作过程中,修改底层驱动或者底层BIOS代码,以将原先由串口进行输出的上述输出信息重新导回至第一内存区块中的过程中,由于所有的外设硬件在系统中都是以一个地址的形态存在的,所以也可以通过将待修改的地址替换为内存,就能实现将原本由串口输出的输出信息导向第一内存区块中。
在实际应用中,通常打印信息会调用函数库中的功能,所以可以直接修改函数库的打印功能变成需要的打印方式。本公开示例性实施方式中,在将输出信息存入第一内存区块的过程中,可以调用用于打印输出信息的函数库,并通过修改函数库中的打印部分,以将输出信息输出至第一内存区块。其中,打印部分指的是信息输出部分。此处的打印输出信息属于RMT(Rank Margin Tool,排裕度工具)打印信息。修改函数库中的打印部分指的是找出底层BIOS代码的打印部分进行修改。
在步骤S220中,对输出信息进行解析,获得解析结果。
在实际应用中,由RMT测试所输出的输出信息是日志格式的,不方便进行直接使用,例如进行数值判定等。因此,需要获取特定的关键字,将有用的信息,例如数值等提取出 来。
本公开示例性实施方式中,在将输出信息重新导向第一内存区块后,可以对第一内存区块中的输出信息进行解析,以将有用的信息提取出来。在具体解析过程中,可以通过在基本输入输出信息BIOS中新增解析程序,使用解析程序对输出信息进行解析,以获得解析结果。
其中,解析程序是高级语言翻译程序的一种,它将源语言(如BASIC)书写的源程序作为输入,解释一句后就提交计算机执行一句,并不形成目标程序。解析程序是一种语言处理程序,在运行用户程序时,可以直接执行源程序或源程序的内部形式(中间代码)。解析程序的优点是:结构简单,易于实现,能方便地进行程序调度和修改,可进行人机对话,适于交互式会话方式下的程序编制和执行等。
解析程序由一个总控程序和若干个执行子程序组成。解析程序的工作过程如下:首先,由总控程序执行初始准备工作,配置工作初态;然后,从源程序中取一个语句,并进行语法检查。如果语法有错,则输出错误信息;否则,根据所确定的语句类型转去执行相应的执行子程序。返回后检查解析工作是否完成,如果未完成,则继续解析下一语句;否则,进行必要的善后处理工作。
参照表1,示出了一种对某一内存的输出信息进行解析后的解析结果:
表1
Figure PCTCN2022105733-appb-000001
Figure PCTCN2022105733-appb-000002
从表1可以看出,解析结果包括时序参数和电压参数对应的内存性能数值,包括:读取时序容限、写入时序容限、命令时序容限、读取参考电压电压容限、写入参考电压电压容限和命令参考电压电压容限等。
需要说明的是,本公开示例性实施方式中,在获得解析结果后,可以将解析结果存在第二内存区块中,其中,第二内存区块也是服务器中的内存,只是第二内存区块与第一内存区块属于不同的内存区块。
在步骤S230中,将解析结果注册到服务表中。
本公开示例性实施方式中,在对输出信息进行解析,获得解析结果之后,可以将第二内存区块取出,并搬移至一块系统保留的内存空间中。在系统中,内存区块区分为用户可用空间与系统保留空间,此处的搬移动作主要是减少占用用户可用的内存空间,以增加后续内存测试的可测试空间,此处的可测试空间即未被占用的用户可用空间。
需要说明的是,如果第二内存区块本身就是系统内存区块,则无需执行上述的搬移动作。
本公开示例性实施方式中,将第二内存区块搬移至系统保留的内存空间中的目的是,将所述第二内存区块的解析结果复制至系统内存区块的服务表中,其中,服务表可以如表1所示的表格。
在实际应用中,服务表的格式可以有多种,不限于表1所示的格式。本公开示例性实施方式对于服务表的格式不作特殊限定。
本公开示例性实施方式中,在将解析结果复制至系统内存区块的服务表中的同时,可以在服务表中注册一个驱动,用于后续的解析结果的读取。
在实际应用中,在服务表中注册驱动可以通过预设的GUID来注册,其中,GUID是全局唯一标识符(globally unique identifier),是一种由算法生成的二进制长度为128位的数字标识符,可用于所有需要唯一标识符的计算机和网络。驱动程序可以使用GUID标识各种项,驱动程序编写器可以针对设备接口类、自定义PnP事件和自定义WMI事件等项创建GUID。驱动程序包括定义其使用的GUID的头文件。
具体的,若要在驱动程序中使用GUID,必须执行两项操作:
1、包括Initguid.h头文件,该文件重新定义DEFINE_GUID宏。
Initguid.h头文件重新定义了DEFINE_GUID宏,以实例化GUID(而不是只声明EXTERN引用)。在驱动程序源文件中包括此头文件,应在其中实例化GUID。(用户模式应用程序包括Objbase.h,然后再包含GUID definitions)。
2、在定义GUID()标头文件。
在包含Initguid.h的语句之后,包含GUID定义的头文件。驱动程序可能包含多个包含GUID定义的头文件,包括系统提供的头文件和第三方头文件。
本公开示例性实施方式中,可以通过GUID对解析结果进行标识。具体的标识方式此处不再赘述。
步骤S240、在内存测试阶段,从服务表中获取解析结果,并对解析结果进行判定,获得判定结果。
本公开示例性实施方式中,在将解析结果注册到服务表中后,在内存测试阶段就可以直接从服务表中获取解析结果进行测试。此处的内存测试阶段可以包括对内存好坏进行判定的测试阶段,也就是根据解析结果对内存好坏进行判定的阶段。
在实际应用中,可以在进行内存测试的内存测试软件中,新增一个测试项目用来作为解析结果判定的触发点,以通过该测试项目来触发对解析结果进行判定。
本公开示例性实施方式中,在通过测试项目触发对解析结果的判定时,可以通过预设的GUID从服务表中取出解析结果,以进行解析结果的判定。
在实际应用中,在对解析结果进行判定的过程中,可以根据预设的规则进行判定,例如,以表1所示的解析结果为例对具体的判定过程进行简要说明如下:
表1中,每一个容限值都会对应一个基准值,例如,读取时序容限有对应的最小读取基准,写入时序容限有对应的最小写入基准,命令时序容限有对应的最小命令基准;读取参考电压电压容限有对应的最小读取参考电压基准,写入参考电压电压容限有对应的最小写入参考电压基准,命令参考电压电压容限有对应的最小命令参考电压基准。
本公开示例性实施方式中,对表1所示的解析结果的判定规则为:容限值大于或等于基准值,说明该项容限值达标,即PASS;若容限值小于基准值,则说明该项容限值不达标,即FAIL。对于一个内存而言,只要有一个容限值不达标,那么就认为该内存不达标。
从表1可以看出,除了读取参考电压容限中存在不达标的项目外,其他容限值均是达标的,但由于有一个不达标项,那么表1所代表的内存也不达标。
需要说明的是,表1所代表的内存只是一种示例,在实际应用中可以根据每个内存的实际情况进行解析结果的判定,此处不再一一列举。
本公开示例性实施方式中,在对解析结果进行判定,获得判定结果之后,可以将判定结果写入标识码位进行标识。例如,可以将判定结果写入SPD(Serial presence detect,串行存在检测)的特定码位中进行标识。其中,SPD是一种访问内存模块有关信息的标准化方式,SPD本身为电可擦除可编程只读存储器,除JEDEC规定的栏位外,还保留有其他栏位可供制造商使用,因此可以利用SPD中保留的栏位对判定结果进行标识。标识后,就可以通过对SPD特定码位内的信息进行读取,知悉该内存条是否漏测,以及对RMT测试结果值进行判断,得出内存条的质量好坏(排查不良产品),使得测试结果可追踪,可以达到防错的目的。
参照图3,示出了一种分阶段进行内存判定的框架图,即本公开示例性实施方式提供的RMT测试过程示意图。从图3可以看出,在初始化阶段,第①步,开机执行RMT测试,以获得测试结果,即内存位宽余量测试程序运行后的输出信息;第②步,将测试结果注册到Service Table服务表中;接着,进入到系统加载阶段,第③步,进入内存测试阶段,启动内存测试程序;同时,第④步,从Service Table服务表中取出测试结果(需要说明的是此处的测试结果为解析后的结果);第⑤步,在完成内存测试,即对解析结果进行判定之后,可以在SPD中写入判定结果。
综上所述,本公开实施例提供的内存判定方法,通过将内存位宽余量测试程序运行后的输出信息重新导回至第一内存区块,也就是导回至运行内存位宽余量测试程序的第一内存区块中,可以在第一内存区块中对输出信息进行解析,获得解析结果后,并将解析结果注册到服务表中,以在内存测试阶段,可以直接从服务表中获取解析结果,并对解析结果进行判定,以获得判定结果。整个测试、解析以及结果判定过程均是在第一内存区块中完成的,无需额外设置上位机及其周边设备,在一个下位机中就可以完成所有测试过程,节约了资源;另外,整个测试、解析以及结果判定过程中,无需人工操作的介入,可以提高测试的效率,减少测试过程的用时,也能避免由于人为操作带来的错误,提高测试判定的 准确性;最后,通过对内存测试后的判定结果进行标识,标识后,就可以通过对SPD特定码位内的信息进行读取,知悉该内存条是否漏测,以及对RMT测试结果值进行判断,得出内存条的质量好坏(排查不良产品),使得测试结果可追踪,可以达到防错的目的。。
需要说明的是,尽管在附图中以特定顺序描述了本公开中方法的各个步骤,但是,这并非要求或者暗示必须按照该特定顺序来执行这些步骤,或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的,可以省略某些步骤,将多个步骤合并为一个步骤执行,以及/或者将一个步骤分解为多个步骤执行等。
此外,在本示例实施例中,还提供了一种内存判定装置。参照图4,该内存判定装置400可以包括:信息导向模块410、解析模块420、注册模块430、判定模块440、读取模块450和标识模块460,其中:
信息导向模块410,可以用于将内存位宽余量测试程序运行后的输出信息导回第一内存区块;
解析模块420,可以用于对输出信息进行解析,获得解析结果;
注册模块430,可以用于将解析结果注册到服务表中;
判定模块440,可以用于在内存测试阶段,从服务表中获取解析结果,并对解析结果进行判定,获得判定结果。
在本公开的一种示例性实施方式中,信息导向模块410,可以用于修改底层驱动,选取一块内存作为第一内存区块;将输出信息存入第一内存区块。
在本公开的一种示例性实施方式中,信息导向模块410,可以用于调用用于打印输出信息的函数库;修改函数库中的打印部分,以将输出信息输出至第一内存区块。
在本公开的一种示例性实施方式中,解析模块420,可以用于在基本输入输出系统中新增解析程序,解析输出信息获得解析结果;将解析结果存在第二内存区块中。
在本公开的一种示例性实施方式中,解析结果包括内存性能数值。
在本公开的一种示例性实施方式中,注册模块430,可以用于将第二内存区块的解析结果复制至系统内存区块的服务表中。
在本公开的一种示例性实施方式中,装置还包括:
读取模块450,可以用于在服务表中注册驱动,用于后续解析结果的读取。
在本公开的一种示例性实施方式中,装置还包括:
标识模块460,可以用于将判定结果写入标识码位。
上述中各内存判定装置的虚拟模块的具体细节已经在对应的内存判定方法中进行了详细的描述,因此,此处不再赘述。
应当注意,尽管在上文详细描述中提及了内存判定装置的若干模块或者单元,但是这种划分并非强制性的。实际上,根据本公开的实施方式,上文描述的两个或更多模块或者单元的特征和功能可以在一个模块或者单元中具体化。反之,上文描述的一个模块或者单元的特征和功能可以进一步划分为由多个模块或者单元来具体化。
在本公开的示例性实施例中,还提供了一种能够实现上述方法的电子设备。
所属技术领域的技术人员能够理解,本公开的各个方面可以实现为系统、方法或程序产品。因此,本公开的各个方面可以具体实现为以下形式,即:完全的硬件实施方式、完全的软件实施方式(包括固件、微代码等),或硬件和软件方面结合的实施方式,这里可以统称为“电路”、“模块”或“系统”。
下面参照图5来描述根据本公开的这种实施方式的电子设备500。图5显示的电子设备500仅仅是一个示例,不应对本公开实施例的功能和使用范围带来任何限制。
如图5所示,电子设备500以通用计算设备的形式表现。电子设备500的组件可以包括但不限于:上述至少一个处理单元510、上述至少一个存储单元520、连接不同系统组件(包括存储单元520和处理单元510)的总线530、显示单元540。
其中,所述存储单元520存储有程序代码,所述程序代码可以被所述处理单元510执行,使得所述处理单元510执行本说明书上述“示例性方法”部分中描述的根据本公开各种示例性实施方式的步骤。例如,所述处理单元510可以执行如图2中所示的步骤S210、将内存位宽余量测试程序运行后的输出信息导回第一内存区块;步骤S220、对输出信息进行解析,获得解析结果;步骤S230、将解析结果注册到服务表中;步骤S240、在内存测试阶段,从服务表中获取解析结果,并对解析结果进行判定,获得判定结果。
存储单元520可以包括易失性存储单元形式的可读介质,例如随机存取存储单元(RAM)5201和/或高速缓存存储单元5202,还可以进一步包括只读存储单元(ROM)5203。
存储单元520还可以包括具有一组(至少一个)程序模块5205的程序/实用工具5204,这样的程序模块5205包括但不限于:操作系统、一个或者多个应用程序、其它程序模块以及程序数据,这些示例中的每一个或某种组合中可能包括网络环境的实现。
总线530可以为表示几类总线结构中的一种或多种,包括存储单元总线或者存储单元控制器、外围总线、图形加速端口、处理单元或者使用多种总线结构中的任意总线结构的局域总线。
电子设备500也可以与一个或多个外部设备570(例如键盘、指向设备、蓝牙设备等)通信,还可与一个或者多个使得用户能与该电子设备500交互的设备通信,和/或与使得该电子设备500能与一个或多个其它计算设备进行通信的任何设备(例如路由器、调制解调器等等)通信。这种通信可以通过输入/输出(I/O)接口550进行。并且,电子设备500还可以通过网络适配器560与一个或者多个网络(例如局域网(LAN),广域网(WAN)和/或公共网络,例如因特网)通信。如图所示,网络适配器560通过总线530与电子设备500的其它模块通信。应当明白,尽管图中未示出,可以结合电子设备500使用其它硬件和/或软件模块,包括但不限于:微代码、设备驱动器、冗余处理单元、外部磁盘驱动阵列、RAID系统、磁带驱动器以及数据备份存储系统等。
通过以上的实施方式的描述,本领域的技术人员易于理解,这里描述的示例实施方式可以通过软件实现,也可以通过软件结合必要的硬件的方式来实现。因此,根据本公开实施方式的技术方案可以以软件产品的形式体现出来,该软件产品可以存储在一个非易失性存储介质(可以是CD-ROM,U盘,移动硬盘等)中或网络上,包括若干指令以使得一台计算设备(可以是个人计算机、服务器、终端装置、或者网络设备等)执行根据本公开实施方式的方法。
在本公开的示例性实施例中,还提供了一种计算机可读存储介质,其上存储有能够实现本说明书上述方法的程序产品。在一些可能的实施方式中,本公开的各个方面还可以实现为一种程序产品的形式,其包括程序代码,当所述程序产品在终端设备上运行时,所述程序代码用于使所述终端设备执行本说明书上述“示例性方法”部分中描述的根据本公开各种示例性实施方式的步骤。
根据本公开的实施方式的用于实现上述方法的程序产品,其可以采用便携式紧凑盘只读存储器(CD-ROM)并包括程序代码,并可以在终端设备,例如个人电脑上运行。然而,本公开的程序产品不限于此,在本文件中,可读存储介质可以是任何包含或存储程序的有形介质,该程序可以被指令执行系统、装置或者器件使用或者与其结合使用。
所述程序产品可以采用一个或多个可读介质的任意组合。可读介质可以是可读信号介质或者可读存储介质。可读存储介质例如可以为但不限于电、磁、光、电磁、红外线、或半导体的系统、装置或器件,或者任意以上的组合。可读存储介质的更具体的例子(非穷举的列表)包括:具有一个或多个导线的电连接、便携式盘、硬盘、随机存取存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。
计算机可读信号介质可以包括在基带中或者作为载波一部分传播的数据信号,其中承 载了可读程序代码。这种传播的数据信号可以采用多种形式,包括但不限于电磁信号、光信号或上述的任意合适的组合。可读信号介质还可以是可读存储介质以外的任何可读介质,该可读介质可以发送、传播或者传输用于由指令执行系统、装置或者器件使用或者与其结合使用的程序。
可读介质上包含的程序代码可以用任何适当的介质传输,包括但不限于无线、有线、光缆、RF等等,或者上述的任意合适的组合。
可以以一种或多种程序设计语言的任意组合来编写用于执行本公开操作的程序代码,所述程序设计语言包括面向对象的程序设计语言—诸如Java、C++等,还包括常规的过程式程序设计语言—诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户计算设备上执行、部分地在用户设备上执行、作为一个独立的软件包执行、部分在用户计算设备上部分在远程计算设备上执行、或者完全在远程计算设备或服务器上执行。在涉及远程计算设备的情形中,远程计算设备可以通过任意种类的网络,包括局域网(LAN)或广域网(WAN),连接到用户计算设备,或者,可以连接到外部计算设备(例如利用因特网服务提供商来通过因特网连接)。
此外,上述附图仅是根据本公开示例性实施例的方法所包括的处理的示意性说明,而不是限制目的。易于理解,上述附图所示的处理并不表明或限制这些处理的时间顺序。另外,也易于理解,这些处理可以是例如在多个模块中同步或异步执行的。
本领域技术人员在考虑说明书及实践这里公开的公开后,将容易想到本公开的其他实施例。本申请旨在涵盖本公开的任何变型、用途或者适应性变化,这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的,本公开的真正范围和精神由权利要求指出。
应当理解的是,本公开并不局限于上面已经描述并在附图中示出的精确结构,并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限定。

Claims (18)

  1. 一种内存判定方法,包括:
    将内存位宽余量测试程序运行后的输出信息导回第一内存区块;
    对所述输出信息进行解析,获得解析结果;
    将所述解析结果注册到服务表中;
    在内存测试阶段,从所述服务表中获取所述解析结果,并对所述解析结果进行判定,获得判定结果。
  2. 根据权利要求1所述的方法,其中,将输出信息导回第一内存区块,包括:
    修改底层驱动,选取一块内存作为所述第一内存区块;
    将所述输出信息存入所述第一内存区块。
  3. 根据权利要求2所述的方法,其中,将所述输出信息存入所述第一内存区块,包括:
    调用用于打印输出信息的函数库;
    修改所述函数库中的打印部分,以将所述输出信息输出至所述第一内存区块。
  4. 根据权利要求1所述的方法,其中,对所述输出信息进行解析,获得解析结果,包括:
    在基本输入输出系统中新增解析程序,解析所述输出信息获得所述解析结果;
    将所述解析结果存在第二内存区块中。
  5. 根据权利要求1-4中任一项所述的方法,其中,所述解析结果包括内存性能数值。
  6. 根据权利要求4所述的方法,其中,所述将所述解析结果注册到服务表中,包括:
    将所述第二内存区块的所述解析结果复制至系统内存区块的所述服务表中。
  7. 根据权利要求1所述的方法,其中,所述方法包括:
    在所述服务表中注册驱动,用于后续所述解析结果的读取。
  8. 根据权利要求1所述的方法,其中,所述方法包括:
    将所述判定结果写入标识码位。
  9. 一种内存判定装置,包括:
    信息导向模块,用于将内存位宽余量测试程序运行后的输出信息导回第一内存区块;
    解析模块,用于对所述输出信息进行解析,获得解析结果;
    注册模块,用于将所述解析结果注册到服务表中;
    判定模块,用于在内存测试阶段,从所述服务表中获取所述解析结果,并对所述解析结果进行判定,获得判定结果。
  10. 根据权利要求9所述的装置,其中,所述信息导向模块,用于修改底层驱动,选取一块内存作为所述第一内存区块;将所述输出信息存入所述第一内存区块。
  11. 根据权利要求10所述的装置,其中,所述信息导向模块,用于调用用于打印输出信息的函数库;修改所述函数库中的打印部分,以将所述输出信息输出至所述第一内存区块。
  12. 根据权利要求9所述的装置,其中,所述解析模块,用于在基本输入输出系统中新增解析程序,解析所述输出信息获得所述解析结果;将所述解析结果存在第二内存区块中。
  13. 根据权利要求9-12中任一项所述的装置,其中,所述解析结果包括内存性能数值。
  14. 根据权利要求12所述的装置,其中,所述注册模块,用于将所述第二内存区块的所述解析结果复制至系统内存区块的所述服务表中。
  15. 根据权利要求9所述的装置,其中,所述装置还包括:
    读取模块,用于在所述服务表中注册驱动,用于后续所述解析结果的读取。
  16. 根据权利要求9所述的装置,其中,所述装置还包括:
    标识模块,用于将所述判定结果写入标识码位。
  17. 一种计算机可读存储介质,其上存储有计算机程序,所述计算机程序被处理器执行时实现权利要求1-8中任意一项所述的内存判定方法。
  18. 一种电子设备,包括:
    处理器;以及
    存储器,用于存储所述处理器的可执行指令;
    其中,所述处理器配置为经由执行所述可执行指令来执行权利要求1-8中任意一项所述的内存判定方法。
PCT/CN2022/105733 2022-06-24 2022-07-14 内存判定方法及装置、存储介质及电子设备 Ceased WO2023245779A1 (zh)

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