WO2023244058A1 - Electrode substrate of transparent display panel and transparent display panel comprising same - Google Patents

Electrode substrate of transparent display panel and transparent display panel comprising same Download PDF

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Publication number
WO2023244058A1
WO2023244058A1 PCT/KR2023/008330 KR2023008330W WO2023244058A1 WO 2023244058 A1 WO2023244058 A1 WO 2023244058A1 KR 2023008330 W KR2023008330 W KR 2023008330W WO 2023244058 A1 WO2023244058 A1 WO 2023244058A1
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WIPO (PCT)
Prior art keywords
hole pattern
circular hole
light
wiring layer
pad
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PCT/KR2023/008330
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French (fr)
Korean (ko)
Inventor
양주웅
전용선
허정욱
정상천
Original Assignee
주식회사 루미디아
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Publication of WO2023244058A1 publication Critical patent/WO2023244058A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates to an electrode substrate, and more specifically, to an electrode substrate included in a transparent display panel.
  • Transparent display panels are made by applying transparent electrodes and light-emitting elements within a transparent material.
  • the wiring within the display panel is not visually perceived by external viewers, so when the image is not displayed, it looks like glass, giving it the advantage of creating a luxurious look. there is. For this reason, it is being used for interior decoration of hotels, department stores, etc.
  • ITO Indium Tin Oxide
  • ITO is a transparent electrode material for implementing transparent display panels, but it has limitations in terms of economic feasibility and performance, so research and development on materials to replace it is necessary.
  • the problem to be solved by the present invention is to provide an electrode substrate for a transparent display panel having a circular hole pattern including a plurality of holes.
  • the present invention provides an electrode substrate of a transparent display panel, which is disposed on a transparent base substrate, pads that are connected to a plurality of light-emitting elements of the transparent display to allow signals to flow in and out, and a transparent substrate. It is disposed on the top and includes a wiring layer electrically connected to the pads, and the wiring layer includes a hole pattern formed on the metal layer with a plurality of holes spaced apart from each other.
  • a transparent display panel includes a transparent base substrate, a plurality of light-emitting elements disposed on the transparent base substrate, and a plurality of light-emitting elements disposed on the transparent base substrate and connected to the plurality of light-emitting elements to allow signals to flow in and out. It is disposed on the pads and the transparent substrate, and includes a wiring layer electrically connected to the pads, and the wiring layer includes a hole pattern in which a plurality of holes are spaced apart from each other on the metal layer.
  • the electrode substrate of the transparent display panel of the present invention includes a wiring layer, and the wiring layer is made of a circular hole pattern including a plurality of holes, which has the effect of having high transparency.
  • the circular hole pattern of the wiring layer is composed of a plurality of circular holes, so it not only has the advantage of being easier to produce compared to patterns of other shapes (honeycomb, irregular, or square). , the signal transmission path is shortened, which has the effect of minimizing the actual resistance of the wiring.
  • FIG. 1 is a diagram showing a transparent display device including an electrode substrate according to a preferred embodiment of the present invention.
  • Figure 2 is a diagram showing the structure of a display panel according to a preferred embodiment of the present invention.
  • Figure 3 is a diagram showing a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • 4 and 5 are diagrams for explaining the effect of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention.
  • 6 and 7 show the structure of a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • Figure 8 is a diagram showing a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • Figure 9 is a diagram showing a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • Figure 1 shows a transparent display device including an electrode substrate according to a preferred embodiment of the present invention.
  • the transparent display device 10 is a device capable of displaying an image, and may be formed of a transparent material showing a transmittance of about 80% or more in the visible light region. Specifically, viewers of the display device 10 may perceive areas other than the pixel area where the image of the display device 10 is displayed as transparent.
  • the transparent display device 10 may include a display panel 100 and a controller 200.
  • the display panel 100 may include a plurality of pixels (PX). Each of the plurality of pixels (PX) is an area where light is output, and the display panel 100 displays an image by combining the light output from the plurality of pixels (PX).
  • Each of the plurality of pixels (PX) may include a light emitting device.
  • each of the plurality of pixels PX may include light emitting elements configured to output red (R), blue (B), and green (G) light.
  • the light emitting device may be an LED (light emitting diode), but the preferred embodiment of the present invention is not limited thereto.
  • the pixel PX includes a plurality of red LED elements, blue LED elements, and green LED elements (or red LED elements, blue LED elements, green LED elements, and white LED elements) and these.
  • the number of terminals of the LED module mounted on the electrode substrate can be appropriately increased or decreased depending on the type and purpose of the LED module.
  • a plurality of pixels may be arranged in a lattice form on the display panel 100.
  • a plurality of pixels PX may be arranged along a plurality of rows and a plurality of columns.
  • wires for supplying power or signals to each of the plurality of pixels PX may be arranged on the display panel 100 and connected to the plurality of pixels PX.
  • a plurality of pixels (PX) may emit light in response to power or signals transmitted from the controller 200.
  • the controller 200 may output a specific level of driving voltage and control signal to a plurality of pixels (PX), and the plurality of pixels (PX) may emit light of a specific color based on the driving voltage and control signal. can emit light.
  • the controller 200 may generate power or signals to control the display panel 100 and output the generated power or signals to the display panel 100 .
  • wires for supplying power or signals may be located between the display panel 100 and the controller 200.
  • the controller 200 may include a timing controller for controlling the output timing of power or signals and a driver IC (integrated circuit) configured to generate power or signals, but a preferred embodiment of the present invention It is not limited to this.
  • the display panel 100 of the transparent display device 10 is required to be visually transparent.
  • the display panel 100 has a transparent wiring layer disposed on a transparent base substrate made of a transparent material.
  • the wiring layer included in the display panel 100 is formed in a circular hole pattern including a plurality of holes, which has the effect of having high transparency.
  • the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention is composed of a plurality of circular holes, making it easier to produce compared to patterns of other shapes (honeycomb, irregular, or square). Not only is there an advantage, but the signal transmission path is shortened, which has the effect of minimizing the actual resistance of the wiring.
  • FIG. 2 is a diagram showing the structure of a display panel according to a preferred embodiment of the present invention.
  • the display panel 100 may include a transparent base substrate 110, a light emitting element 120, a wiring layer 130, pads 140, and a protective layer 150.
  • a transparent base substrate 110 a light emitting element 120
  • a wiring layer 130 a wiring layer 130
  • pads 140 a protective layer 150.
  • an electrode substrate a transparent base substrate 110
  • the transparent base substrate 110, the wiring layer 130, and the pads 140 may be referred to as an electrode substrate.
  • the transparent base substrate 110 is a base material of the display panel 100 and may be a highly transparent glass substrate or a transparent plastic substrate.
  • the transparent base substrate 110 may include glass, urethane resin, polyimide resin, polyester resin, (meth)acrylate-based polymer resin, polyolefin-based resin such as polyethylene or polypropylene.
  • the transparent base substrate 110 may include, but is not limited to, polyethylene terephthalate (PET), cyclic olefin polymer (COP), polyethylene naphthalate (PEN), polyethersulfone (PES), polycarbonate (PC), or acetyl celluloid. no.
  • the light emitting device 120 is a device configured to output light and may be an LED (light emitting diode).
  • the light emitting device 120 may be disposed on the transparent base substrate 110 and operate based on a transmitted signal or power.
  • the light emitting device 120 may output red, blue, or green light, but is not limited thereto.
  • the wiring layer 130 may include wiring for transmitting signals or power to the light emitting device 120 .
  • the wiring layer 130 may be electrically connected to external wiring connected to the controller 200 and may receive a signal or power for controlling the pixels (PXs) or the light emitting device 120 from the controller 200.
  • the wiring layer 130 may include a circular hole pattern in which a plurality of holes are formed in the metal layer. Signals or power can be transmitted through the remaining part (i.e. border) excluding the holes of the circular hole pattern, and this part becomes the wiring.
  • the circular hole pattern may be formed by etching a metal layer formed by applying a metal material, but the present invention is not limited thereto.
  • the wiring layer 130 includes a circular hole pattern in which a plurality of holes are formed, thereby achieving high light transparency. Accordingly, the transparent display panel 100 can be implemented along with the transparent base substrate 110.
  • the pads 140 are electrically connected to the light emitting device 120 so that signals can be input and output. According to a preferred embodiment, the pads 140 may be electrically connected to the terminals of the light emitting device 120 as well as connected to the wiring included in the wiring layer 130. At this time, one pad 140 may be connected to one wire, but is not limited to this.
  • the protective layer 150 may be disposed to cover the entire light emitting device 120, the wiring layer 130, and the pads 140. That is, the protective layer 150 may be a layer that prevents foreign substances or moisture from penetrating and acts as an encapsulant that can flatten the surface.
  • the protective layer 150 may be in the form of a transparent film, but this does not apply to a preferred embodiment of the present invention.
  • Figure 3 shows a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • the circular hole pattern 131 may be included in the wiring layer 130 .
  • the circular hole pattern 131 may be a conductive pattern in contact with the pads 140.
  • the circular hole pattern 131 may be formed by forming a plurality of holes 131a on a metal sheet (or metal layer). At this time, signals or voltages may be transmitted to a portion 131b of the metal sheet in which the plurality of holes 131a are not formed, and this portion is referred to as the wiring portion 131b.
  • the circular hole pattern 131 may include a plurality of holes 131a spaced apart from each other and a wiring portion 131b disposed between each of the plurality of holes 131a to transmit a signal or voltage.
  • Each of the plurality of holes 131a may be a circular hole and may be arranged in a line and spaced apart from each other.
  • the diameter of the plurality of holes 131a may be 0.2 to 0.3 mm, for example, 0.235 mm, but the preferred embodiment of the present invention is not limited thereto.
  • the distance between the plurality of holes 131a may be 0.05 mm, but is not limited thereto.
  • the wiring layer 130 of the display panel 100 is formed in a circular hole pattern including a plurality of holes 131a, which has the effect of having high transparency.
  • Figures 4 and 5 are diagrams for explaining the effect of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention.
  • Figure 4 shows a square mesh structure, which is the structure of a conventional wiring layer
  • Figure 5 shows a conventional wiring layer. It represents the honeycomb structure.
  • the square mesh structure and honeycomb structure which are the structures of conventional wiring layers, not only may damage the connecting portion during the etching process of forming the structure, Even after it is formed, there is a problem with its structural stability being low.
  • the structure of a conventional wiring layer has a polygonal unit structure, so there is a portion (eg, A in FIG. 4 and C in FIG. 5) where adjacent polygons are interlocked.
  • the area of the interlocking area is inevitably relatively narrow (cusp shape), and etching is performed centered on the area where these polygons interlock, so the area where the polygons interlock is formed by etching performed in various directions.
  • etching is performed in four directions around A in FIG. 4, portion A may be damaged if etching in any one of the four directions is excessive.
  • the area of the area where adjacent circular holes are engaged is designed to be larger than that of a polygon, so even if etching is performed in multiple directions, the engaged portion is easily broken. It has the effect of reducing the possibility of damage because it does not break.
  • the structure of the conventional wiring layer has a polygonal unit structure, so the distance between the centers of adjacent polygons (that is, the distance between the sides of the polygons) is not constant. Additionally, the width of the lines formed between polygons is maintained constant (B in FIG. 4 and D in FIG. 5). Accordingly, when the width of the track is designed to be narrow in the conventional structure, a problem in which the track may be easily broken by external force may occur because the overall track width is designed to be narrow.
  • the distance between the centers of adjacent circular holes is constant, and even if the line width is designed to be narrow, the narrow portion and the relatively wide portion of the line This presence together has the effect of improving the strength against external forces.
  • FIG. 6 and 7 show the structure of a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • FIG. 6 shows a structure in which circular holes are arranged in a checkerboard structure
  • FIG. 7 shows a structure in which circular holes are arranged in a plurality of rows, with adjacent rows being offset from each other. For example, the centers of three adjacent circular holes in FIG. 7 may form an equilateral triangle.
  • the structure of FIG. 7 can be designed to have a smaller average distance between one circular hole and other adjacent circular holes, and as a result, the effective resistance of the line can be designed to be lower. there is.
  • the structure of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention may adopt both the structure of FIG. 6 and the structure of FIG. 7, and more preferably the structure of FIG. 7.
  • Figure 8 shows a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • the circular hole pattern 131 may include a plurality of circular hole pattern areas 131-1 to 131-4.
  • a plurality of pads 140-1 to 140-4 may be disposed on the circular hole pattern areas 131-1 to 131-4.
  • Pads 140-1 to 140-4 may be connected to electrodes of light-emitting devices constituting one pixel (PX in FIG. 1).
  • the pixel PX may include a plurality of light-emitting devices that are electrically insulated from each other, and each of the pads 140-1 to 140-4 may be connected to each of the plurality of light-emitting devices.
  • the first pad 140-1 is connected to a red light-emitting device
  • the second pad 140-2 is connected to a green light-emitting device
  • the third pad 140-3 is connected to a blue light-emitting device.
  • the fourth pad 140-4 can be connected to the common electrode.
  • a data voltage input/output to each light emitting device may be applied through each pad 140-1 to 140-4, or a driving voltage input/output to a common electrode may be applied.
  • the pads 140-1 to 140-4 are circular hole pattern areas that connect a control signal and a common electrode for driving multiple light-emitting devices within the pixel (PX in FIG. 1). It can be connected to (131-1 ⁇ 131-4).
  • the pixel PX may include a plurality of light-emitting elements and a driving driver that are electrically insulated from each other, and each of the pads 140-1 to 140-4 may be connected to a driving driver for driving the plurality of light-emitting elements. there is.
  • the first pad 140-1 is connected to a positive driving circuit of a common power supply
  • the second pad 140-2 is connected to a control command input signal of a driving driver that turns on a plurality of light emitting devices
  • the third pad 140-3 is connected to the next pad that transmits a signal to the driving driver and a control signal to the next pixel
  • the fourth pad 140-4 can be connected to a negative common power source.
  • Each of the plurality of circular hole pattern areas 131-1 to 131-4 may be electrically connected to each of the pads 140-1 to 140-4.
  • the first circular hole pattern area 131-1 is electrically connected to the first pad 140-1
  • the second circular hole pattern area 131-2 is electrically connected to the second pad 140-2.
  • the third circular hole pattern area 131-3 is electrically connected to the third pad 140-3
  • the fourth circular hole pattern area 131-4 is electrically connected to the fourth pad 140-4. It can be connected to .
  • each of the plurality of circular hole pattern regions 131-1 to 131-4 may be electrically insulated (or separated).
  • Each of the pads 140-1 to 140-4 may be electrically insulated from each other, and the plurality of circular hole pattern regions 131-1 to 131-4 may also be electrically insulated from each other.
  • an open area OA including a plurality of open holes that are open on one side and connected to each other may be disposed between the plurality of circular hole pattern areas 131-1 to 131-4.
  • electrical insulation of the plurality of circular hole pattern regions 131-1 to 131-4 can be easily achieved by opening one side of the plurality of holes.
  • One side of the plurality of holes may be opened by, for example, plating, etching, or laser cutting, but is not limited thereto.
  • Figure 9 shows a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
  • the circular hole pattern area may be electrically connected to a pad connected to at least two light emitting devices included in different pixels.
  • the wiring layer 130 can electrically connect a plurality of pixels (PX) and transmit a common signal to multiple pads (i.e., multiple light-emitting devices) through one circular hole pattern. there is.
  • the circular hole pattern area may be electrically connected to each of the pads connected to the two light emitting devices included in each of the two adjacent pixels.
  • the two adjacent pixels may be adjacent in the row direction or may be adjacent in the column direction.
  • the third circular hole pattern area 131-3 may be electrically connected to the third pad 140-3 connected to the light emitting device included in the pixel PX. Additionally, the third circular hole pattern area 131-3 may be electrically connected to a seventh pad 140-7 connected to a light emitting device included in another pixel disposed to the left of the pixel PX.
  • the third circular hole pattern area 131-3 may be electrically connected to the third pad 140-3 connected to the light emitting device included in the pixel PX. there is. Additionally, the third circular hole pattern area 131-3 may be electrically connected to a ninth pad 140-9 connected to a light emitting device included in another pixel disposed below the pixel PX.
  • the fourth circular hole pattern area 131-4 may be electrically connected to the fourth pad 140-4 connected to the light emitting device included in the pixel PX. there is. Additionally, the fourth circular hole pattern area 131-4 may be electrically connected to a sixth pad 140-6 connected to a light emitting device included in another pixel disposed to the left of the pixel PX.

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Abstract

An electrode substrate of a transparent display panel of the present invention comprises a wiring layer, wherein the wiring layer is formed of a circular hole pattern including a plurality of holes, thereby having high transparency. In addition, in the present invention, the circular hole pattern of the wiring layer is formed of the plurality of circular holes, such that not only does the present invention have the advantage of being easier to produce compared to patterns of other shapes (honeycomb, irregular, or square), but also has a shortened signal transmission, thus allowing the actual resistance of wiring to be minimized.

Description

투명 디스플레이 패널의 전극 기판 및 이를 포함하는 투명 디스플레이 패널Electrode substrate of a transparent display panel and a transparent display panel including the same
본 발명은 전극 기판에 관한 것으로, 보다 상세하게는 투명 디스플레이 패널에 포함되는 전극 기판에 관한 것이다.The present invention relates to an electrode substrate, and more specifically, to an electrode substrate included in a transparent display panel.
투명 디스플레이 패널은 투명한 재질의 소재 내에 투명 전극과 발광 소자를 적용한 것으로서, 디스플레이 패널 내의 배선들이 외부 시청자에게 시각적으로 인지되지 않아, 영상이 표시되지 않을 때에는 마치 유리와 같이 보여 고급스러운 연출이 가능한 장점이 있다. 이로 인해 호텔, 백화점 등의 실내 인테리어에 활용되고 있다. Transparent display panels are made by applying transparent electrodes and light-emitting elements within a transparent material. The wiring within the display panel is not visually perceived by external viewers, so when the image is not displayed, it looks like glass, giving it the advantage of creating a luxurious look. there is. For this reason, it is being used for interior decoration of hotels, department stores, etc.
한편, 투명 디스플레이 패널 구현을 위한 투명 전극 소재로서 ITO(Indium Tin Oxide)가 있으나, 경제성 및 성능 측면에서 제한이 있어 이를 대체할 소재에 대한 연구 개발이 필요한 실정이다.Meanwhile, ITO (Indium Tin Oxide) is a transparent electrode material for implementing transparent display panels, but it has limitations in terms of economic feasibility and performance, so research and development on materials to replace it is necessary.
본 발명이 해결하고자 하는 과제는 복수의 홀들을 포함하는 원형 홀 패턴을 갖는 투명 디스플레이 패널의 전극 기판을 제공하는 것이다.The problem to be solved by the present invention is to provide an electrode substrate for a transparent display panel having a circular hole pattern including a plurality of holes.
본 발명은 상술한 과제를 해결하기 위하여, 투명 디스플레이 패널의 전극 기판은 투명 베이스 기판, 투명 베이스 기판 상부에 배치되며, 투명 디스플레이의 복수의 발광 소자들과 연결되어 신호가 유출입되는 패드들, 투명 기판 상부에 배치되며, 패드들과 전기적으로 연결되는 배선층을 포함하고, 배선층은 금속층 상에 복수의 홀들이 서로 이격되어 형성된 홀(hole) 패턴을 포함한다.In order to solve the above-described problem, the present invention provides an electrode substrate of a transparent display panel, which is disposed on a transparent base substrate, pads that are connected to a plurality of light-emitting elements of the transparent display to allow signals to flow in and out, and a transparent substrate. It is disposed on the top and includes a wiring layer electrically connected to the pads, and the wiring layer includes a hole pattern formed on the metal layer with a plurality of holes spaced apart from each other.
본 발명의 바람직한 일실시예에 따른 투명 디스플레이 패널은 투명 베이스 기판, 투명 베이스 기판 상부에 배치되는 복수의 발광 소자들, 투명 베이스 기판 상부에 배치되며, 복수의 발광 소자들과 연결되어 신호가 유출입되는 패드들 및 투명 기판 상부에 배치되며, 패드들과 전기적으로 연결되는 배선층을 포함하고, 상기 배선층은 금속층 상에 복수의 홀들이 서로 이격되어 형성된 홀(hole) 패턴을 포함한다. A transparent display panel according to a preferred embodiment of the present invention includes a transparent base substrate, a plurality of light-emitting elements disposed on the transparent base substrate, and a plurality of light-emitting elements disposed on the transparent base substrate and connected to the plurality of light-emitting elements to allow signals to flow in and out. It is disposed on the pads and the transparent substrate, and includes a wiring layer electrically connected to the pads, and the wiring layer includes a hole pattern in which a plurality of holes are spaced apart from each other on the metal layer.
본 발명의 투명 디스플레이 패널의 전극 기판은 배선층을 포함하되, 배선층이 복수의 홀들을 포함하는 원형 홀 패턴으로 이루어짐으로써, 높은 투과성을 가질 수 있는 효과가 있다. The electrode substrate of the transparent display panel of the present invention includes a wiring layer, and the wiring layer is made of a circular hole pattern including a plurality of holes, which has the effect of having high transparency.
나아가, 본 발명은 배선층의 원형 홀 패턴은 복수의 원형의 홀들을 포함하는 형태로 구성되어, 다른 형태(허니콤(honeycomb), 불규칙 또는 사각형)의 패턴에 비해 생산이 용이한 장점이 있을 뿐만 아니라, 신호 전달 경로가 단축되어 배선의 실질 저항이 최소화될 수 있는 효과가 있다.Furthermore, in the present invention, the circular hole pattern of the wiring layer is composed of a plurality of circular holes, so it not only has the advantage of being easier to produce compared to patterns of other shapes (honeycomb, irregular, or square). , the signal transmission path is shortened, which has the effect of minimizing the actual resistance of the wiring.
도 1은 본 발명의 바람직한 일실시예에 따른 전극 기판을 포함하는 투명 디스플레이 장치를 나타내는 도면이다.1 is a diagram showing a transparent display device including an electrode substrate according to a preferred embodiment of the present invention.
도 2는 본 발명의 바람직한 일실시예에 따른 디스플레이 패널의 구조를 나타내는 도면이다.Figure 2 is a diagram showing the structure of a display panel according to a preferred embodiment of the present invention.
도 3은 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴을 나타내는 도면이다.Figure 3 is a diagram showing a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
도 4 및 도 5는 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 효과를 설명하기 위한 도면이다.4 and 5 are diagrams for explaining the effect of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention.
도 6 및 도 7은 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 구조를 나타낸다.6 and 7 show the structure of a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
도 8은 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴을 나타내는 도면이다.Figure 8 is a diagram showing a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
도 9는 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴을 나타내는 도면이다.Figure 9 is a diagram showing a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention.
이하, 첨부한 도면을 참고로 하여 본 발명의 실시예에 따라 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 용이하게 실시할 수 있도록 상세히 설명한다.Hereinafter, with reference to the attached drawings, embodiments of the present invention will be described in detail so that those skilled in the art can easily implement the present invention.
도 1은 본 발명의 바람직한 일실시예에 따른 전극 기판을 포함하는 투명 디스플레이 장치를 나타낸다. 도 1을 참조하면, 투명 디스플레이 장치(10)는 영상을 표시할 수 있는 장치로서, 가시광선 영역에서 약 80% 이상의 투과율을 보이는 투명한 재질로 형성될 수 있다. 구체적으로, 디스플레이 장치(10)의 시청자들은 디스플레이 장치(10)의 영상이 표시되는 화소 영역 이외의 영역은 투명한 것으로 인식할 수 있다.Figure 1 shows a transparent display device including an electrode substrate according to a preferred embodiment of the present invention. Referring to FIG. 1, the transparent display device 10 is a device capable of displaying an image, and may be formed of a transparent material showing a transmittance of about 80% or more in the visible light region. Specifically, viewers of the display device 10 may perceive areas other than the pixel area where the image of the display device 10 is displayed as transparent.
투명 디스플레이 장치(10)는 디스플레이 패널(100) 및 컨트롤러(200)를 포함할 수 있다. The transparent display device 10 may include a display panel 100 and a controller 200.
디스플레이 패널(100)은 복수의 화소(PX)들을 포함할 수 있다. 복수의 화소(PX)들 각각은 빛이 출력되는 영역으로서, 복수의 화소(PX)들이 출력하는 빛들이 조합됨으로써 디스플레이 패널(100)은 영상을 표시하게 된다.The display panel 100 may include a plurality of pixels (PX). Each of the plurality of pixels (PX) is an area where light is output, and the display panel 100 displays an image by combining the light output from the plurality of pixels (PX).
복수의 화소(PX)들 각각은 발광 소자를 포함할 수 있다. 바람직한 일실시예에 따라, 복수의 화소(PX)들 각각은 빨간색(R), 파란색(B) 및 초록색(G) 빛을 출력하도록 구성되는 발광 소자들을 포함할 수 있다. 여기서, 발광 소자는 LED(light emitting diode)일 수 있으나, 본 발명의 바람직한 일실시예가 이에 한정되는 것은 아니다. Each of the plurality of pixels (PX) may include a light emitting device. According to a preferred embodiment, each of the plurality of pixels PX may include light emitting elements configured to output red (R), blue (B), and green (G) light. Here, the light emitting device may be an LED (light emitting diode), but the preferred embodiment of the present invention is not limited thereto.
특히 도 8 및 도 9에 관한 실시예에서는, 화소(PX)는 다수의 적색 LED 소자, 청색 LED 소자 및 녹색 LED 소자(또는 적색 LED 소자, 청색 LED 소자, 녹색 LED 소자 및 백색 LED 소자)와 이들 LED 소자를 구동할 수 있는 드라이버를 포함하고, 한쌍의 전원 단자, 제어신호 입력단자 및 제어신호 출력단자 등 4개의 단자를 가지면서 다양한 색상을 표출할 수 있는 LED 모듈이 된다. In particular, in the embodiments related to FIGS. 8 and 9, the pixel PX includes a plurality of red LED elements, blue LED elements, and green LED elements (or red LED elements, blue LED elements, green LED elements, and white LED elements) and these. It is an LED module that contains a driver that can drive LED elements and has four terminals, including a pair of power terminals, a control signal input terminal, and a control signal output terminal, and can display various colors.
본 발명에서 전극 기판 상에 탑재되는 LED 모듈이 갖는 단자의 개수가 LED 모듈의 종류 및 용도 등에 따라 적절히 증감될 수 있음은 물론이다. Of course, in the present invention, the number of terminals of the LED module mounted on the electrode substrate can be appropriately increased or decreased depending on the type and purpose of the LED module.
복수의 화소(PX)들은 디스플레이 패널(100) 상에서 격자(lattice) 형태로 배열될 수 있다. 예를 들어, 복수의 화소(PX)들은 복수의 행들 및 복수의 열들을 따라 배치될 수 있다. 도 1에는 도시되어 있지 않으나, 복수의 화소(PX)들 각각으로 전원 또는 신호를 공급하기 위한 배선들이 디스플레이 패널(100) 상에 배열되어, 복수의 화소(PX)들과 연결될 수 있다.A plurality of pixels (PX) may be arranged in a lattice form on the display panel 100. For example, a plurality of pixels PX may be arranged along a plurality of rows and a plurality of columns. Although not shown in FIG. 1 , wires for supplying power or signals to each of the plurality of pixels PX may be arranged on the display panel 100 and connected to the plurality of pixels PX.
복수의 화소(PX)들은 컨트롤러(200)로부터 전송되는 전원 또는 신호들에 응답하여, 빛을 발광할 수 있다. 예를 들어, 컨트롤러(200)는 특정 레벨의 구동 전압과 제어 신호를 복수의 화소(PX)들로 출력할 수 있고, 복수의 화소(PX)들은 구동 전압과 제어 신호에 기초하여 특정 색상의 빛을 발광할 수 있다.A plurality of pixels (PX) may emit light in response to power or signals transmitted from the controller 200. For example, the controller 200 may output a specific level of driving voltage and control signal to a plurality of pixels (PX), and the plurality of pixels (PX) may emit light of a specific color based on the driving voltage and control signal. can emit light.
컨트롤러(200)는 디스플레이 패널(100)을 제어하기 위한 전원 또는 신호를 생성하고, 생성된 전원 또는 신호를 디스플레이 패널(100)로 출력할 수 있다. 바람직한 일실시예에 따라, 전원 또는 신호를 공급하기 위한 배선들이 디스플레이 패널(100)과 컨트롤러(200) 사이에 위치할 수 있다.The controller 200 may generate power or signals to control the display panel 100 and output the generated power or signals to the display panel 100 . According to a preferred embodiment, wires for supplying power or signals may be located between the display panel 100 and the controller 200.
예를 들어, 컨트롤러(200)는 전원 또는 신호들의 출력 타이밍을 제어하기 위한 타이밍 컨트롤러 및 전원 또는 신호들을 생성하도록 구성되는 드라이버 IC(integrated circuit) 등을 포함할 수 있으나, 본 발명의 바람직한 일실시예가 이에 한정되는 것은 아니다.For example, the controller 200 may include a timing controller for controlling the output timing of power or signals and a driver IC (integrated circuit) configured to generate power or signals, but a preferred embodiment of the present invention It is not limited to this.
투명 디스플레이 장치(10)의 디스플레이 패널(100)은 시각적으로 투명해야 할 것이 요구된다. 이를 위해, 디스플레이 패널(100)은 투명한 소재로 형성되는 투명 베이스 기판 상에 투과성을 갖는 배선층이 배치된다. 본 발명의 바람직한 일실시예에 따르면, 디스플레이 패널(100)에 포함되는 배선층이 복수의 홀들을 포함하는 원형 홀 패턴으로 이루어짐으로써, 높은 투과성을 가질 수 있는 효과가 있다. The display panel 100 of the transparent display device 10 is required to be visually transparent. To this end, the display panel 100 has a transparent wiring layer disposed on a transparent base substrate made of a transparent material. According to a preferred embodiment of the present invention, the wiring layer included in the display panel 100 is formed in a circular hole pattern including a plurality of holes, which has the effect of having high transparency.
나아가, 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴은 복수의 원형의 홀들을 포함하는 형태로 구성되어, 다른 형태(허니콤(honeycomb), 불규칙 또는 사각형)의 패턴에 비해 생산이 용이한 장점이 있을 뿐만 아니라, 신호 전달 경로가 단축되어 배선의 실질 저항이 최소화될 수 있는 효과가 있다.Furthermore, the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention is composed of a plurality of circular holes, making it easier to produce compared to patterns of other shapes (honeycomb, irregular, or square). Not only is there an advantage, but the signal transmission path is shortened, which has the effect of minimizing the actual resistance of the wiring.
도 2는 본 발명의 바람직한 일실시예에 따른 디스플레이 패널의 구조를 나타내는 도면이다. 도 2를 참조하면, 디스플레이 패널(100)은 투명 베이스 기판(110), 발광 소자(120), 배선층(130), 패드들(140) 및 보호층(150)을 포함할 수 있다. 여기서, 투명 베이스 기판(110), 배선층(130) 및 패드들(140)을 포함하는 것을 전극 기판이라 지칭할 수 있다.Figure 2 is a diagram showing the structure of a display panel according to a preferred embodiment of the present invention. Referring to FIG. 2 , the display panel 100 may include a transparent base substrate 110, a light emitting element 120, a wiring layer 130, pads 140, and a protective layer 150. Here, what includes the transparent base substrate 110, the wiring layer 130, and the pads 140 may be referred to as an electrode substrate.
투명 베이스 기판(110)은 디스플레이 패널(100)의 베이스 기재로서, 투과성이 높은 유리 기판 또는 투명 플라스틱 기판일 수 있다. 예를 들어, 투명 베이스 기판(110)은 유리, 우레탄 수지, 폴리이미드 수지, 폴리에스테르 수지, (메타)아크릴레이트계 고분자 수지, 폴리에틸렌 또는 폴리프로필렌 등의 폴리올레핀계 수지 등을 포함할 수 있다. 또한, 투명 베이스 기판(110)은 PET(Polyethylene terephthalate), COP(cyclic olefin polymer), PEN(polyethylene naphthalate), PES(polyethersulfone), PC(polycarbonate) 또는 아세틸 셀룰로이드를 포함할 수 있으나, 이에 한정되는 것은 아니다.The transparent base substrate 110 is a base material of the display panel 100 and may be a highly transparent glass substrate or a transparent plastic substrate. For example, the transparent base substrate 110 may include glass, urethane resin, polyimide resin, polyester resin, (meth)acrylate-based polymer resin, polyolefin-based resin such as polyethylene or polypropylene. Additionally, the transparent base substrate 110 may include, but is not limited to, polyethylene terephthalate (PET), cyclic olefin polymer (COP), polyethylene naphthalate (PEN), polyethersulfone (PES), polycarbonate (PC), or acetyl celluloid. no.
발광 소자(120)는 빛을 출력하도록 구성되는 소자로서, LED(light emitting diode)일 수 있다. 발광 소자(120)는 투명 베이스 기판(110) 상에 배치되어, 전달되는 신호 또는 전원에 기초하여 작동할 수 있다.The light emitting device 120 is a device configured to output light and may be an LED (light emitting diode). The light emitting device 120 may be disposed on the transparent base substrate 110 and operate based on a transmitted signal or power.
바람직한 일실시예에 따라, 발광 소자(120)는 빨간색, 파란색, 또는 초록색 빛을 출력할 수 있으나, 이에 한정되는 것은 아니다.According to a preferred embodiment, the light emitting device 120 may output red, blue, or green light, but is not limited thereto.
배선층(130)은 발광 소자(120)로 신호 또는 전원을 전달하기 위한 배선들을 포함할 수 있다. 배선층(130)은 컨트롤러(200)와 연결된 외부 배선들과 전기적으로 연결될 수 있고, 컨트롤러(200)로부터 화소(PX)들 또는 발광 소자(120)를 제어하기 위한 신호 또는 전원을 수신할 수 있다. The wiring layer 130 may include wiring for transmitting signals or power to the light emitting device 120 . The wiring layer 130 may be electrically connected to external wiring connected to the controller 200 and may receive a signal or power for controlling the pixels (PXs) or the light emitting device 120 from the controller 200.
본 발명의 바람직한 일실시예에 따른 배선층(130)은 금속 층에 복수의 홀(hole)들이 형성된 원형 홀 패턴을 포함할 수 있다. 원형 홀 패턴의 홀을 제외한 나머지 부분(즉, 테두리)를 통해 신호 또는 전원이 전달될 수 있고, 이 부분이 곧 배선이 된다.The wiring layer 130 according to a preferred embodiment of the present invention may include a circular hole pattern in which a plurality of holes are formed in the metal layer. Signals or power can be transmitted through the remaining part (i.e. border) excluding the holes of the circular hole pattern, and this part becomes the wiring.
바람직한 일실시예에 따라, 상기 원형 홀 패턴은 금속 물질을 도포하여 형성된 금속층을 에칭(etching)하여 형성될 수 있으나, 이에 한정되는 것은 아니다.According to a preferred embodiment, the circular hole pattern may be formed by etching a metal layer formed by applying a metal material, but the present invention is not limited thereto.
본 발명의 바람직한 일실시예에 따르면, 배선층(130)은 복수의 홀들이 형성된 원형 홀 패턴을 포함하여 높은 광 투과성을 달성할 수 있는 효과가 있다. 이에, 투명 베이스 기판(110)과 더불어 투명 디스플레이 패널(100)을 구현할 수 있다.According to a preferred embodiment of the present invention, the wiring layer 130 includes a circular hole pattern in which a plurality of holes are formed, thereby achieving high light transparency. Accordingly, the transparent display panel 100 can be implemented along with the transparent base substrate 110.
패드들(140)은 발광 소자(120)와 전기적으로 연결되어 신호가 입출력될 수 있다. 바람직한 일실시예에 따라, 패드들(140)은 발광 소자(120)의 단자들과 전기적으로 연결될 수 있을 뿐만 아니라, 배선층(130)에 포함된 배선과 연결될 수 있다. 이 때, 하나의 패드(140)는 하나의 배선과 연결될 수 있으나, 이에 한정되는 것은 아니다.The pads 140 are electrically connected to the light emitting device 120 so that signals can be input and output. According to a preferred embodiment, the pads 140 may be electrically connected to the terminals of the light emitting device 120 as well as connected to the wiring included in the wiring layer 130. At this time, one pad 140 may be connected to one wire, but is not limited to this.
보호층(150)은 발광 소자(120), 배선층(130) 및 패드들(140) 전체를 커버하도록 배치될 수 있다. 즉, 보호층(150)은 이물질이나 습기의 침투를 방지하고, 표면을 평탄화할 수 있는 봉지재의 역할을 수행하는 층일 수 있다. 예를 들어, 보호층(150)은 투명한 막의 형태일 수 있으나, 본 발명의 바람직한 일실시예가 이에 해당하는 것은 아니다.The protective layer 150 may be disposed to cover the entire light emitting device 120, the wiring layer 130, and the pads 140. That is, the protective layer 150 may be a layer that prevents foreign substances or moisture from penetrating and acts as an encapsulant that can flatten the surface. For example, the protective layer 150 may be in the form of a transparent film, but this does not apply to a preferred embodiment of the present invention.
도 3은 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴을 나타낸다. 도 3을 참조하면, 원형 홀 패턴(131)은 배선층(130)에 포함될 수 있다. 바람직한 일실시예에 따라, 원형 홀 패턴(131)은 패드들(140)과 접촉되는 도전성 패턴일 수 있다.Figure 3 shows a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention. Referring to FIG. 3 , the circular hole pattern 131 may be included in the wiring layer 130 . According to a preferred embodiment, the circular hole pattern 131 may be a conductive pattern in contact with the pads 140.
원형 홀 패턴(131)은 금속 시트(또는 금속 층) 상에 복수의 홀들(131a)이 형성되어 구성될 수 있다. 이 때, 해당 금속 시트 중에서 복수의 홀들(131a)이 형성되지 않은 부분(131b)로 신호 또는 전압들이 전달될 수 있고, 이 부분을 배선부(131b)라 한다. 달리 말하면, 원형 홀 패턴(131)은 서로 이격되어 배치되는 복수의 홀들(131a) 및 복수의 홀들(131a) 각각 사이에 배치되어 신호 또는 전압이 전달되는 배선부(131b)를 포함할 수 있다. The circular hole pattern 131 may be formed by forming a plurality of holes 131a on a metal sheet (or metal layer). At this time, signals or voltages may be transmitted to a portion 131b of the metal sheet in which the plurality of holes 131a are not formed, and this portion is referred to as the wiring portion 131b. In other words, the circular hole pattern 131 may include a plurality of holes 131a spaced apart from each other and a wiring portion 131b disposed between each of the plurality of holes 131a to transmit a signal or voltage.
복수의 홀들(131a) 각각은 원형의 홀(hole)일 수 있고, 서로 이격되어 일렬로 배열될 수 있다. 바람직한 일실시예에 따라, 복수의 홀들(131a)의 직경은 0.2 내지 0.3 mm일 수 있고, 예를 들어, 0.235mm일 수 있으나 본 발명의 바람직한 일실시예가 이에 한정되는 것은 아니다. 또한, 복수의 홀들(131a) 사이의 거리는 0.05mm 일 수 있으나, 이에 한정되는 것은 아니다.Each of the plurality of holes 131a may be a circular hole and may be arranged in a line and spaced apart from each other. According to a preferred embodiment, the diameter of the plurality of holes 131a may be 0.2 to 0.3 mm, for example, 0.235 mm, but the preferred embodiment of the present invention is not limited thereto. Additionally, the distance between the plurality of holes 131a may be 0.05 mm, but is not limited thereto.
본 발명의 바람직한 일실시예에 따르면, 디스플레이 패널(100)의 배선층(130)이 복수의 홀들(131a)을 포함하는 원형 홀 패턴으로 이루어짐으로써, 높은 투과성을 가질 수 있는 효과가 있다.According to a preferred embodiment of the present invention, the wiring layer 130 of the display panel 100 is formed in a circular hole pattern including a plurality of holes 131a, which has the effect of having high transparency.
도 4 및 도 5는 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 효과를 설명하기 위한 도면으로서, 도 4는 종래의 배선층의 구조인 사각 매쉬 구조를 나타내고, 도 5는 종래의 배선층의 구조인 허니콤(honeycomb) 구조를 나타낸다.Figures 4 and 5 are diagrams for explaining the effect of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention. Figure 4 shows a square mesh structure, which is the structure of a conventional wiring layer, and Figure 5 shows a conventional wiring layer. It represents the honeycomb structure.
복수의 홀들이 형성된 원형 홀 패턴 구조를 갖는 본 발명의 배선층과 달리, 종래의 배선층의 구조인 사각 매쉬 구조와 허니콤 구조는, 해당 구조를 형성하는 에칭 과정에서 연결 부분이 파손될 수 있을 뿐 아니라, 형성된 후에도 그 구조적 안정성이 떨어지는 문제가 있다.Unlike the wiring layer of the present invention, which has a circular hole pattern structure in which a plurality of holes are formed, the square mesh structure and honeycomb structure, which are the structures of conventional wiring layers, not only may damage the connecting portion during the etching process of forming the structure, Even after it is formed, there is a problem with its structural stability being low.
예를 들어, 종래의 배선층의 구조는 다각형의 단위 구조를 갖는 바, 인접하는 다각형들이 맞물리는 부분(예컨대, 도 4의 A 및 도 5의 C)이 존재하게 된다. 한편, 다각형의 특성 상 맞물리는 부분의 면적이 상대적으로 좁을 수 밖에 없고(첨점 형태), 이러한 다각형이 맞물리는 부분을 중심으로 에칭이 수행되므로, 여러 방향에서 수행되는 에칭에 의해 다각형들이 맞물리는 부분이 끊어질 수 있는 문제가 있다. 예를 들어, 도 4의 A는 주변 4방향에서 에칭이 수행되므로, 4방향의 에칭 중 어느 하나의 에칭이라도 과도하게 수행되면 A 부분은 파손될 수 있다.For example, the structure of a conventional wiring layer has a polygonal unit structure, so there is a portion (eg, A in FIG. 4 and C in FIG. 5) where adjacent polygons are interlocked. On the other hand, due to the nature of polygons, the area of the interlocking area is inevitably relatively narrow (cusp shape), and etching is performed centered on the area where these polygons interlock, so the area where the polygons interlock is formed by etching performed in various directions. There is a problem that could cause this to break. For example, since etching is performed in four directions around A in FIG. 4, portion A may be damaged if etching in any one of the four directions is excessive.
반면, 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 경우, 인접하는 원형 홀들이 맞물리는 부분의 면적이 다각형에 비해 넓게 설계되므로, 여러 방향에서 에칭이 수행되더라도 맞물리는 부분이 쉽게 끊어지지 않아 파손 가능성이 저감될 수 있는 효과가 있다.On the other hand, in the case of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention, the area of the area where adjacent circular holes are engaged is designed to be larger than that of a polygon, so even if etching is performed in multiple directions, the engaged portion is easily broken. It has the effect of reducing the possibility of damage because it does not break.
또한, 예를 들어, 종래의 배선층의 구조는 다각형의 단위 구조를 갖는 바, 인접하는 다각형들의 중심 사이의 거리(즉, 다각형의 변 사이의 거리)가 일정하지 않게 된다. 또한, 다각형들 사이에 형성되는 선로의 폭은 일정하게 유지된다(도 4의 B 및 도 5의 D). 이에 따라, 종래의 구조에서 선로의 폭을 좁게 설계하는 경우, 전체 선로의 폭이 좁게 설계되어 외력에 의해 선로가 쉽게 끊어질 수 있는 문제가 발생할 수 있다.Additionally, for example, the structure of the conventional wiring layer has a polygonal unit structure, so the distance between the centers of adjacent polygons (that is, the distance between the sides of the polygons) is not constant. Additionally, the width of the lines formed between polygons is maintained constant (B in FIG. 4 and D in FIG. 5). Accordingly, when the width of the track is designed to be narrow in the conventional structure, a problem in which the track may be easily broken by external force may occur because the overall track width is designed to be narrow.
반면, 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 경우, 인접하는 원형 홀들의 중심 사이의 거리가 일정하고, 선로의 폭을 좁게 설계하더라도 선로의 폭이 좁은 부분과 상대적으로 넓은 부분이 함께 존재하게 되어 외력에 대한 강도가 개선될 수 있는 효과가 있다. On the other hand, in the case of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention, the distance between the centers of adjacent circular holes is constant, and even if the line width is designed to be narrow, the narrow portion and the relatively wide portion of the line This presence together has the effect of improving the strength against external forces.
도 6 및 도 7은 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 구조를 나타낸다. 도 6는 원형 홀들이 바둑판식 구조로 배열된 구조를 나타내며, 도 7는 원형 홀들이 복수의 행으로 배치되되, 인접한 행이 서로 어긋나게 배치된 구조를 나타낸다. 예컨대, 도 7의 인접한 3개의 원형 홀들의 중심은 정삼각형을 이룰 수 있다.6 and 7 show the structure of a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention. FIG. 6 shows a structure in which circular holes are arranged in a checkerboard structure, and FIG. 7 shows a structure in which circular holes are arranged in a plurality of rows, with adjacent rows being offset from each other. For example, the centers of three adjacent circular holes in FIG. 7 may form an equilateral triangle.
도 6의 경우, 가로 혹은 세로 방향으로 인접한 원형 홀들 사이의 거리(X1)가 짧더라도, 대각 방향으로 인접한 원형 홀들 사이의 거리(X2)가 상대적으로 길게 된다. 반면, 도 7의 경우, 가로, 세로 및 대각 방향으로 인접한 원형 홀들 사이의 거리(Y1, Y2)가 실질적으로 동일하게 된다. 이러한 특성에 따라, 원형 홀들 사이의 거리가 동일하다면, 도 7의 구조는 도 6의 구조에 비해 동일 면적에서 원형 홀들을 더 많이 배치할 수 있고, 이에 따라, 투명 디스플레이의 투과도가 더 향상될 수 있는 효과가 있다. In the case of FIG. 6, even though the distance (X1) between horizontally or vertically adjacent circular holes is short, the distance (X2) between diagonally adjacent circular holes is relatively long. On the other hand, in the case of FIG. 7, the distances (Y1, Y2) between adjacent circular holes in the horizontal, vertical, and diagonal directions are substantially the same. According to these characteristics, if the distance between circular holes is the same, the structure of FIG. 7 can arrange more circular holes in the same area compared to the structure of FIG. 6, and thus the transmittance of the transparent display can be further improved. There is an effect.
또한, 도 7의 구조는 도 6의 구조에 비해, 하나의 원형 홀과 인접한 다른 원형 홀들 사이의 거리의 평균이 작게 설계될 수 있고, 그 결과, 선로의 유효 저항이 낮게 설계될 수 있는 효과가 있다.In addition, compared to the structure of FIG. 6, the structure of FIG. 7 can be designed to have a smaller average distance between one circular hole and other adjacent circular holes, and as a result, the effective resistance of the line can be designed to be lower. there is.
한편, 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴의 구조는 도 6의 구조 및 도 7의 구조 모두 채택할 수 있으며, 보다 바람직하게는 도 7의 구조일 수 있다.Meanwhile, the structure of the circular hole pattern of the wiring layer according to a preferred embodiment of the present invention may adopt both the structure of FIG. 6 and the structure of FIG. 7, and more preferably the structure of FIG. 7.
도 8은 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴을 나타낸다. 도 8을 참조하면, 원형 홀 패턴(131)은 복수의 원형 홀 패턴 영역들(131-1~131-4)을 포함할 수 있다. 원형 홀 패턴 영역들(131-1~131-4) 상에 복수의 패드들(140-1~140-4)이 배치될 수 있다.Figure 8 shows a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention. Referring to FIG. 8, the circular hole pattern 131 may include a plurality of circular hole pattern areas 131-1 to 131-4. A plurality of pads 140-1 to 140-4 may be disposed on the circular hole pattern areas 131-1 to 131-4.
패드들(140-1~140-4)은 하나의 화소(도 1의 PX)를 구성하는 발광 소자들의 전극과 연결될 수 있다. 화소(PX)는 서로 전기적으로 절연된 복수의 발광 소자들을 포함할 수 있고, 패드들(140-1~140-4) 각각은 상기 복수의 발광 소자들 각각과 연결될 수 있다. 예를 들어, 제1패드(140-1)는 적색 발광 소자와 연결되고, 제2패드(140-2)는 녹색 발광 소자와 연결되며, 제3패드(140-3)는 청색 발광 소자와 연결되며, 제4패드(140-4)는 공통 전극과 연결될 수 있다. 또한, 예를 들어, 각 패드들(140-1~140-4)을 통해 각 발광 소자로 입출력되는 데이터 전압이 인가될 수 있고, 또는, 공통 전극으로 입출력되는 구동 전압이 인가될 수 있다.Pads 140-1 to 140-4 may be connected to electrodes of light-emitting devices constituting one pixel (PX in FIG. 1). The pixel PX may include a plurality of light-emitting devices that are electrically insulated from each other, and each of the pads 140-1 to 140-4 may be connected to each of the plurality of light-emitting devices. For example, the first pad 140-1 is connected to a red light-emitting device, the second pad 140-2 is connected to a green light-emitting device, and the third pad 140-3 is connected to a blue light-emitting device. And the fourth pad 140-4 can be connected to the common electrode. Additionally, for example, a data voltage input/output to each light emitting device may be applied through each pad 140-1 to 140-4, or a driving voltage input/output to a common electrode may be applied.
대안적으로, 실시 예들에 따라, 패드들(140-1~140-4)은 화소(도 1의 PX)안에 다수의 발광 소자들의 구동을 위한 공통 전극과 제어신호를 연결하는 원형 홀 패턴 영역들(131-1~131-4)과 연결될 수 있다. 화소(PX)는 서로 전기적으로 절연된 복수의 발광 소자와 구동 드라이버를 포함할 수 있고, 패드들(140-1~140-4) 각각은 상기 복수의 발광 소자를 구동하기 위한 구동 드라이버와 연결될 수 있다. 예를 들어, 제1패드(140-1)는 공통 전원의 플러스 구동회로와 연결되고, 제2패드(140-2)는 복수의 발광 소자를 점등하는 구동 드라이버의 제어 명령 입력 신호와 연결되며, 제3패드(140-3)는 구동 드라이버에 신호를 전달하고 그 다음 화소에 제어신호를 전달하는 다음번 패드와 연결되며, 제4패드(140-4)는 마이너스 공통 전원과 연결될 수 있다.Alternatively, depending on embodiments, the pads 140-1 to 140-4 are circular hole pattern areas that connect a control signal and a common electrode for driving multiple light-emitting devices within the pixel (PX in FIG. 1). It can be connected to (131-1~131-4). The pixel PX may include a plurality of light-emitting elements and a driving driver that are electrically insulated from each other, and each of the pads 140-1 to 140-4 may be connected to a driving driver for driving the plurality of light-emitting elements. there is. For example, the first pad 140-1 is connected to a positive driving circuit of a common power supply, and the second pad 140-2 is connected to a control command input signal of a driving driver that turns on a plurality of light emitting devices, The third pad 140-3 is connected to the next pad that transmits a signal to the driving driver and a control signal to the next pixel, and the fourth pad 140-4 can be connected to a negative common power source.
복수의 원형 홀 패턴 영역들(131-1~131-4) 각각은 패드들(140-1~140-4) 각각과 전기적으로 연결될 수 있다. 제1원형 홀 패턴 영역(131-1)은 제1패드(140-1)와 전기적으로 연결되고, 제2원형 홀 패턴 영역(131-2)은 제2패드(140-2)와 전기적으로 연결되고, 제3원형 홀 패턴 영역(131-3)은 제3패드(140-3)와 전기적으로 연결되고, 제4원형 홀 패턴 영역(131-4)은 제4패드(140-4)와 전기적으로 연결될 수 있다.Each of the plurality of circular hole pattern areas 131-1 to 131-4 may be electrically connected to each of the pads 140-1 to 140-4. The first circular hole pattern area 131-1 is electrically connected to the first pad 140-1, and the second circular hole pattern area 131-2 is electrically connected to the second pad 140-2. The third circular hole pattern area 131-3 is electrically connected to the third pad 140-3, and the fourth circular hole pattern area 131-4 is electrically connected to the fourth pad 140-4. It can be connected to .
이 때, 복수의 원형 홀 패턴 영역들(131-1~131-4) 각각은 전기적으로 절연(또는 분리)될 수 있다. 패드들(140-1~140-4) 각각은 서로 전기적으로 절연될 수 있고, 복수의 원형 홀 패턴 영역들(131-1~131-4) 또한 서로 전기적으로 절연될 수 있다.At this time, each of the plurality of circular hole pattern regions 131-1 to 131-4 may be electrically insulated (or separated). Each of the pads 140-1 to 140-4 may be electrically insulated from each other, and the plurality of circular hole pattern regions 131-1 to 131-4 may also be electrically insulated from each other.
바람직한 일실시예에 따라, 복수의 원형 홀 패턴 영역들(131-1~131-4) 사이에는 일 측이 개방되어 서로 연결된 복수의 개방 홀들을 포함하는 오픈 영역(OA)이 배치될 수 있다. 본 발명의 바람직한 일실시예에 따르면 복수의 홀들의 일 측을 개방시킴으로써 복수의 원형 홀 패턴 영역들(131-1~131-4)의 전기적 절연을 쉽게 달성할 수 있는 효과가 있다. 복수의 홀들의 일 측의 개방은, 예를 들어, 도금, 에칭 또는 레이저 절단에 의해 이루어질 수 있으나, 이에 한정되는 것은 아니다.According to a preferred embodiment, an open area OA including a plurality of open holes that are open on one side and connected to each other may be disposed between the plurality of circular hole pattern areas 131-1 to 131-4. According to a preferred embodiment of the present invention, electrical insulation of the plurality of circular hole pattern regions 131-1 to 131-4 can be easily achieved by opening one side of the plurality of holes. One side of the plurality of holes may be opened by, for example, plating, etching, or laser cutting, but is not limited thereto.
도 9는 본 발명의 바람직한 일실시예에 따른 배선층의 원형 홀 패턴을 나타낸다. 도 9을 참조하면, 원형 홀 패턴 영역은 각각 서로 다른 화소에 포함되는 적어도 두 개의 발광 소자와 연결된 패드와 전기적으로 연결될 수 있다. 이를 통해, 배선층(130)은 복수의 화소(PX)들을 전기적으로 연결할 수 있고, 공통된 신호를 하나의 원형 홀 패턴을 통해 다수의 패드들(즉, 다수의 발광 소자들)로 전송할 수 있는 효과가 있다.Figure 9 shows a circular hole pattern of a wiring layer according to a preferred embodiment of the present invention. Referring to FIG. 9 , the circular hole pattern area may be electrically connected to a pad connected to at least two light emitting devices included in different pixels. Through this, the wiring layer 130 can electrically connect a plurality of pixels (PX) and transmit a common signal to multiple pads (i.e., multiple light-emitting devices) through one circular hole pattern. there is.
바람직한 일실시예에 따라, 원형 홀 패턴 영역은 인접한 두 개의 화소들 각각에 포함되는 두 개의 발광 소자와 연결된 패드들 각각과 전기적으로 연결될 수 있다. 이 때, 두 개의 인접한 화소들은 행 방향으로 인접하거나, 또는, 열 방향으로 인접한 화소일 수 있다.According to a preferred embodiment, the circular hole pattern area may be electrically connected to each of the pads connected to the two light emitting devices included in each of the two adjacent pixels. At this time, the two adjacent pixels may be adjacent in the row direction or may be adjacent in the column direction.
도 9에 도시된 바와 같이, 제3원형 홀 패턴 영역(131-3)은 화소(PX)에 포함된 발광 소자와 연결된 제3패드(140-3)와 전기적으로 연결될 수 있다. 또한, 제3원형 홀 패턴 영역(131-3)은 화소(PX)의 좌측에 배치된 다른 화소에 포함된 발광 소자와 연결된 제7패드(140-7)와도 전기적으로 연결될 수 있다.As shown in FIG. 9, the third circular hole pattern area 131-3 may be electrically connected to the third pad 140-3 connected to the light emitting device included in the pixel PX. Additionally, the third circular hole pattern area 131-3 may be electrically connected to a seventh pad 140-7 connected to a light emitting device included in another pixel disposed to the left of the pixel PX.
또한, 대안적으로, 도 9에 도시된 바와 같이, 제3원형 홀 패턴 영역(131-3)은 화소(PX)에 포함된 발광 소자와 연결된 제3패드(140-3)와 전기적으로 연결될 수 있다. 또한, 제3원형 홀 패턴 영역(131-3)은 화소(PX)의 아래에 배치된 다른 화소에 포함된 발광 소자와 연결된 제9패드(140-9)와도 전기적으로 연결될 수 있다. Additionally, alternatively, as shown in FIG. 9, the third circular hole pattern area 131-3 may be electrically connected to the third pad 140-3 connected to the light emitting device included in the pixel PX. there is. Additionally, the third circular hole pattern area 131-3 may be electrically connected to a ninth pad 140-9 connected to a light emitting device included in another pixel disposed below the pixel PX.
또한, 대안적으로, 도 9에 도시된 바와 같이, 제4원형 홀 패턴 영역(131-4)은 화소(PX)에 포함된 발광 소자와 연결된 제4패드(140-4)와 전기적으로 연결될 수 있다. 또한, 제4원형 홀 패턴 영역(131-4)은 화소(PX)의 좌측에 배치된 다른 화소에 포함된 발광 소자와 연결된 제6패드(140-6)와도 전기적으로 연결될 수 있다.Additionally, alternatively, as shown in FIG. 9, the fourth circular hole pattern area 131-4 may be electrically connected to the fourth pad 140-4 connected to the light emitting device included in the pixel PX. there is. Additionally, the fourth circular hole pattern area 131-4 may be electrically connected to a sixth pad 140-6 connected to a light emitting device included in another pixel disposed to the left of the pixel PX.
[부호의 설명][Explanation of symbols]
10: 투명 디스플레이 장치10: Transparent display device
100: 디스플레이 패널100: display panel
110: 투명 베이스 기판110: Transparent base substrate
120: 발광 소자120: light emitting element
130: 배선층 130: wiring layer
140: 패드140: pad
150: 보호층150: protective layer
PX: 화소PX: pixels
200: 컨트롤러200: Controller

Claims (10)

  1. 디스플레이 패널의 전극 기판에 있어서,In the electrode substrate of the display panel,
    투명 베이스 기판;Transparent base substrate;
    상기 투명 베이스 기판 상부에 배치되며, 상기 투명 디스플레이의 복수의 발광 소자들과 연결되어 신호가 유출입되는 패드들; 및 Pads disposed on the transparent base substrate and connected to a plurality of light emitting elements of the transparent display to allow signals to flow in and out; and
    상기 투명 기판 상부에 배치되며, 상기 패드들과 전기적으로 연결되는 배선층을 포함하고,It is disposed on the transparent substrate and includes a wiring layer electrically connected to the pads,
    상기 배선층은 금속층 상에 복수의 홀들이 서로 이격되어 형성된 원형 홀(hole) 패턴을 포함하는 전극 기판. The wiring layer is an electrode substrate including a circular hole pattern in which a plurality of holes are spaced apart from each other on a metal layer.
  2. 제1항에 있어서, According to paragraph 1,
    상기 원형 홀 패턴은, The circular hole pattern is,
    서로 이격되어 배치되는 복수의 홀들; 및A plurality of holes arranged to be spaced apart from each other; and
    상기 홀들 각각 사이에 배치되어 신호 또는 전압이 전달되는 배선부를 포함하는 전극 기판.An electrode substrate including a wiring portion disposed between each of the holes to transmit a signal or voltage.
  3. 제1항에 있어서,According to paragraph 1,
    상기 복수의 홀들 각각은 복수의 행과 열을 따라 배치되는 전극 기판.An electrode substrate where each of the plurality of holes is arranged along a plurality of rows and columns.
  4. 제1항에 있어서, According to paragraph 1,
    상기 패드들은,The pads are,
    상기 복수의 발광 소자들 중 제1발광 소자와 연결되는 제1패드; 및a first pad connected to a first light emitting device among the plurality of light emitting devices; and
    상기 복수의 발광 소자들 중 상기 제1발광 소자와 전기적으로 절연된 제2발광 소자와 연결되는 제2패드를 포함하고,A second pad connected to a second light-emitting element electrically insulated from the first light-emitting element among the plurality of light-emitting elements,
    상기 제1패드와 상기 제2패드는 전기적으로 절연된 전극 기판.The first pad and the second pad are electrically insulated electrode substrates.
  5. 제4항에 있어서, According to paragraph 4,
    상기 배선층의 원형 홀 패턴은,The circular hole pattern of the wiring layer is,
    상기 제1패드와 전기적으로 연결된 제1원형 홀 패턴 영역; 및a first circular hole pattern area electrically connected to the first pad; and
    상기 제2패드와 전기적으로 연결된 제2원형 홀 패턴 영역을 포함하고,It includes a second circular hole pattern area electrically connected to the second pad,
    상기 제1원형 홀 패턴 영역과 상기 제2원형 홀 패턴 영역은 전기적으로 절연된 전극 기판.The first circular hole pattern area and the second circular hole pattern area are electrically insulated from each other.
  6. 제5항에 있어서, According to clause 5,
    상기 제1원형 홀 패턴 영역과 상기 제2원형 홀 패턴 영역 사이에는, 일 측이 개방되어 서로 연통되도록 연결된 복수의 개방 홀들을 포함하는 오픈 영역이 배치되며,An open area is disposed between the first circular hole pattern area and the second circular hole pattern area, including a plurality of open holes that are open on one side and connected to communicate with each other,
    상기 제1원형 홀 패턴 영역과 상기 제2원형 홀 패턴 영역은 상기 오픈 영역에 의해 서로 전기적으로 절연되는 전극 기판. The first circular hole pattern area and the second circular hole pattern area are electrically insulated from each other by the open area.
  7. 제5항에 있어서,According to clause 5,
    상기 패드들은 상기 복수의 발광 소자들 중 제3발광 소자와 연결되는 제3패드를 더 포함하고,The pads further include a third pad connected to a third light-emitting device among the plurality of light-emitting devices,
    상기 제1원형 홀 패턴 영역은 상기 제3패드와 전기적으로 연결되는 전극 기판.The first circular hole pattern area is electrically connected to the third pad.
  8. 제7항에 있어서,In clause 7,
    상기 제3발광 소자는 상기 제1발광 소자 및 상기 제2발광 소자가 포함된 제1화소와 다른 제2화소에 포함되는 전극 기판.The third light-emitting device is an electrode substrate included in a second pixel that is different from a first pixel including the first light-emitting device and the second light-emitting device.
  9. 제8항에 있어서,According to clause 8,
    상기 제2화소는 상기 제1화소와 이웃하도록 배치되는 전극 기판.The second pixel is disposed adjacent to the first pixel.
  10. 투명 베이스 기판;Transparent base substrate;
    상기 투명 베이스 기판 상부에 배치되는 복수의 발광 소자들;a plurality of light emitting devices disposed on the transparent base substrate;
    상기 투명 베이스 기판 상부에 배치되며, 상기 복수의 발광 소자들과 연결되어 신호가 유출입되는 패드들;Pads disposed on the transparent base substrate and connected to the plurality of light emitting devices to allow signals to flow in and out;
    상기 투명 기판 상부에 배치되며, 상기 패드들과 전기적으로 연결되는 배선층을 포함하고,It is disposed on the transparent substrate and includes a wiring layer electrically connected to the pads,
    상기 배선층은 금속층 상에 복수의 홀들이 서로 이격되어 형성된 홀(hole) 패턴을 포함하는 투명 디스플레이 패널.The wiring layer is a transparent display panel including a hole pattern in which a plurality of holes are spaced apart from each other on a metal layer.
PCT/KR2023/008330 2022-06-15 2023-06-15 Electrode substrate of transparent display panel and transparent display panel comprising same WO2023244058A1 (en)

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