WO2023226787A1 - 通信方法、系统、装置和电子设备 - Google Patents

通信方法、系统、装置和电子设备 Download PDF

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Publication number
WO2023226787A1
WO2023226787A1 PCT/CN2023/093779 CN2023093779W WO2023226787A1 WO 2023226787 A1 WO2023226787 A1 WO 2023226787A1 CN 2023093779 W CN2023093779 W CN 2023093779W WO 2023226787 A1 WO2023226787 A1 WO 2023226787A1
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Prior art keywords
target
data
accelerator card
storage area
sent
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PCT/CN2023/093779
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English (en)
French (fr)
Inventor
笪禹
张永肃
张海强
葛士建
张宇
王剑
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北京有竹居网络技术有限公司
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Publication of WO2023226787A1 publication Critical patent/WO2023226787A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/403—Bus networks with centralised control, e.g. polling

Definitions

  • the embodiments of the present disclosure relate to the field of computer technology, and specifically to communication methods, systems, devices and electronic equipment.
  • PCIE Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard
  • accelerator card is generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • PCIE accelerator cards installed on a host. There are communication requirements between the host and the PCIE accelerator card, and between the PCIE accelerator card and the PCIE accelerator card. This is usually done through the ring buffer method. Communication with PCIE accelerator card.
  • an embodiment of the present disclosure provides a communication method, applied to a data sending device, including: in response to determining that there is data to be sent, calling a target interface to move the data to be sent to a target storage area, where the target storage The area is a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target accelerator card is high-speed Serial computer expansion bus standard accelerator card.
  • the data to be sent is the data that the target application calls the socket interface function to send to the protocol stack of the Transmission Control Protocol or the Internet Protocol.
  • the target interface is used to implement the connection between the protocol stack and the target accelerator card. communication; call the target interface to send a notification to the data receiving device, where the notification is used to indicate that the data to be sent has been placed in the target storage area.
  • embodiments of the present disclosure provide a communication method, applied to a data receiving device, including: in response to receiving a target notification, calling a target interface to obtain target data moved to a target storage area, where the target storage area is
  • the target accelerator card is a pre-allocated storage area on the double-rate synchronous dynamic random access memory.
  • the target notification is used to indicate that the target data has been placed in the target storage area.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card.
  • the target interface uses To realize the communication between the protocol stack of the transmission control protocol or the Internet protocol and the target accelerator card; call the target interface to parse the target data, and submit the parsed results to the protocol stack.
  • embodiments of the present disclosure provide a communication system, including: a data sending device configured to, in response to determining that there is data to be sent, call a target interface to move the data to be sent to a target storage area, and send data to a data receiving device.
  • the device sends a target notification, in which the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card, and the data to be sent is called by the target application.
  • the socket interface function sends data to the protocol stack of the Transmission Control Protocol or Internet Protocol.
  • the target interface is used to implement communication between the protocol stack and the target accelerator card.
  • the target notification is used to represent that the data to be sent has been placed in the target storage.
  • the data receiving device is used to respond to receiving the target notification, call the target interface to obtain the data to be sent that is moved to the target storage area, parse the data to be sent, and submit the parsing results to the protocol stack.
  • embodiments of the present disclosure provide a communication device, which is provided in a data sending device, including: a moving unit, configured to call a target interface to move the data to be sent to a target storage area in response to determining that there is data to be sent.
  • the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card.
  • the data to be sent calls the socket interface for the target application.
  • the target interface is used to implement communication between the protocol stack and the target accelerator card; the sending unit is used to call the target interface to send a notification to the data receiving device, where the notification is used to represent that the data to be sent has been placed in the target in the storage area.
  • embodiments of the present disclosure provide a communication device, which is provided in a data receiving device, including: an acquisition unit, configured to, in response to receiving a target notification, call the target interface to acquire the target data moved to the target storage area, wherein , the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target notification is used to indicate that the target data has been placed in the target storage area.
  • the target accelerator card is a high-speed serial computer expansion bus standard acceleration. card, the target interface is used to implement communication between the protocol stack of the transmission control protocol or Internet protocol and the target accelerator card; the submission unit is used to call the target interface to parse the target data, and submit the parsing results to the protocol stack.
  • embodiments of the present disclosure provide an electronic device, including: at least one processor; a storage device configured to store at least one program, and when the at least one program is executed by at least one processor, the at least one processor implements: Method of communication under the first or second aspect.
  • embodiments of the present disclosure provide a computer-readable medium having a computer program stored thereon, which when executed by a processor implements the steps of the communication method of the first aspect or the second aspect.
  • the communication method, system, device and electronic device provided by the embodiments of the present disclosure call the target interface to move the data to be sent to the pre-allocated double-rate synchronous dynamic random access memory of the target accelerator card in response to determining that there is data to be sent. in the storage area, and then call the above target interface to send a notification to the data receiving device indicating that the data to be sent has been placed in the target storage area.
  • PCIE-based IP network equipment can be implemented on the PCIE accelerator card
  • PCIE-based gateway equipment can be implemented on the host.
  • the host and all PCIE accelerator cards form an IP network to realize the connection between the host and the PCIE accelerator card. Communication.
  • Figure 1 is an exemplary system architecture diagram in which various embodiments of the present disclosure may be applied;
  • Figure 2 is a flow chart of an embodiment of a communication method according to the present disclosure
  • Figure 3 is a schematic diagram of the interaction between the host and the PCIE accelerator card in the communication method according to the present disclosure
  • Figure 4 is a flow chart of yet another embodiment of a communication method according to the present disclosure.
  • Figure 5 is a timing diagram of one embodiment of a communication system according to the present disclosure.
  • Figure 6 is a schematic diagram of a communication process of the communication system according to the present disclosure.
  • Figure 7 is a timing diagram of another embodiment of a communication system according to the present disclosure.
  • Figure 8 is a timing diagram of yet another embodiment of a communication system according to the present disclosure.
  • Figure 9 is a timing diagram of yet another embodiment of a communication system according to the present disclosure.
  • Figure 10 is a schematic structural diagram of an embodiment of a communication device according to the present disclosure.
  • Figure 11 is a schematic structural diagram of another embodiment of a communication device according to the present disclosure.
  • FIG. 12 is a schematic structural diagram of a computer system suitable for implementing an electronic device according to an embodiment of the present disclosure.
  • the term “include” and its variations are open-ended, ie, “including but not limited to.”
  • the term “based on” means “based at least in part on.”
  • the term “one embodiment” means “at least one embodiments”; the term “another embodiment” means “at least one additional embodiment”; the term “some embodiments” means “at least some embodiments”. Relevant definitions of other terms will be given in the description below.
  • Figure 1 illustrates an exemplary system architecture 100 to which embodiments of the communication methods of the present disclosure may be applied.
  • the system architecture 100 may include a data sending device 101 and a data receiving device 102 .
  • Communication between the data sending device 101 and the data receiving device 102 is usually a high-speed serial computer expansion bus.
  • the data sending device 101 may interact with the data receiving device 102 to send or receive messages, etc., for example, the data sending device 101 may send notifications to the data receiving device 102.
  • the data sending device 101 may be hardware or software.
  • the data sending device 101 can be a host or a PCIE accelerator card installed on the host.
  • the host can include but is not limited to smart phones, tablets, laptops, etc.
  • the data sending device 101 is software, it can be installed in the host or PCIE accelerator card. It can be implemented as multiple software or software modules (for example, multiple software or software modules used to provide distributed services), or as a single software or software module. There are no specific limitations here.
  • the data sending device 101 may call a target interface used to implement communication between the protocol stack and the target accelerator card to move the data to be sent to the double-rate synchronous dynamic random access memory of the PCIE accelerator card. into the pre-allocated storage area; after that, the target interface may be called to send a notification to the data receiving device 102 indicating that the data to be sent has been placed in the target storage area.
  • the data receiving device 102 may call a target interface used to implement communication between the protocol stack and the target accelerator card to acquire the double-rate synchronous dynamic random access memory moved to the PCIE accelerator card.
  • the data receiving device 102 may be hardware or software.
  • the data receiving device 102 can be a host or a PCIE accelerator card installed on the host.
  • the host can include but is not limited to servers, smart phones, tablets, laptops, etc.
  • the data receiving device 102 is software, it can be installed in the host or PCIE accelerator card. It can be implemented as multiple software or software modules (for example, multiple software or software modules used to provide distributed services), or as a single software or software module. There are no specific limitations here.
  • the communication method provided by the embodiment of the present disclosure can be executed by the data sending device 101, and the communication device can be provided in the data sending device 101.
  • the communication method provided by the embodiment of the present disclosure can also be executed by the data receiving device 102, and the communication device can also be provided in the data receiving device 102.
  • the data sending device 101 is a host
  • the data receiving device 102 is usually a PCIE accelerator card. If the data sending device 101 is a PCIE accelerator card, at this time, the data receiving device 102 is usually a host.
  • the system architecture 100 may also include a data receiving accelerator card 103 .
  • the data reception accelerator card 103 is usually also installed on the host.
  • This communication method is usually applied to data sending equipment and includes the following steps:
  • Step 201 In response to determining that there is data to be sent, the target interface is called to Move the data to the target storage area.
  • the execution subject of the communication method can determine whether there is data to be sent.
  • the above-mentioned data to be sent is usually the data that the target application calls the socket (Socket) interface function to send to the protocol stack of the Transmission Control Protocol or the Internet Protocol (Transmission Control Protocol/Internet Protocol, TCP/IP).
  • the above-mentioned target application can be The application currently operated by the user. When the user uses the above target application, the target application will call the socket interface function to send data to the above protocol stack.
  • Socket is an intermediate software abstraction layer that communicates between the application layer and the TCP/IP protocol suite. It is a set of interfaces. In the design mode, Socket is actually a facade mode, which hides the complex TCP/IP protocol family behind the Socket interface. For users, a set of simple interfaces is all, allowing Socket to organize data to meet the specified requirements. protocol.
  • the execution subject can call the target interface to move the data to be sent to the target storage area.
  • the above-mentioned target storage area is usually a pre-allocated storage area on the double-rate synchronous dynamic random access memory (Double Data Rate, DDR) of the target accelerator card.
  • the above-mentioned target accelerator card is usually a high-speed serial computer expansion bus standard accelerator card.
  • PCIE accelerator cards are generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • the DDR in the PCIE accelerator card is used to store running code and data.
  • DDR can also be called DDR SDRAM (Synchronous Dynamic Random-Access Memory, synchronous dynamic random access memory), which is one type of memory. SDRAM transmits data once in one clock cycle, while DDR transmits data twice in one clock cycle, once on the rising edge and once on the falling edge. That is, one clock cycle can transmit 2 bits of data, so the data transfer rate of DDR is clock twice the frequency.
  • the above-mentioned target interface is used to implement communication between the above-mentioned protocol stack and the above-mentioned target accelerator card.
  • the above-mentioned target interface may also be called a PCIE-based network device sending interface, and is used to store the network data in the above-mentioned protocol stack into the PCIE accelerator card.
  • the above target interface needs to be registered with the TCP/IP protocol stack as a standard network device sending interface, and the bottom layer calls this interface to complete the sending and receiving of data.
  • Step 202 Call the target interface to send a notification to the data receiving device.
  • the above execution subject can call the above target interface to receive data
  • the device sends a notification, and the notification can be used to indicate that the data to be sent has been placed in the target storage area.
  • the above-mentioned data receiving device can obtain the target data moved to the target storage area.
  • the above-mentioned target interface can be called to parse the above-mentioned target data and submit the parsing result to the TCP/IP protocol stack.
  • TCP /IP protocol stack sends the parsing results to the above target application through the Socket interface function.
  • PCIE accelerator cards usually use virtual MAC addresses.
  • the virtual MAC address contains the ID information of the corresponding PCIE accelerator card, making it easy to quickly locate the specific PCIE accelerator card used when sending data.
  • the PCIE accelerator card can set the host as a gateway to achieve communication with external network devices.
  • the method provided by the above embodiments of the present disclosure responds to determining that there is data to be sent, calling the target interface to move the data to be sent to a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card, and then calling The above target interface sends a notification to the data receiving device indicating that the data to be sent has been placed in the target storage area.
  • PCIE-based IP network equipment can be implemented on the PCIE accelerator card
  • PCIE-based gateway equipment can be implemented on the host.
  • the host and all PCIE accelerator cards form an IP network to realize the connection between the host and the PCIE accelerator card. communication, which can effectively realize the operation and maintenance management, firmware upgrade, software debugging and other functions of the PCIE card.
  • the data sending device is usually a host
  • the target accelerator card is usually installed on the host
  • the data receiving device is usually the target accelerator card, that is, the host is implemented and the target accelerator card is installed on the host.
  • Communication between PCIE accelerator cards specifically, realizes the function of the host transmitting data to the PCIE accelerator card.
  • the above-mentioned execution subject can call the above-mentioned target interface to move the above-mentioned data to be sent to the target storage area in the following way: the above-mentioned execution subject (host) can call the above-mentioned target interface and use direct memory access (Direct Memory Access, DMA) to move the above-mentioned data to be sent. The data is moved to the target storage area.
  • direct memory access Direct Memory Access
  • the direct memory access method allows hardware devices of different speeds to communicate without relying on a large interrupt load of the CPU (Central Processing Unit, central processing unit). Otherwise, the CPU needs to copy each fragment's data from the source to the scratchpad, and then write them back again to the new location. During this time, the CPU is unavailable for other work.
  • CPU Central Processing Unit, central processing unit
  • the above-mentioned data sending device is usually the above-mentioned target accelerator card
  • the above-mentioned data receiving device is usually a host
  • the above-mentioned target accelerator card is usually set on the above-mentioned host, that is, the host and the PCIE acceleration set on the host are implemented. Communication between cards, specifically, realizes the function of the PCIE accelerator card transmitting data to the host.
  • the data sending device is usually the target accelerator card
  • the data receiving device is usually a host
  • the host is usually provided with the target accelerator card and other target accelerators other than the target accelerator card.
  • the above-mentioned target storage area is usually the storage area in the above-mentioned target accelerator card, that is, to realize communication between the host and multiple PCIE accelerator cards set on the host, specifically, to realize the PCIE accelerator card to transmit data to the host, and the host Then transfer the data to other PCIE accelerator cards.
  • the above execution subject before calling the above target interface to move the above data to be sent to the target storage area, can call the above target interface to obtain the buffer descriptor (Buffer Descriptor) from the above target accelerator card. BD).
  • the above buffer descriptor can be used to describe the state of the memory and the address of the memory in the double-rate synchronous dynamic random access memory DDR. The status of memory usually includes idle status and occupied status.
  • the execution subject can call the target interface and use the buffer descriptor to determine the target storage area. Specifically, the execution subject can determine the address of the memory in the idle state through the buffer descriptor, so that the memory in the idle state can be used as the target storage area to move the data to be sent to the memory in the idle state.
  • Figure 3 is a schematic diagram of the interaction between the host and the PCIE accelerator card in the communication method according to this embodiment.
  • the PCIE accelerator card contains the base address register storage space Bar mem and the double-rate synchronous dynamic random access memory DDR. Pre-allocate the storage area Buf of the data frame on the double-rate synchronous dynamic random access memory DDR of the PCIE accelerator card.
  • the base address register storage space Bar mem includes multiple buffer descriptors BD, which are used to describe the physical address of the corresponding memory and the state of the memory.
  • the host can access the base address register storage space Bar mem through PCIE base address register bar access, and obtain the physical address of the memory in the idle state from the buffer descriptor, so that it can access DMA through PCIE direct memory. Move data to idle memory.
  • a process 400 of yet another embodiment of a communication method is shown. This communication method is usually applied to data receiving equipment.
  • the process 400 of the communication method includes the following steps:
  • Step 401 In response to receiving the target notification, call the target interface to obtain the target data moved to the target storage area.
  • the execution subject of the communication method can determine whether the target notification is received.
  • the above target notification can be used to represent that the above target data has been placed in the target storage area.
  • the above-mentioned target storage area is usually a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the above-mentioned target accelerator card is usually a high-speed serial computer expansion bus standard accelerator card.
  • PCIE accelerator cards are generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • the DDR in the PCIE accelerator card is used to store running code and data.
  • DDR can also be called DDR SDRAM, which is one type of memory. SDRAM transmits data once in one clock cycle, while DDR transmits data twice in one clock cycle, once on the rising edge and once on the falling edge. That is, one clock cycle can transmit 2 bits of data, so the data transfer rate of DDR is clock twice the frequency.
  • the above execution subject can call the target interface to obtain the target data moved to the target storage area.
  • the above-mentioned target data is usually data that is moved to the target storage area after the data sending device determines that there is data to be sent.
  • the above-mentioned target interface is used to implement communication between the protocol stack of the transmission control protocol or the Internet protocol and the above-mentioned target accelerator card.
  • the above-mentioned target interface may also be called a PCIE-based network device sending interface, and is used to store the network data in the above-mentioned protocol stack into the PCIE accelerator card.
  • the above target interface needs to be registered with the TCP/IP protocol stack as a standard network device sending interface, and the bottom layer calls this interface to complete the sending and receiving of data.
  • Step 402 Call the target interface to parse the target data, and submit the parsing results to the protocol stack.
  • the above-mentioned execution subject can call the above-mentioned target interface to parse the above-mentioned target data, and submit the parsing results to the TCP/IP protocol stack.
  • the TCP/IP protocol stack can send the parsing results to the target application through the Socket interface function.
  • the above target application may be an application operated by the current user.
  • Socket is the communication between the application layer and the TCP/IP protocol suite.
  • An intermediate software abstraction layer which is a set of interfaces. In the design mode, Socket is actually a facade mode, which hides the complex TCP/IP protocol family behind the Socket interface. For users, a set of simple interfaces is all, allowing Socket to organize data to meet the specified requirements. protocol.
  • the method provided by the above embodiments of the present disclosure responds to receiving a notification indicating that the data to be sent has been placed in a pre-allocated storage area on the double rate synchronous dynamic random access memory of the PCIE accelerator card.
  • PCIE-based IP network equipment can be implemented on the PCIE accelerator card
  • PCIE-based gateway equipment can be implemented on the host.
  • the host and all PCIE accelerator cards form an IP network to realize the connection between the host and the PCIE accelerator card. communication, which can effectively realize the operation and maintenance management, firmware upgrade, software debugging and other functions of the PCIE card.
  • the above-mentioned data receiving device is usually the above-mentioned target accelerator card, and the above-mentioned target accelerator card is usually set on the host.
  • the above-mentioned target notification is sent by the above-mentioned host, that is, the host is implemented and the target accelerator card is set on the host. Communication between PCIE accelerator cards, specifically, realizes the function of the host transmitting data to the PCIE accelerator card.
  • the above-mentioned data receiving device is usually a host
  • the above-mentioned target accelerator card is usually set on the above-mentioned host
  • the above-mentioned target notification is sent by the above-mentioned target accelerator card, that is, the PCIE acceleration between the host and the host is implemented Communication between cards, specifically, realizes the function of the PCIE accelerator card transmitting data to the host.
  • the above-mentioned execution subject can call the target interface to obtain the target data moved to the target storage area in the following way: the above-mentioned execution subject (host) can call the target interface and use direct memory access to move the above-mentioned target data from the above-mentioned target storage area to the memory of the host. , after which the data moved to the above memory can be obtained.
  • the upper layer protocol stack can determine whether the destination address of the above target data is the address of the above host. If it is determined that the destination address of the above-mentioned target data is not the address of the above-mentioned host, the target accelerator card corresponding to the above-mentioned destination address can be found as the data receiving accelerator card.
  • the above data reception accelerator card usually Set in the above-mentioned host, the above-mentioned execution subject (ie the host) may be provided with multiple PCIE accelerator cards, and in addition to the above-mentioned target accelerator card, there are other accelerator cards.
  • the execution subject can call the target interface to move the target data from the memory in the host to the target storage area of the data receiving accelerator card using direct memory access. Afterwards, the execution subject may send a second notification to the data receiving accelerator card, and the second notification may be used to indicate that the target data has been placed in the target storage area of the data receiving accelerator card.
  • the above execution subject before calling the above target interface to use direct memory access to move the above target data from the above memory to the target storage area of the above data receiving accelerator card, can call the above target interface to move the above target data from the above mentioned data receiving accelerator card.
  • the buffer descriptor is obtained from the data reception accelerator card.
  • the buffer descriptor can be used to describe the state of the memory and the address of the memory in the double-rate synchronous dynamic random access memory DDR. Specifically, the buffer descriptor can be obtained from the base address register storage space. Then, the execution subject can use the buffer descriptor to determine the target storage area of the data receiving accelerator card.
  • the above-mentioned execution subject can determine the address of the memory in the idle state through the above-mentioned buffer descriptor, so that the memory in the idle state can be used as the target storage area of the above-mentioned data receiving accelerator card, so as to move the data to be sent to the idle state. status memory.
  • FIG. 5 a timing diagram of one embodiment of a communication system according to the present disclosure is shown.
  • the communication system of this embodiment includes: a data sending device and a data receiving device.
  • the data sending device is used to respond to determining that there is data to be sent, call the target interface to move the data to be sent to the target storage area, and send a target notification to the data receiving device, where the target storage area is the target accelerator card.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card.
  • the data to be sent is sent to the transmission control protocol or Internet protocol by calling the socket interface function of the target application.
  • the data in the protocol stack the target interface is used to implement communication between the protocol stack and the target accelerator card, the target notification is used to represent that the data to be sent has been placed in the target storage area; the data receiving device is used to respond to receiving the target notification , call the target interface to obtain the data to be sent that is moved to the target storage area, and process the data to be sent. Line parsing and submitting the parsing results to the protocol stack.
  • step 501 in response to determining that there is data to be sent, the data sending device calls the target interface to move the data to be sent to the target storage area.
  • the data sending device may determine whether there is data to be sent.
  • the above-mentioned data to be sent is usually the data sent to the TCP/IP protocol stack by the target application calling the socket interface function.
  • the above-mentioned target application can be the application operated by the current user.
  • the target application will call the socket interface function to send data to the above protocol stack.
  • Socket is an intermediate software abstraction layer that communicates between the application layer and the TCP/IP protocol suite. It is a set of interfaces. In the design mode, Socket is actually a facade mode, which hides the complex TCP/IP protocol family behind the Socket interface. For users, a set of simple interfaces is all, allowing Socket to organize data to meet the specified requirements. protocol.
  • the data sending device can call the target interface to move the data to be sent to the target storage area.
  • the above-mentioned target storage area is usually a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the above-mentioned target accelerator card is usually a high-speed serial computer expansion bus standard accelerator card.
  • PCIE accelerator cards are generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • the DDR in the PCIE accelerator card is used to store running code and data.
  • DDR can also be called DDR SDRAM, which is one type of memory. SDRAM transmits data once in one clock cycle, while DDR transmits data twice in one clock cycle, once on the rising edge and once on the falling edge. That is, one clock cycle can transmit 2 bits of data, so the data transfer rate of DDR is clock twice the frequency.
  • the above-mentioned target interface is used to implement communication between the above-mentioned protocol stack and the above-mentioned target accelerator card.
  • the above-mentioned target interface may also be called a PCIE-based network device sending interface, and is used to store the network data in the above-mentioned protocol stack into the PCIE accelerator card.
  • the above target interface needs to be registered with the TCP/IP protocol stack as a standard network device sending interface, and the bottom layer calls this interface to complete the sending and receiving of data.
  • step 502 the data sending device calls the target interface to send the target notification to the data receiving device.
  • the data sending device can call the above target interface to send a notification to the data receiving device.
  • the above notification can be used to indicate that the above data to be sent has been placed in the above target. in the target storage area.
  • step 503 in response to receiving the target notification, the data receiving device calls the target interface to obtain the data to be sent that is moved to the target storage area.
  • the data receiving device may determine whether the target notification is received. If the above target notification is received, the data receiving device can call the above target interface to obtain the target data moved to the target storage area.
  • the above-mentioned target data is usually data that is moved to the target storage area after the data sending device determines that there is data to be sent.
  • step 504 the data receiving device calls the target interface to parse the target data, and submits the parsing result to the protocol stack of the Transmission Control Protocol or the Internet Protocol.
  • the data receiving device can call the above target interface to parse the above target data, and submit the parsing results to the TCP/IP protocol stack.
  • the TCP/IP protocol stack can send the parsing results to the target application through the Socket interface function. .
  • PCIE accelerator cards usually use virtual MAC addresses.
  • the virtual MAC address contains the ID information of the corresponding PCIE accelerator card, making it easy to quickly locate the specific PCIE accelerator card used when sending data.
  • the PCIE accelerator card can set the host as a gateway to achieve communication with external network devices.
  • the data sending device in response to determining that there is data to be sent, calls the target interface to move the data to be sent to a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card; Afterwards, the data sending device calls the target interface to send a notification to the data receiving device indicating that the data to be sent has been placed in the target storage area; in response to receiving the above notification, the data receiving device calls the target interface to obtain the data moved to the above storage area.
  • the data to be sent, and the data to be sent are parsed, and the parsing results are submitted to the TCP/IP protocol stack.
  • PCIE-based IP network equipment can be implemented on the PCIE accelerator card
  • PCIE-based gateway equipment can be implemented on the host.
  • the host and all PCIE accelerator cards form an IP network to realize the connection between the host and the PCIE accelerator card. communication, which can effectively realize the operation and maintenance management, firmware upgrade, software debugging and other functions of the PCIE card.
  • the data sending device can call the above target interface to obtain the first buffer descriptor from the above target accelerator card.
  • the above first buffer descriptor can be used to describe the status of the memory in the double rate synchronous dynamic random access memory DDR and memory address. The status of memory usually includes idle status and occupied status.
  • the data sending device can use the first buffer descriptor to determine the target storage area. Specifically, the data sending device can determine the address of the memory in the idle state through the first buffer descriptor, so that the memory in the idle state can be used as the target storage area, so as to move the data to be sent to the memory in the idle state. in memory.
  • FIG. 6 a schematic diagram of a communication process of the communication system according to the present disclosure is shown.
  • the user uses the target application to call the socket function to send network data to the TCP/IP protocol stack.
  • the target interface PCIE-based network device
  • the data sending device host or PCIE accelerator card
  • the data receiving device can call the target interface to obtain the data moved to the PCIE accelerator card, parse the obtained data, and submit the parsed results to the TCP/IP protocol stack.
  • the TCP/IP protocol stack can Call the socket function to send the parsing results to the above target application.
  • FIG. 7 a timing diagram of another embodiment of a communication system according to the present disclosure is shown.
  • step 701 in response to determining that there is data to be sent, the host calls the target interface to move the data to be sent to the target storage area using direct memory access.
  • the host can determine whether there is data to be sent.
  • the above-mentioned data to be sent is usually the data sent to the TCP/IP protocol stack by the target application calling the socket interface function.
  • the above-mentioned target application can be the application operated by the current user.
  • the target application will call the socket interface function to send data to the above protocol stack.
  • Socket is an intermediate software abstraction layer that communicates between the application layer and the TCP/IP protocol suite. It is a set of interfaces. In the design mode, Socket is actually a facade mode, which hides the complex TCP/IP protocol family behind the Socket interface. For users, a set of simple interfaces is all, allowing Socket to organize data to meet the specified requirements. protocol.
  • the host can call the target interface to move the data to be sent to the target storage area using direct memory access.
  • the above target storage area A domain is typically a pre-allocated area of memory on the target accelerator card's double-rate synchronous dynamic random access memory.
  • the above-mentioned target accelerator card is usually installed on the above-mentioned host.
  • the above-mentioned target accelerator card is usually a high-speed serial computer expansion bus standard accelerator card.
  • PCIE accelerator cards are generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • the DDR in the PCIE accelerator card is used to store running code and data.
  • DDR can also be called DDR SDRAM, which is one type of memory. SDRAM transmits data once in one clock cycle, while DDR transmits data twice in one clock cycle, once on the rising edge and once on the falling edge. That is, one clock cycle can transmit 2 bits of data, so the data transfer rate of DDR is clock twice the frequency.
  • the direct memory access method allows hardware devices of different speeds to communicate without relying on the large interrupt load of the CPU (Central Processing Unit, central processing unit). Otherwise, the CPU needs to copy each fragment's data from the source to the scratchpad, and then write them back again to the new location. During this time, the CPU is unavailable for other work.
  • CPU Central Processing Unit, central processing unit
  • the above-mentioned target interface is used to implement communication between the above-mentioned protocol stack and the above-mentioned target accelerator card.
  • the above-mentioned target interface may also be called a PCIE-based network device sending interface, and is used to store the network data in the above-mentioned protocol stack into the PCIE accelerator card.
  • the above target interface needs to be registered with the TCP/IP protocol stack as a standard network device sending interface, and the bottom layer calls this interface to complete the sending and receiving of data.
  • step 702 the host calls the target interface to send a target notification to the target accelerator card.
  • the host can call the target interface to send a notification to the target accelerator card.
  • the notification can be used to indicate that the data to be sent has been placed in the target storage area of the target accelerator card.
  • the target accelerator card calls the target interface to obtain the data to be sent that is moved to the target storage area.
  • the target accelerator card may determine whether the target notification is received. If the above target notification is received, the target accelerator card can call the above target interface to obtain the data to be sent that is moved to the target storage area.
  • step 704 the target accelerator card calls the target interface to parse the data to be sent, and submits the parsing result to the protocol stack.
  • the target accelerator card can call the above-mentioned target interface to analyze the above-mentioned data to be sent, and submit the analysis results to the TCP/IP protocol stack.
  • the TCP/IP protocol stack can send the analysis results to the target through the Socket interface function. application.
  • PCIE accelerator cards usually use virtual MAC addresses.
  • the virtual MAC address contains the ID information of the corresponding PCIE accelerator card, making it easy to quickly locate the specific PCIE accelerator card used when sending data.
  • the PCIE accelerator card can set the host as a gateway to achieve communication with external network devices.
  • the system provided by the above embodiments of the present disclosure realizes communication between the host and the PCIE accelerator card installed on the host. Specifically, it realizes the function of the host transmitting data to the PCIE accelerator card.
  • FIG. 8 a timing diagram of yet another embodiment of a communication system according to the present disclosure is shown.
  • step 801 in response to determining that there is data to be sent, the target accelerator card calls the target interface to move the data to be sent to the target storage area.
  • the target accelerator card can determine whether there is data to be sent.
  • the above-mentioned data to be sent is usually the data sent to the TCP/IP protocol stack by the target application calling the socket interface function.
  • the above-mentioned target application can be the application operated by the current user. When the user uses the above target application, the target application will call the socket interface function to send data to the above protocol stack.
  • Socket is an intermediate software abstraction layer that communicates between the application layer and the TCP/IP protocol suite. It is a set of interfaces. In the design mode, Socket is actually a facade mode, which hides the complex TCP/IP protocol family behind the Socket interface. For users, a set of simple interfaces is all, allowing Socket to organize data to meet the specified requirements. protocol.
  • the target accelerator card can call the target interface to move the data to be sent to the target storage area.
  • the above-mentioned target storage area is usually a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the above-mentioned target accelerator card is usually a high-speed serial computer expansion bus standard accelerator card.
  • PCIE accelerator cards are generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • the DDR in the PCIE accelerator card is used to store running code and data.
  • DDR can also be called DDR SDRAM, which is one type of memory. SDRAM transmits data once in one clock cycle, while DDR transmits data twice in one clock cycle, on the rising edge and on the falling edge. Data is transmitted once on each edge, that is, 2 bits of data can be transmitted in one clock cycle, so the data transmission rate of DDR is twice the clock frequency.
  • the above-mentioned target interface is used to implement communication between the above-mentioned protocol stack and the above-mentioned target accelerator card.
  • the above-mentioned target interface may also be called a PCIE-based network device sending interface, and is used to store the network data in the above-mentioned protocol stack into the PCIE accelerator card.
  • the above target interface needs to be registered with the TCP/IP protocol stack as a standard network device sending interface, and the bottom layer calls this interface to complete the sending and receiving of data.
  • step 802 the target accelerator card calls the target interface to send a target notification to the host.
  • the target accelerator card can call the above-mentioned target interface to send a notification to the host, and the above-mentioned notification can be used to indicate that the above-mentioned data to be sent has been placed in the above-mentioned target storage area.
  • step 803 in response to receiving the target notification, the host calls the target interface to obtain the data to be sent that is moved to the target storage area.
  • the host may determine whether a target notification is received. If the above target notification is received, the host can call the above target interface to obtain the data to be sent that is moved to the target storage area.
  • step 804 the host calls the target interface to parse the data to be sent, and submits the parsing result to the protocol stack.
  • the host can call the target interface to parse the data to be sent, and submit the parsing results to the TCP/IP protocol stack.
  • the TCP/IP protocol stack can send the parsing results to the target application through the Socket interface function.
  • PCIE accelerator cards usually use virtual MAC addresses.
  • the virtual MAC address contains the ID information of the corresponding PCIE accelerator card, making it easy to quickly locate the specific PCIE accelerator card used when sending data.
  • the PCIE accelerator card can set the host as a gateway to achieve communication with external network devices.
  • the system provided by the above embodiments of the present disclosure realizes communication between the host and the PCIE accelerator card installed on the host. Specifically, it realizes the function of the PCIE accelerator card transmitting data to the host.
  • FIG. 9 a timing diagram of yet another embodiment of a communication system according to the present disclosure is shown.
  • step 901 in response to determining that there is data to be sent, the target accelerator card calls the target interface to move the data to be sent to the target storage area.
  • the target accelerator card can determine whether there is data to be sent.
  • the above-mentioned data to be sent is usually the data sent to the TCP/IP protocol stack by the target application calling the socket interface function.
  • the above-mentioned target application can be the application operated by the current user. When the user uses the above target application, the target application will call the socket interface function to send data to the above protocol stack.
  • Socket is an intermediate software abstraction layer that communicates between the application layer and the TCP/IP protocol suite. It is a set of interfaces. In the design mode, Socket is actually a facade mode, which hides the complex TCP/IP protocol family behind the Socket interface. For users, a set of simple interfaces is all, allowing Socket to organize data to meet the specified requirements. protocol.
  • the target accelerator card can call the target interface to move the data to be sent to the target storage area.
  • the above-mentioned target storage area is usually a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the above-mentioned target accelerator card is usually a high-speed serial computer expansion bus standard accelerator card.
  • PCIE accelerator cards are generally used to hardware accelerate specific processing processes to improve system processing capabilities.
  • the DDR in the PCIE accelerator card is used to store running code and data.
  • DDR can also be called DDR SDRAM, which is one type of memory. SDRAM transmits data once in one clock cycle, while DDR transmits data twice in one clock cycle, once on the rising edge and once on the falling edge. That is, one clock cycle can transmit 2 bits of data, so the data transfer rate of DDR is clock twice the frequency.
  • the above-mentioned target interface is used to implement communication between the above-mentioned protocol stack and the above-mentioned target accelerator card.
  • the above-mentioned target interface may also be called a PCIE-based network device sending interface, and is used to store the network data in the above-mentioned protocol stack into the PCIE accelerator card.
  • the above target interface needs to be registered with the TCP/IP protocol stack as a standard network device sending interface, and the bottom layer calls this interface to complete the sending and receiving of data.
  • step 902 the target accelerator card calls the target interface to send a target notification to the host.
  • the target accelerator card can call the target interface to send a target notification to the host.
  • the target notification can be used to indicate that the data to be sent has been placed in the target storage area of the target accelerator card.
  • step 903 in response to receiving the target notification, the host calls the target interface using The direct memory access method moves the data to be sent from the target storage area to the memory and obtains the data moved to the memory.
  • the host may determine whether a target notification is received. If the above target notification is received, the host can call the above target interface and use direct memory access to move the above target data from the target storage area of the target accelerator card to the host's memory, and then obtain the data moved into the above memory.
  • step 904 the host parses the data moved into the memory and submits the parsing results to the protocol stack.
  • the host calls the above target interface to parse the data moved into the memory, and submits the parsing results to the TCP/IP protocol stack.
  • step 905 in response to using the protocol stack to parse out that the destination address of the data to be sent is not the address of the host, the host searches for the target accelerator card corresponding to the destination address as the data receiving accelerator card.
  • the host can use the TCP/IP protocol stack to parse the destination address of the data moved to the memory (ie, the data to be sent), and determine whether the destination address of the data moved to the memory is the host. the address of.
  • the host searches for the target accelerator card corresponding to the destination address as the data receiving accelerator card.
  • the above-mentioned data receiving accelerator card is usually installed in the host, and multiple PCIE accelerator cards can be installed on the host.
  • step 906 the host calls the target interface and uses direct memory access to move the data to be sent from the memory to the target storage area of the data receiving accelerator card.
  • the host can call the target interface and use direct memory access to move the data to be sent from the memory of the host to the target storage area of the data reception accelerator card.
  • step 907 the host calls the target interface to send a second notification to the data reception accelerator card.
  • the host can call the above-mentioned target interface to send a second notification to the data reception accelerator card.
  • the above-mentioned second notification can be used to indicate that the above-mentioned data to be sent has been placed in the target storage area of the data reception accelerator card.
  • step 908 in response to receiving the second notification, the data reception accelerator card calls a corresponding interface to obtain the data to be sent that is moved to the target storage area of the data reception accelerator card.
  • the data reception accelerator card may determine whether the second notification is received. If the second notification is received, the data receiving accelerator card can call its corresponding interface to obtain the data to be sent that is moved to the target storage area of the data receiving accelerator card.
  • each PCIE accelerator card corresponds to an interface (which can also be called a PCIE-based network device) for realizing communication between the TCP/IP protocol stack and the PCIE accelerator card.
  • step 909 the data receiving accelerator card calls the corresponding interface to parse the data to be sent, and submits the parsing result to the protocol stack.
  • the data reception accelerator card can call the corresponding interface to parse the above-mentioned data to be sent, and submit the parsing results to the TCP/IP protocol stack.
  • the TCP/IP protocol stack can send the parsing results to the TCP/IP protocol stack through the Socket interface function. target application.
  • the system provided by the above embodiments of the present disclosure realizes communication between the host and multiple PCIE accelerator cards installed on the host. Specifically, the system realizes the PCIE accelerator cards transmitting data to the host, and the host then transmits the data to other PCIE Accelerator card function.
  • the host can call the above target interface to obtain the second buffer descriptor from the data reception accelerator card.
  • the above second buffer descriptor can be used to describe the memory in the double rate synchronous dynamic random access memory DDR. status and memory address.
  • the host can call the above target interface to obtain the second buffer descriptor from the base address register storage space.
  • the host can use the second buffer descriptor to determine the target storage area of the data receiving accelerator card.
  • the host can determine the address of the memory in the idle state through the second buffer descriptor, so that the memory in the idle state can be used as the target storage area of the data receiving accelerator card, so as to move the data to be sent to the idle state. status memory.
  • this application provides an embodiment of a communication device.
  • the device embodiment corresponds to the method embodiment shown in Figure 2.
  • the device can be specifically applied in various data sending devices.
  • the communication device 1000 of this embodiment includes: a mobile unit 1001 and sending unit 1002.
  • the moving unit 1001 is used to respond to determining that there is data to be sent, calling the target interface to move the data to be sent to a target storage area, where the target storage area is pre-allocated on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card
  • the data to be sent is the data that the target application calls the socket interface function to send to the protocol stack of the Transmission Control Protocol or the Internet Protocol
  • the target interface is used for Implement communication between the protocol stack and the target accelerator card
  • the sending unit 1002 is used to call the target interface to send a notification to the data receiving device, where the notification is used to indicate that the data to be sent has been placed in the target storage area.
  • the specific processing of the mobile unit 1001 and the sending unit 1002 of the communication device 1000 may refer to step 201 and step 202 in the corresponding embodiment of FIG. 2 .
  • the data sending device is the host
  • the target accelerator card is set on the host
  • the data receiving device is the target accelerator card
  • the mobile unit 1001 is used to call the target interface in the following manner to move the data to be sent to the target.
  • call the target interface to move the data to be sent to the target storage area using direct memory access.
  • the data sending device is a target accelerator card
  • the data receiving device is a host
  • the target accelerator card is set on the host.
  • the data sending device is the target accelerator card
  • the data receiving device is the host
  • the host is equipped with the target accelerator card and other target accelerator cards besides the target accelerator card
  • the target storage area is the target accelerator card. storage area in the.
  • the communication device 1000 further includes a determining unit (not shown in the figure).
  • the determination unit is used to call the target interface to obtain the buffer descriptor from the target accelerator card, and use the buffer descriptor to determine the target storage area, where the buffer descriptor is used to describe the state of the memory in the double-rate synchronous dynamic random access memory and memory address.
  • the present application provides another embodiment of a communication device.
  • the device embodiment corresponds to the method embodiment shown in Figure 3.
  • the device can specifically Used in various data receiving equipment.
  • the communication device 1100 of this embodiment includes: an acquisition unit 1101 and a submission unit 1102.
  • the obtaining unit 1101 is used to respond to receiving the target notification, Call the target interface to obtain the target data moved to the target storage area.
  • the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target notification is used to indicate that the target data has been placed in the target storage.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card, and the target interface is used to implement communication between the protocol stack of the transmission control protocol or the Internet protocol and the target accelerator card; the submission unit 1102 is used to call the target interface pair.
  • the target data is parsed and the parsing results are submitted to the protocol stack.
  • the specific processing of the acquisition unit 1101 and the submission unit 1102 of the communication device 1100 may refer to step 301 and step 302 in the corresponding embodiment of FIG. 3 .
  • the data receiving device is a target accelerator card
  • the target accelerator card is set on the host
  • the target notification is sent by the host.
  • the data receiving device is the host, the target accelerator card is set on the host, and the target notification is sent by the target accelerator card; and the acquisition unit 1101 is further used to call the target interface to obtain the move to the target storage in the following manner Target data in the area: Call the target interface and use direct memory access to move the target data from the target storage area to the memory, and obtain the data moved to the memory.
  • the communication device 1100 further includes: a search unit (not shown in the figure), a mobile unit (not shown in the figure), and a sending unit (not shown in the figure).
  • the search unit is used to respond to using the protocol stack to determine that the destination address of the target data is not the address of the host, and search for the target accelerator card corresponding to the destination address as the data reception accelerator card, wherein the data reception accelerator card is set in the host;
  • the mobile unit is used to The target interface is called to move the target data from the memory to the target storage area of the data receiving accelerator card using direct memory access;
  • the sending unit is used to send a second notification to the data receiving accelerator card, where the second notification is used to represent that the target data has been Put it into the target storage area of the data receiving accelerator card.
  • the communication device 1100 further includes: a determining unit (not shown in the figure).
  • the determination unit is used to call the target interface to obtain the buffer descriptor from the data reception accelerator card, and use the buffer descriptor to determine the target storage area of the data reception accelerator card, where the buffer descriptor is used to describe the double-rate synchronous dynamic random The state of the memory in the memory and the address of the memory.
  • FIG. 12 illustrates an electronic device suitable for implementing embodiments of the present disclosure.
  • a schematic structural diagram of a device such as the data sending device or data receiving device in Figure 1200.
  • the electronic device shown in FIG. 12 is only an example and should not bring any limitations to the functions and scope of use of the embodiments of the present disclosure.
  • the electronic device 1200 may include a processing device (eg, central processing unit, graphics processor, etc.) 1201, which may be loaded into a random access device according to a program stored in a read-only memory (ROM) 1202 or from a storage device 1208.
  • the program in the memory (RAM) 1203 executes various appropriate actions and processes.
  • various programs and data required for the operation of the electronic device 1200 are also stored.
  • the processing device 1201, ROM 1202 and RAM 1203 are connected to each other via a bus 1204.
  • An input/output (I/O) interface 1205 is also connected to bus 1204.
  • the following devices may be connected to the I/O interface 1205: input devices 1206 including, for example, a touch screen, touch pad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; including, for example, a liquid crystal display (LCD), speakers, vibration An output device 1207 such as a computer; a storage device 1208 including a magnetic tape, a hard disk, etc.; and a communication device 1209.
  • the communication device 1209 may allow the electronic device 1200 to communicate wirelessly or wiredly with other devices to exchange data.
  • FIG. 12 illustrates electronic device 1200 with various means, it should be understood that implementation or availability of all illustrated means is not required. More or fewer means may alternatively be implemented or provided. Each block shown in Figure 12 may represent one device, or may represent multiple devices as needed.
  • embodiments of the present disclosure include a computer program product including a computer program carried on a computer-readable medium, the computer program containing program code for performing the method illustrated in the flowchart.
  • the computer program may be downloaded and installed from the network via communication device 1209, or from storage device 1208, or from ROM 1202.
  • the computer program is executed by the processing device 1201
  • the above-described functions defined in the method of the embodiment of the present disclosure are performed.
  • the computer-readable medium described in the embodiments of the present disclosure may be a computer-readable signal medium or a computer-readable storage medium, or any combination of the above two.
  • the computer-readable storage medium may be, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus or device, or any combination thereof. More specific examples of computer readable storage media may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard drive, random access memory (RAM), read only memory (ROM), removable Programmd read-only memory (EPROM or flash memory), fiber optics, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.
  • a computer-readable storage medium may be any tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device.
  • the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, in which computer-readable program code is carried. Such propagated data signals may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above.
  • a computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device .
  • Program code embodied on a computer-readable medium may be transmitted using any suitable medium, including but not limited to: wire, optical cable, RF (radio frequency), etc., or any suitable combination of the above.
  • the above-mentioned computer-readable medium may be included in the above-mentioned data transmission device; it may also exist independently without being assembled into the data transmission device.
  • the computer-readable medium carries one or more programs.
  • the data sending device in response to determining that there is data to be sent, calls the target interface to transfer the data to be sent. Move to the target storage area, where the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card, and the data to be sent is the target
  • the application calls the socket interface function to send data to the protocol stack of the Transmission Control Protocol or Internet Protocol.
  • the target interface is used to implement communication between the protocol stack and the target accelerator card; the target interface is called to send a notification to the data receiving device, where , the notification is used to indicate that the data to be sent has been placed in the target storage area.
  • the above-mentioned computer-readable medium may also be included in the above-mentioned data receiving device; it may also exist separately without being assembled into the data receiving device.
  • the above-mentioned computer-readable medium carries one or more programs. When the above-mentioned one or more programs are received by the data
  • the data receiving device in response to receiving the target notification, calls the target interface to obtain the target data moved to the target storage area, where the target storage area is preset on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the allocated storage area, the target notification is used to indicate that the target data has been placed in the target storage area
  • the target accelerator card is a high-speed serial computer expansion bus standard accelerator card
  • the target interface is used to implement the protocol stack of the transmission control protocol or the Internet Internet Protocol. Communication between target accelerator cards; calling the target interface to parse the target data and submitting the parsed results to the protocol stack.
  • Computer program code for performing operations of embodiments of the present disclosure may be written in one or more programming languages, including object-oriented programming languages—such as Java, Smalltalk, C++, or a combination thereof, Also included are conventional procedural programming languages—such as the "C" language or similar programming languages.
  • the program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server.
  • the remote computer can be connected to the user's computer through any kind of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (such as an Internet service provider). connected via the Internet).
  • LAN local area network
  • WAN wide area network
  • Internet service provider such as an Internet service provider
  • each block in the flowchart or block diagram may represent a module, segment, or portion of code that contains one or more logic functions that implement the specified executable instructions.
  • the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown one after another may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the functionality involved.
  • each block of the block diagram and/or flowchart illustration, and combinations of blocks in the block diagram and/or flowchart illustration can be implemented by special purpose hardware-based systems that perform the specified functions or operations. , or can be implemented using a combination of specialized hardware and computer instructions.
  • a communication method applied to a data sending device, the method includes: in response to determining that there is data to be sent, calling the target
  • the standard interface moves the data to be sent to the target storage area, where the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card, and the target accelerator card is a high-speed serial computer expansion bus standard accelerator card
  • the data to be sent is the data that the target application calls the socket interface function to send to the protocol stack of the Transmission Control Protocol or the Internet Protocol.
  • the target interface is used to implement communication between the protocol stack and the target accelerator card; the target interface is called to send the data to the protocol stack.
  • the receiving device sends a notification, where the notification is used to represent that the data to be sent has been placed in the target storage area.
  • the data sending device is a host
  • the target accelerator card is set on the host
  • the data receiving device is the target accelerator card
  • the target interface is called to move the data to be sent to the target storage area, including:
  • the target interface is called to move the data to be sent to the target storage area using direct memory access.
  • the data sending device is a target accelerator card
  • the data receiving device is a host
  • the target accelerator card is provided on the host.
  • the data sending device is a target accelerator card
  • the data receiving device is a host
  • the host is provided with the target accelerator card and other target accelerator cards except the target accelerator card
  • the target storage area is the target accelerator card. Storage area in the accelerator card.
  • the method before calling the target interface to move the data to be sent to the target storage area, includes: calling the target interface to obtain a buffer descriptor from the target accelerator card, using the buffer descriptor , determine the target storage area, where the buffer descriptor is used to describe the state of the memory and the address of the memory in the double-rate synchronous dynamic random access memory.
  • a communication method is provided, which is applied to a data receiving device.
  • the method includes: in response to receiving a target notification, calling a target interface to obtain target data moved to a target storage area, wherein , the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card.
  • the target notification is used to indicate that the target data has been placed in the target storage area.
  • the target accelerator card is a high-speed serial computer expansion bus standard acceleration. Card, the target interface is used to implement communication between the protocol stack of the transmission control protocol or Internet protocol and the target accelerator card; the target interface is called to parse the target data, and the parsed results are submitted to the protocol stack.
  • the data receiving device is a target accelerator card
  • the target accelerator card is set on the host, and the target notification is sent by the host.
  • the data receiving device is a host
  • the target accelerator card is set on the host
  • the target notification is sent by the target accelerator card
  • the target interface is called to obtain the target data moved to the target storage area, including : Call the target interface to move the target data from the target storage area to the memory using direct memory access, and obtain the data moved to the memory.
  • the method further includes: responding to using the protocol stack to determine that the destination address of the target data is not the host Address, find the target accelerator card corresponding to the destination address as the data receiving accelerator card, where the data receiving accelerator card is set in the host; call the target interface and use direct memory access to move the target data from the memory to the target storage of the data receiving accelerator card area; sending a second notification to the data receiving accelerator card, where the second notification is used to represent that the target data has been placed in the target storage area of the data receiving accelerator card.
  • the method before calling the target interface to move the target data from the memory to the target storage area of the data reception accelerator card using a direct memory access method, includes: calling the target interface to obtain data from the data reception accelerator card. Obtain the buffer descriptor in and use the buffer descriptor to determine the target storage area of the data receiving accelerator card. The buffer descriptor is used to describe the state of the memory and the address of the memory in the double-rate synchronous dynamic random access memory.
  • a communication system includes: a data sending device, configured to call a target interface to move the data to be sent to a target storage area in response to determining that there is data to be sent. , and send a target notification to the data receiving device, where the target storage area is a pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card, and the target accelerator card is a high-speed serial computer expansion bus standard accelerator card to be sent.
  • the data is the data that the target application calls the socket interface function to send to the protocol stack of the Transmission Control Protocol or the Internet Protocol.
  • the target interface is used to implement communication between the protocol stack and the target accelerator card.
  • the target notification is used to characterize the data to be sent.
  • the data receiving device is used to respond to receiving the target notification, call the target interface to obtain the data to be sent that is moved to the target storage area, and the data to be sent
  • the data is parsed and the parsing results are submitted to the protocol stack.
  • the data sending device is a host, the target accelerator card is set on the host, the data receiving device is the target accelerator card; and the data sending device is used to call the target interface and use direct memory access to transfer the data to be processed.
  • Send data is moved to the target storage area; or the data sending device is the target accelerator card, the data receiving device is the host, and the target accelerator card is set on the host; or the data sending device is the target accelerator card, the data receiving device is the host, and the target accelerator card is set on the host
  • the data sending device is configured to call the target interface to obtain the first buffer descriptor from the target accelerator card, and use the first buffer descriptor to determine the target storage area, wherein the first The buffer descriptor is used to describe the state of the memory and the address of the memory in the double-rate synchronous dynamic random access memory.
  • the data sending device is a target accelerator card
  • the data receiving device is a host
  • the target accelerator card is set on the host
  • the data receiving device is used to call the target interface and use direct memory access to transfer the data to be processed. Send the data to move from the target storage area to the memory, and get the data moved to the memory.
  • the data receiving device is configured to use the protocol stack to parse out that the destination address of the data to be sent is not the address of the host, search for the target accelerator card corresponding to the destination address as the data receiving accelerator card, and call
  • the target interface uses direct memory access to move the data to be sent from the memory to the target storage area of the data receiving accelerator card, and sends a second notification to the data receiving accelerator card, where the second notification is used to represent that the data to be sent has been placed in the data.
  • the data receiving accelerator card is set in the host.
  • the data receiving device is configured to call a target interface to obtain a second buffer descriptor from the data receiving accelerator card, and use the second buffer descriptor to determine the target storage of the data receiving accelerator card. area, where the second buffer descriptor is used to describe the state of the memory and the address of the memory in the double-rate synchronous dynamic random access memory.
  • a communication device which is provided in a data sending device.
  • the device includes: a mobile unit, configured to respond to determining that there is a data transmission device waiting to be sent.
  • Send data call the target interface to move the data to be sent to the target storage area, where the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card, and the target accelerator card is a high-speed serial computer extension Bus standard accelerator card
  • the data to be sent is the data that the target application calls the socket interface function to send to the protocol stack of the transmission control protocol or the Internet protocol.
  • the target interface is used to implement communication between the protocol stack and the target accelerator card; send
  • the unit is used to call the target interface to send a notification to the data receiving device, where the notification is used to indicate that the data to be sent has been placed in the target storage area.
  • the data sending device is a host
  • the target accelerator card is set on the host
  • the data receiving device is the target accelerator card
  • the mobile unit is further configured to call the target interface in the following manner to move the data to be sent To the target storage area: Call the target interface and use direct memory access to move the data to be sent to the target storage area.
  • the data sending device is a target accelerator card
  • the data receiving device is a host
  • the target accelerator card is provided on the host.
  • the data sending device is a target accelerator card
  • the data receiving device is a host
  • the host is provided with the target accelerator card and other target accelerator cards except the target accelerator card
  • the target storage area is the target accelerator card. Storage area in the accelerator card.
  • the device includes: a determining unit.
  • the determination unit is used to call the target interface to obtain the buffer descriptor from the target accelerator card, and use the buffer descriptor to determine the target storage area, where the buffer descriptor is used to describe the state of the memory in the double-rate synchronous dynamic random access memory and memory address.
  • a communication device which is provided in a data receiving device.
  • the device includes: an acquisition unit, configured to, in response to receiving a target notification, call a target interface to obtain the movement into the target storage area.
  • the target data where the target storage area is the pre-allocated storage area on the double-rate synchronous dynamic random access memory of the target accelerator card, the target notification is used to represent that the target data has been placed in the target storage area, and the target accelerator card is a high-speed serial Computer expansion bus standard accelerator card, the target interface is used to implement communication between the protocol stack of the transmission control protocol or Internet protocol and the target accelerator card; the submission unit is used to call the target interface to analyze the target data and submit the analysis results to the protocol stack.
  • the data receiving device is a target accelerator card
  • the target accelerator card is set on the host
  • the target notification is sent by the host.
  • the data receiving device is a host
  • the target accelerator card is set on the host
  • the target notification is sent by the target accelerator card
  • the acquisition unit is further configured to call the target interface to obtain the movement to the target in the following manner Target data in the storage area: Call the target interface and use direct memory access to move the target data from the target storage area to the memory, and obtain the data moved to the memory.
  • the device further includes: a search unit, a moving unit and a sending unit.
  • the search unit is used to respond to using the protocol stack to determine that the destination address of the target data is not the address of the host, and search for the target accelerator card corresponding to the destination address as the data reception accelerator card, wherein the data reception accelerator card is set in the host;
  • the mobile unit is used to The target interface is called to move the target data from the memory to the target storage area of the data receiving accelerator card using direct memory access;
  • the sending unit is used to send a second notification to the data receiving accelerator card, where the second notification is used to represent that the target data has been Put it into the target storage area of the data receiving accelerator card.
  • the device further includes: a determining unit.
  • the determination unit is used to call the target interface to obtain the buffer descriptor from the data reception accelerator card, and use the buffer descriptor to determine the target storage area of the data reception accelerator card, where the buffer descriptor is used to describe the double-rate synchronous dynamic random The state of the memory in the memory and the address of the memory.
  • the units involved in the embodiments of the present disclosure may be implemented in software or hardware.
  • the described unit can also be provided in a processor.
  • a processor includes a moving unit and a sending unit, or it can be described as: a processor includes an acquisition unit and a submitting unit.
  • the names of these units do not constitute a limitation on the unit itself under certain circumstances.
  • the sending unit can also be described as "a unit that calls the target interface to send notifications to the data receiving device."

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Abstract

本申请实施例公开了通信方法、系统、装置和电子设备。该方法的一具体实施方式包括：响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。该实施方式可以将主机和所有的PCIE加速卡组成了一个IP网络，实现了主机与PCIE加速卡之间的通信。

Description

通信方法、系统、装置和电子设备
相关申请的交叉引用
本申请要求于2022年5月24日提交的，申请号为202210578236.8、发明名称为“通信方法、系统、装置和电子设备”的中国专利申请的优先权，该申请的全文通过引用结合在本申请中。
技术领域
本公开实施例涉及计算机技术领域，具体涉及通信方法、系统、装置和电子设备。
背景技术
PCIE(Peripheral Component Interconnect Express，高速串行计算机扩展总线标准)加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。通常一个主机上会设置有多张PCIE加速卡，主机和PCIE加速卡之间，以及PCIE加速卡和PCIE加速卡之间存在通信的需求，通常是通过ring buffer(环形缓冲区)方式来进行主机与PCIE加速卡之间的通信。
发明内容
提供该公开内容部分以便以简要的形式介绍构思，这些构思将在后面的具体实施方式部分被详细描述。该公开内容部分并不旨在标识要求保护的技术方案的关键特征或必要特征，也不旨在用于限制所要求的保护的技术方案的范围。
第一方面，本公开实施例提供了一种通信方法，应用于数据发送设备，包括：响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速 串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。
第二方面，本公开实施例提供了一种通信方法，应用于数据接收设备，包括：响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标通知用于表征目标数据已放入目标存储区域中，目标加速卡为高速串行计算机扩展总线标准加速卡，目标接口用于实现传输控制协议或因特网互联协议的协议栈与目标加速卡之间的通信；调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
第三方面，本公开实施例提供了一种通信系统，包括：数据发送设备，用于响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，以及向数据接收设备发送目标通知，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信，目标通知用于表征待发送数据已放入目标存储区域中；数据接收设备，用于响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的待发送数据，以及对待发送数据进行解析，并将解析结果提交给协议栈。
第四方面，本公开实施例提供了一种通信装置，设置于数据发送设备，包括：移动单元，用于响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协 议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；发送单元，用于调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。
第五方面，本公开实施例提供了一种通信装置，设置于数据接收设备，包括：获取单元，用于响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标通知用于表征目标数据已放入目标存储区域中，目标加速卡为高速串行计算机扩展总线标准加速卡，目标接口用于实现传输控制协议或因特网互联协议的协议栈与目标加速卡之间的通信；提交单元，用于调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
第六方面，本公开实施例提供了一种电子设备，包括：至少一个处理器；存储装置，用于存储至少一个程序，当至少一个程序被至少一个处理器执行，使得至少一个处理器实现如第一方面或第二方面的通信方法。
第七方面，本公开实施例提供了一种计算机可读介质，其上存储有计算机程序，该程序被处理器执行时实现如第一方面或第二方面的通信方法的步骤。
本公开实施例提供的通信方法、系统、装置和电子设备，通过响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域中，之后，调用上述目标接口向数据接收设备发送用于表征待发送数据已放入目标存储区域中的通知。通过这种方式可以在PCIE加速卡上实现基于PCIE的IP网络设备，在主机上实现基于PCIE的网关设备，最终主机和所有的PCIE加速卡组成了一个IP网络，实现主机与PCIE加速卡之间的通信。
附图说明
结合附图并参考以下具体实施方式，本公开各实施例的上述和其他特征、优点及方面将变得更加明显。贯穿附图中，相同或相似的附 图标记表示相同或相似的元素。应当理解附图是示意性的，原件和元素不一定按照比例绘制。
图1是本公开的各个实施例可以应用于其中的示例性系统架构图；
图2是根据本公开的通信方法的一个实施例的流程图；
图3是根据本公开的通信方法中主机与PCIE加速卡进行交互的一个示意图；
图4是根据本公开的通信方法的又一个实施例的流程图；
图5是根据本公开的通信系统的一个实施例的时序图；
图6是根据本公开的通信系统的一个通信流程的示意图；
图7是根据本公开的通信系统的另一个实施例的时序图；
图8是根据本公开的通信系统的又一个实施例的时序图；
图9是根据本公开的通信系统的再一个实施例的时序图；
图10是根据本公开的通信装置的一个实施例的结构示意图；
图11是根据本公开的通信装置的又一个实施例的结构示意图；
图12是适于用来实现本公开实施例的电子设备的计算机系统的结构示意图。
具体实施方式
下面将参照附图更详细地描述本公开的实施例。虽然附图中显示了本公开的某些实施例，然而应当理解的是，本公开可以通过各种形式来实现，而且不应该被解释为限于这里阐述的实施例，相反提供这些实施例是为了更加透彻和完整地理解本公开。应当理解的是，本公开的附图及实施例仅用于示例性作用，并非用于限制本公开的保护范围。
应当理解，本公开的方法实施方式中记载的各个步骤可以按照不同的顺序执行，和/或并行执行。此外，方法实施方式可以包括附加的步骤和/或省略执行示出的步骤。本公开的范围在此方面不受限制。
本文使用的术语“包括”及其变形是开放性包括，即“包括但不限于”。术语“基于”是“至少部分地基于”。术语“一个实施例”表示“至少一 个实施例”；术语“另一实施例”表示“至少一个另外的实施例”；术语“一些实施例”表示“至少一些实施例”。其他术语的相关定义将在下文描述中给出。
需要注意，本公开中提及的“第一”、“第二”等概念仅用于对不同的装置、模块或单元进行区分，并非用于限定这些装置、模块或单元所执行的功能的顺序或者相互依存关系。
需要注意，本公开中提及的“一个”、“多个”的修饰是示意性而非限制性的，本领域技术人员应当理解，除非在上下文另有明确指出，否则应该理解为“一个或多个”。
本公开实施方式中的多个装置之间所交互的消息或者信息的名称仅用于说明性的目的，而并不是用于对这些消息或信息的范围进行限制。
图1示出了可以应用本公开的通信方法的实施例的示例性系统架构100。
如图1所示，系统架构100可以包括数据发送设备101和数据接收设备102。数据发送设备101和数据接收设备102之间通常是高速串行计算机扩展总线实现通信。
数据发送设备101可以与数据接收设备102交互，以发送或接收消息等，例如，数据发送设备101可以向数据接收设备102发送通知。
数据发送设备101可以是硬件，也可以是软件。当数据发送设备101为硬件时，可以是主机或者设置于主机上的PCIE加速卡，主机可以包括但不限于智能手机、平板电脑、膝上型便携计算机等。当数据发送设备101为软件时，可以安装在主机或者PCIE加速卡中。其可以实现成多个软件或软件模块(例如用来提供分布式服务的多个软件或软件模块)，也可以实现成单个软件或软件模块。在此不做具体限定。
数据发送设备101响应于确定出存在待发送数据，可以调用用于实现协议栈与目标加速卡之间的通信的目标接口将上述待发送数据移动到PCIE加速卡的双倍速率同步动态随机存储器上预分配的存储区域中；之后，可以调用上述目标接口向数据接收设备102发送用于表征上述待发送数据已放入上述目标存储区域中的通知。
数据接收设备102响应于接收到数据发送设备101发送的目标通知，可以调用用于实现协议栈与目标加速卡之间的通信的目标接口获取移动到PCIE加速卡的双倍速率同步动态随机存储器上预分配的存储区域中的目标数据；之后，可以调用上述目标接口对上述目标数据进行解析，并将解析结果提交给传输控制协议或因特网互联协议的协议栈。
需要说明的是，数据接收设备102可以是硬件，也可以是软件。当数据接收设备102为硬件时，可以是主机或者设置于主机上的PCIE加速卡，主机可以包括但不限于服务器、智能手机、平板电脑、膝上型便携计算机等。当数据接收设备102为软件时，可以安装在主机或者PCIE加速卡中。其可以实现成多个软件或软件模块(例如用来提供分布式服务的多个软件或软件模块)，也可以实现成单个软件或软件模块。在此不做具体限定。
还需要说明的是，本公开实施例所提供的通信方法可以由数据发送设备101执行，则通信装置可以设置于数据发送设备101中。本公开实施例所提供的通信方法还可以由数据接收设备102执行，则通信装置还可以设置于数据接收设备102中。
在这里，若数据发送设备101为主机，此时，数据接收设备102通常为PCIE加速卡。若数据发送设备101为PCIE加速卡，此时，数据接收设备102通常为主机。
还需要说明的是，若数据发送设备101为PCIE加速卡，数据接收设备102为主机，此时，系统架构100还可以包括数据接收加速卡103。数据接收加速卡103通常也是设置于主机上。
应该理解，图1中的数据发送设备、数据接收设备和数据接收加速卡的数目仅仅是示意性的。根据实现需要，可以具有任意数目的数据发送设备、数据接收设备和数据接收加速卡。
继续参考图2，示出了根据本公开的通信方法的一个实施例的流程200。该通信方法通常应用于数据发送设备，该通信方法包括以下步骤：
步骤201，响应于确定出存在待发送数据，调用目标接口将待发 送数据移动到目标存储区域中。
在本实施例中，通信方法的执行主体(例如图1所示的数据发送设备)可以确定是否存在待发送数据。上述待发送数据通常为目标应用调用套接字(Socket)接口函数发送到传输控制协议或因特网互联协议(Transmission Control Protocol/Internet Protocol，TCP/IP)的协议栈中的数据，上述目标应用可以为当前用户所操作的应用。用户在使用上述目标应用时，目标应用会调用socket接口函数将数据发送到上述协议栈中。Socket是应用层与TCP/IP协议族通信的中间软件抽象层，它是一组接口。在设计模式中，Socket其实就是一个门面模式，它把复杂的TCP/IP协议族隐藏在Socket接口后面，对用户来说，一组简单的接口就是全部，让Socket去组织数据，以符合指定的协议。
若确定出存在待发送数据，则上述执行主体可以调用目标接口将上述待发送数据移动到目标存储区域中。上述目标存储区域通常为目标加速卡的双倍速率同步动态随机存储器(Double Data Rate，DDR)上预分配的存储区域。上述目标加速卡通常为高速串行计算机扩展总线标准加速卡。PCIE加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。在这里，PCIE加速卡中的DDR用于存储运行的代码和数据。DDR也可以称为DDR SDRAM(Synchronous Dynamic Random-Access Memory，同步动态随机存取内存)，是内存的其中一种。SDRAM在一个时钟周期传输一次数据，而DDR在一个时钟周期传输两次数据，分别在上升沿和下降沿各传输一次数据，也就是一个时钟周期可以传输2bit数据，因此DDR的数据传输率是时钟频率的两倍。
在这里，上述目标接口用于实现上述协议栈与上述目标加速卡之间的通信。上述目标接口也可以称为基于PCIE的网络设备发送接口，用于把上述协议栈中的网络数据存储到PCIE加速卡中。在初始时，上述目标接口需要向TCP/IP协议栈注册为一个标准的网络设备发送接口，底层调用该接口完成数据的发送与接收。
步骤202，调用目标接口向数据接收设备发送通知。
在本实施例中，上述执行主体可以调用上述目标接口向数据接收 设备发送通知，上述通知可以用于表征上述待发送数据已放入上述目标存储区域中。
上述数据接收设备在接收到上述通知之后，可以获取移动到目标存储区域中的目标数据，之后，可以调用上述目标接口对上述目标数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈通过Socket接口函数将解析结果发送给上述目标应用。
在这里，PCIE加速卡通常使用虚拟MAC地址，虚拟MAC地址包含了对应的PCIE加速卡的ID信息，方便发送数据时快速定位到具体使用的PCIE加速卡。此外，PCIE加速卡可以将主机设置为网关，从而实现与外网设备的通信。
本公开的上述实施例提供的方法通过响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域中，之后，调用上述目标接口向数据接收设备发送用于表征待发送数据已放入目标存储区域中的通知。通过这种方式可以在PCIE加速卡上实现基于PCIE的IP网络设备，在主机上实现基于PCIE的网关设备，最终主机和所有的PCIE加速卡组成了一个IP网络，实现主机与PCIE加速卡之间的通信，从而可以高效实现PCIE卡的运维管理、固件升级、软件调试等功能。
在一些可选的实现方式中，上述数据发送设备通常为主机(host)，上述目标加速卡通常设置于上述主机上，上述数据接收设备通常为上述目标加速卡，即实现主机与设置于主机上的PCIE加速卡之间的通信，具体地，实现主机将数据传输给PCIE加速卡的功能。上述执行主体可以通过如下方式调用上述目标接口将上述待发送数据移动到目标存储区域中：上述执行主体(主机)可以调用上述目标接口采用直接存储器访问方式(Direct Memory Access，DMA)将上述待发送数据移动到目标存储区域中。直接存储器访问方式允许不同速度的硬件装置来沟通，而不需要依赖于CPU(Central Processing Unit，中央处理器)的大量中断负载。否则，CPU需要从来源把每一片段的资料复制到暂存器，然后把它们再次写回到新的地方。在这个时间中，CPU对于其他的工作来说无法使用。
在一些可选的实现方式中，上述数据发送设备通常为上述目标加速卡，上述数据接收设备通常为主机，上述目标加速卡通常设置于上述主机上，即实现主机与设置于主机上的PCIE加速卡之间的通信，具体地，实现PCIE加速卡将数据传输给主机的功能。
在一些可选的实现方式中，上述数据发送设备通常为上述目标加速卡，上述数据接收设备通常为主机，上述主机中通常设置有上述目标加速卡和除上述目标加速卡之外的其他目标加速卡，上述目标存储区域通常为上述目标加速卡中的存储区域，即实现主机与设置于主机上的多个PCIE加速卡之间的通信，具体地，实现PCIE加速卡将数据传输给主机，主机再将数据传输给其他PCIE加速卡的功能。
在一些可选的实现方式中，在调用上述目标接口将上述待发送数据移动到目标存储区域中之前，上述执行主体可以调用上述目标接口从上述目标加速卡中获取缓冲区描述符(Buffer Descriptor，BD)。上述缓冲区描述符可以用于描述双倍速率同步动态随机存储器DDR中存储器的状态和存储器的地址。存储器的状态通常包括空闲状态和占用状态。之后，上述执行主体可以调用上述目标接口利用上述缓冲区描述符，确定上述目标存储区域。具体地，上述执行主体可以通过上述缓冲区描述符确定处于空闲状态的存储器的地址，从而可以将处于空闲状态的存储器作为上述目标存储区域，以便将待发送数据移动到处于空闲状态的存储器中。
继续参见图3，图3是根据本实施例的通信方法中主机与PCIE加速卡进行交互的一个示意图。在图3中，PCIE加速卡中包含基地址寄存器存储空间Bar mem和双倍速率同步动态随机存储器DDR。在PCIE加速卡的双倍速率同步动态随机存储器DDR上预分配数据帧的存储区域Buf。基地址寄存器存储空间Bar mem中包括多个缓冲区描述符BD，用于描述对应存储器的物理地址和存储器的状态。主机Host可以通过PCIE基地址寄存器访问bar access这种方式访问基地址寄存器存储空间Bar mem，从缓冲区描述符中获取处于空闲状态的存储器的物理地址，从而可以通过PCIE直接存储器访问DMA这种方式对处于空闲状态的存储器进行数据搬移。
进一步参考图4，其示出了通信方法的又一个实施例的流程400。该通信方法通常应用于数据接收设备，该通信方法的流程400，包括以下步骤：
步骤401，响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据。
在本实施例中，通信方法的执行主体(例如图1所示的数据接收设备)可以确定是否接收到目标通知。上述目标通知可以用于表征上述目标数据已放入目标存储区域中。上述目标存储区域通常为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域。上述目标加速卡通常为高速串行计算机扩展总线标准加速卡。PCIE加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。在这里，PCIE加速卡中的DDR用于存储运行的代码和数据。DDR也可以称为DDR SDRAM，是内存的其中一种。SDRAM在一个时钟周期传输一次数据，而DDR在一个时钟周期传输两次数据，分别在上升沿和下降沿各传输一次数据，也就是一个时钟周期可以传输2bit数据，因此DDR的数据传输率是时钟频率的两倍。
若接收到上述目标通知，则上述执行主体可以调用目标接口获取移动到目标存储区域中的目标数据。上述目标数据通常为数据发送设备确定出存在待发送数据之后，移动到目标存储区域中的数据。
上述目标接口用于实现传输控制协议或因特网互联协议的协议栈与上述目标加速卡之间的通信。上述目标接口也可以称为基于PCIE的网络设备发送接口，用于把上述协议栈中的网络数据存储到PCIE加速卡中。在初始时，上述目标接口需要向TCP/IP协议栈注册为一个标准的网络设备发送接口，底层调用该接口完成数据的发送与接收。
步骤402，调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
在本实施例中，上述执行主体可以调用上述目标接口对上述目标数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈可以通过Socket接口函数将解析结果发送给目标应用。上述目标应用可以为当前用户所操作的应用。Socket是应用层与TCP/IP协议族通信 的中间软件抽象层，它是一组接口。在设计模式中，Socket其实就是一个门面模式，它把复杂的TCP/IP协议族隐藏在Socket接口后面，对用户来说，一组简单的接口就是全部，让Socket去组织数据，以符合指定的协议。
本公开的上述实施例提供的方法通过响应于接收到用于表征待发送数据已放入PCIE加速卡的双倍速率同步动态随机存储器上预分配的存储区域中的通知，调用目标接口获取移动到PCIE加速卡的预分配的存储区域中的待发送数据；之后，调用上述目标接口对上述目标数据进行解析，并将解析结果提交给TCP/IP协议栈。通过这种方式可以在PCIE加速卡上实现基于PCIE的IP网络设备，在主机上实现基于PCIE的网关设备，最终主机和所有的PCIE加速卡组成了一个IP网络，实现主机与PCIE加速卡之间的通信，从而可以高效实现PCIE卡的运维管理、固件升级、软件调试等功能。
在一些可选的实现方式中，上述数据接收设备通常为上述目标加速卡，上述目标加速卡通常设置于主机上，此时，上述目标通知是上述主机发送的，即实现主机与设置于主机上的PCIE加速卡之间的通信，具体地，实现主机将数据传输给PCIE加速卡的功能。
在一些可选的实现方式中，上述数据接收设备通常为主机，上述目标加速卡通常设置于上述主机上，上述目标通知是上述目标加速卡发送的，即实现主机与设置于主机上的PCIE加速卡之间的通信，具体地，实现PCIE加速卡将数据传输给主机的功能。上述执行主体可以通过如下方式调用目标接口获取移动到目标存储区域中的目标数据：上述执行主体(主机)可以调用目标接口采用直接存储器访问方式将上述目标数据从上述目标存储区域移动到主机的内存中，之后，可以获取移动到上述内存中的数据。
在一些可选的实现方式中，在调用上述目标接口对上述目标数据进行解析，并将解析结果提交给协议栈之后，上层协议栈可以确定上述目标数据的目的地址是否为上述主机的地址。若确定出上述目标数据的目的地址不是上述主机的地址，则可以查找上述目的地址对应的目标加速卡作为数据接收加速卡。在这里，上述数据接收加速卡通常 设置于上述主机中，上述执行主体(即主机)上可以设置有多个PCIE加速卡，除了上述目标加速卡之外还有其他加速卡。而后，上述执行主体可以调用上述目标接口采用直接存储器访问方式将上述目标数据从主机中的内存移动到上述数据接收加速卡的目标存储区域中。之后，上述执行主体可以向上述数据接收加速卡发送第二通知，上述第二通知可以用于表征上述目标数据已放入上述数据接收加速卡的目标存储区域中。
在一些可选的实现方式中，在调用上述目标接口采用直接存储器访问方式将上述目标数据从上述内存移动到上述数据接收加速卡的目标存储区域中之前，上述执行主体可以调用上述目标接口从上述数据接收加速卡中获取缓冲区描述符，上述缓冲区描述符可以用于描述双倍速率同步动态随机存储器DDR中存储器的状态和存储器的地址。具体地，可以从基地址寄存器存储空间中获取缓冲区描述符。而后，上述执行主体可以利用上述缓冲区描述符，确定上述数据接收加速卡的目标存储区域。具体地，上述执行主体可以通过上述缓冲区描述符确定处于空闲状态的存储器的地址，从而可以将处于空闲状态的存储器作为上述数据接收加速卡的目标存储区域，以便将待发送数据移动到处于空闲状态的存储器中。
继续参考图5，示出了根据本公开的通信系统的一个实施例的时序图。
本实施例的通信系统包括：数据发送设备和数据接收设备。其中，数据发送设备，用于响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，以及向数据接收设备发送目标通知，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信，目标通知用于表征待发送数据已放入目标存储区域中；数据接收设备，用于响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的待发送数据，以及对待发送数据进 行解析，并将解析结果提交给协议栈。
如图5所示，在步骤501中，数据发送设备响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中。
在本实施例中，数据发送设备可以确定是否存在待发送数据。上述待发送数据通常为目标应用调用套接字接口函数发送到TCP/IP协议栈中的数据，上述目标应用可以为当前用户所操作的应用。用户在使用上述目标应用时，目标应用会调用socket接口函数将数据发送到上述协议栈中。Socket是应用层与TCP/IP协议族通信的中间软件抽象层，它是一组接口。在设计模式中，Socket其实就是一个门面模式，它把复杂的TCP/IP协议族隐藏在Socket接口后面，对用户来说，一组简单的接口就是全部，让Socket去组织数据，以符合指定的协议。
若确定出存在待发送数据，则数据发送设备可以调用目标接口将上述待发送数据移动到目标存储区域中。上述目标存储区域通常为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域。上述目标加速卡通常为高速串行计算机扩展总线标准加速卡。PCIE加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。在这里，PCIE加速卡中的DDR用于存储运行的代码和数据。DDR也可以称为DDR SDRAM，是内存的其中一种。SDRAM在一个时钟周期传输一次数据，而DDR在一个时钟周期传输两次数据，分别在上升沿和下降沿各传输一次数据，也就是一个时钟周期可以传输2bit数据，因此DDR的数据传输率是时钟频率的两倍。
在这里，上述目标接口用于实现上述协议栈与上述目标加速卡之间的通信。上述目标接口也可以称为基于PCIE的网络设备发送接口，用于把上述协议栈中的网络数据存储到PCIE加速卡中。在初始时，上述目标接口需要向TCP/IP协议栈注册为一个标准的网络设备发送接口，底层调用该接口完成数据的发送与接收。
在步骤502中，数据发送设备调用目标接口向数据接收设备发送目标通知。
在本实施例中，数据发送设备可以调用上述目标接口向数据接收设备发送通知，上述通知可以用于表征上述待发送数据已放入上述目 标存储区域中。
在步骤503中，数据接收设备响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的待发送数据。
在本实施例中，数据接收设备可以确定是否接收到目标通知。若接收到上述目标通知，则数据接收设备可以调用上述目标接口获取移动到目标存储区域中的目标数据。上述目标数据通常为数据发送设备确定出存在待发送数据之后，移动到目标存储区域中的数据。
在步骤504中，数据接收设备调用目标接口对目标数据进行解析，并将解析结果提交给传输控制协议或因特网互联协议的协议栈。
在本实施例中，数据接收设备可以调用上述目标接口对上述目标数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈可以通过Socket接口函数将解析结果发送给目标应用。
在这里，PCIE加速卡通常使用虚拟MAC地址，虚拟MAC地址包含了对应的PCIE加速卡的ID信息，方便发送数据时快速定位到具体使用的PCIE加速卡。此外，PCIE加速卡可以将主机设置为网关，从而实现与外网设备的通信。
本公开的上述实施例提供的系统通过数据发送设备响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域中；之后，数据发送设备调用目标接口向数据接收设备发送用于表征待发送数据已放入目标存储区域中的通知；数据接收设备响应于接收到上述通知，调用目标接口获取移动到上述存储区域中的待发送数据，以及对待发送数据进行解析，并将解析结果提交给TCP/IP协议栈。通过这种方式可以在PCIE加速卡上实现基于PCIE的IP网络设备，在主机上实现基于PCIE的网关设备，最终主机和所有的PCIE加速卡组成了一个IP网络，实现主机与PCIE加速卡之间的通信，从而可以高效实现PCIE卡的运维管理、固件升级、软件调试等功能。
在一些可选的实现方式中，数据发送设备可以调用上述目标接口从上述目标加速卡中获取第一缓冲区描述符。上述第一缓冲区描述符可以用于描述双倍速率同步动态随机存储器DDR中存储器的状态和 存储器的地址。存储器的状态通常包括空闲状态和占用状态。之后，数据发送设备可以利用上述第一缓冲区描述符，确定上述目标存储区域。具体地，数据发送设备可以通过上述第一缓冲区描述符确定处于空闲状态的存储器的地址，从而可以将处于空闲状态的存储器作为上述目标存储区域，以便将上述待发送数据移动到处于空闲状态的存储器中。
继续参考图6，示出了根据本公开的通信系统的一个通信流程的示意图。在图6中，用户利用目标应用调用socket函数，发送网络数据到TCP/IP协议栈中。在确定出TCP/IP协议栈中存在网络数据之后，调用目标接口(基于PCIE的网络设备)填充到PCIE加速卡的对应存储区域。数据发送设备(主机或PCIE加速卡)可以向数据接收设备(PCIE加速卡或主机)发送通知。数据接收设备在接收到通知之后，可以调用目标接口获取移动到PCIE加速卡中的数据，以及对获取到的数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈可以调用socket函数将解析结果发送给上述目标应用。
继续参考图7，示出了根据本公开的通信系统的另一个实施例的时序图。
如图7所示，在步骤701中，主机响应于确定出存在待发送数据，调用目标接口采用直接存储器访问方式将待发送数据移动到目标存储区域中。
在本实施例中，主机可以确定是否存在待发送数据。上述待发送数据通常为目标应用调用套接字接口函数发送到TCP/IP协议栈中的数据，上述目标应用可以为当前用户所操作的应用。用户在使用上述目标应用时，目标应用会调用socket接口函数将数据发送到上述协议栈中。Socket是应用层与TCP/IP协议族通信的中间软件抽象层，它是一组接口。在设计模式中，Socket其实就是一个门面模式，它把复杂的TCP/IP协议族隐藏在Socket接口后面，对用户来说，一组简单的接口就是全部，让Socket去组织数据，以符合指定的协议。
若确定出存在待发送数据，则主机可以调用目标接口采用直接存储器访问方式将待发送数据移动到目标存储区域中。上述目标存储区 域通常为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域。上述目标加速卡通常设置于上述主机上。上述目标加速卡通常为高速串行计算机扩展总线标准加速卡。PCIE加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。在这里，PCIE加速卡中的DDR用于存储运行的代码和数据。DDR也可以称为DDR SDRAM，是内存的其中一种。SDRAM在一个时钟周期传输一次数据，而DDR在一个时钟周期传输两次数据，分别在上升沿和下降沿各传输一次数据，也就是一个时钟周期可以传输2bit数据，因此DDR的数据传输率是时钟频率的两倍。
直接存储器访问方式允许不同速度的硬件装置来沟通，而不需要依赖于CPU(Central Processing Unit，中央处理器)的大量中断负载。否则，CPU需要从来源把每一片段的资料复制到暂存器，然后把它们再次写回到新的地方。在这个时间中，CPU对于其他的工作来说无法使用。
在这里，上述目标接口用于实现上述协议栈与上述目标加速卡之间的通信。上述目标接口也可以称为基于PCIE的网络设备发送接口，用于把上述协议栈中的网络数据存储到PCIE加速卡中。在初始时，上述目标接口需要向TCP/IP协议栈注册为一个标准的网络设备发送接口，底层调用该接口完成数据的发送与接收。
在步骤702中，主机调用目标接口向目标加速卡发送目标通知。
在本实施例中，主机可以调用上述目标接口向目标加速卡发送通知，上述通知可以用于表征上述待发送数据已放入上述目标加速卡的目标存储区域中。
在步骤703中，目标加速卡响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的待发送数据。
在本实施例中，目标加速卡可以确定是否接收到目标通知。若接收到上述目标通知，则目标加速卡可以调用上述目标接口获取移动到目标存储区域中的待发送数据。
在步骤704中，目标加速卡调用目标接口对待发送数据进行解析，并将解析结果提交给协议栈。
在本实施例中，目标加速卡可以调用上述目标接口对上述待发送数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈可以通过Socket接口函数将解析结果发送给目标应用。
在这里，PCIE加速卡通常使用虚拟MAC地址，虚拟MAC地址包含了对应的PCIE加速卡的ID信息，方便发送数据时快速定位到具体使用的PCIE加速卡。此外，PCIE加速卡可以将主机设置为网关，从而实现与外网设备的通信。
本公开的上述实施例提供的系统实现了主机与设置于主机上的PCIE加速卡之间的通信，具体地，实现了主机将数据传输给PCIE加速卡的功能。
进一步参考图8，示出了根据本公开的通信系统的又一个实施例的时序图。
如图8所示，在步骤801中，目标加速卡响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中。
在本实施例中，目标加速卡可以确定是否存在待发送数据。上述待发送数据通常为目标应用调用套接字接口函数发送到TCP/IP协议栈中的数据，上述目标应用可以为当前用户所操作的应用。用户在使用上述目标应用时，目标应用会调用socket接口函数将数据发送到上述协议栈中。Socket是应用层与TCP/IP协议族通信的中间软件抽象层，它是一组接口。在设计模式中，Socket其实就是一个门面模式，它把复杂的TCP/IP协议族隐藏在Socket接口后面，对用户来说，一组简单的接口就是全部，让Socket去组织数据，以符合指定的协议。
若确定出存在待发送数据，则目标加速卡可以调用目标接口将上述待发送数据移动到目标存储区域中。上述目标存储区域通常为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域。上述目标加速卡通常为高速串行计算机扩展总线标准加速卡。PCIE加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。在这里，PCIE加速卡中的DDR用于存储运行的代码和数据。DDR也可以称为DDR SDRAM，是内存的其中一种。SDRAM在一个时钟周期传输一次数据，而DDR在一个时钟周期传输两次数据，分别在上升沿和下降 沿各传输一次数据，也就是一个时钟周期可以传输2bit数据，因此DDR的数据传输率是时钟频率的两倍。
在这里，上述目标接口用于实现上述协议栈与上述目标加速卡之间的通信。上述目标接口也可以称为基于PCIE的网络设备发送接口，用于把上述协议栈中的网络数据存储到PCIE加速卡中。在初始时，上述目标接口需要向TCP/IP协议栈注册为一个标准的网络设备发送接口，底层调用该接口完成数据的发送与接收。
在步骤802中，目标加速卡调用目标接口向主机发送目标通知。
在本实施例中，目标加速卡可以调用上述目标接口向主机发送通知，上述通知可以用于表征上述待发送数据已放入上述目标存储区域中。
在步骤803中，主机响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的待发送数据。
在本实施例中，主机可以确定是否接收到目标通知。若接收到上述目标通知，则主机可以调用上述目标接口获取移动到目标存储区域中的待发送数据。
在步骤804中，主机调用目标接口对待发送数据进行解析，并将解析结果提交给协议栈。
在本实施例中，主机可以调用上述目标接口对上述待发送数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈可以通过Socket接口函数将解析结果发送给目标应用。
在这里，PCIE加速卡通常使用虚拟MAC地址，虚拟MAC地址包含了对应的PCIE加速卡的ID信息，方便发送数据时快速定位到具体使用的PCIE加速卡。此外，PCIE加速卡可以将主机设置为网关，从而实现与外网设备的通信。
本公开的上述实施例提供的系统实现了主机与设置于主机上的PCIE加速卡之间的通信，具体地，实现了PCIE加速卡将数据传输给主机的功能。
继续参考图9，示出了根据本公开的通信系统的再一个实施例的时序图。
如图9所示，在步骤901中，目标加速卡响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中。
在本实施例中，目标加速卡可以确定是否存在待发送数据。上述待发送数据通常为目标应用调用套接字接口函数发送到TCP/IP协议栈中的数据，上述目标应用可以为当前用户所操作的应用。用户在使用上述目标应用时，目标应用会调用socket接口函数将数据发送到上述协议栈中。Socket是应用层与TCP/IP协议族通信的中间软件抽象层，它是一组接口。在设计模式中，Socket其实就是一个门面模式，它把复杂的TCP/IP协议族隐藏在Socket接口后面，对用户来说，一组简单的接口就是全部，让Socket去组织数据，以符合指定的协议。
若确定出存在待发送数据，则目标加速卡可以调用目标接口将上述待发送数据移动到目标存储区域中。上述目标存储区域通常为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域。上述目标加速卡通常为高速串行计算机扩展总线标准加速卡。PCIE加速卡一般用于对特定的处理流程进行硬件加速，提升系统处理能力。在这里，PCIE加速卡中的DDR用于存储运行的代码和数据。DDR也可以称为DDR SDRAM，是内存的其中一种。SDRAM在一个时钟周期传输一次数据，而DDR在一个时钟周期传输两次数据，分别在上升沿和下降沿各传输一次数据，也就是一个时钟周期可以传输2bit数据，因此DDR的数据传输率是时钟频率的两倍。
在这里，上述目标接口用于实现上述协议栈与上述目标加速卡之间的通信。上述目标接口也可以称为基于PCIE的网络设备发送接口，用于把上述协议栈中的网络数据存储到PCIE加速卡中。在初始时，上述目标接口需要向TCP/IP协议栈注册为一个标准的网络设备发送接口，底层调用该接口完成数据的发送与接收。
在步骤902中，目标加速卡调用目标接口向主机发送目标通知。
在本实施例中，目标加速卡可以调用上述目标接口向主机发送目标通知，上述目标通知可以用于表征上述待发送数据已放入上述目标加速卡的目标存储区域中。
在步骤903中，主机响应于接收到目标通知，调用目标接口采用 直接存储器访问方式将待发送数据从目标存储区域移动到内存中，获取移动到内存中的数据。
在本实施例中，主机可以确定是否接收到目标通知。若接收到上述目标通知，则主机可以调用上述目标接口采用直接存储器访问方式将上述目标数据从目标加速卡的目标存储区域移动到主机的内存中，之后，可以获取移动到上述内存中的数据。
在步骤904中，主机对移动到内存中的数据进行解析，并将解析结果提交给协议栈。
在本实施例中，主机调用上述目标接口对移动到内存中的数据进行解析，并将解析结果提交给TCP/IP协议栈。
在步骤905中，主机响应于利用协议栈解析出待发送数据的目的地址不是主机的地址，查找目的地址对应的目标加速卡作为数据接收加速卡。
在本实施例中，主机可以利用TCP/IP协议栈对上述移动到内存中的数据(即上述待发送数据)的目的地址进行解析，确定上述移动到内存中的数据的目的地址是否为上述主机的地址。
若确定出上述移动到内存中的数据的目的地址不是上述主机的地址，则主机查找上述目的地址对应的目标加速卡作为数据接收加速卡。在这里，上述数据接收加速卡通常设置于主机中，主机上可以设置有多个PCIE加速卡，除了上述目标加速卡之外还有其他加速卡。
在步骤906中，主机调用目标接口采用直接存储器访问方式将待发送数据从内存移动到数据接收加速卡的目标存储区域中。
在本实施例中，主机可以调用上述目标接口采用直接存储器访问方式将上述待发送数据从主机的内存移动到数据接收加速卡的目标存储区域中。
在步骤907中，主机调用目标接口向数据接收加速卡发送第二通知。
在本实施例中，主机可以调用上述目标接口向数据接收加速卡发送第二通知，上述第二通知可以用于表征上述待发送数据已放入数据接收加速卡的目标存储区域中。
在步骤908中，数据接收加速卡响应于接收到第二通知，调用对应的接口获取移动到数据接收加速卡的目标存储区域中的待发送数据。
在本实施例中，数据接收加速卡可以确定是否接收到第二通知。若接收到第二通知，数据接收加速卡可以调用其对应的接口获取移动到数据接收加速卡的目标存储区域中的待发送数据。
需要说明的是，每个PCIE加速卡均对应有一个接口(也可以称为基于PCIE的网络设备)，用于实现TCP/IP协议栈与该PCIE加速卡之间的通信。
在步骤909中，数据接收加速卡调用对应的接口对待发送数据进行解析，并将解析结果提交给协议栈。
在本实施例中，数据接收加速卡可以调用对应的接口对上述待发送数据进行解析，并将解析结果提交给TCP/IP协议栈，TCP/IP协议栈可以通过Socket接口函数将解析结果发送给目标应用。
本公开的上述实施例提供的系统实现了主机与设置于主机上的多个PCIE加速卡之间的通信，具体地，实现了PCIE加速卡将数据传输给主机，主机再将数据传输给其他PCIE加速卡的功能。
在一些可选的实现方式中，主机可以调用上述目标接口从数据接收加速卡中获取第二缓冲区描述符，上述第二缓冲区描述符可以用于描述双倍速率同步动态随机存储器DDR中存储器的状态和存储器的地址。具体地，主机可以调用上述目标接口从基地址寄存器存储空间中获取第二缓冲区描述符。而后，主机可以利用上述第二缓冲区描述符，确定数据接收加速卡的目标存储区域。具体地，主机可以通过上述第二缓冲区描述符确定处于空闲状态的存储器的地址，从而可以将处于空闲状态的存储器作为数据接收加速卡的目标存储区域，以便将上述待发送数据移动到处于空闲状态的存储器中。
进一步参考图10，作为对上述各图所示方法的实现，本申请提供了一种通信装置的一个实施例，该装置实施例与图2所示的方法实施例相对应，该装置具体可以应用于各种数据发送设备中。
如图10所示，本实施例的通信装置1000包括：移动单元1001 和发送单元1002。其中，移动单元1001用于响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；发送单元1002用于调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。
在本实施例中，通信装置1000的移动单元1001和发送单元1002的具体处理可以参考图2对应实施例中的步骤201和步骤202。
在一些可选的实现方式中，数据发送设备为主机，目标加速卡设置于主机上，数据接收设备为目标加速卡；以及移动单元1001用于通过如下方式调用目标接口将待发送数据移动到目标存储区域中：调用目标接口采用直接存储器访问方式将待发送数据移动到目标存储区域。
在一些可选的实现方式中，数据发送设备为目标加速卡，数据接收设备为主机，目标加速卡设置于主机上。
在一些可选的实现方式中，数据发送设备为目标加速卡，数据接收设备为主机，主机中设置有目标加速卡和除目标加速卡之外的其他目标加速卡，目标存储区域为目标加速卡中的存储区域。
在一些可选的实现方式中，通信装置1000还包括确定单元(图中未示出)。确定单元用于调用目标接口从目标加速卡中获取缓冲区描述符，利用缓冲区描述符，确定目标存储区域，其中，缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
进一步参考图11，作为对上述各图所示方法的实现，本申请提供了一种通信装置的又一个实施例，该装置实施例与图3所示的方法实施例相对应，该装置具体可以应用于各种数据接收设备中。
如图11所示，本实施例的通信装置1100包括：获取单元1101和提交单元1102。其中，获取单元1101用于响应于接收到目标通知， 调用目标接口获取移动到目标存储区域中的目标数据，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标通知用于表征目标数据已放入目标存储区域中，目标加速卡为高速串行计算机扩展总线标准加速卡，目标接口用于实现传输控制协议或因特网互联协议的协议栈与目标加速卡之间的通信；提交单元1102用于调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
在本实施例中，通信装置1100的获取单元1101和提交单元1102的具体处理可以参考图3对应实施例中的步骤301和步骤302。
在一些可选的实现方式中，数据接收设备为目标加速卡，目标加速卡设置于主机上，目标通知是主机发送的。
在一些可选的实现方式中，数据接收设备为主机，目标加速卡设置于主机上，目标通知是目标加速卡发送的；以及获取单元1101进一步用于通过如下方式调用目标接口获取移动到目标存储区域中的目标数据：调用目标接口采用直接存储器访问方式将目标数据从目标存储区域移动到内存中，获取移动到内存中的数据。
在一些可选的实现方式中，通信装置1100还包括：查找单元(图中未示出)、移动单元(图中未示出)和发送单元(图中未示出)。查找单元用于响应于利用协议栈确定出目标数据的目的地址不是主机的地址，查找目的地址对应的目标加速卡作为数据接收加速卡，其中，数据接收加速卡设置于主机中；移动单元用于调用目标接口采用直接存储器访问方式将目标数据从内存移动到数据接收加速卡的目标存储区域中；发送单元用于向数据接收加速卡发送第二通知，其中，第二通知用于表征目标数据已放入数据接收加速卡的目标存储区域中。
在一些可选的实现方式中，通信装置1100还包括：确定单元(图中未示出)。确定单元用于调用目标接口从数据接收加速卡中获取缓冲区描述符，利用缓冲区描述符，确定数据接收加速卡的目标存储区域，其中，缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
下面参考图12，其示出了适于用来实现本公开的实施例的电子设 备(例如图1中的数据发送设备或数据接收设备)1200的结构示意图。图12示出的电子设备仅仅是一个示例，不应对本公开的实施例的功能和使用范围带来任何限制。
如图12所示，电子设备1200可以包括处理装置(例如中央处理器、图形处理器等)1201，其可以根据存储在只读存储器(ROM)1202中的程序或者从存储装置1208加载到随机访问存储器(RAM)1203中的程序而执行各种适当的动作和处理。在RAM 1203中，还存储有电子设备1200操作所需的各种程序和数据。处理装置1201、ROM 1202以及RAM 1203通过总线1204彼此相连。输入/输出(I/O)接口1205也连接至总线1204。
通常，以下装置可以连接至I/O接口1205：包括例如触摸屏、触摸板、键盘、鼠标、摄像头、麦克风、加速度计、陀螺仪等的输入装置1206；包括例如液晶显示器(LCD)、扬声器、振动器等的输出装置1207；包括例如磁带、硬盘等的存储装置1208；以及通信装置1209。通信装置1209可以允许电子设备1200与其他设备进行无线或有线通信以交换数据。虽然图12示出了具有各种装置的电子设备1200，但是应理解的是，并不要求实施或具备所有示出的装置。可以替代地实施或具备更多或更少的装置。图12中示出的每个方框可以代表一个装置，也可以根据需要代表多个装置。
特别地，根据本公开的实施例，上文参考流程图描述的过程可以被实现为计算机软件程序。例如，本公开的实施例包括一种计算机程序产品，其包括承载在计算机可读介质上的计算机程序，该计算机程序包含用于执行流程图所示的方法的程序代码。在这样的实施例中，该计算机程序可以通过通信装置1209从网络上被下载和安装，或者从存储装置1208被安装，或者从ROM 1202被安装。在该计算机程序被处理装置1201执行时，执行本公开的实施例的方法中限定的上述功能。需要说明的是，本公开的实施例所述的计算机可读介质可以是计算机可读信号介质或者计算机可读存储介质或者是上述两者的任意组合。计算机可读存储介质例如可以是——但不限于——电、磁、光、电磁、红外线、或半导体的系统、装置或器件，或者任意以上的组合。 计算机可读存储介质的更具体的例子可以包括但不限于：具有一个或多个导线的电连接、便携式计算机磁盘、硬盘、随机访问存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑磁盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。在本公开的实施例中，计算机可读存储介质可以是任何包含或存储程序的有形介质，该程序可以被指令执行系统、装置或者器件使用或者与其结合使用。而在本公开的实施例中，计算机可读信号介质可以包括在基带中或者作为载波一部分传播的数据信号，其中承载了计算机可读的程序代码。这种传播的数据信号可以采用多种形式，包括但不限于电磁信号、光信号或上述的任意合适的组合。计算机可读信号介质还可以是计算机可读存储介质以外的任何计算机可读介质，该计算机可读信号介质可以发送、传播或者传输用于由指令执行系统、装置或者器件使用或者与其结合使用的程序。计算机可读介质上包含的程序代码可以用任何适当的介质传输，包括但不限于：电线、光缆、RF(射频)等等，或者上述的任意合适的组合。
上述计算机可读介质可以是上述数据发送设备中所包含的；也可以是单独存在，而未装配入该数据发送设备中。上述计算机可读介质承载有一个或者多个程序，当上述一个或者多个程序被该数据发送设备执行时，使得该数据发送设备：响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。
上述计算机可读介质也可以是上述数据接收设备中所包含的；也可以是单独存在，而未装配入该数据接收设备中。上述计算机可读介质承载有一个或者多个程序，当上述一个或者多个程序被该数据接收 设备执行时，使得该数据接收设备：响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标通知用于表征目标数据已放入目标存储区域中，目标加速卡为高速串行计算机扩展总线标准加速卡，目标接口用于实现传输控制协议或因特网互联协议的协议栈与目标加速卡之间的通信；调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
可以以一种或多种程序设计语言或其组合来编写用于执行本公开的实施例的操作的计算机程序代码，所述程序设计语言包括面向对象的程序设计语言—诸如Java、Smalltalk、C++，还包括常规的过程式程序设计语言—诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户计算机上执行、部分地在用户计算机上执行、作为一个独立的软件包执行、部分在用户计算机上部分在远程计算机上执行、或者完全在远程计算机或服务器上执行。在涉及远程计算机的情形中，远程计算机可以通过任意种类的网络——包括局域网(LAN)或广域网(WAN)——连接到用户计算机，或者，可以连接到外部计算机(例如利用因特网服务提供商来通过因特网连接)。
附图中的流程图和框图，图示了按照本公开各种实施例的系统、方法和计算机程序产品的可能实现的体系架构、功能和操作。在这点上，流程图或框图中的每个方框可以代表一个模块、程序段、或代码的一部分，该模块、程序段、或代码的一部分包含一个或多个用于实现规定的逻辑功能的可执行指令。也应当注意，在有些作为替换的实现中，方框中所标注的功能也可以以不同于附图中所标注的顺序发生。例如，两个接连地表示的方框实际上可以基本并行地执行，它们有时也可以按相反的顺序执行，这依所涉及的功能而定。也要注意的是，框图和/或流程图中的每个方框、以及框图和/或流程图中的方框的组合，可以用执行规定的功能或操作的专用的基于硬件的系统来实现，或者可以用专用硬件与计算机指令的组合来实现。
根据本公开的一个或多个实施例，提供了一种通信方法，应用于数据发送设备，该方法包括：响应于确定出存在待发送数据，调用目 标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。
根据本公开的一个或多个实施例，数据发送设备为主机，目标加速卡设置于主机上，数据接收设备为目标加速卡；以及调用目标接口将待发送数据移动到目标存储区域中，包括：调用目标接口采用直接存储器访问方式将待发送数据移动到目标存储区域中。
根据本公开的一个或多个实施例，数据发送设备为目标加速卡，数据接收设备为主机，目标加速卡设置于主机上。
根据本公开的一个或多个实施例，数据发送设备为目标加速卡，数据接收设备为主机，主机中设置有目标加速卡和除目标加速卡之外的其他目标加速卡，目标存储区域为目标加速卡中的存储区域。
根据本公开的一个或多个实施例，在调用目标接口将待发送数据移动到目标存储区域中之前，该方法包括：调用目标接口从目标加速卡中获取缓冲区描述符，利用缓冲区描述符，确定目标存储区域，其中，缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
根据本公开的一个或多个实施例，提供了一种通信方法，应用于数据接收设备，该方法包括：响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标通知用于表征目标数据已放入目标存储区域中，目标加速卡为高速串行计算机扩展总线标准加速卡，目标接口用于实现传输控制协议或因特网互联协议的协议栈与目标加速卡之间的通信；调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
根据本公开的一个或多个实施例，数据接收设备为目标加速卡， 目标加速卡设置于主机上，目标通知是主机发送的。
根据本公开的一个或多个实施例，数据接收设备为主机，目标加速卡设置于主机上，目标通知是目标加速卡发送的；以及调用目标接口获取移动到目标存储区域中的目标数据，包括：调用目标接口采用直接存储器访问方式将目标数据从目标存储区域移动到内存中，获取移动到内存中的数据。
根据本公开的一个或多个实施例，在调用目标接口对目标数据进行解析，并将解析结果提交给协议栈之后，该方法还包括：响应于利用协议栈确定出目标数据的目的地址不是主机的地址，查找目的地址对应的目标加速卡作为数据接收加速卡，其中，数据接收加速卡设置于主机中；调用目标接口采用直接存储器访问方式将目标数据从内存移动到数据接收加速卡的目标存储区域中；向数据接收加速卡发送第二通知，其中，第二通知用于表征目标数据已放入数据接收加速卡的目标存储区域中。
根据本公开的一个或多个实施例，在调用目标接口采用直接存储器访问方式将目标数据从内存移动到数据接收加速卡的目标存储区域中之前，该方法包括：调用目标接口从数据接收加速卡中获取缓冲区描述符，利用缓冲区描述符，确定数据接收加速卡的目标存储区域，其中，缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
根据本公开的一个或多个实施例，提供了一种通信系统，该系统包括：数据发送设备，用于响应于确定出存在待发送数据，调用目标接口将待发送数据移动到目标存储区域中，以及向数据接收设备发送目标通知，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信，目标通知用于表征待发送数据已放入目标存储区域中；数据接收设备，用于响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的待发送数据，以及对待发送 数据进行解析，并将解析结果提交给协议栈。
根据本公开的一个或多个实施例，数据发送设备为主机，目标加速卡设置于主机上，数据接收设备为目标加速卡；以及数据发送设备，用于调用目标接口采用直接存储器访问方式将待发送数据移动到目标存储区域中；或者数据发送设备为目标加速卡，数据接收设备为主机，目标加速卡设置于主机上；或者数据发送设备为目标加速卡，数据接收设备为主机，主机中设置有目标加速卡和除目标加速卡之外的其他目标加速卡，目标存储区域为目标加速卡中的存储区域。
根据本公开的一个或多个实施例，数据发送设备，用于调用目标接口从目标加速卡中获取第一缓冲区描述符，利用第一缓冲区描述符，确定目标存储区域，其中，第一缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
根据本公开的一个或多个实施例，数据发送设备为目标加速卡，数据接收设备为主机，目标加速卡设置于主机上；以及数据接收设备，用于调用目标接口采用直接存储器访问方式将待发送数据从目标存储区域移动到内存中，获取移动到内存中的数据。
根据本公开的一个或多个实施例，数据接收设备，用于响应于利用协议栈解析出待发送数据的目的地址不是主机的地址，查找目的地址对应的目标加速卡作为数据接收加速卡，调用目标接口采用直接存储器访问方式将待发送数据从内存移动到数据接收加速卡的目标存储区域中，向数据接收加速卡发送第二通知，其中，第二通知用于表征待发送数据已放入数据接收加速卡的目标存储区域中，数据接收加速卡设置于主机中。
根据本公开的一个或多个实施例，数据接收设备，用于调用目标接口从数据接收加速卡中获取第二缓冲区描述符，利用第二缓冲区描述符，确定数据接收加速卡的目标存储区域，其中，第二缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
根据本公开的一个或多个实施例，提供了一种通信装置，设置于数据发送设备，该装置包括：移动单元，用于响应于确定出存在待发 送数据，调用目标接口将待发送数据移动到目标存储区域中，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标加速卡为高速串行计算机扩展总线标准加速卡，待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，目标接口用于实现协议栈与目标加速卡之间的通信；发送单元，用于调用目标接口向数据接收设备发送通知，其中，通知用于表征待发送数据已放入目标存储区域中。
根据本公开的一个或多个实施例，数据发送设备为主机，目标加速卡设置于主机上，数据接收设备为目标加速卡；以及移动单元进一步用于通过如下方式调用目标接口将待发送数据移动到目标存储区域中：调用目标接口采用直接存储器访问方式将待发送数据移动到目标存储区域中。
根据本公开的一个或多个实施例，数据发送设备为目标加速卡，数据接收设备为主机，目标加速卡设置于主机上。
根据本公开的一个或多个实施例，数据发送设备为目标加速卡，数据接收设备为主机，主机中设置有目标加速卡和除目标加速卡之外的其他目标加速卡，目标存储区域为目标加速卡中的存储区域。
根据本公开的一个或多个实施例，该装置包括：确定单元。确定单元用于调用目标接口从目标加速卡中获取缓冲区描述符，利用缓冲区描述符，确定目标存储区域，其中，缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
根据本公开的一个或多个实施例，提供了一种通信装置，设置于数据接收设备，该装置包括：获取单元，用于响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，目标通知用于表征目标数据已放入目标存储区域中，目标加速卡为高速串行计算机扩展总线标准加速卡，目标接口用于实现传输控制协议或因特网互联协议的协议栈与目标加速卡之间的通信；提交单元，用于调用目标接口对目标数据进行解析，并将解析结果提交给协议栈。
根据本公开的一个或多个实施例，数据接收设备为目标加速卡，目标加速卡设置于主机上，目标通知是主机发送的。
根据本公开的一个或多个实施例，数据接收设备为主机，目标加速卡设置于主机上，目标通知是目标加速卡发送的；以及获取单元进一步用于通过如下方式调用目标接口获取移动到目标存储区域中的目标数据：调用目标接口采用直接存储器访问方式将目标数据从目标存储区域移动到内存中，获取移动到内存中的数据。
根据本公开的一个或多个实施例，该装置还包括：查找单元、移动单元和发送单元。查找单元用于响应于利用协议栈确定出目标数据的目的地址不是主机的地址，查找目的地址对应的目标加速卡作为数据接收加速卡，其中，数据接收加速卡设置于主机中；移动单元用于调用目标接口采用直接存储器访问方式将目标数据从内存移动到数据接收加速卡的目标存储区域中；发送单元用于向数据接收加速卡发送第二通知，其中，第二通知用于表征目标数据已放入数据接收加速卡的目标存储区域中。
根据本公开的一个或多个实施例，该装置还包括：确定单元。确定单元用于调用目标接口从数据接收加速卡中获取缓冲区描述符，利用缓冲区描述符，确定数据接收加速卡的目标存储区域，其中，缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
描述于本公开的实施例中所涉及到的单元可以通过软件的方式实现，也可以通过硬件的方式来实现。所描述的单元也可以设置在处理器中，例如，可以描述为：一种处理器包括移动单元和发送单元，还可以描述为：一种处理器包括获取单元和提交单元。其中，这些单元的名称在某种情况下并不构成对该单元本身的限定，例如，发送单元还可以被描述为“调用目标接口向数据接收设备发送通知的单元”。
以上描述仅为本公开的较佳实施例以及对所运用技术原理的说明。本领域技术人员应当理解，本公开的实施例中所涉及的范围，并不限于上述技术特征的特定组合而成的技术方案，同时也应涵盖在不脱离上述构思的情况下，由上述技术特征或其等同特征进行任意组合 而形成的其它技术方案。例如上述特征与本公开的实施例中公开的(但不限于)具有类似功能的技术特征进行互相替换而形成的技术方案。

Claims (20)

  1. 一种通信方法，应用于数据发送设备，其特征在于，包括：
    响应于确定出存在待发送数据，调用目标接口将所述待发送数据移动到目标存储区域中，其中，所述目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，所述目标加速卡为高速串行计算机扩展总线标准加速卡，所述待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，所述目标接口用于实现所述协议栈与所述目标加速卡之间的通信；
    调用所述目标接口向数据接收设备发送通知，其中，所述通知用于表征所述待发送数据已放入所述目标存储区域中。
  2. 根据权利要求1所述的方法，其特征在于，所述数据发送设备为主机，所述目标加速卡设置于所述主机上，所述数据接收设备为所述目标加速卡；以及
    所述调用目标接口将所述待发送数据移动到目标存储区域中，包括：
    调用目标接口采用直接存储器访问方式将所述待发送数据移动到目标存储区域中。
  3. 根据权利要求1所述的方法，其特征在于，所述数据发送设备为所述目标加速卡，所述数据接收设备为主机，所述目标加速卡设置于所述主机上。
  4. 根据权利要求1所述的方法，其特征在于，所述数据发送设备为所述目标加速卡，所述数据接收设备为主机，所述主机中设置有所述目标加速卡和除所述目标加速卡之外的其他目标加速卡，所述目标存储区域为所述目标加速卡中的存储区域。
  5. 根据权利要求1-4之一所述的方法，其特征在于，在所述调用目标接口将所述待发送数据移动到目标存储区域中之前，所述方法包括：
    调用目标接口从所述目标加速卡中获取缓冲区描述符，利用所述缓冲区描述符，确定所述目标存储区域，其中，所述缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
  6. 一种通信方法，应用于数据接收设备，其特征在于，包括：
    响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，所述目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，所述目标通知用于表征所述目标数据已放入所述目标存储区域中，所述目标加速卡为高速串行计算机扩展总线标准加速卡，所述目标接口用于实现传输控制协议或因特网互联协议的协议栈与所述目标加速卡之间的通信；
    调用所述目标接口对所述目标数据进行解析，并将解析结果提交给所述协议栈。
  7. 根据权利要求6所述的方法，其特征在于，所述数据接收设备为所述目标加速卡，所述目标加速卡设置于主机上，所述目标通知是所述主机发送的。
  8. 根据权利要求6所述的方法，其特征在于，所述数据接收设备为主机，所述目标加速卡设置于所述主机上，所述目标通知是所述目标加速卡发送的；以及
    所述调用目标接口获取移动到目标存储区域中的目标数据，包括：
    调用目标接口采用直接存储器访问方式将所述目标数据从所述目标存储区域移动到内存中，获取移动到所述内存中的数据。
  9. 根据权利要求8所述的方法，其特征在于，在所述调用所述目 标接口对所述目标数据进行解析，并将解析结果提交给所述协议栈之后，所述方法还包括：
    响应于利用所述协议栈确定出所述目标数据的目的地址不是所述主机的地址，查找所述目的地址对应的目标加速卡作为数据接收加速卡，其中，所述数据接收加速卡设置于所述主机中；
    调用所述目标接口采用直接存储器访问方式将所述目标数据从所述内存移动到所述数据接收加速卡的目标存储区域中；
    向所述数据接收加速卡发送第二通知，其中，所述第二通知用于表征所述目标数据已放入所述数据接收加速卡的目标存储区域中。
  10. 根据权利要求9所述的方法，其特征在于，在所述调用所述目标接口采用直接存储器访问方式将所述目标数据从所述内存移动到所述数据接收加速卡的目标存储区域中之前，所述方法包括：
    调用所述目标接口从所述数据接收加速卡中获取缓冲区描述符，利用所述缓冲区描述符，确定所述数据接收加速卡的目标存储区域，其中，所述缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
  11. 一种通信系统，其特征在于，包括：
    数据发送设备，用于响应于确定出存在待发送数据，调用目标接口将所述待发送数据移动到目标存储区域中，以及向数据接收设备发送目标通知，其中，所述目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，所述目标加速卡为高速串行计算机扩展总线标准加速卡，所述待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，所述目标接口用于实现所述协议栈与所述目标加速卡之间的通信，所述目标通知用于表征所述待发送数据已放入所述目标存储区域中；
    所述数据接收设备，用于响应于接收到所述目标通知，调用所述目标接口获取移动到所述目标存储区域中的待发送数据，以及对所述待发送数据进行解析，并将解析结果提交给所述协议栈。
  12. 根据权利要求11所述的系统，其特征在于，所述数据发送设备为主机，所述目标加速卡设置于所述主机上，所述数据接收设备为所述目标加速卡；以及
    所述数据发送设备，用于调用目标接口采用直接存储器访问方式将所述待发送数据移动到目标存储区域中；或者
    所述数据发送设备为所述目标加速卡，所述数据接收设备为主机，所述目标加速卡设置于所述主机上；或者
    所述数据发送设备为所述目标加速卡，所述数据接收设备为主机，所述主机中设置有所述目标加速卡和除所述目标加速卡之外的其他目标加速卡，所述目标存储区域为所述目标加速卡中的存储区域。
  13. 根据权利要求11或12所述的系统，其特征在于，
    所述数据发送设备，用于调用目标接口从所述目标加速卡中获取第一缓冲区描述符，利用所述第一缓冲区描述符，确定所述目标存储区域，其中，所述第一缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
  14. 根据权利要求11所述的系统，其特征在于，
    所述数据发送设备为所述目标加速卡，所述数据接收设备为主机，所述目标加速卡设置于所述主机上；以及
    所述数据接收设备，用于调用目标接口采用直接存储器访问方式将所述待发送数据从所述目标存储区域移动到内存中，获取移动到所述内存中的数据。
  15. 根据权利要求14所述的系统，其特征在于，
    所述数据接收设备，用于响应于利用所述协议栈解析出所述待发送数据的目的地址不是所述主机的地址，查找所述目的地址对应的目标加速卡作为数据接收加速卡，调用所述目标接口采用直接存储器访问方式将所述待发送数据从所述内存移动到所述数据接收加速卡的目 标存储区域中，向所述数据接收加速卡发送第二通知，其中，所述第二通知用于表征所述待发送数据已放入所述数据接收加速卡的目标存储区域中，所述数据接收加速卡设置于所述主机中。
  16. 根据权利要求15所述的系统，其特征在于，
    所述数据接收设备，用于调用所述目标接口从所述数据接收加速卡中获取第二缓冲区描述符，利用所述第二缓冲区描述符，确定所述数据接收加速卡的目标存储区域，其中，所述第二缓冲区描述符用于描述双倍速率同步动态随机存储器中存储器的状态和存储器的地址。
  17. 一种通信装置，设置于数据发送设备，其特征在于，包括：
    移动单元，用于响应于确定出存在待发送数据，调用目标接口将所述待发送数据移动到目标存储区域中，其中，所述目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，所述目标加速卡为高速串行计算机扩展总线标准加速卡，所述待发送数据为目标应用调用套接字接口函数发送到传输控制协议或因特网互联协议的协议栈中的数据，所述目标接口用于实现所述协议栈与所述目标加速卡之间的通信；
    发送单元，用于调用所述目标接口向数据接收设备发送通知，其中，所述通知用于表征所述待发送数据已放入所述目标存储区域中。
  18. 一种通信装置，设置于数据接收设备，其特征在于，包括：
    获取单元，用于响应于接收到目标通知，调用目标接口获取移动到目标存储区域中的目标数据，其中，所述目标存储区域为目标加速卡的双倍速率同步动态随机存储器上预分配的存储区域，所述目标通知用于表征所述目标数据已放入所述目标存储区域中，所述目标加速卡为高速串行计算机扩展总线标准加速卡，所述目标接口用于实现传输控制协议或因特网互联协议的协议栈与所述目标加速卡之间的通信；
    提交单元，用于调用所述目标接口对所述目标数据进行解析，并 将解析结果提交给所述协议栈。
  19. 一种电子设备，其特征在于，包括：
    至少一个处理器；
    存储装置，其上存储有至少一个程序，
    当所述至少一个程序被所述至少一个处理器执行，使得所述至少一个处理器实现如权利要求1-5以及6-10中任一所述的方法。
  20. 一种计算机可读介质，其上存储有计算机程序，其特征在于，该程序被处理器执行时实现如权利要求1-5以及6-10中任一所述的方法。
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