WO2023226173A1 - 一种数论变换素数下的模乘运算方法 - Google Patents
一种数论变换素数下的模乘运算方法 Download PDFInfo
- Publication number
- WO2023226173A1 WO2023226173A1 PCT/CN2022/104837 CN2022104837W WO2023226173A1 WO 2023226173 A1 WO2023226173 A1 WO 2023226173A1 CN 2022104837 W CN2022104837 W CN 2022104837W WO 2023226173 A1 WO2023226173 A1 WO 2023226173A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- algorithm
- modular multiplication
- divide
- karatsuba
- prime
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000004422 calculation algorithm Methods 0.000 claims abstract description 60
- 230000009467 reduction Effects 0.000 claims abstract description 29
- 230000009466 transformation Effects 0.000 claims description 22
- 230000008569 process Effects 0.000 claims description 10
- 238000004364 calculation method Methods 0.000 claims description 9
- 125000004122 cyclic group Chemical group 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 238000012152 algorithmic method Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
- H04L9/3033—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters details relating to pseudo-prime or prime number generation, e.g. primality test
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L9/3093—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy involving Lattices or polynomial equations, e.g. NTRU scheme
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
- H04L9/0852—Quantum cryptography
Definitions
- the invention relates to the field of computer software, and in particular to a modular multiplication operation method under number theory transformation prime numbers.
- lattice cryptography In order to maximize the speed of operations on its mathematical structure without losing the security of its cryptographic system, lattice cryptography often uses a cyclic lattice in specific applications, that is, a polynomial ring with X n +1 as the quotient polynomial. For this type of polynomial ring, the speed of multiplication between polynomials can be greatly improved through fast number theory transformation.
- the prerequisite for using fast number theory transformation is that there are n-th unit roots in the basic prime field [2].
- the multiplication operation on the polynomial is one of the most arduous operations.
- the prime field modulus p that constitutes the polynomial ring is generally limited to satisfy that p-1 can be divisible by twice the degree of the quotient polynomial 2n, that is to say, the tail of the bit representation of p contains several consecutive 0s (finally Except for one bit), the reason is that fast number theory transformation can be used to reduce the computational complexity of polynomial multiplication from O(n 2 ) to O(nlogn).
- the use of the fast number theory transformation algorithm only affects the number of modular multiplications in the prime field Z p , and has nothing to do with the implementation of the coefficient-level modular multiplication itself.
- the prime field modulus p is required to satisfy that the tail of the bit representation of p contains several consecutive 0s.
- the existing implementation and application results of lattice cryptography schemes only consider high-performance implementation at the fast number theory transformation level, but do not take into account the optimization possibilities provided by the special form of prime field modulus for the underlying modular multiplication operation itself.
- the purpose of the present invention is to overcome the shortcomings of the existing technology and provide a modular multiplication operation method under number theory transformation primes that reduces the computational complexity, can save a certain amount of computing resources, and at the same time improves the modular multiplication speed to a certain extent.
- the technical solution of the present invention is as follows: a modular multiplication operation method under number theory transformation of prime numbers.
- step B2 calculate [E+(2 w -E mod 2 w ) ⁇ p]/2 w and reassign the result to E
- step B3 Determine the size of E, subtract the excess multiple of p, and return the final result.
- the present invention uses the Karatsuba divide and conquer technique, and the original multiplication operation of K bits by K bits is converted into three multiplication operations of h+1 bits by h+1 bits plus some comparison operations.
- the complexity of multiplication is the square level of the multiplier bit length, the use of divide and conquer reduces the computational complexity of multiplication to about three-quarters of the original.
- the core algorithm idea of the Montgomery reduction algorithm is to "replace division with multiplication". By adding a certain multiple k ⁇ p of the modulus p to the original number E, it is transformed into a Bits represent a number with all 0s at the end, and then the value is reduced directly by discarding the 0s at the end.
- This embodiment provides a modular multiplication operation method under number theory transformation of prime numbers.
- the core optimization idea of the modular multiplication operation method is to use a combination of Karatsuba divide-and-conquer algorithm and multi-step Montgomery reduction algorithm to perform modular multiplication in the prime number field.
- the operation ab mod p For the convenience of description, we will only describe the algorithmic method here.
- the Karatsuba divide-and-conquer algorithm and the multi-step Montgomery reduction algorithm are separated into two relatively independent parts. In the subsequent content, we will discuss the combination of the two. for further discussion.
- Modular multiplication algorithm input modulus p is a prime number, modulus bit length K, modulus bits represent the bit length w of the mantissa 0...01, modular multiplication operands a, b; among them, 0...01 Represented as "1" of variable length with leading 0, it can be 01, 001, 0001, 00001, 0000000001,...etc.
- Sub-algorithm B that is, the steps of the multi-step Montgomery reduction algorithm:
- the original multiplication operation of K bits by K bits is transformed into three multiplication operations of h+1 bits by h+1 bits plus some multiplication operations that are extremely low cost compared to the multiplication
- the complexity of multiplication is the square level of the multiplier bit length
- the use of divide and conquer reduces the complexity of multiplication to about three-quarters of the original.
- the core algorithm idea of the Montgomery reduction algorithm is to "replace division with multiplication". By adding a certain multiple k ⁇ p of the modulus p to the original number E, it is transformed into a Bits represent a number with all 0s at the end, and then the value is reduced directly by discarding the 0s at the end.
- the above two sub-processes are independent of each other from the perspective of the algorithm itself. However, in specific implementation, they can sometimes assist each other. Taking hardware implementation as an example, if a general method is used, multiplication and reduction must be performed in order, and the total clock cycle consumption is the sum of the two; however, if the above method is used, multiplier resources can be saved first (because the process of determining k no longer requires multiplication), and secondly, if the parameters additionally satisfy w ⁇ h, the first reduction operation in 5) can be started immediately after completing the calculation of L in 2) (because In the mod 2 w sense, only the low bits of D are needed), which can shorten the length of the hardware pipeline to a certain extent.
- Sub-algorithm B that is, the steps of the multi-step Montgomery reduction algorithm:
- the above specific method fully explores the structure of modular multiplication, and uses the combination of Karatsuba divide and conquer and multi-step Montgemory reduction to reduce the complexity of the modular multiplication algorithm on fast number theory transformation prime numbers to a certain extent, thereby saving a certain amount of time. Computing resources.
Landscapes
- Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Complex Calculations (AREA)
Abstract
本发明公开了一种数论变换素数下的模乘运算方法,采用Karatsuba分治算法和多步Montgomery约减算法相结合的方式来进行素数域上的模乘运算ab mod p,使用了Karatsuba分治技巧之后,使得数乘的运算复杂度降低为原来的四分之三左右;并且,Montgomery约减算法的核心算法思想是"以乘代除",通过在原数E的基础上加上模数p的某一个倍数k×p,使其在模意义下不变的前提下转化为一个由比特表示的尾部全为0的数,然后直接通过舍弃尾端的0来实现数值的约减;可以节约一定的计算资源,同时一定程度上提升模乘速度。
Description
本发明涉及计算机软件领域,尤其涉及的是一种数论变换素数下的模乘运算方法。
随着量子计算技术的快速发展,现代密码学界普遍相信目前所广泛使用的基于大整数分解和群上离散对数问题的传统公钥密码体制具有被量子计算机攻破而失效的风险。近年来,国内外均针对能够抵御量子计算攻击因而被称为“后量子密码”的全新公钥密码体制展开了积极研究,其中引入了几何结构的格密码为最受学术界和工业界关注的后量子密码之一[1]。
格密码体制的结构基础可以概括为以整数环(或域)为基底的多维线性空间,其具有数学理论清晰、便于计算机实现等诸多优点。为了最大程度地加速其数学结构上的运算速度而同时不会损失其密码体制的安全性,格密码在具体应用时经常会采用循环格,也就是以X
n+1为商多项式的多项式环。对于这一类型的多项式环,多项式间乘法的运算速度可以通过快速数论变换的方法来进行大幅提升,而使用快速数论变换的前提则是其基础素数域上存在n次单位根[2]。
[1]杨妍玲.后量子密码在信息安全中的应用与分析[J].信息与电脑(理论版),2020,32(08):177-181.
[2]El Bansarkhani R,Buchmann J.Improvement and efficient implementation of a lattice-based signature scheme[C].International Conference on Selected Areas in Cryptography.Springer,Berlin,Heidelberg,2013:48-67。
在使用循环格结构的格密码方案中,多项式上的乘法运算是占比最繁重的操作之一,为了提升其计算机实现速度,以在具体的格密码应用场景中达到更为可观的性能,在方案参数选取阶段一般都会限定构成该多项式环的素数域模数p满足p-1可以被商多项式次数的两倍2n整除,也就是说p的比特表示形式的尾部包含若干个连续的0(最后一个比特除外),其原因在于这样便可利用快速数论变换来将多项式乘法的计算复杂度由O(n
2)降低至O(nlogn)。然而快速数论变换算法的使用与否仅会影响素数域Z
p上的模乘次数,而与系数级的模乘本身的运算实现无关。
在目前已有的循环格密码方案的实现成果中,研究重点一般都集中于对快 速数论变换过程的高性能实现,包括系数数据传送、中转、缓存等,而对于更加底层、基础的素数域模乘的实现关注度较少。可能的原因在于:格密码中素数的比特位宽较小(一般在64bit以内),不涉及大整数的相关运算,在大多数的软件计算环境下不涉及复杂的数组储存,因此大部分的模乘实现都是通过一步标准数乘加上一步取余操作来完成的[3]。
[3]Roma C,Tai C E A,Hasan M A.Energy consumption of round 2 submissions for NIST PQC standards[C].Second PQC Standardization Conference.2019。
对于现有的格密码实现而言,为了利用快速数论变换算法进行加速,在选取方案参数时,要求素数域模数p满足p的比特表示形式的尾部包含若干个连续的0。目前现有的格密码方案实现和应用成果中,仅考虑了快速数论变换层面的高性能实现,而没有考虑到素数域模数的特殊形式对底层模乘运算本身所提供的优化可能性。
因此,现有技术存在缺陷,需要改进。
发明内容
本发明的目的是克服现有技术的不足,提供一种运算复杂度降低、可以节约一定的计算资源,同时一定程度上提升模乘速度的数论变换素数下的模乘运算方法。
本发明的技术方案如下:一种数论变换素数下的模乘运算方法,模乘算法输入:模数p为一素数,模数的比特长度K,模数比特表示下尾数0...01的比特长度w,模乘操作数a,b;模乘算法输出:模乘结果r=a×b×d mod p;并且,其满足关系:0≤a<p,0≤b<p;2
K-1<p<2
K;2
w整除p-1;
其中,
表示向上取整;并且,采用Karatsuba分治算法和多步Montgomery约减算法进行素数域上的模乘运算ab mod p。
应用于上述技术方案,所述的数论变换素数下的模乘运算方法中,Karatsuba分治算法和多步Montgomery约减算法互相分开为两个独立的计算部分。
应用于各个上述技术方案,所述的数论变换素数下的模乘运算方法中,Karatsuba分治算法的步骤包括:步骤A1:记
计算满足:a=a
1×2
h+a
0,b=b
1×2
h+b
0的a
0,a
1,b
0,b
1;步骤A2:根据步骤A1的a
0,a
1,b
0,b
1的分别计算:L=a
0×b
0,H=a
1×b
1,M=(a
0+a
1)×(b
0+b
1)-L-H;步骤A3:根据步骤A2得到的L、H和M,计算D=H×2
2h+M×2
h+L。
应用于各个上述技术方案,所述的数论变换素数下的模乘运算方法中,多步Montgomery约减算法的步骤包括:步骤B1:记E=D;步骤B2:计算[E+(2
w-E mod 2
w)×p]/2
w并将结果重新赋值给E;步骤B3:判断E的大小,将其中多余的p的倍数减去,返回最终结果。
应用于各个上述技术方案,所述的数论变换素数下的模乘运算方法中,当参数额外满足w≤h时,在Karatsuba分治算法中步骤A2完成L的计算之后,立刻开始进行多步Montgomery约减算法中的首次约减运算。
采用上述方案,本发明通过通过使用了Karatsuba分治技巧之后,原本的K比特乘K比特的数乘运算被转化为三个h+1比特乘h+1比特的数乘运算加上一些相较于数乘而言成本极低的加减运算,由于数乘的复杂度为乘数比特长度的平方级别,因此分治的使用使得数乘的运算复杂度降低为原来的四分之三左右。
Montgomery约减算法的核心算法思想是“以乘代除”,通过在原数E的基础上加上模数p的某一个倍数k×p,使其在模意义下不变的前提下转化为一个比特表示尾部全为0的数,然后直接通过舍弃尾端的0来实现数值的约减。对于一般的模数p而言,确定k的过程是:k=E×p′mod 2
w,这里的p′为一满足p′×p+1能被2
w整除的常数,即确定k的过程需要乘法运算,然而对于可以使用快速数论变换算法的素数p而言,因为满足2
w整除p-1,便有p′=2
w-1成立,那么确定k的过程便不需要乘法,这对于约减算法而言可以节约一定的计算资源,同时有望一定程度上提升模乘速度。
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本实施例提供了一种数论变换素数下的模乘运算方法,模乘运算方法的核心优化思想是采用Karatsuba分治算法和多步Montgomery约减算法相结合的方式来进行素数域上的模乘运算ab mod p。这里为了便于描述,我们这里先只进行算法上的方法描述,将Karatsuba分治算法和多步Montgomery约减算法互相分开为两个较为独立的部分,在后续内容中再对二者相结合的情况进行进一步的讨论。
模乘算法输入:模数p为一素数,模数的比特长度K,模数比特表示下尾数0...01的比特长度w,模乘操作数a,b;其中,0...01表示为前导0不定长度 的“1”,可以是01,001,0001,00001,0000000001,...等等。
模乘算法输出:模乘结果r=a×b×d mod p;这里常数d的具体值见下;
以上参数满足如下关系:
子算法A,即Karatsuba分治算法步骤:
2)计算L=a
0×b
0,H=a
1×b
1,M=(a
0+a
1)×(b
0+b
1)-L-H;
3)计算D=H×2
2h+M×2
h+L;
子算法B,即多步Montgomery约减算法步骤:
4)记E=D;
5)计算[E+(2
w-E mod 2
w)×p]/2
w并将结果重新赋值给E;
6)判断E的大小,将其中多余的p的倍数减去,返回最终结果;
下面对以上方法进行适当的分析与解释。
使用了Karatsuba分治技巧之后,原本的K比特乘K比特的数乘运算被转化为三个h+1比特乘h+1比特的数乘运算加上一些相较于数乘而言成本极低的加减运算,由于数乘的复杂度为乘数比特长度的平方级别,因此分治的使用使得数乘的运算复杂度降低为原来的四分之三左右。
Montgomery约减算法的核心算法思想是“以乘代除”,通过在原数E的基础上加上模数p的某一个倍数k×p,使其在模意义下不变的前提下转化为一个比特表示尾部全为0的数,然后直接通过舍弃尾端的0来实现数值的约减。对于一般的模数p而言,确定k的过程是:k=E×p′mod 2
w,这里的p′为一满足p′×p+1能被2
w整除的常数,即确定k的过程需要乘法运算,然而对于可以使用快速数论变换算法的素数p而言,因为满足2
w整除p-1,便有p′=2
w-1成立,那么确定k的过程便不需要乘法,这对于约减算法而言可以节约一定的计算资源,同时有望一定程度上提升模乘速度。
以上两个子过程从算法本身的层面出发,是相互独立没有太多紧密联系的,然而在具体实现时,有时可以起到相互辅助的效果。以硬件实现为例,若是采用一般的方法,数乘和约减必须按照顺序执行,总的时钟周期消耗数量便是两者的加和;然而若是采用如上所述的方法,首先可以节省乘法器资源的使用量(因为确定k的过程不再需要乘法),其次如果参数额外满足w≤h时,在2)中 完成L的计算之后便可以立刻开始进行5)中的首次约减运算(因为在mod 2
w意义下仅需D的低比特位),即可以一定程度上缩短硬件流水线的长度。
下面给出一个本申请中所介绍的数论变换素数下的模乘运算方法的具体应用实例。
我们针对如下数据进行实例化:p=4293836801(二进制表示为11111111111011101100000000000001共32比特),K=32,w=14,a=4111111111,b=2333333333,此时d的值为3050289822,正确的模乘输出a×b×d mod p的值理应为4111111111×2333333333×3050289822mod4293836801=3464401978。
子算法A,即Karatsuba分治算法步骤:
2)再计算得L=a
0×b
0=2085433875,H=a
1×b
1=2233376190,M=(a
0+a
1)×(b
0+b
1)-L-H=4804888343;
3)然后计算D=H×2
2h+M×2
h+L=9592592590962962963;
子算法B,即多步Montgomery约减算法步骤:
4)记E=D=9592592590962962963;
6)判断E的大小,可知E=3464401978并不大于p=4293836801,最终返回结果3464401978;
对比可知,我们的方法下运算得出的结果与正确结果相同,均为3464401978。
以上具体方法,充分探究了模乘的结构,采用了Karatsuba分治和多步Montgemory约减相互结合的方式,一定程度上降低快速数论变换素数上的模乘运算算法的复杂度,进而节约了一定计算资源。
Claims (6)
- 根据权利要求1所述的数论变换素数下的模乘运算方法,其特征在于:Karatsuba分治算法和多步Montgomery约减算法互相分开为两个独立的计算部分。
- 根据权利要求3所述的数论变换素数下的模乘运算方法,其特征在于,多步Montgomery约减算法的步骤包括:步骤B1:记E=D;步骤B2:计算[E+(2 w-E mod 2 w)×p]/2 w并将结果重新赋值给E;步骤B3:判断E的大小,将其中多余的p的倍数减去,返回最终结果。
- 根据权利要求4所述的数论变换素数下的模乘运算方法,其特征在于,当参数额外满足w≤h时,在Karatsuba分治算法中步骤A2完成L的计算之后,立刻开始进行多步Montgomery约减算法中的首次约减运算。
- 种数论变换素数下的模乘运算方法,其特征在于,模乘算法输入:模数p为一素数,模数的比特长度K,模数比特表示下尾数0...01的比特长度w,模乘操作数a,b;模乘算法输出:模乘结果r=a×b×d mod p;并且,其满足关系:并且,采用Karatsuba分治算法和多步Montgomery约减算法进行素数域上的模乘运算ab mod p;Karatsuba分治算法和多步Montgomery约减算法互相分开为两个独立的计算部分;Karatsuba分治算法的步骤包括:步骤A2:根据步骤A1的a 0,a 1,b 0,b 1的分别计算:L=a 0×b 0,H=a 1×b 1,M=(a 0+a 1)×(b 0+b 1)-L-H;步骤A3:根据步骤A2得到的L、H和M,计算D=H×2 2h+M× 2h+L;多步Montgomery约减算法的步骤包括:步骤B1:记E=D;步骤B2:计算[E+(2 w-E mod 2 w)×p]/2 w并将结果重新赋值给E;步骤B3:判断E的大小,将其中多余的p的倍数减去,返回最终结果;当参数额外满足w≤h时,在Karatsuba分治算法中步骤A2完成L的计算之后,立刻开始进行多步Montgomery约减算法中的首次约减运算。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210570987.5A CN114978516A (zh) | 2022-05-24 | 2022-05-24 | 一种数论变换素数下的模乘运算方法 |
CN202210570987.5 | 2022-05-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2023226173A1 true WO2023226173A1 (zh) | 2023-11-30 |
Family
ID=82956139
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2022/104837 WO2023226173A1 (zh) | 2022-05-24 | 2022-07-11 | 一种数论变换素数下的模乘运算方法 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN114978516A (zh) |
WO (1) | WO2023226173A1 (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105068784A (zh) * | 2015-07-16 | 2015-11-18 | 清华大学 | 基于蒙哥马利模乘的Tate对算法及其硬件结构 |
CN108804075A (zh) * | 2018-06-12 | 2018-11-13 | 信阳师范学院 | 一种基于特殊五项式的高效蒙哥马利乘法器构造方法 |
CN110908635A (zh) * | 2019-11-04 | 2020-03-24 | 南京大学 | 基于同源曲线的后量子密码学的高速模乘器及其模乘方法 |
CN114510217A (zh) * | 2020-11-17 | 2022-05-17 | 北京智芯微电子科技有限公司 | 处理数据的方法、装置和设备 |
-
2022
- 2022-05-24 CN CN202210570987.5A patent/CN114978516A/zh not_active Withdrawn
- 2022-07-11 WO PCT/CN2022/104837 patent/WO2023226173A1/zh unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105068784A (zh) * | 2015-07-16 | 2015-11-18 | 清华大学 | 基于蒙哥马利模乘的Tate对算法及其硬件结构 |
CN108804075A (zh) * | 2018-06-12 | 2018-11-13 | 信阳师范学院 | 一种基于特殊五项式的高效蒙哥马利乘法器构造方法 |
CN110908635A (zh) * | 2019-11-04 | 2020-03-24 | 南京大学 | 基于同源曲线的后量子密码学的高速模乘器及其模乘方法 |
CN114510217A (zh) * | 2020-11-17 | 2022-05-17 | 北京智芯微电子科技有限公司 | 处理数据的方法、装置和设备 |
Non-Patent Citations (1)
Title |
---|
GARY C.T. CHOW ; KEN EGURO ; WAYNE LUK ; PHILIP LEONG: "A Karatsuba-Based Montgomery Multiplier", FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2010 INTERNATIONAL CONFERENCE ON, IEEE, PISCATAWAY, NJ, USA, 31 August 2010 (2010-08-31), Piscataway, NJ, USA , pages 434 - 437, XP031854545, ISBN: 978-1-4244-7842-2 * |
Also Published As
Publication number | Publication date |
---|---|
CN114978516A (zh) | 2022-08-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8411855B1 (en) | Size optimization for large elliptic curve cryptography scalar multiplication acceleration tables | |
WO2007012179A2 (en) | Karatsuba based multiplier and method | |
Kudithi | An efficient hardware implementation of the elliptic curve cryptographic processor over prime field | |
CN114666038B (zh) | 一种大位宽数据处理方法、装置、设备及存储介质 | |
CN115344237A (zh) | 结合Karatsuba和蒙哥马利模乘的数据处理方法 | |
US9201847B2 (en) | Composite finite field multiplier | |
EP1876523A1 (en) | Computation of A MOD (2^n - 1) | |
Scott | Missing a trick: Karatsuba variations | |
CN116893797A (zh) | 一种基于fifo存储的迭代型ntt系统 | |
Pornin | Optimized binary gcd for modular inversion | |
CN115801244A (zh) | 用于资源受限处理器的后量子密码算法实现方法及系统 | |
US6182100B1 (en) | Method and system for performing a logarithmic estimation within a data processing system | |
US7693926B2 (en) | Modular multiplication acceleration circuit and method for data encryption/decryption | |
Dong et al. | Utilizing the Double‐Precision Floating‐Point Computing Power of GPUs for RSA Acceleration | |
CN116679905A (zh) | 一种基于bram的迭代型ntt交错存储系统 | |
WO2023226173A1 (zh) | 一种数论变换素数下的模乘运算方法 | |
JP5175983B2 (ja) | 演算装置 | |
CN102646033B (zh) | 提供了加密和签名功能的rsa算法的实现方法和装置 | |
CN112799637B (zh) | 一种并行环境下高吞吐量的模逆计算方法及系统 | |
Ma et al. | Fast implementation for modular inversion and scalar multiplication in the elliptic curve cryptography | |
Liu et al. | Multiprecision multiplication on armv8 | |
CN114510217A (zh) | 处理数据的方法、装置和设备 | |
US7664258B2 (en) | Randomized sparse formats for efficient and secure computation on elliptic curves | |
Zeng et al. | The implementation of polynomial multiplication for lattice-based cryptography: A survey | |
EP4447383A1 (en) | Number theoretic transform with parallel coefficient processing |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 22943364 Country of ref document: EP Kind code of ref document: A1 |