Classifications

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  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
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  • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
  • H04N19/136—Incoming video signal characteristics or properties
  • H04N19/137—Motion inside a coding unit, e.g. average field, frame or block difference
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
  • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
  • H04N19/103—Selection of coding mode or of prediction mode
  • H04N19/105—Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction
• • H—ELECTRICITY
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  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
  • H04N19/124—Quantisation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
  • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
  • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/46—Embedding additional information in the video signal during the compression process
• • H—ELECTRICITY
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  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
  • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
  • H04N19/51—Motion estimation or motion compensation
  • H04N19/513—Processing of motion vectors
  • H04N19/517—Processing of motion vectors by encoding
  • H04N19/52—Processing of motion vectors by encoding by predictive encoding
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
  • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
  • H04N19/51—Motion estimation or motion compensation
  • H04N19/523—Motion estimation or motion compensation with sub-pixel accuracy
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

Definitions

• the present disclosure is directed to a set of advanced image and video coding technologies, and more specifically, to improved schemes for joint coding of motion vector difference (JMVD).
• JMVD motion vector difference
• AOMedia Video 1 is an open video coding format designed for video transmissions over the Internet. It was developed as a successor to VP9 by the Alliance for Open Media (AOMedia), a consortium founded in 2015 that includes semiconductor firms, video on demand providers, video content producers, software development companies and web browser vendors. Many of the components of the AVI project were sourced from previous research efforts by Alliance members. Individual contributors started experimental technology platforms years before: Xiph's/Mozilla's Daala already published code in 2010, Google's experimental VP9 evolution project VP10 was announced on September 12, 2014, and Cisco's Thor was published on August 11, 2015. Building on the codebase of VP9, AVI incorporates additional techniques, several of which were developed in these experimental formats.
• the first version 0.1.0 of the AV 1 reference codec was published on April 7, 2016.
• a validated version 1.0.0 of the specification was released.
• a validated version 1.0.0 with Errata 1 of the specification was released.
• the AVI bitstream specification includes a reference video codec.
• VVC Versatile Video Coding
• a method for video coding performed by at least one processor.
• the method comprises obtaining a coding block of video data, determining whether a joint coding of motion vector difference (JMVD) is used for predicting the coding block, obtaining, based on determining that the JMVD is used for predicting the coding block, scaling factors, and deriving a motion vector difference (MVD) for at least one reference frame list based on an application of the scaling factors to one or more components of the JMVD along one or more pre-defined directions, and reconstructing the coding block based on at least the derived MVD.
• JMVD joint coding of motion vector difference
• FIG. l is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 2 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 3 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 4 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 5 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 6 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 7 is a simplified illustration of a diagram in accordance with some embodiments.
• Fig. 8 is a simplified illustration of a diagram in accordance with some embodiments;
• FIG. 9A is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 9B is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 10A is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 1 OB is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 10C is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 11 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 12 is a simplified illustration of a diagram in accordance with some embodiments.
• FIG. 13 is a simplified flow illustration in accordance with some embodiments.
• FIG. 14 is a schematic illustration of a diagram in accordance with some embodiments.
• the embodiments may be implemented by processing circuitry (e.g., one or more processors or one or more integrated circuits).
• the one or more processors execute a program that is stored in a non-transitory computer-readable medium.
• there is at least one memory configured to store computer program code, and at least one processor configured to access the computer program code and operate as instructed by the computer program code, the computer program code including: obtaining code configured to cause the at least one processor to obtain a coding block of video data, determining code configured to cause the at least one processor to determine whether a joint coding of motion vector difference (JMVD) is used for predicting the coding block, further obtaining code configured to cause the at least one processor to obtain, in response to determining that the JMVD is used for predicting the coding block, scaling factors, deriving code configured to cause the at least one processor to derive a motion vector difference (MVD) for at least one reference frame list based on an application of the scaling factors to one or more components of the JMVD along one or more pre-defined directions, and reconstructing code configured to cause the at least one hardware processor to reconstruct the coding block based on at least the derived MVD.
• JMVD joint coding of motion vector difference
• the MVD is derived further based on any of a distance between references frames and a current frame.
• deriving the MVD comprises determining whether a flag indicates that at least one of the scaling factors is not equal to a first pre-defined default value, the at least one of the scaling factors is used to derive an MVD from the JMVD for one of the reference frames, and another one of the scaling factors, used to derive an MVD from the JMVD for a second one of the reference frames, is set to a second pre-defined default value.
• the obtaining the scaling factors is based on obtaining at least one flag signaled into a bitstream of the coding block, and the at least one flag indicates the scaling factors for at least one of the components along the one or more pre-defined directions.
• deriving the MVD comprises: determining whether a first flag indicates that at least one of the scaling factors is not equal to a first predefined default value, and determining, in response to determining that the first flag indicates that the at least one of the scaling factors is not equal to the first pre-defined default value, whether the scaling factors are applied to at least one direction, of the MVD and of the predefined directions, based on a value of a second flag.
• deriving the MVD comprises applying the one or more scaling factors equally to both of the pre-defined directions based on determining that the second flag indicates both of the pre-defined directions.
• obtaining the scaling factors comprises obtaining an indices of the scaling factors in a look-up table, the look-up table indicates that at least one pair, at a first one of the indices, of the scaling factors has a same scaling factor value in both of the pre-defined directions, and the look-up table indicates that at least a second pair, at a second one of the indices, of the scaling factors has different scaling factor values between ones of the pre-defined directions.
• At least one of the same scaling factor value and the different scaling factor value is a fractional scaling factor value, and at least one other of the same scaling factor value and the different scaling factor value is m/M where M is two to the power of n, and m and n are integers.
• the scaling factors are derived based on coded information of at least one of a quantization step size, a quantization parameter, a block size, a difference between motion vector prediction blocks of the current block, an MVD class, a reference picture, and MVD scaling factors of neighboring blocks neighboring the coding block.
• Fig. 1 illustrates a simplified block diagram of a communication system 100 according to an embodiment of the present disclosure.
• the communication system 100 may include at least two terminals 102 and 103 interconnected via a network 105.
• a first terminal 103 may code video data at a local location for transmission to the other terminal 102 via the network 105.
• the second terminal 102 may receive the coded video data of the other terminal from the network 105, decode the coded data and display the recovered video data.
• Unidirectional data transmission may be common in media serving applications and the like.
• Fig. 1 illustrates a second pair of terminals 101 and 104 provided to support bidirectional transmission of coded video that may occur, for example, during videoconferencing.
• each terminal 101 and 104 may code video data captured at a local location for transmission to the other terminal via the network 105.
• Each terminal 101 and 104 also may receive the coded video data transmitted by the other terminal, may decode the coded data and may display the recovered video data at a local display device.
• the terminals 101, 102, 103 and 104 may be illustrated as servers, personal computers and smart phones but the principles of the present disclosure are not so limited. Embodiments of the present disclosure find application with laptop computers, tablet computers, media players and/or dedicated video conferencing equipment.
• the network 105 represents any number of networks that convey coded video data among the terminals 101, 102, 103 and 104, including for example wireline and/or wireless communication networks.
• the communication network 105 may exchange data in circuit-switched and/or packet-switched channels.
• Representative networks include telecommunications networks, local area networks, wide area networks and/or the Internet. For the purposes of the present discussion, the architecture and topology of the network 105 may be immaterial to the operation of the present disclosure unless explained herein below.
• FIG. 2 illustrates, as an example for an application for the disclosed subject matter, the placement of a video encoder and decoder in a streaming environment.
• the disclosed subject matter can be equally applicable to other video enabled applications, including, for example, video conferencing, digital TV, storing of compressed video on digital media including CD, DVD, memory stick and the like, and so on.
• a streaming system may include a capture subsystem 203, that can include a video source 201, for example a digital camera, creating, for example, an uncompressed video sample stream 213. That sample stream 213 may be emphasized as a high data volume when compared to encoded video bitstreams and can be processed by an encoder 202 coupled to the camera 201.
• the encoder 202 can include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter as described in more detail below.
• the encoded video bitstream 204 which may be emphasized as a lower data volume when compared to the sample stream, can be stored on a streaming server 205 for future use.
• One or more streaming clients 212 and 207 can access the streaming server 205 to retrieve copies 208 and 206 of the encoded video bitstream 204.
• a client 212 can include a video decoder 211 which decodes the incoming copy of the encoded video bitstream 208 and creates an outgoing video sample stream 210 that can be rendered on a display 209 or other rendering device (not depicted).
• the video bitstreams 204, 206 and 208 can be encoded according to certain video coding/compression standards. Examples of those standards are noted above and described further herein.
• Fig. 3 may be a functional block diagram of a video decoder 300 according to an embodiment of the present invention.
• a receiver 302 may receive one or more codec video sequences to be decoded by the decoder 300; in the same or another embodiment, one coded video sequence at a time, where the decoding of each coded video sequence is independent from other coded video sequences.
• the coded video sequence may be received from a channel 301, which may be a hardware/software link to a storage device which stores the encoded video data.
• the receiver 302 may receive the encoded video data with other data, for example, coded audio data and/or ancillary data streams, that may be forwarded to their respective using entities (not depicted).
• the receiver 302 may separate the coded video sequence from the other data.
• a buffer memory 303 may be coupled in between receiver 302 and entropy decoder / parser 304 (“parser” henceforth).
• parser henceforth
• the buffer 303 may not be needed, or can be small.
• the buffer 303 may be required, can be comparatively large and can advantageously of adaptive size.
• the video decoder 300 may include a parser 304 to reconstruct symbols 313 from the entropy coded video sequence. Categories of those symbols include information used to manage operation of the decoder 300, and potentially information to control a rendering device such as a display 312 that is not an integral part of the decoder but can be coupled to it.
• the control information for the rendering device(s) may be in the form of Supplementary Enhancement Information (SEI messages) or Video Usability Information parameter set fragments (not depicted).
• SEI messages Supplementary Enhancement Information
• the parser 304 may parse / entropy-decode the coded video sequence received.
• the coding of the coded video sequence can be in accordance with a video coding technology or standard, and can follow principles well known to a person skilled in the art, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, and so forth.
• the parser 304 may extract from the coded video sequence, a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder, based upon at least one parameters corresponding to the group. Subgroups can include Groups of Pictures (GOPs), pictures, tiles, slices, macroblocks, Coding Units (CUs), blocks, Transform Units (TUs), Prediction Units (PUs) and so forth.
• the entropy decoder / parser may also extract from the coded video sequence information such as transform coefficients, quantizer parameter values, motion vectors, and so forth.
• the parser 304 may perform entropy decoding / parsing operation on the video sequence received from the buffer 303, so to create symbols 313.
• the parser 304 may receive encoded data, and selectively decode particular symbols 313. Further, the parser 304 may determine whether the particular symbols 313 are to be provided to a Motion Compensation Prediction unit 306, a scaler / inverse transform unit 305, an Intra Prediction Unit 307, or a loop filter 311.
• Reconstruction of the symbols 313 can involve multiple different units depending on the type of the coded video picture or parts thereof (such as: inter and intra picture, inter and intra block), and other factors. Which units are involved, and how, can be controlled by the subgroup control information that was parsed from the coded video sequence by the parser 304. The flow of such subgroup control information between the parser 304 and the multiple units below is not depicted for clarity.
• decoder 300 can be conceptually subdivided into a number of functional units as described below. In a practical implementation operating under commercial constraints, many of these units interact closely with each other and can, at least partly, be integrated into each other. However, for the purpose of describing the disclosed subject matter, the conceptual subdivision into the functional units below is appropriate.
• a first unit is the scaler / inverse transform unit 305.
• the scaler / inverse transform unit 305 receives quantized transform coefficient as well as control information, including which transform to use, block size, quantization factor, quantization scaling matrices, etc. as symbol(s) 313 from the parser 304. It can output blocks comprising sample values, that can be input into aggregator 310.
• the output samples of the scaler / inverse transform 305 can pertain to an intra coded block; that is: a block that is not using predictive information from previously reconstructed pictures, but can use predictive information from previously reconstructed parts of the current picture.
• Such predictive information can be provided by an intra picture prediction unit 307.
• the intra picture prediction unit 307 generates a block of the same size and shape of the block under reconstruction, using surrounding already reconstructed information fetched from the current (partly reconstructed) picture 309.
• the aggregator 310 adds, on a per sample basis, the prediction information the intra prediction unit 307 has generated to the output sample information as provided by the scaler / inverse transform unit 305.
• the output samples of the scaler / inverse transform unit 305 can pertain to an inter coded, and potentially motion compensated block.
• a Motion Compensation Prediction unit 306 can access reference picture memory 308 to fetch samples used for prediction. After motion compensating the fetched samples in accordance with the symbols 313 pertaining to the block, these samples can be added by the aggregator 310 to the output of the scaler / inverse transform unit (in this case called the residual samples or residual signal) so to generate output sample information.
• the addresses within the reference picture memory form where the motion compensation unit fetches prediction samples can be controlled by motion vectors, available to the motion compensation unit in the form of symbols 313 that can have, for example X, Y, and reference picture components.
• Motion compensation also can include interpolation of sample values as fetched from the reference picture memory when subsample exact motion vectors are in use, motion vector prediction mechanisms, and so forth.
• the output samples of the aggregator 310 can be subject to various loop filtering techniques in the loop filter unit 311.
• Video compression technologies can include in-loop filter technologies that are controlled by parameters included in the coded video bitstream and made available to the loop filter unit 311 as symbols 313 from the parser 304, but can also be responsive to meta-information obtained during the decoding of previous (in decoding order) parts of the coded picture or coded video sequence, as well as responsive to previously reconstructed and loop-filtered sample values.
• the output of the loop filter unit 311 can be a sample stream that can be output to the render device 312 as well as stored in the reference picture memory 557 for use in future interpicture prediction.
• Certain coded pictures once fully reconstructed, can be used as reference pictures for future prediction. Once a coded picture is fully reconstructed and the coded picture has been identified as a reference picture (by, for example, parser 304), the current reference picture 309 can become part of the reference picture buffer 308, and a fresh current picture memory can be reallocated before commencing the reconstruction of the following coded picture.
• the video decoder 300 may perform decoding operations according to a predetermined video compression technology that may be documented in a standard, such as ITU-T Rec. H.265.
• the coded video sequence may conform to a syntax specified by the video compression technology or standard being used, in the sense that it adheres to the syntax of the video compression technology or standard, as specified in the video compression technology document or standard and specifically in the profiles document therein. Also necessary for compliance can be that the complexity of the coded video sequence is within bounds as defined by the level of the video compression technology or standard. In some cases, levels restrict the maximum picture size, maximum frame rate, maximum reconstruction sample rate (measured in, for example megasamples per second), maximum reference picture size, and so on. Limits set by levels can, in some cases, be further restricted through Hypothetical Reference Decoder (HRD) specifications and metadata for HRD buffer management signaled in the coded video sequence.
• HRD Hypothetical Reference Decoder
• the receiver 302 may receive additional (redundant) data with the encoded video.
• the additional data may be included as part of the coded video sequence(s).
• the additional data may be used by the video decoder 300 to properly decode the data and/or to more accurately reconstruct the original video data.
• Additional data can be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, and so on.
• SNR signal-to-noise ratio
• Fig. 4 may be a functional block diagram of a video encoder 400 according to an embodiment of the present disclosure.
• the encoder 400 may receive video samples from a video source 401 (that is not part of the encoder) that may capture video image(s) to be coded by the encoder 400.
• the video source 401 may provide the source video sequence to be coded by the encoder (303) in the form of a digital video sample stream that can be of any suitable bit depth (for example: 8 bit, 10 bit, 12 bit, . . .), any colorspace (for example, BT.601 Y CrCB, RGB, . . .) and any suitable sampling structure (for example Y CrCb 4:2:0, Y CrCb 4:4:4).
• the video source 401 may be a storage device storing previously prepared video.
• the video source 401 may be a camera that captures local image information as a video sequence.
• Video data may be provided as a plurality of individual pictures that impart motion when viewed in sequence.
• the pictures themselves may be organized as a spatial array of pixels, wherein each pixel can comprise one or more samples depending on the sampling structure, color space, etc. in use.
• a person skilled in the art can readily understand the relationship between pixels and samples. The description below focuses on samples.
• the encoder 400 may code and compress the pictures of the source video sequence into a coded video sequence 410 in real time or under any other time constraints as required by the application. Enforcing appropriate coding speed is one function of Controller 402. Controller controls other functional units as described below and is functionally coupled to these units. The coupling is not depicted for clarity. Parameters set by controller can include rate control related parameters (picture skip, quantizer, lambda value of rate-distortion optimization techniques, . . .), picture size, group of pictures (GOP) layout, maximum motion vector search range, and so forth. A person skilled in the art can readily identify other functions of controller 402 as they may pertain to video encoder 400 optimized for a certain system design.
• a coding loop can consist of the encoding part of an encoder 402 (“source coder” henceforth) (responsible for creating symbols based on an input picture to be coded, and a reference picture(s)), and a (local) decoder 406 embedded in the encoder 400 that reconstructs the symbols to create the sample data that a (remote) decoder also would create (as any compression between symbols and coded video bitstream is lossless in the video compression technologies considered in the disclosed subject matter). That reconstructed sample stream is input to the reference picture memory 405.
• the reference picture buffer content is also bit exact between local encoder and remote encoder.
• the prediction part of an encoder “sees” as reference picture samples exactly the same sample values as a decoder would “see” when using prediction during decoding.
• This fundamental principle of reference picture synchronicity (and resulting drift, if synchronicity cannot be maintained, for example because of channel errors) is well known to a person skilled in the art.
• the operation of the “local” decoder 406 can be the same as of a “remote” decoder 300, which has already been described in detail above in conjunction with Fig. 3. Briefly referring also to Fig. 4, however, as symbols are available and en/decoding of symbols to a coded video sequence by entropy coder 408 and parser 304 can be lossless, the entropy decoding parts of decoder 300, including channel 301, receiver 302, buffer 303, and parser 304 may not be fully implemented in local decoder 406.
• the source coder 403 may perform motion compensated predictive coding, which codes an input frame predictively with reference to one or more previously-coded frames from the video sequence that were designated as “reference frames.”
• the coding engine 407 codes differences between pixel blocks of an input frame and pixel blocks of reference frame(s) that may be selected as prediction reference(s) to the input frame.
• the local video decoder 406 may decode coded video data of frames that may be designated as reference frames, based on symbols created by the source coder 403. Operations of the coding engine 407 may advantageously be lossy processes.
• the coded video data may be decoded at a video decoder (not shown in Fig. 4)
• the reconstructed video sequence typically may be a replica of the source video sequence with some errors.
• the local video decoder 406 replicates decoding processes that may be performed by the video decoder on reference frames and may cause reconstructed reference frames to be stored in the reference picture cache 405. In this manner, the encoder 400 may store copies of reconstructed reference frames locally that have common content as the reconstructed reference frames that will be obtained by a far-end video decoder (absent transmission errors).
• the predictor 404 may perform prediction searches for the coding engine 407. That is, for a new frame to be coded, the predictor 404 may search the reference picture memory 405 for sample data (as candidate reference pixel blocks) or certain metadata such as reference picture motion vectors, block shapes, and so on, that may serve as an appropriate prediction reference for the new pictures. The predictor 404 may operate on a sample block-by-pixel block basis to find appropriate prediction references. In some cases, as determined by search results obtained by the predictor 404, an input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory 405.
• the controller 402 may manage coding operations of the video coder 403, including, for example, setting of parameters and subgroup parameters used for encoding the video data.
• Output of all aforementioned functional units may be subjected to entropy coding in the entropy coder 408.
• the entropy coder translates the symbols as generated by the various functional units into a coded video sequence, by loss-less compressing the symbols according to technologies known to a person skilled in the art as, for example Huffman coding, variable length coding, arithmetic coding, and so forth.
• the transmitter 409 may buffer the coded video sequence(s) as created by the entropy coder 408 to prepare it for transmission via a communication channel 411, which may be a hardware/software link to a storage device which would store the encoded video data.
• the transmitter 409 may merge coded video data from the video coder 403 with other data to be transmitted, for example, coded audio data and/or ancillary data streams (sources not shown).
• the controller 402 may manage operation of the encoder 400.
• the controller 405 may assign to each coded picture a certain coded picture type, which may affect the coding techniques that may be applied to the respective picture. For example, pictures often may be assigned as one of the following frame types:
• An Intra Picture may be one that may be coded and decoded without using any other frame in the sequence as a source of prediction.
• Some video codecs allow for different types of Intra pictures, including, for example Independent Decoder Refresh Pictures.
• I picture may be one that may be coded and decoded without using any other frame in the sequence as a source of prediction.
• Some video codecs allow for different types of Intra pictures, including, for example Independent Decoder Refresh Pictures.
• a Predictive picture may be one that may be coded and decoded using intra prediction or inter prediction using at most one motion vector and reference index to predict the sample values of each block.
• a Bi-directionally Predictive Picture may be one that may be coded and decoded using intra prediction or inter prediction using at most two motion vectors and reference indices to predict the sample values of each block.
• multiple-predictive pictures can use more than two reference pictures and associated metadata for the reconstruction of a single block.
• Source pictures commonly may be subdivided spatially into a plurality of sample blocks (for example, blocks of 4 x 4, 8 x 8, 4 x 8, or 16 x 16 samples each) and coded on a block-by- block basis.
• Blocks may be coded predictively with reference to other (already coded) blocks as determined by the coding assignment applied to the blocks’ respective pictures.
• blocks of I pictures may be coded non-predictively or they may be coded predictively with reference to already coded blocks of the same picture (spatial prediction or intra prediction).
• Pixel blocks of P pictures may be coded non-predictively, via spatial prediction or via temporal prediction with reference to one previously coded reference pictures.
• Blocks of B pictures may be coded non-predictively, via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures.
• the video coder 400 may perform coding operations according to a predetermined video coding technology or standard, such as ITU-T Rec. H.265. In its operation, the video coder 400 may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancies in the input video sequence.
• the coded video data therefore, may conform to a syntax specified by the video coding technology or standard being used.
• the transmitter 409 may transmit additional data with the encoded video.
• the source coder 403 may include such data as part of the coded video sequence. Additional data may comprise temporal/spatial/SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, Supplementary Enhancement Information (SEI) messages, Visual Usability Information (VUI) parameter set fragments, and so on.
• SEI Supplementary Enhancement Information
• VUI Visual Usability Information
• FIG. 5 illustrates intra prediction modes used in HEVC and JEM.
• the number of directional intra modes is extended from 33, as used in HEVC, to 65.
• the additional directional modes in JEM on top of HEVC are depicted as dotted arrows in Figure 1 (b), and the planar and DC modes remain the same.
• These denser directional intra prediction modes apply for all block sizes and for both luma and chroma intra predictions.
• the directional intra prediction modes as identified by dotted arrows, which is associated with an odd intra prediction mode index are called odd intra prediction modes.
• the directional intra prediction modes as identified by solid arrows, which are associated with an even intra prediction mode index, are called even intra prediction modes.
• the directional intra prediction modes, as indicated by solid or dotted arrows in Fig. 5 are also referred as angular modes.
• JEM a total of 67 intra prediction modes are used for luma intra prediction.
• an most probable mode (MPM) list of size 6 is built based on the intra modes of the neighboring blocks. If intra mode is not from the MPM list, a flag is signaled to indicate whether intra mode belongs to the selected modes.
• MPM most probable mode
• JEM-3.0 there are 16 selected modes, which are chosen uniformly as every fourth angular mode.
• JVET-D0114 and JVET-G0060 16 secondary MPMs are derived to replace the uniformly selected modes.
• Fig. 6 illustrates N reference tiers exploited for intra directional modes.
• the reference samples used for predicting the current block are restricted to a nearest reference line (row or column).
• the number of candidate reference lines (row or columns) are increased from one (i.e. the nearest) to N for the intra directional modes, where N is an integer greater than or equal to one.
• Fig. 2 takes 4x4 prediction unit (PU) as an example to show the concept of the multiple line intra directional prediction method.
• An intra-directi onal mode could arbitrarily choose one of N reference tiers to generate the predictors.
• the predictor p(x,y) is generated from one of the reference samples SI, S2, . .
• the reference lines 610, 609, 608 and 607 are composed of six segments 601, 602, 603, 604, 605 and 606 together with the top-left reference sample.
• a reference tier is also called a reference line.
• the coordinate of the top-left pixel within current block unit is (0,0) and the top left pixel in the 1st reference line is (-1,-1).
• the neighboring samples used for intra prediction sample generations are filtered before the generation process.
• the filtering is controlled by the given intra prediction mode and transform block size. If the intra prediction mode is DC or the transform block size is equal to 4x4, neighboring samples are not filtered. If the distance between the given intra prediction mode and vertical mode (or horizontal mode) is larger than predefined threshold, the filtering process is enabled.
• [1, 2, 1] filter and bi-linear filters are used for neighboring sample filtering.
• a position dependent intra prediction combination (PDPC) method is an intra prediction method which invokes a combination of the un-filtered boundary reference samples and HEVC style intra prediction with filtered boundary reference samples.
• Each prediction sample pred[x][y] located at (x, y) is calculated as follows: precZ[ where R x ,-i,R-i, y represent the unfiltered reference samples located at top and left of current sample (x, y), respectively, and R-i,-i represents the unfiltered reference sample located at the top-left corner of the current block.
• Fig. 7 illustrates a diagram 700 in which DC mode PDPC weights (wL, wT, wTL) for (0, 0) and (1, 0) positions inside one 4x4 block. If PDPC is applied to DC, planar, horizontal, and vertical intra modes, additional boundary filters are not needed, such as the HEVC DC mode boundary filter or horizontal/vertical mode edge filters.
• Fig. 7 illustrates the definition of reference samples Rx,-1, R-l,y and R-1,-1 for PDPC applied to the top-right diagonal mode.
• the prediction sample pred(x’, y’) is located at (x’, y’) within the prediction block.
• Fig. 8 illustrates a Local Illumination Compensation (LIC) diagram 800 and is based on a linear model for illumination changes, using a scaling factor a and an offset b. And it is enabled or disabled adaptively for each inter-mode coded coding unit (CU).
• LIC Local Illumination Compensation
• a least square error method is employed to derive the parameters a and b by using the neighboring samples of the current CU and their corresponding reference samples. More specifically, as illustrated in Figure 8, the subsampled (2: 1 subsampling) neighboring samples of the CU and the corresponding samples (identified by motion information of the current CU or sub-CU) in the reference picture are used. The IC parameters are derived and applied for each prediction direction separately.
• the LIC flag is copied from neighboring blocks, in a way similar to motion information copy in merge mode; otherwise, an LIC flag is signaled for the CU to indicate whether LIC applies or not.
• Fig. 9A illustrates intra prediction modes 900 used in HEVC.
• intra prediction modes there are total 35 intra prediction modes, among which mode 10 is horizontal mode, mode 26 is vertical mode, and mode 2, mode 18 and mode 34 are diagonal modes.
• the intra prediction modes are signaled by three most probable modes (MPMs) and 32 remaining modes.
• MPMs most probable modes
• Fig. 9B illustrates, in embodiments of VVC, there are total 87 intra prediction modes where mode 18 is horizontal mode, mode 50 is vertical mode, and mode 2, mode 34 and mode 66 are diagonal modes. Modes -1 ⁇ -10 and Modes 67 ⁇ 76 are called Wide-Angle Intra Prediction (WAIP) modes.
• WAIP Wide-Angle Intra Prediction
• nScale ( log2( width ) - 2 + log2( height ) - 2 + 2 ) » 2
• wT denotes the weighting factor for the reference sample located in the above reference line with the same horizontal coordinate
• wL denotes the weighting factor for the reference sample located in the left reference line with the same vertical coordinate
• wTL denotes the weighting factor for the top-left reference sample of the current block
• nScale specifies how fast weighting factors decrease along the axis (wL decreasing from left to right or wT decreasing from top to bottom), namely weighting factor decrement rate, and it is the same along x-axis
• each of the methods (or embodiments), encoder, and decoder may be implemented by processing circuitry (e.g., one or more processors or one or more integrated circuits).
• the one or more processors execute a program that is stored in a non-transitory computer-readable medium.
• the term block may be interpreted as a prediction block, a coding block, or a coding unit, i.e. CU.
• Fig. 10A illustrates an example 1000 of block partitioning by using QTBT
• Fig. 10B illustrates the corresponding tree representation 1001.
• the solid lines indicate quadtree splitting and dotted lines indicate binary tree splitting.
• each splitting (i.e., non-leaf) node of the binary tree one flag is signaled to indicate which splitting type (i.e., horizontal or vertical) is used, where 0 indicates horizontal splitting and 1 indicates vertical splitting.
• splitting type i.e., horizontal or vertical
• a CTU is split into CUs by using a quadtree structure denoted as coding tree to adapt to various local characteristics.
• the decision on whether to code a picture area using interpicture (temporal) or intra-picture (spatial) prediction is made at the CU level.
• Each CU can be further split into one, two or four PUs according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis.
• a CU can be partitioned into transform units (TUs) according to another quadtree structure like the coding tree for the CU.
• TUs transform units
• the QTBT structure removes the concepts of multiple partition types, i.e. it removes the separation of the CU, PU and TU concepts, and supports more flexibility for CU partition shapes.
• a CU can have either a square or rectangular shape.
• a coding tree unit (CTU) or CU, obtained at SI 1 is first partitioned by a quadtree structure at S12.
• the quadtree leaf nodes are further determined whether to be partitioned by a binary tree structure at S14, and if so, at S15, as described with Fig.
• coding units coding units
• segmentation is used for prediction and transform processing without any further partitioning.
• CU coding units
• TU coding units
• a CU sometimes consists of coding blocks (CBs) of different color components, e.g.
• one CU contains one luma CB and two chroma CBs in the case of P and B slices of the 4:2:0 chroma format and sometimes consists of a CB of a single component, e.g., one CU contains only one luma CB or just two chroma CBs in the case of I slices.
• - CTU size the root node size of a quadtree, the same concept as in HEVC,
• - MaxBTDepth the maximum allowed binary tree depth
• - MinBTSize the minimum allowed binary tree leaf node size
• the CTU size is set as 128x 128 luma samples with two corresponding 64x64 blocks of chroma samples
• the MinQTSize where QT is Quad Tree
• the MaxBTSize is set as 64x64
• the MinBTSize (for both width and height) is set as 4x4
• the MaxBTDepth is set as 4.
• the quadtree partitioning is applied to the CTU first to generate quadtree leaf nodes at S 12 or SI 5.
• the quadtree leaf nodes may have a size from 16x 16 (i.e., the MinQTSize) to 128x 128 (i.e., the CTU size).
• the quadtree leaf node is also the root node for the binary tree and it has the binary tree depth as 0.
• MaxBTDepth i.e., 4
• no further splitting is considered at S14.
• MinBTSize i.e., 4
• no further horizontal splitting is considered at S14.
• no further vertical splitting is considered at S14.
• Signals at S16 are provided, as discussed below with respect to syntaxes which describe QT/TT/BT size, for the procession such as for the leaf nodes of the binary tree that are further processed by prediction and transform processing, at S17 and similarly as discussed herein with respect to such prediction and transform processing, without any further partitioning.
• Such signaling may also be provided at S13 after S12 as shown in Fig. 11 according to exemplary embodiments.
• the maximum CTU size is 256x256 luma samples.
• a QTBT scheme supports the ability/flexibility for the luma and chroma to have a separate QTBT structure.
• the luma and chroma coding tree blocks (CTBs) in one CTU share the same QTBT structure.
• the luma CTB is partitioned into CUs by a QTBT structure, and the chroma CTBs are partitioned into chroma CUs by another QTBT structure.
• a CU in an I slice consists of a coding block of the luma component or coding blocks of two chroma components
• a CU in a P or B slice consists of coding blocks of all three color components.
• inter prediction for small blocks is restricted to reduce the memory access of motion compensation, such that bi-prediction is not supported for 4x8 and 8x4 blocks, and inter prediction is not supported for 4x4 blocks.
• these restrictions are removed.
• Fig. IOC represents a simplified block diagram 1100 VVC with respect to a Multi -type- tree (MTT) structure 1002 that is included, which is a combination of the illustrated a quadtree (QT) with nested binary trees (BT) and triple- / ternary trees (TT), a QT/BT/TT.
• a CTU or CU is first partitioned recursively by a QT into square shaped blocks.
• Each QT leaf may then be further partitioned by a BT or TT, where BT and TT splits can be applied recursively and interleaved but no further QT partitioning can be applied.
• the TT splits a rectangular block vertically or horizontally into three blocks using a 1 :2: 1 ratio (thus avoiding non-power-of-two widths and heights).
• additional split constraints are typically imposed on the MTT, as shown in the simplified diagram 1002 of Fig. 10C, QT/BT/TT block partitioning in VVC, with respect to blocks 1103 (quad), 1104 (binary, JEM), and 1105 (ternary) to avoid duplicated partitions (e.g. prohibiting a vertical/horizontal binary split on the middle partition resulting from a vertical/horizontal ternary split).
• Further limitations may be set to the maximum depth of the BT and TT.
• triple-tree partitioning is able to capture objects which locate in block center while quad-tree and binary-tree are always splitting along block center, and the width and height of the partitions of the proposed triple trees are always power of 2 so that no additional transforms are needed.
• FIG. 11 shows an example 1100 of block partitioning in VP9 and AVI, where an example coding tree unit (CTU) 1111 of VP9 shows that VP9 uses a 4-way partition tree starting from the 64x64 level 1112 down to 4x4 level 1113, with some additional restrictions for blocks 8x8 and below as shown in the top half of level 1113.
• partitions designated as R refer to as recursive in that the same partition tree is repeated at a lower scale until there is reached a lowest 4x4 level.
• An example CTU 1104 of AVI not only expands the partition-tree to a 10-way structure 1116, but also increases the largest size (referred to as superblock in VP9/AV1 parlance) to start from a 128x128 level 1115. Note that this includes 4: 1/1 :4 rectangular partitions that did not exist in VP9. And none of the rectangular partitions can be further subdivided. In addition, AVI adds more flexibility to the use of partitions below 8x8 level, in the sense that 2x2 chroma inter prediction become possible on certain cases.
• a coding tree unit may be split into coding units (CUs) by using a quadtree structure denoted as coding tree to adapt to various local characteristics.
• the decision on whether to code a picture area using inter-picture (temporal) or intra-picture (spatial) prediction is made at the CU level.
• Each CU can be further split into one, two or four prediction units (PUs) according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis.
• a CU After obtaining the residual block by applying the prediction process based on the PU splitting type, a CU can be partitioned into transform units (TUs) according to another quadtree structure like the coding tree for the CU.
• transform units transform units
• a CU or a TU can only be square shape, while a PU may be square or rectangular shape for an inter predicted block.
• one coding block may be further split into four square sub-blocks, and transform is performed on each subblock, i.e., TU.
• Each TU can be further split recursively (using quadtree split) into smaller TUs, which is called Residual Quad-Tree (RQT).
• RQT Residual Quad-Tree
• HEVC employs implicit quad-tree split so that a block will keep quad-tree splitting until the size fits the picture boundary.
• Fig. 12 shows an example 1200 related to a merge mode with motion vector difference (MMVD) according to exemplary embodiments.
• MMVD merge mode with motion vector differences
• the merge mode with motion vector differences (MMVD) is introduced in VVC.
• a MMVD flag may be signaled right after sending a skip flag and merge flag to specify whether MMVD mode is used for a CU.
• MMVD after a merge candidate is selected, it is further refined by the signaled motion vector differences (MVDs) information such that the further information includes a merge candidate flag, an index to specify motion magnitude, and an index for indication of motion direction.
• MMVD mode one for the first two candidates in the merge list is selected to be used as MV basis.
• the merge candidate flag may be signaled to specify which one is used.
• a distance index specifies motion magnitude information and indicates the pre-defined offset from the starting point.
• Fig. 12 shows an L0 reference 1201 and LI reference 1202 where an offset is added to either horizontal component or vertical component of starting MV.
• a direction index represents the direction of the MVD relative to the starting point.
• the direction index can represent of the four directions as shown in Table 2, below.
• the meaning of an MVD sign could be variant according to the information of starting MVs. For example, when the starting MVs is an uni -prediction MV or biprediction MVs with both lists point to the same side of the current picture (i.e. (picture order counts (POCs) of two references are both larger than the POC of the current picture, or are both smaller than the POC of the current picture), the sign in Table 2 specifies the sign of MV offset added to the starting MV.
• POCs picture order counts
• the sign in Table 2 specifies the sign of MV offset added to the listO MV component of starting MV and the sign for the listl MV has opposite value. Otherwise, if the difference of POC in list 1 is greater than list 0, the sign in Table 2 specifies the sign of MV offset added to the listl MV component of starting MV and the sign for the listO MV has opposite value.
• an MVD may be scaled according to the difference of POCs in each direction. If the differences of POCs in both lists are the same, no scaling is needed. Otherwise, if the difference of POC in list 0 is larger than the one of list 1, the MVD for list 1 is scaled. If the POC difference of LI is greater than LO, the MVD for list 0 is scaled in the same way. If the starting MV is uni -predicted, the MVD is added to the available MV.
• an MVD may be scaled according to the difference of POCs in each direction. If the differences of POCs in both lists are the same, no scaling is needed. Otherwise, if the difference of POC in list 0 is larger than the one of list 1, the MVD for list 1 is scaled. If the POC difference of LI is greater than LO, the MVD for list 0 is scaled in the same way. If the starting MV is uni -predicted, the MVD is added to the available MV.
• symmetric MVD mode for bidirectional MVD signalling may be applied.
• motion information including reference picture indices of both list-0 and list-1 and MVD of list-1 are not signaled but derived.
• the decoding process of the symmetric MVD mode is as follows:
• variables BiDirPredFlag, RefldxSymLO and RefldxSymLl are derived as follows:
• BiDirPredFlag is set equal to 0.
• BiDirPredFlag is set to 1
• both list-0 and list-1 reference pictures are short-term reference pictures. Otherwise BiDirPredFlag is set to 0. 2.
• a symmetrical mode flag indicating whether symmetrical mode is used or not is explicitly signaled if the CU is bi-prediction coded and BiDirPredFlag is equal to 1.
• inter mode coding in CWG-B018 where in AVI, for each coded block in inter frame, if the mode of current block is not skip mode but inter-coded mode, then another flag is signaled to indicate whether single reference mode or compound reference mode is used to current block, wherein prediction block is generated by one motion vector in single reference mode whereas prediction block is generated by weighted averaging two prediction blocks derived from two motion vectors in compound reference mode.
• NEARMV - use one of the motion vector predictors (MVP) in the list indicated by a DRL (Dynamic Reference List) index
• NEWMV - use one of the motion vector predictors (MVP) in the list signaled by a DRL index as reference and apply a delta to the MVP.
• MVP motion vector predictors
• GLOB ALMV - use a motion vector based on frame-level global motion parameters
• NEAR_NEARMV - use one of the motion vector predictors (MVP) in the list signaled by a DRL index.
• MVP motion vector predictors
• NEAR_NEWMV use one of the motion vector predictors (MVP) in the list signaled by a DRL index as reference and send a delta MV for the second MV.
• NEW_NEARMV use one of the motion vector predictors (MVP) in the list signaled by a DRL index as reference and send a delta MV for the first MV.
• NEW_NEWMV - use one of the motion vector predictors (MVP) in the list signaled by a DRL index as reference and send a delta MV for both MVs.
• MVP motion vector predictors
• GLOBAL GLOBALMV - use MVs from each reference based on their framelevel global motion parameters
• AVI allows 1/8 pixel motion vector precision (or accuracy)
• mv Joint specifies which components of the motion vector difference are non-zero:
• mv_sign specifies whether motion vector difference is positive or negative
• mv class specifies the class of the motion vector difference, (As shown in Table 3, a higher class means that the motion vector difference has a larger magnitude.)
• Table 3 Magnitude class for motion vector difference mv bit specifies the integer part of the offset between motion vector difference and starting magnitude of each MV class, mv fr specifies the first 2 fractional bits of the motion vector difference, and mv hp specifies the third fractional bit of the motion vector difference.
• fractional MVD may be allowed only if MVD magnitude is equal to or less than one-pixel.
• only one MVD value may be allowed when the value of the associated MV class is equal to or greater than MV CLASS l, and the MVD value in each MV class is derived as 4, 8, 16, 32, 64 for MV class 1 (MV_CLASS_1), 2 (MV_CLASS_2), 3 (MV_CLASS_3), 4 (MV_CLASS_4), or 5 (MV_CLASS_5) .
• the allowed MVD values in each MV class are illustrated in Table 4:
• joing MVD coding JMVD
• JMVD joing MVD coding
• a new inter coded mode named as JOINT _NEWMV
• MVDs for reference list 0 and reference list 1 are jointly signaled. So, only one MVD, named as joint mvd, may be signaled and transmitted to the decoder, and the delta MVs for reference list 0 and reference list 1 are derived from joint mvd.
• a JOINT NEWMV mode may be signaled together with NEAR_NEARMV, NEAR NEWMV, NEW NEARMV, NEW NEWMV, and GLOBAL GLOBALMV mode. No additional contexts are added according to exemplary embodiments.
• MVD is scaled for reference list 0 or reference list 1 based on the POC distance.
• the distance between reference frame list 0 and current frame is noted as tdO and the distance between reference frame list 1 and current frame is noted as tdl . If tdO is equal to or larger than tdl, joint mvd is directly used for reference list 0 and the mvd for reference list 1 is derived from joint mvd based on the equation (1).
• joint mvd is directly used for reference list 1 and the mvd for reference list 0 is derived from joint mvd based on the equation (2).
• adapative MVD resolution in CWG-C011 where a new inter coded mode, named as AMVDMV, may be added to a single reference case.
• AMVDMV mode When an AMVDMV mode is selected, that selection indicates that AMVD is applied to signal MVD.
• One flag, named as amvd flag, may be added under
• JOINT NEWMV mode to indicate whether AMVD is applied to joint MVD coding mode or not.
• MVD for two reference frames are jointly signaled and the precision of MVD is implicitly determined by MVD magnitudes. Otherwise, MVD for two (or more than two) reference frames are jointly signaled, and other MVD coding may be applied.
• AMVR adaptive motion vector resolution
• CWG-C012 and CWG-C020 there may be used adaptive motion vector resolution (AMVR) in CWG-C012 and CWG-C020.
• the AMVR of CWG-C012 includes total 7 motion vector (MV) precisions ( 8, 4, 2, 1, ’A, 14, 14) are supported.
• MV motion vector
• an adaptive AMVR encoder may search all the supported precision values and signal the best precision to the decoder.
• two precision sets are supported. Each precision set contains 4-predefined precisions.
• the precision set is adaptively selected at the frame level based on the value of maximum precision of the frame. Same as AVI, the maximum precision is signaled in the frame header.
• Table 5 summarizes the supported precision values based on the frame level maximum precision:
• the direction of a reference frame is determined by whether the reference frame is prior to current frame in display order or after current frame in display order.
• x-axis and y-axis refers to the horizontal and vertical component of a 2-D value, but those terms can be replaced by another two axes along two pre-defined directions that are perpendicular to each other, and the same embodiments described herein also apply.
• x-axis and y-axis can be replaced by 45-degree axis and 135-degree axis.
• Fig. 13 shows a flowchart 1300 in which at S130 there is an obtaining of a coding block of video data, and at S131 it may be determined which mode is selected for that block. For example, according to exemplary embodiments, where it is determined that JMVD mode is selected for one block, then flexible scaling factors may be used at S133 to derive, at S135, the MVD for reference frame list 0 and/or 1 from the signaled joint MVD based on the signaled scaling factors in the bitstream or the coded information of current block (or neighboring blocks). The flexible scaling factors may be applied to one or more components of the MVD along one or more pre-defined directions jointly or separately.
• the pre-defined directions of the MVD refers to the MVD component along x-axis and/or y-axis.
• the MVD for reference frame list 0 or 1 is derived at S 135 from the signaled joint MVD based on the distance between reference frames and current frame, and/or the scaling factors for JMVD mode.
• the signaled/derived flag indicates that the scaling factor is not equal to a first pre-defined default value (e.g., 1).
• This associated scaling factor for the signaled flag may then be used, at S135, to derive the MVD from joint MVD for one of the reference frames.
• the scaling factor used for deriving the MVD of the other reference frames is set to a second pre-defined default value (e.g., 1).
• At S 131 when, at S 131, it is determined that a current block is coded as JMVD mode, at least one flag may be signaled at S136 into the bitstream to indicate the scaling factors for the component of the MVD along one or more pre-defined directions.
• the component of the MVD along one or more pre-defined directions refers to the MVD component along x-axis and/or y-axis.
• the scaling factors for both x-axis and y-axis may be determined to be equal at S133 and S134.
• a flag such as jmvd scale factor flag
• jmvd scale factor flag may be signaled at S136 to indicate the scaling factors for deriving MVD.
• the jmvd scale factor flag indicates that the value of scaling factor is not equal to 1
• another flag named as scale factor dir, may be signaled to indicate whether the scaling factors are applied to x-axis, or y-axis, or both x-axis and y-axis of MVD.
• the scaling factors for both x-axis and y-axis are equal at S133 and 134.
• a flag such as scale factor dir
• jmvd scale factor flag is signaled to indicate the value of scaling factors for deriving MVD.
• a flag such as jmvd scale factor flag
• a flag may be signaled to indicate the index in a scaling factor look-up table for deriving MVD.
• each entry in this scaling factor look-up table specifies the value of a scaling factor for x-axis or y-axis.
• the order of the entries in the look-up table can be fixed, pre-defined depending on statistics or other rules, or depending on decoder side searching algorithm such as template-matching or bilateral matching (i.e. template-matching-based/bilateral-matching-based reordering).
• Table 6 One example of the scaling factor look-up table is shown in Table 6:
• a flag such as jmvd scale factor equal to one, may be coded and indicate that the scaling factor and direction of the joined MVD. That is, if flag jvmd scale factor equal to one equals to one value (e.g., 1), the scaling factor is set equal to one at S133, and this factor is applied to both horizontal (x-axis) and vertical (y-axis) at S134. Otherwise, if the flag jmvd scale factor equal to one equals to the other value (e.g., 0), an additional jmvd scaling dir syntax element is signaled.
• one value e.g. 1
• the scaling factor for different directions can be obtained.
• the order of the entries in the look-up table can be fixed, pre-defined depending on statistics or other rules, or depending on decoder side searching algorithm such as template-matching or bilateral matching (i.e. template-matching-based/bilateral-matching-based reordering).
• Table 7 scaling factor look-up table
• a context for signaling the jmvd scale factor flag and/or scale factor dir depends on the encoded information of current block or neighboring blocks, such as the block size of current block, or MVP of current block, or whether the coding mode of current block is joint AMVD (or AMVR) coding mode or not, or the MVD of neighboring blocks, or coding mode of neighboring blocks.
• the values of scaling factor may be restricted to two to power of n, wherein n can be 0 or positive integers or negative integers.
• the values of scaling factors may be restricted to ⁇ 1, 2 ⁇ , or the values of scaling factors are restricted to ⁇ 1, ’A, 2 ⁇ .
• the values of scaling factor can be m/M, where M is two to power of n, and m is an integer. And the values of scaling factors are restricted to ⁇ 1/8, 2/8, 3/8, 4/8, ..., 15/8. 16/8 ⁇ .
• a scaling process of MVD is the same as the method described in US 63/328,062, filed April 6, 2022, which is incorporated herein in its entirety.
• the scaling factors can be derived at S 133 based on coded information, including, but not limited to quantization step size or quantization parameter, block size, the difference/relation between MVPO and MVP1, motion vector prediction blocks, of current block, MVD class, reference picture, MVD scaling factor of neighboring blocks.
• coded information including, but not limited to quantization step size or quantization parameter, block size, the difference/relation between MVPO and MVP1, motion vector prediction blocks, of current block, MVD class, reference picture, MVD scaling factor of neighboring blocks.
• one syntax may be signaled at S136 at the high-level syntax to indicate whether jmvd scale factor flag and/or scale factor dir need(s) to be signaled in the bitstream or not.
• the high-level syntax includes but not limited to the sequence header, frame header, and slice header.
• any other processing described above may occur according to other modes at S132, and additional processing may occur at S137 similarly according to any of the processing modes described herein. Additionally, getting a coding block at SI 30 after reaching the processing SI 37 may be dependent in an interactive manner on prior processing of prior coding blocks.
• FIG. 14 shows a computer system 1400 suitable for implementing certain embodiments of the disclosed subject matter.
• the computer software can be coded using any suitable machine code or computer language, that may be subject to assembly, compilation, linking, or like mechanisms to create code comprising instructions that can be executed directly, or through interpretation, micro-code execution, and the like, by computer central processing units (CPUs), Graphics Processing Units (GPUs), and the like.
• CPUs central processing units
• GPUs Graphics Processing Units
• the instructions can be executed on various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, internet of things devices, and the like.
• FIG. 14 for computer system 1400 are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing embodiments of the present disclosure. Neither should the configuration of components be interpreted as having any dependency or requirement relating to any one or combination of components illustrated in the exemplary embodiment of a computer system 1400.
• Computer system 1400 may include certain human interface input devices.
• a human interface input device may be responsive to input by one or more human users through, for example, tactile input (such as: keystrokes, swipes, data glove movements), audio input (such as: voice, clapping), visual input (such as: gestures), olfactory input (not depicted).
• the human interface devices can also be used to capture certain media not necessarily directly related to conscious input by a human, such as audio (such as: speech, music, ambient sound), images (such as: scanned images, photographic images obtain from a still image camera), video (such as two-dimensional video, three-dimensional video including stereoscopic video).
• Input human interface devices may include one or more of (only one of each depicted): keyboard 1401, mouse 1402, trackpad 1403, touch screen 1410, joystick 1405, microphone 1406, scanner 1408, camera 1407.
• Computer system 1400 may also include certain human interface output devices.
• Such human interface output devices may be stimulating the senses of one or more human users through, for example, tactile output, sound, light, and smell/taste.
• Such human interface output devices may include tactile output devices (for example tactile feedback by the touch-screen 1410, or joystick 1405, but there can also be tactile feedback devices that do not serve as input devices), audio output devices (such as: speakers 1209, headphones (not depicted)), visual output devices (such as screens 1410 to include CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch-screen input capability, each with or without tactile feedback capability — some of which may be capable to output two dimensional visual output or more than three dimensional output through means such as stereographic output; virtual-reality glasses (not depicted), holographic displays and smoke tanks (not depicted)), and printers (not depicted).
• tactile output devices for example tactile feedback by the touch-screen 1410, or joystick 1405, but there can also be tactile feedback devices that do not
• Computer system 1400 can also include human accessible storage devices and their associated media such as optical media including CD/DVD ROM/RW 1420 with CD/DVD 1411 or the like media, thumb-drive 1422, removable hard drive or solid state drive 1423, legacy magnetic media such as tape and floppy disc (not depicted), specialized ROM/ASIC/PLD based devices such as security dongles (not depicted), and the like.
• optical media including CD/DVD ROM/RW 1420 with CD/DVD 1411 or the like media, thumb-drive 1422, removable hard drive or solid state drive 1423, legacy magnetic media such as tape and floppy disc (not depicted), specialized ROM/ASIC/PLD based devices such as security dongles (not depicted), and the like.
• legacy magnetic media such as tape and floppy disc (not depicted)
• specialized ROM/ASIC/PLD based devices such as security dongles (not depicted), and the like.
• computer readable media as used in
• Computer system 1400 can also include interface 1499 to one or more communication networks 1498.
• Networks 1498 can for example be wireless, wireline, optical.
• Networks 1498 can further be local, wide-area, metropolitan, vehicular and industrial, real-time, delay-tolerant, and so on.
• Examples of networks 1498 include local area networks such as Ethernet, wireless LANs, cellular networks to include GSM, 3G, 4G, 5G, LTE and the like, TV wireline or wireless wide area digital networks to include cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial to include CANBus, and so forth.
• Certain networks 1498 commonly require external network interface adapters that attached to certain general-purpose data ports or peripheral buses (1450 and 1451) (such as, for example USB ports of the computer system 1400; others are commonly integrated into the core of the computer system 1400 by attachment to a system bus as described below (for example Ethernet interface into a PC computer system or cellular network interface into a smartphone computer system).
• computer system 1400 can communicate with other entities.
• Such communication can be uni-directional, receive only (for example, broadcast TV), uni-directional send-only (for example CANbusto certain CANbus devices), or bi-directional, for example to other computer systems using local or wide area digital networks.
• Certain protocols and protocol stacks can be used on each of those networks and network interfaces as described above.
• the core 1440 can include one or more Central Processing Units (CPU) 1441, Graphics Processing Units (GPU) 1442, a graphics adapter 1417, specialized programmable processing units in the form of Field Programmable Gate Areas (FPGA) 1443, hardware accelerators for certain tasks 1444, and so forth.
• CPU Central Processing Unit
• GPU Graphics Processing Unit
• FPGA Field Programmable Gate Areas
• system bus 1448 can be accessible in the form of one or more physical plugs to enable extensions by additional CPUs, GPU, and the like.
• peripheral devices can be attached either directly to the core’s system bus 1448, or through a peripheral bus 1451.
• Peripheral bus for a peripheral bus
• PCI Peripheral Component Interconnect Express
• CPUs 1441, GPUs 1442, FPGAs 1443, and accelerators 1444 can execute certain instructions that, in combination, can make up the aforementioned computer code. That computer code can be stored in ROM 1445 or RAM 1446. Transitional data can be also be stored in RAM 1446, whereas permanent data can be stored for example, in the internal mass storage 1447. Fast storage and retrieval to any of the memory devices can be enabled through the use of cache memory, that can be closely associated with one or more CPU 1441, GPU 1442, mass storage 1447, ROM 1445, RAM 1446, and the like.
• the computer readable media can have computer code thereon for performing various computer-implemented operations.
• the media and computer code can be those specially designed and constructed for the purposes of the present disclosure, or they can be of the kind well known and available to those having skill in the computer software arts.
• the computer system having architecture 1400, and specifically the core 1440 can provide functionality as a result of processor(s) (including CPUs, GPUs, FPGA, accelerators, and the like) executing software embodied in one or more tangible, computer-readable media.
• processor(s) including CPUs, GPUs, FPGA, accelerators, and the like
• Such computer-readable media can be media associated with user-accessible mass storage as introduced above, as well as certain storage of the core 1440 that are of non-transitory nature, such as core-internal mass storage 1447 or ROM 1445.
• the software implementing various embodiments of the present disclosure can be stored in such devices and executed by core 1440.
• a computer-readable medium can include one or more memory devices or chips, according to particular needs.
• the software can cause the core 1440 and specifically the processors therein (including CPU, GPU, FPGA, and the like) to execute particular processes or particular parts of particular processes described herein, including defining data structures stored in RAM 1446 and modifying such data structures according to the processes defined by the software.
• the computer system can provide functionality as a result of logic hardwired or otherwise embodied in a circuit (for example: accelerator 1444), which can operate in place of or together with software to execute particular processes or particular parts of particular processes described herein.
• Reference to software can encompass logic, and vice versa, where appropriate.
• Reference to a computer- readable media can encompass a circuit (such as an integrated circuit (IC)) storing software for execution, a circuit embodying logic for execution, or both, where appropriate.
• the present disclosure encompasses any suitable combination of hardware and software.

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• 2022
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