WO2023208027A1

WO2023208027A1 - Information processing method and information processing unit, and device, medium and product

Info

Publication number: WO2023208027A1
Application number: PCT/CN2023/090799
Authority: WO
Inventors: 吴臻志; 祝夭龙
Original assignee: 北京灵汐科技有限公司
Priority date: 2022-04-29
Filing date: 2023-04-26
Publication date: 2023-11-02

Abstract

The present disclosure relates to an information processing method and apparatus, and a device, a medium and a product. The information processing method can be applied to a many-core system, wherein at least some of the processing cores of the many-core system are loaded with neurons of a neural network. The information processing method comprises: dynamically scheduling a storage resource according to issuance information of a neuron, such that the neuron executes issuance processing on the basis of the scheduled storage resource, and/or, dynamically scheduling a computing resource according to issuance information of a neuron, such that the neuron executes a computing task on the basis of the scheduled computing resource, wherein the storage resource comprises an on-chip storage space of the many-core system and/or an extra storage space outside the many-core system.

Description

Information processing methods and processing units, equipment, media, and products

Technical field

Embodiments of the present disclosure relate to the field of computer technology, and in particular, to an information processing method and processing unit, electronic equipment, computer-readable storage media, and computer program products.

Background technique

Artificial intelligence is the study of using computers to simulate certain human thinking processes and intelligent behaviors (such as learning, reasoning, thinking or planning, etc.). It mainly includes the principles of computer realization of intelligence, the manufacture of computers similar to human brain intelligence, and the use of Computers can achieve higher-level applications. With the continuous development of artificial intelligence technology, the application of neural networks is becoming more and more widespread, and neural networks in artificial intelligence technology can be constructed from a large number of neurons.

Contents of the invention

Embodiments of the present disclosure provide an information processing method and processing unit, electronic equipment, computer-readable storage media, and computer program products.

In a first aspect, embodiments of the present disclosure provide an information processing method, which is applied to a many-core system. At least part of the processing cores of the many-core system are loaded with neurons of a neural network. The information processing method including: dynamically scheduling storage resources according to the issuance information of the neuron, so that the neuron performs issuance processing based on the scheduled storage resources, and/or dynamically scheduling computing resources according to the issuance information of the neuron, For the neurons to perform computing tasks based on the scheduled computing resources; wherein the storage resources include on-chip storage space of the many-core system and/or additional storage space outside the many-core system.

In some embodiments, the weight information of the sparse neurons of the neural network is stored in an additional storage space outside the many-core system, and the weight information of the non-sparse neurons of the neural network is stored in the many-core system. On-chip storage space, the neural network neuron information storage method includes: determining whether the neuron is a sparse neuron or a non-sparse neuron at the current moment according to the recent firing activity of the neuron of the neural network; If the current moment is a sparse neuron, and the neuron was a non-sparse neuron at the moment before the current moment, the weight information of the neuron is transferred from the on-chip storage space of the many-core system to the many-core system. Additional storage space outside the system; when the neuron is a non-sparse neuron at the current time, and the neuron was a sparse neuron at the time before the current time, the weight information of the neuron is obtained from the public The additional storage space outside the core system is transferred to the on-chip storage space of the many-core system.

In some embodiments, when the first neuron satisfies the conditions related to firing, it is determined whether there is information required for firing processing of the first neuron in the processing core, and the first neuron is loaded in the firing core. Any one of the neurons of the processing core; when there is no information required for the firing processing of the first neuron in the processing core, obtain the third from an external storage space outside the many-core system. Information required for firing processing of a neuron; storing the information required for firing processing in the processing core, and performing operations corresponding to firing-related conditions satisfied by the first neuron.

In some embodiments, the calculation amount of each of the multiple calculation nodes within a predetermined time period is determined; when the calculation amount among the various calculation nodes is unbalanced, at least one nerve in the calculation node that is overloaded with the calculation amount is The computing task of the element is transferred to the target computing node, where the target computing node is a computing node that satisfies preset conditions and is not overloaded in computing capacity.

In some embodiments, the synaptic information of the synapse connected to the current computing node is determined. The synaptic information includes the position information of the successor neuron of the neuron corresponding to the current computing node, and the position information of the neuron corresponding to the current computing node. Synaptic weight; send the synaptic weight of the neuron corresponding to the current computing node to the computing node corresponding to the subsequent neuron, so that the computing node corresponding to the subsequent neuron can perform synaptic integral calculation, wherein, when there is a task transfer notification When at least part of the position information of the subsequent neurons is carried by the task transfer notification, and the task transfer notification is a task transfer notification generated by executing any one of the information processing methods described in the embodiments of the present disclosure.

In a second aspect, embodiments of the present disclosure provide an information processing unit, which is applied to a many-core system. At least part of the processing cores of the many-core system are loaded with neurons of a neural network. The information processing unit It includes: a dynamic scheduling subunit configured to dynamically schedule storage resources according to the issuance information of the neuron, so that the neuron can perform issuance processing based on the scheduled storage resources, and/or, according to the neuron's issuance information. Release information and dynamically schedule computing resources for the neurons to perform computing tasks based on the scheduled computing resources; wherein the storage resources include on-chip storage space of the many-core system and/or external storage space of the many-core system of additional storage space.

In some embodiments, the weight information of the sparse neurons of the neural network is stored in an additional storage space outside the many-core system, and the weight information of the non-sparse neurons of the neural network is stored in the many-core system. On-chip storage space, the dynamic scheduling subunit includes: a neural network neuron information storage device; the neural network neuron information storage device includes: a judgment module configured to be active according to the recent release of neurons of the neural network Determine whether the neuron at the current moment is a sparse neuron or a non- Sparse neuron; the first execution module is configured to change the weight of the neuron when the neuron is a sparse neuron at the current moment and the neuron is a non-sparse neuron at the moment before the current moment. Information is transferred from the on-chip storage space of the many-core system to an additional storage space outside the many-core system; the second execution module is configured to be a non-sparse neuron at the current moment of the neuron, and the neuron When there are sparse neurons at the time before the current time, the weight information of the neurons is transferred from the external storage space outside the many-core system to the on-chip storage space of the many-core system.

In some embodiments, the dynamic scheduling subunit includes: a neural network neuron information processing device; the neural network neuron information processing device includes: a judgment module configured to: , determine whether there is information required for the firing processing of the neuron in the processing core, and the neuron is any one of the neurons loaded in the processing core; the acquisition module is configured to When the information required for the firing processing of the neuron does not exist in the system, the information required for the firing processing of the neuron is obtained from an external storage space outside the many-core system; the execution module is configured to transfer the firing Information required for processing is stored in the processing core, and operations corresponding to firing-related conditions satisfied by the neuron are performed.

In some embodiments, the dynamic scheduling subunit includes: a scheduling device for computing resources; the scheduling device for computing resources includes: a computing amount determination module configured to determine the time of each computing node among multiple computing nodes. The amount of calculation within a predetermined time period; the task transfer module is configured to transfer the calculation task of at least one neuron in the calculation node with overloaded calculation amount to Target computing node, wherein the target computing node is a computing node that meets preset conditions and is overloaded with calculations.

In some embodiments, the dynamic scheduling subunit includes: a data processing device; the data processing device includes: an associated synapse information determination module configured to determine synapse information of a synapse connected to the current data processing device , the synaptic information includes the position information of the successor neuron of the neuron corresponding to the current data processing device and the synaptic weight of the neuron corresponding to the current data processing device; the sending module is configured to send the neuron corresponding to the current data processing device. The synaptic weight of the neuron is sent to the computing node corresponding to the succeeding neuron, so that the computing node corresponding to the succeeding neuron performs synaptic integral calculation, wherein, in the case of a task transfer notification, at least some of the succeeding neurons The location information of the element is carried by the task transfer notification.

In a third aspect, an embodiment of the present disclosure provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the embodiment of the present disclosure is implemented. Any information processing method.

In a fourth aspect, embodiments of the present disclosure provide a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, any information processing method of the embodiments of the disclosure is implemented.

In a sixth aspect, embodiments of the present disclosure provide a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code, wherein when the computer-readable code is in a processor of an electronic device When running, the processor in the electronic device executes the information processing method described in any one of the embodiments of the present disclosure.

It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not restrictive of the disclosure. Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings.

Description of drawings

Figure 1 is a flow chart of an information processing method provided by an embodiment of the present disclosure.

FIG. 2 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

FIG. 3 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 4a is a schematic coordinate diagram of the firing value of a neuron changing with time.

Figure 4b is a schematic coordinate diagram of neuron activity changing with time.

FIG. 5 is a schematic diagram of a many-core system loaded with neural networks provided by an embodiment of the present disclosure.

FIG. 6 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 7 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

FIG. 8 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 9 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 10 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 11 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 12 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 13 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 14 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 15 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure.

Figure 16 is a schematic diagram of a neural network provided by an embodiment of the present disclosure.

Figure 17 is a block diagram of an information processing unit provided by an embodiment of the present disclosure.

Figure 18 is a block diagram of a neural network neuron information storage device provided by an embodiment of the present disclosure.

Figure 19 is a block diagram of a neural network neuron information processing device provided by an embodiment of the present disclosure.

Figure 20 is a block diagram of a computing resource scheduling device provided by an embodiment of the present disclosure.

Figure 21 is a block diagram of a data processing device provided by an embodiment of the present disclosure.

Figure 22 is a block diagram of an electronic device provided by an embodiment of the present disclosure.

Figure 23 is a block diagram of a computer-readable storage medium provided by an embodiment of the present disclosure.

Detailed ways

The present disclosure will be further described in detail below in conjunction with the accompanying drawings and examples. It can be understood that the specific embodiments described here are only used to explain the present disclosure, but not to limit the present disclosure. It should also be noted that, for convenience of description, only some but not all structures related to the present disclosure are shown in the drawings.

The neural network in artificial intelligence technology is composed of a large number of neurons. Each neuron can connect to other neurons. The connection strength between neurons is represented by the connection weight, and any neuron can send corresponding signals to the target neuron, so that After receiving the emitted signal, the target neuron performs corresponding processing based on the connection weight and the emitted signal. The storage of connection weights and target neurons and other related information (for example, the processing core information corresponding to the neuron's successor neuron and the connection weight value of the neuron and its predecessor neuron) requires a large amount of storage space. How to optimize the storage of the above information? Become one of the practical problems faced.

In some related technologies, neural networks can be executed through processing chips. For example, the neural network can be loaded on a many-core system. Since the connection weights of the neural network need to occupy storage space, when the neural network is loaded on a many-core system ,The connection weight can be stored in the on-chip ,storage space of the many-core system or in the additional ,storage space outside the many-core system. Similarly, the relevant information of the target neuron can be stored in the on-chip storage space of the many-core system, or in an external storage space outside the many-core system.

If the above related information (for example, connection weights) is stored in the on-chip storage space of the many-core system, due to the limited capacity of the on-chip storage space of the many-core system, in order to ensure that all relevant information can be stored, some information may need to be sacrificed (for example, Reduce the accuracy of connection weights), which may affect the performance of the neural network. Moreover, during the operation of the neural network, when the neurons meet the conditions related to firing and the information required for neuron firing processing is required, the information required for neuron firing processing is stored in the on-chip storage space (for example, processing (inside the core) may cause the storage cost of the many-core system to be too high, which may affect the power consumption of the processing core. At the same time, due to the limited on-chip storage space, if all the information required for neuron firing processing is stored in the on-chip storage space, Then the processing core requires larger storage space, and its size (i.e. area) will inevitably be affected.

If the above-mentioned relevant information (for example, connection weights) is stored in an additional storage space outside the many-core system with larger storage space, although part of the on-chip storage space of the many-core system can be released, every time the relevant information is used (for example, neurons When executing issuance processing), many-core systems need to read relevant information from the external storage space. Reading relevant information from the external storage space is expensive in terms of power consumption and takes up a large amount of bandwidth, which not only increases the time required to read information The cost of power consumption will also affect the processing speed and efficiency of the neural network.

In addition, in some related technologies, computing resources are usually allocated only based on the static connection characteristics of neurons, which may cause uneven computing pressure and load, thereby reducing the overall computing efficiency.

In summary, it can be seen that the relevant technology cannot scientifically and balancedly schedule storage resources and computing resources for the neurons of the neural network. Due to unreasonable scheduling of storage resources, it may cause the acquisition cost of relevant information such as weights and target neurons to be high or affect the neural network. Due to unreasonable scheduling of computing resources, the processing speed and efficiency of the network may lead to uneven computing pressure, which is also not conducive to improving the processing speed and efficiency of the neural network.

In view of this, embodiments of the present disclosure provide an information processing method and processing unit, electronic equipment, computer-readable storage media, and computer program products.

The information processing method of the embodiment of the present disclosure dynamically schedules storage resources according to the release information of neurons, so that the neurons perform release processing based on the scheduled storage resources, and/or dynamically schedules computing resources according to the release information of neurons. , for neurons to perform computing tasks based on scheduled computing resources. On the one hand, since the scheduling of storage resources and computing resources is determined based on the release information of neurons, the impact of whether neurons are active on storage resources and computing resources is fully considered in this process. Therefore, the scheduling of resources is more reasonable. The scheduled resources can more closely meet the current needs of neurons; on the other hand, the scheduling of storage resources and computing resources is not a one-time event, but a dynamic scheduling process, that is, it can be based on changes in the activity of neurons. The situation is adjusted in a timely manner so that the storage resources and computing resources are always relatively consistent with the current needs of the neurons. While meeting the needs of the neurons, the storage resources and computing resources are fully utilized.

The information processing method in the embodiment of the present disclosure can be executed by electronic equipment such as a terminal device or a server. The terminal device can be a vehicle-mounted device, user equipment (User Equipment, UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal phone, etc. Personal Digital Assistant (PDA), handheld devices, computing devices, wearable devices, etc., the information processing method can be implemented by the processor calling computer-readable program instructions stored in the memory. Alternatively, the information processing method of the embodiment of the present disclosure may be executed through a server, where the server may be an independent physical server, a server cluster composed of multiple servers, or a cloud server capable of cloud computing.

In a first aspect, embodiments of the present disclosure provide an information processing method.

Figure 1 is a flow chart of an information processing method provided by an embodiment of the present disclosure. Referring to Figure 1 , the information processing method of the embodiment of the present disclosure can be applied to a many-core system. At least some of the processing cores of the many-core system are loaded with neurons of a neural network. The information processing method includes:

In step S1, dynamically schedule storage resources according to the neuron's firing information, so that the neuron can perform firing processing based on the scheduled storage resources, and/or dynamically schedule computing resources according to the neuron's firing information, so that the neuron can perform firing processing based on the scheduled storage resources. The element executes computing tasks based on scheduled computing resources;

The storage resources include on-chip storage space of the many-core system and/or additional storage space outside the many-core system.

The neural network in the embodiment of the present disclosure may be a spiking neural network (SNN), an artificial neural network (Artificial Neural Network, ANN), or other neural networks composed of multiple neurons.

The neural network in the embodiment of the present disclosure may be a neural network loaded in a many-core system, and at least part of the processing cores of the many-core system corresponds to one or more neurons of the neural network.

In some alternative implementations, neurons are the basic units through which the nervous system implements its functions. When certain conditions are met, neurons can output signals. This behavior is called neuron firing.

In some optional implementations, the firing information of the neuron is information used to reflect the firing behavior of the neuron.

For example, the neuron firing information may include at least one of the neuron firing times within a preset time period, firing time, firing signal, firing frequency, activity, and other information.

For example, the firing information of the neuron may include the recent firing activity of the neuron (that is, the activity program used to reflect the recent firing behavior of the neuron).

In some optional implementations, neuron firing information can be used to dynamically schedule storage resources to allocate storage resources to neurons in a more scientific and reasonable manner, and enable neurons to operate conveniently and efficiently based on the scheduled storage resources. Execute release processing.

For example, the firing information of the neuron includes the recent firing activity of the neuron; accordingly, dynamically scheduling storage resources according to the firing information of the neuron includes: determining the state change information of the neuron according to the recent firing activity of the neuron. , and based on the state change information of neurons, dynamically schedule the on-chip storage space of the many-core system and/or the additional storage space outside the many-core system to store the neural network neuron information; where the state of the neuron includes sparse neurons or non- Sparse neurons, the state change information of neurons is used to characterize the changes of neurons between sparse neurons and non-sparse neurons.

For example, the neuron information of a neural network at least includes the weight information of the neuron. The weight information of the sparse neurons of the neural network is stored in an additional storage space outside the many-core system. The weight information of the non-sparse neurons of the neural network is stored in the many-core system. The on-chip storage space of the many-core system determines the state change information of the neuron based on the recent firing activity of the neuron, and dynamically schedules the on-chip storage space of the many-core system and/or the additional storage space outside the many-core system based on the state change information of the neuron. Store neural network neuron information, including: determining whether the neuron is a sparse neuron or a non-sparse neuron at the current moment based on the recent firing activity of the neuron of the neural network; the neuron is a sparse neuron at the current moment, and the neuron is currently When the moment before the moment is a non-sparse neuron, the weight information of the neuron is transferred from the on-chip storage space of the many-core system to an external storage space outside the many-core system; when the neuron is a non-sparse neuron at the current moment, and the neuron When there are sparse neurons at the moment before the current moment, the weight information of the neurons is transferred from the external storage space outside the many-core system to the on-chip storage space of the many-core system.

When a neuron executes firing, it is usually necessary to obtain the weight information of the neuron. When the recent firing activity of a neuron is not high, it means that the weight information of the neuron will have a lot of influence when the many-core system executes the neural network in the next period of time. The high probability is not involved in the calculation and may be read less often. Based on this, it is further considered that if the weight information of the neuron is stored in an external storage space outside the many-core system, during the process of the many-core system executing the neural network, since the weight information is read less times, The power consumption required for reading is naturally very small, and the impact on the processing efficiency of the neural network is also very small. Therefore, additional storage space can be scheduled to store the weight information of the neuron. Moreover, storing the weight information of the neuron in an external storage space outside the many-core system can reduce the weight information's occupation of the on-chip storage space of the many-core system, allowing the on-chip storage space of the many-core system to have larger storage space. More useful information (such as weight information that is used more frequently) will help improve the performance of the neural network.

When the recent firing activity of a neuron is high, it means that the neuron's firing value is often not 0 during the recent execution of the neural network in the many-core system, or it is firing frequently, and its execution in a period of time will In the process of neural network, there is also a high probability of distribution. Because when the firing value of a neuron is not 0, when calculating the input current value of the subsequent neuron connected to the neuron, the weight information of the neuron needs to be read, so that the weight information of the neuron in the subsequent period can be determined. Many-core system execution nerve During the network process, the weight information of the neuron has a high probability of participating in the calculation, which requires a large reading power consumption and has a large impact on the processing efficiency of the neural network. Based on this, the on-chip storage space of the many-core system can be scheduled to store the weight information of the neuron, so that the weight information can be easily read when the many-core system executes the neural network, and it can also alleviate the impact on the processing efficiency of the neural network. .

In other words, when scheduling storage resources in related technologies, the impact that the recent firing activity of neurons may have on storage resources may not be considered (for example, the impact of reading data from storage resources may not be considered, and/or The impact when writing data to storage resources), therefore, may lead to longer data read and write times, and read and write operations may have an adverse impact on processing performance. In the embodiment of the present disclosure, the issuance of neurons is fully considered, and based on this, the characteristics of read and write operations on storage resources under different issuance situations are analyzed, and a more reasonable storage resource scheduling plan is formulated based on the characteristics of read and write operations. In order to meet the storage requirements, it can improve the efficiency of reading and writing as much as possible, and alleviate the adverse impact that reading and writing may have on processing performance. Moreover, the above-mentioned scheduling process of storage resources is not a one-time process, but can be carried out in a timely manner based on the current release information of neurons according to needs (for example, rescheduling based on time period requirements, or scheduling in response to certain events). Dynamically adjust so that the allocation of storage resources and the distribution of neurons are always relatively consistent, ensuring timely scheduling of storage resources.

In some optional implementations, when a neuron performs firing processing, it may need to obtain the information required for firing processing from the corresponding storage space, and perform corresponding firing processing based on the information required for firing processing. The information required for the firing process may include at least one of the weight information of the neuron, the target processing core information (for example, the information of the processing core corresponding to the target neuron that receives the firing signal), etc., in this embodiment of the present disclosure No restrictions.

For example, storage resources are used to store information required for neuron firing processing. Correspondingly, the process of neurons performing firing processing based on scheduled storage resources includes: when the neuron meets firing conditions, determine the neuron's firing conditions. The storage location of the information required for issuance processing is obtained based on the storage location, and the information required for issuance processing is performed based on the information required for issuance processing. The storage location corresponds to the on-chip storage space of the many-core system or outside the many-core system. of additional storage space.

In some optional implementations, when determining the storage location of the information required for the neuron's firing processing, you can first determine whether the on-chip storage space of the many-core system stores the information required for the neuron's firing processing. If the many-core system If the on-chip storage space of the system does not store the information required for the firing processing of the neuron, the information required for the firing processing of the neuron is read from the external storage space of the many-core system, and the information required for the firing processing is stored in the on-chip storage space. , in case of subsequent need, the information required for the firing processing can be obtained conveniently and quickly from the on-chip storage space; conversely, if the on-chip storage space of the many-core system stores the information required for the firing processing of the neuron, then the information required for the firing processing of the neuron can be stored from the on-chip storage space. The space reads the information required for the firing processing of the neuron, and performs firing processing based on the information required for the firing processing of the neuron.

For example, the neuron firing process includes: when the neuron meets firing-related conditions, determine whether there is information required for neuron firing processing in the processing core loaded with the neuron; if there is no neuron firing in the processing core When processing the required information, obtain the information required for neuron firing processing from the external storage space outside the many-core system; store the information required for firing processing in the processing core, and perform operations corresponding to the firing-related conditions that the neuron meets. .

In addition to dynamic scheduling of storage resources, in some optional implementations, neuron release information can also be used to dynamically schedule computing resources to make more scientific and reasonable use of computing resources and make neurons more efficient. Computing tasks can be executed efficiently and stably based on scheduled computing resources.

Exemplarily, at least some of the neurons constitute a computing node; accordingly, dynamically scheduling computing resources according to the firing information of the neurons includes: for at least one of the multiple computing nodes, based on the firing of multiple neurons in the computing node Information, determine the calculation amount of the computing node; when it is determined that there is an imbalance in the calculation amount based on the calculation amount of multiple computing nodes, adjust the computing task of at least one neuron of at least part of the computing nodes.

For example, the scheduling process of computing resources may include: determining the computing volume of each computing node among multiple computing nodes within a predetermined time period; and overloading the computing volume when the computing volume among the multiple computing nodes is unbalanced. The computing task of at least one neuron in the node is transferred to the target computing node, where the target computing node is a computing node that meets preset conditions and is not overloaded in computing capacity.

It can be seen from this that in the embodiments of the present disclosure, when scheduling computing resources, unlike related technologies that rely on the static topological connection characteristics of each neuron in the neural network, computing tasks are assigned to each computing node to achieve scheduling of computing resources. Instead, the correlation between the amount of calculation and the firing of neurons is taken into account, and based on the firing information of neurons, the computing tasks of neurons in the computing nodes with unbalanced calculation amounts are dynamically and evenly adjusted to achieve the goal of solving the problem. More accurate and reasonable scheduling of computing resources keeps the computing workload and computing resources of each computing node in a relatively balanced state.

To sum up, the information processing method of the embodiment of the present disclosure can be applied to at least the following processing processes:

First, it can be applied to the storage process of neural network neuron information, that is, based on the neuron firing information, the weight information of the neuron is stored in the on-chip storage space or the off-chip storage space, and in the neuron-based Send information to determine the neuron When the activity of the chip changes, the weight information is transferred accordingly between the on-chip storage space and the off-chip storage space, which essentially implements a neural network neuron information storage method;

Second, it can be applied to the processing of neural network neuron information. That is, when a neuron fires and needs to obtain the information required for firing processing, it is first determined whether the on-chip storage space stores the information required for firing processing. If not, then The additional storage space obtains the information required for issuance processing and stores it in the on-chip storage space, so that when the information required for issuance processing is needed later, it can be obtained directly and conveniently from the on-chip storage space. This essentially achieves a A neural network neuron information processing method;

Third, it can be applied to the scheduling of computing resources, that is, when a computing node constructed based on several neurons performs computing processing, for multiple computing nodes, the computing node is determined based on the firing rate of multiple neurons in the computing node. Calculation amount, based on this, determine whether the calculation amount of multiple computing nodes is balanced, and if the calculation amount is unbalanced, complete the calculation by transferring the computing tasks of at least some neurons of the computing node with overloaded computing amount to other computing nodes. Scheduling of computing resources essentially implements a scheduling method of computing resources.

The information processing method according to the embodiment of the present disclosure will be described below with reference to FIGS. 2 to 16 .

Figure 2 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be applied to the storage of neuron information in neural networks.

Referring to Figure 2, an embodiment of the present disclosure exemplarily provides a storage process of neural network neuron information, wherein the neural network may be a neural network loaded in a many-core system, and the neural network neuron information may at least include the weight information.

In some optional implementations, during the process of loading the neural network into the many-core system, the sparsity of the neurons (such as the number of non-zero connection weights with the predecessor neuron or the successor neuron) can be determined. ) Divide neurons into sparse neurons and non-sparse neurons, store the weight information of sparse neurons in an additional storage space outside the many-core system, and store the weight information of non-sparse neurons in the on-chip storage of the many-core system space.

The weight information of a neuron may include a value that represents the connection weight between the neuron and its successor neurons, which may be the connection weight value between the neuron and its successor neurons, or may be weight index information and effective weight. Information, the weight index information includes identification information corresponding to the neuron's successor neurons. The identification information is used to indicate whether the connection weight between its corresponding successor neuron and the neuron is zero. The effective weight information can include the effective weight. value, each valid weight value is a non-zero connection weight value between this neuron and a subsequent neuron.

The additional storage space outside the many-core system may be other chips, servers, etc. with storage functions in addition to the many-core system, and the embodiments of the present disclosure do not limit this.

Referring to Figure 2, the neural network neuron information storage process provided by embodiments of the present disclosure may include:

S201. Determine whether the neuron at the current moment is a sparse neuron or a non-sparse neuron based on the recent firing activity of the neuron of the neural network.

The processing core corresponding to the neuron of the neural network obtains the recent firing activity of the neuron (that is, the recent firing activity), and determines whether the neuron is a sparse neuron or a non-sparse neuron at the current moment based on the recent firing activity.

Among them, if the neuron is determined to be a sparse neuron at the current moment, it means that the neuron is often silent in the recent process of executing neural networks in many-core systems (that is, the firing value of the neuron is often 0, or infrequently. issued), there is a high probability that it will not be issued during the execution of the neural network for a period of time.

When the firing value of a neuron is 0, when calculating the input current value of the subsequent neuron connected to the neuron, you can directly determine the input current of the neuron to the subsequent neuron without reading the weight information of the neuron. The value contribution is 0.

Therefore, when a neuron is determined to be a sparse neuron at the current moment, when the many-core system executes the neural network within a period of time, there is a high probability that the weight information of the neuron will not participate in the calculation and will not be read. Pick.

If the weight information of the neuron is stored in an external storage space outside the many-core system, during the process of the many-core system executing the neural network, since the weight information is read less times, the required reading power consumption is Naturally, it is very small and has little impact on the processing efficiency of the neural network.

At the same time, storing the weight information of the neuron in an external storage space outside the many-core system can reduce the weight information's occupation of the on-chip storage space of the many-core system, allowing the on-chip storage space of the many-core system to have larger storage space. More useful information (such as weight information that is used more frequently) will help improve the performance of the neural network.

If a neuron is determined to be a non-sparse neuron at the current moment, it means that in the process of executing neural networks in recent many-core systems, the firing value of this neuron is often not 0, or it is often firing. In the process of executing the neural network, there is a high probability that it will be distributed.

When the firing value of a neuron is not 0, when calculating the input current value of a subsequent neuron connected to the neuron, the weight information of the neuron needs to be read. Therefore, when a neuron is determined to be a non-sparse neuron at the current moment, when the many-core system executes the neural network within a period of time, the weight information of the neuron has a high probability of participating in the calculation and needs to be read. Power consumption is relatively Large, it also has a greater impact on the processing efficiency of the neural network.

If the weight information is stored in the on-chip storage space of the many-core system, it is convenient to read the weight information during the execution of the neural network in the many-core system and avoid affecting the processing efficiency of the neural network.

S202. When the neuron is a sparse neuron at the current moment and the neuron was a non-sparse neuron at the moment before the current moment, transfer the weight information of the neuron from the on-chip storage space of the many-core system to an external device outside the many-core system. storage.

S203. When the neuron is a non-sparse neuron at the current moment, and the neuron was a sparse neuron at the moment before the current moment, transfer the weight information of the neuron from the external storage space outside the many-core system to the on-chip of the many-core system. storage.

In the embodiment of the present disclosure, according to the dynamic change of the sparsity of neurons, the connection weight value of the sparse neuron and the subsequent neuron is stored in an external storage space outside the many-core system, and the connection weight value of the non-sparse neuron is stored In the on-chip storage space of the many-core system, while not affecting the processing efficiency of the neural network, the connection weight value is reduced on the on-chip storage space of the many-core system, so that the on-chip storage space of the many-core system can have a larger storage space. More important information improves the performance of neural networks.

When it is determined that the sparsity of neurons changes (that is, the state change information of neurons represents the transformation of neurons from sparse neurons to non-sparse neurons, or from non-sparse neurons to sparse neurons), in order to reduce the impact on Due to the impact of the processing efficiency of the neural network, the processing core can also process the weight information of the neurons accordingly.

For example, when a neuron is determined to be a sparse neuron at the current moment, the weight information of the neuron can be stored in an additional storage space outside the many-core system to save the on-chip storage space occupied by the weight information of the neuron.

However, since the neuron was a non-sparse neuron at the moment before the current moment, that is to say, the weight information of the neuron is stored in the on-chip storage space of the many-core system, so it is necessary to store the weight information of the neuron from the on-chip storage space of the many-core system. The space is transferred to additional storage space outside the many-core system. Among them, the transfer of neuron weight information between storage spaces is essentially the scheduling of storage resources. For example, transferring the weight information of neurons from the on-chip storage space of the many-core system to the additional storage space outside the many-core system can be understood as the weight information of the neurons, which is stored in the on-chip processing space of the scheduling many-core system and converted into Schedule additional storage space outside the many-core system for storage. Other situations are similar and will not be described here.

For example, when a neuron is determined to be a non-sparse neuron at the current moment, the weight information of the neuron can be stored in the on-chip storage space of the many-core system to facilitate the processing core to read the neuron when the neuron fires. Neuron weight information.

However, since the neuron was a non-sparse neuron before the current moment, that is to say, the weight information of the neuron is stored in an external storage space outside the many-core system, so the weight information of the neuron needs to be transferred from the many-core system. The additional storage space is transferred to the on-chip storage space of the many-core system (the transfer of weight information is achieved through the scheduling of storage resources).

If the neuron was a non-sparse neuron before the current moment, and it is still determined to be a non-sparse neuron at the current moment, that is, the sparsity of the neuron has not changed, then the weight information of the neuron does not change. If it needs to be processed, it can continue to be stored in the on-chip storage space of the many-core system.

If the neuron was a sparse neuron before the current moment, and it is still determined to be a sparse neuron at the current moment, that is, the sparsity of the neuron has not changed, then the weight information of the neuron does not need to be processed processing, it can continue to be stored in the additional storage space outside the many-core system.

When the input and other information of the neural network changes, the input of at least some neurons of the neural network will also change accordingly, and the firing value of the neuron may naturally change accordingly. In other words, the recent firing activity of the neuron will change with the The input information of the neural network changes with the change of the input information of the neural network. The input information of the neural network is a quantity that changes with time, so the recent firing activity of the neuron also changes with time. In other words, a neuron Whether a neuron is a sparse neuron or a non-sparse neuron may also change over time and is dynamic. Correspondingly, based on the switching of neurons between sparse neurons and non-sparse neurons, the call to storage resources also changes accordingly, making the scheduling of storage resources a dynamic process.

The processing core dynamically determines whether a neuron is a sparse neuron or a non-sparse neuron based on its recent firing activity, which can alleviate the change of sparse neurons into non-sparse neurons over time, but its weight information is still stored in the many-core system. The impact of additional storage space on the processing efficiency of the neural network.

In some embodiments, when transferring the weight information of neurons from the on-chip storage space of the many-core system to an external storage space outside the many-core system, the weight information of the neurons may be transferred from the on-chip storage space of the many-core system to the many-core system. An external storage space is provided outside the system, and the address information of the neuron's weight information in the external storage space is stored in the on-chip storage space of the many-core system, so that the many-core system can obtain the weight information of the neuron based on the address information.

The address information may be the weight information of the neuron plus the starting address of the additional storage space and the length occupied by the weight information.

In some embodiments, transferring the weight information of the neuron from an external storage space outside the many-core system to the on-chip storage space of the many-core system may be to transfer the weight information of the neuron from an external storage space outside the many-core system to the neural system. The on-chip storage space corresponding to the successor neuron of the neuron, so that the subsequent neuron can perform corresponding processing based on the weight information of the neuron, such as calculating the output of the subsequent neuron. input current value.

In some embodiments, when the neuron is a sparse neuron, the weight information of the neuron includes weight index information and effective weight information. The weight index information includes identification information, and there is a relationship between the identification information and the subsequent neurons of the neuron. The correspondence relationship (for example, each identification information can correspond to a successor neuron of a neuron) is used to indicate whether the connection weight value between the successor neuron and the neuron is zero; the effective weight information includes the effective weight value, and each effective weight The value is the non-zero connection weight between the neuron and a subsequent neuron.

In some embodiments, when the neuron is a non-sparse neuron, the weight information of the neuron includes the connection weight value of the neuron and its subsequent neurons.

By storing the connection weight value between a non-sparse neuron and its successor neuron as index information and effective weight information, there is no need to store the connection weight value with a zero connection weight value. When the connection weight value is zero, the storage space occupied by the connection weight value storage can be saved.

Figure 3 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be applied to the storage of neuron information in neural networks.

Referring to Figure 3, the neural network neuron information storage process provided by the embodiment of the present disclosure includes:

S301. Determine whether the neuron is a sparse neuron or a non-sparse neuron according to the recent firing activity of the neuron of the neural network every predetermined time.

The processing core obtains the activity of the neuron in the recent transmission (i.e., the activity of the recent transmission) every preset scheduled time, and determines whether the neuron is a sparse neuron or a non-sparse neuron based on the obtained activity of the recent transmission.

In some embodiments, the recent firing activity of a neuron includes the firing frequency of the neuron in a predetermined time period before the current moment, the change in the firing frequency of the neuron in the predetermined time period before the current moment, and the firing frequency of the neuron in the current moment. At least one of the activity levels.

That is to say, the recent firing activity of a neuron obtained by the processing core can include the activity of the neuron at the current moment, the firing frequency of the neuron in a predetermined time period before the current moment, and the firing frequency of the neuron at the current moment. The change in the issuance frequency during the predetermined time period before the moment.

The length of the predetermined time period and the length of the interval for determining whether the neuron is a sparse neuron or a non-sparse neuron may be the same or different.

That is, if the time when the processing core obtains the recent firing activity of the neuron is t1 (i.e., the current time), and the predetermined time period before the current time is the time period from t2 to t1, the processing core last obtained the recent firing of the neuron. The time of activity can be t2 (in this case, the length of the predetermined time period can be the same as the length of the interval for determining whether the neuron is a sparse neuron or a non-sparse neuron), or it can be before or after t2 time (in this case, the length of the predetermined time period may be different from the length of the interval for determining whether the neuron is a sparse neuron or a non-sparse neuron).

The firing frequency of a neuron in the predetermined time period before the current moment can be calculated by counting the number of times the neuron's firing value is not 0 (that is, not silent) within the predetermined time period. For example, if the predetermined time period before the current moment is t2 to In the time period of t1, the number of times the neuron's firing value is not 0 in the time period from t2 to t1 can be counted as the firing frequency of the neuron in the predetermined time period before the current time.

The change in the firing frequency of the neuron in the predetermined time period before the current time can be calculated by the firing frequency of the neuron in the adjacent predetermined time period. If the predetermined time period before the current time is the time period from t2 to t1, then The difference between the firing frequency of neurons in the time period from t2 to t1 and the firing frequency of neurons in the time period from t3 to t2 (the length of the time period from t3 to t2 is consistent with the length of the time period from t2 to t1) can be expressed as The amount of change in the firing frequency of a neuron during a predetermined period of time before the current moment.

In some embodiments, the activity of a neuron at the current moment can be determined by the activity of the neuron at the previous moment and the firing value of the neuron at the current moment.

For example, the activity of a neuron at the current moment can be calculated through the formula trace(t)=αtrace(t-1)+βs(t); where α and β are weight coefficients; s(t) is the neuron at time t The firing value of the neuron; trace(t) is the activity of the neuron at time t, and trace(t-1) is the activity of the neuron at the previous moment of time t.

That is to say, the activity of a neuron at time t can be determined by the activity of the neuron at the previous time of time t and the firing value of the neuron at time t. The value of α is determined by the activity of the neuron at time t. The degree of influence of the activity of the previous moment on the activity of the neuron at moment t. The value of β determines the degree of influence of the firing value of the neuron at moment t on the activity of the neuron at moment t. α, β can all be values less than 1.

Figure 4a is a schematic coordinate diagram of the firing value of a neuron changing with time, in which the abscissa t represents the time, and the ordinate represents the firing value (firing) of the neuron.

Referring to Figure 4a, the neuron fired at t4, t5, and t6 (the firing value was 1), and was silent (or the firing value was 0) at other times.

Figure 4b is a schematic coordinate diagram showing the change of neuron activity over time, in which the abscissa t represents the time and the ordinate represents the neuron activity (trace).

Referring to Figure 4b, the neuron has been silent before time t4, that is, the activity of the neuron has been 0 before time t4, and the neuron fired at time t4 (for example, the firing value is 1). According to the formula trace(t4) =αtrace(t4-1)+βs(t4)=0+β=β, the activity of the neuron at time t4 can be calculated.

From time t4 to time t5, the neuron has been silent (that is, the firing value is 0). According to the formula trace(t4+1)=αtrace(t4)+βs(t4+1)=αtrace(t4)+0=αtrace (t4), the activity of the neuron at time (t4+1) can be calculated, which is less than trace(t4). In the same way, trace(t4+2) is less than trace(t4+1),...trace (t5-1) is smaller than trace(t5-2), that is, the activity of neurons is continuously decreasing between time t4 and time t5.

At time t5, the neuron fires. According to the formula trace(t5)=αtrace(t5-1)+βs(t5)=αtrace(t5-1)+β, it can be seen that the activity of the neuron is increased at time t5.

From time t5 to time t6, the neuron has been silent. According to the formula trace(t5+1)=αtrace(t5)+βs(t5+1)=αtrace(t5)+0=αtrace(t5), it can be calculated The activity of the neuron at time (t5+1) is less than trace(t5). Similarly, trace(t5+2) must be less than trace(t5+1),...trace(t6-1) must be less than trace(t6-2), that is, between time t5 and time t6, the activity of neurons also continues to decrease.

At time t6, the neurons fired, and the activity of the neurons was improved compared to time (t6-1).

S302. When the neuron is a sparse neuron at the current moment and the neuron was a non-sparse neuron at the moment before the current moment, transfer the weight information of the neuron from the on-chip storage space of the many-core system to an external device outside the many-core system. storage space, and store the weight information of the neuron plus the address information of the additional storage space in the on-chip storage space of the many-core system, so that the many-core system can obtain the weight information of the neuron based on the address information.

If a neuron is a non-sparse neuron before the current moment, it means that the weight information of the neuron is stored in the on-chip storage space of the many-core system. If the neuron is still determined to be a non-sparse neuron at the current moment, the weight information of the neuron It can still be stored in the on-chip storage space of the many-core system, so there is no need to process the weight information of the neurons. On the contrary, if the neuron is determined to be a sparse neuron at the current moment, the weight information of the neuron can be transferred from the on-chip storage space of the many-core system to an external storage space outside the many-core system.

After storing the weight information of the neuron in the external storage space outside the many-core system, the address information of the weight information of the neuron in the external storage space can also be stored in the on-chip storage space of the many-core system, so that the many-core system can When needed, the weight information of the neuron can be obtained based on the address information.

Among them, the address information can be the weight information of the neuron plus the starting address of the additional storage space and the length occupied by the weight information. That is to say, the many-core system can read the length occupied by the weight information starting from the starting address. Information obtains weight information.

The process of the many-core system obtaining the weight information of neurons based on the address information can be referred to Figure 5. Figure 5 is a schematic diagram of a many-core system loaded with a neural network provided by an embodiment of the present disclosure.

Referring to Figure 5, when the neuron is a sparse neuron, as shown by the solid line with an arrow in Figure 5, the computing unit of the processing core corresponding to the neuron calculates the firing value of the neuron and uses the information stored on its corresponding chip. The address information of the weight information of the storage space can be accessed through the scheduler outside the many-core system to access the additional storage space outside the many-core system, read the weight information corresponding to the neuron, and determine the correspondence of each subsequent neuron from the weight information. The connection weight value, and the corresponding connection weight value and the firing value of the neuron are sent to the corresponding processing core of the subsequent neuron (i.e., the processing core corresponding to the small square in Figure 5).

In some embodiments, when the neuron is a sparse neuron, the weight information of the neuron may include weight index information and effective weight information; when the neuron is a non-sparse neuron, the weight information of the neuron Can include the connection weight value of this neuron and its successor neurons.

Therefore, since the neuron was a non-sparse neuron at the moment before the current moment, its weight information is the connection weight value of the neuron and its successor neurons. Before transferring the weight information to the external storage space outside the many-core system, it can The weight index information and effective weight information of the neuron are obtained according to the connection weight value of the neuron and its subsequent neurons, and then the weight index information and effective weight information of the neuron are stored in an additional storage space outside the many-core system, and the The weight index information of the neuron and the effective weight information plus the address information of the external storage space are stored in the on-chip storage space of the many-core system.

S303. When the neuron is a non-sparse neuron at the current moment, and the neuron was a non-sparse neuron at the moment before the current moment, transfer the weight information of the neuron from the external storage space outside the many-core system to the successor of the neuron. The on-chip storage space corresponding to the neuron allows subsequent neurons to perform corresponding processing based on the weight information of the neuron.

In the same way, if a neuron is a sparse neuron before the current moment, it means that the weight information of the neuron is stored in an additional storage space outside the many-core system. If the neuron is still determined to be a sparse neuron at the current moment, the neuron will The weight information of neurons can still be stored in the external storage space outside the many-core system, so there may be no need to process the weight information of neurons. On the contrary, if the neuron is determined to be a non-sparse neuron at the current moment, the neuron's weight information can be transferred from the external storage space outside the many-core system to the on-chip storage space corresponding to the neuron's successor neuron.

For example, when the weight information of the neuron is the connection weight value between the neuron and each subsequent neuron, the connection weight value between the neuron and each subsequent neuron can be stored in the corresponding successor neuron. On-chip storage space, so that the computing unit of the processing core corresponding to the neuron can be shown as the dotted line with arrow in Figure 5. After calculating the firing value of the neuron, the weight value of the connection between the subsequent neuron and the neuron is saved. There is an on-chip storage space corresponding to the subsequent neuron, so the computing unit can directly send the firing value of the neuron to the processing core corresponding to the subsequent neuron (i.e., the processing core corresponding to the small square in Figure 5) for the subsequent neuron to use according to the neuron. Use the issuance value of the element and the connection weight value to calculate your own input current value.

In some embodiments, when the neuron is a sparse neuron, the weight information of the neuron may include weight index information and effective weight information; when the neuron is a non-sparse neuron, the weight information of the neuron may Includes the connection weight value of this neuron and its successor neurons.

Therefore, since the neuron was a sparse neuron at the moment before the current moment, its weight information is the weight index information and effective weight information of the neuron. Before transferring the weight information to the on-chip storage space corresponding to the subsequent neuron, it can be based on The weight index information and effective weight information of the neuron obtain the connection weight value of the neuron and its successor neurons, and then store the connection weight value of the neuron and each successor neuron in the on-chip storage corresponding to the corresponding successor neuron. space.

Figure 6 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be applied to the processing of neuron information in neural networks.

Referring to FIG. 6 , an embodiment of the present disclosure exemplarily provides a processing process of neural network neuron information.

The neural network in the embodiment of the present disclosure may be a neural network loaded on a many-core system, such as a spiking neural network, an artificial neural network, or other neural networks composed of multiple neurons, and the embodiment of the present disclosure is not limited to this.

In some optional implementations, a many-core system loaded with a neural network may include multiple processing cores. At least some of the processing cores are loaded with neurons of the neural network, and are responsible for storing information of the neurons loaded in the processing cores and participating in These neuron-related calculations (such as calculating the input current value, output, etc. of each neuron).

For example, the processing core will load the information of the processing core corresponding to the successor neuron of the neuron on it (such as the identification of these processing cores, etc.), and the connection weight value of each neuron and its predecessor neuron and store it in Additional storage space outside of many-core systems.

The information processing method of the embodiment of the present disclosure can be executed by the processing core of the many-core system. The neural network neuron information processing process of the embodiment of the present disclosure mainly includes:

S601. When the first neuron meets the conditions related to firing, determine whether there is information required for firing processing of the first neuron in the processing core.

S602. If the information required for the firing processing of the first neuron does not exist in the processing core, obtain the information required for the firing processing of the first neuron from an external storage space outside the many-core system.

S603. Store the information required for firing processing in the processing core, and perform operations corresponding to the firing-related conditions satisfied by the first neuron.

In the embodiment of the present disclosure, the information required for neurons and firing processing is stored in an additional storage space outside the many-core system, which reduces the storage cost of the many-core system; at the same time, when the neurons meet firing-related conditions, Read the information required for neuron firing processing from the external storage space, and store the obtained information required for firing processing in the processing core corresponding to the neuron. When the subsequent many-core system runs the neural network, the neuron If the relevant conditions for firing are met again, the information required for neuron firing processing can be obtained directly from the processing core, avoiding the need for the information required for neuron firing processing to be stored in the external storage space of the many-core system, resulting in the need for many-core processing every time. When the system runs the neural network, it needs to obtain the information required for neuron firing and processing from the external storage space of the many-core system, which affects the operation of the neural network.

Among them, the first neuron is any one of the neurons loaded in the processing core. In other words, the first neuron can be any neuron loaded in any processing core in the many-core system. The "first neuron" here " is only used for convenience of description and is not used to limit neurons.

During the operation of a neural network (such as a spiking neural network), when the first neuron meets the conditions related to firing (if the neural network is a spiking neural network, the firing is pulse firing) (for example, the first neuron wants to transmit to its subsequent neuron issuance), the first god The processing core corresponding to the neuron determines its corresponding storage space, for example, whether there is information required for the firing processing of the first neuron in the Cache (cache memory) of the processing core corresponding to the first neuron.

If the information required for the firing processing of the first neuron exists in the processing core, the information required for the firing processing is obtained from the processing core, and operations corresponding to the firing-related conditions satisfied by the first neuron are performed.

If the information required for the firing processing of the first neuron does not exist in the processing core, the information required for the firing processing of the first neuron is obtained from the external storage space outside the many-core system, and the obtained information required for firing processing is stored in the corresponding processing core. storage space, and at the same time perform operations corresponding to the information required for firing processing that the first neuron satisfies.

In some embodiments, the firing-related condition may be that the first neuron is the source neuron to be fired; the information required for the firing processing of the first neuron may be the processing core information corresponding to the target neuron. The target neuron is a neuron that receives the firing information of the first neuron; the operation corresponding to the firing-related conditions met by the first neuron may be to transmit the firing information of the neuron to the processing core corresponding to the target neuron.

The firing information of the first neuron may include the number, time beat, firing value, etc. of the first neuron, which is not limited in the embodiments of the present disclosure.

That is to say, when the firing information of a neuron on the processing core needs to be transmitted to the subsequent neuron connected to it, the neuron meets the firing-related conditions, and the processing core can confirm whether the storage space corresponding to the many-core system stores the information related to the firing. The processing core information (such as the identification, address and other information of the processing core) corresponding to the subsequent neuron connected by the neuron (that is, the target neuron that receives the information issued by the neuron).

When the processing core stores the processing core information corresponding to the target neuron in the storage space corresponding to the many-core system, the processing core can transmit the firing information of the neuron to the processing core corresponding to the target neuron.

When the processing core does not store the processing core information corresponding to the target neuron in the storage space corresponding to the many-core system, the processing core can obtain the processing core information corresponding to the target neuron from the external storage space outside the many-core system, and store the processing core information of the target neuron. The corresponding processing core information is stored in the storage space corresponding to the processing core in the many-core system.

At the same time, according to the obtained processing core information corresponding to the target neuron, the firing information of the neuron can also be transmitted to the processing core corresponding to the target neuron.

In some embodiments, the firing-related condition may be that the first neuron is a target neuron that receives firing information, and the information required for firing processing of the first neuron may be that the first neuron is the source neuron corresponding to the firing information. weight information. The weight information may include connection weight values, and may also include weight index information and effective weight information. The embodiment of the disclosure does not limit the content and storage method of the weight information.

In some embodiments, the firing-related condition may be that the first neuron is a target neuron that receives firing information, and the information required for firing processing of the first neuron may be that the first neuron is a source neuron corresponding to the firing information ( That is, the connection weight value of the neuron that emits information); the operation corresponding to the emission-related conditions met by the first neuron may be to calculate the input current value of the first neuron based on the connection weight value.

That is to say, when a neuron on the processing core receives the firing information of its predecessor neuron, the neuron meets the firing-related conditions, and the processing core can confirm whether the storage space corresponding to the many-core system stores the neuron. The connection weight value of the source neuron corresponding to the firing information.

When the processing core stores the connection weight value between the neuron and the source neuron in the storage space corresponding to the many-core system, the processing core can perform a synaptic integration operation based on the connection weight to calculate its input current value.

When the processing core does not store the connection weight value between the neuron and the source neuron in the storage space corresponding to the many-core system, the processing core can obtain the connection weight value between the neuron and the source neuron from the external storage space outside the many-core system. , and store the connection weight value between the neuron and the source neuron in the storage space corresponding to the processing core in the many-core system.

In addition, synaptic integral operation can also be performed based on the connection weight to calculate its input current value.

In summary, it can be seen that during the processing of neural network neuron information, on the one hand, the neuron firing is performed based on the information required for firing processing obtained from storage resources, ensuring smooth signal transmission between neurons; on the other hand, On the one hand, the scheduling processing of storage resources for the information required for issuance processing is performed, that is, for the neurons that execute the issuance, the on-chip storage space of the many-core system is scheduled to store the information required for its issuance processing (mainly including two situations: the first situation , if the information required for neuron firing processing is itself stored in the processing core, it can be read directly; in the second case, if the information required for neuron firing processing is stored in an external storage space, the storage of the scheduling processing core The resource stores the information required for the firing processing of the neuron and releases the corresponding storage resources in the additional storage space).

During the neural network neuron information processing process of the embodiment of the present disclosure, the information required for neuron firing processing is stored in an external storage space outside the many-core system, which reduces the storage cost of the many-core system. At the same time, when the neuron meets the conditions related to firing, that is, when the information required for the firing processing of the neuron is needed, the information required for the firing processing of the neuron is read from the external storage space. And store the acquired information required for firing processing in the processing core corresponding to the neuron. When the neuron meets the conditions related to firing again during the subsequent operation of the neural network, that is, the information required for firing processing of the neuron is again needed. In this case, the information required for neuron firing processing can be obtained directly from the processing core. The information required for neuron firing processing is always stored in the external storage space of the many-core system. As a result, when the many-core system runs the neural network, the neuron firing processing information needs to be obtained from the external storage space of the many-core system every time. In situations where information is required, which may affect the operation of the neural network, the above problems can be solved through embodiments of the present disclosure.

For some inactive neurons (that is, neurons that do not frequently send or receive information), they may not send or receive information during multiple runs of the neural network. In other words, these neurons cannot meet the requirements. Therefore, the information required for neuron firing processing will always be stored in the external storage space outside the many-core system, which not only reduces the storage cost of the many-core system, but also does not affect the operation process of the neural network.

For active neurons (that is, neurons that often send or receive information), they send or receive information during multiple runs of the neural network. These neurons meet the conditions related to release, and the release processing of these neurons is The required information only needs to be obtained from the external storage space outside the many-core system when it is used for the first time. During the subsequent operation of the neural network, the information required for the firing and processing of these neurons is stored the last time it is used. In the processing core corresponding to the neuron, the information required for the firing and processing of these neurons can be obtained directly from the processing core corresponding to the neuron, avoiding the need for the information required for the firing and processing of neurons to be stored in the external storage space of the many-core system. , during each operation of the neural network, it is necessary to obtain the information required for neuron issuance processing from the external storage space of the many-core system, causing the reading power consumption of the many-core system to be excessive and affecting the operation process of the neural network.

FIG. 7 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which is used to describe some steps in the process of processing neural network neuron information.

In some embodiments, referring to FIG. 7 , during the neural network neuron information processing process of the embodiment of the present disclosure, the step of storing the information required for issuance processing in the processing core may include:

S701. When the space required to store the information required for issuance processing is not larger than the free storage space of the processing core, store the information required for issuance processing in the free storage space.

S702. When the space required for storing the information required for issuance processing is greater than the free storage space of the processing core, delete the stored information in the occupied storage space of the processing core until the free storage space is larger than the space required for storing the information required for issuance processing. The required space is used to store the information required for issuance processing in the free storage space.

When the first neuron meets the conditions related to firing, if the information required for the firing processing of the first neuron does not exist in the processing core corresponding to the first neuron, the processing core can obtain the third neuron from an external storage space outside the many-core system. The firing of a neuron processes the information required.

When the size of the storage space required to store the information required for the firing processing of the first neuron is not larger than the free storage space of the processing core, the information required for the firing processing of the first neuron can be directly stored in the free storage space of the processing core. storage.

When the size of the storage space required to store the information required for issuance processing is greater than the free storage space of the processing core, the stored information that has been stored in the processing core can first be deleted until the free storage space of the processing core is reached. The size is larger than the storage space required to store the information required for issuance processing, and then the information required for issuance processing is stored in the free storage space of the processing core.

If the neural network is a spiking neural network, and there are pulses firing between neurons, and the source processing core corresponding to the source neuron that sends the pulse does not have information about the destination processing core corresponding to the destination neuron that receives the pulse, then the source processing core Obtain the information of the destination processing core corresponding to the destination neuron that receives the impulse from the external storage space.

When the size of the storage space required to store the information of the destination processing core is not larger than the free storage space of the source processing core, the information of the destination processing core can be directly stored in the free storage space of the source processing core.

When the size of the storage space required to store the information of the destination processing core is greater than the free storage space of the source processing core, the stored information that has been stored in the source processing core can first be deleted until the source processing core is free. The size of the storage space is larger than the size of the storage space required to store the information of the destination processing core, and then the information of the destination processing core is stored in the free storage space after the source processing core is deleted.

If the connection weight value between the source neuron and the destination neuron does not exist in the destination processing core, the destination processing core can obtain the connection weight value between the source neuron and the destination neuron from the external storage space.

When the size of the storage space required to store the connection weight value between the source neuron and the destination neuron is not larger than the free storage space of the destination processing core, the connection weight value between the source neuron and the destination neuron can be stored in the destination processing core. in the core's free storage space.

When the size of the storage space required to store the connection weight value between the source neuron and the destination neuron is greater than the free storage space of the destination processing core, the stored information that has been stored in the destination processing core can first be deleted. Until the size of the free storage space of the destination processing core is greater than the size of the storage space required for the connection weight value of the source neuron and the destination neuron, the source neuron is The connection weight value between the neuron and the destination neuron is stored in the free storage space after deletion of the destination processing core.

Figure 8 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be used to describe some steps in the process of processing neural network neuron information.

In some embodiments, referring to Figure 8, during the neural network neuron information processing process of the embodiment of the present disclosure, the stored information that has occupied the storage space of the processing core is deleted until the free storage space is larger than the information required for storage and issuance processing. Space occupied steps can include:

S801. Delete the stored information in order from early to late when the stored information is stored in the occupied storage space until the free storage space is larger than the space required to store the information required for issuance processing.

When the first neuron meets the conditions related to firing, if the processing core corresponding to the first neuron does not contain the information required for the firing processing of the first neuron, the processing core can be obtained from an external storage space outside the many-core system. The firing of the first neuron processes the required information.

When the size of the storage space required to store the information required for the firing process of the first neuron is greater than the free storage space of the processing core, the stored information that has been stored in the processing core can be stored in the processing core from the earliest time. In the order of the latest, the stored information is deleted until the size of the free storage space of the processing core is greater than the size of the storage space required to store the information required for issuance processing, and then the information required for issuance processing is stored in the free storage of the processing core. space.

If the neural network is a spiking neural network, and there are pulses firing between neurons, and the source processing core corresponding to the source neuron that sends the pulse does not have information about the destination processing core corresponding to the destination neuron that receives the pulse, then the source processing core Information about the destination processing core can be obtained from external storage space.

When the size of the storage space required to store the information of the destination processing core is larger than the free storage space of the source processing core, first, the stored information that has been stored in the source processing core can be stored in the source processing core from the earliest time. Deletions are performed in order of the latest until the size of the free storage space of the source processing core is larger than the size of the storage space required for the information of the destination processing core, then the information of the destination processing core is stored in the free storage space of the source processing core.

When the size of the storage space required to store the connection weight value between the source neuron and the destination neuron is greater than the free storage space of the destination processing core, first, the stored information that has been stored in the destination processing core can be stored in the destination. The processing cores are deleted in order from early to late until the size of the free storage space of the destination processing core is greater than the size of the storage space required for the connection weight value of the source neuron and the destination neuron, and then the source neuron and the destination neuron are The connection weight value of the neuron is stored in the free storage space of the destination processing core.

Figure 9 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be used to describe some steps in the process of processing neural network neuron information.

In some embodiments, referring to Figure 9, during the neural network neuron information processing process of the embodiment of the present disclosure, the stored information that has occupied the storage space of the processing core is deleted until the free storage space is larger than the information required for storage and issuance processing. Space occupied steps can also include:

S901. Delete the stored information in order from early to late when the stored information was last read until the free storage space is greater than the space required to store the information required for issuance processing.

When the first neuron meets the conditions related to firing, if the information required for the firing processing of the first neuron does not exist in the processing core corresponding to the first neuron, the first neuron is obtained from the external storage space outside the many-core system. Information required for meta-distribution processing.

When the size of the storage space required to store the information required for issuance processing is greater than the free storage space of the processing core, the information that has been stored in the processing core corresponding to the issuance-related neuron can be processed by the core according to the latest The stored information is deleted in order of reading time from early to late until the size of the free storage space of the processing core is greater than the size of the storage space required to store the information required for issuance processing, and then the information required for issuance processing is Stored in the free storage space of the processing core.

The time when the stored information was last read may refer to the time closest to the current time among the times when the stored information was read by the processing core.

The time difference between the last time the stored information was read and the current time can indicate the time the stored information has not been used. Generally, the higher the frequency of use of the information, the longer the time it has not been used. short, so the time that the stored information has not been used can be used as a reference for the frequency of use of the stored information. The longer the time that the stored information has not been used, the lower the frequency of use. It will be used in subsequent neural network operations. In the process, the probability of being used is lower, so deleting it will have less impact on the operation of the neural network.

If the neural network is a spiking neural network, and there are pulses firing between neurons, and the source processing core corresponding to the source neuron that sends the pulse does not have information about the destination processing core corresponding to the destination neuron that receives the pulse, then the source processing core Storage space can be added from outside Obtain the information of the destination processing core.

When the size of the storage space required to store the information of the destination processing core is greater than the free storage space of the source processing core, the stored information that has been stored in the source processing core can be calculated based on the time when the stored information was last read in the source processing core. Deletions are performed in order of the latest until the size of the free storage space of the source processing core is larger than the size of the storage space required to store the information of the destination processing core, and then the information of the destination processing core is stored in the free storage space of the source processing core.

If the connection weight value between the source neuron and the destination neuron does not exist in the destination processing core corresponding to the destination neuron that emits the pulse, the destination processing core can obtain the connection weight value between the source neuron and the destination neuron from the external storage space. .

When the size of the storage space required to store the connection weight value between the source neuron and the destination neuron is greater than the free storage space of the destination processing core, first, the stored information that has been stored in the destination processing core can be processed according to the last time it was stored. The reading time is deleted in order from early to late until the size of the free storage space of the destination processing core is greater than the size of the storage space required for the connection weight value of the source neuron and the destination neuron, and then the source neuron and the destination neuron are The connection weight value of the destination neuron is stored in the free storage space of the destination processing core.

Figure 10 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be used to describe some steps in the process of processing neural network neuron information.

In some embodiments, referring to FIG. 10 , during the neural network neuron information processing process of the embodiment of the present disclosure, the stored information that has occupied the storage space of the issuance processing core is deleted until the free storage space is larger than the information required for storing the issuance processing. The space required and the steps to store the information required for issuance processing in free storage space may include:

S1001. Delete the stored data in the occupied storage space of the processing core and obtain new free storage space until the sum of the new free storage space and the original free storage space is greater than the space required to store the information required for issuance processing.

S1002. When the new free storage space is not continuous with the original free storage space, store the information required for issuance processing in the original free storage space first, then store it in the new free storage space, and store the new free storage space in the original free storage space. The starting address of the space.

When the first neuron meets the conditions related to firing, if the information required for the firing processing of the first neuron does not exist in the processing core corresponding to the first neuron, the first neuron can be obtained from an external storage space outside the many-core system. Neurons fire to process the information needed.

When the size of the storage space required to store the information required for the firing processing of the first neuron is greater than the free storage space of the processing core (i.e., the original free storage space), the data corresponding to the firing-related neuron that has been stored can be deleted. Process the stored data in the occupied storage space of the core and obtain new free storage space until the sum of the new free storage space and the original free storage space is greater than or equal to the space required to store the information required for the first neuron's release processing.

For example, the stored information that has been stored in the processing core corresponding to the firing-related neuron can be deleted in the order of the time when the stored information is stored in the processing core from early to late, and new free storage space can be obtained.

The stored information that has been stored in the processing core can also be deleted in order from early to late when it was last read by the processing core corresponding to the relevant neuron, and new free storage space can be obtained.

After acquiring the new free storage space, if the new free storage space and the original free storage space are contiguous spaces, the information required for issuance processing can be directly stored in the contiguous space composed of the new free storage space and the original free storage space.

If the new free storage space and the original free storage space are not continuous spaces, the information required for issuance processing can be first stored in the original free storage space in order. After the original free storage space is occupied, the remaining information required for issuance processing can be stored in the new free storage space. Free storage space.

Since the original free storage space and the new free storage space are discontinuous spaces, in order to allow the processing core to know where to read the information required for issuance processing after reading the information required for issuance processing in the original free storage space. The remaining information required for issuance processing can also store the starting address of the new free storage space in the original free storage space. After reading the information required for issuance processing of the original free storage space, the processing core can obtain the new free storage space. According to the starting address of the new free storage space, read the remaining information required for issuance processing from the new free storage space.

Figure 11 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be used to describe some steps in the process of processing neural network neuron information.

In some embodiments, referring to Figure 11, in the neural network neuron information processing process provided by the embodiment of the present disclosure, after the step of storing the information required for issuance processing in the processing core, the information processing method may also include:

S1101. Store the index information of the information required for issuance processing in the processing core.

The index information of the information required for the release processing includes the identification of the first neuron (such as the ID of the neuron related to the release) and the address information of the storage location of the information required for the release processing of the first neuron in the processing core.

That is to say, while the processing core stores the information required for the issuance processing, it can also store the index information of the information required for the issuance processing in the processing core.

During the subsequent operation of the neural network, when the processing core wants to obtain the information required for the firing processing of the first neuron again, it can first obtain the information required for the firing processing of the first neuron based on the identity of the first neuron. The address information of the storage location of the processing core is read, and the information required for the firing processing of the first neuron is read at the corresponding location of the processing core based on the address information.

In some embodiments, issuing the index information of the information required for processing also includes the time when the information required for issuing processing is stored in the processing core.

The processing core stores the time when the information required for issuance processing is stored in the processing core. When obtaining the information required for issuance processing, it needs to be stored in the processing core and the size of the storage space required to store the information required for issuance processing is larger than that of the processing core. of free storage space, you can delete the stored information required for issuance processing in order from early to late according to the time when the information required for issuance processing is stored in the processing core, until the size of the free storage space of the processing core is larger than the size of the storage space required to store the information required for issuance processing, and then store the information required for issuance processing in the free storage space of the processing core.

In some embodiments, the index information of the information required for issuance processing may also include the time when the information required for issuance processing was last read. Each time the information required for issuance processing is read, the latest read time in the index information can be updated accordingly.

When obtaining the information required for issuance processing needs to be stored in the processing core and the size of the storage space required to store the information required for issuance processing is greater than the free storage space of the processing core, the information required for issuance processing can be based on the last time it was read. Time, in order from early to late, delete the stored information until the size of the free storage space of the processing core is greater than or equal to the size of the storage space required to store the information required for issuance processing, and then delete the information required for issuance processing. The information is stored in the free memory space of the processing core.

Figure 12 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be applied to the scheduling process of computing resources.

Referring to Figure 12, the computing resource scheduling process provided by the embodiment of the present disclosure mainly includes:

In step S1210, determine the computing amount of each computing node among the plurality of computing nodes within a predetermined time period;

In step S1220, when the calculation amount among the various calculation nodes is unbalanced, the calculation task of at least one neuron in the calculation node with overloaded calculation amount is transferred to the target calculation node.

In embodiments of the present disclosure, when a computing system including multiple computing nodes is used to perform neural network operations, statistics are made on the computing volume of the computing nodes within a predetermined time period. When it is found that the computing volume among different computing nodes is unbalanced ( That is, if there is a large difference in the amount of calculations between different computing nodes), some of the computing tasks in the computing nodes that are overloaded will be transferred to other computing nodes that are not overloaded, so that load balancing between different computing nodes can be achieved. , and to improve the overall computing efficiency of the neural network. After adjusting the computing tasks of neurons through the above-mentioned scheduling method of computing resources, the computing tasks responsible for each computing node may no longer correspond to the neurons in the same layer. In other words, in the embodiment of the present disclosure, after the computing tasks are redistributed, the computing tasks of neurons with larger firing rates are distributed among multiple different computing nodes, so that the loads of different computing nodes are more balanced.

The target computing nodes include computing nodes that meet preset conditions and are not overloaded in computing workload.

When using a computing system including multiple computing nodes to perform neural network operations, statistics are made on the computing volume of the computing nodes within a predetermined time period. When it is found that the computing volume among different computing nodes is unbalanced (i.e., the computing volume between different computing nodes is If the calculation amount gap is large), some computing tasks in the computing nodes with overloaded calculations can be transferred to other computing nodes that are not overloaded in calculations, thereby achieving load balancing between different computing nodes and improving the performance of the neural network. The purpose of overall computing efficiency. Among them, transferring part of the computing tasks of a certain computing node to other computing nodes essentially belongs to the scheduling of computing resources, that is, the computing resources are reallocated according to the release information of neurons, thereby improving the balance of computing tasks and computing resources. .

After the computing tasks of neurons are adjusted through the above-mentioned scheduling of computing resources, the computing tasks responsible for each computing node may no longer correspond to the neurons in the same layer. In other words, after the computing tasks are reallocated through the computing resource scheduling method provided by the embodiments of the present disclosure, the computing tasks of neurons with larger firing rates are dispersed among multiple different computing nodes, so that the loads of different computing nodes are balanced. .

In the embodiment of the present disclosure, the "preset condition" is not particularly limited. For example, the predetermined condition may be that the calculation amount is lower than a certain calculation amount. For another example, the predetermined condition may be: the distance from the computing node with an overloaded computing load does not exceed a predetermined number of computing nodes. That is to say, the target computing node should be a computing node that is close to the computing node with overloaded calculations (for example, the distance between the target computing node and the computing node with overloaded calculations is no more than two computing nodes).

In some optional implementations, the above scheduling process can be performed periodically, and the predetermined time periods in different cycles are time periods within respective cycles. In this implementation, the calculation amount statistics of the computing nodes are performed every once in a while. When it is found that the computing amount is unbalanced among the computing nodes (that is, the load is unbalanced), the computing nodes with overloaded computing amount are processed. The computing tasks are transferred out and load balancing is achieved again. That is to say, through the scheduling method provided by the embodiments of the present disclosure, computing resources can be reallocated in a timely manner when load imbalance occurs, and approximate load balancing can be achieved throughout the computing process, ultimately improving the computing efficiency of the neural network.

In the embodiment of the present disclosure, there is no special limitation on how to determine the calculation amount of each of the multiple computing nodes within a predetermined time period.

As an optional implementation manner, FIG. 13 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be used to describe some steps in the scheduling process of computing resources.

As shown in Figure 13, step S1210 determines the computing amount of each computing node among multiple computing nodes within a predetermined time period, which may include:

In step S1210a, count the number of pulses issued by each computing node in the plurality of computing nodes within the predetermined time period;

In step S1210b, the calculation amount of each computing node within the predetermined time period is calculated according to formula (2):
P _i =R _i ·C _i (2)

Among them, multiple computing nodes are numbered in sequence, and i is the number of the computing node;

_Pi is the calculation amount of the i-th computing node within a predetermined time period;

R _i is the number of pulses issued by the i-th computing node within a predetermined time period;

C _i is the number of synaptic connections of the i-th computing node within a predetermined time period.

In the embodiments of the present disclosure, there is no special limitation on the execution device for scheduling computing resources. As an optional implementation manner, the scheduling method may be executed using an electronic device independent of the computing node, or one of multiple computing nodes may be used to execute the scheduling method.

When the scheduling method is executed by an electronic device independent of the computing node, the electronic device may send a pulse number acquisition request to each computing node to obtain the number of pulses issued by each computing node within a predetermined time period.

When the computing node executes the scheduling method, the computing node executing the scheduling method may send a pulse number acquisition request to other computing nodes to obtain the number of pulses issued by each other computing node within a predetermined time period. Of course, the embodiments of the present disclosure are not limited to this. In this implementation, each computing node may periodically send the number of pulses it issues within a predetermined time period to other computing nodes.

In the embodiment of the present disclosure, there is no special limitation on how to determine whether there is an imbalance in the amount of calculations between each computing node.

In some embodiments, after determining the computing amount of each computing node among the multiple computing nodes within a predetermined time period, the information processing method further includes: determining the average computing amount of the multiple computing nodes within the predetermined time period; determining each computing node The absolute value of the difference between the calculation amount and the average calculation amount within the preset time period, and the balance coefficient of each calculation node is determined based on the ratio of the absolute value of the difference to the average calculation amount; when there is the balance coefficient of at least one calculation node If it is greater than the preset threshold, it is determined that the calculation amount among multiple computing nodes is unbalanced.

As an optional implementation manner, FIG. 14 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be used to describe some steps in the scheduling process of computing resources.

As shown in Figure 14, after step S1210, the information processing method may also include the following steps:

In step S1212, determine the average calculation amount of multiple computing nodes within a predetermined time period;

In step S1214, the equilibrium coefficient of each computing node is calculated according to the calculation amount of each computing node within a predetermined time period and the average calculation amount according to formula (1);

In step S1216, when there is a computing node with a balance coefficient greater than a preset threshold, it is determined that the calculation amount among each computing node is unbalanced.

Among them, i is the number of the computing node;

It is the average calculation amount of all computing nodes within a predetermined time period;

ε _i is the equilibrium coefficient of the i-th calculation node.

The larger ε _i is, the greater the difference between the calculation amount of the i-th computing node and the average calculation amount of multiple computing nodes.

In the embodiment of the present disclosure, there is no special limitation on the value of the preset threshold, and the preset threshold can be determined according to the operation speed requirements of the neural network. The faster the calculation speed of the neural network is required, the smaller the value of the preset threshold is. As an optional implementation, the preset threshold can be between 5 and 10. That is to say, when there are computing nodes whose computing power differs from the average computing power by 5 to 10 times, it is considered that there is a load imbalance.

In the embodiment of the present disclosure, there is no special limitation on how to determine the “computing node with overloaded calculation” in the load imbalance situation. For example, a computing node whose computing volume exceeds a predetermined amount may be determined as a computing node whose computing volume is overloaded. A computing node whose computing amount exceeds the average computing amount may also be determined as a computing node with an overloaded computing amount (for example, a computing node whose computing amount exceeds 5-10 times the average computing amount may be determined as a computing node with an overloaded computing amount). Correspondingly, in the scheduling process, computing nodes whose computing volume does not reach the average computing volume of all computing nodes within a predetermined time period may be determined as computing nodes whose computing volume is not overloaded.

In the embodiment of the present disclosure, there is no special limitation on how to determine the computing tasks that need to be transferred to the target computing node. for To increase the transfer rate, as an optional implementation, in step S1220, neurons can be randomly selected from computing nodes with overloaded calculations, and the computing tasks of the selected neurons can be transferred to the target computing node.

For neural networks, neurons are usually grouped. For example, neurons with identical biological properties can be grouped into the same group. Corresponding to the computing nodes, the computing tasks executed in the computing nodes are also grouped. In order to improve the efficiency of task transfer, as an optional implementation manner of the embodiment of the present disclosure, a whole set of computing tasks can be transferred. That is to say, in step S1220, at least one of the computing nodes with an overloaded calculation amount can be transferred. The task group moves to the target computing node, where the task group includes computing tasks corresponding to multiple neurons.

In order to smoothly process data through the neural network, optionally, as shown in Figure 14, after step S1220, the information processing method may also include:

In step S1230, a task transfer notification is sent to the computing node associated with the neuron of the target computing node to which the computing task is transferred.

Among them, the task transfer notification carries the address information of the target computing node.

In the embodiment of the present disclosure, the so-called "computing node associated with the neuron in which the computing task is transferred to the target computing node" refers to the computing node where the predecessor synapse of "the neuron in which the computing task is transferred to the target computing node" is located, and/or the computing node where the successor synapse is located "where the computing task is transferred to the neuron of the target computing node".

Further, as shown in Figure 14, after step S1220, the information processing method may also include:

In step S1240, the cell body processing information of the neuron corresponding to the computing task transferred to the target computing node and the subsequent synapse information are sent to the target node.

In some optional implementations, the information processing method of the embodiment of the present disclosure can also be used to perform corresponding data processing; for example, it can be applied to synaptic integral calculation for neurons.

Figure 15 is a schematic flowchart of an information processing method provided by an embodiment of the present disclosure, which can be applied to the data processing process of neurons. As shown in Figure 15, the data processing process includes:

In step S1510, determine the synaptic information connected to the current computing node. The synaptic information includes the position information of the successor neuron of the neuron corresponding to the current computing node and the synaptic weight of the neuron corresponding to the current computing node;

In step S1520, the synaptic weight of the neuron corresponding to the current calculation node is sent to the calculation node corresponding to the subsequent neuron for the calculation node to perform synaptic integral calculation.

Wherein, when there is a task transfer notification, the location information of the subsequent neuron is carried by the task transfer notification, and the task transfer notification includes a task transfer notification generated by executing any one of the information processing methods in the embodiments of the present disclosure.

Of course, when there is no task transfer notification, the position information of the successor neuron is the initially set position information of the successor neuron.

The data processing process provided by the present disclosure will be introduced in detail with reference to FIG. 16 below.

Figure 16 shows two predecessor neurons (respectively, successor neuron A1 and successor neuron A2), and four successor neurons (respectively, successor neuron B, successor neuron C, successor neuron D. Successor neuron E).

For the computing node where the predecessor neuron A1 is located, the data processing method performed is as follows:

Obtain the synaptic information of the synapse connected to the predecessor neuron A1. The synapse information includes the address information (for example, number) of the successor neuron, and the synaptic weights w1 and w2 of the predecessor neuron to each successor neuron respectively. , w3, w4;

Distribute the weight information to the computing nodes responsible for each subsequent neuron for each computing node to perform synaptic integral calculation.

In a second aspect, embodiments of the present disclosure provide an information processing unit.

Figure 17 is a block diagram of an information processing unit provided by an embodiment of the present disclosure. Referring to Figure 17, the information processing unit of the embodiment of the present disclosure can be applied to a many-core system. At least some of the processing cores of the many-core system are loaded with neurons of the neural network. The information processing unit 1700 includes:

The dynamic scheduling subunit 1701 is configured to dynamically schedule storage resources according to the issuance information of neurons, so that neurons can perform issuance processing based on the scheduled storage resources, and/or dynamically schedule computing resources according to the issuance information of neurons. , for neurons to perform computing tasks based on scheduled computing resources;

In the embodiment of the present disclosure, the issuance of neurons is fully considered, and based on this, the characteristics of read and write operations on storage resources under different issuance situations are analyzed, and a more reasonable storage resource scheduling plan is formulated based on the characteristics of read and write operations. In order to meet the storage requirements, it can improve the efficiency of reading and writing as much as possible, and alleviate the adverse impact that reading and writing may have on processing performance. Moreover, the above-mentioned scheduling process of storage resources is not a one-time process, but can be performed in a timely manner based on the current release information of neurons according to needs (for example, rescheduling based on time period requirements, or scheduling in response to certain events). Dynamically adjust the distribution of storage resources The distribution of neurons is always relatively consistent, ensuring timely scheduling of storage resources. When scheduling computing resources, unlike related technologies that rely on the static topological connection characteristics of each neuron in the neural network to allocate computing tasks to each computing node to achieve computing resource scheduling, the amount of calculation and the distribution of neurons are taken into consideration. Based on the correlation between situations, based on the release information of neurons, the computing tasks of neurons in computing nodes with unbalanced computing amounts are dynamically and evenly adjusted to achieve more accurate and reasonable scheduling of computing resources, so that each The computing workload and computing resources of computing nodes are in a relatively balanced state.

In some optional implementations, the weight information of the sparse neurons of the neural network is stored in an additional storage space outside the many-core system, and the weight information of the non-sparse neurons of the neural network is stored in the on-chip storage space of the many-core system, dynamically The scheduling subunit includes: a neural network neuron information storage device;

Correspondingly, the neural network neuron information storage device includes:

A judgment module configured to determine whether the neuron at the current moment is a sparse neuron or a non-sparse neuron based on the recent firing activity of the neuron of the neural network;

The first execution module is configured to transfer the weight information of the neuron from the on-chip storage space of the many-core system to Additional storage space outside of many-core systems;

The second execution module is configured to transfer the weight information of the neuron from the external storage space outside the many-core system when the neuron is a non-sparse neuron at the current time and the neuron was a sparse neuron at the time before the current time. to the on-chip storage space of many-core systems.

Figure 18 is a block diagram of a neural network neuron information storage device provided by an embodiment of the present disclosure, which can be applied to the storage of neural network neuron information.

Referring to Figure 18, an embodiment of the present disclosure provides a neural network neuron information storage device 1800, wherein the neural network is a neural network loaded in a many-core system, and the weight information of the sparse neurons of the neural network is stored in the many-core system. In addition to the additional storage space, the weight information of the non-sparse neurons of the neural network is stored in the on-chip storage space of the many-core system, then the neural network neuron information storage device 1800 includes:

The judgment module 1801 is used to determine whether the neuron at the current moment is a sparse neuron or a non-sparse neuron based on the recent firing activity of the neuron of the neural network;

The first execution module 1802 is used to transfer the weight information of the neuron from the on-chip storage space of the many-core system to Additional storage space outside of many-core systems;

The second execution module 1803 is used to transfer the weight information of the neuron from the external storage space outside the many-core system when the neuron is a non-sparse neuron at the current time and the neuron was a sparse neuron at the time before the current time. to the on-chip storage space of many-core systems.

In some optional implementations, the dynamic scheduling subunit includes: a neural network neuron information processing device;

Correspondingly, the neural network neuron information processing device includes:

The judgment module is configured to determine whether there is information required for neuron firing processing in the processing core when the neuron meets firing-related conditions, and the neuron is any one of the neurons loaded in the processing core;

The acquisition module is configured to obtain the information required for the neuron firing processing from an external storage space outside the many-core system when the information required for the neuron firing processing does not exist in the processing core;

The execution module is configured to store information required for firing processing in the processing core, and perform operations corresponding to firing-related conditions satisfied by the neuron.

Figure 19 is a block diagram of a neural network neuron information processing device provided by an embodiment of the present disclosure, which can be applied to the processing of neural network neuron information.

Referring to Figure 19, an embodiment of the present disclosure provides a neural network neuron information processing device 1900. The neural network neuron information processing device 1900 is applied to the processing core of a many-core system, and the processing core is loaded with neurons of the neural network. The neural network neuron information processing device 1900 includes:

The judgment module 1901 is used to determine whether there is information required for the firing processing of the first neuron in the processing core when the first neuron meets the conditions related to firing. The first neuron is a neuron loaded in the processing core. any one;

The acquisition module 1902 is used to obtain the information required for the firing processing of the first neuron from an external storage space outside the many-core system when the information required for the firing processing of the first neuron does not exist in the processing core;

The execution module 1903 is used to store information required for firing processing in the processing core, and perform operations corresponding to firing-related conditions satisfied by the first neuron.

In some optional implementations, the dynamic scheduling subunit includes: a computing resource scheduling device;

Correspondingly, the computing resource scheduling device includes:

a calculation amount determination module configured to determine the calculation amount of each of the plurality of computing nodes within a predetermined time period;

The task transfer module is configured to transfer the computing task of at least one neuron in the computing node with overloaded computing volume to the target computing node when the computing volume among the multiple computing nodes is unbalanced, where the target computing node is Computing nodes that meet preset conditions and are overloaded with calculations.

Figure 20 is a block diagram of a computing resource scheduling device provided by an embodiment of the present disclosure, which can be applied to computing resource scheduling.

Referring to Figure 20, an embodiment of the present disclosure provides a computing resource scheduling device 2000. The computing resource scheduling device 2000 may include:

The calculation amount determination module 2010 is configured to determine the calculation amount of each of the plurality of computing nodes within a predetermined time period;

The task transfer module 2020 is configured to transfer the computing task of at least one neuron in the computing node with an overloaded computing workload to a target computing node when the computing volume among the computing nodes is unbalanced, where the target computing node satisfies the predetermined requirements. Compute nodes that are conditional and overloaded with calculations.

It should be noted that in the embodiments of the present disclosure, the type of computing tasks is not particularly limited. For example, the computing task may be one or more of image processing tasks, speech processing tasks, text processing tasks, etc. In addition, the computing task may also include collecting the weight, delay, and number information of the succeeding synapses connected to the neuron corresponding to the current computing node, and the numbering information of the succeeding neurons. That is, the current computing node can obtain the above information based on the neuron number. This part of the computational task is the main computational load of the presynaptic neuron. The above collection process may be a reading and sorting process from memory (on-chip or off-chip).

Optionally, the computing resource scheduling device 2000 may also include an average calculation amount determination module 2030, an equalization coefficient calculation module 2040, and a judgment module 2050.

The average calculation amount determination module 2030 is configured to determine the average calculation amount of multiple computing nodes within a predetermined time period.

The balance coefficient calculation module 2040 is configured to calculate the balance coefficient of each computing node according to the calculation amount of each computing node in a predetermined time period and the average calculation amount according to formula (1).

The determination module 2050 is configured to determine that the amount of computation between each computing node is unbalanced when there is a computing node with a balance coefficient greater than a preset threshold.

Optionally, the judgment module 2050 may also be configured to: determine a computing node whose computing volume exceeds a predetermined multiple of the average computing volume of all computing nodes within a predetermined time period as a computing node whose computing volume is overloaded; The computing node based on the average computing volume of all computing nodes within a predetermined time period is determined as the computing node whose computing volume is not overloaded.

Optionally, the task transfer module 2020 is configured to randomly select neurons from computing nodes with overloaded calculations, and transfer the computing tasks of the selected neurons to the target computing nodes.

Optionally, the task transfer module 2020 is configured to move at least one task group in the computing node with overloaded calculations to the target computing node, where the task group includes computing tasks corresponding to multiple neurons.

Optionally, the scheduling device also includes a task transfer notification generation module 2060, configured to: generate a task transfer notification, which carries the address information of the target computing node; and associate the computing task with the neuron of the target computing node. The computing node sends a task transfer notification.

Optionally, the scheduling device may also include a forwarding module 2070 configured to send the cell body processing information of the neuron corresponding to the computing task transferred to the target computing node and the subsequent synapse information to the target node.

In some optional implementations, the dynamic scheduling subunit includes: a data processing device;

Correspondingly, the data processing device includes:

The associated synapse information determination module is configured to determine the synapse information of the synapse connected to the current data processing device. The synapse information includes the position information of the successor neuron of the neuron corresponding to the current data processing device, and the current data processing device. The synaptic weight of the corresponding neuron;

The sending module is configured to send the synaptic weight of the neuron corresponding to the current data processing device to the computing node corresponding to the subsequent neuron, so that the computing node corresponding to the subsequent neuron can perform synaptic integral calculation, wherein, when there is task transfer In the case of notification, at least part of the position information of the subsequent neurons is carried by the task transfer notification.

Figure 21 is a block diagram of a data processing device provided by an embodiment of the present disclosure, which can be applied to neuron data processing.

Referring to Figure 21, an embodiment of the present disclosure provides a data processing device 2100. The data processing device 2100 may include:

The associated synapse information determination module 2110 is configured to determine the synapse information of the synapse connected to the current data processing device. The synapse information includes the position information of the successor neuron of the neuron corresponding to the current data processing device, and the current data processing The synaptic weight of the neuron corresponding to the device.

The sending module 2120 is configured to send the synaptic weight of the neuron corresponding to the current data processing device to the computing node corresponding to the subsequent neuron, so that the computing node corresponding to the subsequent neuron can perform synaptic integral calculation, wherein, when there is a task When transferring notification, The position information of the subsequent neuron is carried by the task transfer notification, and the task transfer notification is a task transfer notification generated after executing the scheduling method provided by the first aspect of the present disclosure.

In a third aspect, embodiments of the present disclosure provide a processing core, which includes a neural network neuron information storage device, a neural network neuron information processing device, a computing resource scheduling device, and a neural network neuron information storage device according to any one of the embodiments of the present disclosure. Any one or more types of data processing devices.

In a fourth aspect, embodiments of the present disclosure provide an electronic device.

Referring to Figure 22, an embodiment of the present disclosure provides an electronic device. The electronic device includes multiple processing cores 2201 and an on-chip network 2202. The multiple processing cores 2201 are connected to the on-chip network 2202, and the on-chip network 2202 is configured to interact with each other. Data between multiple processing cores and external data.

One or more instructions are stored in one or more processing cores 2201, and the one or more instructions are executed by one or more processing cores 2201, so that the one or more processing cores 2201 can execute the above information processing method.

In some embodiments, the electronic device may be a brain-like chip, because the brain-like chip can adopt a vectorized calculation method and needs to be loaded into the neural network through an external memory such as a double data rate (Double Data Rate, DDR) synchronous dynamic random access memory. Model weight information and other parameters. Therefore, the operation efficiency of batch processing in the embodiments of the present disclosure is relatively high.

Embodiments of the present disclosure also provide a computer-readable storage medium with a computer program stored thereon.

Figure 23 is a block diagram of a computer-readable medium provided by an embodiment of the present disclosure. Wherein, the computer program implements the above data processing method when executed by the processor/processing core. Computer-readable storage media may be volatile or non-volatile computer-readable storage media.

Embodiments of the present disclosure also provide a computer program product, including a computer readable code, or a non-volatile computer readable storage medium carrying the computer readable code, when the computer readable code is stored in a processor of an electronic device When running, the processor in the electronic device executes the above information processing method.

Those of ordinary skill in the art can understand that all or some steps, systems, and functional modules/units in the devices disclosed above can be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may consist of several physical components. Components execute cooperatively. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit . Such software may be distributed on computer-readable storage media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).

As is known to those of ordinary skill in the art, the term computer storage media includes volatile and non-volatile media implemented in any method or technology for storage of information such as computer readable program instructions, data structures, program modules or other data. lossless, removable and non-removable media. Computer storage media include, but are not limited to, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM), static random access memory (SRAM), flash memory or other memory technology, portable Compact Disc Read Only Memory (CD-ROM), Digital Versatile Disk (DVD) or other optical disk storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or that can be used to store the desired information and can be accessed by a computer any other media. Additionally, it is known to those of ordinary skill in the art that communication media typically embodies computer readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery medium.

Computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to various computing/processing devices, or to an external computer or external storage device over a network, such as the Internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage on a computer-readable storage medium in the respective computing/processing device .

Computer program instructions for performing operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or instructions in one or more programming languages. Source code or object code written in any combination of object-oriented programming languages - such as Smalltalk, C++, etc., and conventional procedural programming languages - such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server implement. In situations involving remote computers, the remote computer can be connected to the user's computer through any kind of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (such as an Internet service provider through the Internet). connect). In some embodiments, electronic circuits are customized by utilizing state information of computer readable program instructions, such as programmable logic circuits, field programmable gate arrays (FPGA) or programmable logic array (PLA), electronic circuits that can execute computer-readable program instructions to implement various aspects of the present disclosure.

The computer program products described herein may be implemented in hardware, software, or a combination thereof. In an optional embodiment, the computer program product can be embodied as a computer storage medium. In another optional embodiment, the computer program product can be embodied as a software product, such as a Software Development Kit (SDK), etc. wait.

Aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.

These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus, thereby producing a machine that, when executed by the processor of the computer or other programmable data processing apparatus, , resulting in an apparatus that implements the functions/actions specified in one or more blocks in the flowchart and/or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium. These instructions cause the computer, programmable data processing device and/or other equipment to work in a specific manner. Therefore, the computer-readable medium storing the instructions includes An article of manufacture that includes instructions that implement aspects of the functions/acts specified in one or more blocks of the flowcharts and/or block diagrams.

Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other equipment, causing a series of operating steps to be performed on the computer, other programmable data processing apparatus, or other equipment to produce a computer-implemented process , thereby causing instructions executed on a computer, other programmable data processing apparatus, or other equipment to implement the functions/actions specified in one or more blocks in the flowcharts and/or block diagrams.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions that embody one or more elements for implementing the specified logical function(s). Executable instructions. In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two consecutive blocks may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the functionality involved. It will also be noted that each block of the block diagram and/or flowchart illustration, and combinations of blocks in the block diagram and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts. , or can be implemented using a combination of specialized hardware and computer instructions.

Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a general illustrative sense only and not for purpose of limitation. In some instances, it will be apparent to those skilled in the art that features, characteristics and/or elements described in connection with a particular embodiment may be used alone, or may be used in conjunction with other embodiments, unless expressly stated otherwise. Features and/or components used in combination. Accordingly, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

An information processing method, wherein the information processing method is applied to a many-core system, at least some of the processing cores of the many-core system are loaded with neurons of a neural network, the information processing method includes:

According to the issuance information of the neuron, storage resources are dynamically scheduled for the neuron to perform the issuance processing based on the scheduled storage resources, and/or according to the issuance information of the neuron, computing resources are dynamically scheduled for use. The neurons perform computing tasks based on scheduled computing resources;

Wherein, the storage resources include on-chip storage space of the many-core system and/or additional storage space outside the many-core system.
The information processing method according to claim 1, wherein the firing information of the neuron includes the recent firing activity of the neuron;

According to the neuron firing information, dynamically schedule storage resources, including:

Determine the state change information of the neuron according to the recent firing activity of the neuron, and dynamically schedule the on-chip storage space of the many-core system and/or the many-core system based on the state change information of the neuron. The external storage space stores neural network neuron information;

Wherein, the state of the neuron includes a sparse neuron or a non-sparse neuron, and the state change information of the neuron is used to characterize the change of the neuron between a sparse neuron and a non-sparse neuron.
The information processing method according to claim 2, wherein the neural network neuron information at least includes weight information of the neurons, and the weight information of the sparse neurons of the neural network is stored outside the many-core system. In addition to storage space, the weight information of the non-sparse neurons of the neural network is stored in the on-chip storage space of the many-core system, and the state change information of the neurons is determined based on the recent firing activity of the neurons, And based on the state change information of the neurons, dynamically schedule the on-chip storage space of the many-core system and/or the additional storage space outside the many-core system to store neural network neuron information, including:

Determine whether the neuron at the current moment is a sparse neuron or a non-sparse neuron according to the recent firing activity of the neuron of the neural network;

When the neuron is a sparse neuron at the current moment, and the neuron was a non-sparse neuron at the moment before the current moment, transfer the weight information of the neuron from the on-chip storage space of the many-core system to additional storage space outside the many-core system;

When the neuron is a non-sparse neuron at the current moment, and the neuron was a sparse neuron at the moment before the current moment, the weight information of the neuron is obtained from an external storage space outside the many-core system. transferred to the on-chip storage space of the many-core system.
The information processing method according to claim 3, wherein said transferring the weight information of the neurons from the on-chip storage space of the many-core system to an external storage space outside the many-core system includes:

Transfer the weight information of the neuron from the on-chip storage space of the many-core system to an external storage space outside the many-core system, and store the address information of the weight information of the neuron in the external storage space in the many-core system. The on-chip storage space of the many-core system is used to enable the many-core system to obtain the weight information of the neuron based on the address information.
The information processing method according to claim 3, wherein said transferring the weight information of the neuron from an external storage space outside the many-core system to an on-chip storage space of the many-core system includes:

Transfer the weight information of the neuron from the external storage space outside the many-core system to the on-chip storage space corresponding to the subsequent neuron of the neuron, so that the subsequent neuron is based on the weight information of the neuron Process accordingly.
The information processing method according to claim 3, wherein said transferring the weight information of the neurons from the on-chip storage space of the many-core system to an external storage space outside the many-core system includes:

Obtain the weight index information and effective weight information of the neuron according to the weight information of the neuron;

Wherein, the weight information of the neuron includes the connection weight value of the neuron and its successor neuron; the weight index information includes at least one identification information, and there is a connection between the identification information and the successor neuron of the neuron. The corresponding relationship is used to indicate whether the connection weight value between the subsequent neuron and the neuron is zero; the effective weight information includes a valid weight value, and the effective weight value is the value between the neuron and the subsequent neuron. A non-zero connection weight value;

The weight index information and effective weight information of the neuron are stored in an external storage space outside the many-core system.
The information processing method according to claim 3, wherein said transferring the weight information of the neuron from an external storage space outside the many-core system to an on-chip storage space of the many-core system includes:

Obtain the connection weight value of the neuron and its subsequent neuron according to the weight information of the neuron;

Wherein, the weight information of the neuron includes the weight index information of the neuron and the effective weight information. The weight index information includes at least one identification information, and there is a relationship between the identification information and the subsequent neuron of the neuron. The corresponding relationship is used to indicate whether the connection weight value between the subsequent neuron and the neuron is zero; the effective weight information includes a valid weight value, so The effective weight value is the connection weight value between the neuron and the subsequent neuron that is not zero;

The connection weight value between the neuron and at least one subsequent neuron is stored in an on-chip storage space corresponding to the subsequent neuron.
The information processing method according to claim 3, wherein the recent firing activity of the neuron includes the firing frequency of the neuron in a predetermined time period before the current time, the predetermined time of the neuron before the current time. At least one of the change amount of the firing frequency of the segment and the activity of the neuron at the current moment.
The information processing method according to claim 8, wherein the activity of the neuron at the current moment is determined by the activity of the neuron at the previous moment and the firing value of the neuron at the current moment.
The information processing method according to claim 3, wherein determining whether the neuron is a sparse neuron or a non-sparse neuron at the current moment according to the recent firing activity of the neuron of the neural network includes:

Every predetermined time, it is determined whether the neuron of the neural network is a sparse neuron or a non-sparse neuron at the current moment according to the recent firing activity of the neuron of the neural network.
The information processing method according to claim 1, wherein the storage resource is used to store information required for the release processing of the neuron, and the process of the neuron performing the release processing based on the scheduled storage resources includes:

When the neuron satisfies the firing conditions, determine the storage location of the information required for firing processing of the neuron, obtain the information required for firing processing based on the storage location, and perform the firing processing based on the information required. Perform firing processing of the neuron;

Wherein, the storage location corresponds to the on-chip storage space of the many-core system or an additional storage space outside the many-core system.
The information processing method according to claim 1 or 11, wherein the neuron firing process includes:

When the neuron meets the conditions related to firing, determine whether there is information required for firing processing of the neuron in the processing core loaded with the neuron;

When the information required for the firing processing of the neuron does not exist in the processing core, obtain the information required for the firing processing of the neuron from an external storage space outside the many-core system;

The information required for the firing process is stored in the processing core, and operations corresponding to firing-related conditions satisfied by the neuron are performed.
The information processing method according to claim 12, wherein the firing-related conditions include: the neuron is a source neuron to be fired;

The information required for the firing processing of the neuron includes: the processing core information corresponding to the target neuron; wherein the target neuron is the neuron that receives the firing information of the neuron;

The execution of operations corresponding to the firing-related conditions satisfied by the neuron includes: transmitting the firing information of the neuron to the processing core corresponding to the target neuron.
The information processing method according to claim 12, wherein the firing-related conditions include: the neuron is a target neuron that receives firing information;

The information required for the firing processing of the neuron includes: the connection weight value of the source neuron corresponding to the neuron and the firing information;

The performing an operation corresponding to the firing-related condition satisfied by the neuron includes: calculating the input current value of the neuron according to the connection weight value.
The information processing method according to claim 12, wherein the storing the information required for the issuance processing in the processing core includes:

When the space required to store the information required for issuance processing is greater than the free storage space of the processing core, delete the stored information in the occupied storage space of the processing core until the free storage space is greater than The space required to store the information required for the issuance processing is stored in the free storage space.
The information processing method according to claim 15, wherein the deleting the stored information that has occupied the storage space of the processing core until the free storage space is larger than the occupied space required to store the information required for issuance processing. space, including:

According to the order of the time when the stored information is stored in the occupied storage space from early to late, the stored information is deleted sequentially until the free storage space is larger than that required for storing the information required for the issuance process. occupied space.
The information processing method according to claim 15, wherein the deleting the stored information in the occupied storage space of the processing core until the free storage space is larger than the space required to store the information required for the issuance processing ,include:

Delete the stored information in order from earliest to latest time when the stored information was last read, until the free storage space is larger than the space required to store the information required for issuance processing. .
The information processing method according to claim 15, wherein the deleting the stored information that has occupied the storage space of the processing core until the free storage space is larger than the occupied space required to store the information required for the issuance processing. Space to store the information required for the issuance processing in the free storage space, including:

Delete the stored data that has occupied the storage space of the processing core to obtain new free storage space, until the sum of the new free storage space and the original free storage space is greater than the space required to store the information required for the issuance processing;

In the case where the new free storage space is not continuous with the original free storage space, the information required for issuance processing is first stored in the original free storage space and then in the new free storage space in order, And store the starting address of the new free storage space in the original free storage space.
The information processing method according to claim 12, wherein the information required for the issuance processing is stored after the processing core, and the information processing method further includes:

The index information of the information required for issuance processing is stored in the processing core, and the index information of the information required for issuance processing includes the identification of the neuron and the storage location of the information required for issuance processing in the processing core. address information.
The information processing method according to claim 19, wherein the index information for issuing information required for processing includes at least one of the following:

The time when the information required for the issuance processing is stored in the processing core;

The time when the information required for the issuance process was last read.
The information processing method according to claim 1, wherein at least part of the neurons constitute a computing node;

Dynamically schedule computing resources according to the neuron firing information, including:

For at least one of the plurality of computing nodes, determine the calculation amount of the computing node according to the firing information of a plurality of the neurons in the computing node;

If it is determined that there is an imbalance in the calculation amount based on the calculation amounts of a plurality of the calculation nodes, adjusting the calculation tasks of at least one neuron of at least part of the calculation nodes.
The information processing method according to claim 1 or 21, wherein the scheduling process of the computing resources includes:

Determine the calculation amount of each of the plurality of calculation nodes within a predetermined time period;

In the case where the calculation amount among multiple computing nodes is unbalanced, the computing task of at least one neuron in the computing node with overloaded computing amount is transferred to the target computing node, wherein the target computing node satisfies the preset Computing nodes that meet certain conditions and are not overloaded with calculations.
The information processing method according to claim 22, wherein after determining the calculation amount of each of the plurality of calculation nodes within a predetermined time period, the information processing method further includes:

Determine the average calculation amount of a plurality of the computing nodes within the predetermined time period;

Determine the absolute value of the difference between the calculation amount of each computing node within the preset time period and the average calculation amount, and determine each calculated amount based on the ratio of the absolute value of the difference to the average calculation amount. Calculate the equilibrium coefficient of the node;

When there is a balance coefficient of at least one computing node that is greater than a preset threshold, it is determined that the computing volume among multiple computing nodes is unbalanced.
The information processing method according to claim 23, wherein the preset threshold is taken between 5 and 10.
The information processing method according to claim 23, wherein after determining that the computing load is unbalanced among a plurality of the computing nodes, the information processing method further includes:

Determine a computing node whose computing volume exceeds a predetermined multiple of the average computing volume of all computing nodes within the predetermined time period as a computing node with an overloaded computing volume;

The computing nodes whose computing volume does not reach the average computing volume of all computing nodes within the predetermined time period are determined as computing nodes whose computing volume is not overloaded.
The information processing method according to claim 25, wherein the predetermined multiple is 5 to 10 times.
The information processing method according to any one of claims 22 to 26, wherein said transferring the computing task of at least one neuron in a computing node with an overloaded computing load to a target computing node includes:

Randomly select at least one neuron from the computing node with overloaded calculations, and transfer the computing task of the selected at least one neuron to the target computing node.
The information processing method according to any one of claims 22 to 26, wherein said transferring the computing task of at least one neuron in a computing node with an overloaded computing load to a target computing node includes:

Move at least one task group in the computing node with overloaded calculations to the target computing node, where the task group includes computing tasks corresponding to multiple neurons.
The information processing method according to any one of claims 22 to 26, wherein after transferring the computing task of at least one neuron in the computing node with overloaded computing amount to the target computing node, the information processing method further includes :

Generate a task transfer notification, where the task transfer notification carries address information of the target computing node;

The task transfer notification is sent to the computing node associated with the neuron of the target computing node to which the computing task is transferred.
The information processing method according to claim 29, wherein the computing node associated with the neuron transferred to the target computing node includes a computing node where the predecessor synapse of the neuron transferred to the target computing node is located, and/or The computing node associated with the neuron transferred to the target computing node includes the computing node where the successor synapse of the neuron transferred to the target computing node is located.
The information processing method according to any one of claims 22 to 26, wherein after transferring the computing task of at least one neuron in the computing node with overloaded computing amount to the target computing node, the information processing method further includes :

The cell body processing information of the neuron corresponding to the computing task transferred to the target computing node and the subsequent synaptic information are sent to the target computing node.
The information processing method according to any one of claims 22 to 26, wherein the preset conditions include:

The distance from the computationally overloaded computing node does not exceed a predetermined number of computing nodes.
The information processing method according to any one of claims 22 to 26, wherein the information processing method periodically performs computing resource scheduling, and the predetermined time periods in different cycles are time periods within the respective cycles.
The information processing method according to any one of claims 22 to 26, wherein the computing tasks include at least one of the following tasks:

Image processing tasks, speech processing tasks, text processing tasks, the weight, delay, and number information of subsequent neurons connected to the neuron corresponding to the current computing node are collected.
The information processing method according to claim 21, wherein the information processing method includes:

Determine the synaptic information of the synapse connected to the current computing node, the synaptic information including the position information of the successor neuron of the neuron corresponding to the current computing node, and the synaptic weight of the neuron corresponding to the current computing node;

Send the synaptic weight of the neuron corresponding to the current computing node to the computing node corresponding to the subsequent neuron, so that the computing node corresponding to the subsequent neuron can perform synaptic integral calculation,

Wherein, when there is a task transfer notification, at least part of the position information of the subsequent neurons is carried by the task transfer notification.
An information processing unit, wherein the information processing unit is applied to a many-core system, at least some of the processing cores of the many-core system are loaded with neurons of a neural network, the information processing unit includes:

Dynamic scheduling subunit, configured to dynamically schedule storage resources according to the issuing information of the neuron, so that the neuron can perform issuing processing based on the scheduled storage resources, and/or, according to the issuing information of the neuron , dynamically schedule computing resources for the neurons to perform computing tasks based on the scheduled computing resources;

Wherein, the storage resources include on-chip storage space of the many-core system and/or additional storage space outside the many-core system.
The information processing unit according to claim 36, wherein the weight information of the sparse neurons of the neural network is stored in an additional storage space outside the many-core system, and the weight information of the non-sparse neurons of the neural network is stored In the on-chip storage space of the many-core system, the dynamic scheduling subunit includes: a neural network neuron information storage device;

The neural network neuron information storage device includes:

A judgment module configured to determine whether the neuron of the neural network is a sparse neuron or a non-sparse neuron at the current moment based on the recent firing activity of the neuron of the neural network;

The first execution module is configured to convert the weight information of the neuron from the neuron when the neuron is a sparse neuron at the current moment and the neuron is a non-sparse neuron at the moment before the current moment. Transferring the on-chip storage space of the many-core system to an additional storage space outside the many-core system;

The second execution module is configured to, when the neuron is a non-sparse neuron at the current moment, and the neuron was a sparse neuron at the moment before the current moment, convert the weight information of the neuron from the The additional storage space outside the many-core system is transferred to the on-chip storage space of the many-core system.
The information processing unit according to claim 36, wherein the dynamic scheduling subunit includes: a neural network neuron information processing device;

The neural network neuron information processing device includes:

A judgment module configured to determine whether there is information required for the firing processing of the neuron in the processing core when the neuron meets the firing-related conditions, and the neuron is a neuron loaded in the processing core. any of;

An acquisition module configured to obtain the information required for the firing processing of the neuron from an external storage space outside the many-core system when the information required for the firing processing of the neuron does not exist in the processing core. ;

An execution module is configured to store the information required for the firing process in the processing core, and perform operations corresponding to firing-related conditions satisfied by the neuron.
The information processing unit according to claim 36, wherein the dynamic scheduling subunit includes: a scheduling device for computing resources;

The computing resource scheduling device includes:

A calculation amount determination module configured to determine the calculation amount of each of the plurality of computing nodes within a predetermined time period;

A task transfer module configured to transfer the computing task of at least one neuron in the computing node with an overloaded computing load to the target computing node when the computing load among the plurality of computing nodes is unbalanced, wherein, the The target computing node is a computing node that meets the preset conditions and is overloaded with calculations.
The information processing unit according to claim 36, wherein the dynamic scheduling subunit includes: a data processing device;

The data processing device includes:

The associated synapse information determination module is configured to determine the synapse information of the synapse connected to the current data processing device, the synapse information includes the position information of the successor neuron of the neuron corresponding to the current data processing device, and the current data The synaptic weight of the neuron corresponding to the processing device;

The sending module is configured to send the synaptic weight of the neuron corresponding to the current data processing device to the computing node corresponding to the subsequent neuron, so that the computing node corresponding to the subsequent neuron can perform synaptic integral calculation, wherein, when there is In the case of a task transfer notification, at least part of the position information of the subsequent neurons is carried by the task transfer notification.
An electronic device, including a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that when the processor executes the computer program, any one of claims 1 to 35 is implemented The information processing method described.
A computer-readable storage medium on which a computer program is stored, characterized in that when the computer program is executed by a processor, the information processing method as described in any one of claims 1 to 35 is implemented.
A computer program product comprising computer readable code, or a non-volatile computer readable storage medium carrying the computer readable code, wherein when the computer readable code is executed in a processor of an electronic device, the The processor in the electronic device executes the information processing method described in any one of claims 1-35.