WO2023189020A1 - High-frequency circuit and amplification method - Google Patents

High-frequency circuit and amplification method Download PDF

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Publication number
WO2023189020A1
WO2023189020A1 PCT/JP2023/006215 JP2023006215W WO2023189020A1 WO 2023189020 A1 WO2023189020 A1 WO 2023189020A1 JP 2023006215 W JP2023006215 W JP 2023006215W WO 2023189020 A1 WO2023189020 A1 WO 2023189020A1
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WO
WIPO (PCT)
Prior art keywords
band
filter
high frequency
power supply
frequency circuit
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Application number
PCT/JP2023/006215
Other languages
French (fr)
Japanese (ja)
Inventor
正二 南雲
浩樹 葉山
智 櫻井
Original Assignee
株式会社村田製作所
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Publication of WO2023189020A1 publication Critical patent/WO2023189020A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits

Definitions

  • the present invention relates to a high frequency circuit and an amplification method.
  • Patent Document 1 discloses a high frequency circuit that can simultaneously transmit signals in multiple bands.
  • the quality of the signal may deteriorate when transmitting signals of multiple bands at the same time.
  • the present invention provides a high frequency circuit and an amplification method that can suppress quality deterioration of a transmitted signal when transmitting signals of multiple bands simultaneously.
  • a high frequency circuit includes a first power amplifier, a first filter connected to the first power amplifier and having a pass band including a first band capable of simultaneous transmission with a second band, and a first power amplifier.
  • a first power supply terminal receiving a first power supply voltage supplied to the amplifier, and a second filter connected between the first power supply terminal and the first power amplifier, the second filter receiving a first power supply voltage supplied to the amplifier. and an attenuation band that includes at least a portion of the attenuation band.
  • a high frequency circuit includes a first power amplifier, a first filter connected to the first power amplifier and having a pass band including a first band capable of simultaneous transmission with a second band, and a first power amplifier.
  • a first power supply terminal receiving a first power supply voltage supplied to the amplifier; a second filter connected between the first power supply terminal and the first power amplifier; a second power amplifier; and a second power supply terminal connected to the second power amplifier.
  • a third filter having a passband including the second band; a second power supply terminal receiving the second power supply voltage supplied to the second power amplifier; and a third filter connected between the second power supply terminal and the second power amplifier.
  • a fourth filter the second filter having an attenuation band including at least a portion of the first band, and the fourth filter having an attenuation band including at least a portion of the second band.
  • An amplification method receives a first power supply voltage via a first power supply line, and uses the received first power supply voltage to generate a transmission signal of a first band that can be transmitted simultaneously with a second band.
  • the second band noise generated by the amplification of the first band transmission signal is attenuated in the first power supply line.
  • FIG. 1 is a circuit configuration diagram of a communication device according to the first embodiment.
  • FIG. 2A is a graph showing an example of changes in power supply voltage in APT mode.
  • FIG. 2B is a graph showing an example of changes in power supply voltage in A-ET mode.
  • FIG. 2C is a graph showing an example of the change in power supply voltage in the D-ET mode.
  • FIG. 3A is a graph showing the pass characteristics of the second filter according to the first embodiment.
  • FIG. 3B is a graph showing the pass characteristics of the fourth filter according to the first embodiment.
  • FIG. 4 is a plan view of the high frequency circuit according to the implementation example of the first embodiment.
  • FIG. 5 is a plan view of the high frequency circuit according to the implementation example of the first embodiment.
  • FIG. 6 is a cross-sectional view of the high frequency circuit according to the implementation example of the first embodiment.
  • FIG. 7 is a flowchart showing an amplification method using the high frequency circuit according to the first embodiment.
  • FIG. 8 is a circuit configuration diagram of a communication device according to the second embodiment.
  • FIG. 9A is a graph showing the pass characteristics of the second filter according to the second embodiment.
  • FIG. 9B is a graph showing the pass characteristics of the fourth filter according to the second embodiment.
  • FIG. 10 is a plan view of a high frequency circuit according to a mounting example of the second embodiment.
  • FIG. 11 is a plan view of a high frequency circuit according to a mounting example of the second embodiment.
  • FIG. 12 is a cross-sectional view of a high frequency circuit according to a mounting example of the second embodiment.
  • FIG. 13A is a graph showing the pass characteristics of the second filter according to a modification of the second embodiment.
  • FIG. 13B is a graph showing the pass characteristics of the fourth filter
  • each figure is a schematic diagram with emphasis, omission, or ratio adjustment as appropriate to illustrate the present invention, and is not necessarily strictly illustrated, and the actual shape, positional relationship, and ratio may differ. It may be different.
  • substantially the same configurations are denoted by the same reference numerals, and overlapping explanations may be omitted or simplified.
  • the x-axis and the y-axis are axes that are orthogonal to each other on a plane parallel to the main surface of the module board. Specifically, when the module board has a rectangular shape in plan view, the x-axis is parallel to the first side of the module board, and the y-axis is parallel to the second side orthogonal to the first side of the module board. It is. Further, the z-axis is an axis perpendicular to the main surface of the module substrate, and its positive direction indicates an upward direction, and its negative direction indicates a downward direction.
  • connection includes not only the case of direct connection with a connection terminal and/or wiring conductor, but also the case of electrical connection through other circuit elements.
  • Connected between A and B means connected to both A and B between A and B, and in addition to being connected in series to the path connecting A and B. This includes being connected in parallel (shunt connection) between the path and ground.
  • the component is placed on the board includes placing the component on the main surface of the board and placing the component within the board.
  • the component is placed on the main surface of the board means that the part is placed in contact with the main surface of the board, and also that the part is placed above the main surface without contacting the main surface. (e.g., the part is stacked on top of another part placed in contact with the major surface).
  • the component is placed on the main surface of the substrate may include that the component is placed in a recess formed in the main surface.
  • a component is placed within a board means that, in addition to being encapsulated within a module board, all of the part is located between the two main surfaces of the board, but only a portion of the part is encapsulated within the module board. This includes not being covered by the board and only part of the component being placed within the board.
  • planar view of the module board means viewing an object orthographically projected onto the xy plane from the positive side of the z-axis.
  • a overlaps B in plan view means that the area of A orthogonally projected onto the xy plane overlaps the area of B orthogonally projected onto the xy plane.
  • a is placed between B and C means that at least one of the multiple line segments connecting any point in B and any point in C passes through A. do.
  • the passband of a filter is a portion of the frequency spectrum transmitted by the filter, and is defined as a frequency band in which the output power is not attenuated by 3 dB or more below the maximum output power.
  • the attenuation band of a filter is defined as a frequency band in which the output power is attenuated by 15 dB or more relative to the maximum output power.
  • FIG. 1 is a circuit configuration diagram of a communication device 6 according to this embodiment.
  • the communication device 6 includes a high frequency circuit 1, antennas 2a and 2b, an RFIC (Radio Frequency Integrated Circuit) 3, a BBIC (Baseband Integrated Circuit) 4, and a voltage supply circuit 5.
  • RFIC Radio Frequency Integrated Circuit
  • BBIC Baseband Integrated Circuit
  • the high frequency circuit 1 transmits high frequency signals between the antennas 2a and 2b and the RFIC 3.
  • the internal configuration of the high frequency circuit 1 will be described later.
  • the antennas 2a and 2b are connected to antenna connection terminals 101 and 102 of the high frequency circuit 1, respectively, and transmit high frequency signals output from the high frequency circuit 1. Further, the antennas 2a and 2b receive high frequency signals from the outside and output them to the high frequency circuit 1.
  • the RFIC 3 is an example of a signal processing circuit that processes high frequency signals. Specifically, the RFIC 3 performs signal processing on the high frequency received signal input via the reception path of the high frequency circuit 1 by down-converting or the like, and outputs the received signal generated by the signal processing to the BBIC 4 . Further, the RFIC 3 processes the transmission signal input from the BBIC 4 by up-converting or the like, and outputs the high-frequency transmission signal generated by the signal processing to the transmission path of the high-frequency circuit 1. Further, the RFIC 3 has a control section that controls the high frequency circuit 1. Note that part or all of the function of the control unit of the RFIC 3 may be implemented outside the RFIC 3, for example, in the BBIC 4 or the high frequency circuit 1.
  • the BBIC 4 is a baseband signal processing circuit that processes signals using an intermediate frequency band lower in frequency than the high frequency signal transmitted by the high frequency circuit 1.
  • the signal processed by the BBIC 4 for example, an image signal for displaying an image and/or an audio signal for talking through a speaker is used.
  • the voltage supply circuit 5 can supply a power supply voltage to the high frequency circuit 1.
  • the voltage supply circuit 5 may supply a modulated power supply voltage to improve power efficiency.
  • the modulation of the power supply voltage may be limited to a plurality of discrete levels.
  • Methods of supplying such a modulated power supply voltage having a plurality of discrete levels include, for example, average power tracking (APT) mode, symbol power tracking (SPT) mode, analog Envelope tracking (A-ET: Analog Envelope Tracking) mode, digital envelope tracking (D-ET: Digital Envelope Tracking) mode, etc. can be used, but are not limited thereto.
  • A-ET Average power tracking
  • SPT symbol power tracking
  • A-ET Analog Envelope Tracking
  • D-ET Digital Envelope Tracking
  • the power supply voltage supplied from the voltage supply circuit 5 is not particularly limited.
  • the voltage supply circuit 5 may supply a fixed power supply voltage or may supply a continuously changing power supply voltage.
  • the circuit configuration of the communication device 6 shown in FIG. 1 is an example and is not limited thereto.
  • the communication device 6 may not include the antenna 2a, the antenna 2b, the BBIC 4, or any combination thereof.
  • the communication device 6 may include three or more antennas.
  • tracking mode a tracking mode applicable to the power supply voltage supplied from the voltage supply circuit 5 will be described with reference to FIGS. 2A to 2C.
  • FIG. 2A is a graph showing an example of the change in power supply voltage in APT mode.
  • the power supply voltage is varied to a plurality of discrete voltage levels in units of one frame.
  • the power supply voltage signal forms a square wave.
  • the voltage level of the power supply voltage is determined based on the average output power. Note that in the APT mode, the voltage level may change in units smaller than one frame (for example, subframes, slots, or symbols).
  • APT in which the voltage level changes on a symbol-by-symbol basis is sometimes called SPT.
  • a frame means a unit that constitutes a high frequency signal (modulated wave).
  • a frame includes 10 subframes, each subframe includes multiple slots, and each slot consists of multiple symbols.
  • the subframe length is 1ms and the frame length is 10ms.
  • FIG. 2B is a graph showing an example of the change in power supply voltage in A-ET mode.
  • A-ET mode the envelope of the modulated wave is tracked by continuously varying the power supply voltage.
  • A-ET mode the power supply voltage is determined based on the envelope signal.
  • the envelope signal is a signal indicating the envelope of a modulated wave.
  • the envelope value is expressed, for example, as the square root of (I 2 +Q 2 ).
  • (I, Q) represents a constellation point.
  • a constellation point is a point on a constellation diagram that represents a signal modulated by digital modulation.
  • (I, Q) is determined by the BBIC 4 based on transmission information, for example.
  • FIG. 2C is a graph showing an example of the change in power supply voltage in the D-ET mode.
  • the envelope of the modulated wave is tracked by varying the power supply voltage to a plurality of discrete voltage levels within one frame.
  • the power supply voltage signal forms a square wave.
  • the power supply voltage level is selected or set from among a plurality of discrete voltage levels based on the envelope signal.
  • a plurality of discrete levels of power supply voltage are prepared in advance, and one level is selected and output from the plurality of prepared levels using a switch (not shown). Ru.
  • the level of the power supply voltage supplied to the power amplifiers 11 and 12 can be changed at high speed using the switch.
  • multiple switches it is also possible to supply different levels of power supply voltage to multiple power amplifiers.
  • the method of modulating the power supply voltage in the D-ET mode is not limited to this method. For example, multiple discrete voltage levels may be generated and output at any time. Also, in SPT and/or APT, the power supply voltage may be modulated in the same manner as in the D-ET mode.
  • the high frequency circuit 1 includes power amplifiers 11 and 12, low noise amplifiers 21 and 22, filters 31 to 34, capacitors 41 and 42, switches 51 to 53, a PA control circuit 61, and antenna connection terminals 101 and 102. , high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, a power supply terminal 131, and a control terminal 141. Below, the components of the high frequency circuit 1 will be explained in order.
  • the antenna connection terminals 101 and 102 are both connected to the switch 51 within the high frequency circuit 1, and are connected to the antennas 2a and 2b, respectively, outside the high frequency circuit 1.
  • Band A and B transmission signals amplified by power amplifiers 11 and 12 are output to antennas 2a and 2b via antenna connection terminals 101 and 102, respectively.
  • the reception signals of bands A and B received by the antennas 2a and 2b are input to the high frequency circuit 1 via the antenna connection terminals 101 and 102.
  • the high frequency input terminal 111 is a terminal for receiving a band A transmission signal from outside the high frequency circuit 1.
  • the high frequency input terminal 111 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the input terminal of the power amplifier 11 inside the high frequency circuit 1. Thereby, the band A transmission signal received from the RFIC 3 via the high frequency input terminal 111 is supplied to the power amplifier 11.
  • the high frequency input terminal 112 is a terminal for receiving a band B transmission signal from outside the high frequency circuit 1.
  • the high frequency input terminal 112 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the input terminal of the power amplifier 12 inside the high frequency circuit 1. Thereby, the band B transmission signal received from the RFIC 3 via the high frequency input terminal 112 is supplied to the power amplifier 12.
  • the high frequency output terminal 121 is a terminal for supplying a band A received signal to the outside of the high frequency circuit 1.
  • the high frequency output terminal 121 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the output terminal of the low noise amplifier 21 inside the high frequency circuit 1. Thereby, the band A reception signal amplified by the low noise amplifier 21 is supplied to the RFIC 3 via the high frequency output terminal 121.
  • the high frequency output terminal 122 is a terminal for supplying a band B received signal to the outside of the high frequency circuit 1.
  • the high frequency output terminal 122 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the output terminal of the low noise amplifier 22 inside the high frequency circuit 1. Thereby, the band B received signal amplified by the low noise amplifier 22 is supplied to the RFIC 3 via the high frequency output terminal 122.
  • the power terminal 131 is an example of a first power terminal and an example of a second power terminal. That is, in this embodiment, the first power supply terminal that receives the power supply voltage supplied to the power amplifier 11 and the second power supply terminal that receives the power supply voltage supplied to the power amplifier 12 are the same power supply terminal.
  • the power supply terminal 131 is connected to the voltage supply circuit 5 outside the high frequency circuit 1 and connected to the power amplifiers 11 and 12 inside the high frequency circuit 1. Thereby, the power supply voltage received from the voltage supply circuit 5 via the power supply terminal 131 is supplied to the power amplifiers 11 and 12.
  • the control terminal 141 is a terminal for transmitting a control signal. That is, the control terminal 141 is a terminal for receiving a control signal from outside the high frequency circuit 1 and/or a terminal for supplying a control signal to the outside of the high frequency circuit 1.
  • the power amplifiers 11 and 12 are active circuits that obtain output signals with greater energy than the input signal (transmission signal) based on the power (power supply voltage) supplied from the power supply.
  • Each of power amplifiers 11 and 12 includes an amplification transistor and may further include an inductor and/or a capacitor.
  • the internal configurations of power amplifiers 11 and 12 are not particularly limited.
  • each of the power amplifiers 11 and 12 may be a multistage amplifier, a differential amplifier, or a Doherty amplifier.
  • the power amplifier 11 is an example of a first power amplifier, and is connected between the high frequency input terminal 111 and the filter 31. Specifically, the input terminal of the power amplifier 11 is connected to the high frequency input terminal 111, and the output terminal of the power amplifier 11 is connected to the filter 31 via the switch 52. Further, the power amplifier 11 is connected to a power supply terminal 131 via a power supply line P1 (first power supply line). Thereby, the power amplifier 11 can amplify the band A transmission signal received via the high frequency input terminal 111 using the power supply voltage (first power supply voltage) received via the power supply terminal 131.
  • the power amplifier 12 is an example of a second power amplifier, and is connected between the high frequency input terminal 112 and the filter 32. Specifically, the input terminal of the power amplifier 12 is connected to the high frequency input terminal 112, and the output terminal of the power amplifier 12 is connected to the filter 32 via the switch 53. Further, the power amplifier 12 is connected to a power supply terminal 131 via a power supply line P2 (second power supply line). Thereby, the power amplifier 12 can amplify the band B transmission signal received via the high frequency input terminal 112 using the power supply voltage (second power supply voltage) received via the power supply terminal 131.
  • P2 second power supply line
  • the low noise amplifiers 21 and 22 are active circuits that obtain output signals with greater energy than the input signal (received signal) based on the power supplied from the power supply.
  • Each of low noise amplifiers 21 and 22 includes an amplification transistor and may further include an inductor and/or a capacitor.
  • the internal configurations of the low noise amplifiers 21 and 22 are not particularly limited.
  • the low noise amplifier 21 is connected between the filter 31 and the high frequency output terminal 121. Specifically, the input terminal of the low noise amplifier 21 is connected to the filter 31 via the switch 52, and the output terminal of the low noise amplifier 21 is connected to the high frequency output terminal 121. Thereby, the low noise amplifier 21 can amplify the band A reception signal received via the filter 31 and supply it to the RFIC 3.
  • the low noise amplifier 22 is connected between the filter 32 and the high frequency output terminal 122. Specifically, the input terminal of the low noise amplifier 22 is connected to the filter 32 via the switch 53, and the output terminal of the low noise amplifier 22 is connected to the high frequency output terminal 122. Thereby, the low noise amplifier 22 can amplify the band B reception signal received via the filter 32 and supply it to the RFIC 3.
  • the filter 31 (A-TRx) is an example of a first filter, has a passband including band A, and is connected to the power amplifier 11. Specifically, one end of the filter 31 is selectively connected to the power amplifier 11 and the low noise amplifier 21 via the switch 52. On the other hand, the other end of the filter 31 is selectively connected to antenna connection terminals 101 and 102 via a switch 51. Thereby, the filter 31 can pass the transmission signal of band A among the transmission signals amplified by the power amplifier 11, and can pass the reception signal of band A among the reception signals received by the antenna 2a or 2b. can be passed.
  • the filter 32 (B-TRx) is an example of a third filter, has a passband including band B, and is connected to the power amplifier 12. Specifically, one end of the filter 32 is selectively connected to the power amplifier 12 and the low noise amplifier 22 via the switch 53. On the other hand, the other end of the filter 32 is selectively connected to antenna connection terminals 101 and 102 via a switch 51. Thereby, the filter 32 can pass the band B transmission signal among the transmission signals amplified by the power amplifier 12, and can pass the band B reception signal among the reception signals received by the antenna 2a or 2b. can be passed.
  • the filter 33 is an example of a second filter, and is connected between the power supply terminal 131 and the power amplifier 11.
  • Filter 33 has an attenuation band that includes at least a portion of Band A and at least a portion of Band B. Thereby, the filter 33 suppresses band B noise generated in the power amplifier 11 from entering the power amplifier 12 via the power line, and suppresses band A noise generated in the power amplifier 12 from entering the power amplifier 12 via the power line. It is possible to suppress the intrusion into the power amplifier 11.
  • the filter 33 is a low-pass filter, and is composed of, for example, an inductor and a capacitor. At this time, the input impedance of the filter 33 is lower than the input impedance of the filter 31. Therefore, the filter 33 has a filter design suitable for low input impedance.
  • the filter 34 is an example of a fourth filter, and is connected between the power supply terminal 131 and the power amplifier 12.
  • Filter 34 has an attenuation band that includes at least a portion of Band A and at least a portion of Band B. Thereby, the filter 34 suppresses band A noise generated in the power amplifier 12 from entering the power amplifier 11 via the power line, and suppresses band B noise generated in the power amplifier 11 from entering the power amplifier 11 via the power line. It is possible to suppress the interference from entering the power amplifier 12.
  • the filter 34 is a low-pass filter, and is composed of, for example, an inductor and a capacitor. At this time, the input impedance of the filter 34 is lower than the input impedance of the filter 32. Therefore, the filter 34 has a filter design suitable for low input impedance.
  • the capacitor 41 is an example of a first capacitor, and is connected between the path between the filter 33 and the power amplifier 11 and the ground. Capacitor 41 is sometimes called a bypass capacitor or a decoupling capacitor.
  • the capacitor 42 is an example of a second capacitor, and is connected between the path between the filter 34 and the power amplifier 12 and the ground. Capacitor 42 is sometimes called a bypass capacitor or a decoupling capacitor.
  • the switch 51 is connected between the antenna connection terminals 101 and 102 and the filters 31 and 32. Specifically, the switch 51 has a terminal 511 connected to the antenna connection terminal 101, a terminal 512 connected to the antenna connection terminal 102, a terminal 513 connected to the filter 31, and a terminal connected to the filter 32. 514.
  • the switch 51 can connect the terminal 511 to one of the terminals 513 and 514, and connect the terminal 512 to the other of the terminals 513 and 514, based on a control signal from the RFIC 3, for example. . That is, the switch 51 can switch the connection of the filter 31 between the antenna connection terminals 101 and 102, and can switch the connection of the filter 32 between the antenna connection terminals 101 and 102.
  • the switch 51 is composed of, for example, a DPDT (Double-Pole Double-Throw) type switch circuit.
  • the switch 52 is connected between the filter 31 and the power amplifier 11 and low noise amplifier 21. Specifically, the switch 52 has a terminal 521 connected to the filter 31, a terminal 522 connected to the power amplifier 11, and a terminal 523 connected to the low noise amplifier 21.
  • the switch 52 can exclusively connect the terminal 521 to the terminals 522 and 523 based on a control signal from the RFIC 3, for example. That is, the switch 52 can switch the connection of the filter 31 between the power amplifier 11 and the low noise amplifier 21.
  • the switch 52 is composed of, for example, an SPDT (Single-Pole Double-Throw) type switch circuit.
  • the switch 53 is connected between the filter 32 and the power amplifier 12 and low noise amplifier 22. Specifically, the switch 53 has a terminal 531 connected to the filter 32, a terminal 532 connected to the power amplifier 12, and a terminal 533 connected to the low noise amplifier 22.
  • the switch 53 can exclusively connect the terminal 531 to the terminals 532 and 533 based on a control signal from the RFIC 3, for example. That is, the switch 53 can switch the connection of the filter 32 between the power amplifier 12 and the low noise amplifier 22.
  • the switch 53 is composed of, for example, an SPDT type switch circuit.
  • the PA control circuit 61 can control the power amplifiers 11 and 12. For example, the PA control circuit 61 can control the bias current supplied to each of the power amplifiers 11 and 12 based on a digital control signal received from the RFIC 3 via the control terminal 141.
  • bands A and B are examples of the first band and the second band, respectively, and both are frequency bands for communication systems constructed using radio access technology (RAT), and are used for simultaneous transmission. possible frequency bands.
  • Bands A and B that can be simultaneously transmitted are defined in advance by standardization organizations (for example, 3GPP (registered trademark) (3rd Generation Partnership Project), IEEE (Institute of Electrical and Electronics Engineers), etc.).
  • Examples of communication systems include a 5GNR (5th Generation New Radio) system, an LTE (Long Term Evolution) system, and a WLAN (Wireless Local Area Network) system.
  • both bands A and B are time division duplex (TDD) bands.
  • TDD time division duplex
  • bands A and B two different adjacent frequency bands are used, for example n77 and n79 for 5GNR.
  • Two adjacent frequency bands mean two frequency bands defined by a standardization organization or the like so that no other frequency band is included between the two frequency bands.
  • two adjacent frequency bands are two frequency bands where the influence of side lobes is large between the two frequency bands, in other words, two frequencies for which exceptions to cross-band isolation are defined in standards etc. means band.
  • bands A and B are not limited to the TDD band, nor are they limited to two adjacent bands.
  • bands A and B two non-adjacent TDD bands may be used, or two frequency division duplex (FDD) bands may be used. Further, as bands A and B, a combination of a TDD band and an FDD band may be used.
  • FDD frequency division duplex
  • the high frequency circuit 1 shown in FIG. 1 is an example, and the present invention is not limited thereto.
  • the high frequency circuit 1 may not include a receiving path.
  • the high frequency circuit 1 may include a filter, a power amplifier, and a low noise amplifier corresponding to band C different from bands A and B.
  • the high frequency circuit 1 may not include some or all of the circuit elements for band B. That is, the high frequency circuit 1 only needs to include at least the power amplifier 11, the filters 31 and 33, and the power supply terminal 131.
  • FIG. 3A is a graph showing the pass characteristics of the filter 33 according to this embodiment.
  • FIG. 3B is a graph showing the pass characteristics of the filter 34 according to this embodiment.
  • the horizontal axis represents frequency
  • the vertical axis represents gain.
  • the filter 33 is a low-pass filter and has an attenuation band including bands A and B as shown in FIG. 3A.
  • the lower limit frequency f33L of the attenuation band of the filter 33 is lower than the lower limit frequency of band A and lower than the lower limit frequency of band B.
  • the attenuation band of the filter 33 may include only a part of band A, or may not include band A. That is, the lower limit frequency f33L of the attenuation band of the filter 33 may be higher than the lower limit frequency of band A, and may be higher than the upper limit frequency of band A.
  • the attenuation band of the filter 33 may include only part of the band B. That is, the lower limit frequency f33L of the attenuation band of the filter 33 may be higher than the lower limit frequency of band B.
  • the filter 34 is a low-pass filter and has an attenuation band including bands A and B as shown in FIG. 3B.
  • the lower limit frequency f34L of the attenuation band of the filter 34 is lower than the lower limit frequency of band A and lower than the lower limit frequency of band B.
  • the attenuation band of the filter 34 may include only a part of band A, or may not include band A. That is, the lower limit frequency f34L of the attenuation band of the filter 34 may be higher than the lower limit frequency of band A, and may be higher than the upper limit frequency of band A.
  • the attenuation band of the filter 34 may include only part of the band B. That is, the lower limit frequency f34L of the attenuation band of the filter 34 may be higher than the lower limit frequency of band B.
  • FIG. 4 is a plan view of the high frequency circuit 1 according to the implementation example of this embodiment.
  • FIG. 5 is a plan view of the high frequency circuit 1 according to the mounting example of the present embodiment, and is a transparent view of the main surface 90b side of the module board 90 from the positive side of the z-axis.
  • FIG. 6 is a cross-sectional view of the high frequency circuit 1 according to the implementation example of this embodiment. The cross section of the high frequency circuit 1 in FIG. 6 is the cross section taken along the vi-vi line in FIGS. 4 and 5.
  • FIGS. 4 to 6 illustrations of wiring connecting each of the plurality of components arranged on the module board 90 are omitted except for some parts.
  • FIG. 4 illustration of the resin member 91 and the metal electrode layer 93 that cover the main surface 90a of the module board 90 is omitted.
  • each circuit component may be given an abbreviation (such as "PA") that indicates its function so that the arrangement relationship of each circuit component can be easily understood, but the actual The abbreviation does not need to be given to each circuit component.
  • PA abbreviation
  • the module board 90 has main surfaces 90a and 90b facing each other.
  • Module board 90 includes a wiring layer, a ground layer, and a via conductor therein.
  • As the module substrate 90 for example, a low temperature co-fired ceramics (LTCC) substrate or a high temperature co-fired ceramics (HTCC) substrate having a laminated structure of a plurality of dielectric layers, A component-embedded board, a board having a redistribution layer (RDL), a printed circuit board, or the like can be used, but the present invention is not limited to these.
  • LTCC low temperature co-fired ceramics
  • HTCC high temperature co-fired ceramics
  • the power amplifiers 11 and 12 are arranged on the main surface 90a as shown in FIG. 4.
  • Each of power amplifiers 11 and 12 may be constructed of, for example, at least one of gallium arsenide (GaAs), silicon germanium (SiGe), and gallium nitride (GaN). Note that a portion of the power amplifiers 11 and 12 may be configured using CMOS (Complementary Metal Oxide Semiconductor), and specifically may be manufactured using an SOI (Silicon on Insulator) process.
  • CMOS Complementary Metal Oxide Semiconductor
  • the integrated circuit 20 including the low noise amplifiers 21 and 22 (LNA) is arranged on the main surface 90a as shown in FIG. 4.
  • the integrated circuit 20 is configured using, for example, CMOS, and specifically manufactured by an SOI process. Note that the integrated circuit 20 is not limited to CMOS.
  • the filters 31 and 32 are arranged on the main surface 90a as shown in FIG.
  • Each of the filters 31 and 32 may be configured using any of a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, an LC resonance filter, and a dielectric filter. In addition, it is not limited to these.
  • the filters 33 and 34 are arranged on the main surface 90a as shown in FIG. 4.
  • Each of the filters 33 and 34 may be configured using any of a SAW filter, a BAW filter, an LC filter, and a dielectric filter, and is not limited to these.
  • the capacitors 41 and 42 (C) are arranged on the main surface 90a as shown in FIG. 4. Specifically, capacitor 41 is placed near filter 33 and near power amplifier 11 . Thereby, the wiring length of the power supply line P1 can be shortened, and resistance loss due to the wiring can be reduced. Further, the capacitor 42 is arranged near the filter 34 and also near the power amplifier 12. Thereby, the wiring length of the power supply line P2 can be shortened, and resistance loss due to the wiring can be reduced.
  • the capacitors 41 and 42 are mounted as chip capacitors.
  • a chip capacitor is a surface mount device (SMD) that includes a capacitor. Note that the capacitors 41 and 42 are not limited to chip capacitors.
  • the integrated circuit 50 including the switches 51 to 53 (SW) is arranged on the main surface 90a as shown in FIG.
  • the integrated circuit 50 includes, for example, a plurality of MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) connected in series.
  • MOSFETs Metal-Oxide-Semiconductor Field-Effect Transistors
  • the number of MOSFETs connected in series may be determined depending on the required withstand voltage and is not particularly limited.
  • the PA control circuit 61 (PAC) is arranged on the main surface 90a as shown in FIG. Specifically, PA control circuit 61 is placed between power amplifiers 11 and 12.
  • the PA control circuit 61 is configured using, for example, CMOS, and specifically manufactured by an SOI process. Note that the PA control circuit 61 is not limited to CMOS.
  • the plurality of land electrodes 150 are arranged on the main surface 90b as shown in FIG.
  • the plurality of land electrodes 150 include a ground terminal in addition to the antenna connection terminals 101 and 102, high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, power supply terminal 131, and control terminal 141 shown in FIG. Functions as an external connection terminal.
  • Each of the plurality of land electrodes 150 is connected to an input/output terminal and/or a ground terminal on a motherboard arranged in the negative direction of the z-axis of the high frequency circuit 1.
  • Copper electrodes can be used as the plurality of land electrodes 150, but are not limited thereto.
  • solder electrodes may be used as the plurality of land electrodes 150.
  • a plurality of bump electrodes may be used instead of the plurality of land electrodes 150.
  • At least a portion of the land electrode 150 functioning as the power supply terminal 131 overlaps with at least a portion of the filter 33 when the module substrate 90 is viewed from above. Thereby, as shown in FIG. 6, the wiring length of the power supply line P1 can be shortened, and the resistance loss due to the wiring can be reduced.
  • the resin member 91 covers the main surface 90a and the circuit components on the main surface 90a, as shown in FIG.
  • a material for the resin member 91 for example, epoxy resin can be used.
  • the material of the resin member 91 is not limited to epoxy resin.
  • the resin member 91 has a function of ensuring reliability such as mechanical strength and moisture resistance of the circuit components on the main surface 90a. Note that the resin member 91 does not necessarily have to be included in the high frequency circuit 1.
  • the metal electrode layer 93 is a metal thin film formed by, for example, a sputtering method.
  • the metal electrode layer 93 is formed to cover the surface (upper surface and side surfaces) of the resin member 91, as shown in FIG.
  • Metal electrode layer 93 is connected to ground and functions as a shield electrode. That is, the metal electrode layer 93 suppresses external noise from entering the high-frequency circuit 1 and suppresses noise generated in the high-frequency circuit 1 from interfering with other modules or other equipment. Note that the metal electrode layer 93 does not need to be included in the high frequency circuit 1.
  • the implementation of the high frequency circuit 1 in FIGS. 4 to 6 is an example, and the implementation is not limited thereto.
  • some circuit components may be placed on the main surface 90b of the module board 90 or may be placed within the module board 90.
  • FIG. 7 is a flowchart showing an amplification method by the high frequency circuit 1 according to the present embodiment.
  • the power amplifier 11 receives a power supply voltage (first power supply voltage) via the power supply line P1 (first power supply line) (S101).
  • the power amplifier 11 amplifies the band A transmission signal using the received power supply voltage (S102).
  • the filter 33 attenuates band B noise generated by the amplification of the band A transmission signal in the power supply line P1 (S103).
  • the power amplifier 12 receives the power supply voltage (second power supply voltage) via the power supply line P2 (second power supply line) (S104).
  • the power amplifier 12 amplifies the transmission signal of band B using the received power supply voltage (S105).
  • the filter 34 attenuates band A noise generated by the amplification of the band B transmission signal in the power supply line P2 (S106).
  • steps S104 to S106 are executed after steps S101 to S103, but the amplification method according to the present invention is not limited to this.
  • steps S104 to S106 may be executed before steps S101 to S103, or may be executed in parallel with steps S101 to S103. Further, steps S104 to S106 may not be executed.
  • the high frequency circuit 1 includes the power amplifier 11, the filter 31 that is connected to the power amplifier 11 and has a pass band including band A that can transmit simultaneously with band B, and the power amplifier 11. a power supply terminal 131 receiving a power supply voltage supplied to the power amplifier 11; and a filter 33 connected between the power supply terminal 131 and the power amplifier 11, the filter 33 having an attenuation band including at least a part of band B. .
  • the band B is included in the attenuation band of the filter 33 connected between the power supply terminal 131 and the power amplifier 11. Therefore, it is possible to suppress band B noise generated when the power amplifier 11 amplifies the band A transmission signal from entering the power amplifier 12 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
  • the attenuation band of the filter 33 may further include at least a portion of the band A.
  • the band A is included in the attenuation band of the filter 33 connected between the power supply terminal 131 and the power amplifier 11. Therefore, it is possible to suppress band A noise generated when the power amplifier 12 amplifies the band B transmission signal from entering the power amplifier 11 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B.
  • the high frequency circuit 1 may further include a capacitor 41 connected between the path between the filter 33 and the power amplifier 11 and the ground.
  • the capacitor 41 is connected between the path between the filter 33 and the power amplifier 11 and the ground. Therefore, the influence of the filter 33 on the impedance of the power amplifier 11 can be reduced, making it easier to design the filter 33, and suppressing deterioration of the characteristics of the power amplifier 11 due to the filter 33.
  • the high frequency circuit 1 may further include a module board 90 on which the power amplifier 11 and filters 31 and 33 are mounted, and includes a power supply terminal 131.
  • the filter 33 can be mounted on the same module board 90 as the power amplifier 11 and the filter 31, the wiring length between the filter 33 and the power amplifier 11 can be shortened, and the communication device 6 can be made smaller. You can also contribute to the
  • the input impedance of the filter 33 may be lower than the input impedance of the filter 31.
  • the filter 33 can be configured to have a lower input impedance than the filter 31 on the high frequency signal line, and deterioration of the characteristics of the power amplifier 11 due to the filter 33 can be suppressed.
  • the filter 33 may be a low-pass filter.
  • the design of the filter 33 can be made easier, and harmonics of bands A and/or B can also be attenuated.
  • the high frequency circuit 1 includes a power amplifier 12, a filter 32 connected to the power amplifier 12 and having a passband including band B, and a power supply that receives a power supply voltage supplied to the power amplifier 12.
  • the filter 34 may include a terminal 131 and a filter 34 connected between the power supply terminal 131 and the power amplifier 12, and the filter 34 may include at least one of at least a portion of band A and at least a portion of band B. It may have an attenuation band including.
  • the attenuation band of the filter 34 connected between the power supply terminal 131 and the power amplifier 12 includes at least one of at least a portion of the band A and at least a portion of the band B. Therefore, it is possible to suppress band A noise from entering the power amplifier 11 via the power lines P1 and P2, or suppress band B noise from entering the power amplifier 12 via the power line P2. I can do it.
  • the attenuation band of the filter 34 may include at least a part of the band A.
  • the band A is included in the attenuation band of the filter 34 connected between the power supply terminal 131 and the power amplifier 12. Therefore, it is possible to suppress band A noise generated when the power amplifier 12 amplifies the band B transmission signal from entering the power amplifier 11 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B.
  • the attenuation band of the filter 34 may include at least a part of the band B.
  • band B is included in the attenuation band of the filter 34 connected between the power supply terminal 131 and the power amplifier 12. Therefore, it is possible to suppress band B noise generated when the power amplifier 11 amplifies the band A transmission signal from entering the power amplifier 12 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
  • the high frequency circuit 1 may further include a capacitor 42 connected between the path between the filter 34 and the power amplifier 12 and the ground.
  • the capacitor 42 is connected between the path between the filter 34 and the power amplifier 12 and the ground. Therefore, the influence of the filter 34 on the impedance of the power amplifier 12 can be reduced, making it easier to design the filter 34, and suppressing deterioration of the characteristics of the power amplifier 11 due to the filter 34.
  • the high frequency circuit 1 may include a module board 90 on which the power amplifiers 11 and 12 and filters 31 to 34 are mounted and includes a power supply terminal 131.
  • the filters 33 and 34 can be mounted on the same module board 90 as the power amplifiers 11 and 12 and the filters 31 and 32, and the wiring length between the filter 33 and the power amplifier 11 can be It is possible to shorten the wiring length between the terminals and contribute to miniaturization of the communication device 6.
  • the input impedance of the filter 34 may be lower than the input impedance of the filter 32.
  • the filter 34 can be configured to have a lower input impedance than the filter 32 on the high frequency signal line, and deterioration of the characteristics of the power amplifier 12 due to the filter 34 can be suppressed.
  • the filter 34 may be a low-pass filter.
  • the design of the filter 34 can be made easier, and harmonics of bands A and/or B can also be attenuated.
  • the power supply terminal that receives the power supply voltage supplied to the power amplifier 11 and the power supply terminal that receives the power supply voltage supplied to the power amplifier 12 are the same power supply terminal 131. There may be.
  • bands A and B may be two different adjacent frequency bands.
  • band A may be n77 for 5GNR
  • band B may be n79 for 5GNR.
  • the power supply voltage supplied to the power amplifiers 11 and 12 may be adjusted in APT mode, SPT mode, or D-ET mode.
  • the efficiency of the power amplifiers 11 and 12 can be improved.
  • the amplification method receives a power supply voltage via the power supply line P1 (S101), and uses the received power supply voltage to amplify a transmission signal of band A that can be transmitted simultaneously with band B ( S102), band B noise generated by the amplification of the band A transmission signal is attenuated in the power supply line P1 (S103).
  • the band B noise generated when the band A transmission signal is amplified in the power amplifier 11 is attenuated in the power supply line P1, so that the power to amplify the band B transmission signal via the power supply line P1 is It is possible to suppress noise from entering the amplifier 12. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
  • the amplification method according to the present embodiment further receives a power supply voltage via the power line P2 (S104), and enables simultaneous transmission with band A using the power supply voltage received via the power line P2.
  • the transmission signal of band B may be amplified (S105), and the noise of band A generated by the amplification of the transmission signal of band B may be attenuated in the power supply line P2 (S106).
  • the band A noise generated when the power amplifier 12 amplifies the band B transmission signal is attenuated in the power supply line P2, so the power to amplify the band A transmission signal via the power supply line P2 is It is possible to suppress noise from entering the amplifier 11. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B.
  • FIG. 8 is a circuit configuration diagram of a communication device 6A according to this embodiment.
  • the communication device 6A includes a high frequency circuit 1A, antennas 2a and 2b, an RFIC 3, a BBIC 4, and a voltage supply circuit 5A.
  • the high frequency circuit 1A transmits high frequency signals between the antennas 2a and 2b and the RFIC 3.
  • the internal configuration of the high frequency circuit 1A will be described later.
  • the voltage supply circuit 5A can supply a power supply voltage to the high frequency circuit 1A.
  • the voltage supply circuit 5A can supply the first power supply voltage and the second power supply voltage to which the APT mode, SPT mode, or D-ET mode is applied to the high frequency circuit 1A.
  • the circuit configuration of the communication device 6A shown in FIG. 8 is an example and is not limited thereto.
  • the communication device 6A may not include the antenna 2a, the antenna 2b, the BBIC 4, or any combination thereof.
  • the communication device 6A may include three or more antennas.
  • the high frequency circuit 1A includes power amplifiers 11 and 12, low noise amplifiers 21 and 22, filters 31, 32, 33A and 34A, capacitors 41 and 42, switches 51 to 53, a PA control circuit 61, and an antenna connection. It includes terminals 101 and 102, high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, power supply terminals 131A and 132A, and control terminal 141.
  • the power terminal 131A is an example of a first power terminal.
  • the power supply terminal 131A is connected to the voltage supply circuit 5A outside the high frequency circuit 1A, and connected to the power amplifier 11 inside the high frequency circuit 1A. Thereby, the power supply voltage received from the voltage supply circuit 5A via the power supply terminal 131A is supplied to the power amplifier 11.
  • the power supply terminal 132A is an example of a second power supply terminal.
  • the power supply terminal 132A is connected to the voltage supply circuit 5A outside the high frequency circuit 1A, and connected to the power amplifier 12 inside the high frequency circuit 1A. Thereby, the power supply voltage received from the voltage supply circuit 5A via the power supply terminal 132A is supplied to the power amplifier 12.
  • a multilevel generation circuit that generates voltages at a plurality of discrete levels adjusts the two power supply voltages. Can be shared.
  • power supply terminals 131A and 132A may be connected to each other via a multilevel generation circuit.
  • noise on the power line P1 is more likely to be transmitted to the power line P2 via the multilevel generation circuit
  • noise on the power line P2 is more likely to be transmitted to the power line P1 via the multilevel generation circuit.
  • the filters 33A and 34A attenuate the noise on the power lines P1 and P2, thereby increasing the effect of suppressing quality deterioration of the transmitted signal.
  • the filter 33A is an example of a second filter, and is connected between the power supply terminal 131A and the power amplifier 11.
  • Filter 33A has an attenuation band that includes at least a portion of band A. Thereby, the filter 33A can suppress band A noise from entering the power amplifier 11 via the power supply line P1.
  • the filter 33A is a band elimination filter, and is composed of, for example, an elastic wave filter. At this time, the input impedance of the filter 33A is lower than the input impedance of the filter 31. Therefore, the filter 33A has a filter design suitable for low input impedance.
  • the filter 34A is an example of a fourth filter, and is connected between the power supply terminal 132A and the power amplifier 12.
  • Filter 34A has an attenuation band that includes at least a portion of Band B. Thereby, the filter 34A can suppress band B noise from entering the power amplifier 12 via the power supply line P2.
  • the filter 34A is a band elimination filter, and is composed of, for example, an elastic wave filter. At this time, the input impedance of the filter 34A is lower than the input impedance of the filter 32. Therefore, the filter 34A has a filter design suitable for low input impedance.
  • FIG. 9A is a graph showing the pass characteristics of filter 33A according to this embodiment.
  • FIG. 9B is a graph showing the pass characteristics of filter 34A according to this embodiment.
  • the horizontal axis represents frequency
  • the vertical axis represents gain.
  • the filter 33A is a band elimination filter and has an attenuation band including band A as shown in FIG. 9A.
  • the lower limit frequency f33AL is lower than the band A lower limit frequency
  • the upper limit frequency f33AH is higher than the band A upper limit frequency.
  • the attenuation band of the filter 33A may include only part of the band A. That is, in the attenuation band of the filter 33A, the lower limit frequency f33AL may be higher than the lower limit frequency of band A, or the upper limit frequency f33AH may be lower than the upper limit frequency of band A.
  • the filter 34A is a band elimination filter and has an attenuation band including band B as shown in FIG. 9B.
  • the lower limit frequency f34AL is lower than the band B lower limit frequency
  • the upper limit frequency f34AH is higher than the band B upper limit frequency.
  • the attenuation band of the filter 34A may include only part of the band B. That is, in the attenuation band of the filter 34A, the lower limit frequency f34AL may be higher than the lower limit frequency of band B, or the upper limit frequency f34AH may be lower than the upper limit frequency of band B.
  • the attenuation band of the filter 33A may include at least a portion of the band B in addition to at least a portion of the band A. Further, the attenuation band of the filter 34A may include at least a portion of band A in addition to at least a portion of band B.
  • FIG. 10 is a plan view of a high frequency circuit 1A according to a mounting example of this embodiment.
  • FIG. 11 is a plan view of the high frequency circuit 1A according to the mounting example of the present embodiment, and is a perspective view of the main surface 90b side of the module board 90 from the positive side of the z-axis.
  • FIG. 12 is a cross-sectional view of a high frequency circuit 1A according to a mounting example of this embodiment. The cross section of the high frequency circuit 1A in FIG. 12 is the cross section taken along line xii-xii in FIGS. 10 and 11.
  • FIGS. 10 to 12 illustrations of the wiring connecting each of the plurality of components arranged on the module board 90 are omitted except for some parts.
  • FIG. 10 illustration of the resin member 91 and the metal electrode layer 93 that cover the main surface 90a of the module board 90 is omitted.
  • each circuit component may be given an abbreviation (such as "PA") that indicates its function so that the arrangement relationship of each circuit component can be easily understood, but the actual The abbreviation does not need to be given to each circuit component.
  • PA abbreviation
  • the high frequency circuit 1A further includes a module substrate 90, resin members 91 and 92, a metal electrode layer 93, and a plurality of post electrodes 150A. Equipped with.
  • circuit components are arranged on both sides of the module board 90.
  • an integrated circuit 10 including power amplifiers 11 and 12 (PA), filters 31 and 32 (BPF), filters 33A and 34A (BEF) and capacitors 41 and 42 (C) are arranged.
  • LNA low noise amplifiers 21 and 22
  • SW switches 51 to 53
  • PAC PA control circuit 61
  • the integrated circuit 10 including the power amplifiers 11 and 12 may be made of, for example, at least one of GaAs, SiGe, and GaN. Note that a part of the integrated circuit 10 may be configured using CMOS, and specifically may be manufactured using an SOI process.
  • Each of the filters 33A and 34A may be configured using any of a SAW filter, a BAW filter, an LC filter, and a dielectric filter, and is not limited to these.
  • the plurality of post electrodes 150A are arranged on the main surface 90b as shown in FIG. 11.
  • the plurality of post electrodes 150A have a ground terminal in addition to the antenna connection terminals 101 and 102, high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, power supply terminals 131A and 132A, and control terminal 141 shown in FIG. Functions as multiple external connection terminals.
  • Each of the plurality of post electrodes 150A is connected to an input/output terminal and/or a ground terminal on a motherboard arranged in the negative direction of the z-axis of the high frequency circuit 1A.
  • the resin member 92 covers the main surface 90b and the circuit components on the main surface 90b.
  • a material for the resin member 92 for example, epoxy resin can be used.
  • the material of the resin member 92 is not limited to epoxy resin.
  • the resin member 92 has a function of ensuring reliability such as mechanical strength and moisture resistance of the circuit components on the main surface 90b. Note that the resin member 92 does not necessarily have to be included in the high frequency circuit 1A.
  • the high frequency circuit 1A includes the power amplifier 11, the filter 31 which is connected to the power amplifier 11 and has a pass band including band A that can transmit simultaneously with band B, and A power supply terminal 131A that receives the supplied power supply voltage, a filter 33A connected between the power supply terminal 131A and the power amplifier 11, a power amplifier 12, and a filter 33A that is connected to the power amplifier 12 and has a passband including band B.
  • the filter 33A includes a filter 32, a power supply terminal 132A that receives the power supply voltage supplied to the power amplifier 12, and a filter 34A connected between the power supply terminal 132A and the power amplifier 12.
  • filter 34A has an attenuation band that includes at least a portion of band B;
  • band A is included in the attenuation band of the filter 33A connected between the power supply terminal 131A and the power amplifier 11. Therefore, band A noise generated when the power amplifier 12 amplifies the band B transmission signal can be suppressed from entering the power amplifier 11 via the power supply lines P1 and P2 and the voltage supply circuit 5A. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B. Furthermore, according to this, at least a portion of band B is included in the attenuation band of filter 34A connected between power supply terminal 132A and power amplifier 12.
  • FIG. 13A is a graph showing the pass characteristics of the filter 33A according to this modification.
  • FIG. 13B is a graph showing the pass characteristics of the filter 34A according to this modification.
  • the horizontal axis represents frequency
  • the vertical axis represents gain.
  • the filter 33A according to this modification is a band elimination filter, and has an attenuation band including band B as shown in FIG. 13A.
  • the lower limit frequency f33AL is lower than the band B lower limit frequency
  • the upper limit frequency f33AH is higher than the band B upper limit frequency.
  • the attenuation band of the filter 33A may include only part of the band B. That is, in the attenuation band of the filter 33A, the lower limit frequency f33AL may be higher than the lower limit frequency of band B, or the upper limit frequency f33AH may be lower than the upper limit frequency of band B.
  • the filter 34A is a band elimination filter and has an attenuation band including band A as shown in FIG. 13B.
  • the lower limit frequency f34AL is lower than the band A lower limit frequency
  • the upper limit frequency f34AH is higher than the band A upper limit frequency.
  • the attenuation band of the filter 34A may include only part of the band A. That is, in the attenuation band of the filter 34A, the lower limit frequency f34AL may be higher than the lower limit frequency of band A, or the upper limit frequency f34AH may be lower than the upper limit frequency of band A.
  • the attenuation band of the filter 33A may include at least a portion of the band A in addition to at least a portion of the band B. Further, the attenuation band of the filter 34A may include at least a portion of band B in addition to at least a portion of band A.
  • the high frequency circuit and amplification method according to the present invention have been described above based on the embodiments and examples, but the high frequency circuit and amplification method according to the present invention are limited to the above embodiments and modifications thereof. isn't it. Those skilled in the art will be able to come up with other embodiments realized by combining arbitrary constituent elements of the above embodiments and modifications thereof, and other embodiments realized by combining arbitrary components of the above embodiments and modifications thereof, without departing from the spirit of the present invention.
  • the present invention also includes modified examples obtained by performing various modifications and various devices incorporating the above-mentioned high frequency circuit.
  • another circuit element, wiring, etc. may be inserted between the paths connecting the respective circuit elements and signal paths disclosed in the drawings.
  • an impedance matching circuit may be inserted between the power amplifier 11 and the filter 31 and/or between the power amplifier 12 and the filter 32.
  • the high frequency circuit includes filters on the power lines P1 and P2
  • a noise canceller may be provided instead of the filter.
  • the noise canceller can cancel the noise by, for example, extracting a part of the high frequency signal amplified by the power amplifier, adjusting the phase of the extracted high frequency signal, and supplying it to the power supply line.
  • the noise canceller may adjust the phase of a high frequency signal amplified by a power amplifier connected in parallel with the power amplifier and supply the signal to the power supply line.
  • the configuration of the noise canceller is not particularly limited, and any conventional technology may be used.
  • the present invention can be widely used in communication devices such as mobile phones as a high frequency circuit placed in a front end section.

Abstract

A high-frequency circuit (1) comprising: a power amplifier (11); a filter (31) that is connected to the power amplifier (11) and that has a pass band including a band A that is capable of simultaneous transmission with a band B; a power source terminal (131) that receives a power source voltage which is supplied to the power amplifier (11); and a filter (33) that is connected between the power source terminal (131) and the power amplifier (11), wherein the filter (33) has an attenuation band including at least a portion of the band B.

Description

高周波回路及び増幅方法High frequency circuit and amplification method
 本発明は、高周波回路及び増幅方法に関する。 The present invention relates to a high frequency circuit and an amplification method.
 携帯電話などの移動体通信機器では、特に、マルチバンド化の進展に伴い、高周波フロントエンドモジュールが複雑化している。特許文献1には、複数のバンドの信号を同時に送信可能な高周波回路が開示されている。 In mobile communication devices such as mobile phones, high-frequency front-end modules are becoming more complex, especially as multiband technology progresses. Patent Document 1 discloses a high frequency circuit that can simultaneously transmit signals in multiple bands.
特開2017-17691号公報Unexamined Japanese Patent Publication No. 2017-17691
 しかしながら、上記従来の技術では、複数のバンドの信号を同時に送信する際に信号の品質が劣化する場合がある。 However, with the above-mentioned conventional technology, the quality of the signal may deteriorate when transmitting signals of multiple bands at the same time.
 そこで、本発明は、複数のバンドの信号の同時送信における送信信号の品質劣化を抑制することができる高周波回路及び増幅方法を提供する。 Therefore, the present invention provides a high frequency circuit and an amplification method that can suppress quality deterioration of a transmitted signal when transmitting signals of multiple bands simultaneously.
 本発明の一態様に係る高周波回路は、第1電力増幅器と、第1電力増幅器に接続され、第2バンドと同時送信可能な第1バンドを含む通過帯域を有する第1フィルタと、第1電力増幅器に供給される第1電源電圧を受ける第1電源端子と、第1電源端子と第1電力増幅器との間に接続される第2フィルタと、を備え、第2フィルタは、第2バンドの少なくとも一部を含む減衰帯域を有する。 A high frequency circuit according to one aspect of the present invention includes a first power amplifier, a first filter connected to the first power amplifier and having a pass band including a first band capable of simultaneous transmission with a second band, and a first power amplifier. A first power supply terminal receiving a first power supply voltage supplied to the amplifier, and a second filter connected between the first power supply terminal and the first power amplifier, the second filter receiving a first power supply voltage supplied to the amplifier. and an attenuation band that includes at least a portion of the attenuation band.
 本発明の一態様に係る高周波回路は、第1電力増幅器と、第1電力増幅器に接続され、第2バンドと同時送信可能な第1バンドを含む通過帯域を有する第1フィルタと、第1電力増幅器に供給される第1電源電圧を受ける第1電源端子と、第1電源端子と第1電力増幅器との間に接続される第2フィルタと、第2電力増幅器と、第2電力増幅器に接続され、第2バンドを含む通過帯域を有する第3フィルタと、第2電力増幅器に供給される第2電源電圧を受ける第2電源端子と、第2電源端子と第2電力増幅器との間に接続される第4フィルタと、を備え、第2フィルタは、第1バンドの少なくとも一部を含む減衰帯域を有し、第4フィルタは、第2バンドの少なくとも一部を含む減衰帯域を有する。 A high frequency circuit according to one aspect of the present invention includes a first power amplifier, a first filter connected to the first power amplifier and having a pass band including a first band capable of simultaneous transmission with a second band, and a first power amplifier. a first power supply terminal receiving a first power supply voltage supplied to the amplifier; a second filter connected between the first power supply terminal and the first power amplifier; a second power amplifier; and a second power supply terminal connected to the second power amplifier. a third filter having a passband including the second band; a second power supply terminal receiving the second power supply voltage supplied to the second power amplifier; and a third filter connected between the second power supply terminal and the second power amplifier. a fourth filter, the second filter having an attenuation band including at least a portion of the first band, and the fourth filter having an attenuation band including at least a portion of the second band.
 本発明の一態様に係る増幅方法は、第1電源ラインを介して第1電源電圧を受け、受けた第1電源電圧を用いて、第2バンドと同時送信可能な第1バンドの送信信号を増幅し、第1バンドの送信信号の増幅により発生した第2バンドのノイズを第1電源ラインにおいて減衰する。 An amplification method according to one aspect of the present invention receives a first power supply voltage via a first power supply line, and uses the received first power supply voltage to generate a transmission signal of a first band that can be transmitted simultaneously with a second band. The second band noise generated by the amplification of the first band transmission signal is attenuated in the first power supply line.
 本発明によれば、複数のバンドの信号の同時送信における送信信号の品質劣化を抑制することができる。 According to the present invention, it is possible to suppress quality deterioration of a transmitted signal during simultaneous transmission of signals of multiple bands.
図1は、実施の形態1に係る通信装置の回路構成図である。FIG. 1 is a circuit configuration diagram of a communication device according to the first embodiment. 図2Aは、APTモードにおける電源電圧の推移の一例を示すグラフである。FIG. 2A is a graph showing an example of changes in power supply voltage in APT mode. 図2Bは、A-ETモードにおける電源電圧の推移の一例を示すグラフである。FIG. 2B is a graph showing an example of changes in power supply voltage in A-ET mode. 図2Cは、D-ETモードにおける電源電圧の推移の一例を示すグラフである。FIG. 2C is a graph showing an example of the change in power supply voltage in the D-ET mode. 図3Aは、実施の形態1に係る第2フィルタの通過特性を示すグラフである。FIG. 3A is a graph showing the pass characteristics of the second filter according to the first embodiment. 図3Bは、実施の形態1に係る第4フィルタの通過特性を示すグラフである。FIG. 3B is a graph showing the pass characteristics of the fourth filter according to the first embodiment. 図4は、実施の形態1の実装例に係る高周波回路の平面図である。FIG. 4 is a plan view of the high frequency circuit according to the implementation example of the first embodiment. 図5は、実施の形態1の実装例に係る高周波回路の平面図である。FIG. 5 is a plan view of the high frequency circuit according to the implementation example of the first embodiment. 図6は、実施の形態1の実装例に係る高周波回路の断面図である。FIG. 6 is a cross-sectional view of the high frequency circuit according to the implementation example of the first embodiment. 図7は、実施の形態1に係る高周波回路による増幅方法を示すフローチャートである。FIG. 7 is a flowchart showing an amplification method using the high frequency circuit according to the first embodiment. 図8は、実施の形態2に係る通信装置の回路構成図である。FIG. 8 is a circuit configuration diagram of a communication device according to the second embodiment. 図9Aは、実施の形態2に係る第2フィルタの通過特性を示すグラフである。FIG. 9A is a graph showing the pass characteristics of the second filter according to the second embodiment. 図9Bは、実施の形態2に係る第4フィルタの通過特性を示すグラフである。FIG. 9B is a graph showing the pass characteristics of the fourth filter according to the second embodiment. 図10は、実施の形態2の実装例に係る高周波回路の平面図である。FIG. 10 is a plan view of a high frequency circuit according to a mounting example of the second embodiment. 図11は、実施の形態2の実装例に係る高周波回路の平面図である。FIG. 11 is a plan view of a high frequency circuit according to a mounting example of the second embodiment. 図12は、実施の形態2の実装例に係る高周波回路の断面図である。FIG. 12 is a cross-sectional view of a high frequency circuit according to a mounting example of the second embodiment. 図13Aは、実施の形態2の変形例に係る第2フィルタの通過特性を示すグラフである。FIG. 13A is a graph showing the pass characteristics of the second filter according to a modification of the second embodiment. 図13Bは、実施の形態2の変形例に係る第4フィルタの通過特性を示すグラフである。FIG. 13B is a graph showing the pass characteristics of the fourth filter according to a modification of the second embodiment.
 以下、本発明の実施の形態について、図面を用いて詳細に説明する。なお、以下で説明する実施の形態は、いずれも包括的又は具体的な例を示すものである。以下の実施の形態で示される数値、形状、材料、構成要素、構成要素の配置及び接続形態などは、一例であり、本発明を限定する主旨ではない。 Hereinafter, embodiments of the present invention will be described in detail using the drawings. Note that the embodiments described below are all inclusive or specific examples. Numerical values, shapes, materials, components, arrangement of components, connection forms, etc. shown in the following embodiments are merely examples, and do not limit the present invention.
 なお、各図は、本発明を示すために適宜強調、省略、又は比率の調整を行った模式図であり、必ずしも厳密に図示されたものではなく、実際の形状、位置関係、及び比率とは異なる場合がある。各図において、実質的に同一の構成に対しては同一の符号を付しており、重複する説明は省略又は簡素化される場合がある。 Note that each figure is a schematic diagram with emphasis, omission, or ratio adjustment as appropriate to illustrate the present invention, and is not necessarily strictly illustrated, and the actual shape, positional relationship, and ratio may differ. It may be different. In each figure, substantially the same configurations are denoted by the same reference numerals, and overlapping explanations may be omitted or simplified.
 以下の各図において、x軸及びy軸は、モジュール基板の主面と平行な平面上で互いに直交する軸である。具体的には、平面視においてモジュール基板が矩形状を有する場合、x軸は、モジュール基板の第1辺に平行であり、y軸は、モジュール基板の第1辺と直交する第2辺に平行である。また、z軸は、モジュール基板の主面に垂直な軸であり、その正方向は上方向を示し、その負方向は下方向を示す。 In each of the following figures, the x-axis and the y-axis are axes that are orthogonal to each other on a plane parallel to the main surface of the module board. Specifically, when the module board has a rectangular shape in plan view, the x-axis is parallel to the first side of the module board, and the y-axis is parallel to the second side orthogonal to the first side of the module board. It is. Further, the z-axis is an axis perpendicular to the main surface of the module substrate, and its positive direction indicates an upward direction, and its negative direction indicates a downward direction.
 本発明の回路構成において、「接続される」とは、接続端子及び/又は配線導体で直接接続される場合だけでなく、他の回路素子を介して電気的に接続される場合も含む。「A及びBの間に接続される」とは、A及びBの間でA及びBの両方に接続されることを意味し、A及びBを結ぶ経路に直列接続されることに加えて、当該経路とグランドとの間に並列接続(シャント接続)されることを含む。 In the circuit configuration of the present invention, "connected" includes not only the case of direct connection with a connection terminal and/or wiring conductor, but also the case of electrical connection through other circuit elements. "Connected between A and B" means connected to both A and B between A and B, and in addition to being connected in series to the path connecting A and B. This includes being connected in parallel (shunt connection) between the path and ground.
 本発明の部品配置において、「部品が基板に配置される」とは、部品が基板の主面上に配置されること、及び、部品が基板内に配置されることを含む。「部品が基板の主面上に配置される」とは、部品が基板の主面に接触して配置されることに加えて、部品が主面と接触せずに当該主面の上方に配置されること(例えば、部品が主面と接触して配置された他の部品上に積層されること)を含む。また、「部品が基板の主面上に配置される」は、主面に形成された凹部に部品が配置されることを含んでもよい。「部品が基板内に配置される」とは、部品がモジュール基板内にカプセル化されることに加えて、部品の全部が基板の両主面の間に配置されているが部品の一部が基板に覆われていないこと、及び、部品の一部のみが基板内に配置されていることを含む。 In the component placement of the present invention, "the component is placed on the board" includes placing the component on the main surface of the board and placing the component within the board. "The component is placed on the main surface of the board" means that the part is placed in contact with the main surface of the board, and also that the part is placed above the main surface without contacting the main surface. (e.g., the part is stacked on top of another part placed in contact with the major surface). Furthermore, "the component is placed on the main surface of the substrate" may include that the component is placed in a recess formed in the main surface. "A component is placed within a board" means that, in addition to being encapsulated within a module board, all of the part is located between the two main surfaces of the board, but only a portion of the part is encapsulated within the module board. This includes not being covered by the board and only part of the component being placed within the board.
 また、本発明の部品配置において、「モジュール基板の平面視」とは、z軸正側からxy平面に物体を正投影して見ることを意味する。「Aは平面視においてBと重なる」とは、xy平面に正投影されたAの領域が、xy平面に正投影されたBの領域に重なることを意味する。また、「AがB及びCの間に配置される」とは、B内の任意の点とC内の任意の点とを結ぶ複数の線分のうちの少なくとも1つがAを通ることを意味する。 Furthermore, in the component arrangement of the present invention, "planar view of the module board" means viewing an object orthographically projected onto the xy plane from the positive side of the z-axis. "A overlaps B in plan view" means that the area of A orthogonally projected onto the xy plane overlaps the area of B orthogonally projected onto the xy plane. Furthermore, "A is placed between B and C" means that at least one of the multiple line segments connecting any point in B and any point in C passes through A. do.
 本発明において、フィルタの通過帯域とは、フィルタによって伝送される周波数スペクトルの部分であり、出力電力が最大出力電力よりも3dB以上減衰しない周波数帯域として定義される。一方、フィルタの減衰帯域とは、出力電力が最大出力電力よりも15dB以上減衰する周波数帯域として定義される。 In the present invention, the passband of a filter is a portion of the frequency spectrum transmitted by the filter, and is defined as a frequency band in which the output power is not attenuated by 3 dB or more below the maximum output power. On the other hand, the attenuation band of a filter is defined as a frequency band in which the output power is attenuated by 15 dB or more relative to the maximum output power.
 また、本発明において、「平行」及び「垂直」などの要素間の関係性を示す用語、及び、「矩形」などの要素の形状を示す用語、並びに、数値範囲は、厳格な意味のみを表すのではなく、実質的に同等な範囲、例えば数%程度の誤差をも含むことを意味する。 In addition, in the present invention, terms indicating relationships between elements such as "parallel" and "perpendicular", terms indicating the shape of elements such as "rectangle", and numerical ranges express only strict meanings. However, it does not mean that the error is within a substantially equivalent range, for example, it includes an error of several percent.
 (実施の形態1)
 以下、実施の形態1に係る通信装置6について図面を参照しながら説明する。
(Embodiment 1)
The communication device 6 according to the first embodiment will be described below with reference to the drawings.
 [1.1 通信装置6の回路構成]
 まず、通信装置6の回路構成について図1を参照しながら説明する。図1は、本実施の形態に係る通信装置6の回路構成図である。通信装置6は、高周波回路1と、アンテナ2a及び2bと、RFIC(Radio Frequency Integrated Circuit)3と、BBIC(Baseband Integrated Circuit)4と、電圧供給回路5と、を備える。
[1.1 Circuit configuration of communication device 6]
First, the circuit configuration of the communication device 6 will be explained with reference to FIG. FIG. 1 is a circuit configuration diagram of a communication device 6 according to this embodiment. The communication device 6 includes a high frequency circuit 1, antennas 2a and 2b, an RFIC (Radio Frequency Integrated Circuit) 3, a BBIC (Baseband Integrated Circuit) 4, and a voltage supply circuit 5.
 高周波回路1は、アンテナ2a及び2bとRFIC3との間で高周波信号を伝送する。高周波回路1の内部構成については後述する。 The high frequency circuit 1 transmits high frequency signals between the antennas 2a and 2b and the RFIC 3. The internal configuration of the high frequency circuit 1 will be described later.
 アンテナ2a及び2bは、高周波回路1のアンテナ接続端子101及び102にそれぞれ接続され、高周波回路1から出力された高周波信号を送信する。また、アンテナ2a及び2bは、外部から高周波信号を受信して高周波回路1へ出力する。 The antennas 2a and 2b are connected to antenna connection terminals 101 and 102 of the high frequency circuit 1, respectively, and transmit high frequency signals output from the high frequency circuit 1. Further, the antennas 2a and 2b receive high frequency signals from the outside and output them to the high frequency circuit 1.
 RFIC3は、高周波信号を処理する信号処理回路の一例である。具体的には、RFIC3は、高周波回路1の受信経路を介して入力された高周波受信信号を、ダウンコンバート等により信号処理し、当該信号処理して生成された受信信号をBBIC4へ出力する。さらに、RFIC3は、BBIC4から入力された送信信号をアップコンバート等により信号処理し、当該信号処理して生成された高周波送信信号を、高周波回路1の送信経路に出力する。また、RFIC3は、高周波回路1を制御する制御部を有する。なお、RFIC3の制御部としての機能の一部又は全部は、RFIC3の外部に実装されてもよく、例えば、BBIC4又は高周波回路1に実装されてもよい。 The RFIC 3 is an example of a signal processing circuit that processes high frequency signals. Specifically, the RFIC 3 performs signal processing on the high frequency received signal input via the reception path of the high frequency circuit 1 by down-converting or the like, and outputs the received signal generated by the signal processing to the BBIC 4 . Further, the RFIC 3 processes the transmission signal input from the BBIC 4 by up-converting or the like, and outputs the high-frequency transmission signal generated by the signal processing to the transmission path of the high-frequency circuit 1. Further, the RFIC 3 has a control section that controls the high frequency circuit 1. Note that part or all of the function of the control unit of the RFIC 3 may be implemented outside the RFIC 3, for example, in the BBIC 4 or the high frequency circuit 1.
 BBIC4は、高周波回路1が伝送する高周波信号よりも低周波の中間周波数帯域を用いて信号処理するベースバンド信号処理回路である。BBIC4で処理される信号としては、例えば、画像表示のための画像信号、及び/又は、スピーカを介した通話のために音声信号が用いられる。 The BBIC 4 is a baseband signal processing circuit that processes signals using an intermediate frequency band lower in frequency than the high frequency signal transmitted by the high frequency circuit 1. As the signal processed by the BBIC 4, for example, an image signal for displaying an image and/or an audio signal for talking through a speaker is used.
 電圧供給回路5は、高周波回路1に電源電圧を供給することができる。例えば、電圧供給回路5は、電力効率を向上させるために変調された電源電圧を供給してもよい。このとき、電源電圧の変調は、複数の離散的なレベルで制限されてもよい。このような複数の離散的なレベルを有する変調された電源電圧を供給する方法としては、例えば、平均電力トラッキング(APT:Average Power Tracking)モード、シンボル電力トラッキング(SPT:Symbol Power Tracking)モード、アナログエンベロープトラッキング(A-ET:Analog Envelope Tracking)モード、又は、デジタルエンベロープトラッキング(D-ET:Digital Envelope Tracking)モードなどを用いることができるが、これらに限定されない。各種トラッキングモードについては、図2A~図2Cを用いて後述する。なお、電圧供給回路5から供給される電源電圧は、特に限定されない。例えば、電圧供給回路5は、固定された電源電圧を供給してもよく、連続的に変化する電源電圧を供給してもよい。 The voltage supply circuit 5 can supply a power supply voltage to the high frequency circuit 1. For example, the voltage supply circuit 5 may supply a modulated power supply voltage to improve power efficiency. At this time, the modulation of the power supply voltage may be limited to a plurality of discrete levels. Methods of supplying such a modulated power supply voltage having a plurality of discrete levels include, for example, average power tracking (APT) mode, symbol power tracking (SPT) mode, analog Envelope tracking (A-ET: Analog Envelope Tracking) mode, digital envelope tracking (D-ET: Digital Envelope Tracking) mode, etc. can be used, but are not limited thereto. Various tracking modes will be described later using FIGS. 2A to 2C. Note that the power supply voltage supplied from the voltage supply circuit 5 is not particularly limited. For example, the voltage supply circuit 5 may supply a fixed power supply voltage or may supply a continuously changing power supply voltage.
 なお、図1に表された通信装置6の回路構成は、例示であり、これに限定されない。例えば、通信装置6は、アンテナ2a、アンテナ2b、BBIC4、又は、これらの任意の組み合わせを含まなくてもよい。また例えば、通信装置6は、3以上のアンテナを含んでもよい。 Note that the circuit configuration of the communication device 6 shown in FIG. 1 is an example and is not limited thereto. For example, the communication device 6 may not include the antenna 2a, the antenna 2b, the BBIC 4, or any combination thereof. For example, the communication device 6 may include three or more antennas.
 [1.2 トラッキングモードの具体例]
 ここで、電圧供給回路5から供給される電源電圧に適用可能なトラッキングモードについて、図2A~図2Cを参照しながら説明する。
[1.2 Specific example of tracking mode]
Here, a tracking mode applicable to the power supply voltage supplied from the voltage supply circuit 5 will be described with reference to FIGS. 2A to 2C.
 図2Aは、APTモードにおける電源電圧の推移の一例を示すグラフである。APTモードでは、1フレーム単位で複数の離散的な電圧レベルに電源電圧を変動させる。その結果、電源電圧信号は矩形波を形成する。APTモードでは、平均出力電力に基づいて、電源電圧の電圧レベルが決定される。なお、APTモードでは、1フレームよりも小さな単位(例えばサブフレーム、スロット又はシンボル)で電圧レベルが変化してもよい。シンボル単位で電圧レベルが変化するAPTは、SPTと呼ばれる場合もある。 FIG. 2A is a graph showing an example of the change in power supply voltage in APT mode. In the APT mode, the power supply voltage is varied to a plurality of discrete voltage levels in units of one frame. As a result, the power supply voltage signal forms a square wave. In APT mode, the voltage level of the power supply voltage is determined based on the average output power. Note that in the APT mode, the voltage level may change in units smaller than one frame (for example, subframes, slots, or symbols). APT in which the voltage level changes on a symbol-by-symbol basis is sometimes called SPT.
 フレームとは、高周波信号(変調波)を構成する単位を意味する。例えば5GNR及びLTEでは、フレームは、10個のサブフレームを含み、各サブフレームは、複数のスロットを含み、各スロットは、複数のシンボルで構成される。サブフレーム長は1msであり、フレーム長は10msである。 A frame means a unit that constitutes a high frequency signal (modulated wave). For example, in 5GNR and LTE, a frame includes 10 subframes, each subframe includes multiple slots, and each slot consists of multiple symbols. The subframe length is 1ms and the frame length is 10ms.
 図2Bは、A-ETモードにおける電源電圧の推移の一例を示すグラフである。A-ETモードでは、電源電圧を連続的に変動させることで変調波の包絡線を追跡する。A-ETモードでは、エンベロープ信号に基づいて電源電圧が決定される。 FIG. 2B is a graph showing an example of the change in power supply voltage in A-ET mode. In A-ET mode, the envelope of the modulated wave is tracked by continuously varying the power supply voltage. In A-ET mode, the power supply voltage is determined based on the envelope signal.
 エンベロープ信号とは、変調波の包絡線を示す信号である。エンベロープ値は、例えば(I+Q)の平方根で表される。ここで、(I,Q)は、コンスタレーションポイントを表す。コンスタレーションポイントとは、デジタル変調によって変調された信号をコンスタレーションダイヤグラム上で表す点である。(I,Q)は、例えば送信情報に基づいてBBIC4で決定される。 The envelope signal is a signal indicating the envelope of a modulated wave. The envelope value is expressed, for example, as the square root of (I 2 +Q 2 ). Here, (I, Q) represents a constellation point. A constellation point is a point on a constellation diagram that represents a signal modulated by digital modulation. (I, Q) is determined by the BBIC 4 based on transmission information, for example.
 図2Cは、D-ETモードにおける電源電圧の推移の一例を示すグラフである。D-ETモードでは、1フレーム内で複数の離散的な電圧レベルに電源電圧を変動させることで変調波の包絡線を追跡する。その結果、電源電圧信号は矩形波を形成する。D-ETモードでは、エンベロープ信号に基づいて、複数の離散的な電圧レベルの中から電源電圧レベルが選択又は設定される。 FIG. 2C is a graph showing an example of the change in power supply voltage in the D-ET mode. In the D-ET mode, the envelope of the modulated wave is tracked by varying the power supply voltage to a plurality of discrete voltage levels within one frame. As a result, the power supply voltage signal forms a square wave. In the D-ET mode, the power supply voltage level is selected or set from among a plurality of discrete voltage levels based on the envelope signal.
 D-ETモードでは、例えば、複数の離散的なレベルの電源電圧が予め準備され、予め準備された複数のレベルの中から、スイッチ(図示せず)を用いて1つのレベルが選択され出力される。これにより、電力増幅器11及び12に供給される電源電圧のレベルをスイッチで高速に切り替えることができる。複数のスイッチを用いることで、複数の電力増幅器に異なるレベルの電源電圧を供給することもできる。なお、D-ETモードにおける電源電圧の変調方法は、このような方法に限定されない。例えば、複数の離散的な電圧レベルは随時生成され出力されてもよい。また、SPT及び/又はAPTでも、D-ETモードと同様の方法で電源電圧が変調されてもよい。 In the D-ET mode, for example, a plurality of discrete levels of power supply voltage are prepared in advance, and one level is selected and output from the plurality of prepared levels using a switch (not shown). Ru. Thereby, the level of the power supply voltage supplied to the power amplifiers 11 and 12 can be changed at high speed using the switch. By using multiple switches, it is also possible to supply different levels of power supply voltage to multiple power amplifiers. Note that the method of modulating the power supply voltage in the D-ET mode is not limited to this method. For example, multiple discrete voltage levels may be generated and output at any time. Also, in SPT and/or APT, the power supply voltage may be modulated in the same manner as in the D-ET mode.
 [1.3 高周波回路1の回路構成]
 次に、高周波回路1の回路構成について図1を参照しながら説明する。高周波回路1は、電力増幅器11及び12と、低雑音増幅器21及び22と、フィルタ31~34と、キャパシタ41及び42と、スイッチ51~53と、PA制御回路61と、アンテナ接続端子101及び102と、高周波入力端子111及び112と、高周波出力端子121及び122と、電源端子131と、制御端子141と、を備える。以下に、高周波回路1の構成要素について順に説明する。
[1.3 Circuit configuration of high frequency circuit 1]
Next, the circuit configuration of the high frequency circuit 1 will be explained with reference to FIG. 1. The high frequency circuit 1 includes power amplifiers 11 and 12, low noise amplifiers 21 and 22, filters 31 to 34, capacitors 41 and 42, switches 51 to 53, a PA control circuit 61, and antenna connection terminals 101 and 102. , high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, a power supply terminal 131, and a control terminal 141. Below, the components of the high frequency circuit 1 will be explained in order.
 アンテナ接続端子101及び102は、高周波回路1内でともにスイッチ51に接続され、高周波回路1外でアンテナ2a及び2bにそれぞれ接続される。電力増幅器11及び12で増幅されたバンドA及びBの送信信号は、アンテナ接続端子101及び102を介してアンテナ2a及び2bにそれぞれ出力される。また、アンテナ2a及び2bで受信されたバンドA及びBの受信信号は、アンテナ接続端子101及び102を介して高周波回路1に入力される。 The antenna connection terminals 101 and 102 are both connected to the switch 51 within the high frequency circuit 1, and are connected to the antennas 2a and 2b, respectively, outside the high frequency circuit 1. Band A and B transmission signals amplified by power amplifiers 11 and 12 are output to antennas 2a and 2b via antenna connection terminals 101 and 102, respectively. Furthermore, the reception signals of bands A and B received by the antennas 2a and 2b are input to the high frequency circuit 1 via the antenna connection terminals 101 and 102.
 高周波入力端子111は、高周波回路1の外部からバンドAの送信信号を受けるための端子である。高周波入力端子111は、高周波回路1の外部でRFIC3に接続され、高周波回路1の内部で電力増幅器11の入力端子に接続される。これにより、高周波入力端子111を介してRFIC3から受けたバンドAの送信信号は、電力増幅器11に供給される。 The high frequency input terminal 111 is a terminal for receiving a band A transmission signal from outside the high frequency circuit 1. The high frequency input terminal 111 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the input terminal of the power amplifier 11 inside the high frequency circuit 1. Thereby, the band A transmission signal received from the RFIC 3 via the high frequency input terminal 111 is supplied to the power amplifier 11.
 高周波入力端子112は、高周波回路1の外部からバンドBの送信信号を受けるための端子である。高周波入力端子112は、高周波回路1の外部でRFIC3に接続され、高周波回路1の内部で電力増幅器12の入力端子に接続される。これにより、高周波入力端子112を介してRFIC3から受けたバンドBの送信信号は、電力増幅器12に供給される。 The high frequency input terminal 112 is a terminal for receiving a band B transmission signal from outside the high frequency circuit 1. The high frequency input terminal 112 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the input terminal of the power amplifier 12 inside the high frequency circuit 1. Thereby, the band B transmission signal received from the RFIC 3 via the high frequency input terminal 112 is supplied to the power amplifier 12.
 高周波出力端子121は、高周波回路1の外部にバンドAの受信信号を供給するための端子である。高周波出力端子121は、高周波回路1の外部でRFIC3に接続され、高周波回路1の内部で低雑音増幅器21の出力端子に接続される。これにより、低雑音増幅器21で増幅されたバンドAの受信信号は、高周波出力端子121を介してRFIC3に供給される。 The high frequency output terminal 121 is a terminal for supplying a band A received signal to the outside of the high frequency circuit 1. The high frequency output terminal 121 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the output terminal of the low noise amplifier 21 inside the high frequency circuit 1. Thereby, the band A reception signal amplified by the low noise amplifier 21 is supplied to the RFIC 3 via the high frequency output terminal 121.
 高周波出力端子122は、高周波回路1の外部にバンドBの受信信号を供給するための端子である。高周波出力端子122は、高周波回路1の外部でRFIC3に接続され、高周波回路1の内部で低雑音増幅器22の出力端子に接続される。これにより、低雑音増幅器22で増幅されたバンドBの受信信号は、高周波出力端子122を介してRFIC3に供給される。 The high frequency output terminal 122 is a terminal for supplying a band B received signal to the outside of the high frequency circuit 1. The high frequency output terminal 122 is connected to the RFIC 3 outside the high frequency circuit 1 and connected to the output terminal of the low noise amplifier 22 inside the high frequency circuit 1. Thereby, the band B received signal amplified by the low noise amplifier 22 is supplied to the RFIC 3 via the high frequency output terminal 122.
 電源端子131は、第1電源端子の一例であり、かつ、第2電源端子の一例である。つまり、本実施の形態では、電力増幅器11に供給される電源電圧を受ける第1電源端子と、電力増幅器12に供給される電源電圧を受ける第2電源端子とは、同一の電源端子である。電源端子131は、高周波回路1の外部で電圧供給回路5に接続され、高周波回路1の内部で電力増幅器11及び12に接続される。これにより、電源端子131を介して電圧供給回路5から受けた電源電圧は、電力増幅器11及び12に供給される。 The power terminal 131 is an example of a first power terminal and an example of a second power terminal. That is, in this embodiment, the first power supply terminal that receives the power supply voltage supplied to the power amplifier 11 and the second power supply terminal that receives the power supply voltage supplied to the power amplifier 12 are the same power supply terminal. The power supply terminal 131 is connected to the voltage supply circuit 5 outside the high frequency circuit 1 and connected to the power amplifiers 11 and 12 inside the high frequency circuit 1. Thereby, the power supply voltage received from the voltage supply circuit 5 via the power supply terminal 131 is supplied to the power amplifiers 11 and 12.
 制御端子141は、制御信号を伝送するための端子である。つまり、制御端子141は、高周波回路1の外部から制御信号を受けるための端子、及び/又は、高周波回路1の外部に制御信号を供給するための端子である。 The control terminal 141 is a terminal for transmitting a control signal. That is, the control terminal 141 is a terminal for receiving a control signal from outside the high frequency circuit 1 and/or a terminal for supplying a control signal to the outside of the high frequency circuit 1.
 電力増幅器11及び12は、電源から供給される電力(電源電圧)を基に入力信号(送信信号)よりも大きなエネルギーの出力信号を得る能動回路である。電力増幅器11及び12の各々は、増幅トランジスタを含み、さらにインダクタ及び/又はキャパシタを含んでもよい。電力増幅器11及び12の内部構成は、特に限定されない。例えば、電力増幅器11及び12の各々は、多段増幅器であってもよく、差動増幅型の増幅器又はドハティ増幅器であってもよい。 The power amplifiers 11 and 12 are active circuits that obtain output signals with greater energy than the input signal (transmission signal) based on the power (power supply voltage) supplied from the power supply. Each of power amplifiers 11 and 12 includes an amplification transistor and may further include an inductor and/or a capacitor. The internal configurations of power amplifiers 11 and 12 are not particularly limited. For example, each of the power amplifiers 11 and 12 may be a multistage amplifier, a differential amplifier, or a Doherty amplifier.
 電力増幅器11は、第1電力増幅器の一例であり、高周波入力端子111及びフィルタ31の間に接続される。具体的には、電力増幅器11の入力端子は、高周波入力端子111に接続され、電力増幅器11の出力端子は、スイッチ52を介してフィルタ31に接続される。また、電力増幅器11は、電源ラインP1(第1電源ライン)を介して電源端子131に接続される。これにより、電力増幅器11は、電源端子131を介して受けた電源電圧(第1電源電圧)を用いて、高周波入力端子111を介して受けたバンドAの送信信号を増幅することができる。 The power amplifier 11 is an example of a first power amplifier, and is connected between the high frequency input terminal 111 and the filter 31. Specifically, the input terminal of the power amplifier 11 is connected to the high frequency input terminal 111, and the output terminal of the power amplifier 11 is connected to the filter 31 via the switch 52. Further, the power amplifier 11 is connected to a power supply terminal 131 via a power supply line P1 (first power supply line). Thereby, the power amplifier 11 can amplify the band A transmission signal received via the high frequency input terminal 111 using the power supply voltage (first power supply voltage) received via the power supply terminal 131.
 電力増幅器12は、第2電力増幅器の一例であり、高周波入力端子112及びフィルタ32の間に接続される。具体的には、電力増幅器12の入力端子は、高周波入力端子112に接続され、電力増幅器12の出力端子は、スイッチ53を介してフィルタ32に接続される。また、電力増幅器12は、電源ラインP2(第2電源ライン)を介して電源端子131に接続される。これにより、電力増幅器12は、電源端子131を介して受けた電源電圧(第2電源電圧)を用いて、高周波入力端子112を介して受けたバンドBの送信信号を増幅することができる。 The power amplifier 12 is an example of a second power amplifier, and is connected between the high frequency input terminal 112 and the filter 32. Specifically, the input terminal of the power amplifier 12 is connected to the high frequency input terminal 112, and the output terminal of the power amplifier 12 is connected to the filter 32 via the switch 53. Further, the power amplifier 12 is connected to a power supply terminal 131 via a power supply line P2 (second power supply line). Thereby, the power amplifier 12 can amplify the band B transmission signal received via the high frequency input terminal 112 using the power supply voltage (second power supply voltage) received via the power supply terminal 131.
 低雑音増幅器21及び22は、電源から供給される電力を基に入力信号(受信信号)よりも大きなエネルギーの出力信号を得る能動回路である。低雑音増幅器21及び22の各々は、増幅トランジスタを含み、さらにインダクタ及び/又はキャパシタを含んでもよい。低雑音増幅器21及び22の内部構成は、特に限定されない。 The low noise amplifiers 21 and 22 are active circuits that obtain output signals with greater energy than the input signal (received signal) based on the power supplied from the power supply. Each of low noise amplifiers 21 and 22 includes an amplification transistor and may further include an inductor and/or a capacitor. The internal configurations of the low noise amplifiers 21 and 22 are not particularly limited.
 低雑音増幅器21は、フィルタ31と高周波出力端子121との間に接続される。具体的には、低雑音増幅器21の入力端子は、スイッチ52を介してフィルタ31に接続され、低雑音増幅器21の出力端子は、高周波出力端子121に接続される。これにより、低雑音増幅器21は、フィルタ31を介して受けたバンドAの受信信号を増幅してRFIC3に供給することができる。 The low noise amplifier 21 is connected between the filter 31 and the high frequency output terminal 121. Specifically, the input terminal of the low noise amplifier 21 is connected to the filter 31 via the switch 52, and the output terminal of the low noise amplifier 21 is connected to the high frequency output terminal 121. Thereby, the low noise amplifier 21 can amplify the band A reception signal received via the filter 31 and supply it to the RFIC 3.
 低雑音増幅器22は、フィルタ32と高周波出力端子122との間に接続される。具体的には、低雑音増幅器22の入力端子は、スイッチ53を介してフィルタ32に接続され、低雑音増幅器22の出力端子は、高周波出力端子122に接続される。これにより、低雑音増幅器22は、フィルタ32を介して受けたバンドBの受信信号を増幅してRFIC3に供給することができる。 The low noise amplifier 22 is connected between the filter 32 and the high frequency output terminal 122. Specifically, the input terminal of the low noise amplifier 22 is connected to the filter 32 via the switch 53, and the output terminal of the low noise amplifier 22 is connected to the high frequency output terminal 122. Thereby, the low noise amplifier 22 can amplify the band B reception signal received via the filter 32 and supply it to the RFIC 3.
 フィルタ31(A-TRx)は、第1フィルタの一例であり、バンドAを含む通過帯域を有し、電力増幅器11に接続される。具体的には、フィルタ31の一端は、スイッチ52を介して、電力増幅器11及び低雑音増幅器21に選択的に接続される。一方、フィルタ31の他端は、スイッチ51を介して、アンテナ接続端子101及び102に選択的に接続される。これにより、フィルタ31は、電力増幅器11で増幅された送信信号のうち、バンドAの送信信号を通過させることができ、アンテナ2a又は2bで受信された受信信号のうち、バンドAの受信信号を通過させることができる。 The filter 31 (A-TRx) is an example of a first filter, has a passband including band A, and is connected to the power amplifier 11. Specifically, one end of the filter 31 is selectively connected to the power amplifier 11 and the low noise amplifier 21 via the switch 52. On the other hand, the other end of the filter 31 is selectively connected to antenna connection terminals 101 and 102 via a switch 51. Thereby, the filter 31 can pass the transmission signal of band A among the transmission signals amplified by the power amplifier 11, and can pass the reception signal of band A among the reception signals received by the antenna 2a or 2b. can be passed.
 フィルタ32(B-TRx)は、第3フィルタの一例であり、バンドBを含む通過帯域を有し、電力増幅器12に接続される。具体的には、フィルタ32の一端は、スイッチ53を介して、電力増幅器12及び低雑音増幅器22に選択的に接続される。一方、フィルタ32の他端は、スイッチ51を介して、アンテナ接続端子101及び102に選択的に接続される。これにより、フィルタ32は、電力増幅器12で増幅された送信信号のうち、バンドBの送信信号を通過させることができ、アンテナ2a又は2bで受信された受信信号のうち、バンドBの受信信号を通過させることができる。 The filter 32 (B-TRx) is an example of a third filter, has a passband including band B, and is connected to the power amplifier 12. Specifically, one end of the filter 32 is selectively connected to the power amplifier 12 and the low noise amplifier 22 via the switch 53. On the other hand, the other end of the filter 32 is selectively connected to antenna connection terminals 101 and 102 via a switch 51. Thereby, the filter 32 can pass the band B transmission signal among the transmission signals amplified by the power amplifier 12, and can pass the band B reception signal among the reception signals received by the antenna 2a or 2b. can be passed.
 フィルタ33は、第2フィルタの一例であり、電源端子131と電力増幅器11との間に接続される。フィルタ33は、バンドAの少なくとも一部とバンドBの少なくとも一部とを含む減衰帯域を有する。これにより、フィルタ33は、電力増幅器11で発生したバンドBのノイズが電源ラインを介して電力増幅器12に侵入することを抑制するとともに、電力増幅器12で発生したバンドAのノイズが電源ラインを介して電力増幅器11に侵入することを抑制することができる。 The filter 33 is an example of a second filter, and is connected between the power supply terminal 131 and the power amplifier 11. Filter 33 has an attenuation band that includes at least a portion of Band A and at least a portion of Band B. Thereby, the filter 33 suppresses band B noise generated in the power amplifier 11 from entering the power amplifier 12 via the power line, and suppresses band A noise generated in the power amplifier 12 from entering the power amplifier 12 via the power line. It is possible to suppress the intrusion into the power amplifier 11.
 本実施の形態では、フィルタ33は、ローパスフィルタであり、例えばインダクタ及びキャパシタで構成される。このとき、フィルタ33の入力インピーダンスは、フィルタ31の入力インピーダンスよりも低い。したがって、フィルタ33では、低入力インピーダンスに適したフィルタ設計が行われる。 In this embodiment, the filter 33 is a low-pass filter, and is composed of, for example, an inductor and a capacitor. At this time, the input impedance of the filter 33 is lower than the input impedance of the filter 31. Therefore, the filter 33 has a filter design suitable for low input impedance.
 フィルタ34は、第4フィルタの一例であり、電源端子131と電力増幅器12との間に接続される。フィルタ34は、バンドAの少なくとも一部とバンドBの少なくとも一部とを含む減衰帯域を有する。これにより、フィルタ34は、電力増幅器12で発生したバンドAのノイズが電源ラインを介して電力増幅器11に侵入することを抑制するとともに、電力増幅器11で発生したバンドBのノイズが電源ラインを介して電力増幅器12に侵入することを抑制することができる。 The filter 34 is an example of a fourth filter, and is connected between the power supply terminal 131 and the power amplifier 12. Filter 34 has an attenuation band that includes at least a portion of Band A and at least a portion of Band B. Thereby, the filter 34 suppresses band A noise generated in the power amplifier 12 from entering the power amplifier 11 via the power line, and suppresses band B noise generated in the power amplifier 11 from entering the power amplifier 11 via the power line. It is possible to suppress the interference from entering the power amplifier 12.
 本実施の形態では、フィルタ34は、ローパスフィルタであり、例えばインダクタ及びキャパシタで構成される。このとき、フィルタ34の入力インピーダンスは、フィルタ32の入力インピーダンスよりも低い。したがって、フィルタ34では、低入力インピーダンスに適したフィルタ設計が行われる。 In this embodiment, the filter 34 is a low-pass filter, and is composed of, for example, an inductor and a capacitor. At this time, the input impedance of the filter 34 is lower than the input impedance of the filter 32. Therefore, the filter 34 has a filter design suitable for low input impedance.
 キャパシタ41は、第1キャパシタの一例であり、フィルタ33及び電力増幅器11の間の経路とグランドとの間に接続される。キャパシタ41は、バイパスキャパシタ又はデカップリングキャパシタと呼ばれることがある。 The capacitor 41 is an example of a first capacitor, and is connected between the path between the filter 33 and the power amplifier 11 and the ground. Capacitor 41 is sometimes called a bypass capacitor or a decoupling capacitor.
 キャパシタ42は、第2キャパシタの一例であり、フィルタ34及び電力増幅器12の間の経路とグランドとの間に接続される。キャパシタ42は、バイパスキャパシタ又はデカップリングキャパシタと呼ばれることがある。 The capacitor 42 is an example of a second capacitor, and is connected between the path between the filter 34 and the power amplifier 12 and the ground. Capacitor 42 is sometimes called a bypass capacitor or a decoupling capacitor.
 スイッチ51は、アンテナ接続端子101及び102とフィルタ31及び32との間に接続される。具体的には、スイッチ51は、アンテナ接続端子101に接続される端子511と、アンテナ接続端子102に接続される端子512と、フィルタ31に接続される端子513と、フィルタ32に接続される端子514と、を有する。 The switch 51 is connected between the antenna connection terminals 101 and 102 and the filters 31 and 32. Specifically, the switch 51 has a terminal 511 connected to the antenna connection terminal 101, a terminal 512 connected to the antenna connection terminal 102, a terminal 513 connected to the filter 31, and a terminal connected to the filter 32. 514.
 この接続構成において、スイッチ51は、例えばRFIC3からの制御信号に基づいて、端子511を端子513及び514の一方に接続することができ、端子512を端子513及び514の他方に接続することができる。つまり、スイッチ51は、フィルタ31の接続をアンテナ接続端子101及び102の間で切り替え、フィルタ32の接続をアンテナ接続端子101及び102の間で切り替えることができる。スイッチ51は、例えばDPDT(Double-Pole Double-Throw)型のスイッチ回路で構成される。 In this connection configuration, the switch 51 can connect the terminal 511 to one of the terminals 513 and 514, and connect the terminal 512 to the other of the terminals 513 and 514, based on a control signal from the RFIC 3, for example. . That is, the switch 51 can switch the connection of the filter 31 between the antenna connection terminals 101 and 102, and can switch the connection of the filter 32 between the antenna connection terminals 101 and 102. The switch 51 is composed of, for example, a DPDT (Double-Pole Double-Throw) type switch circuit.
 スイッチ52は、フィルタ31と電力増幅器11及び低雑音増幅器21との間に接続される。具体的には、スイッチ52は、フィルタ31に接続される端子521と、電力増幅器11に接続される端子522と、低雑音増幅器21に接続される端子523と、を有する。 The switch 52 is connected between the filter 31 and the power amplifier 11 and low noise amplifier 21. Specifically, the switch 52 has a terminal 521 connected to the filter 31, a terminal 522 connected to the power amplifier 11, and a terminal 523 connected to the low noise amplifier 21.
 この接続構成において、スイッチ52は、例えばRFIC3からの制御信号に基づいて、端子521を端子522及び523に排他的に接続することができる。つまり、スイッチ52は、フィルタ31の接続を電力増幅器11及び低雑音増幅器21の間で切り替えることができる。スイッチ52は、例えばSPDT(Single-Pole Double-Throw)型のスイッチ回路で構成される。 In this connection configuration, the switch 52 can exclusively connect the terminal 521 to the terminals 522 and 523 based on a control signal from the RFIC 3, for example. That is, the switch 52 can switch the connection of the filter 31 between the power amplifier 11 and the low noise amplifier 21. The switch 52 is composed of, for example, an SPDT (Single-Pole Double-Throw) type switch circuit.
 スイッチ53は、フィルタ32と電力増幅器12及び低雑音増幅器22との間に接続される。具体的には、スイッチ53は、フィルタ32に接続される端子531と、電力増幅器12に接続される端子532と、低雑音増幅器22に接続される端子533と、を有する。 The switch 53 is connected between the filter 32 and the power amplifier 12 and low noise amplifier 22. Specifically, the switch 53 has a terminal 531 connected to the filter 32, a terminal 532 connected to the power amplifier 12, and a terminal 533 connected to the low noise amplifier 22.
 この接続構成において、スイッチ53は、例えばRFIC3からの制御信号に基づいて、端子531を端子532及び533に排他的に接続することができる。つまり、スイッチ53は、フィルタ32の接続を電力増幅器12及び低雑音増幅器22の間で切り替えることができる。スイッチ53は、例えばSPDT型のスイッチ回路で構成される。 In this connection configuration, the switch 53 can exclusively connect the terminal 531 to the terminals 532 and 533 based on a control signal from the RFIC 3, for example. That is, the switch 53 can switch the connection of the filter 32 between the power amplifier 12 and the low noise amplifier 22. The switch 53 is composed of, for example, an SPDT type switch circuit.
 PA制御回路61は、電力増幅器11及び12を制御することができる。例えば、PA制御回路61は、RFIC3から制御端子141を介して受けたデジタル制御信号に基づいて、電力増幅器11及び12の各々に供給されるバイアス電流を制御することができる。 The PA control circuit 61 can control the power amplifiers 11 and 12. For example, the PA control circuit 61 can control the bias current supplied to each of the power amplifiers 11 and 12 based on a digital control signal received from the RFIC 3 via the control terminal 141.
 なお、バンドA及びBは、それぞれ第1バンド及び第2バンドの一例であり、ともに無線アクセス技術(RAT:Radio Access Technology)を用いて構築される通信システムのための周波数バンドであり、同時送信可能な周波数バンドである。同時送信可能なバンドA及びBは、標準化団体など(例えば3GPP(登録商標)(3rd Generation Partnership Project)及びIEEE(Institute of Electrical and Electronics Engineers)等)によって予め定義される。通信システムの例としては、5GNR(5th Generation New Radio)システム、LTE(Long Term Evolution)システム及びWLAN(Wireless Local Area Network)システム等を挙げることができる。 Note that bands A and B are examples of the first band and the second band, respectively, and both are frequency bands for communication systems constructed using radio access technology (RAT), and are used for simultaneous transmission. possible frequency bands. Bands A and B that can be simultaneously transmitted are defined in advance by standardization organizations (for example, 3GPP (registered trademark) (3rd Generation Partnership Project), IEEE (Institute of Electrical and Electronics Engineers), etc.). Examples of communication systems include a 5GNR (5th Generation New Radio) system, an LTE (Long Term Evolution) system, and a WLAN (Wireless Local Area Network) system.
 また、本実施の形態において、バンドA及びBは、ともに時分割複信(TDD:Time Division Duplex)バンドである。バンドA及びBとしては、隣接する異なる2つの周波数バンドが用いられ、例えば5GNRのためのn77及びn79が用いられる。隣接する2つの周波数バンドとは、当該2つの周波数バンドの間に他の周波数バンドが含まれないように、標準化団体などによって定義されている2つの周波数バンドを意味する。または、隣接する2つの周波数バンドとは、2つの周波数バンドの間でサイドローブの影響が大きい2つの周波数バンド、つまり、規格書などにおいてクロスバンドアイソレーションの例外規定が定義されている2つの周波数バンドを意味する。なお、バンドA及びBは、TDDバンドに限定されず、隣接する2つのバンドにも限定されない。例えば、バンドA及びBとして、隣接しない2つのTDDバンドが用いられてもよく、2つの周波数分割複信(FDD:Frequency Division Duplex)バンドが用いられてもよい。また、バンドA及びBとして、TDDバンド及びFDDバンドの組み合わせが用いられてもよい。 Furthermore, in this embodiment, both bands A and B are time division duplex (TDD) bands. As bands A and B, two different adjacent frequency bands are used, for example n77 and n79 for 5GNR. Two adjacent frequency bands mean two frequency bands defined by a standardization organization or the like so that no other frequency band is included between the two frequency bands. Alternatively, two adjacent frequency bands are two frequency bands where the influence of side lobes is large between the two frequency bands, in other words, two frequencies for which exceptions to cross-band isolation are defined in standards etc. means band. Note that bands A and B are not limited to the TDD band, nor are they limited to two adjacent bands. For example, as bands A and B, two non-adjacent TDD bands may be used, or two frequency division duplex (FDD) bands may be used. Further, as bands A and B, a combination of a TDD band and an FDD band may be used.
 なお、図1に表された高周波回路1は、例示であり、これに限定されない。例えば、高周波回路1は、受信経路を備えなくてもよい。また例えば、高周波回路1は、バンドA及びBと異なるバンドCに対応するフィルタ、電力増幅器及び低雑音増幅器を備えてもよい。また、高周波回路1は、バンドBのための回路素子の一部又は全部を含まなくてもよい。つまり、高周波回路1は、少なくとも、電力増幅器11と、フィルタ31及び33と、電源端子131と、を備えればよい。 Note that the high frequency circuit 1 shown in FIG. 1 is an example, and the present invention is not limited thereto. For example, the high frequency circuit 1 may not include a receiving path. Furthermore, for example, the high frequency circuit 1 may include a filter, a power amplifier, and a low noise amplifier corresponding to band C different from bands A and B. Further, the high frequency circuit 1 may not include some or all of the circuit elements for band B. That is, the high frequency circuit 1 only needs to include at least the power amplifier 11, the filters 31 and 33, and the power supply terminal 131.
 [1.4 フィルタ33及び34の通過特性]
 次に、フィルタ33及び34の通過特性について図3A及び図3Bを参照しながら説明する。図3Aは、本実施の形態に係るフィルタ33の通過特性を示すグラフである。図3Bは、本実施の形態に係るフィルタ34の通過特性を示すグラフである。図3A及び図3Bにおいて、横軸は周波数を表し、縦軸は利得を表す。
[1.4 Passage characteristics of filters 33 and 34]
Next, the pass characteristics of the filters 33 and 34 will be explained with reference to FIGS. 3A and 3B. FIG. 3A is a graph showing the pass characteristics of the filter 33 according to this embodiment. FIG. 3B is a graph showing the pass characteristics of the filter 34 according to this embodiment. In FIGS. 3A and 3B, the horizontal axis represents frequency, and the vertical axis represents gain.
 フィルタ33は、ローパスフィルタであり、図3Aに示すようにバンドA及びBを含む減衰帯域を有する。フィルタ33の減衰帯域の下限周波数f33Lは、バンドAの下限周波数よりも低く、バンドBの下限周波数よりも低い。なお、フィルタ33の減衰帯域は、バンドAの一部のみを含んでもよく、バンドAを含まなくてもよい。つまり、フィルタ33の減衰帯域の下限周波数f33Lは、バンドAの下限周波数よりも高くてもよく、バンドAの上限周波数よりも高くてもよい。また、フィルタ33の減衰帯域は、バンドBの一部のみを含んでもよい。つまり、フィルタ33の減衰帯域の下限周波数f33Lは、バンドBの下限周波数よりも高くてもよい。 The filter 33 is a low-pass filter and has an attenuation band including bands A and B as shown in FIG. 3A. The lower limit frequency f33L of the attenuation band of the filter 33 is lower than the lower limit frequency of band A and lower than the lower limit frequency of band B. Note that the attenuation band of the filter 33 may include only a part of band A, or may not include band A. That is, the lower limit frequency f33L of the attenuation band of the filter 33 may be higher than the lower limit frequency of band A, and may be higher than the upper limit frequency of band A. Further, the attenuation band of the filter 33 may include only part of the band B. That is, the lower limit frequency f33L of the attenuation band of the filter 33 may be higher than the lower limit frequency of band B.
 フィルタ34は、ローパスフィルタであり、図3Bに示すようにバンドA及びBを含む減衰帯域を有する。フィルタ34の減衰帯域の下限周波数f34Lは、バンドAの下限周波数よりも低く、バンドBの下限周波数よりも低い。なお、フィルタ34の減衰帯域は、バンドAの一部のみを含んでもよく、バンドAを含まなくてもよい。つまり、フィルタ34の減衰帯域の下限周波数f34Lは、バンドAの下限周波数よりも高くてもよく、バンドAの上限周波数よりも高くてもよい。また、フィルタ34の減衰帯域は、バンドBの一部のみを含んでもよい。つまり、フィルタ34の減衰帯域の下限周波数f34Lは、バンドBの下限周波数よりも高くてもよい。 The filter 34 is a low-pass filter and has an attenuation band including bands A and B as shown in FIG. 3B. The lower limit frequency f34L of the attenuation band of the filter 34 is lower than the lower limit frequency of band A and lower than the lower limit frequency of band B. Note that the attenuation band of the filter 34 may include only a part of band A, or may not include band A. That is, the lower limit frequency f34L of the attenuation band of the filter 34 may be higher than the lower limit frequency of band A, and may be higher than the upper limit frequency of band A. Further, the attenuation band of the filter 34 may include only part of the band B. That is, the lower limit frequency f34L of the attenuation band of the filter 34 may be higher than the lower limit frequency of band B.
 [1.5 高周波回路1の実装例]
 次に、高周波回路1の実装例について図4~図6を参照しながら説明する。図4は、本実施の形態の実装例に係る高周波回路1の平面図である。図5は、本実施の形態の実装例に係る高周波回路1の平面図であり、z軸正側からモジュール基板90の主面90b側を透視した図である。図6は、本実施の形態の実装例に係る高周波回路1の断面図である。図6における高周波回路1の断面は、図4及び図5のvi-vi線における断面である。
[1.5 Implementation example of high frequency circuit 1]
Next, implementation examples of the high frequency circuit 1 will be described with reference to FIGS. 4 to 6. FIG. 4 is a plan view of the high frequency circuit 1 according to the implementation example of this embodiment. FIG. 5 is a plan view of the high frequency circuit 1 according to the mounting example of the present embodiment, and is a transparent view of the main surface 90b side of the module board 90 from the positive side of the z-axis. FIG. 6 is a cross-sectional view of the high frequency circuit 1 according to the implementation example of this embodiment. The cross section of the high frequency circuit 1 in FIG. 6 is the cross section taken along the vi-vi line in FIGS. 4 and 5.
 図4~図6において、モジュール基板90に配置された複数の部品をそれぞれ接続する配線の図示が一部を除いて省略されている。図4において、モジュール基板90の主面90aを覆う樹脂部材91及び金属電極層93の図示が省略されている。なお、図4~図6では、各回路部品の配置関係が容易に理解できるように、各回路部品にその機能を表す略称(「PA」など)が付されている場合があるが、実際の各回路部品には、当該略称は付されなくてもよい。 In FIGS. 4 to 6, illustrations of wiring connecting each of the plurality of components arranged on the module board 90 are omitted except for some parts. In FIG. 4, illustration of the resin member 91 and the metal electrode layer 93 that cover the main surface 90a of the module board 90 is omitted. In addition, in Figures 4 to 6, each circuit component may be given an abbreviation (such as "PA") that indicates its function so that the arrangement relationship of each circuit component can be easily understood, but the actual The abbreviation does not need to be given to each circuit component.
 高周波回路1は、図1に示された回路素子が構成された回路部品に加えて、さらに、モジュール基板90と、樹脂部材91と、金属電極層93と、複数のランド電極150と、を備える。 In addition to the circuit components in which the circuit elements shown in FIG. .
 モジュール基板90は、互いに対向する主面90a及び90bを有する。モジュール基板90は、その内部に配線層、グランド層及びビア導体を含む。モジュール基板90としては、例えば、複数の誘電体層の積層構造を有する低温同時焼成セラミックス(LTCC:Low Temperature Co-fired Ceramics)基板もしくは高温同時焼成セラミックス(HTCC:High Temperature Co-fired Ceramics)基板、部品内蔵基板、再配線層(RDL:Redistribution Layer)を有する基板、又は、プリント基板等を用いることができるが、これらに限定されない。 The module board 90 has main surfaces 90a and 90b facing each other. Module board 90 includes a wiring layer, a ground layer, and a via conductor therein. As the module substrate 90, for example, a low temperature co-fired ceramics (LTCC) substrate or a high temperature co-fired ceramics (HTCC) substrate having a laminated structure of a plurality of dielectric layers, A component-embedded board, a board having a redistribution layer (RDL), a printed circuit board, or the like can be used, but the present invention is not limited to these.
 電力増幅器11及び12(PA)は、図4に示すように主面90a上に配置されている。電力増幅器11及び12の各々は、例えばガリウムヒ素(GaAs)、シリコンゲルマニウム(SiGe)及び窒化ガリウム(GaN)のうちの少なくとも1つで構成され得る。なお、電力増幅器11及び12の一部は、CMOS(Complementary Metal Oxide Semiconductor)を用いて構成されてもよく、具体的にはSOI(Silicon on Insulator)プロセスにより製造されてもよい。 The power amplifiers 11 and 12 (PA) are arranged on the main surface 90a as shown in FIG. 4. Each of power amplifiers 11 and 12 may be constructed of, for example, at least one of gallium arsenide (GaAs), silicon germanium (SiGe), and gallium nitride (GaN). Note that a portion of the power amplifiers 11 and 12 may be configured using CMOS (Complementary Metal Oxide Semiconductor), and specifically may be manufactured using an SOI (Silicon on Insulator) process.
 低雑音増幅器21及び22(LNA)を含む集積回路20は、図4に示すように主面90a上に配置されている。集積回路20は、例えばCMOSを用いて構成され、具体的にはSOIプロセスにより製造される。なお、集積回路20は、CMOSに限定されない。 The integrated circuit 20 including the low noise amplifiers 21 and 22 (LNA) is arranged on the main surface 90a as shown in FIG. 4. The integrated circuit 20 is configured using, for example, CMOS, and specifically manufactured by an SOI process. Note that the integrated circuit 20 is not limited to CMOS.
 フィルタ31及び32(BPF)は、図4に示すように主面90a上に配置されている。フィルタ31及び32の各々は、弾性表面波(SAW:Surface Acoustic Wave)フィルタ、バルク弾性波(BAW:Bulk Acoustic Wave)フィルタ、LC共振フィルタ、及び、誘電体フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filters 31 and 32 (BPF) are arranged on the main surface 90a as shown in FIG. Each of the filters 31 and 32 may be configured using any of a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, an LC resonance filter, and a dielectric filter. In addition, it is not limited to these.
 フィルタ33及び34(LPF)は、図4に示すように主面90a上に配置されている。フィルタ33及び34の各々は、SAWフィルタ、BAWフィルタ、LCフィルタ、及び、誘電体フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filters 33 and 34 (LPF) are arranged on the main surface 90a as shown in FIG. 4. Each of the filters 33 and 34 may be configured using any of a SAW filter, a BAW filter, an LC filter, and a dielectric filter, and is not limited to these.
 キャパシタ41及び42(C)は、図4に示すように主面90a上に配置されている。具体的には、キャパシタ41は、フィルタ33の近傍に配置され、かつ、電力増幅器11の近傍に配置されている。これにより、電源ラインP1の配線長を短縮することができ、配線による抵抗損失を低減することができる。また、キャパシタ42は、フィルタ34の近傍に配置され、かつ、電力増幅器12の近傍に配置されている。これにより、電源ラインP2の配線長を短縮することができ、配線による抵抗損失を低減することができる。 The capacitors 41 and 42 (C) are arranged on the main surface 90a as shown in FIG. 4. Specifically, capacitor 41 is placed near filter 33 and near power amplifier 11 . Thereby, the wiring length of the power supply line P1 can be shortened, and resistance loss due to the wiring can be reduced. Further, the capacitor 42 is arranged near the filter 34 and also near the power amplifier 12. Thereby, the wiring length of the power supply line P2 can be shortened, and resistance loss due to the wiring can be reduced.
 キャパシタ41及び42は、チップキャパシタとして実装されている。チップキャパシタとは、キャパシタを含む表面実装デバイス(SMD:Surface Mount Device)である。なお、キャパシタ41及び42は、チップキャパシタに限定されない。 The capacitors 41 and 42 are mounted as chip capacitors. A chip capacitor is a surface mount device (SMD) that includes a capacitor. Note that the capacitors 41 and 42 are not limited to chip capacitors.
 スイッチ51~53(SW)を含む集積回路50は、図4に示すように主面90a上に配置されている。集積回路50は、例えば直列接続された複数のMOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)などを含む。MOSFETの直列接続の段数は、必要な耐電圧に応じて決定されればよく、特に限定されない。 The integrated circuit 50 including the switches 51 to 53 (SW) is arranged on the main surface 90a as shown in FIG. The integrated circuit 50 includes, for example, a plurality of MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) connected in series. The number of MOSFETs connected in series may be determined depending on the required withstand voltage and is not particularly limited.
 PA制御回路61(PAC)は、図4に示すように主面90a上に配置されている。具体的には、PA制御回路61は、電力増幅器11及び12の間に配置されている。PA制御回路61は、例えばCMOSを用いて構成され、具体的にはSOIプロセスにより製造される。なお、PA制御回路61は、CMOSに限定されない。 The PA control circuit 61 (PAC) is arranged on the main surface 90a as shown in FIG. Specifically, PA control circuit 61 is placed between power amplifiers 11 and 12. The PA control circuit 61 is configured using, for example, CMOS, and specifically manufactured by an SOI process. Note that the PA control circuit 61 is not limited to CMOS.
 複数のランド電極150は、図5に示すように主面90b上に配置されている。複数のランド電極150は、図1に示したアンテナ接続端子101及び102、高周波入力端子111及び112、高周波出力端子121及び122、電源端子131、並びに、制御端子141に加えてグランド端子を含む複数の外部接続端子として機能する。複数のランド電極150の各々は、高周波回路1のz軸負方向に配置されたマザー基板上の入出力端子及び/又はグランド端子等に接合される。複数のランド電極150としては、銅電極を用いることができるが、これに限定されない。例えば、複数のランド電極150として、はんだ電極が用いられてもよい。また、複数のランド電極150の代わりに、複数のバンプ電極が用いられてもよい。 The plurality of land electrodes 150 are arranged on the main surface 90b as shown in FIG. The plurality of land electrodes 150 include a ground terminal in addition to the antenna connection terminals 101 and 102, high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, power supply terminal 131, and control terminal 141 shown in FIG. Functions as an external connection terminal. Each of the plurality of land electrodes 150 is connected to an input/output terminal and/or a ground terminal on a motherboard arranged in the negative direction of the z-axis of the high frequency circuit 1. Copper electrodes can be used as the plurality of land electrodes 150, but are not limited thereto. For example, solder electrodes may be used as the plurality of land electrodes 150. Further, instead of the plurality of land electrodes 150, a plurality of bump electrodes may be used.
 電源端子131として機能するランド電極150の少なくとも一部は、モジュール基板90の平面視において、フィルタ33の少なくとも一部と重なっている。これにより、図6に示すように、電源ラインP1の配線長を短縮することができ、配線による抵抗損失を低減することができる。 At least a portion of the land electrode 150 functioning as the power supply terminal 131 overlaps with at least a portion of the filter 33 when the module substrate 90 is viewed from above. Thereby, as shown in FIG. 6, the wiring length of the power supply line P1 can be shortened, and the resistance loss due to the wiring can be reduced.
 樹脂部材91は、図6に示すように主面90aと主面90a上の回路部品とを覆っている。樹脂部材91の材料としては、例えばエポキシ樹脂を用いることができる。なお、樹脂部材91の材料は、エポキシ樹脂に限定されない。樹脂部材91は、主面90a上の回路部品の機械強度及び耐湿性等の信頼性を確保する機能を有する。なお、樹脂部材91は、必ずしも高周波回路1に含まれなくてもよい。 The resin member 91 covers the main surface 90a and the circuit components on the main surface 90a, as shown in FIG. As a material for the resin member 91, for example, epoxy resin can be used. Note that the material of the resin member 91 is not limited to epoxy resin. The resin member 91 has a function of ensuring reliability such as mechanical strength and moisture resistance of the circuit components on the main surface 90a. Note that the resin member 91 does not necessarily have to be included in the high frequency circuit 1.
 金属電極層93は、例えばスパッタ法により形成された金属薄膜である。金属電極層93は、図6に示すように樹脂部材91の表面(上面及び側面)を覆うように形成されている。金属電極層93は、グランドに接続され、シールド電極として機能する。つまり、金属電極層93は、外来ノイズが高周波回路1に侵入すること、及び、高周波回路1で発生したノイズが他のモジュール又は他の機器に干渉することを抑制する。なお、金属電極層93は、高周波回路1に含まれなくてもよい。 The metal electrode layer 93 is a metal thin film formed by, for example, a sputtering method. The metal electrode layer 93 is formed to cover the surface (upper surface and side surfaces) of the resin member 91, as shown in FIG. Metal electrode layer 93 is connected to ground and functions as a shield electrode. That is, the metal electrode layer 93 suppresses external noise from entering the high-frequency circuit 1 and suppresses noise generated in the high-frequency circuit 1 from interfering with other modules or other equipment. Note that the metal electrode layer 93 does not need to be included in the high frequency circuit 1.
 なお、図4~図6の高周波回路1の実装は一例であり、これに限定されない。例えば、いくつかの回路部品は、モジュール基板90の主面90bに配置されてもよく、モジュール基板90内に配置されてもよい。 Note that the implementation of the high frequency circuit 1 in FIGS. 4 to 6 is an example, and the implementation is not limited thereto. For example, some circuit components may be placed on the main surface 90b of the module board 90 or may be placed within the module board 90.
 [1.6 高周波回路1における増幅方法]
 以上のように構成された高周波回路1における増幅方法について、図7を参照しながら説明する。図7は、本実施の形態に係る高周波回路1による増幅方法を示すフローチャートである。
[1.6 Amplification method in high frequency circuit 1]
An amplification method in the high frequency circuit 1 configured as above will be explained with reference to FIG. FIG. 7 is a flowchart showing an amplification method by the high frequency circuit 1 according to the present embodiment.
 まず、電力増幅器11は、電源ラインP1(第1電源ライン)を介して電源電圧(第1電源電圧)を受ける(S101)。電力増幅器11は、受けた電源電圧を用いてバンドAの送信信号を増幅する(S102)。フィルタ33は、バンドAの送信信号の増幅により発生したバンドBのノイズを電源ラインP1において減衰する(S103)。 First, the power amplifier 11 receives a power supply voltage (first power supply voltage) via the power supply line P1 (first power supply line) (S101). The power amplifier 11 amplifies the band A transmission signal using the received power supply voltage (S102). The filter 33 attenuates band B noise generated by the amplification of the band A transmission signal in the power supply line P1 (S103).
 さらに、電力増幅器12は、電源ラインP2(第2電源ライン)を介して電源電圧(第2電源電圧)を受ける(S104)。電力増幅器12は、受けた電源電圧を用いてバンドBの送信信号を増幅する(S105)。フィルタ34は、バンドBの送信信号の増幅により発生したバンドAのノイズを電源ラインP2において減衰する(S106)。 Furthermore, the power amplifier 12 receives the power supply voltage (second power supply voltage) via the power supply line P2 (second power supply line) (S104). The power amplifier 12 amplifies the transmission signal of band B using the received power supply voltage (S105). The filter 34 attenuates band A noise generated by the amplification of the band B transmission signal in the power supply line P2 (S106).
 なお、図7において、ステップS104~S106は、ステップS101~S103の後に実行されているが、本発明に係る増幅方法は、これに限定されない。例えば、ステップS104~S106は、ステップS101~S103の前に実行されてもよいし、ステップS101~S103と並列に実行されてもよい。また、ステップS104~S106は、実行されなくてもよい。 Note that in FIG. 7, steps S104 to S106 are executed after steps S101 to S103, but the amplification method according to the present invention is not limited to this. For example, steps S104 to S106 may be executed before steps S101 to S103, or may be executed in parallel with steps S101 to S103. Further, steps S104 to S106 may not be executed.
 [1.7 効果など]
 以上のように、本実施の形態に係る高周波回路1は、電力増幅器11と、電力増幅器11に接続され、バンドBと同時送信可能なバンドAを含む通過帯域を有するフィルタ31と、電力増幅器11に供給される電源電圧を受ける電源端子131と、電源端子131と電力増幅器11との間に接続されるフィルタ33と、を備え、フィルタ33は、バンドBの少なくとも一部を含む減衰帯域を有する。
[1.7 Effects etc.]
As described above, the high frequency circuit 1 according to the present embodiment includes the power amplifier 11, the filter 31 that is connected to the power amplifier 11 and has a pass band including band A that can transmit simultaneously with band B, and the power amplifier 11. a power supply terminal 131 receiving a power supply voltage supplied to the power amplifier 11; and a filter 33 connected between the power supply terminal 131 and the power amplifier 11, the filter 33 having an attenuation band including at least a part of band B. .
 これによれば、電源端子131と電力増幅器11との間に接続されるフィルタ33の減衰帯域にバンドBの少なくとも一部が含まれる。したがって、電力増幅器11においてバンドAの送信信号を増幅するときに発生するバンドBのノイズが電源ラインP1及びP2を介して電力増幅器12に侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドBの送信信号の品質劣化を抑制することができる。 According to this, at least part of the band B is included in the attenuation band of the filter 33 connected between the power supply terminal 131 and the power amplifier 11. Therefore, it is possible to suppress band B noise generated when the power amplifier 11 amplifies the band A transmission signal from entering the power amplifier 12 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
 また例えば、本実施の形態に係る高周波回路1において、フィルタ33の減衰帯域は、さらに、バンドAの少なくとも一部を含んでもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the attenuation band of the filter 33 may further include at least a portion of the band A.
 これによれば、電源端子131と電力増幅器11との間に接続されるフィルタ33の減衰帯域にバンドAの少なくとも一部が含まれる。したがって、電力増幅器12においてバンドBの送信信号を増幅するときに発生するバンドAのノイズが電源ラインP1及びP2を介して電力増幅器11に侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドAの送信信号の品質劣化を抑制することができる。 According to this, at least a portion of the band A is included in the attenuation band of the filter 33 connected between the power supply terminal 131 and the power amplifier 11. Therefore, it is possible to suppress band A noise generated when the power amplifier 12 amplifies the band B transmission signal from entering the power amplifier 11 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B.
 また例えば、本実施の形態に係る高周波回路1は、さらに、フィルタ33及び電力増幅器11の間の経路とグランドとの間に接続されるキャパシタ41を備えてもよい。 For example, the high frequency circuit 1 according to the present embodiment may further include a capacitor 41 connected between the path between the filter 33 and the power amplifier 11 and the ground.
 これによれば、フィルタ33及び電力増幅器11の間の経路とグランドとの間にキャパシタ41が接続される。したがって、フィルタ33が電力増幅器11のインピーダンスに与える影響を低減することができ、フィルタ33の設計をより容易にするとともに、フィルタ33による電力増幅器11の特性の劣化を抑制することができる。 According to this, the capacitor 41 is connected between the path between the filter 33 and the power amplifier 11 and the ground. Therefore, the influence of the filter 33 on the impedance of the power amplifier 11 can be reduced, making it easier to design the filter 33, and suppressing deterioration of the characteristics of the power amplifier 11 due to the filter 33.
 また例えば、本実施の形態に係る高周波回路1は、さらに、電力増幅器11、フィルタ31及び33が実装され、電源端子131を含むモジュール基板90を備えてもよい。 Furthermore, for example, the high frequency circuit 1 according to the present embodiment may further include a module board 90 on which the power amplifier 11 and filters 31 and 33 are mounted, and includes a power supply terminal 131.
 これによれば、フィルタ33を電力増幅器11及びフィルタ31と同一のモジュール基板90に実装することができ、フィルタ33及び電力増幅器11間の配線長の短縮を図ることができ、通信装置6の小型化に貢献することもできる。 According to this, the filter 33 can be mounted on the same module board 90 as the power amplifier 11 and the filter 31, the wiring length between the filter 33 and the power amplifier 11 can be shortened, and the communication device 6 can be made smaller. You can also contribute to the
 また例えば、本実施の形態に係る高周波回路1において、フィルタ33の入力インピーダンスは、フィルタ31の入力インピーダンスよりも低くてもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the input impedance of the filter 33 may be lower than the input impedance of the filter 31.
 これによれば、高周波信号ライン上のフィルタ31よりも入力インピーダンスが低くなるようにフィルタ33を構成することができ、フィルタ33による電力増幅器11の特性の劣化を抑制することができる。 According to this, the filter 33 can be configured to have a lower input impedance than the filter 31 on the high frequency signal line, and deterioration of the characteristics of the power amplifier 11 due to the filter 33 can be suppressed.
 また例えば、本実施の形態に係る高周波回路1において、フィルタ33は、ローパスフィルタであってもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the filter 33 may be a low-pass filter.
 これによれば、フィルタ33の設計をより容易にすることができ、バンドA及び/又はBの高調波を減衰することもできる。 According to this, the design of the filter 33 can be made easier, and harmonics of bands A and/or B can also be attenuated.
 また例えば、本実施の形態に係る高周波回路1は、電力増幅器12と、電力増幅器12に接続され、バンドBを含む通過帯域を有するフィルタ32と、電力増幅器12に供給される電源電圧を受ける電源端子131と、電源端子131と電力増幅器12との間に接続されるフィルタ34と、を備えてもよく、フィルタ34は、バンドAの少なくとも一部及びバンドBの少なくとも一部のうちの少なくとも一方を含む減衰帯域を有してもよい。 For example, the high frequency circuit 1 according to the present embodiment includes a power amplifier 12, a filter 32 connected to the power amplifier 12 and having a passband including band B, and a power supply that receives a power supply voltage supplied to the power amplifier 12. The filter 34 may include a terminal 131 and a filter 34 connected between the power supply terminal 131 and the power amplifier 12, and the filter 34 may include at least one of at least a portion of band A and at least a portion of band B. It may have an attenuation band including.
 これによれば、電源端子131と電力増幅器12との間に接続されるフィルタ34の減衰帯域にバンドAの少なくとも一部及びバンドBの少なくとも一部のうちの少なくとも一方が含まれる。したがって、バンドAのノイズが電源ラインP1及びP2を介して電力増幅器11に侵入することを抑制する、又は、バンドBのノイズが電源ラインP2を介して電力増幅器12に侵入することを抑制することができる。 According to this, the attenuation band of the filter 34 connected between the power supply terminal 131 and the power amplifier 12 includes at least one of at least a portion of the band A and at least a portion of the band B. Therefore, it is possible to suppress band A noise from entering the power amplifier 11 via the power lines P1 and P2, or suppress band B noise from entering the power amplifier 12 via the power line P2. I can do it.
 また例えば、本実施の形態に係る高周波回路1において、フィルタ34の減衰帯域は、バンドAの少なくとも一部を含んでもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the attenuation band of the filter 34 may include at least a part of the band A.
 これによれば、電源端子131と電力増幅器12との間に接続されるフィルタ34の減衰帯域にバンドAの少なくとも一部が含まれる。したがって、電力増幅器12においてバンドBの送信信号を増幅するときに発生するバンドAのノイズが電源ラインP1及びP2を介して電力増幅器11に侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドAの送信信号の品質劣化を抑制することができる。 According to this, at least part of the band A is included in the attenuation band of the filter 34 connected between the power supply terminal 131 and the power amplifier 12. Therefore, it is possible to suppress band A noise generated when the power amplifier 12 amplifies the band B transmission signal from entering the power amplifier 11 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B.
 また例えば、本実施の形態に係る高周波回路1において、フィルタ34の減衰帯域は、バンドBの少なくとも一部を含んでもよい。 Further, for example, in the high frequency circuit 1 according to the present embodiment, the attenuation band of the filter 34 may include at least a part of the band B.
 これによれば、電源端子131と電力増幅器12との間に接続されるフィルタ34の減衰帯域にバンドBの少なくとも一部が含まれる。したがって、電力増幅器11においてバンドAの送信信号を増幅するときに発生するバンドBのノイズが電源ラインP1及びP2を介して電力増幅器12に侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドBの送信信号の品質劣化を抑制することができる。 According to this, at least a portion of band B is included in the attenuation band of the filter 34 connected between the power supply terminal 131 and the power amplifier 12. Therefore, it is possible to suppress band B noise generated when the power amplifier 11 amplifies the band A transmission signal from entering the power amplifier 12 via the power lines P1 and P2. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
 また例えば、本実施の形態に係る高周波回路1は、さらに、フィルタ34及び電力増幅器12の間の経路とグランドとの間に接続されるキャパシタ42を備えてもよい。 For example, the high frequency circuit 1 according to the present embodiment may further include a capacitor 42 connected between the path between the filter 34 and the power amplifier 12 and the ground.
 これによれば、フィルタ34及び電力増幅器12の間の経路とグランドとの間にキャパシタ42が接続される。したがって、フィルタ34が電力増幅器12のインピーダンスに与える影響を低減することができ、フィルタ34の設計をより容易にするとともに、フィルタ34による電力増幅器11の特性の劣化を抑制することができる。 According to this, the capacitor 42 is connected between the path between the filter 34 and the power amplifier 12 and the ground. Therefore, the influence of the filter 34 on the impedance of the power amplifier 12 can be reduced, making it easier to design the filter 34, and suppressing deterioration of the characteristics of the power amplifier 11 due to the filter 34.
 また例えば、本実施の形態に係る高周波回路1は、電力増幅器11及び12並びにフィルタ31~34が実装され、電源端子131を含むモジュール基板90を備えてもよい。 Furthermore, for example, the high frequency circuit 1 according to the present embodiment may include a module board 90 on which the power amplifiers 11 and 12 and filters 31 to 34 are mounted and includes a power supply terminal 131.
 これによれば、フィルタ33及び34を電力増幅器11及び12並びにフィルタ31及び32と同一のモジュール基板90に実装することができ、フィルタ33及び電力増幅器11間の配線長とフィルタ34及び電力増幅器12間の配線長の短縮を図ることができ、通信装置6の小型化に貢献することもできる。 According to this, the filters 33 and 34 can be mounted on the same module board 90 as the power amplifiers 11 and 12 and the filters 31 and 32, and the wiring length between the filter 33 and the power amplifier 11 can be It is possible to shorten the wiring length between the terminals and contribute to miniaturization of the communication device 6.
 また例えば、本実施の形態に係る高周波回路1において、フィルタ34の入力インピーダンスは、フィルタ32の入力インピーダンスよりも低くてもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the input impedance of the filter 34 may be lower than the input impedance of the filter 32.
 これによれば、高周波信号ライン上のフィルタ32よりも入力インピーダンスが低くなるようにフィルタ34を構成することができ、フィルタ34による電力増幅器12の特性の劣化を抑制することができる。 According to this, the filter 34 can be configured to have a lower input impedance than the filter 32 on the high frequency signal line, and deterioration of the characteristics of the power amplifier 12 due to the filter 34 can be suppressed.
 また例えば、本実施の形態に係る高周波回路1において、フィルタ34は、ローパスフィルタであってもよい。 Furthermore, for example, in the high frequency circuit 1 according to the present embodiment, the filter 34 may be a low-pass filter.
 これによれば、フィルタ34の設計をより容易にすることができ、バンドA及び/又はBの高調波を減衰することもできる。 According to this, the design of the filter 34 can be made easier, and harmonics of bands A and/or B can also be attenuated.
 また例えば、本実施の形態に係る高周波回路1において、電力増幅器11に供給される電源電圧を受ける電源端子と電力増幅器12に供給される電源電圧を受ける電源端子とは、同一の電源端子131であってもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the power supply terminal that receives the power supply voltage supplied to the power amplifier 11 and the power supply terminal that receives the power supply voltage supplied to the power amplifier 12 are the same power supply terminal 131. There may be.
 これによれば、電源ラインP1及びP2が電源端子131で接続されるので、電源ラインP1及びP2を介して電力増幅器11及び12にノイズが侵入する可能性が高くなる。したがって、フィルタ33及び34によるノイズの減衰がより効果的となる。 According to this, since the power supply lines P1 and P2 are connected at the power supply terminal 131, there is a high possibility that noise will enter the power amplifiers 11 and 12 via the power supply lines P1 and P2. Therefore, noise attenuation by the filters 33 and 34 becomes more effective.
 また例えば、本実施の形態に係る高周波回路1において、バンドA及びBは、隣接する異なる2つの周波数バンドであってもよい。 For example, in the high frequency circuit 1 according to the present embodiment, bands A and B may be two different adjacent frequency bands.
 これによれば、バンドA及びBが隣接するので、バンドAの増幅においてバンドBのノイズが増加し、バンドBの増幅においてバンドAのノイズが増加する。したがって、フィルタ33及び34によって電源ラインP1及びP2上のノイズを減衰することによる送信信号の品質劣化の抑制効果はより大きくなる。 According to this, since bands A and B are adjacent to each other, noise in band B increases when band A is amplified, and noise in band A increases when band B is amplified. Therefore, the effect of suppressing the quality deterioration of the transmitted signal by attenuating the noise on the power supply lines P1 and P2 by the filters 33 and 34 becomes greater.
 また例えば、本実施の形態に係る高周波回路1において、バンドAは、5GNRのためのn77であってもよく、バンドBは、5GNRのためのn79であってもよい。 For example, in the high frequency circuit 1 according to the present embodiment, band A may be n77 for 5GNR, and band B may be n79 for 5GNR.
 これによれば、5GNRのためのn77及びn79の同時送信においてn77及びn79の送信信号の品質劣化を抑制することができる。 According to this, it is possible to suppress quality deterioration of the transmission signals of n77 and n79 in simultaneous transmission of n77 and n79 for 5GNR.
 また例えば、本実施の形態に係る高周波回路1において、電力増幅器11及び12に供給される電源電圧は、APTモード、SPTモード又はD-ETモードで調整されてもよい。 For example, in the high frequency circuit 1 according to the present embodiment, the power supply voltage supplied to the power amplifiers 11 and 12 may be adjusted in APT mode, SPT mode, or D-ET mode.
 これによれば、電力増幅器11及び12の効率を向上させることができる。 According to this, the efficiency of the power amplifiers 11 and 12 can be improved.
 また、本実施の形態に係る増幅方法は、電源ラインP1を介して電源電圧を受け(S101)、受けた電源電圧を用いて、バンドBと同時送信可能なバンドAの送信信号を増幅し(S102)、バンドAの送信信号の増幅により発生したバンドBのノイズを電源ラインP1において減衰する(S103)。 Further, the amplification method according to the present embodiment receives a power supply voltage via the power supply line P1 (S101), and uses the received power supply voltage to amplify a transmission signal of band A that can be transmitted simultaneously with band B ( S102), band B noise generated by the amplification of the band A transmission signal is attenuated in the power supply line P1 (S103).
 これによれば、電力増幅器11においてバンドAの送信信号を増幅するときに発生したバンドBのノイズが電源ラインP1において減衰されるので、電源ラインP1を介してバンドBの送信信号を増幅する電力増幅器12にノイズが侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドBの送信信号の品質劣化を抑制することができる。 According to this, the band B noise generated when the band A transmission signal is amplified in the power amplifier 11 is attenuated in the power supply line P1, so that the power to amplify the band B transmission signal via the power supply line P1 is It is possible to suppress noise from entering the amplifier 12. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
 また例えば、本実施の形態に係る増幅方法は、さらに、電源ラインP2を介して電源電圧を受け(S104)、電源ラインP2を介して受けた電源電圧を用いて、バンドAと同時送信可能なバンドBの送信信号を増幅し(S105)、バンドBの送信信号の増幅により発生したバンドAのノイズを電源ラインP2において減衰してもよい(S106)。 For example, the amplification method according to the present embodiment further receives a power supply voltage via the power line P2 (S104), and enables simultaneous transmission with band A using the power supply voltage received via the power line P2. The transmission signal of band B may be amplified (S105), and the noise of band A generated by the amplification of the transmission signal of band B may be attenuated in the power supply line P2 (S106).
 これによれば、電力増幅器12においてバンドBの送信信号を増幅するときに発生したバンドAのノイズが電源ラインP2において減衰されるので、電源ラインP2を介してバンドAの送信信号を増幅する電力増幅器11にノイズが侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドAの送信信号の品質劣化を抑制することができる。 According to this, the band A noise generated when the power amplifier 12 amplifies the band B transmission signal is attenuated in the power supply line P2, so the power to amplify the band A transmission signal via the power supply line P2 is It is possible to suppress noise from entering the amplifier 11. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B.
 (実施の形態2)
 次に、実施の形態2について説明する。本実施の形態では、ローパスフィルタの代わりにバンドエリミネーションフィルタが用いられる点と、2つの電源端子を備える点と、が上記実施の形態1と主として異なる。以下に、本実施の形態について、上記実施の形態1と異なる点を中心に説明する。
(Embodiment 2)
Next, a second embodiment will be described. This embodiment differs from the first embodiment mainly in that a band elimination filter is used instead of a low-pass filter and that two power supply terminals are provided. The present embodiment will be described below, focusing on the differences from the first embodiment.
 [2.1 通信装置6Aの回路構成]
 まず、通信装置6Aの回路構成について図8を参照しながら説明する。図8は、本実施の形態に係る通信装置6Aの回路構成図である。通信装置6Aは、高周波回路1Aと、アンテナ2a及び2bと、RFIC3と、BBIC4と、電圧供給回路5Aと、を備える。
[2.1 Circuit configuration of communication device 6A]
First, the circuit configuration of the communication device 6A will be described with reference to FIG. FIG. 8 is a circuit configuration diagram of a communication device 6A according to this embodiment. The communication device 6A includes a high frequency circuit 1A, antennas 2a and 2b, an RFIC 3, a BBIC 4, and a voltage supply circuit 5A.
 高周波回路1Aは、アンテナ2a及び2bとRFIC3との間で高周波信号を伝送する。高周波回路1Aの内部構成については後述する。 The high frequency circuit 1A transmits high frequency signals between the antennas 2a and 2b and the RFIC 3. The internal configuration of the high frequency circuit 1A will be described later.
 電圧供給回路5Aは、高周波回路1Aに電源電圧を供給することができる。本実施の形態では、電圧供給回路5Aは、APTモード又はSPTモード、又は、D-ETモードが適用された第1電源電圧及び第2電源電圧を高周波回路1Aに供給することができる。 The voltage supply circuit 5A can supply a power supply voltage to the high frequency circuit 1A. In this embodiment, the voltage supply circuit 5A can supply the first power supply voltage and the second power supply voltage to which the APT mode, SPT mode, or D-ET mode is applied to the high frequency circuit 1A.
 なお、図8に表された通信装置6Aの回路構成は、例示であり、これに限定されない。例えば、通信装置6Aは、アンテナ2a、アンテナ2b、BBIC4、又は、これらの任意の組み合わせを含まなくてもよい。また例えば、通信装置6Aは、3以上のアンテナを含んでもよい。 Note that the circuit configuration of the communication device 6A shown in FIG. 8 is an example and is not limited thereto. For example, the communication device 6A may not include the antenna 2a, the antenna 2b, the BBIC 4, or any combination thereof. For example, the communication device 6A may include three or more antennas.
 [2.2 高周波回路1Aの回路構成]
 次に、高周波回路1Aの回路構成について図8を参照しながら説明する。高周波回路1Aは、電力増幅器11及び12と、低雑音増幅器21及び22と、フィルタ31、32、33A及び34Aと、キャパシタ41及び42と、スイッチ51~53と、PA制御回路61と、アンテナ接続端子101及び102と、高周波入力端子111及び112と、高周波出力端子121及び122と、電源端子131A及び132Aと、制御端子141と、を備える。
[2.2 Circuit configuration of high frequency circuit 1A]
Next, the circuit configuration of the high frequency circuit 1A will be explained with reference to FIG. The high frequency circuit 1A includes power amplifiers 11 and 12, low noise amplifiers 21 and 22, filters 31, 32, 33A and 34A, capacitors 41 and 42, switches 51 to 53, a PA control circuit 61, and an antenna connection. It includes terminals 101 and 102, high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, power supply terminals 131A and 132A, and control terminal 141.
 電源端子131Aは、第1電源端子の一例である。電源端子131Aは、高周波回路1Aの外部で電圧供給回路5Aに接続され、高周波回路1Aの内部で電力増幅器11に接続される。これにより、電源端子131Aを介して電圧供給回路5Aから受けた電源電圧は、電力増幅器11に供給される。 The power terminal 131A is an example of a first power terminal. The power supply terminal 131A is connected to the voltage supply circuit 5A outside the high frequency circuit 1A, and connected to the power amplifier 11 inside the high frequency circuit 1A. Thereby, the power supply voltage received from the voltage supply circuit 5A via the power supply terminal 131A is supplied to the power amplifier 11.
 電源端子132Aは、第2電源端子の一例である。電源端子132Aは、高周波回路1Aの外部で電圧供給回路5Aに接続され、高周波回路1Aの内部で電力増幅器12に接続される。これにより、電源端子132Aを介して電圧供給回路5Aから受けた電源電圧は、電力増幅器12に供給される。 The power supply terminal 132A is an example of a second power supply terminal. The power supply terminal 132A is connected to the voltage supply circuit 5A outside the high frequency circuit 1A, and connected to the power amplifier 12 inside the high frequency circuit 1A. Thereby, the power supply voltage received from the voltage supply circuit 5A via the power supply terminal 132A is supplied to the power amplifier 12.
 なお、電圧供給回路5Aにおいて、APTモード、SPTモード又はD-ETモードで2つの電源電圧が調整される場合、複数の離散的なレベルの電圧を生成するマルチレベル生成回路が2つの電源電圧で共用され得る。このとき、電源端子131A及び132Aは、マルチレベル生成回路を介して互いに接続される可能性がある。その結果、電源ラインP1上のノイズがマルチレベル生成回路を介して電源ラインP2に伝送されやすくなり、電源ラインP2上のノイズがマルチレベル生成回路を介して電源ラインP1に伝送されやすくなる。このような状況において、フィルタ33A及び34Aによって電源ラインP1及びP2上のノイズを減衰することによる送信信号の品質劣化の抑制効果はより大きくなる。 Note that in the voltage supply circuit 5A, when two power supply voltages are adjusted in APT mode, SPT mode, or D-ET mode, a multilevel generation circuit that generates voltages at a plurality of discrete levels adjusts the two power supply voltages. Can be shared. At this time, power supply terminals 131A and 132A may be connected to each other via a multilevel generation circuit. As a result, noise on the power line P1 is more likely to be transmitted to the power line P2 via the multilevel generation circuit, and noise on the power line P2 is more likely to be transmitted to the power line P1 via the multilevel generation circuit. In such a situation, the filters 33A and 34A attenuate the noise on the power lines P1 and P2, thereby increasing the effect of suppressing quality deterioration of the transmitted signal.
 フィルタ33Aは、第2フィルタの一例であり、電源端子131Aと電力増幅器11との間に接続される。フィルタ33Aは、バンドAの少なくとも一部を含む減衰帯域を有する。これにより、フィルタ33Aは、バンドAのノイズが電源ラインP1を介して電力増幅器11に侵入することを抑制することができる。 The filter 33A is an example of a second filter, and is connected between the power supply terminal 131A and the power amplifier 11. Filter 33A has an attenuation band that includes at least a portion of band A. Thereby, the filter 33A can suppress band A noise from entering the power amplifier 11 via the power supply line P1.
 本実施の形態では、フィルタ33Aは、バンドエリミネーションフィルタであり、例えば弾性波フィルタで構成される。このとき、フィルタ33Aの入力インピーダンスは、フィルタ31の入力インピーダンスよりも低い。したがって、フィルタ33Aでは、低入力インピーダンスに適したフィルタ設計が行われる。 In this embodiment, the filter 33A is a band elimination filter, and is composed of, for example, an elastic wave filter. At this time, the input impedance of the filter 33A is lower than the input impedance of the filter 31. Therefore, the filter 33A has a filter design suitable for low input impedance.
 フィルタ34Aは、第4フィルタの一例であり、電源端子132Aと電力増幅器12との間に接続される。フィルタ34Aは、バンドBの少なくとも一部を含む減衰帯域を有する。これにより、フィルタ34Aは、バンドBのノイズが電源ラインP2を介して電力増幅器12に侵入することを抑制することができる。 The filter 34A is an example of a fourth filter, and is connected between the power supply terminal 132A and the power amplifier 12. Filter 34A has an attenuation band that includes at least a portion of Band B. Thereby, the filter 34A can suppress band B noise from entering the power amplifier 12 via the power supply line P2.
 本実施の形態では、フィルタ34Aは、バンドエリミネーションフィルタであり、例えば弾性波フィルタで構成される。このとき、フィルタ34Aの入力インピーダンスは、フィルタ32の入力インピーダンスよりも低い。したがって、フィルタ34Aでは、低入力インピーダンスに適したフィルタ設計が行われる。 In this embodiment, the filter 34A is a band elimination filter, and is composed of, for example, an elastic wave filter. At this time, the input impedance of the filter 34A is lower than the input impedance of the filter 32. Therefore, the filter 34A has a filter design suitable for low input impedance.
 [2.3 フィルタ33A及び34Aの通過特性]
 次に、フィルタ33A及び34Aの通過特性について図9A及び図9Bを参照しながら説明する。図9Aは、本実施の形態に係るフィルタ33Aの通過特性を示すグラフである。図9Bは、本実施の形態に係るフィルタ34Aの通過特性を示すグラフである。図9A及び図9Bにおいて、横軸は周波数を表し、縦軸は利得を表す。
[2.3 Passage characteristics of filters 33A and 34A]
Next, the pass characteristics of the filters 33A and 34A will be explained with reference to FIGS. 9A and 9B. FIG. 9A is a graph showing the pass characteristics of filter 33A according to this embodiment. FIG. 9B is a graph showing the pass characteristics of filter 34A according to this embodiment. In FIGS. 9A and 9B, the horizontal axis represents frequency, and the vertical axis represents gain.
 フィルタ33Aは、バンドエリミネーションフィルタであり、図9Aに示すようにバンドAを含む減衰帯域を有する。フィルタ33Aの減衰帯域において、下限周波数f33ALは、バンドAの下限周波数よりも低く、上限周波数f33AHは、バンドAの上限周波数よりも高い。なお、フィルタ33Aの減衰帯域は、バンドAの一部のみを含んでもよい。つまり、フィルタ33Aの減衰帯域において、下限周波数f33ALは、バンドAの下限周波数よりも高くてもよい、又は、上限周波数f33AHは、バンドAの上限周波数よりも低くてもよい。 The filter 33A is a band elimination filter and has an attenuation band including band A as shown in FIG. 9A. In the attenuation band of the filter 33A, the lower limit frequency f33AL is lower than the band A lower limit frequency, and the upper limit frequency f33AH is higher than the band A upper limit frequency. Note that the attenuation band of the filter 33A may include only part of the band A. That is, in the attenuation band of the filter 33A, the lower limit frequency f33AL may be higher than the lower limit frequency of band A, or the upper limit frequency f33AH may be lower than the upper limit frequency of band A.
 フィルタ34Aは、バンドエリミネーションフィルタであり、図9Bに示すようにバンドBを含む減衰帯域を有する。フィルタ34Aの減衰帯域において、下限周波数f34ALは、バンドBの下限周波数よりも低く、上限周波数f34AHは、バンドBの上限周波数よりも高い。なお、フィルタ34Aの減衰帯域は、バンドBの一部のみを含んでもよい。つまり、フィルタ34Aの減衰帯域において、下限周波数f34ALは、バンドBの下限周波数よりも高くてもよい、又は、上限周波数f34AHは、バンドBの上限周波数よりも低くてもよい。 The filter 34A is a band elimination filter and has an attenuation band including band B as shown in FIG. 9B. In the attenuation band of the filter 34A, the lower limit frequency f34AL is lower than the band B lower limit frequency, and the upper limit frequency f34AH is higher than the band B upper limit frequency. Note that the attenuation band of the filter 34A may include only part of the band B. That is, in the attenuation band of the filter 34A, the lower limit frequency f34AL may be higher than the lower limit frequency of band B, or the upper limit frequency f34AH may be lower than the upper limit frequency of band B.
 なお、本実施の形態において、フィルタ33Aの減衰帯域は、バンドAの少なくとも一部に加えてバンドBの少なくとも一部を含んでもよい。また、フィルタ34Aの減衰帯域は、バンドBの少なくとも一部に加えてバンドAの少なくとも一部を含んでもよい。 Note that in this embodiment, the attenuation band of the filter 33A may include at least a portion of the band B in addition to at least a portion of the band A. Further, the attenuation band of the filter 34A may include at least a portion of band A in addition to at least a portion of band B.
 [2.4 高周波回路1Aの実装例]
 次に、高周波回路1Aの実装例について図10~図12を参照しながら説明する。図10は、本実施の形態の実装例に係る高周波回路1Aの平面図である。図11は、本実施の形態の実装例に係る高周波回路1Aの平面図であり、z軸正側からモジュール基板90の主面90b側を透視した図である。図12は、本実施の形態の実装例に係る高周波回路1Aの断面図である。図12における高周波回路1Aの断面は、図10及び図11のxii-xii線における断面である。
[2.4 Implementation example of high frequency circuit 1A]
Next, a mounting example of the high frequency circuit 1A will be described with reference to FIGS. 10 to 12. FIG. 10 is a plan view of a high frequency circuit 1A according to a mounting example of this embodiment. FIG. 11 is a plan view of the high frequency circuit 1A according to the mounting example of the present embodiment, and is a perspective view of the main surface 90b side of the module board 90 from the positive side of the z-axis. FIG. 12 is a cross-sectional view of a high frequency circuit 1A according to a mounting example of this embodiment. The cross section of the high frequency circuit 1A in FIG. 12 is the cross section taken along line xii-xii in FIGS. 10 and 11.
 図10~図12において、モジュール基板90に配置された複数の部品をそれぞれ接続する配線の図示が一部を除いて省略されている。図10において、モジュール基板90の主面90aを覆う樹脂部材91及び金属電極層93の図示が省略されている。なお、図10~図12では、各回路部品の配置関係が容易に理解できるように、各回路部品にその機能を表す略称(「PA」など)が付されている場合があるが、実際の各回路部品には、当該略称は付されなくてもよい。 In FIGS. 10 to 12, illustrations of the wiring connecting each of the plurality of components arranged on the module board 90 are omitted except for some parts. In FIG. 10, illustration of the resin member 91 and the metal electrode layer 93 that cover the main surface 90a of the module board 90 is omitted. In addition, in Figures 10 to 12, each circuit component may be given an abbreviation (such as "PA") that indicates its function so that the arrangement relationship of each circuit component can be easily understood, but the actual The abbreviation does not need to be given to each circuit component.
 高周波回路1Aは、図8に示された回路素子が構成された回路部品に加えて、さらに、モジュール基板90と、樹脂部材91及び92と、金属電極層93と、複数のポスト電極150Aと、を備える。 In addition to the circuit components including the circuit elements shown in FIG. 8, the high frequency circuit 1A further includes a module substrate 90, resin members 91 and 92, a metal electrode layer 93, and a plurality of post electrodes 150A. Equipped with.
 本実装例では、回路部品は、モジュール基板90の両面に配置されている。具体的には、図10に示すように、モジュール基板90の主面90a上には、電力増幅器11及び12(PA)を含む集積回路10と、フィルタ31及び32(BPF)と、フィルタ33A及び34A(BEF)と、キャパシタ41及び42(C)と、が配置されている。一方、モジュール基板90の主面90b上には、図11に示すように、低雑音増幅器21及び22(LNA)を含む集積回路20と、スイッチ51~53(SW)を含む集積回路50と、PA制御回路61(PAC)と、が配置されている。 In this implementation example, circuit components are arranged on both sides of the module board 90. Specifically, as shown in FIG. 10, on the main surface 90a of the module board 90, an integrated circuit 10 including power amplifiers 11 and 12 (PA), filters 31 and 32 (BPF), filters 33A and 34A (BEF) and capacitors 41 and 42 (C) are arranged. On the other hand, on the main surface 90b of the module board 90, as shown in FIG. 11, an integrated circuit 20 including low noise amplifiers 21 and 22 (LNA) and an integrated circuit 50 including switches 51 to 53 (SW), A PA control circuit 61 (PAC) is arranged.
 電力増幅器11及び12(PA)を含む集積回路10は、例えばGaAs、SiGe及びGaNのうちの少なくとも1つで構成され得る。なお、集積回路10の一部は、CMOSを用いて構成されてもよく、具体的にはSOIプロセスにより製造されてもよい。 The integrated circuit 10 including the power amplifiers 11 and 12 (PA) may be made of, for example, at least one of GaAs, SiGe, and GaN. Note that a part of the integrated circuit 10 may be configured using CMOS, and specifically may be manufactured using an SOI process.
 フィルタ33A及び34A(BEF)の各々は、SAWフィルタ、BAWフィルタ、LCフィルタ、及び、誘電体フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 Each of the filters 33A and 34A (BEF) may be configured using any of a SAW filter, a BAW filter, an LC filter, and a dielectric filter, and is not limited to these.
 複数のポスト電極150Aは、図11に示すように主面90b上に配置されている。複数のポスト電極150Aは、図8に示したアンテナ接続端子101及び102、高周波入力端子111及び112、高周波出力端子121及び122、電源端子131A及び132A、並びに、制御端子141に加えてグランド端子を含む複数の外部接続端子として機能する。複数のポスト電極150Aの各々は、高周波回路1Aのz軸負方向に配置されたマザー基板上の入出力端子及び/又はグランド端子等に接合される。 The plurality of post electrodes 150A are arranged on the main surface 90b as shown in FIG. 11. The plurality of post electrodes 150A have a ground terminal in addition to the antenna connection terminals 101 and 102, high frequency input terminals 111 and 112, high frequency output terminals 121 and 122, power supply terminals 131A and 132A, and control terminal 141 shown in FIG. Functions as multiple external connection terminals. Each of the plurality of post electrodes 150A is connected to an input/output terminal and/or a ground terminal on a motherboard arranged in the negative direction of the z-axis of the high frequency circuit 1A.
 電源端子131Aとして機能するポスト電極150Aの少なくとも一部は、モジュール基板90の平面視において、フィルタ33Aの少なくとも一部と重なっている。これにより、図12に示すように、電源ラインP1の配線長を短縮することができ、配線による抵抗損失を低減することができる。 At least a portion of the post electrode 150A functioning as the power supply terminal 131A overlaps with at least a portion of the filter 33A when the module substrate 90 is viewed from above. Thereby, as shown in FIG. 12, the wiring length of the power supply line P1 can be shortened, and the resistance loss due to the wiring can be reduced.
 樹脂部材92は、図12に示すように主面90bと主面90b上の回路部品とを覆っている。樹脂部材92の材料としては、例えばエポキシ樹脂を用いることができる。なお、樹脂部材92の材料は、エポキシ樹脂に限定されない。樹脂部材92は、主面90b上の回路部品の機械強度及び耐湿性等の信頼性を確保する機能を有する。なお、樹脂部材92は、必ずしも高周波回路1Aに含まれなくてもよい。 As shown in FIG. 12, the resin member 92 covers the main surface 90b and the circuit components on the main surface 90b. As a material for the resin member 92, for example, epoxy resin can be used. Note that the material of the resin member 92 is not limited to epoxy resin. The resin member 92 has a function of ensuring reliability such as mechanical strength and moisture resistance of the circuit components on the main surface 90b. Note that the resin member 92 does not necessarily have to be included in the high frequency circuit 1A.
 [2.5 効果など]
 以上のように、本変形例に係る高周波回路1Aは、電力増幅器11と、電力増幅器11に接続され、バンドBと同時送信可能なバンドAを含む通過帯域を有するフィルタ31と、電力増幅器11に供給される電源電圧を受ける電源端子131Aと、電源端子131Aと電力増幅器11との間に接続されるフィルタ33Aと、電力増幅器12と、電力増幅器12に接続され、バンドBを含む通過帯域を有するフィルタ32と、電力増幅器12に供給される電源電圧を受ける電源端子132Aと、電源端子132Aと電力増幅器12との間に接続されるフィルタ34Aと、を備え、フィルタ33Aは、バンドAの少なくとも一部を含む減衰帯域を有し、フィルタ34Aは、バンドBの少なくとも一部を含む減衰帯域を有する。
[2.5 Effects etc.]
As described above, the high frequency circuit 1A according to the present modification includes the power amplifier 11, the filter 31 which is connected to the power amplifier 11 and has a pass band including band A that can transmit simultaneously with band B, and A power supply terminal 131A that receives the supplied power supply voltage, a filter 33A connected between the power supply terminal 131A and the power amplifier 11, a power amplifier 12, and a filter 33A that is connected to the power amplifier 12 and has a passband including band B. The filter 33A includes a filter 32, a power supply terminal 132A that receives the power supply voltage supplied to the power amplifier 12, and a filter 34A connected between the power supply terminal 132A and the power amplifier 12. filter 34A has an attenuation band that includes at least a portion of band B;
 これによれば、電源端子131Aと電力増幅器11との間に接続されるフィルタ33Aの減衰帯域にバンドAの少なくとも一部が含まれる。したがって、電力増幅器12においてバンドBの送信信号を増幅するときに発生するバンドAのノイズが電源ラインP1及びP2並びに電圧供給回路5Aを介して電力増幅器11に侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドAの送信信号の品質劣化を抑制することができる。さらに、これによれば、電源端子132Aと電力増幅器12との間に接続されるフィルタ34Aの減衰帯域にバンドBの少なくとも一部が含まれる。したがって、電力増幅器11においてバンドAの送信信号を増幅するときに発生するバンドBのノイズが電源ラインP1及びP2並びに電圧供給回路5Aを介して電力増幅器12に侵入することを抑制することができる。つまり、バンドA及びBの同時送信におけるバンドBの送信信号の品質劣化を抑制することができる。 According to this, at least part of the band A is included in the attenuation band of the filter 33A connected between the power supply terminal 131A and the power amplifier 11. Therefore, band A noise generated when the power amplifier 12 amplifies the band B transmission signal can be suppressed from entering the power amplifier 11 via the power supply lines P1 and P2 and the voltage supply circuit 5A. In other words, it is possible to suppress quality deterioration of the transmission signal of band A in simultaneous transmission of bands A and B. Furthermore, according to this, at least a portion of band B is included in the attenuation band of filter 34A connected between power supply terminal 132A and power amplifier 12. Therefore, it is possible to suppress band B noise generated when the power amplifier 11 amplifies the band A transmission signal from entering the power amplifier 12 via the power supply lines P1 and P2 and the voltage supply circuit 5A. In other words, it is possible to suppress quality deterioration of the transmission signal of band B in simultaneous transmission of bands A and B.
 (実施の形態2の変形例)
 次に、実施の形態2の変形例について説明する。本変形例では、フィルタ33A及び34Aの通過特性が上記実施の形態2と主として異なる。以下に、上記実施の形態2と異なる点を中心に本変形例について図13A及び図13Bを参照しながら説明する。
(Modification of Embodiment 2)
Next, a modification of the second embodiment will be described. In this modification, the pass characteristics of filters 33A and 34A are mainly different from those in the second embodiment. This modification will be described below with reference to FIGS. 13A and 13B, focusing on the differences from the second embodiment.
 図13Aは、本変形例に係るフィルタ33Aの通過特性を示すグラフである。図13Bは、本変形例に係るフィルタ34Aの通過特性を示すグラフである。図13A及び図13Bにおいて、横軸は周波数を表し、縦軸は利得を表す。 FIG. 13A is a graph showing the pass characteristics of the filter 33A according to this modification. FIG. 13B is a graph showing the pass characteristics of the filter 34A according to this modification. In FIGS. 13A and 13B, the horizontal axis represents frequency, and the vertical axis represents gain.
 本変形例に係るフィルタ33Aは、バンドエリミネーションフィルタであり、図13Aに示すようにバンドBを含む減衰帯域を有する。フィルタ33Aの減衰帯域において、下限周波数f33ALは、バンドBの下限周波数よりも低く、上限周波数f33AHは、バンドBの上限周波数よりも高い。なお、フィルタ33Aの減衰帯域は、バンドBの一部のみを含んでもよい。つまり、フィルタ33Aの減衰帯域において、下限周波数f33ALはバンドBの下限周波数よりも高くてもよい、又は、上限周波数f33AHはバンドBの上限周波数よりも低くてもよい。 The filter 33A according to this modification is a band elimination filter, and has an attenuation band including band B as shown in FIG. 13A. In the attenuation band of the filter 33A, the lower limit frequency f33AL is lower than the band B lower limit frequency, and the upper limit frequency f33AH is higher than the band B upper limit frequency. Note that the attenuation band of the filter 33A may include only part of the band B. That is, in the attenuation band of the filter 33A, the lower limit frequency f33AL may be higher than the lower limit frequency of band B, or the upper limit frequency f33AH may be lower than the upper limit frequency of band B.
 フィルタ34Aは、バンドエリミネーションフィルタであり、図13Bに示すようにバンドAを含む減衰帯域を有する。フィルタ34Aの減衰帯域において、下限周波数f34ALは、バンドAの下限周波数よりも低く、上限周波数f34AHは、バンドAの上限周波数よりも高い。なお、フィルタ34Aの減衰帯域は、バンドAの一部のみを含んでもよい。つまり、フィルタ34Aの減衰帯域において、下限周波数f34ALはバンドAの下限周波数よりも高くてもよい、又は、上限周波数f34AHはバンドAの上限周波数よりも低くてもよい。 The filter 34A is a band elimination filter and has an attenuation band including band A as shown in FIG. 13B. In the attenuation band of the filter 34A, the lower limit frequency f34AL is lower than the band A lower limit frequency, and the upper limit frequency f34AH is higher than the band A upper limit frequency. Note that the attenuation band of the filter 34A may include only part of the band A. That is, in the attenuation band of the filter 34A, the lower limit frequency f34AL may be higher than the lower limit frequency of band A, or the upper limit frequency f34AH may be lower than the upper limit frequency of band A.
 なお、本変形例において、フィルタ33Aの減衰帯域は、バンドBの少なくとも一部に加えてバンドAの少なくとも一部を含んでもよい。また、フィルタ34Aの減衰帯域は、バンドAの少なくとも一部に加えてバンドBの少なくとも一部を含んでもよい。 Note that in this modification, the attenuation band of the filter 33A may include at least a portion of the band A in addition to at least a portion of the band B. Further, the attenuation band of the filter 34A may include at least a portion of band B in addition to at least a portion of band A.
 (他の実施の形態)
 以上、本発明に係る高周波回路及び増幅方法について、実施の形態及び実施例に基づいて説明したが、本発明に係る高周波回路及び増幅方法は、上記実施の形態及びその変形例に限定されるものではない。上記実施の形態及びその変形例における任意の構成要素を組み合わせて実現される別の実施の形態や、上記実施の形態及びその変形例に対して本発明の主旨を逸脱しない範囲で当業者が思いつく各種変形を施して得られる変形例や、上記高周波回路を内蔵した各種機器も本発明に含まれる。
(Other embodiments)
The high frequency circuit and amplification method according to the present invention have been described above based on the embodiments and examples, but the high frequency circuit and amplification method according to the present invention are limited to the above embodiments and modifications thereof. isn't it. Those skilled in the art will be able to come up with other embodiments realized by combining arbitrary constituent elements of the above embodiments and modifications thereof, and other embodiments realized by combining arbitrary components of the above embodiments and modifications thereof, without departing from the spirit of the present invention. The present invention also includes modified examples obtained by performing various modifications and various devices incorporating the above-mentioned high frequency circuit.
 例えば、上記各実施の形態に係る高周波回路の回路構成において、図面に開示された各回路素子及び信号経路を接続する経路の間に、別の回路素子及び配線などが挿入されてもよい。例えば、電力増幅器11とフィルタ31との間、及び/又は、電力増幅器12とフィルタ32との間に、インピーダンス整合回路が挿入されてもよい。 For example, in the circuit configuration of the high frequency circuit according to each of the embodiments described above, another circuit element, wiring, etc. may be inserted between the paths connecting the respective circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the power amplifier 11 and the filter 31 and/or between the power amplifier 12 and the filter 32.
 なお、上記各実施の形態に係る高周波回路は、電源ラインP1及びP2にフィルタを備えていたが、フィルタの代わりにノイズキャンセラを備えてもよい。このとき、ノイズキャンセラは、例えば、電力増幅器で増幅された高周波信号の一部を取り出し、取り出した高周波信号の位相を調整して電源ラインに供給することでノイズをキャンセルすることができる。また例えば、ノイズキャンセラは、電力増幅器と並列に接続された電力増幅器で増幅された高周波信号の位相を調整して電源ラインに供給してもよい。ノイズキャンセラの構成は、従来技術が用いられてもよく、特に限定されない。 Although the high frequency circuit according to each of the embodiments described above includes filters on the power lines P1 and P2, a noise canceller may be provided instead of the filter. At this time, the noise canceller can cancel the noise by, for example, extracting a part of the high frequency signal amplified by the power amplifier, adjusting the phase of the extracted high frequency signal, and supplying it to the power supply line. For example, the noise canceller may adjust the phase of a high frequency signal amplified by a power amplifier connected in parallel with the power amplifier and supply the signal to the power supply line. The configuration of the noise canceller is not particularly limited, and any conventional technology may be used.
 本発明は、フロントエンド部に配置される高周波回路として、携帯電話などの通信機器に広く利用できる。 The present invention can be widely used in communication devices such as mobile phones as a high frequency circuit placed in a front end section.
 1、1A 高周波回路
 2a、2b アンテナ
 3 RFIC
 4 BBIC
 5、5A 電圧供給回路
 6、6A 通信装置
 10、20、50 集積回路
 11、12 電力増幅器
 21、22 低雑音増幅器
 31、32、33、33A、34、34A フィルタ
 41、42 キャパシタ
 51、52、53 スイッチ
 61 PA制御回路
 90 モジュール基板
 90a、90b 主面
 91、92 樹脂部材
 93 金属電極層
 101、102 アンテナ接続端子
 111、112 高周波入力端子
 121、122 高周波出力端子
 131、131A、132A 電源端子
 141 制御端子
 150 ランド電極
 150A ポスト電極
1, 1A high frequency circuit 2a, 2b antenna 3 RFIC
4 BBIC
5, 5A Voltage supply circuit 6, 6A Communication device 10, 20, 50 Integrated circuit 11, 12 Power amplifier 21, 22 Low noise amplifier 31, 32, 33, 33A, 34, 34A Filter 41, 42 Capacitor 51, 52, 53 Switch 61 PA control circuit 90 Module board 90a, 90b Main surface 91, 92 Resin member 93 Metal electrode layer 101, 102 Antenna connection terminal 111, 112 High frequency input terminal 121, 122 High frequency output terminal 131, 131A, 132A Power terminal 141 Control terminal 150 Land electrode 150A Post electrode

Claims (20)

  1.  第1電力増幅器と、
     前記第1電力増幅器に接続され、第2バンドと同時送信可能な第1バンドを含む通過帯域を有する第1フィルタと、
     前記第1電力増幅器に供給される第1電源電圧を受ける第1電源端子と、
     前記第1電源端子と前記第1電力増幅器との間に接続される第2フィルタと、を備え、
     前記第2フィルタは、前記第2バンドの少なくとも一部を含む減衰帯域を有する、
     高周波回路。
    a first power amplifier;
    a first filter connected to the first power amplifier and having a passband including a first band capable of simultaneous transmission with a second band;
    a first power supply terminal receiving a first power supply voltage supplied to the first power amplifier;
    a second filter connected between the first power supply terminal and the first power amplifier,
    the second filter has an attenuation band that includes at least a portion of the second band;
    High frequency circuit.
  2.  前記第2フィルタの前記減衰帯域は、さらに、前記第1バンドの少なくとも一部を含む、
     請求項1に記載の高周波回路。
    The attenuation band of the second filter further includes at least a portion of the first band.
    The high frequency circuit according to claim 1.
  3.  前記高周波回路は、さらに、前記第2フィルタ及び前記第1電力増幅器の間の経路とグランドとの間に接続される第1キャパシタを備える、
     請求項1に記載の高周波回路。
    The high frequency circuit further includes a first capacitor connected between a path between the second filter and the first power amplifier and ground.
    The high frequency circuit according to claim 1.
  4.  前記高周波回路は、さらに、前記第1電力増幅器、前記第1フィルタ及び前記第2フィルタが実装され、前記第1電源端子を含むモジュール基板を備える、
     請求項1に記載の高周波回路。
    The high frequency circuit further includes a module board on which the first power amplifier, the first filter, and the second filter are mounted and includes the first power supply terminal.
    The high frequency circuit according to claim 1.
  5.  前記第2フィルタの入力インピーダンスは、前記第1フィルタの入力インピーダンスよりも低い、
     請求項1に記載の高周波回路。
    The input impedance of the second filter is lower than the input impedance of the first filter.
    The high frequency circuit according to claim 1.
  6.  前記第2フィルタは、ローパスフィルタ又はバンドエリミネーションフィルタである、
     請求項1に記載の高周波回路。
    The second filter is a low pass filter or a band elimination filter.
    The high frequency circuit according to claim 1.
  7.  前記高周波回路は、さらに、
     第2電力増幅器と、
     前記第2電力増幅器に接続され、前記第2バンドを含む通過帯域を有する第3フィルタと、
     前記第2電力増幅器に供給される第2電源電圧を受ける第2電源端子と、
     前記第2電源端子と前記第2電力増幅器との間に接続される第4フィルタと、を備え、
     前記第4フィルタは、前記第1バンドの少なくとも一部及び前記第2バンドの少なくとも一部のうちの少なくとも一方を含む減衰帯域を有する、
     請求項1~6のいずれか1項に記載の高周波回路。
    The high frequency circuit further includes:
    a second power amplifier;
    a third filter connected to the second power amplifier and having a passband including the second band;
    a second power supply terminal receiving a second power supply voltage supplied to the second power amplifier;
    a fourth filter connected between the second power supply terminal and the second power amplifier,
    The fourth filter has an attenuation band that includes at least one of at least a portion of the first band and at least a portion of the second band.
    The high frequency circuit according to any one of claims 1 to 6.
  8.  前記第4フィルタの前記減衰帯域は、前記第1バンドの少なくとも一部を含む、
     請求項7に記載の高周波回路。
    the attenuation band of the fourth filter includes at least a portion of the first band;
    The high frequency circuit according to claim 7.
  9.  前記第4フィルタの前記減衰帯域は、前記第2バンドの少なくとも一部を含む、
     請求項7に記載の高周波回路。
    the attenuation band of the fourth filter includes at least a portion of the second band;
    The high frequency circuit according to claim 7.
  10.  前記高周波回路は、さらに、前記第4フィルタ及び前記第2電力増幅器の間の経路とグランドとの間に接続される第2キャパシタを備える、
     請求項7に記載の高周波回路。
    The high frequency circuit further includes a second capacitor connected between a path between the fourth filter and the second power amplifier and ground.
    The high frequency circuit according to claim 7.
  11.  前記高周波回路は、さらに、前記第1電力増幅器、前記第2電力増幅器、前記第1フィルタ、前記第2フィルタ、前記第3フィルタ及び前記第4フィルタが実装され、前記第1電源端子及び前記第2電源端子を含むモジュール基板を備える、
     請求項7に記載の高周波回路。
    The high frequency circuit further includes the first power amplifier, the second power amplifier, the first filter, the second filter, the third filter, and the fourth filter, and the first power supply terminal and the fourth filter. comprising a module board including two power supply terminals;
    The high frequency circuit according to claim 7.
  12.  前記第4フィルタの入力インピーダンスは、前記第3フィルタの入力インピーダンスよりも低い、
     請求項7に記載の高周波回路。
    The input impedance of the fourth filter is lower than the input impedance of the third filter.
    The high frequency circuit according to claim 7.
  13.  前記第4フィルタは、ローパスフィルタ又はバンドエリミネーションフィルタである、
     請求項7に記載の高周波回路。
    The fourth filter is a low pass filter or a band elimination filter.
    The high frequency circuit according to claim 7.
  14.  前記第1電源端子及び前記第2電源端子は、同一の電源端子である、
     請求項7に記載の高周波回路。
    the first power terminal and the second power terminal are the same power terminal;
    The high frequency circuit according to claim 7.
  15.  前記第1バンド及び前記第2バンドは、隣接する異なる2つの周波数バンドである、
     請求項7に記載の高周波回路。
    The first band and the second band are two different adjacent frequency bands,
    The high frequency circuit according to claim 7.
  16.  前記第1バンドは、5GNR(5th Generation New Radio)のためのn77であり、
     前記第2バンドは、5GNRのためのn79である、
     請求項15に記載の高周波回路。
    The first band is n77 for 5GNR (5th Generation New Radio),
    the second band is n79 for 5GNR;
    The high frequency circuit according to claim 15.
  17.  前記第1電源電圧及び前記第2電源電圧は、平均電力トラッキングモード、シンボル電力トラッキングモード、又は、デジタルエンベロープトラッキングモードで調整される、
     請求項7に記載の高周波回路。
    The first power supply voltage and the second power supply voltage are adjusted in an average power tracking mode, a symbol power tracking mode, or a digital envelope tracking mode.
    The high frequency circuit according to claim 7.
  18.  第1電力増幅器と、
     前記第1電力増幅器に接続され、第2バンドと同時送信可能な第1バンドを含む通過帯域を有する第1フィルタと、
     前記第1電力増幅器に供給される第1電源電圧を受ける第1電源端子と、
     前記第1電源端子と前記第1電力増幅器との間に接続される第2フィルタと、
     第2電力増幅器と、
     前記第2電力増幅器に接続され、前記第2バンドを含む通過帯域を有する第3フィルタと、
     前記第2電力増幅器に供給される第2電源電圧を受ける第2電源端子と、
     前記第2電源端子と前記第2電力増幅器との間に接続される第4フィルタと、を備え、
     前記第2フィルタは、前記第1バンドの少なくとも一部を含む減衰帯域を有し、
     前記第4フィルタは、前記第2バンドの少なくとも一部を含む減衰帯域を有する、
     高周波回路。
    a first power amplifier;
    a first filter connected to the first power amplifier and having a passband including a first band capable of simultaneous transmission with a second band;
    a first power supply terminal receiving a first power supply voltage supplied to the first power amplifier;
    a second filter connected between the first power supply terminal and the first power amplifier;
    a second power amplifier;
    a third filter connected to the second power amplifier and having a passband including the second band;
    a second power supply terminal receiving a second power supply voltage supplied to the second power amplifier;
    a fourth filter connected between the second power supply terminal and the second power amplifier,
    the second filter has an attenuation band that includes at least a portion of the first band;
    The fourth filter has an attenuation band that includes at least a portion of the second band.
    High frequency circuit.
  19.  第1電源ラインを介して第1電源電圧を受け、
     受けた前記第1電源電圧を用いて、第2バンドと同時送信可能な第1バンドの送信信号を増幅し、
     前記第1バンドの送信信号の増幅により発生した前記第2バンドのノイズを前記第1電源ラインにおいて減衰する、
     増幅方法。
    receiving a first power supply voltage via a first power supply line;
    Using the received first power supply voltage, amplify a first band transmission signal that can be transmitted simultaneously with a second band,
    attenuating the second band noise generated by amplification of the first band transmission signal in the first power supply line;
    Amplification method.
  20.  前記増幅方法は、さらに、
     第2電源ラインを介して第2電源電圧を受け、
     受けた前記第2電源電圧を用いて、前記第2バンドの送信信号を増幅し、
     前記第2バンドの送信信号の増幅により発生した前記第1バンドのノイズを前記第2電源ラインにおいて減衰する、
     請求項19に記載の増幅方法。
    The amplification method further includes:
    receiving a second power supply voltage via a second power supply line;
    amplifying the second band transmission signal using the received second power supply voltage;
    Attenuating the first band noise generated by amplification of the second band transmission signal in the second power supply line;
    The amplification method according to claim 19.
PCT/JP2023/006215 2022-04-01 2023-02-21 High-frequency circuit and amplification method WO2023189020A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017527239A (en) * 2014-09-19 2017-09-14 三菱電機株式会社 Broadband radio frequency power amplifier
WO2021241233A1 (en) * 2020-05-25 2021-12-02 株式会社村田製作所 Tracker module, power amplification module, high frequency module, and communication device
WO2021251217A1 (en) * 2020-06-10 2021-12-16 株式会社村田製作所 High frequency module and communication device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017527239A (en) * 2014-09-19 2017-09-14 三菱電機株式会社 Broadband radio frequency power amplifier
WO2021241233A1 (en) * 2020-05-25 2021-12-02 株式会社村田製作所 Tracker module, power amplification module, high frequency module, and communication device
WO2021251217A1 (en) * 2020-06-10 2021-12-16 株式会社村田製作所 High frequency module and communication device

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