WO2023166606A1 - Control device, dc/dc conversion device, and control method - Google Patents

Control device, dc/dc conversion device, and control method Download PDF

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Publication number
WO2023166606A1
WO2023166606A1 PCT/JP2022/008859 JP2022008859W WO2023166606A1 WO 2023166606 A1 WO2023166606 A1 WO 2023166606A1 JP 2022008859 W JP2022008859 W JP 2022008859W WO 2023166606 A1 WO2023166606 A1 WO 2023166606A1
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Prior art keywords
converter
frequency
transfer function
control
output voltage
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PCT/JP2022/008859
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French (fr)
Japanese (ja)
Inventor
秀一 長門
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三菱電機株式会社
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Priority to PCT/JP2022/008859 priority Critical patent/WO2023166606A1/en
Publication of WO2023166606A1 publication Critical patent/WO2023166606A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the present disclosure relates to a DC/DC converter control device, a DC/DC conversion device, and a DC/DC converter control method.
  • a motor control device inputs an inverse model of a transfer function to be controlled, and filters the output of this inverse model with a first low-pass filter.
  • the cutoff frequency of the first low-pass filter is set to a cutoff frequency that attenuates observation noise contained in the output of the inverse model.
  • An object of one aspect of the present disclosure is to provide a technique that can match the response of a DC/DC converter with the response of a transfer function simulating the DC/DC converter.
  • a controller for a DC/DC converter includes a low-pass filter that performs low-pass filtering on the output voltage of the DC/DC converter, and a DC/DC converter that causes the low-pass filtered output voltage to follow a command value.
  • An operation control unit that controls the operation of the DC converter, a generation unit that generates a first transfer function of the DC/DC converter so as to simulate the frequency characteristics of the output voltage of the DC/DC converter, and an output of the DC/DC converter.
  • a setting unit that sets the cutoff frequency of the low-pass filter based on a first frequency range in which an error between the frequency characteristics of the voltage and the frequency characteristics of the first transfer function is equal to or less than an allowable value.
  • a DC/DC conversion device includes a DC/DC converter and the control device described above.
  • a control method for a DC/DC converter includes the steps of: low-pass filtering an output voltage of the DC/DC converter; controlling the operation of the /DC converter; generating a transfer function of the DC/DC converter so as to simulate the frequency characteristics of the output voltage of the DC/DC converter; and the frequency characteristics of the output voltage of the DC/DC converter. and setting the cutoff frequency of the low-pass filter that performs the low-pass filtering based on the frequency range in which the error between the frequency characteristic of the transfer function and the frequency characteristic of the transfer function is equal to or less than the allowable value.
  • FIG. 3 is a block diagram for explaining a specific configuration of a control circuit;
  • FIG. FIG. 3 is a block diagram for explaining a method of calculating frequency characteristics of a DC/DC converter; It is a figure which shows the frequency characteristic of the output voltage of a DC/DC converter.
  • 4 is a flowchart for explaining a method of generating a transfer function;
  • 4 is a flowchart for explaining a method of setting the cutoff frequency of a low-pass filter;
  • FIG. 7 is a diagram showing an example of a result of calculating a cutoff frequency according to the flowchart of FIG. 6;
  • FIG. 4 is a diagram showing a first example of comparison results between the transient response of an electric circuit and the transient response of a transfer function
  • FIG. 10 is a diagram showing a second example of comparison results between the transient response of the electric circuit and the transient response of the transfer function
  • FIG. 10 is a diagram showing a third example of comparison results between the transient response of the electric circuit and the transient response of the transfer function
  • FIG. 10 is a diagram showing a fourth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function
  • FIG. 10 is a diagram showing a fifth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function
  • FIG. 12 is a diagram showing a sixth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function;
  • FIG. 11 is a diagram for explaining a method of setting a cutoff frequency according to a modified example of the present embodiment;
  • FIG. It is a block diagram of the learning part regarding a DC/DC converter.
  • FIG. 1 is a block diagram showing the configuration of a DC/DC converter.
  • DC/DC converter 1 is a power converter provided between DC power supply 2 and load 3 .
  • DC/DC converter 1 includes DC/DC converter 4 as a main circuit, controller 8 for DC/DC converter 4 , and voltage detector 7 .
  • a DC power supply 2 is connected to one end of the DC/DC converter 4, and a load 3 is connected to the other end.
  • Voltage detector 7 detects the output voltage of DC/DC converter 4 and outputs the detected value of the output voltage to control device 8 and frequency analysis device 12 .
  • the DC/DC converter 4 may be a bidirectional DC/DC converter.
  • the control device 8 includes a control circuit 5, a signal generation circuit 6, and a low-pass filter 10.
  • Each of the control circuit 5, the signal generation circuit 6, and the low-pass filter 10 may be dedicated hardware, or the internal memory of the control device 8 (for example, ROM (Read Only Memory), RAM (Random Access Memory), A configuration implemented by a processor such as a CPU (Central Processing Unit) that executes a program stored in a hard disk, etc., may also be used.
  • the control circuit 5 is dedicated hardware, the control circuit 5 is configured by FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or a combination thereof.
  • the low-pass filter 10 performs low-pass filtering on the detected output voltage, and outputs to the control circuit 5 the output voltage from which high frequency components have been removed.
  • the control circuit 5 generates a control signal P1 for operating the DC/DC converter 4 during normal operation. Specifically, the control circuit 5 generates a control signal P1 for turning ON/OFF the switching element of the DC/DC converter 4 by executing various calculations using the low-pass filtered output voltage. Control circuit 5 outputs control signal P ⁇ b>1 to DC/DC converter 4 .
  • the signal generation circuit 6 generates a control signal P2 for operating the DC/DC converter 4 when acquiring the frequency characteristics (that is, frequency response) of the output voltage of the DC/DC converter 4.
  • the signal generation circuit 6 outputs to the DC/DC converter 4 a control signal P2 based on the sine wave of each frequency received from the frequency analysis device 12 and the control amount.
  • the frequency analysis device 12 outputs a sine wave of each frequency to the signal generation circuit 6.
  • Frequency analysis device 12 receives an input of the output voltage of DC/DC converter 4 operated by control signal P2 generated by signal generation circuit 6 .
  • the frequency analyzer 12 calculates the frequency characteristic of the output voltage and stores it in the database 19 .
  • frequency analysis device 12 and the database 19 are external devices of the DC/DC conversion device 1
  • frequency analysis device 12 and database 19 may be included in DC/DC conversion device 1 .
  • the frequency analysis device 12 may be configured to be connected to the DC/DC conversion device 1 when measuring frequency characteristics.
  • the frequency characteristics of the DC/DC converter 4 may be calculated using an actual device, or may be calculated by simulation using an electric circuit model of the DC/DC converter 4. .
  • FIG. 2 is a block diagram for explaining a specific configuration of the control circuit.
  • control circuit 5 includes an operation control portion 50 , a transfer function generation portion 31 and a setting portion 33 .
  • the low-pass filter 10 performs low-pass filtering on the output voltage of the DC/DC converter 4 .
  • the operation control unit 50 controls the operation of the DC/DC converter 4 so that the low-pass filtered output voltage follows the command value.
  • operation control section 50 includes subtraction section 13 , feedback control amount calculation section 14 , limiter processing section 15 , and control signal generation section 16 .
  • the feedback control amount calculator 14 is composed of a feedback controller (for example, a P controller, a PI controller, a PD controller, and a PID controller).
  • the feedback control amount calculator 14 uses the deviation ⁇ V to calculate the control amount by executing feedback control (for example, P control, PI control, PD control, PID control, etc.).
  • the feedback control amount calculator 14 generates the control amount X by feedback control for making the deviation ⁇ V zero.
  • the limiter processing unit 15 limits the control amount X within the limit range (that is, lower limit: Xd, upper limit: Xu). Specifically, the limiter processing unit 15 outputs the controlled variable X set to the upper limit Xu when the controlled variable X exceeds the upper limit Xu, and outputs the controlled variable X set to the upper limit Xu when the controlled variable X falls below the lower limit Xd.
  • a controlled variable X set to the lower limit value Xd is output, and when the controlled variable X is equal to or greater than the lower limit value Xd and equal to or less than the upper limit value Xu, the controlled variable X is output.
  • the upper limit value Xu is "1" and the lower limit value Xd is "0".
  • the control signal generation unit 16 compares the control amount X and the carrier signal, and generates a control signal P1 as a PWM signal based on the comparison result. For example, a triangular wave is used as the carrier signal.
  • the control signal generator 16 transmits the control signal P1 to the DC/DC converter 4 .
  • the DC/DC converter 4 supplies power from the DC power supply 2 to the load 3 by turning ON/OFF the switching element according to the control signal P1.
  • the transfer function generator 31 generates a transfer function of the DC/DC converter 4 stored in the database 19 so as to simulate the frequency characteristics of the output voltage of the DC/DC converter 4 .
  • the details of the transfer function generation method will be described later.
  • the setting unit 33 sets the cutoff frequency Fc of the low-pass filter 10 based on the frequency characteristics of the output voltage of the DC/DC converter 4 and the frequency characteristics of the generated transfer function.
  • the cutoff frequency Fc is output to the low pass filter 10 . The details of the method for setting the cutoff frequency Fc will be described later.
  • FIG. 3 is a block diagram for explaining a method of calculating frequency characteristics of a DC/DC converter.
  • signal generating circuit 6 of control device 8 includes an adding section 25 and a control signal generating section 26 .
  • the frequency analysis device 12 includes a frequency setting section 20, a sine wave generation section 21, and a frequency characteristic calculation section 22. Each of these functions is implemented by a processing circuit.
  • the processing circuit may be dedicated hardware, or may be a processor that executes a program stored in the internal memory of the frequency analysis device 12 . If the processing circuitry is dedicated hardware, the processing circuitry may be, for example, an FPGA, an ASIC, or a combination thereof.
  • the frequency setting unit 20 sets the frequency f (e.g., the frequency obtained by equally dividing the frequency range) based on the lowest frequency and highest frequency of the frequency range to be measured (that is, the frequency response section) and the number of divisions of the frequency range. calculate.
  • the frequency setting unit 20 transmits the calculated frequencies f to the sine wave generation unit 21 and the frequency characteristic calculation unit 22 in order from the low frequency side.
  • the frequency setting unit 20 may transmit the current frequency f at the timing when the gain and phase for the previous frequency f are calculated by the frequency characteristic calculation unit 22, or may transmit the current frequency f at predetermined intervals. may transmit frequency f.
  • the sine wave generation unit 21 receives a frequency f whose frequency characteristics are to be measured, and outputs a sine wave represented by "Bsin(2 ⁇ ft)" to the signal generation circuit 6 .
  • "B” indicates the amplitude of the sine wave and "t” indicates time.
  • the amplitude B is set to about 1/10 of the control amount A input to the signal generation circuit 6, for example.
  • the addition unit 25 of the signal generation circuit 6 outputs a value obtained by adding the control amount A and the sine wave generated by the sine wave generation unit 21 to the control signal generation unit 26 .
  • the control amount A is a value within the range from the upper limit value Xu to the lower limit value Xd of the limiter processing section 15 .
  • the control amount A indicates the duty ratio.
  • the controlled variable A can range from the upper limit value of "1" to the lower limit value of "0".
  • the control amount A indicates the phase shift ratio. In this case, the control amount A can range from the minimum value "0" to the maximum value "1".
  • the control signal generator 26 compares the added value output from the adder 25 and the carrier signal, and generates a control signal P2 as a PWM signal based on the comparison result. For example, a triangular wave is used as the carrier signal.
  • the control signal generator 16 transmits the control signal P2 to the DC/DC converter 4 .
  • the DC/DC converter 4 outputs a voltage by turning ON/OFF the switching element according to the control signal P2.
  • the frequency characteristic calculator 22 of the frequency analysis device 12 receives the frequency f and the output voltage V of the DC/DC converter 4 .
  • the frequency characteristic calculation unit 22 performs FFT (Fast Fourier Transformation) analysis on the output waveform. , calculates the gain and phase corresponding to the received frequency f component.
  • the frequency characteristic calculator 22 stores the gain and phase corresponding to the frequency f in the database 19 .
  • the frequency characteristic file is a file that associates frequency f(i), gain K(i), and phase ⁇ (i) for each number i.
  • FIG. 4 is a diagram showing the frequency characteristics of the output voltage of the DC/DC converter.
  • graph 61 indicates gain characteristics and graph 62 indicates phase characteristics.
  • Graphs 61 and 62 shown in FIG. 4 are generated based on the frequency characteristic files stored in the database 19 .
  • the configuration was described in which the signal generation circuit 6 of FIG. 3 was additionally used in the control device 8 in order to obtain the frequency characteristics shown in FIG. 4, but the configuration is not limited to this.
  • the control signal generator 16 of the control circuit 5 may be used to generate the control signal P2.
  • the functions of the subtraction unit 13, the feedback control amount calculation unit 14, and the limiter processing unit 15 of the operation control unit 50 shown in FIG. It is not input to the signal generator 16 .
  • the addition section 25 of the signal generation circuit 6 is provided in the operation control section 50 .
  • the adder 25 inputs the added value (that is, the added value of the control amount A and the sine wave generated by the sine wave generator 21 ) to the control signal generator 16 .
  • the control signal generator 16 compares the added value with the carrier signal, and generates the control signal P2 based on the comparison result.
  • a transfer function G1 shown in Equation (1) that simulates the waveform of the frequency characteristics of DC/DC converter 4 shown in FIG. 4 (for example, the maximum error of the waveform is within 1%) is considered.
  • Equation (1) “a n , b m , . . . , a 0 , b 0 ” in Equation (1) are coefficients.
  • the maximum permissible error between the waveform of the frequency characteristics of the DC/DC converter 4 (for example, graphs 61 and 62 in FIG. 4) and the frequency characteristics of the transfer function G1 is within 1% at each frequency.
  • Each coefficient of the transfer function G1 is determined by setting and applying the method of least squares.
  • FIG. 5 is a flowchart for explaining the transfer function generation method. Each process in FIG. 5 is executed by the control circuit 5 (for example, the transfer function generator 31).
  • the control circuit 5 for example, the transfer function generator 31.
  • the control circuit 5 sets the start number is and the end number ie of the frequency f(i) in the frequency range of the desired transfer function G1 (step S100).
  • the control circuit 5 sets the gain tolerance ⁇ K (%) and the phase tolerance ⁇ (%) (step S110).
  • the allowable error ⁇ K is an allowable error value between the gain in the frequency characteristic file of the database 19 and the gain obtained from the transfer function G1.
  • the allowable error ⁇ is an allowable error value between the phase in the frequency characteristic file of the database 19 and the phase obtained from the transfer function G1.
  • the control circuit 5 sets the allowable order m0 of the equation (2) of the denominator G1b of the assumed transfer function G1 (step S120).
  • the control circuit 5 reads the frequency f(i), the gain K(i), and the phase ⁇ (i) from the frequency characteristic file stored in the database 19 (step S150).
  • control circuit 5 uses the least-squares approximation method to obtain the gain K(i ) and the coefficient of the transfer function G1 of the equation (1) for obtaining the approximate value of the phase ⁇ (i) (step S200).
  • the control circuit 5 sequentially calculates the error between the gain K(i) of the frequency characteristic file and the gain of the transfer function G1 using the calculated coefficient for each frequency f(i). , the maximum error Kmax is obtained (step S210).
  • the control circuit 5 sequentially calculates the error between the phase ⁇ (i) of the frequency characteristic file and the phase of the transfer function G1 using the calculated coefficient for each frequency f(i). is obtained (step S220).
  • control circuit 5 determines whether or not the signs of the real parts of the poles are all negative (step S250). If the signs of the real parts of the poles are all negative (YES in step S250), control circuit 5 finally determines the calculated coefficients as the coefficients of transfer function G1 (step S270). Thereby, a transfer function G1 that simulates the frequency characteristic of the output voltage of the DC/DC converter 4 (that is, the frequency characteristic file stored in the database 19) is obtained.
  • step S250 the control circuit 5 determines whether the maximum degree m+1 of the denominator G1b is greater than the allowable degree m0 (that is, m+1>m0) (step S260). If m+1>m0 (YES in step S260), control circuit 5 terminates the process. If m+1 ⁇ m0 (NO in step S260), control circuit 5 returns to the process of step S160.
  • control circuit 5 controls the gain error to be equal to or less than the allowable error ⁇ K and the phase is less than or equal to the allowable error ⁇ .
  • step S100 determines the frequency of the transfer function G1.
  • the range is changed (that is, the start number is and the end number ie are reset) and the process from step S110 is executed.
  • FIG. 6 is a flow chart for explaining a method of setting the cutoff frequency of the low-pass filter. Each process in FIG. 6 is executed by the control circuit 5 (for example, the setting unit 33).
  • the control circuit 5 sets the same end number ie as the end number ie set in step S100 to calculate the transfer function G1 in the flowchart of FIG. 5 (step S300).
  • the control circuit 5 sets the gain tolerance ⁇ K and the phase tolerance ⁇ (step S310).
  • the processing of step S310 is the same as the processing of step S110 in FIG.
  • the control circuit 5 sets the coefficient of the transfer function G1 (step S320). Specifically, the coefficient of the transfer function G1 is set to the coefficient calculated in step S270 of FIG.
  • the control circuit 5 reads the frequency f(i), the gain K(i), and the phase ⁇ (i) from the frequency characteristic file stored in the database 19 (step S330).
  • the control circuit 5 sets the final number of the data of the read frequency characteristic file (that is, frequency f(i), gain K(i), phase ⁇ (i)) to ie1 (step S340).
  • control circuit 5 calculates the error Kd between the gain K(i) of the frequency characteristic file and the gain of the transfer function G1 using the coefficient set in step S320 (step S380).
  • the control circuit 5 calculates the error ⁇ d between the phase ⁇ (i) of the frequency characteristic file and the phase of the transfer function G1 using the coefficient set in step S320 (step S390).
  • the control circuit 5 sets the conditions that the gain error Kd is equal to or less than the allowable error ⁇ K (that is, Kd ⁇ K) and the phase error ⁇ d is equal to or smaller than the allowable error ⁇ (that is, ⁇ d ⁇ ). is established (step S400). If the condition is satisfied (YES in step S400), control circuit 5 returns to the process of step S360. If the condition is not satisfied (NO in step S400), control circuit 5 sets frequency f(i) of number i as cutoff frequency Fc (step S410), and ends the process.
  • FIG. 7 is a diagram showing an example of the result of calculating the cutoff frequency according to the flowchart of FIG. 7, a graph 71 representing the gain characteristic of the transfer function G1 is superimposed on the graph 61 of FIG. 4 representing the gain characteristic based on the frequency characteristic file stored in the database 19.
  • FIG. A graph 72 showing the phase characteristics of the transfer function G1 is superimposed on the graph 62 in FIG. 4 showing the phase characteristics based on the frequency characteristic file.
  • the highest frequency in the frequency range R1 in which the frequency characteristic falls within the allowable error (that is, Kd ⁇ K and ⁇ d ⁇ holds) is the frequency f(i) in step S410 of FIG. 6, which is used as the cutoff frequency Fc. set.
  • the cutoff frequency Fc is set to the highest frequency at which the frequency characteristics of the output voltage of the DC/DC converter 4 can be appropriately simulated by the transfer function G1.
  • a frequency range R2 from the lowest frequency f(is) to the highest frequency f(ie) is the frequency range used to determine the coefficients of the transfer function G1, as explained in the flowchart of FIG. It is understood that frequency range R1 is wider than frequency range R2 (ie, frequency range R2 is included in frequency range R1).
  • FIG. 8 is a diagram showing a first example of comparison results between the transient response of the electric circuit and the transient response of the transfer function.
  • the vibration waveform confirmed in the area 81 in FIG. 8 shows the response waveform of the step input, and the vibration waveform confirmed in the area 82 in FIG. After that, it is a response waveform when the load is reduced in a ramp form from the maximum load to zero.
  • the load input conditions are the same for FIGS. 9 to 11 below.
  • the circled points indicate the transient response of the electric circuit without the low-pass filter, and the solid line indicates the transient response of the transfer function.
  • the "transient response of the electric circuit" in FIG. 4 shows the waveform of the output voltage output from the DC/DC converter 4 operating according to the control signal P1 when the gain of the device is 0.01 and the time constant is 0.01.
  • FIG. 9 is a diagram showing a second example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. Referring to FIG. 9, the circled points indicate the transient response of the electric circuit without the low-pass filter, and the solid line indicates the transient response of the transfer function.
  • the "transient response of the electric circuit" in FIG. 4 shows the waveform of the output voltage output from the DC/DC converter 4 when the gain of the device is 0.03 and the time constant is 0.01.
  • the "transient response of the transfer function" in FIG. 9 is obtained by synthesizing the transfer function G1 of the main circuit and the transfer function G2 of the PI controller with the gain set to "0.03" and the time constant set to "0.01". It is a waveform obtained by transient calculation using the transfer function Gx.
  • FIG. 10 is a diagram showing a third example of comparison results between the transient response of the electric circuit and the transient response of the transfer function.
  • the circled dots indicate the transient response of the electrical circuit using the low-pass filter
  • the solid line indicates the transient response of the transfer function.
  • the cutoff frequency of the low-pass filter is the cutoff frequency Fc calculated according to the flowchart of FIG.
  • the output voltage passed through the low-pass filter 10 in the control device 8 in FIG. It is a waveform of the output voltage output from the DC/DC converter 4 when the time constant is 0.03 and the time constant is 0.01.
  • the "transient response of the transfer function" in FIG. 10 is obtained by synthesizing the transfer function G1 of the main circuit and the transfer function G2 of the PI controller with the gain set to "0.03" and the time constant set to "0.01". It is a waveform obtained by transient calculation using the transfer function Gx.
  • FIG. 11 is a diagram showing a fourth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function.
  • the solid line indicates the transient response of the electrical circuit using the low-pass filter
  • the circular dots indicate the transient response of the transfer function.
  • the "transient response of the electric circuit" in FIG. 4 shows the waveform of the output voltage output from the DC/DC converter 4 when the gain of the controller is 0.06 and the time constant is 0.01.
  • the "transient response of the transfer function" in FIG. 11 is obtained by synthesizing the transfer function G1 of the main circuit and the transfer function G2 of the PI controller with the gain set to "0.06" and the time constant set to "0.01". It is a waveform obtained by transient calculation using the transfer function Gx.
  • FIG. 12 is a diagram showing a fifth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function.
  • FIG. 12 describes the time step size used in the transient calculations.
  • FIG. 12 shows a comparison result when the time step size used for the transient calculation of the electric circuit is ⁇ t and the time step size used for the transient calculation of the transfer function is 1000 times ⁇ t. ing.
  • ⁇ t 1.0E-06.
  • the time step width can be made about 1000 times larger than in the transient calculation of the electric circuit.
  • FIG. 13 is a diagram showing a sixth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function.
  • the circled dots indicate the transient response of the electrical circuit using the low-pass filter
  • the solid line indicates the transient response of the transfer function.
  • the time step size cannot be too large (eg, greater than 1.0E-06) in the transient calculations of electrical circuits.
  • the limit value of the time step width at which the transient response of the electric circuit does not cause oscillation is about "1.0E-06".
  • this time step width is used as a reference, in the transient calculation of the transfer function, it is estimated that the time step width can be made about 1000 times larger than in the transient calculation of the electric circuit.
  • FIG. 14 is a diagram for explaining a cutoff frequency setting method according to the modification of the present embodiment.
  • the cutoff frequency Fc is set to the highest frequency in the frequency range R2 used when calculating the transfer function G1 in the flowchart of FIG. This eliminates the need to execute the flow chart of FIG.
  • the cutoff frequency Fc is smaller than the setting method Z1 of the cutoff frequency Fc according to FIG. Therefore, if it is desired to simulate the transient response of an electric circuit using a transfer function at a frequency as high as possible, the setting method Z1 of the cutoff frequency Fc according to FIG. 6 should be selected.
  • a setting person may arbitrarily select one of the setting methods according to various conditions.
  • the setting method Z1 and the setting method Z2 have different oscillation conditions depending on the value of the control constant.
  • the control constants of the feedback control evaluated by the transfer function can be used in the electric circuit model.
  • control circuit 5 sets the low-pass It is configured to set the cutoff frequency Fc of the filter 10 .
  • control circuit 5 uses the setting method Z1 to set the cutoff frequency Fc to the highest frequency in the frequency range R1.
  • control circuit 5 uses setting method Z2 to set cutoff frequency Fc to the highest frequency in frequency range R2 included in frequency range R1.
  • Embodiment 1 a transfer function that simulates the frequency characteristics of the DC/DC converter 4 is generated, and the error between the frequency characteristics of the DC/DC converter 4 and the frequency characteristics of the transfer function is within the allowable range. Based on this, the cutoff frequency Fc is set. Thereby, the response of the DC/DC converter 4 by feedback control using the low-pass filter with the cutoff frequency Fc set can be matched with the response of the transfer function. Therefore, the control constant of the feedback control evaluated by the transfer function can be used as it is as the control constant in the electric circuit model of the DC/DC converter.
  • the transfer function transient calculation does not need to consider the switching frequency of the semiconductor circuit elements. Therefore, the transient calculation of the transfer function can have a larger time step size than the transient calculation of the electrical network, and the calculation time can be shortened.
  • Embodiment 2 describes a configuration for obtaining control constants of a feedback controller using machine learning.
  • FIG. 15 is a configuration diagram of a learning unit related to the DC/DC conversion device.
  • learning unit 250 included in control device 8 includes a data acquisition unit 251 , a model generation unit 255 , a learning result storage unit 260 and an action selection unit 262 .
  • the learning unit 250 may be dedicated hardware, or may be implemented by a processor that executes a program stored in the internal memory of the control device 8 .
  • the input parameters of the learning unit 250 are state variables.
  • the state variables are the maximum error between the output value (that is, the output voltage) of the DC/DC converter 4 shown in FIG. and control constants (eg, gain and time constants).
  • control constants eg, gain and time constants.
  • the target value is arbitrarily determined by the designer.
  • An output parameter of the learning unit 250 is a behavior value.
  • the action value is a control constant that maximizes future rewards.
  • the control circuit 5 outputs to the learning section 250 the maximum error between the output value of the DC/DC converter 4 and the target value at the time of load fluctuation when the control constant output from the learning section 250 is set in the feedback controller. do.
  • the data acquisition unit 251 acquires learning data including the maximum error between the output voltage of the DC/DC converter 4 and the target voltage and the control constant of the feedback controller selected by the action selection unit 262 .
  • the model generation unit 255 learns the optimum control constant that reduces the maximum error based on the learning data containing the maximum error and the control constant. That is, the model generator 255 uses the learning data to generate a trained model for estimating the optimum control constant from the maximum error.
  • supervised learning ie, agent
  • unsupervised learning ie, unsupervised learning
  • reinforcement learning an agent (ie, agent) in an environment observes the current state (ie, parameters of the environment) and decides what action to take.
  • the environment dynamically changes according to the actions of the agent, and the agent is rewarded according to the change in the environment.
  • the agent repeats this and learns the course of action that yields the most rewards through a series of actions.
  • Q-learning is known as a representative method of reinforcement learning.
  • action value Q of action a with the highest Q value at time t+1 is greater than the action value Q of action a executed at time t
  • action value Q is increased; Decrease the value Q.
  • the action value function Q(s, a) is updated so that the action value Q of action a at time t approaches the best action value at time t+1.
  • the best behavioral value in a certain environment is propagated to the behavioral value in the previous environment.
  • the model generation unit 255 includes the reward calculation unit 253 and the function update unit 254.
  • the reward calculation unit 253 calculates the reward r based on the reward standard that defines how the reward used for learning the learning model is increased or decreased, the control constant, and the maximum error.
  • a reward criterion is set to increase the reward if the maximum error decreases and decrease the reward if the maximum error increases. Specifically, when the obtained control constant is set in the state indicated by the obtained maximum error, the reward calculation unit 253 increases the reward if the maximum error decreases (for example, "+1" reward), and decrease the reward if the maximum error increases (eg, reward "-1").
  • the function updater 254 updates the function for determining the output parameter (that is, the control constant) of the learning unit 250 according to the reward calculated by the reward calculator 253 and outputs it to the learning result storage unit 260 .
  • the action-value function Q(s t , at ) is used as the function for calculating the control constants.
  • s t represents the state of the environment at time t
  • a t represents the action at time t.
  • the action selection unit 262 selects a control constant based on the action value function Q(s, a) that is the learning result of the learning unit 250 stored in the learning result storage unit 260 . Typically, the action selection unit 262 randomly selects control constants in the initial state. The action selection unit 262 selects a control constant using a known action selection method (for example, the ⁇ -greedy method) in the intermediate learning stage. The control constant selected by action selection section 262 becomes the output parameter of learning section 250 .
  • a known action selection method for example, the ⁇ -greedy method
  • the control circuit 5 calculates the maximum error when the control constant output from the learning unit 250 (that is, the control constant selected by the action selection unit 262) is set in the feedback controller, and outputs the maximum error to the learning unit 250. .
  • the data acquisition unit 251 acquires the maximum error and the control constant selected by the action selection unit 262 and outputs them to the model generation unit 255 .
  • the learning unit 250 repeatedly performs the above learning.
  • the function updating unit 254 updates the learning unit It is determined that the learning by 250 is finished.
  • the action selection unit 262 selects the control constant that yields the largest reward based on the converged action-value function Q(s t , a t ) (that is, the optimum control constant is output).
  • the learning result storage unit 260 stores a learned model for estimating the optimum control constant from the maximum error.
  • the time step width can be made larger than in the transient calculation of the electric circuit. Therefore, it is considered that the learning time can be reduced by outputting the maximum error calculated using the transfer function to the learning section 250 .
  • the state variable is the output value of the transfer function Gx obtained by synthesizing the transfer function G1 of the main circuit (that is, the DC/DC converter 4) and the transfer function G2 of the feedback controller that constitutes the feedback control amount calculation unit 14. and the maximum error from the target value, and the control constant of the feedback controller.
  • the output parameters of the learning unit 250 as action values are control constants.
  • the control circuit 5 calculates the maximum error between the output value of the transfer function Gx and the target value when the disturbance corresponding to the load fluctuation is applied to the learning unit. Output to 250.
  • the data acquisition unit 251 of the learning unit 250 acquires learning data including the maximum error between the output value of the transfer function Gx and the target value and the control constant of the feedback controller.
  • the subsequent processing flow of the learning unit 250 is the same as described above.
  • the time step width of the transient calculation of the transfer function is about 1000 times the time step width of the transient calculation of the electric circuit, it is thought that the learning time will be reduced to about 1/1000. For example, if the learning time is one day (that is, 1440 minutes) when using an electric circuit, the learning time when using a transfer function is 1.4 minutes, which can be significantly reduced.
  • the learning time for generating the trained model for calculating the control constant can be greatly shortened. can be done.
  • the configuration illustrated as the above-described embodiment is an example of the configuration of the present disclosure, and can be combined with another known technique. , can also be modified and configured. Further, in the above-described embodiment, the processing and configuration described in other embodiments may be appropriately adopted and implemented.

Abstract

A control device (8) of a DC/DC converter (4) includes: a low-pass filter (10) that executes low-pass filter processing on an output voltage of the DC/DC converter (4); an operation control unit (50) that controls the operation of the DC/DC converter (4) so as to cause the output voltage subjected to the low-pass filter processing to follow a command value; a generation unit (31) that generates a first transfer function for the DC/DC converter (4) so as to simulate a frequency characteristic of the output voltage of the DC/DC converter (4); and a setting unit (33) that sets a cutoff frequency of the low-pass filter (10) on the basis of a first frequency range where the difference between the frequency characteristic of the output voltage of the DC/DC converter (4) and a frequency characteristic of the first transfer function is equal to or less than an acceptable value.

Description

制御装置、ＤＣ／ＤＣ変換装置、および制御方法CONTROL DEVICE, DC/DC CONVERSION DEVICE, AND CONTROL METHOD
　本開示は、ＤＣ／ＤＣコンバータの制御装置、ＤＣ／ＤＣ変換装置、およびＤＣ／ＤＣコンバータの制御方法に関する。 The present disclosure relates to a DC/DC converter control device, a DC/DC conversion device, and a DC/DC converter control method.
　特許４８１６７５４（特許文献１）に係るモータ制御装置は、制御対象の伝達関数の逆モデルに入力し、この逆モデルの出力を、第一のローパスフィルタによりフィルタ処理する。第一のローパスフィルタのカットオフ周波数は、逆モデルの出力に含まれる観測ノイズが減衰するようなカットオフ周波数に設定される。 A motor control device according to Japanese Patent No. 4816754 (Patent Document 1) inputs an inverse model of a transfer function to be controlled, and filters the output of this inverse model with a first low-pass filter. The cutoff frequency of the first low-pass filter is set to a cutoff frequency that attenuates observation noise contained in the output of the inverse model.
特許４８１６７５４号公報Japanese Patent No. 4816754
　ところで、ＤＣ／ＤＣコンバータの周波数特性を模擬する伝達関数を算出して、外乱を考慮したフィードバック制御を評価する場合には、当該伝達関数の応答をＤＣ／ＤＣコンバータの応答と一致させる必要がある。 By the way, when calculating a transfer function that simulates the frequency characteristics of a DC/DC converter and evaluating feedback control considering disturbance, it is necessary to match the response of the transfer function with the response of the DC/DC converter. .
　本開示のある局面における目的は、ＤＣ／ＤＣコンバータの応答と、当該ＤＣ／ＤＣコンバータを模擬する伝達関数の応答とを一致させることが可能な技術を提供することである。 An object of one aspect of the present disclosure is to provide a technique that can match the response of a DC/DC converter with the response of a transfer function simulating the DC/DC converter.
　ある実施の形態に従うＤＣ／ＤＣコンバータの制御装置は、ＤＣ／ＤＣコンバータの出力電圧にローパスフィルタ処理を実行するローパスフィルタと、ローパスフィルタ処理された出力電圧を指令値に追従させるように、ＤＣ／ＤＣコンバータの動作を制御する動作制御部と、ＤＣ／ＤＣコンバータの出力電圧の周波数特性を模擬するように、ＤＣ／ＤＣコンバータの第１伝達関数を生成する生成部と、ＤＣ／ＤＣコンバータの出力電圧の周波数特性と第１伝達関数の周波数特性との誤差が許容値以下となる第１周波数範囲に基づいて、ローパスフィルタのカットオフ周波数を設定する設定部とを備える。 A controller for a DC/DC converter according to an embodiment includes a low-pass filter that performs low-pass filtering on the output voltage of the DC/DC converter, and a DC/DC converter that causes the low-pass filtered output voltage to follow a command value. An operation control unit that controls the operation of the DC converter, a generation unit that generates a first transfer function of the DC/DC converter so as to simulate the frequency characteristics of the output voltage of the DC/DC converter, and an output of the DC/DC converter. a setting unit that sets the cutoff frequency of the low-pass filter based on a first frequency range in which an error between the frequency characteristics of the voltage and the frequency characteristics of the first transfer function is equal to or less than an allowable value.
　他の実施の形態に従うＤＣ／ＤＣ変換装置は、ＤＣ／ＤＣコンバータと、上記制御装置とを備える。 A DC/DC conversion device according to another embodiment includes a DC/DC converter and the control device described above.
　さらに他の実施の形態に従うＤＣ／ＤＣコンバータの制御方法は、ＤＣ／ＤＣコンバータの出力電圧にローパスフィルタ処理を実行するステップと、ローパスフィルタ処理された出力電圧を指令値に追従させるように、ＤＣ／ＤＣコンバータの動作を制御するステップと、ＤＣ／ＤＣコンバータの出力電圧の周波数特性を模擬するように、ＤＣ／ＤＣコンバータの伝達関数を生成するステップと、ＤＣ／ＤＣコンバータの出力電圧の周波数特性と伝達関数の周波数特性との誤差が許容値以下となる周波数範囲に基づいて、ローパスフィルタ処理を実行するローパスフィルタのカットオフ周波数を設定するステップとを含む。 A control method for a DC/DC converter according to yet another embodiment includes the steps of: low-pass filtering an output voltage of the DC/DC converter; controlling the operation of the /DC converter; generating a transfer function of the DC/DC converter so as to simulate the frequency characteristics of the output voltage of the DC/DC converter; and the frequency characteristics of the output voltage of the DC/DC converter. and setting the cutoff frequency of the low-pass filter that performs the low-pass filtering based on the frequency range in which the error between the frequency characteristic of the transfer function and the frequency characteristic of the transfer function is equal to or less than the allowable value.
　本開示によれば、ＤＣ／ＤＣコンバータの応答と、当該ＤＣ／ＤＣコンバータを模擬する伝達関数の応答とを一致させることができる。 According to the present disclosure, it is possible to match the response of a DC/DC converter with the response of a transfer function simulating the DC/DC converter.
ＤＣ／ＤＣ変換装置の構成を示すブロック図である。It is a block diagram which shows the structure of a DC/DC converter. 制御回路の具体的な構成を説明するためのブロック図である。3 is a block diagram for explaining a specific configuration of a control circuit; FIG. ＤＣ／ＤＣコンバータの周波数特性の算出方式を説明するためのブロック図である。FIG. 3 is a block diagram for explaining a method of calculating frequency characteristics of a DC/DC converter; ＤＣ／ＤＣコンバータの出力電圧の周波数特性を示す図である。It is a figure which shows the frequency characteristic of the output voltage of a DC/DC converter. 伝達関数の生成方式を説明するためのフローチャートである。4 is a flowchart for explaining a method of generating a transfer function; ローパスフィルタのカットオフ周波数の設定方式を説明するためのフローチャートである。4 is a flowchart for explaining a method of setting the cutoff frequency of a low-pass filter; 図６のフローチャートに従ってカットオフ周波数を算出した結果の一例を示す図である。FIG. 7 is a diagram showing an example of a result of calculating a cutoff frequency according to the flowchart of FIG. 6; 電気回路の過渡応答と伝達関数の過渡応答との比較結果の第１の例を示す図である。FIG. 4 is a diagram showing a first example of comparison results between the transient response of an electric circuit and the transient response of a transfer function; 電気回路の過渡応答と伝達関数の過渡応答との比較結果の第２の例を示す図である。FIG. 10 is a diagram showing a second example of comparison results between the transient response of the electric circuit and the transient response of the transfer function; 電気回路の過渡応答と伝達関数の過渡応答との比較結果の第３の例を示す図である。FIG. 10 is a diagram showing a third example of comparison results between the transient response of the electric circuit and the transient response of the transfer function; 電気回路の過渡応答と伝達関数の過渡応答との比較結果の第４の例を示す図である。FIG. 10 is a diagram showing a fourth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function; 電気回路の過渡応答と伝達関数の過渡応答との比較結果の第５の例を示す図である。FIG. 10 is a diagram showing a fifth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function; 電気回路の過渡応答と伝達関数の過渡応答との比較結果の第６の例を示す図である。FIG. 12 is a diagram showing a sixth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function; 本実施の形態の変形例に従うカットオフ周波数の設定方式を説明するための図である。FIG. 11 is a diagram for explaining a method of setting a cutoff frequency according to a modified example of the present embodiment; FIG. ＤＣ／ＤＣ変換装置に関する学習部の構成図である。It is a block diagram of the learning part regarding a DC/DC converter.
　以下、図面を参照しつつ、本実施の形態について説明する。以下の説明では、同一の部品には同一の符号を付してある。それらの名称および機能も同じである。したがって、それらについての詳細な説明は繰り返さない。 The present embodiment will be described below with reference to the drawings. In the following description, the same parts are given the same reference numerals. Their names and functions are also the same. Therefore, detailed description thereof will not be repeated.
　実施の形態１．
　＜ＤＣ／ＤＣ変換装置の構成＞
　図１は、ＤＣ／ＤＣ変換装置の構成を示すブロック図である。図１を参照して、ＤＣ／ＤＣ変換装置１は、直流電源２と負荷３との間に設けられた電力変換装置である。具体的には、ＤＣ／ＤＣ変換装置１は、主回路としてのＤＣ／ＤＣコンバータ４と、ＤＣ／ＤＣコンバータ４の制御装置８と、電圧検出器７とを含む。 Embodiment 1.
<Configuration of DC/DC converter>
FIG. 1 is a block diagram showing the configuration of a DC/DC converter. Referring to FIG. 1 , DC/DC converter 1 is a power converter provided between DC power supply 2 and load 3 . Specifically, DC/DC converter 1 includes DC/DC converter 4 as a main circuit, controller 8 for DC/DC converter 4 , and voltage detector 7 .
　ＤＣ／ＤＣコンバータ４の一端には直流電源２が接続され、他端には負荷３が接続される。電圧検出器７は、ＤＣ／ＤＣコンバータ４の出力電圧を検出し、当該出力電圧の検出値を制御装置８および周波数分析装置１２に出力する。ＤＣ／ＤＣコンバータ４は、双方向のＤＣ／ＤＣコンバータであってもよい。 A DC power supply 2 is connected to one end of the DC/DC converter 4, and a load 3 is connected to the other end. Voltage detector 7 detects the output voltage of DC/DC converter 4 and outputs the detected value of the output voltage to control device 8 and frequency analysis device 12 . The DC/DC converter 4 may be a bidirectional DC/DC converter.
　制御装置８は、制御回路５と、信号生成回路６と、ローパスフィルタ１０とを含む。制御回路５、信号生成回路６およびローパスフィルタ１０の各々は、専用のハードウェアであってもよいし、制御装置８の内部メモリ（例えば、ＲＯＭ（Read　Only　Memory）、ＲＡＭ（Random　Access　Memory）、ハードディスク等）に格納されるプログラムを実行するＣＰＵ（Central　Processing　Unit）等のプロセッサで実現される構成であってもよい。例えば、制御回路５が専用のハードウェアである場合、制御回路５は、ＦＰＧＡ（Field　Programmable　Gate　Array）、ＡＳＩＣ（Application　Specific　Integrated　Circuit）、またはこれらを組み合わせたもの等で構成される。 The control device 8 includes a control circuit 5, a signal generation circuit 6, and a low-pass filter 10. Each of the control circuit 5, the signal generation circuit 6, and the low-pass filter 10 may be dedicated hardware, or the internal memory of the control device 8 (for example, ROM (Read Only Memory), RAM (Random Access Memory), A configuration implemented by a processor such as a CPU (Central Processing Unit) that executes a program stored in a hard disk, etc., may also be used. For example, when the control circuit 5 is dedicated hardware, the control circuit 5 is configured by FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or a combination thereof.
　ローパスフィルタ１０は、検出された出力電圧に対してローパスフィルタ処理を実行して、高周波成分を除去した出力電圧を制御回路５に出力する。 The low-pass filter 10 performs low-pass filtering on the detected output voltage, and outputs to the control circuit 5 the output voltage from which high frequency components have been removed.
　制御回路５は、通常動作時に、ＤＣ／ＤＣコンバータ４を動作させるための制御信号Ｐ１を生成する。具体的には、制御回路５は、ローパスフィルタ処理された出力電圧を用いて各種演算を実行することにより、ＤＣ／ＤＣコンバータ４のスイッチング素子をＯＮ／ＯＦＦするための制御信号Ｐ１を生成する。制御回路５は、制御信号Ｐ１をＤＣ／ＤＣコンバータ４に出力する。 The control circuit 5 generates a control signal P1 for operating the DC/DC converter 4 during normal operation. Specifically, the control circuit 5 generates a control signal P1 for turning ON/OFF the switching element of the DC/DC converter 4 by executing various calculations using the low-pass filtered output voltage. Control circuit 5 outputs control signal P<b>1 to DC/DC converter 4 .
　信号生成回路６は、ＤＣ／ＤＣコンバータ４の出力電圧の周波数特性（すなわち、周波数応答）を取得する際に、ＤＣ／ＤＣコンバータ４を動作させるための制御信号Ｐ２を生成する。信号生成回路６は、周波数分析装置１２から受け付けた各周波数の正弦波と、制御量とに基づく制御信号Ｐ２をＤＣ／ＤＣコンバータ４に出力する。 The signal generation circuit 6 generates a control signal P2 for operating the DC/DC converter 4 when acquiring the frequency characteristics (that is, frequency response) of the output voltage of the DC/DC converter 4. The signal generation circuit 6 outputs to the DC/DC converter 4 a control signal P2 based on the sine wave of each frequency received from the frequency analysis device 12 and the control amount.
　周波数分析装置１２は、各周波数の正弦波を信号生成回路６に対して出力する。周波数分析装置１２は、信号生成回路６により生成された制御信号Ｐ２によって動作したＤＣ／ＤＣコンバータ４の出力電圧の入力を受け付ける。周波数分析装置１２は、当該出力電圧の周波数特性を算出してデータベース１９に格納する。 The frequency analysis device 12 outputs a sine wave of each frequency to the signal generation circuit 6. Frequency analysis device 12 receives an input of the output voltage of DC/DC converter 4 operated by control signal P2 generated by signal generation circuit 6 . The frequency analyzer 12 calculates the frequency characteristic of the output voltage and stores it in the database 19 .
　図１の例では、周波数分析装置１２およびデータベース１９は、ＤＣ／ＤＣ変換装置１の外部装置である構成について説明した。しかし、周波数分析装置１２およびデータベース１９は、ＤＣ／ＤＣ変換装置１に含まれる構成であってもよい。また、周波数分析装置１２は、周波数特性を測定する際にＤＣ／ＤＣ変換装置１に接続される構成であってもよい。なお、ＤＣ／ＤＣコンバータ４の周波数特性は、実機を用いて算出される構成であってもよいし、ＤＣ／ＤＣコンバータ４の電気回路モデルを用いてシミュレーションにより算出される構成であってもよい。 In the example of FIG. 1, the configuration in which the frequency analysis device 12 and the database 19 are external devices of the DC/DC conversion device 1 has been described. However, frequency analysis device 12 and database 19 may be included in DC/DC conversion device 1 . Further, the frequency analysis device 12 may be configured to be connected to the DC/DC conversion device 1 when measuring frequency characteristics. Note that the frequency characteristics of the DC/DC converter 4 may be calculated using an actual device, or may be calculated by simulation using an electric circuit model of the DC/DC converter 4. .
　＜制御回路の構成＞
　図２は、制御回路の具体的な構成を説明するためのブロック図である。図２を参照して、制御回路５は、動作制御部５０と、伝達関数生成部３１と、設定部３３とを含む。なお、ローパスフィルタ１０は、ＤＣ／ＤＣコンバータ４の出力電圧にローパスフィルタ処理を実行する。 <Configuration of control circuit>
FIG. 2 is a block diagram for explaining a specific configuration of the control circuit. Referring to FIG. 2 , control circuit 5 includes an operation control portion 50 , a transfer function generation portion 31 and a setting portion 33 . Note that the low-pass filter 10 performs low-pass filtering on the output voltage of the DC/DC converter 4 .
　動作制御部５０は、ローパスフィルタ処理された出力電圧を指令値に追従させるように、ＤＣ／ＤＣコンバータ４の動作を制御する。具体的には、動作制御部５０は、減算部１３と、フィードバック制御量算出部１４と、リミッタ処理部１５と、制御信号生成部１６とを含む。 The operation control unit 50 controls the operation of the DC/DC converter 4 so that the low-pass filtered output voltage follows the command value. Specifically, operation control section 50 includes subtraction section 13 , feedback control amount calculation section 14 , limiter processing section 15 , and control signal generation section 16 .
　減算部１３は、上位装置（不図示）から送信された指令値Ｖｓから、ローパスフィルタ処理された出力電圧Ｖ＊を減算した偏差ΔＶ（＝Ｖｓ－Ｖ＊）を算出する。 The subtraction unit 13 calculates a deviation ΔV (=Vs−V*) by subtracting the low-pass filtered output voltage V* from the command value Vs transmitted from the host device (not shown).
　フィードバック制御量算出部１４は、フィードバック制御器（例えば、Ｐ制御器、ＰＩ制御器、ＰＤ制御器、ＰＩＤ制御器）により構成される。フィードバック制御量算出部１４は、偏差ΔＶを用いて、フィードバック制御（例えば、Ｐ制御、ＰＩ制御、ＰＤ制御、ＰＩＤ制御等）を実行することにより制御量を算出する。典型的には、フィードバック制御量算出部１４は、偏差ΔＶを０にするためのフィードバック制御により、制御量Ｘを生成する。 The feedback control amount calculator 14 is composed of a feedback controller (for example, a P controller, a PI controller, a PD controller, and a PID controller). The feedback control amount calculator 14 uses the deviation ΔV to calculate the control amount by executing feedback control (for example, P control, PI control, PD control, PID control, etc.). Typically, the feedback control amount calculator 14 generates the control amount X by feedback control for making the deviation ΔV zero.
　リミッタ処理部１５は、制御量Ｘをリミット範囲内（すなわち、下限値：Ｘｄ、上限値：Ｘｕ）に制限する。具体的には、リミッタ処理部１５は、制御量Ｘが上限値Ｘｕを上回った場合には上限値Ｘｕに設定した制御量Ｘを出力し、制御量Ｘが下限値Ｘｄを下回った場合には下限値Ｘｄに設定した制御量Ｘを出力し、制御量Ｘが下限値Ｘｄ以上かつ上限値Ｘｕ以下の場合には、当該制御量Ｘを出力する。例えば、上限値Ｘｕは“１”、下限値Ｘｄは“０”である。 The limiter processing unit 15 limits the control amount X within the limit range (that is, lower limit: Xd, upper limit: Xu). Specifically, the limiter processing unit 15 outputs the controlled variable X set to the upper limit Xu when the controlled variable X exceeds the upper limit Xu, and outputs the controlled variable X set to the upper limit Xu when the controlled variable X falls below the lower limit Xd. A controlled variable X set to the lower limit value Xd is output, and when the controlled variable X is equal to or greater than the lower limit value Xd and equal to or less than the upper limit value Xu, the controlled variable X is output. For example, the upper limit value Xu is "1" and the lower limit value Xd is "0".
　制御信号生成部１６は、制御量Ｘとキャリア信号とを比較し、この比較結果に基づいて、ＰＷＭ信号としての制御信号Ｐ１を生成する。例えば、キャリア信号として三角波が用いられる。制御信号生成部１６は、制御信号Ｐ１をＤＣ／ＤＣコンバータ４に送信する。ＤＣ／ＤＣコンバータ４は、制御信号Ｐ１に従って、スイッチング素子をＯＮ／ＯＦＦすることにより、直流電源２から負荷３に電力を供給する。 The control signal generation unit 16 compares the control amount X and the carrier signal, and generates a control signal P1 as a PWM signal based on the comparison result. For example, a triangular wave is used as the carrier signal. The control signal generator 16 transmits the control signal P1 to the DC/DC converter 4 . The DC/DC converter 4 supplies power from the DC power supply 2 to the load 3 by turning ON/OFF the switching element according to the control signal P1.
　伝達関数生成部３１は、データベース１９に格納された、ＤＣ／ＤＣコンバータ４の出力電圧の周波数特性を模擬するように、ＤＣ／ＤＣコンバータ４の伝達関数を生成する。伝達関数の生成方式の詳細については後述する。 The transfer function generator 31 generates a transfer function of the DC/DC converter 4 stored in the database 19 so as to simulate the frequency characteristics of the output voltage of the DC/DC converter 4 . The details of the transfer function generation method will be described later.
　設定部３３は、ＤＣ／ＤＣコンバータ４の出力電圧の周波数特性と、生成された伝達関数の周波数特性とに基づいて、ローパスフィルタ１０のカットオフ周波数Ｆｃを設定する。カットオフ周波数Ｆｃは、ローパスフィルタ１０に出力される。カットオフ周波数Ｆｃの設定方式の詳細については後述する。 The setting unit 33 sets the cutoff frequency Fc of the low-pass filter 10 based on the frequency characteristics of the output voltage of the DC/DC converter 4 and the frequency characteristics of the generated transfer function. The cutoff frequency Fc is output to the low pass filter 10 . The details of the method for setting the cutoff frequency Fc will be described later.
　＜ＤＣ／ＤＣコンバータの周波数特性＞
　図３は、ＤＣ／ＤＣコンバータの周波数特性の算出方式を説明するためのブロック図である。図３を参照して、制御装置８の信号生成回路６は、加算部２５と、制御信号生成部２６とを含む。 <Frequency characteristics of DC/DC converter>
FIG. 3 is a block diagram for explaining a method of calculating frequency characteristics of a DC/DC converter. Referring to FIG. 3 , signal generating circuit 6 of control device 8 includes an adding section 25 and a control signal generating section 26 .
　周波数分析装置１２は、周波数設定部２０と、正弦波生成部２１と、周波数特性算出部２２とを含む。これらの各機能は、処理回路により実現される。処理回路は、専用のハードウェアであってもよいし、周波数分析装置１２の内部メモリに格納されるプログラムを実行するプロセッサであってもよい。処理回路が専用のハードウェアである場合、処理回路は、例えば、ＦＰＧＡ、ＡＳＩＣ、またはこれらを組み合わせたもの等で構成される。 The frequency analysis device 12 includes a frequency setting section 20, a sine wave generation section 21, and a frequency characteristic calculation section 22. Each of these functions is implemented by a processing circuit. The processing circuit may be dedicated hardware, or may be a processor that executes a program stored in the internal memory of the frequency analysis device 12 . If the processing circuitry is dedicated hardware, the processing circuitry may be, for example, an FPGA, an ASIC, or a combination thereof.
　周波数設定部２０は、測定対象の周波数範囲（すなわち、周波数応答区間）の最低周波数および最高周波数と、周波数範囲の分割数とに基づいて、周波数ｆ（例えば、周波数範囲を均等分割した周波数）を算出する。周波数設定部２０は、算出された周波数ｆを低周波側から順番に正弦波生成部２１および周波数特性算出部２２に送信する。周波数設定部２０は、例えば、周波数特性算出部２２により前回の周波数ｆに対するゲインおよび位相が算出されたタイミングで今回の周波数ｆを送信してもよいし、事前に設定された一定時間ごとのタイミングで周波数ｆを送信してもよい。 The frequency setting unit 20 sets the frequency f (e.g., the frequency obtained by equally dividing the frequency range) based on the lowest frequency and highest frequency of the frequency range to be measured (that is, the frequency response section) and the number of divisions of the frequency range. calculate. The frequency setting unit 20 transmits the calculated frequencies f to the sine wave generation unit 21 and the frequency characteristic calculation unit 22 in order from the low frequency side. For example, the frequency setting unit 20 may transmit the current frequency f at the timing when the gain and phase for the previous frequency f are calculated by the frequency characteristic calculation unit 22, or may transmit the current frequency f at predetermined intervals. may transmit frequency f.
　正弦波生成部２１は、周波数特性を測定する対象の周波数ｆを受け付けて、“Ｂｓｉｎ（２πｆｔ）”で表わされる正弦波を信号生成回路６に出力する。“Ｂ”は正弦波の振幅を示し、“ｔ”は時間を示している。振幅Ｂは、例えば、信号生成回路６に入力される制御量Ａの１／１０程度に設定される。 The sine wave generation unit 21 receives a frequency f whose frequency characteristics are to be measured, and outputs a sine wave represented by "Bsin(2πft)" to the signal generation circuit 6 . "B" indicates the amplitude of the sine wave and "t" indicates time. The amplitude B is set to about 1/10 of the control amount A input to the signal generation circuit 6, for example.
　信号生成回路６の加算部２５は、制御量Ａと、正弦波生成部２１により生成された正弦波とを加算した値を制御信号生成部２６に出力する。制御量Ａは、リミッタ処理部１５の上限値Ｘｕから下限値Ｘｄまでの範囲に含まれる値である。例えば、ＤＣ／ＤＣコンバータ４が降圧チョッパである場合には、制御量Ａはデューティー比を示す。この場合、制御量Ａは、上限値“１”から下限値“０”の範囲を取り得る。ＤＣ／ＤＣコンバータ４がＤＡＢ（Dual　Active　Bridge）コンバータである場合、制御量Ａは位相シフトの割合を示す。この場合、制御量Ａは、最小値“０”から最大値“１”の範囲を取り得る。 The addition unit 25 of the signal generation circuit 6 outputs a value obtained by adding the control amount A and the sine wave generated by the sine wave generation unit 21 to the control signal generation unit 26 . The control amount A is a value within the range from the upper limit value Xu to the lower limit value Xd of the limiter processing section 15 . For example, when the DC/DC converter 4 is a step-down chopper, the control amount A indicates the duty ratio. In this case, the controlled variable A can range from the upper limit value of "1" to the lower limit value of "0". If the DC/DC converter 4 is a DAB (Dual Active Bridge) converter, the control amount A indicates the phase shift ratio. In this case, the control amount A can range from the minimum value "0" to the maximum value "1".
　制御信号生成部２６は、加算部２５から出力される加算値と、キャリア信号とを比較し、この比較結果に基づいて、ＰＷＭ信号としての制御信号Ｐ２を生成する。例えば、キャリア信号として三角波が用いられる。制御信号生成部１６は、制御信号Ｐ２をＤＣ／ＤＣコンバータ４に送信する。ＤＣ／ＤＣコンバータ４は、制御信号Ｐ２に従って、スイッチング素子をＯＮ／ＯＦＦすることにより電圧を出力する。 The control signal generator 26 compares the added value output from the adder 25 and the carrier signal, and generates a control signal P2 as a PWM signal based on the comparison result. For example, a triangular wave is used as the carrier signal. The control signal generator 16 transmits the control signal P2 to the DC/DC converter 4 . The DC/DC converter 4 outputs a voltage by turning ON/OFF the switching element according to the control signal P2.
　周波数分析装置１２の周波数特性算出部２２は、周波数ｆとＤＣ／ＤＣコンバータ４の出力電圧Ｖとを受け付ける。周波数特性算出部２２は、出力電圧Ｖが定常状態（例えば、出力電圧Ｖの最大値が誤差１％以内の変動に収まった状態）になると、出力波形をＦＦＴ（Fast　Fourier　Transformation）解析することにより、受け付けた周波数ｆの成分に対応するゲインおよび位相を算出する。周波数特性算出部２２は、周波数ｆに対応するゲインおよび位相をデータベース１９に格納する。 The frequency characteristic calculator 22 of the frequency analysis device 12 receives the frequency f and the output voltage V of the DC/DC converter 4 . When the output voltage V is in a steady state (for example, when the maximum value of the output voltage V is fluctuated within an error of 1%), the frequency characteristic calculation unit 22 performs FFT (Fast Fourier Transformation) analysis on the output waveform. , calculates the gain and phase corresponding to the received frequency f component. The frequency characteristic calculator 22 stores the gain and phase corresponding to the frequency f in the database 19 .
　最低周波数から最高周波数までの周波数範囲の各周波数ｆについて、周波数分析装置１２および信号生成回路６は、上述した処理を繰り返し実行する。これにより、各周波数ｆに対応するゲインおよび位相がデータベース１９に格納され、図４に示すようなＤＣ／ＤＣコンバータ４の出力電圧の周波数特性（すなわち、ゲイン特性および位相特性）を示すファイル（以下、「周波数特性ファイル」とも称する。）が生成される。周波数特性ファイルは、番号ｉごとに、周波数ｆ（ｉ）と、ゲインＫ（ｉ）と、位相θ（ｉ）とを関連付けたファイルである。 For each frequency f in the frequency range from the lowest frequency to the highest frequency, the frequency analysis device 12 and signal generation circuit 6 repeatedly perform the above-described processing. As a result, the gain and phase corresponding to each frequency f are stored in the database 19, and a file (hereinafter referred to as a , also referred to as a “frequency characteristic file”) is generated. The frequency characteristic file is a file that associates frequency f(i), gain K(i), and phase θ(i) for each number i.
　図４は、ＤＣ／ＤＣコンバータの出力電圧の周波数特性を示す図である。図４を参照して、グラフ６１はゲイン特性を示しており、グラフ６２は位相特性を示している。図４に示す各グラフ６１，６２は、データベース１９に格納された周波数特性ファイルに基づいて生成される。 FIG. 4 is a diagram showing the frequency characteristics of the output voltage of the DC/DC converter. Referring to FIG. 4, graph 61 indicates gain characteristics and graph 62 indicates phase characteristics. Graphs 61 and 62 shown in FIG. 4 are generated based on the frequency characteristic files stored in the database 19 .
　上記では、図４に示すような周波数特性を得るために、制御装置８において、図３の信号生成回路６を別途用いる構成について説明したが、当該構成に限られない。例えば、制御回路５の制御信号生成部１６を利用して制御信号Ｐ２を生成する構成であってもよい。 In the above description, a configuration was described in which the signal generation circuit 6 of FIG. 3 was additionally used in the control device 8 in order to obtain the frequency characteristics shown in FIG. 4, but the configuration is not limited to this. For example, the control signal generator 16 of the control circuit 5 may be used to generate the control signal P2.
　具体的には、図２の動作制御部５０の減算部１３、フィードバック制御量算出部１４およびリミッタ処理部１５の各機能は無効化され、リミッタ処理部１５によるリミット処理済の制御量Ｘは制御信号生成部１６には入力されない。その代わりに、信号生成回路６の加算部２５が動作制御部５０に設けられる。加算部２５は、加算値（すなわち、制御量Ａと、正弦波生成部２１により生成された正弦波との加算値）を制御信号生成部１６に入力する。そして、制御信号生成部１６は、当該加算値とキャリア信号とを比較し、この比較結果に基づいて、制御信号Ｐ２を生成する。 Specifically, the functions of the subtraction unit 13, the feedback control amount calculation unit 14, and the limiter processing unit 15 of the operation control unit 50 shown in FIG. It is not input to the signal generator 16 . Instead, the addition section 25 of the signal generation circuit 6 is provided in the operation control section 50 . The adder 25 inputs the added value (that is, the added value of the control amount A and the sine wave generated by the sine wave generator 21 ) to the control signal generator 16 . Then, the control signal generator 16 compares the added value with the carrier signal, and generates the control signal P2 based on the comparison result.
　＜伝達関数の生成方式＞
　本実施の形態では、図４に示すＤＣ／ＤＣコンバータ４の周波数特性の波形を模擬する式（１）に示す伝達関数Ｇ１（例えば、波形の最大誤差が１％以内に収まる）を考える。 <Transfer function generation method>
In the present embodiment, a transfer function G1 shown in Equation (1) that simulates the waveform of the frequency characteristics of DC/DC converter 4 shown in FIG. 4 (for example, the maximum error of the waveform is within 1%) is considered.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
　ここで、式（１）の“ａｎ、ｂｍ、…、ａ０、ｂ０”は係数である。ＤＣ／ＤＣコンバータ４の周波数特性の波形（例えば、図４のグラフ６１，６２）と、伝達関数Ｇ１の周波数特性との間で、各周波数における最大誤差が１％以内となるように最大許容誤差を設定して最小二乗法を適用することによって、伝達関数Ｇ１の各係数が求められる。 Here, “a n , b m , . . . , a 0 , b 0 ” in Equation (1) are coefficients. The maximum permissible error between the waveform of the frequency characteristics of the DC/DC converter 4 (for example, graphs 61 and 62 in FIG. 4) and the frequency characteristics of the transfer function G1 is within 1% at each frequency. Each coefficient of the transfer function G1 is determined by setting and applying the method of least squares.
　続いて、最小二乗法によって求めた係数を用いた伝達関数Ｇ１の分母Ｇ１ｂを示す下記の式（２）が０（すなわち、Ｇ１ｂ＝０）となる解（すなわち、伝達関数Ｇ１の極）を求める。 Subsequently, the solution (that is, the pole of the transfer function G1) that makes the following equation (2) representing the denominator G1b of the transfer function G1 using the coefficients obtained by the method of least squares 0 (that is, G1b = 0) is obtained. .
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
　極の実部（すなわち、複素数の解の実部）の符号の少なくとも１つが負ではない場合、定常状態において伝達関数Ｇ１の値が発振等を起こすため、求められた係数を伝達関数Ｇ１の係数として用いることができない。したがって、極の実部の符号がすべて負となるような係数を求める必要がある。以下、図５のフローチャートを用いて伝達関数Ｇ１の生成方式について具体的に説明する。 If at least one of the signs of the real parts of the poles (that is, the real part of the solution of the complex number) is not negative, the value of the transfer function G1 will oscillate in the steady state. cannot be used as Therefore, it is necessary to find coefficients that make the signs of the real parts of the poles all negative. The method of generating the transfer function G1 will be specifically described below with reference to the flow chart of FIG.
　図５は、伝達関数の生成方式を説明するためのフローチャートである。図５の各処理は、制御回路５（例えば、伝達関数生成部３１）によって実行される。 FIG. 5 is a flowchart for explaining the transfer function generation method. Each process in FIG. 5 is executed by the control circuit 5 (for example, the transfer function generator 31).
　制御回路５は、求めたい伝達関数Ｇ１の周波数範囲の周波数ｆ（ｉ）の開始番号ｉｓおよび終了番号ｉｅを設定する（ステップＳ１００）。 The control circuit 5 sets the start number is and the end number ie of the frequency f(i) in the frequency range of the desired transfer function G1 (step S100).
　制御回路５は、ゲインの許容誤差εＫ（％）と位相の許容誤差εθ（％）とを設定する（ステップＳ１１０）。許容誤差εＫは、データベース１９の周波数特性ファイルにおけるゲインと、伝達関数Ｇ１から求められるゲインとの誤差の許容値である。許容誤差εθは、データベース１９の周波数特性ファイルにおける位相と、伝達関数Ｇ１から求められる位相との誤差の許容値である。 The control circuit 5 sets the gain tolerance εK (%) and the phase tolerance εθ (%) (step S110). The allowable error εK is an allowable error value between the gain in the frequency characteristic file of the database 19 and the gain obtained from the transfer function G1. The allowable error εθ is an allowable error value between the phase in the frequency characteristic file of the database 19 and the phase obtained from the transfer function G1.
　制御回路５は、想定する伝達関数Ｇ１の分母Ｇ１ｂの式（２）の許容次数ｍ０を設定する（ステップＳ１２０）。制御回路５は、伝達関数Ｇ１の分子Ｇ１ａ（すなわち、ａｎｓｎ＋ａｎ－１ｓｎ－１＋…＋ａ０）の初期次数をｎ＝０に設定する（ステップＳ１３０）。制御回路５は、伝達関数Ｇ１の分母Ｇ１ｂの初期次数をｍ＝１に設定する（ステップＳ１４０）。制御回路５は、データベース１９に格納された周波数特性ファイルから周波数ｆ（ｉ）、ゲインＫ（ｉ）、位相θ（ｉ）を読み込む（ステップＳ１５０）。 The control circuit 5 sets the allowable order m0 of the equation (2) of the denominator G1b of the assumed transfer function G1 (step S120). The control circuit 5 sets the initial order of the numerator G1a (that is, a n s n +a n−1 s n−1 + . . . +a 0 ) of the transfer function G1 to n=0 (step S130). The control circuit 5 sets the initial degree of the denominator G1b of the transfer function G1 to m=1 (step S140). The control circuit 5 reads the frequency f(i), the gain K(i), and the phase θ(i) from the frequency characteristic file stored in the database 19 (step S150).
　制御回路５は、伝達関数Ｇ１の分子Ｇ１ａの最大次数ｎが分母Ｇ１ｂの最大次数ｍよりも大きいか否か（すなわち、ｎ＞ｍ）を判断する。ｎ＞ｍである場合（ステップＳ１６０においてＹＥＳ）、制御回路５は、分子Ｇ１ａの最大次数をｎ＝０に設定し（ステップＳ１７０）、分母Ｇ１ｂの最大次数をインクリメント（すなわち、ｍ＝ｍ＋１に設定）する（ステップＳ１９０）。一方、ｎ≦ｍである場合（ステップＳ１６０においてＮＯ）、制御回路５は、分子Ｇ１ａの最大次数ｎをインクリメント（すなわち、ｎ＝ｎ＋１に設定）する（ステップＳ１８０）。 The control circuit 5 determines whether or not the maximum degree n of the numerator G1a of the transfer function G1 is greater than the maximum degree m of the denominator G1b (that is, n>m). If n>m (YES in step S160), control circuit 5 sets the maximum degree of numerator G1a to n=0 (step S170), and increments the maximum degree of denominator G1b (that is, sets m=m+1). ) (step S190). On the other hand, if n≦m (NO in step S160), control circuit 5 increments the maximum degree n of numerator G1a (that is, sets n=n+1) (step S180).
　続いて、制御回路５は、最小二乗法近似法を用いて、開始番号ｉｓから終了番号ｉｅまでの“ｉｅ―ｉｓ＋１”個のデータについて、番号ｉ（ｉｓ≦ｉ≦ｉｅ）のゲインＫ（ｉ）および位相θ（ｉ）の近似値を求めるための式（１）の伝達関数Ｇ１の係数を算出する（ステップＳ２００）。 Subsequently, the control circuit 5 uses the least-squares approximation method to obtain the gain K(i ) and the coefficient of the transfer function G1 of the equation (1) for obtaining the approximate value of the phase θ(i) (step S200).
　制御回路５は、各周波数ｆ（ｉ）について、周波数特性ファイルのゲインＫ（ｉ）と、算出された係数を用いた伝達関数Ｇ１のゲインとの誤差を順次算出し、これらの各誤差のうちの最大誤差Ｋｍａｘを求める（ステップＳ２１０）。 The control circuit 5 sequentially calculates the error between the gain K(i) of the frequency characteristic file and the gain of the transfer function G1 using the calculated coefficient for each frequency f(i). , the maximum error Kmax is obtained (step S210).
　制御回路５は、各周波数ｆ（ｉ）について、周波数特性ファイルの位相θ（ｉ）と、算出された係数を用いた伝達関数Ｇ１の位相との誤差を順次算出し、これらの各誤差のうちの最大誤差θｍａｘを求める（ステップＳ２２０）。 The control circuit 5 sequentially calculates the error between the phase θ(i) of the frequency characteristic file and the phase of the transfer function G1 using the calculated coefficient for each frequency f(i). is obtained (step S220).
　制御回路５は、ゲインの最大誤差Ｋｍａｘが許容誤差εＫ以下であって（すなわち、Ｋｍａｘ≦εＫ）、かつ、位相の最大誤差θｍａｘが許容誤差εθ以下である（すなわち、θｍａｘ≦εθ）であるとの条件が成立するか否かを判断する（ステップＳ２３０）。当該条件が成立しない場合（ステップＳ２３０においてＮＯ）、制御回路５はステップＳ１６０の処理に戻る。当該条件が成立する場合（ステップＳ２３０においてＹＥＳ）、制御回路５は、伝達関数Ｇ１の極を算出する（ステップＳ２４０）。具体的には、制御回路５は、算出された係数を式（２）に代入して、分母Ｇ１ｂ＝０となる極を算出する。 The control circuit 5 determines that the maximum error Kmax of the gain is equal to or less than the allowable error εK (that is, Kmax≦εK) and that the maximum error θmax of the phase is equal to or less than the allowable error εθ (that is, θmax≦εθ). is established (step S230). If the condition is not satisfied (NO in step S230), control circuit 5 returns to the process of step S160. If the condition is satisfied (YES in step S230), control circuit 5 calculates the pole of transfer function G1 (step S240). Specifically, the control circuit 5 substitutes the calculated coefficient into the equation (2) to calculate the pole where the denominator G1b=0.
　続いて、制御回路５は、極の実部の符号がすべて負であるか否かを判断する（ステップＳ２５０）。極の実部の符号がすべて負である場合（ステップＳ２５０においてＹＥＳ）、制御回路５は、算出された係数を、伝達関数Ｇ１の係数として最終決定する（ステップＳ２７０）。これにより、ＤＣ／ＤＣコンバータ４の出力電圧の周波数特性（すなわち、データベース１９に格納された周波数特性ファイル）を模擬した伝達関数Ｇ１が求められる。 Subsequently, the control circuit 5 determines whether or not the signs of the real parts of the poles are all negative (step S250). If the signs of the real parts of the poles are all negative (YES in step S250), control circuit 5 finally determines the calculated coefficients as the coefficients of transfer function G1 (step S270). Thereby, a transfer function G1 that simulates the frequency characteristic of the output voltage of the DC/DC converter 4 (that is, the frequency characteristic file stored in the database 19) is obtained.
　そうではない場合（ステップＳ２５０においてＮＯ）、制御回路５は、分母Ｇ１ｂの最大次数ｍ＋１が許容次数ｍ０よりも大きい（すなわち、ｍ＋１＞ｍ０）か否かを判断する（ステップＳ２６０）。ｍ＋１＞ｍ０である場合（ステップＳ２６０においてＹＥＳ）、制御回路５は処理を終了する。ｍ＋１≦ｍ０である場合（ステップＳ２６０においてＮＯ）、制御回路５はステップＳ１６０の処理に戻る。 Otherwise (NO in step S250), the control circuit 5 determines whether the maximum degree m+1 of the denominator G1b is greater than the allowable degree m0 (that is, m+1>m0) (step S260). If m+1>m0 (YES in step S260), control circuit 5 terminates the process. If m+1≤m0 (NO in step S260), control circuit 5 returns to the process of step S160.
　上記のように、制御回路５（例えば、伝達関数生成部３１）は、開始番号ｉｓおよび終了番号ｉｅまでの周波数範囲の各周波数ｆ（ｉ）において、ゲインの誤差が許容誤差εＫ以下、かつ位相の誤差が許容誤差εθ以下となるように伝達関数Ｇ１を生成する。 As described above, the control circuit 5 (for example, the transfer function generator 31) controls the gain error to be equal to or less than the allowable error εK and the phase is less than or equal to the allowable error εθ.
　なお、伝達関数Ｇ１の係数が決定されることなく（すなわち、ステップＳ２７０の処理を実行することなく）、上記フローチャートが終了した場合、制御回路５は、再度、ステップＳ１００において、伝達関数Ｇ１の周波数範囲を変更して（すなわち、開始番号ｉｓおよび終了番号ｉｅを再設定して）、ステップＳ１１０からの処理を実行する。 If the above flow chart ends without determining the coefficient of the transfer function G1 (that is, without executing the process of step S270), the control circuit 5, again in step S100, determines the frequency of the transfer function G1. The range is changed (that is, the start number is and the end number ie are reset) and the process from step S110 is executed.
　一般的には、共振点の周波数が伝達関数Ｇ１の周波数範囲に含まれると、伝達関数Ｇ１を求めることが困難となる。そのため、共振が発生する周波数よりも低い周波数範囲を選択することが望ましい。 Generally, when the frequency of the resonance point is included in the frequency range of the transfer function G1, it becomes difficult to obtain the transfer function G1. Therefore, it is desirable to select a frequency range lower than the frequency at which resonance occurs.
　＜カットオフ周波数の設定方式＞
　図６は、ローパスフィルタのカットオフ周波数の設定方式を説明するためのフローチャートである。図６の各処理は、制御回路５（例えば、設定部３３）によって実行される。 <Cutoff frequency setting method>
FIG. 6 is a flow chart for explaining a method of setting the cutoff frequency of the low-pass filter. Each process in FIG. 6 is executed by the control circuit 5 (for example, the setting unit 33).
　制御回路５は、図５のフローチャートにおいて伝達関数Ｇ１を算出するためにステップＳ１００で設定された終了番号ｉｅと同じ終了番号ｉｅを設定する（ステップＳ３００）。制御回路５は、ゲインの許容誤差εＫと位相の許容誤差εθとを設定する（ステップＳ３１０）。ステップＳ３１０の処理は、図５のステップＳ１１０の処理と同様である。 The control circuit 5 sets the same end number ie as the end number ie set in step S100 to calculate the transfer function G1 in the flowchart of FIG. 5 (step S300). The control circuit 5 sets the gain tolerance εK and the phase tolerance εθ (step S310). The processing of step S310 is the same as the processing of step S110 in FIG.
　制御回路５は、伝達関数Ｇ１の係数を設定する（ステップＳ３２０）。具体的には、伝達関数Ｇ１の係数は、図５のステップＳ２７０で算出された係数に設定される。制御回路５は、データベース１９に格納された周波数特性ファイルから周波数ｆ（ｉ）、ゲインＫ（ｉ）、位相θ（ｉ）を読み込む（ステップＳ３３０）。 The control circuit 5 sets the coefficient of the transfer function G1 (step S320). Specifically, the coefficient of the transfer function G1 is set to the coefficient calculated in step S270 of FIG. The control circuit 5 reads the frequency f(i), the gain K(i), and the phase θ(i) from the frequency characteristic file stored in the database 19 (step S330).
　制御回路５は、読み込んだ周波数特性ファイルのデータ（すなわち、周波数ｆ（ｉ）、ゲインＫ（ｉ）、位相θ（ｉ））の最終番号をｉｅ１に設定する（ステップＳ３４０）。制御回路５は、周波数応答特性ファイルから読み込んだデータの番号ｉを、ｉ＝ｉｅに設定する（ステップＳ３５０）。 The control circuit 5 sets the final number of the data of the read frequency characteristic file (that is, frequency f(i), gain K(i), phase θ(i)) to ie1 (step S340). The control circuit 5 sets the number i of the data read from the frequency response characteristic file to i=ie (step S350).
　制御回路５は、ｉ＜ｉｅ１が成立するか否かを判断する（ステップＳ３６０）。ｉ≧ｉｅ１である場合には（ステップＳ３６０においてＮＯ）、制御回路５は後述するステップＳ４１０の処理を実行する。ｉ＜ｉｅ１である場合には（ステップＳ３６０においてＹＥＳ）、制御回路５は番号ｉをインクリメント（すなわち、ｉ＝ｉ＋１に設定）する（ステップＳ３７０）。 The control circuit 5 determines whether i<ie1 holds (step S360). If i≧ie1 (NO in step S360), control circuit 5 executes the process of step S410, which will be described later. If i<ie1 (YES in step S360), control circuit 5 increments number i (that is, sets i=i+1) (step S370).
　制御回路５は、周波数ｆ（ｉ）について、周波数特性ファイルのゲインＫ（ｉ）と、ステップＳ３２０で設定した係数を用いた伝達関数Ｇ１のゲインとの誤差Ｋｄを算出する（ステップＳ３８０）。 For the frequency f(i), the control circuit 5 calculates the error Kd between the gain K(i) of the frequency characteristic file and the gain of the transfer function G1 using the coefficient set in step S320 (step S380).
　制御回路５は、周波数ｆ（ｉ）について、周波数特性ファイルの位相θ（ｉ）と、ステップＳ３２０で設定した係数を用いた伝達関数Ｇ１の位相との誤差θｄを算出する（ステップＳ３９０）。 For the frequency f(i), the control circuit 5 calculates the error θd between the phase θ(i) of the frequency characteristic file and the phase of the transfer function G1 using the coefficient set in step S320 (step S390).
　制御回路５は、ゲインの誤差Ｋｄが許容誤差εＫ以下であって（すなわち、Ｋｄ≦εＫ）、かつ、位相の誤差θｄが許容誤差εθ以下である（すなわち、θｄ≦εθ）であるとの条件が成立するか否かを判断する（ステップＳ４００）。当該条件が成立する場合（ステップＳ４００においてＹＥＳ）、制御回路５はステップＳ３６０の処理に戻る。当該条件が成立しない場合（ステップＳ４００においてＮＯ）、制御回路５は、番号ｉの周波数ｆ（ｉ）をカットオフ周波数Ｆｃとして設定して（ステップＳ４１０）、処理を終了する。 The control circuit 5 sets the conditions that the gain error Kd is equal to or less than the allowable error εK (that is, Kd≦εK) and the phase error θd is equal to or smaller than the allowable error εθ (that is, θd≦εθ). is established (step S400). If the condition is satisfied (YES in step S400), control circuit 5 returns to the process of step S360. If the condition is not satisfied (NO in step S400), control circuit 5 sets frequency f(i) of number i as cutoff frequency Fc (step S410), and ends the process.
　図７は、図６のフローチャートに従ってカットオフ周波数を算出した結果の一例を示す図である。図７を参照して、データベース１９に格納された周波数特性ファイルに基づくゲイン特性を示す図４のグラフ６１に、伝達関数Ｇ１のゲイン特性を示すグラフ７１が重畳されている。また、周波数特性ファイルに基づく位相特性を示す図４のグラフ６２に、伝達関数Ｇ１の位相特性を示すグラフ７２が重畳されている。 FIG. 7 is a diagram showing an example of the result of calculating the cutoff frequency according to the flowchart of FIG. 7, a graph 71 representing the gain characteristic of the transfer function G1 is superimposed on the graph 61 of FIG. 4 representing the gain characteristic based on the frequency characteristic file stored in the database 19. FIG. A graph 72 showing the phase characteristics of the transfer function G1 is superimposed on the graph 62 in FIG. 4 showing the phase characteristics based on the frequency characteristic file.
　周波数特性が許容誤差に収まる（すなわち、Ｋｄ≦εＫ、かつθｄ≦εθが成立する）周波数範囲Ｒ１の最高周波数は、図６のステップＳ４１０における周波数ｆ（ｉ）であり、これがカットオフ周波数Ｆｃとして設定される。このように、カットオフ周波数Ｆｃは、ＤＣ／ＤＣコンバータ４の出力電圧の周波数特性を伝達関数Ｇ１により適切に模擬できる最高の周波数に設定される。 The highest frequency in the frequency range R1 in which the frequency characteristic falls within the allowable error (that is, Kd≦εK and θd≦εθ holds) is the frequency f(i) in step S410 of FIG. 6, which is used as the cutoff frequency Fc. set. Thus, the cutoff frequency Fc is set to the highest frequency at which the frequency characteristics of the output voltage of the DC/DC converter 4 can be appropriately simulated by the transfer function G1.
　最低周波数ｆ（ｉｓ）から最高周波数ｆ（ｉｅ）までの周波数範囲Ｒ２は、図５のフローチャートで説明したように、伝達関数Ｇ１の係数を決定するために用いられた周波数範囲である。周波数範囲Ｒ１は、周波数範囲Ｒ２よりも広い（すなわち、周波数範囲Ｒ２は周波数範囲Ｒ１に含まれる）ことが理解される。 A frequency range R2 from the lowest frequency f(is) to the highest frequency f(ie) is the frequency range used to determine the coefficients of the transfer function G1, as explained in the flowchart of FIG. It is understood that frequency range R1 is wider than frequency range R2 (ie, frequency range R2 is included in frequency range R1).
　＜比較結果＞
　ＤＣ／ＤＣ変換装置１を模擬した電気回路を回路シミュレータを用いてシミュレーションして得られた過渡応答の結果と、図５のフローチャートに従って算出された伝達関数Ｇ１を用いて得られた過渡応答の結果とを比較する。 <Comparison result>
Transient response results obtained by simulating an electric circuit simulating the DC/DC converter 1 using a circuit simulator, and transient response results obtained using the transfer function G1 calculated according to the flowchart of FIG. Compare with
　図８は、電気回路の過渡応答と伝達関数の過渡応答との比較結果の第１の例を示す図である。図８中の領域８１で確認される振動波形はステップ入力の応答波形を示しており、図８中の領域８２で確認される振動波形は、負荷をランプ状に増加して最大負荷を与え、その後、最大負荷から負荷をランプ状に低減してゼロにしたときの応答波形である。負荷の入力条件は、以下の図９～図１１についても同様である。 FIG. 8 is a diagram showing a first example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. The vibration waveform confirmed in the area 81 in FIG. 8 shows the response waveform of the step input, and the vibration waveform confirmed in the area 82 in FIG. After that, it is a response waveform when the load is reduced in a ramp form from the maximum load to zero. The load input conditions are the same for FIGS. 9 to 11 below.
　図８を参照して、丸点は、ローパスフィルタを用いない電気回路の過渡応答を示しており、実線は伝達関数の過渡応答を示している。 With reference to FIG. 8, the circled points indicate the transient response of the electric circuit without the low-pass filter, and the solid line indicates the transient response of the transfer function.
　具体的には、図８の「電気回路の過渡応答」は、図２の制御装置８においてローパスフィルタ１０を通していない出力電圧が減算部１３に入力され、フィードバック制御量算出部１４を構成するＰＩ制御器のゲインが０．０１、時定数が０．０１である場合に、制御信号Ｐ１に従って動作するＤＣ／ＤＣコンバータ４から出力される出力電圧の波形である。 Specifically, the "transient response of the electric circuit" in FIG. 4 shows the waveform of the output voltage output from the DC/DC converter 4 operating according to the control signal P1 when the gain of the device is 0.01 and the time constant is 0.01.
　図８の「伝達関数の過渡応答」は、主回路（すなわち、ＤＣ／ＤＣコンバータ４）の伝達関数（すなわち、図５のフローチャートに従って算出された伝達関数Ｇ１）と、ゲインを“０．０１”、時定数を“０．０１”に設定したＰＩ制御器の伝達関数Ｇ２とを合成した伝達関数Ｇｘ（＝Ｇ１・Ｇ２／（１＋Ｇ１・Ｇ２））を用いて、外乱（負荷変動）を考慮して過渡計算した波形である。 "Transient response of transfer function" in FIG. , a transfer function Gx (=G1 G2/(1+G1 G2)) that combines the transfer function G2 of the PI controller with the time constant set to "0.01", considering disturbance (load fluctuation) This is the waveform calculated for transients.
　図８の条件においては、電気回路の過渡応答および伝達関数の過渡応答の挙動は一致しすることが理解される。 It is understood that under the conditions of FIG. 8, the behavior of the transient response of the electric circuit and the transient response of the transfer function match.
　図９は、電気回路の過渡応答と伝達関数の過渡応答との比較結果の第２の例を示す図である。図９を参照して、丸点は、ローパスフィルタを用いない電気回路の過渡応答を示しており、実線は伝達関数の過渡応答を示している。 FIG. 9 is a diagram showing a second example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. Referring to FIG. 9, the circled points indicate the transient response of the electric circuit without the low-pass filter, and the solid line indicates the transient response of the transfer function.
　具体的には、図９の「電気回路の過渡応答」は、図２の制御装置８においてローパスフィルタ１０を通していない出力電圧が減算部１３に入力され、フィードバック制御量算出部１４を構成するＰＩ制御器のゲインが０．０３、時定数が０．０１である場合に、ＤＣ／ＤＣコンバータ４から出力される出力電圧の波形である。 Specifically, the "transient response of the electric circuit" in FIG. 4 shows the waveform of the output voltage output from the DC/DC converter 4 when the gain of the device is 0.03 and the time constant is 0.01.
　図９の「伝達関数の過渡応答」は、主回路の伝達関数Ｇ１と、ゲインを“０．０３”、時定数を“０．０１”に設定したＰＩ制御器の伝達関数Ｇ２とを合成した伝達関数Ｇｘを用いて過渡計算した波形である。 The "transient response of the transfer function" in FIG. 9 is obtained by synthesizing the transfer function G1 of the main circuit and the transfer function G2 of the PI controller with the gain set to "0.03" and the time constant set to "0.01". It is a waveform obtained by transient calculation using the transfer function Gx.
　図９の条件においては、電気回路の波形のみが発振しており、電気回路の過渡応答は伝達関数の過渡応答と一致しないことが理解される。 　Under the conditions of Fig. 9, only the waveform of the electric circuit oscillates, and it is understood that the transient response of the electric circuit does not match the transient response of the transfer function.
　図１０は、電気回路の過渡応答と伝達関数の過渡応答との比較結果の第３の例を示す図である。図１０を参照して、丸点は、ローパスフィルタを用いた電気回路の過渡応答を示しており、実線は伝達関数の過渡応答を示している。ローパスフィルタのカットオフ周波数は、図６のフローチャートにより算出されたカットオフ周波数Ｆｃである。 FIG. 10 is a diagram showing a third example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. Referring to FIG. 10, the circled dots indicate the transient response of the electrical circuit using the low-pass filter, and the solid line indicates the transient response of the transfer function. The cutoff frequency of the low-pass filter is the cutoff frequency Fc calculated according to the flowchart of FIG.
　図１０の「電気回路の過渡応答」は、図２の制御装置８においてローパスフィルタ１０を通した出力電圧が減算部１３に入力され、フィードバック制御量算出部１４を構成するＰＩ制御器のゲインが０．０３、時定数が０．０１である場合に、ＤＣ／ＤＣコンバータ４から出力される出力電圧の波形である。 10, the output voltage passed through the low-pass filter 10 in the control device 8 in FIG. It is a waveform of the output voltage output from the DC/DC converter 4 when the time constant is 0.03 and the time constant is 0.01.
　図１０の「伝達関数の過渡応答」は、主回路の伝達関数Ｇ１と、ゲインを“０．０３”、時定数を“０．０１”に設定したＰＩ制御器の伝達関数Ｇ２とを合成した伝達関数Ｇｘを用いて過渡計算した波形である。 The "transient response of the transfer function" in FIG. 10 is obtained by synthesizing the transfer function G1 of the main circuit and the transfer function G2 of the PI controller with the gain set to "0.03" and the time constant set to "0.01". It is a waveform obtained by transient calculation using the transfer function Gx.
　図１０の条件においては、電気回路の過渡応答および伝達関数の過渡応答の挙動は一致することが理解される。 It is understood that under the conditions of FIG. 10, the behavior of the transient response of the electric circuit and the transient response of the transfer function match.
　図１１は、電気回路の過渡応答と伝達関数の過渡応答との比較結果の第４の例を示す図である。図１１を参照して、実線は、ローパスフィルタを用いた電気回路の過渡応答を示しており、丸点は伝達関数の過渡応答を示している。 FIG. 11 is a diagram showing a fourth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. Referring to FIG. 11, the solid line indicates the transient response of the electrical circuit using the low-pass filter, and the circular dots indicate the transient response of the transfer function.
　具体的には、図１１の「電気回路の過渡応答」は、図２の制御装置８においてローパスフィルタ１０を通した出力電圧が減算部１３に入力され、フィードバック制御量算出部１４を構成するＰＩ制御器のゲインが０．０６、時定数が０．０１である場合に、ＤＣ／ＤＣコンバータ４から出力される出力電圧の波形である。 Specifically, the "transient response of the electric circuit" in FIG. 4 shows the waveform of the output voltage output from the DC/DC converter 4 when the gain of the controller is 0.06 and the time constant is 0.01.
　図１１の「伝達関数の過渡応答」は、主回路の伝達関数Ｇ１と、ゲインを“０．０６”、時定数を“０．０１”に設定したＰＩ制御器の伝達関数Ｇ２とを合成した伝達関数Ｇｘを用いて過渡計算した波形である。 The "transient response of the transfer function" in FIG. 11 is obtained by synthesizing the transfer function G1 of the main circuit and the transfer function G2 of the PI controller with the gain set to "0.06" and the time constant set to "0.01". It is a waveform obtained by transient calculation using the transfer function Gx.
　図１１の条件においては、電気回路の過渡応答および伝達関数の過渡応答はいずれも発振しており、これらの挙動は一致することが理解される。 Under the conditions of FIG. 11, both the transient response of the electric circuit and the transient response of the transfer function oscillate, and it is understood that these behaviors match.
　上記より、ローパスフィルタを用いない場合、図９の比較結果によると、電気回路の過渡応答は発振しているが、伝達関数の過渡応答は発振しておらず両者の挙動が一致していない。一方、ローパスフィルタを用いる場合、図１０の比較結果によると、電気回路の過渡応答および伝達関数の過渡応答は発振しておらず挙動が一致し、図１１の比較結果によると、電気回路の過渡応答および伝達関数の過渡応答はともに発振しており挙動が一致する。 From the above, when the low-pass filter is not used, according to the comparison result of FIG. 9, the transient response of the electric circuit oscillates, but the transient response of the transfer function does not oscillate, and the behaviors of both do not match. On the other hand, when a low-pass filter is used, according to the comparison result of FIG. 10, the transient response of the electric circuit and the transient response of the transfer function do not oscillate and the behaviors match, and according to the comparison result of FIG. Both the response and the transient response of the transfer function oscillate and their behaviors match.
　このことから、ローパスフィルタを用いない場合には、伝達関数を利用して求めたフィードバック制御定数を電気回路に適用しても、当該電気回路の過渡応答で発振が発生してしまう可能性が高い。一方、ローパスフィルタを用いる場合には、伝達関数を利用して求めたフィードバック制御定数を電気回路に適用すれば、電気回路の過渡応答および伝達関数の過渡応答の挙動が一致すると推測される。 For this reason, if a low-pass filter is not used, even if the feedback control constant obtained using the transfer function is applied to the electric circuit, there is a high possibility that the transient response of the electric circuit will cause oscillation. . On the other hand, when a low-pass filter is used, if the feedback control constant obtained using the transfer function is applied to the electric circuit, it is presumed that the behavior of the transient response of the electric circuit and the transient response of the transfer function will match.
　図１２は、電気回路の過渡応答と伝達関数の過渡応答との比較結果の第５の例を示す図である。図１２に示す過渡応答は図１０に示す過渡応答と実質的には同じであるが、図１２には過渡計算に用いられる時間刻み幅が記載されている。具体的には、図１２には、電気回路の過渡計算に用いられる時間刻み幅をΔｔとし、伝達関数の過渡計算に用いられる時間刻み幅をΔｔの１０００倍とした場合の比較結果が示されている。ここで、Δｔ＝１．０Ｅ－０６であるとする。当該比較結果によると、電気回路の過渡応答および伝達関数の過渡応答の挙動は一致している。このことから、伝達関数の過渡計算では、電気回路の過渡計算よりも時間刻み幅を１０００倍程度大きくできることが理解される。 FIG. 12 is a diagram showing a fifth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. Although the transient response shown in FIG. 12 is substantially the same as the transient response shown in FIG. 10, FIG. 12 describes the time step size used in the transient calculations. Specifically, FIG. 12 shows a comparison result when the time step size used for the transient calculation of the electric circuit is Δt and the time step size used for the transient calculation of the transfer function is 1000 times Δt. ing. Now suppose that Δt=1.0E-06. According to the comparison results, the behavior of the transient response of the electric circuit and the transient response of the transfer function are consistent. From this, it can be understood that in the transient calculation of the transfer function, the time step width can be made about 1000 times larger than in the transient calculation of the electric circuit.
　図１３は、電気回路の過渡応答と伝達関数の過渡応答との比較結果の第６の例を示す図である。図１３を参照して、丸点は、ローパスフィルタを用いた電気回路の過渡応答を示しており、実線は伝達関数の過渡応答を示している。図１３には、伝達関数の過渡計算に用いられる時間刻み幅をΔｔ（ただし、図１２のΔｔと同じ値である。）とし、電気回路の過渡計算に用いられる時間刻み幅をΔｔの１０倍（すなわち、Δｔ×１０＝１．０Ｅ－０５）とした場合の比較結果が示されている。当該比較結果によると、電気回路の過渡応答は発振を起こすことが理解される。このことから、電気回路の過渡計算では、時間刻み幅をあまり大きくすることはできない（例えば、１．０Ｅ－０６よりも大きくできない）ことが理解される。 FIG. 13 is a diagram showing a sixth example of comparison results between the transient response of the electric circuit and the transient response of the transfer function. Referring to FIG. 13, the circled dots indicate the transient response of the electrical circuit using the low-pass filter, and the solid line indicates the transient response of the transfer function. In FIG. 13, the time step width used for the transient calculation of the transfer function is Δt (which is the same value as Δt in FIG. 12), and the time step width used for the transient calculation of the electric circuit is 10 times Δt. (ie, Δt×10=1.0E−05). According to the comparison result, it is understood that the transient response of the electric circuit causes oscillation. From this, it can be seen that the time step size cannot be too large (eg, greater than 1.0E-06) in the transient calculations of electrical circuits.
　図１３の結果より、電気回路の過渡応答が発振を起こさない時間刻み幅の限界値は“１．０Ｅ－０６”程度であると推察される。そして、この時間刻み幅を基準とした場合、図１２の結果より、伝達関数の過渡計算では、電気回路の過渡計算よりも時間刻み幅を１０００倍程度大きくできると推察される。 From the results of FIG. 13, it is inferred that the limit value of the time step width at which the transient response of the electric circuit does not cause oscillation is about "1.0E-06". Based on the result of FIG. 12, when this time step width is used as a reference, in the transient calculation of the transfer function, it is estimated that the time step width can be made about 1000 times larger than in the transient calculation of the electric circuit.
　以上より、図１に示すローパスフィルタ１０を用いるＤＣ／ＤＣ変換装置１を模擬する伝達関数を利用することで、フィードバック制御の最適な制御定数を算出する際の時間を短縮することができる。 As described above, by using a transfer function that simulates the DC/DC converter 1 that uses the low-pass filter 10 shown in FIG. 1, it is possible to shorten the time required to calculate the optimum control constants for feedback control.
　＜変形例＞
　上述した実施の形態では、図７に示すように、図６のフローチャートに従って求めた周波数範囲Ｒ１の最高周波数（すなわち、ステップＳ４１０における周波数ｆ（ｉ））をカットオフ周波数Ｆｃとして設定した。本実施の形態の変形例では、カットオフ周波数Ｆｃの設定方式の他の例について説明する。 <Modification>
In the embodiment described above, as shown in FIG. 7, the highest frequency in the frequency range R1 obtained according to the flowchart of FIG. 6 (that is, the frequency f(i) in step S410) is set as the cutoff frequency Fc. In a modified example of the present embodiment, another example of the method of setting the cutoff frequency Fc will be described.
　図１４は、本実施の形態の変形例に従うカットオフ周波数の設定方式を説明するための図である。 FIG. 14 is a diagram for explaining a cutoff frequency setting method according to the modification of the present embodiment.
　本実施の形態の変形例では、図５のフローチャートにおいて伝達関数Ｇ１を算出する際に用いられた周波数範囲Ｒ２の最高周波数をカットオフ周波数Ｆｃに設定する。これにより、図６のフローチャートを実行する必要がない。 In the modified example of the present embodiment, the cutoff frequency Fc is set to the highest frequency in the frequency range R2 used when calculating the transfer function G1 in the flowchart of FIG. This eliminates the need to execute the flow chart of FIG.
　一方、このような変形例に従うカットオフ周波数Ｆｃの設定方式Ｚ２によると、図６に従うカットオフ周波数Ｆｃの設定方式Ｚ１よりもカットオフ周波数Ｆｃが小さくなる。そのため、できるだけ高い周波数において、電気回路の過渡応答を伝達関数を用いて模擬したい場合には、図６に従うカットオフ周波数Ｆｃの設定方式Ｚ１を選択すればよい。各種条件に応じて、設定者がいずれか設定方式を任意に選択すればよい。 On the other hand, according to the setting method Z2 of the cutoff frequency Fc according to such a modified example, the cutoff frequency Fc is smaller than the setting method Z1 of the cutoff frequency Fc according to FIG. Therefore, if it is desired to simulate the transient response of an electric circuit using a transfer function at a frequency as high as possible, the setting method Z1 of the cutoff frequency Fc according to FIG. 6 should be selected. A setting person may arbitrarily select one of the setting methods according to various conditions.
　設定方式Ｚ１と設定方式Ｚ２とでは、制御定数の値によって起こる発振条件が異なると考えられる。しかし、設定方式Ｚ２でも、設定方式Ｚ１と同様に、伝達関数で評価したフィードバック制御の制御定数を、電気回路モデルに利用することができる。 It is considered that the setting method Z1 and the setting method Z2 have different oscillation conditions depending on the value of the control constant. However, even in the setting method Z2, as in the setting method Z1, the control constants of the feedback control evaluated by the transfer function can be used in the electric circuit model.
　上記より、制御回路５（例えば、設定部３３）は、ＤＣ／ＤＣコンバータ４の出力電圧の周波数特性と伝達関数Ｇ１の周波数特性との誤差が許容値以下となる周波数範囲Ｒ１に基づいて、ローパスフィルタ１０のカットオフ周波数Ｆｃを設定するように構成される。具体的には、ある局面では、制御回路５は、設定方式Ｚ１を用いて、周波数範囲Ｒ１における最高周波数にカットオフ周波数Ｆｃを設定する。他の局面では、制御回路５は、設定方式Ｚ２を用いて、周波数範囲Ｒ１に含まれる周波数範囲Ｒ２における最高周波数にカットオフ周波数Ｆｃを設定する。 From the above, the control circuit 5 (for example, the setting unit 33) sets the low-pass It is configured to set the cutoff frequency Fc of the filter 10 . Specifically, in one aspect, the control circuit 5 uses the setting method Z1 to set the cutoff frequency Fc to the highest frequency in the frequency range R1. In another aspect, control circuit 5 uses setting method Z2 to set cutoff frequency Fc to the highest frequency in frequency range R2 included in frequency range R1.
　＜利点＞
　実施の形態１によると、ＤＣ／ＤＣコンバータ４の周波数特性を模擬する伝達関数を生成し、ＤＣ／ＤＣコンバータ４の周波数特性と伝達関数の周波数特性との誤差が許容値以下となる周波数範囲に基づいてカットオフ周波数Ｆｃが設定される。これにより、カットオフ周波数Ｆｃが設定されたローパスフィルタを用いたフィードバック制御によるＤＣ／ＤＣコンバータ４の応答と、伝達関数の応答とを一致させることができる。したがって、伝達関数で評価したフィードバック制御の制御定数を、そのままＤＣ／ＤＣコンバータの電気回路モデルでの制御定数として利用できる。 <Advantages>
According to Embodiment 1, a transfer function that simulates the frequency characteristics of the DC/DC converter 4 is generated, and the error between the frequency characteristics of the DC/DC converter 4 and the frequency characteristics of the transfer function is within the allowable range. Based on this, the cutoff frequency Fc is set. Thereby, the response of the DC/DC converter 4 by feedback control using the low-pass filter with the cutoff frequency Fc set can be matched with the response of the transfer function. Therefore, the control constant of the feedback control evaluated by the transfer function can be used as it is as the control constant in the electric circuit model of the DC/DC converter.
　また、ＤＣ／ＤＣコンバータ４のような半導体の回路素子を含む電気回路を過渡計算する場合、回路素子のスイッチング周波数を考慮して、過渡計算の時間刻みを設定する必要がある。一方、伝達関数の過渡計算では、半導体の回路素子のスイッチング周波数を考慮する必要がない。そのため、伝達関数の過渡計算は、電気回路網の過渡計算よりも、時間刻み幅を大きくすることができ、計算時間を短くすることができる。 Also, when performing transient calculations on an electric circuit including semiconductor circuit elements such as the DC/DC converter 4, it is necessary to set the time step of the transient calculations in consideration of the switching frequency of the circuit elements. On the other hand, the transfer function transient calculation does not need to consider the switching frequency of the semiconductor circuit elements. Therefore, the transient calculation of the transfer function can have a larger time step size than the transient calculation of the electrical network, and the calculation time can be shortened.
　実施の形態２．
　実施の形態２では、機械学習を利用してフィードバック制御器の制御定数を求める構成について説明する。 Embodiment 2.
Embodiment 2 describes a configuration for obtaining control constants of a feedback controller using machine learning.
　図１５は、ＤＣ／ＤＣ変換装置に関する学習部の構成図である。図１５を参照して、制御装置８に含まれる学習部２５０は、データ取得部２５１と、モデル生成部２５５と、学習結果記憶部２６０と、行動選択部２６２とを含む。学習部２５０は、専用のハードウェアであってもよいし、制御装置８の内部メモリに格納されるプログラムを実行するプロセッサで実現される構成であってもよい。 FIG. 15 is a configuration diagram of a learning unit related to the DC/DC conversion device. Referring to FIG. 15 , learning unit 250 included in control device 8 includes a data acquisition unit 251 , a model generation unit 255 , a learning result storage unit 260 and an action selection unit 262 . The learning unit 250 may be dedicated hardware, or may be implemented by a processor that executes a program stored in the internal memory of the control device 8 .
　学習部２５０の入力パラメータは状態変数である。本実施の形態では、状態変数は、図１に示すＤＣ／ＤＣコンバータ４の出力値（すなわち、出力電圧）と目標値との最大誤差と、フィードバック制御量算出部１４を構成するフィードバック制御器の制御定数（例えば、ゲインおよび時定数）とを含む。なお、目標値は、設計者によって任意に定められる。学習部２５０の出力パラメータは行動値である。行動値は、将来的に得られる報酬が最大になるような制御定数である。 The input parameters of the learning unit 250 are state variables. In the present embodiment, the state variables are the maximum error between the output value (that is, the output voltage) of the DC/DC converter 4 shown in FIG. and control constants (eg, gain and time constants). Note that the target value is arbitrarily determined by the designer. An output parameter of the learning unit 250 is a behavior value. The action value is a control constant that maximizes future rewards.
　制御回路５は、学習部２５０から出力された制御定数がフィードバック制御器に設定された場合において、負荷変動時におけるＤＣ／ＤＣコンバータ４の出力値と目標値との最大誤差を学習部２５０に出力する。 The control circuit 5 outputs to the learning section 250 the maximum error between the output value of the DC/DC converter 4 and the target value at the time of load fluctuation when the control constant output from the learning section 250 is set in the feedback controller. do.
　データ取得部２５１は、ＤＣ／ＤＣコンバータ４の出力電圧と目標電圧との最大誤差と、行動選択部２６２により選択されたフィードバック制御器の制御定数とを含む学習用データを取得する。 The data acquisition unit 251 acquires learning data including the maximum error between the output voltage of the DC/DC converter 4 and the target voltage and the control constant of the feedback controller selected by the action selection unit 262 .
　モデル生成部２５５は、最大誤差および制御定数を含む学習用データに基づいて、最大誤差を低減させる最適な制御定数を学習する。すなわち、モデル生成部２５５は、学習用データを用いて、最大誤差から最適な制御定数を推定するための学習済モデルを生成する。 The model generation unit 255 learns the optimum control constant that reduces the maximum error based on the learning data containing the maximum error and the control constant. That is, the model generator 255 uses the learning data to generate a trained model for estimating the optimum control constant from the maximum error.
　モデル生成部２５５が用いる学習アルゴリズムは教師あり学習、教師なし学習、強化学習等の公知のアルゴリズムを用いることができる。一例として、強化学習を適用した場合について説明する。強化学習では、ある環境内におけるエージェント（すなわち、行動主体）が、現在の状態（すなわち、環境のパラメータ）を観測し、取るべき行動を決定する。エージェントの行動により環境が動的に変化し、エージェントには環境の変化に応じて報酬が与えられる。エージェントはこれを繰り返し、一連の行動を通じて報酬が最も多く得られる行動方針を学習する。 Known algorithms such as supervised learning, unsupervised learning, and reinforcement learning can be used as the learning algorithm used by the model generation unit 255 . As an example, a case where reinforcement learning is applied will be described. In reinforcement learning, an agent (ie, agent) in an environment observes the current state (ie, parameters of the environment) and decides what action to take. The environment dynamically changes according to the actions of the agent, and the agent is rewarded according to the change in the environment. The agent repeats this and learns the course of action that yields the most rewards through a series of actions.
　強化学習の代表的な手法として、Ｑ学習（Ｑ－ｌｅａｒｎｉｎｇ）が知られている。Ｑ学習では、時刻ｔ＋１における最もＱ値の高い行動ａの行動価値Ｑが、時刻ｔにおいて実行された行動ａの行動価値Ｑよりも大きければ、行動価値Ｑを大きくし、逆の場合は、行動価値Ｑを小さくする。換言すれば、時刻ｔにおける行動ａの行動価値Ｑを、時刻ｔ＋１における最良の行動価値に近づけるように、行動価値関数Ｑ（ｓ，ａ）を更新する。これにより、ある環境における最良の行動価値が、それ以前の環境における行動価値に順次伝播していくようになる。 Q-learning is known as a representative method of reinforcement learning. In Q-learning, if the action value Q of action a with the highest Q value at time t+1 is greater than the action value Q of action a executed at time t, action value Q is increased; Decrease the value Q. In other words, the action value function Q(s, a) is updated so that the action value Q of action a at time t approaches the best action value at time t+1. As a result, the best behavioral value in a certain environment is propagated to the behavioral value in the previous environment.
　上記のように、強化学習によって学習済モデルを生成する場合、モデル生成部２５５は、報酬計算部２５３と、関数更新部２５４とを含む。 As described above, when a learned model is generated by reinforcement learning, the model generation unit 255 includes the reward calculation unit 253 and the function update unit 254.
　報酬計算部２５３は、学習モデルの学習に用いられる報酬をどのように増減させるのかを規定する報酬基準と、制御定数と、最大誤差とに基づいて報酬ｒを計算する。報酬基準は、最大誤差が低減した場合に報酬を増大し、最大誤差が増大した場合に報酬を低減するように設定される。具体的には、報酬計算部２５３は、取得した最大誤差が示す状態のときに、取得した制御定数を設定した場合に、当該最大誤差が低減すれば報酬を増大し（例えば、「＋１」の報酬を与える）、当該最大誤差が増大すれば報酬を低減する（例えば、「－１」の報酬を与える）。 The reward calculation unit 253 calculates the reward r based on the reward standard that defines how the reward used for learning the learning model is increased or decreased, the control constant, and the maximum error. A reward criterion is set to increase the reward if the maximum error decreases and decrease the reward if the maximum error increases. Specifically, when the obtained control constant is set in the state indicated by the obtained maximum error, the reward calculation unit 253 increases the reward if the maximum error decreases (for example, "+1" reward), and decrease the reward if the maximum error increases (eg, reward "-1").
　関数更新部２５４は、報酬計算部２５３によって計算される報酬に従って、学習部２５０の出力パラメータ（すなわち、制御定数）を決定するための関数を更新し、学習結果記憶部２６０に出力する。例えば、Ｑ学習の場合、行動価値関数Ｑ（ｓｔ，ａｔ）が、制御定数を算出するための関数として用いられる。ｓｔは時刻ｔにおける環境の状態を表し、ａｔは時刻ｔにおける行動を表す。 The function updater 254 updates the function for determining the output parameter (that is, the control constant) of the learning unit 250 according to the reward calculated by the reward calculator 253 and outputs it to the learning result storage unit 260 . For example, in the case of Q-learning, the action-value function Q(s t , at ) is used as the function for calculating the control constants. s t represents the state of the environment at time t, and a t represents the action at time t.
　行動選択部２６２は、学習結果記憶部２６０に記憶された学習部２５０の学習結果である行動価値関数Ｑ（ｓ，ａ）に基づいて制御定数を選択する。典型的には、行動選択部２６２は、初期状態においては、ランダムに制御定数を選択する。行動選択部２６２は、学習途中段階においては、公知の行動選択方式（例えば、ε-greedy法）を用いて、制御定数を選択する。行動選択部２６２により選択された制御定数が、学習部２５０の出力パラメータとなる。 The action selection unit 262 selects a control constant based on the action value function Q(s, a) that is the learning result of the learning unit 250 stored in the learning result storage unit 260 . Typically, the action selection unit 262 randomly selects control constants in the initial state. The action selection unit 262 selects a control constant using a known action selection method (for example, the ε-greedy method) in the intermediate learning stage. The control constant selected by action selection section 262 becomes the output parameter of learning section 250 .
　制御回路５は、学習部２５０から出力された制御定数（すなわち、行動選択部２６２により選択された制御定数）をフィードバック制御器に設定した場合における最大誤差を算出して、学習部２５０に出力する。データ取得部２５１は、当該最大誤差と、行動選択部２６２により選択された制御定数とを取得してモデル生成部２５５に出力する。 The control circuit 5 calculates the maximum error when the control constant output from the learning unit 250 (that is, the control constant selected by the action selection unit 262) is set in the feedback controller, and outputs the maximum error to the learning unit 250. . The data acquisition unit 251 acquires the maximum error and the control constant selected by the action selection unit 262 and outputs them to the model generation unit 255 .
　学習部２５０は、以上のような学習を繰り返し実行する。関数更新部２５４は、行動価値テーブルの更新が行われなくなり行動価値関数Ｑ（ｓt，ａt）が収束した場合（例えば、最大誤差が０．１％以内となった場合等）、学習部２５０による学習は終了したと判定する。この場合、行動選択部２６２は、収束した行動価値関数Ｑ（ｓt，ａt）に基づいて報酬が最も多く得られる制御定数を選択する（すなわち、最適な制御定数が出力される）。また、学習結果記憶部２６０には、最大誤差から最適な制御定数を推定するための学習済モデルが格納される。 The learning unit 250 repeatedly performs the above learning. When the action value table is no longer updated and the action value function Q(s t , a t ) converges (for example, when the maximum error is within 0.1%), the function updating unit 254 updates the learning unit It is determined that the learning by 250 is finished. In this case, the action selection unit 262 selects the control constant that yields the largest reward based on the converged action-value function Q(s t , a t ) (that is, the optimum control constant is output). Also, the learning result storage unit 260 stores a learned model for estimating the optimum control constant from the maximum error.
　上記のように、最適な制御定数を求める学習済モデルを生成するためには学習を繰り返し実行する必要があり多大な時間を要するため、できるだけ学習時間を短縮することが好ましい。 As described above, in order to generate a trained model that finds the optimal control constants, it is necessary to repeat learning and it takes a lot of time, so it is preferable to shorten the learning time as much as possible.
　実施の形態１で説明したように、伝達関数の過渡計算では、電気回路の過渡計算よりも時間刻み幅を大きくできる。そのため、伝達関数を用いて算出された最大誤差を学習部２５０に出力することによって学習時間を低減できると考えられる。 As described in Embodiment 1, in the transient calculation of the transfer function, the time step width can be made larger than in the transient calculation of the electric circuit. Therefore, it is considered that the learning time can be reduced by outputting the maximum error calculated using the transfer function to the learning section 250 .
　この場合、状態変数は、主回路（すなわち、ＤＣ／ＤＣコンバータ４）の伝達関数Ｇ１と、フィードバック制御量算出部１４を構成するフィードバック制御器の伝達関数Ｇ２とを合成した伝達関数Ｇｘの出力値と目標値との最大誤差と、フィードバック制御器の制御定数とを含む。なお、行動値としての学習部２５０の出力パラメータは制御定数である。 In this case, the state variable is the output value of the transfer function Gx obtained by synthesizing the transfer function G1 of the main circuit (that is, the DC/DC converter 4) and the transfer function G2 of the feedback controller that constitutes the feedback control amount calculation unit 14. and the maximum error from the target value, and the control constant of the feedback controller. Note that the output parameters of the learning unit 250 as action values are control constants.
　制御回路５は、学習部２５０から出力された制御定数がフィードバック制御器に設定された場合において、負荷変動に対応する外乱付与時における伝達関数Ｇｘの出力値と目標値との最大誤差を学習部２５０に出力する。学習部２５０のデータ取得部２５１は、伝達関数Ｇｘの出力値と目標値との最大誤差と、フィードバック制御器の制御定数とを含む学習用データを取得する。以降の学習部２５０の処理の流れについては上記と同様である。 When the control constant output from the learning unit 250 is set in the feedback controller, the control circuit 5 calculates the maximum error between the output value of the transfer function Gx and the target value when the disturbance corresponding to the load fluctuation is applied to the learning unit. Output to 250. The data acquisition unit 251 of the learning unit 250 acquires learning data including the maximum error between the output value of the transfer function Gx and the target value and the control constant of the feedback controller. The subsequent processing flow of the learning unit 250 is the same as described above.
　伝達関数の過渡計算の時間刻み幅は、電気回路の過渡計算の時間刻み幅の１０００倍程度であることから、学習時間が１／１０００程度に短縮されると考えられる。例えば、電気回路を用いた場合の学習時間が１日（すなわち、１４４０分）である場合、伝達関数を用いた場合の学習時間は、１．４分となり大幅に短縮することができる。 Since the time step width of the transient calculation of the transfer function is about 1000 times the time step width of the transient calculation of the electric circuit, it is thought that the learning time will be reduced to about 1/1000. For example, if the learning time is one day (that is, 1440 minutes) when using an electric circuit, the learning time when using a transfer function is 1.4 minutes, which can be significantly reduced.
　＜利点＞
　実施の形態２に従うと、伝達関数を用いてフィードバック制御器の最適な制御定数を学習することによって、当該制御定数を算出するための学習済モデルを生成するための学習時間を大幅に短縮することができる。 <Advantages>
According to the second embodiment, by learning the optimum control constant of the feedback controller using the transfer function, the learning time for generating the trained model for calculating the control constant can be greatly shortened. can be done.
　その他の実施の形態．
　上述の実施の形態として例示した構成は、本開示の構成の一例であり、別の公知の技術と組み合わせることも可能であるし、本開示の要旨を逸脱しない範囲で、一部を省略する等、変更して構成することも可能である。また、上述した実施の形態において、他の実施の形態で説明した処理および構成を適宜採用して実施する場合であってもよい。 Other embodiments.
The configuration illustrated as the above-described embodiment is an example of the configuration of the present disclosure, and can be combined with another known technique. , can also be modified and configured. Further, in the above-described embodiment, the processing and configuration described in other embodiments may be appropriately adopted and implemented.
　今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。本開示の範囲は、上記した説明ではなく、請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。 The embodiments disclosed this time should be considered illustrative in all respects and not restrictive. The scope of the present disclosure is indicated by the scope of claims rather than the above description, and is intended to include all changes within the meaning and scope of equivalents of the scope of claims.
　１　ＤＣ／ＤＣ変換装置、２　直流電源、３　負荷、４　コンバータ、５　制御回路、６　信号生成回路、７　電圧検出器、８　制御装置、１０　ローパスフィルタ、１２　周波数分析装置、１３　減算部、１４　フィードバック制御量算出部、１５　リミッタ処理部、１６，２６　制御信号生成部、１９　データベース、２０　周波数設定部、２１　正弦波生成部、２２　周波数特性算出部、２５　加算部、３１　伝達関数生成部、３３　設定部、５０　動作制御部、２５０　学習部、２５１　データ取得部、２５３　報酬計算部、２５４　関数更新部、２５５　モデル生成部、２６０　学習結果記憶部、２６２　行動選択部。 1 DC/DC conversion device, 2 DC power supply, 3 load, 4 converter, 5 control circuit, 6 signal generation circuit, 7 voltage detector, 8 control device, 10 low-pass filter, 12 frequency analysis device, 13 subtraction section, 14 feedback Control amount calculation unit 15 Limiter processing unit 16, 26 Control signal generation unit 19 Database 20 Frequency setting unit 21 Sine wave generation unit 22 Frequency characteristic calculation unit 25 Addition unit 31 Transfer function generation unit 33 Setting 50 Operation control unit 250 Learning unit 251 Data acquisition unit 253 Reward calculation unit 254 Function update unit 255 Model generation unit 260 Learning result storage unit 262 Action selection unit.

Claims (7)

  1. 　ＤＣ／ＤＣコンバータの制御装置であって、
    　前記ＤＣ／ＤＣコンバータの出力電圧にローパスフィルタ処理を実行するローパスフィルタと、
    　前記ローパスフィルタ処理された前記出力電圧を指令値に追従させるように、前記ＤＣ／ＤＣコンバータの動作を制御する動作制御部と、
    　前記ＤＣ／ＤＣコンバータの出力電圧の周波数特性を模擬するように、前記ＤＣ／ＤＣコンバータの第１伝達関数を生成する生成部と、
    　前記ＤＣ／ＤＣコンバータの出力電圧の周波数特性と前記第１伝達関数の周波数特性との誤差が許容値以下となる第１周波数範囲に基づいて、前記ローパスフィルタのカットオフ周波数を設定する設定部とを備える、制御装置。     A controller for a DC/DC converter,
    a low-pass filter that performs low-pass filtering on the output voltage of the DC/DC converter;
    an operation control unit that controls the operation of the DC/DC converter so that the low-pass filtered output voltage follows a command value;
    a generator that generates a first transfer function of the DC/DC converter so as to simulate the frequency characteristics of the output voltage of the DC/DC converter;
    a setting unit that sets the cutoff frequency of the low-pass filter based on a first frequency range in which an error between the frequency characteristics of the output voltage of the DC/DC converter and the frequency characteristics of the first transfer function is equal to or less than an allowable value; A controller.
  2. 　前記生成部は、前記第１周波数範囲に含まれる第２周波数範囲の各周波数において、前記誤差が前記許容値以下となるように前記第１伝達関数を生成する、請求項１に記載の制御装置。 The control device according to claim 1, wherein the generator generates the first transfer function so that the error is equal to or less than the allowable value at each frequency in a second frequency range included in the first frequency range. .
  3. 　前記設定部は、前記第１周波数範囲における最高周波数に前記カットオフ周波数を設定する、請求項１または請求項２に記載の制御装置。 The control device according to claim 1 or 2, wherein the setting unit sets the cutoff frequency to the highest frequency in the first frequency range.
  4. 　前記設定部は、前記第２周波数範囲における最高周波数に前記カットオフ周波数を設定する、請求項２に記載の制御装置。 The control device according to claim 2, wherein said setting unit sets said cutoff frequency to the highest frequency in said second frequency range.
  5. 　前記生成部は、前記第１伝達関数と、前記動作制御部に含まれるフィードバック制御器の第２伝達関数とを合成した合成伝達関数を生成し、
    　前記合成伝達関数の出力値と目標値との最大誤差と、前記フィードバック制御器の制御定数とを含む学習用データを取得するデータ取得部と、
    　前記学習用データを用いて、前記最大誤差から前記制御定数を推定するための学習済モデルを生成するモデル生成部とをさらに備える、請求項１～請求項４のいずれか１項に記載の制御装置。     The generation unit generates a combined transfer function obtained by combining the first transfer function and a second transfer function of a feedback controller included in the motion control unit,
    a data acquisition unit that acquires learning data including the maximum error between the output value of the combined transfer function and the target value and the control constant of the feedback controller;
    The control according to any one of claims 1 to 4, further comprising a model generation unit that generates a trained model for estimating the control constant from the maximum error using the learning data. Device.
  6. 　ＤＣ／ＤＣコンバータと、
    　請求項１～請求項５のいずれか１項に記載の制御装置とを備える、ＤＣ／ＤＣ変換装置。     a DC/DC converter;
    A DC/DC conversion device comprising the control device according to any one of claims 1 to 5.
  7. 　ＤＣ／ＤＣコンバータの制御方法であって、
    　前記ＤＣ／ＤＣコンバータの出力電圧にローパスフィルタ処理を実行するステップと、
    　前記ローパスフィルタ処理された前記出力電圧を指令値に追従させるように、前記ＤＣ／ＤＣコンバータの動作を制御するステップと、
    　前記ＤＣ／ＤＣコンバータの出力電圧の周波数特性を模擬するように、前記ＤＣ／ＤＣコンバータの伝達関数を生成するステップと、
    　前記ＤＣ／ＤＣコンバータの出力電圧の周波数特性と前記伝達関数の周波数特性との誤差が許容値以下となる周波数範囲に基づいて、前記ローパスフィルタ処理を実行するローパスフィルタのカットオフ周波数を設定するステップとを含む、制御方法。     A control method for a DC/DC converter, comprising:
    low-pass filtering the output voltage of the DC/DC converter;
    controlling the operation of the DC/DC converter so that the low-pass filtered output voltage follows a command value;
    generating a transfer function of the DC/DC converter so as to simulate the frequency characteristics of the output voltage of the DC/DC converter;
    setting the cutoff frequency of the low-pass filter for performing the low-pass filtering based on the frequency range in which the error between the frequency characteristics of the output voltage of the DC/DC converter and the frequency characteristics of the transfer function is equal to or less than an allowable value; and control methods.
PCT/JP2022/008859 2022-03-02 2022-03-02 Control device, dc/dc conversion device, and control method WO2023166606A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007068253A (en) * 2005-08-29 2007-03-15 Nissan Motor Co Ltd Controller for dc-dc converter
US20110127980A1 (en) * 2009-12-01 2011-06-02 Industrial Technology Research Institute Voltage converting circuit and method thereof
JP2016516383A (en) * 2013-03-06 2016-06-02 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ Transfer function generation based on pulse width modulation information

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007068253A (en) * 2005-08-29 2007-03-15 Nissan Motor Co Ltd Controller for dc-dc converter
US20110127980A1 (en) * 2009-12-01 2011-06-02 Industrial Technology Research Institute Voltage converting circuit and method thereof
JP2016516383A (en) * 2013-03-06 2016-06-02 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ Transfer function generation based on pulse width modulation information

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