WO2023149240A1

WO2023149240A1 - Electronic component

Info

Publication number: WO2023149240A1
Application number: PCT/JP2023/001748
Authority: WO
Inventors: 冬夢田邊; 真也立花
Original assignee: 株式会社村田製作所
Priority date: 2022-02-04
Filing date: 2023-01-20
Publication date: 2023-08-10

Abstract

An electronic component (100) comprises: an insulator (10); an inductor (L1) having a conductor pattern (K1, K2); and a first external electrode (31) electrically connected to the conductor pattern. The insulator has a first main surface (11), a second main surface (12) opposite the first main surface, and a first side surface (21), a second side surface (22), a third side surface (23), and a fourth side surface (24) that connect the first main surface and the second main surface. The conductor pattern has a coil opening. The first external electrode includes a first electrode (31a) provided along the first main surface, a second electrode (31b) provided along the first side surface and electrically connected to the first electrode, and a third electrode (31c) provided along the second side surface and electrically connected to the first electrode. When the first main surface is viewed in plan, the first electrode includes a portion that overlaps the coil opening. When the first main surface is viewed in plan, the first external electrode does not overlap the coil opening on the second main surface.

Description

electronic components

This disclosure relates to electronic components.

Conventionally, there has been known a chip component type small electronic component in which an inductor (coil) is provided inside an insulator in which multiple insulator layers are laminated. For example, Japanese Patent Application Laid-Open No. 9-246046 (Patent Document 1) describes a laminate in which a plurality of magnetic sheets provided with coil conductors are stacked, and an external device to which the coil conductor provided in the laminate is connected. A laminated inductor composed of electrodes is disclosed.

JP-A-9-246046

When realizing an electronic component such as the inductor disclosed in Patent Document 1 with a small component, it is necessary to form the conductor pattern of the inductor all over the outer frame of the insulator to secure the designed inductance value. However, if the conductor pattern of the inductor is formed all over the outer frame of the insulator, parasitic capacitance may occur between the conductor pattern inside the insulator and the external electrode. In particular, in the case of electronic components used at high frequencies, problems such as changes in electrical characteristics due to parasitic capacitance as described above may occur.

Therefore, an object of the present disclosure is to provide an electronic component that can suppress the generation of parasitic capacitance.

An electronic component according to one aspect of the present disclosure includes an insulator, an inductor, and a first external electrode. The inductor is constructed within the insulator and has a first conductor pattern. The first external electrode is electrically connected to the first conductor pattern. The insulator has a first main surface, a second main surface facing the first main surface, and a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the first main surface and the second main surface. side. The first side faces the second side. The third side faces the fourth side. The first conductor pattern has a coil opening. The first external electrode includes a first electrode provided along the first main surface, a second electrode provided along the first side surface and electrically connected to the first electrode, and a second electrode provided along the first side surface. and a third electrode electrically connected to the first electrode. The first electrode has a portion that overlaps the coil opening when the first main surface is viewed in plan. The first external electrode does not overlap the coil opening on the second main surface when the first main surface is viewed in plan.

According to one aspect of the present disclosure, the electrode of the first external electrode is not provided on the second main surface of the insulator, and the first external electrode is the second main surface when the first main surface is viewed in plan. Since the main surface does not overlap the coil opening of the first conductor pattern, it is possible to suppress the generation of parasitic capacitance between the first conductor pattern in the insulator and the second main surface.

1 is a perspective view of an electronic component according to Embodiment 1; FIG. 2 is a cross-sectional view showing the configuration inside the insulator of the electronic component according to Embodiment 1. FIG. 2 is an exploded plan view showing the configuration of the electronic component according to Embodiment 1; FIG. 1 is an equivalent circuit diagram of an electronic component according to Embodiment 1 and an equivalent circuit diagram of an electronic component according to a comparative example; FIG. 8A and 8B are a cross-sectional view and an equivalent circuit diagram showing the configuration inside the insulator of the electronic component according to the second embodiment; FIG. 8 is an exploded plan view showing the configuration of an electronic component according to Embodiment 2; FIG. 11 is a cross-sectional view showing the configuration inside an insulator of an electronic component according to Embodiment 3; FIG. 11 is an exploded plan view showing the configuration of an electronic component according to Embodiment 3; 13A and 13B are an equivalent circuit diagram of an electronic component according to Embodiment 3 and an equivalent circuit diagram of an electronic component according to a comparative example; FIG. FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated; FIG. 10 is a diagram showing a comparison of resistance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated; FIG. 10 is a diagram showing a comparison of reactance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated; FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated; FIG. 10 is a diagram showing a comparison of resistance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated; FIG. 10 is a diagram showing a comparison of reactance components between the electronic component according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated;

The electronic component according to the embodiment will be described in detail below with reference to the drawings. The same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated.

(Embodiment 1)
An electronic component 100 according to Embodiment 1 will be described with reference to FIGS. 1 to 4. FIG. FIG. 1 is a perspective view of electronic component 100 according to Embodiment 1. FIG. In FIG. 1, the short side direction of the electronic component 100 is the X direction, the long side direction is the Y direction, and the height direction is the Z direction.

The electronic component 100 according to Embodiment 1 is a chip component type small coil that includes at least one conductor pattern. An electronic component 100 includes a rectangular parallelepiped insulator 10 in which a plurality of insulating substrates (insulator layers) on which at least one conductor pattern is formed are laminated. The stacking direction of the insulating substrates is the Z direction, and the direction of the arrow in FIG. 1 indicates the upper layer direction. The insulating substrate is made of, for example, an insulating material containing borosilicate glass as a main component, or an insulating resin such as alumina, zirconia, or polyimide resin. Furthermore, in the insulator 10, the interfaces between the insulating substrates may not be clearly defined due to processing such as baking or hardening.

The insulator 10 has a first main surface 11 , a second main surface 12 facing the first main surface 11 , and a first side surface 21 and a second side surface 22 connecting the first main surface 11 and the second main surface 12 . , a third side 23 and a fourth side 24 .

In FIG. 1, the first main surface 11 is positioned below the second main surface 12 in the Z direction. The first main surface 11 is a mounting surface to be placed on the mounting board, and when the electronic component 100 is mounted on the mounting board, the first main surface 11 faces the mounting board. In addition, in Embodiment 1, the first main surface 11 is also referred to as a bottom surface or a back surface, and the second main surface 12 is also referred to as a top surface.

The first side surface 21 and the second side surface 22 are provided in the longitudinal direction (Y direction) of the insulator 10 . The first side surface 21 faces the second side surface 22 . The third side surface 23 and the fourth side surface 24 are provided in the short direction (X direction) of the insulator 10 . The third side surface 23 faces the fourth side surface 24 .

The electronic component 100 includes a first external electrode 31 and a second external electrode 32 electrically connected to at least one conductor pattern provided inside the insulator 10 . The first external electrode 31 is provided closer to the third side surface 23 than the second external electrode 32 in the longitudinal direction (Y direction) of the insulator 10 . The second external electrode 32 is provided closer to the fourth side surface 24 than the first external electrode 31 in the longitudinal direction (Y direction) of the insulator 10 .

The first external electrode 31 and the second external electrode 32 are not limited to the first main surface 11, which is the bottom surface of the insulator 10, but also the first side surface 21 and the second side surface 21 connecting the first main surface 11 and the second main surface 12. An electrode (for example, an electrode surface) is also formed on the side surface 22 .

Specifically, the first external electrode 31 includes a first electrode 31a provided along the first main surface 11, a second electrode 31b provided along the first side surface 21, and a second electrode 31b provided along the first side surface 22. and a third electrode 31c provided along. The second electrode 31b and the third electrode 31c are electrically connected to the first electrode 31a through a path along the outer circumference of the insulator 10. As shown in FIG. That is, the first electrode 31a, the second electrode 31b, and the third electrode 31c are designed to be at the same potential by being electrically connected through a path along the outer periphery of the insulator 10. FIG.

Also, the first external electrode 31 does not have electrodes along the second main surface 12 , the third side surface 23 and the fourth side surface 24 . That is, when the first external electrode 31 is viewed from the third side surface 23 side with the first main surface 11 facing downward (mounting substrate side), the first external electrode 31 is concave (U-shaped) or substantially concave ( approximately U-shaped). Strictly speaking, the end portion 310b of the second electrode 31b provided along the first side surface 21 and the end portion 310c of the third electrode 31c provided along the second side surface 22 hang on the second main surface 12. However, the conductor patterns in the insulator 10 are not directly connected to the

ends

310b and 310c. Note that the first external electrode 31 may be provided on the insulator 10 so that the ends 310b and 310c do not overlap the second main surface 12 .

The second external electrode 32 includes a fourth electrode 32a provided along the first main surface 11, a fifth electrode 32b provided along the first side surface 21, and a fourth electrode 32b provided along the second side surface 22. and a sixth electrode 32c. The fifth electrode 32b and the sixth electrode 32c are electrically connected to the fourth electrode 32a through a path along the outer periphery of the insulator 10. As shown in FIG. That is, the fourth electrode 32a, the fifth electrode 32b, and the sixth electrode 32c are electrically connected by a path along the outer circumference of the insulator 10, and thus have the same potential. The second external electrode 32 is not limited to having both the fifth electrode 32b and the sixth electrode 32c, and may have either one of the fifth electrode 32b and the sixth electrode 32c. .

Also, the second external electrode 32 does not have electrodes along the second main surface 12 , the third side surface 23 and the fourth side surface 24 . That is, when the second external electrode 32 is viewed from the fourth side surface 24 side with the first main surface 11 facing downward (mounting substrate side), the second external electrode 32 is concave (U-shaped) or substantially concave ( approximately U-shaped). Strictly speaking, the end portion 320b of the fifth electrode 32b provided along the first side surface 21 and the end portion 320c of the sixth electrode 32c provided along the second side surface 22 hang on the second main surface 12. However, the conductor patterns in the insulator 10 are not directly connected to the

ends

320b and 320c. The second external electrode 32 may be provided on the insulator 10 so that the ends 320 b and 320 c do not overlap the second main surface 12 .

Although the first external electrode 31 and the second external electrode 32 have electrodes on both the first side surface 21 and the second side surface 22 , the first external electrode 31 and the second external electrode 32 have electrodes on the first side surface 21 and the second external electrode 32 . and the second side surface 22 may have an electrode. That is, the first external electrode 31 and the second external electrode 32 are L-shaped when viewed from the third side surface 23 side or the fourth side surface 24 side with the first main surface 11 facing downward (mounting substrate side). Alternatively, it may have a substantially L-shaped shape.

Also, the first external electrode 31 and the second external electrode 32 may have electrodes on the third side surface 23 and the fourth side surface 24 . Either one of the first external electrode 31 and the second external electrode 32 should not have an electrode (hereinafter also referred to as "top electrode") along at least the second main surface 12, which is the top surface. It just needs to be configured.

FIG. 2 is a cross-sectional view showing the configuration inside insulator 10 of electronic component 100 according to the first embodiment. FIG. 3 is an exploded plan view showing the configuration of electronic component 100 according to the first embodiment. As shown in FIGS. 2 and 3, the electronic component 100 includes an inductor L1 formed by conductor patterns K1 and K2 inside the insulator 10. As shown in FIGS. In addition, in the electronic component 100 according to Embodiment 1, the conductor pattern K1 or the conductor pattern K2 is an example of the "first conductor pattern" of the present disclosure. The conductor patterns K1 and K2 of the inductor L1 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by the via conductors V1.

Specifically, as shown in FIG. 3, the electronic component 100 includes insulating substrates N1 to N3 in order from the second main surface 12 side. In the insulator 10, conductor patterns and electrode patterns are formed by a printing method on the insulating substrates N1 to N3.

A conductor pattern K1 forming part of the inductor L1 is formed on the insulating substrate N1. The conductor pattern K1 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N1 in the figure. A starting end of the conductor pattern K1 is electrically connected to the second electrode 31b of the first external electrode 31 . A connection portion P1 connected to the via conductor V1 is provided in the vicinity of the terminal end of the conductor pattern K1.

A conductor pattern K2 forming part of the inductor L1 is formed on the insulating substrate N2. The conductor pattern K2 is formed so as to make about one turn counterclockwise from the center of the upper side of the insulating substrate N2 in the drawing. A connection portion P2 connected to the via conductor V1 is provided in the vicinity of the starting end of the conductor pattern K2. A terminal end of the conductor pattern K2 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.

Thus, in the insulator 10 of the electronic component 100, the conductor patterns K1 and K2 are electrically connected to the second electrode 31b of the first external electrode 31 and the fourth electrode 32a of the second external electrode 32 through the via conductors V1. properly connected. The inductor L1 forms a coil by connecting the conductor pattern K1 and the conductor pattern K2 in series.

It should be noted that the inductor L1 is not limited to forming a coil with two conductor patterns, the conductor pattern K1 and the conductor pattern K2, and may form a coil with three or more conductor patterns.

When the conductor pattern of the inductor is formed over multiple layers, if only the first electrode 31a or the fourth electrode 32a on the first main surface 11 is used, via conductors must be provided over multiple layers, and the inductor L1 or to increase the size of the electronic component while keeping the opening of the inductor L1 as it is. When electrodes are provided on the first side surface 21 and the second side surface 22 of the insulator 10 in addition to the fourth electrode 32a, the conductor pattern of the inductor can also be formed on the first side surface 21 and the second side surface 22 without using vias. can be connected. Thereby, in electronic component 100 , a conductor pattern can be formed all over the outer frame of insulator 10 . Furthermore, since the first side surface 21 and the second side surface 22 are at the same potential, the conductor pattern of the inductor can be connected to two locations on the side surface. By forming the side electrodes in this way, it becomes easier to adjust the length of the conductor pattern, and the degree of freedom in designing the conductor pattern can be improved.

Here, in the case of a small electronic component having an inductor such as the electronic component 100, the conductor pattern of the inductor is formed all over the outer frame of the insulator to secure the inductance value. When the conductor pattern of the inductor is formed all over the outer frame of the insulator, parasitic capacitance may occur between the conductor pattern in the insulator and, in particular, the external electrodes on the main surface overlapping the conductor pattern.

Therefore, as described with reference to FIG. 1, electronic component 100 according to Embodiment 1 has electrodes on first main surface 11 that is the bottom surface and on first side surface 21 and second side surface 22 that are side surfaces. The first external electrode 31 and the second external electrode 32 are provided so that the second main surface 12, which is the top surface, has no electrodes.

Further, as shown in FIG. 3, the first electrode 31a has a portion overlapping the coil openings of the conductor patterns K1 and K2 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . Also, the first external electrode 31 does not overlap the coil openings of the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the first external electrode 31 does not overlap the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.

Further, as shown in FIG. 3, the second electrode 32a has a portion that overlaps the coil openings of the conductor patterns K1 and K2 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . In addition, the second external electrode 32 does not overlap the coil openings of the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the second external electrode 32 does not overlap the conductor patterns K1 and K2 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction.

That is, by providing the external electrodes on the first main surface 11 side, mounting on the substrate is facilitated, while by not providing the external electrodes on the second main surface 12 side, parasitics between the conductor pattern and the conductor pattern are facilitated. Suppress the generation of capacity.

FIG. 4 is an equivalent circuit diagram of the electronic component 100 according to Embodiment 1 and an equivalent circuit diagram of the electronic component according to the comparative example. FIG. 4A shows an equivalent circuit diagram of electronic component 100 according to Embodiment 1 that does not have electrodes (top electrodes) along second main surface 12 . FIG. 4B shows an equivalent circuit diagram of a coil component having electrodes (top electrodes) along second main surface 12 in electronic component 100 according to Embodiment 1 as an electronic component according to a comparative example. It is Note that the electronic component according to the comparative example has the same configuration as the electronic component 100 according to the first embodiment, except that it has a top surface electrode. 4, the first terminal T1 corresponds to the connection point of the first external electrode 31 on the mounting substrate, and the second terminal T2 corresponds to the connection point of the second external electrode 32 on the mounting substrate.

As shown in FIG. 4(B), in the case of the electronic component according to the comparative example having the top electrode, parasitic currents are generated between the conductor pattern in the insulator 10 forming the inductor L1 and the top electrode, which is the external electrode. Capacitance C0 can occur. In particular, in the case of electronic components used at high frequencies, problems such as changes in electrical characteristics may occur due to the parasitic capacitance C0.

For example, a parallel resonance circuit is formed by the parasitic capacitance C0 and the inductor L1, and a resonance frequency at which the impedance becomes infinite occurs. Therefore, when the inductor is used at a frequency near the resonance frequency, the characteristics are different from the intended characteristics. Since the parasitic capacitance C0 is smaller than the capacitance formed by the pattern, it does not become a problem in the low frequency range, but becomes a problem in the high frequency range including the resonance frequency. In addition, since the conductor pattern must be arranged in the insulator while considering the parasitic capacitance C0 between the conductor pattern of the inductor L1 and the top electrode, the degree of freedom in designing the conductor pattern is reduced.

On the other hand, as shown in FIG. 4A, in the case of the electronic component 100 according to the first embodiment that does not have the top electrode, the parasitic capacitance C0 does not occur between the top electrode and the conductor pattern. A parallel resonance circuit is not generated by the parasitic capacitance C0, and the electrical characteristics are not changed. In addition, since it is not necessary to consider the occurrence of parasitic capacitance between the conductor pattern of the inductor L1 and the top electrode, the degree of freedom in designing the conductor pattern can be improved.

Also, the conductor pattern of the inductor L1 can be arranged so as to be as far away from the mounting board (first main surface 11) as possible and to be close to the second main surface 12 side. By separating the first electrode surface 31a and the fourth electrode surface 32a, which are the external electrodes of the first main surface 11, from the conductor pattern as much as possible, the parasitic capacitance between these external electrodes and the conductor pattern is reduced, and the frequency to be used is reduced. It can be designed so that parallel resonance does not occur in the band. In addition, when the external electrode overlaps the opening of the inductor L1, the magnetic field generated by the inductor L1 generates an eddy current in the top electrode, which reduces the Q value of the inductor. A decrease in the Q value can be suppressed. As described above, electronic component 100 according to Embodiment 1 does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from occurring between the top surface electrode and the conductor pattern. characteristics can be improved.

(Embodiment 2)
An electronic component 200 according to Embodiment 2 will be described with reference to FIGS. 5 and 6. FIG. In the second embodiment, as electronic component 200, a chip component type compact filter device in which inductor L1 and capacitor C1 are connected in series will be described. In the electronic component 200 according to Embodiment 2, only the configuration different from that of the electronic component 100 according to Embodiment 1 will be mainly described. The electronic component 200 according to No. 2 is also given the same reference numerals, and the description thereof is omitted.

5A and 5B are a cross-sectional view and an equivalent circuit diagram showing the configuration inside the insulator 10 of the electronic component 200 according to the second embodiment. FIG. 6 is an exploded plan view showing the configuration of electronic component 200 according to the second embodiment. As shown in FIGS. 5 and 6, electronic component 200 includes, in insulator 10, an inductor L1 configured by conductor patterns K1 and K2 and a capacitor C1 configured by electrode patterns K3 and K4. By connecting inductor L1 and capacitor C1 in series within insulator 10, electronic component 200 forms a series resonance circuit. In addition, in the electronic component 200 according to the second embodiment, the conductor pattern K1 or the conductor pattern K2 is an example of the "first conductor pattern" of the present disclosure.

The electrode patterns K3 and K4 of the capacitor C1 are stacked below the conductor patterns K1 and K2 of the inductor L1 in the Z direction via an insulating layer. That is, the capacitor C1 is arranged closer to the first main surface 11 than the inductor L1. When the capacitor C1 is viewed from the second main surface 12 side, the electrode patterns K3 and K4 of the capacitor C1 are provided at positions that partially overlap the conductor patterns K1 and K2 in the stacking direction (Z direction).

As shown in FIG. 6, the electronic component 200 further includes an insulating substrate N3 and an insulating substrate N4 between the insulating substrate N2 and the first main surface 11. As shown in FIG. An electrode pattern K4 forming one electrode of the capacitor C1 is formed on the insulating substrate N4. When the electrode pattern K4 is viewed in plan from the second main surface 12 side, the electrode pattern K4 is provided at a position overlapping part of the conductor patterns K1 and K2 in the stacking direction (Z direction). That is, the electrode pattern K4 is provided at a position that reduces the area overlapping the opening of the inductor L1 formed by the conductor patterns K1 and K2. The electrode pattern K4 is provided with a connection portion P8 that is connected to the via conductor V2. That is, the electrode pattern K4 is connected to the connection portion P3 of the conductor pattern K2 of the inductor L1 by the via conductor V2.

An electrode pattern K3 forming the other electrode of the capacitor C1 is formed on the insulating substrate N3. When the electrode pattern K3 is viewed from the second main surface 12 side, the electrode pattern K3 is provided at a position overlapping part of the conductor patterns K1 and K2 in the stacking direction (Z direction). That is, the electrode pattern K3 is provided at a position that reduces the area overlapping the opening of the inductor L1 formed by the conductor patterns K1 and K2. The electrode pattern K3 is electrically connected to the fifth electrode 32b and the sixth electrode 32c of the second external electrode 32. As shown in FIG.

As described above, not only in a small chip part type coil including the inductor L1, but also in a small chip part type filter device forming a resonance circuit such as the electronic component 200 according to the second embodiment, the top surface electrode You may apply the structure which does not have. As a result, it is possible to prevent the occurrence of parasitic capacitance between the top electrode and the inductor L1 even in a filter device that constitutes an LC series circuit, and suppress the occurrence of parallel resonance due to the parasitic capacitance. can be done.

(Embodiment 3)
An electronic component 300 according to Embodiment 3 will be described with reference to FIGS. 7 to 15. FIG. In the third embodiment, as electronic component 300, a small chip component type filter device in which inductor L12 and capacitor C11 are connected in series and inductor L12, capacitor C11 and inductor L11 are connected in parallel will be described. . In electronic component 300 according to Embodiment 3, only the configuration different from electronic component 100 according to Embodiment 1 and electronic component 200 according to Embodiment 2 will be mainly described. In the electronic component 300 according to the third embodiment, the same components as those of the component 100 and the electronic component 200 according to the second embodiment are denoted by the same reference numerals, and descriptions thereof are omitted.

FIG. 7 is a cross-sectional view showing the configuration inside the insulator 10 of the electronic component 300 according to the third embodiment. FIG. 8 is an exploded plan view showing the configuration of electronic component 300 according to the third embodiment. As shown in FIGS. 7 and 8, electronic component 300 includes, in insulator 10, inductor L11 formed of conductor patterns K11 to K14, inductor L12 formed of conductor patterns K15 to K18, and electrode pattern K19. , K20. In insulator 10, inductor L12 and capacitor C11 are connected in series, and inductor L12, capacitor C11, and inductor L11 are connected in parallel, whereby electronic component 300 forms a resonance circuit. Incidentally, in the electronic component 300 according to the third embodiment, at least one of the conductor patterns K15 to K18 is an example of the "first conductor pattern" of the present disclosure. Further, in the electronic component 300 according to the third embodiment, the inductor L12 is an example of the "inductor" of the present disclosure, and the inductor L11 is an example of the "other inductor" of the present disclosure.

The conductor patterns K11 to K14 of the inductor L11 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by a plurality of via conductors. The conductor patterns K15 to K18 of the inductor L12 are stacked parallel to the first main surface 11 of the insulator 10 and electrically connected by a plurality of via conductors. The inductor L11 is arranged closer to the second main surface 12 than the inductor L12.

The conductor patterns K15 to K18 of the inductor L12 are stacked below the conductor patterns K11 to K14 of the inductor L11 in the Z direction via an insulating layer. That is, the inductor L12 is arranged closer to the first main surface 11 than the inductor L11. The electrode patterns K19 and K20 of the capacitor C11 are stacked below the conductor patterns K15 to K18 of the inductor L12 in the Z direction via an insulating layer. That is, the capacitor C11 is arranged closer to the first main surface 11 than the inductors L11 and L12.

Specifically, the electronic component 300 includes insulating substrates N1 to N20 in order from the second main surface 12 side. In the insulator 10, conductor patterns and electrode patterns are formed by a printing method on the insulating substrates N1 to N20.

A conductor pattern K11 forming part of the inductor L11 is formed on the insulating substrate N11. The conductor pattern K11 is formed so as to extend clockwise about 3/4 from the upper left side of the insulating substrate N11 in the figure. The starting end of the conductor pattern K11 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P11 connected to the via conductor V11A and a connection portion P12 connected to the via conductor V11B are provided in the vicinity of the terminal end of the conductor pattern K11.

A conductor pattern K12 forming part of the inductor L11 is formed on the insulating substrate N12. The conductor pattern K12 is formed so as to extend clockwise about 3/4 from the upper left side of the insulating substrate N12 in the drawing. The starting end of the conductor pattern K12 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P13 connected to the via conductors V11A and V12A and a connection portion P14 connected to the via conductors V11B and V12B are provided near the end of the conductor pattern K12.

A conductor pattern K13 forming part of the inductor L11 is formed on the insulating substrate N13. The conductor pattern K13 is formed so as to extend about 3/4 clockwise from the lower right side of the insulating substrate N13 in the figure. A connection portion P15 connected to the via conductors V12A and V13A and a connection portion P15 connected to the via conductors V12B and V13B are provided in the vicinity of the starting end of the conductor pattern K13. A terminal end of the conductor pattern K13 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.

A conductor pattern K14 forming part of the inductor L11 is formed on the insulating substrate N14. The conductor pattern K14 is formed so as to extend clockwise about 3/4 from the lower right side of the insulating substrate N14 in the drawing. A connection portion P17 connected to the via conductor V13A and a connection portion P18 connected to the via conductor V13B are provided in the vicinity of the starting end of the conductor pattern K14. A terminal end of the conductor pattern K14 is electrically connected to the fifth electrode 32b of the second external electrode 32. As shown in FIG.

Thus, the inductor L11 has the conductor patterns K11 and K12 connected in parallel, the conductor patterns K13 and K14 connected in parallel, and the conductor patterns K11, K12 and the conductor patterns K13, K14 connected in series. A coil is formed by being connected.

A conductor pattern K15 forming part of the inductor L12 is formed on the insulating substrate N15. The conductor pattern K15 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N15 in the figure. The starting end of the conductor pattern K15 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P19 connected to the via conductor V14 is provided in the vicinity of the terminal end of the conductor pattern K15.

A conductor pattern K16 forming part of the inductor L12 is formed on the insulating substrate N16. The conductor pattern K16 is formed so as to make about one turn counterclockwise from the upper left side of the insulating substrate N16 in the figure. The starting end of the conductor pattern K16 is electrically connected to the second electrode 31b of the first external electrode 31. As shown in FIG. A connection portion P20 connected to the via conductors V14 and V15 is provided near the end of the conductor pattern K16.

A conductor pattern K17 forming part of the inductor L12 is formed on the insulating substrate N17. The conductor pattern K17 is formed so as to make about one turn counterclockwise from the upper side of the insulating substrate N17 in the figure. A connection portion P21 connected to the via conductors V15 and V16A is provided in the vicinity of the starting end of the conductor pattern K17. A connection portion P22 connected to the via conductor V16B is provided in the vicinity of the terminal end of the conductor pattern K17.

A conductor pattern K18 forming part of the inductor L12 is formed on the insulating substrate N18. The conductor pattern K18 is formed so as to make about one turn counterclockwise from the upper side of the insulating substrate N18 in the figure. A connection portion P23 connected to the via conductor V16A is provided in the vicinity of the starting end of the conductor pattern K18. A connection portion P24 connected to the via conductors V16B and V17 is provided near the end of the conductor pattern K18.

Thus, the inductor L12 has the conductor patterns K15 and K16 connected in parallel, the conductor patterns K17 and K18 connected in parallel, and the conductor patterns K15, K16 and the conductor patterns K17, K18 connected in series. A coil is formed by being connected.

An electrode pattern K19 forming one electrode of the capacitor C11 is formed on the insulating substrate N19. When the electrode pattern K19 is viewed from the second main surface 12 side, the electrode pattern K19 is provided at a position overlapping part of the conductor patterns K17 and K18 in the stacking direction (Z direction). That is, the electrode pattern K19 is provided at a position that reduces the area overlapping the opening of the inductor L12 formed by the conductor patterns K17 and K18. The electrode pattern K19 is provided with a connection portion P25 that connects to the via conductor V17. That is, the electrode pattern K19 is connected to the connection portion P24 of the conductor pattern K18 of the inductor L12 by the via conductor V17.

An electrode pattern K20 forming the other electrode of the capacitor C11 is formed on the insulating substrate N20. When the electrode pattern K20 is viewed in plan from the second main surface 12 side, the electrode pattern K20 is provided at a position overlapping part of the conductor patterns K17 and K18 in the stacking direction (Z direction). That is, the electrode pattern K20 is provided at a position that reduces the area overlapping the opening of the inductor L11 formed by the conductor patterns K17 and K18. The electrode pattern K20 is electrically connected to the fifth electrode 32b and the sixth electrode 32c of the second external electrode 32. As shown in FIG.

Further, as shown in FIG. 8, the first electrode 31a has a portion overlapping the coil openings of the conductor patterns K11 to K18 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . In addition, the first external electrode 31 does not overlap the coil openings of the conductor patterns K11 to K18 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the first external electrode 31 does not overlap the conductor patterns K15 to K18 on the second main surface 12 when the second main surface 12 is viewed from the second main surface 12 side in the Z direction.

Further, as shown in FIG. 3, the second electrode 32a has a portion overlapping the coil openings of the conductor patterns K11 to K18 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. . Further, the second external electrode 32 does not overlap the coil openings of the conductor patterns K11 to K18 on the second main surface 12 when the first main surface 11 is viewed from the second main surface 12 side in the Z direction. Furthermore, the second external electrode 32 does not overlap the conductor patterns K11 to K18 on the second main surface 12 when the second main surface 12 is viewed from the second main surface 12 side in the Z direction.

In this way, a configuration without a top surface electrode may also be applied to a small chip component type filter device that forms a resonant circuit, such as the electronic component 300 according to the third embodiment.

FIG. 9 is an equivalent circuit diagram of an electronic component 300 according to Embodiment 3 and an equivalent circuit diagram of an electronic component according to a comparative example. FIG. 9A shows an equivalent circuit diagram of an electronic component 300 according to Embodiment 3 that does not have electrodes (top surface electrodes) along the second main surface 12, which is the top surface. FIG. 9B shows, as an electronic component according to a comparative example, electrodes formed on the first main surface 12 along the second main surface 12, which is the top surface, in the electronic component 300 according to the third embodiment. An equivalent circuit diagram of a coil component with equivalent electrodes (top electrodes) is shown. Note that the electronic component according to the comparative example has the same configuration as the electronic component 300 according to the third embodiment, except that it has a top surface electrode.

As shown in FIG. 9A, the electronic component 300 according to the third embodiment includes a first terminal T1, an inductor L12 connected to the first terminal T1, a capacitor C11 connected in series with the inductor L12, and a second terminal T2 connected to the capacitor C11. Further, electronic component 300 includes an inductor L11 connected in parallel with inductor L12 and capacitor C11. The first terminal T1 corresponds to the connection point of the first external electrode 31 on the mounting substrate, and the second terminal T2 corresponds to the connection point of the second external electrode 32 on the mounting substrate.

Since the inductors L11 and L12 are magnetically coupled (coupling coefficient k), a mutual inductance M is generated between the inductors L11 and L12. FIG. 9 shows an equivalent circuit diagram in which mutual inductance +M is added to each of inductor L11 and inductor L12, and mutual inductance -M is added to first terminal T1 in consideration of mutual inductance M generated. In electronic component 300, inductor L11 and inductor L12 may not be magnetically coupled.

As shown in FIG. 9B, in the case of the electronic component according to the comparative example having the top electrode, the conductor pattern in the insulator constituting the inductor L11 arranged closest to the top electrode and the external electrode A parasitic capacitance C0 may occur with the top electrode. Since a parallel resonance circuit is formed by the parasitic capacitance C0 and the inductor L11, when an electronic component is used in a frequency band that includes this parallel resonance frequency, there is a possibility that the electrical characteristics may differ from the designed values. The influence of the parasitic capacitance will be described below using an example with reference to FIGS. 10 to 15. FIG.

FIG. 10 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated. FIG. 11 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated. FIG. 12 is a diagram showing a comparison of reactance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 0.5 pF is generated. FIG. 13 is a diagram showing a comparison of pass characteristics between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated. FIG. 14 is a diagram showing a comparison of resistance components between the electronic component 300 according to Embodiment 3 and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated. FIG. 15 is a diagram showing a comparison of reactance components between the electronic component 300 according to the third embodiment and an electronic component according to a comparative example in which a parasitic capacitance of 1 pF is generated.

In FIGS. 10 to 15, the horizontal axis indicates frequency. The vertical axes of FIGS. 10 and 13 indicate the insertion loss, the vertical axes of FIGS. 11 and 14 indicate the resistance component, and the vertical axes of FIGS. 12 and 15 indicate the reactance component. there is

10 to 12, the solid line indicates the filter characteristics when a parasitic capacitance of 0.5 pF is generated by the top electrode, and the broken line indicates the filter characteristics of the electronic component 300 when no parasitic capacitance is generated. there is In FIGS. 13 and 14, the solid line indicates the filter characteristics when a parasitic capacitance of 1 pF is generated by the top electrode, and the broken line indicates the filter characteristics of the electronic component 300 when no parasitic capacitance is generated. In the figure, f1 indicates, for example, 4.4 GHz, and if there is no parasitic capacitance, a resonance peak occurs due to parallel resonance of inductor L11, capacitor C11, and inductor L12. That is, it is a frequency designed to generate a resonance peak as a filter. f2 denotes, for example, 5.5 GHz and is the frequency used as a passband by the series resonance of inductor L12 and capacitor C11 in the absence of parasitic capacitance.

First, the filter characteristics when no parasitic capacitance occurs in the electronic component 300 according to the third embodiment will be described. As shown in FIGS. 10 to 15, in the case of the electronic component 300 that does not have a top surface electrode, the signal is passed with low loss in the passband (for example, the band around frequency f2 in the figure), and the passband Signals can be efficiently attenuated in other attenuation bands (for example, a band near frequency f1 in the figure).

Next, filter characteristics when a parasitic capacitance of 0.5 pF is generated by the top electrode of the electronic component according to the comparative example will be described with reference to FIGS. 10 to 12. FIG. As shown in FIG. 10, when comparing the solid line graph and the broken line graph, the peak of the attenuation band in which the signal should originally be attenuated changes from frequency f1 to frequency f1a. Further, as shown in FIGS. 11 and 12, the electronic component according to the comparative example has a higher resistance component and reactance component in the passband (band around frequency f2 in the figure) than the electronic component 300 according to the third embodiment. is high, and as shown in FIG. 10, signal loss occurs in the passband (the band around frequency f2 in the figure). As shown in FIGS. 13-15, which will be described later, the greater the value of the parasitic capacitance, the greater the loss of such signals.

With reference to FIGS. 13 to 15, filter characteristics when a parasitic capacitance of 1.0 pF is generated by the top surface electrode of the electronic component according to the comparative example will be described. As shown in FIG. 13, in the case of the electronic component according to the comparative example in which a parasitic capacitance of 1 pF is generated, the parallel resonance caused by the parasitic capacitance and the conductor pattern inside the insulator forming the inductor L11 occurs in the passband (for example, (band near frequency f3).

As shown in FIG. 13, comparing the solid line graph and the dashed line graph, it can be seen that the resonance peak for attenuating the signal increases from frequency f1 to frequency f1b due to unnecessary parallel resonance caused by the parasitic capacitance. is changing. In addition, as shown in FIGS. 14 and 15, the electronic component according to the comparative example has a pass band (frequency The resistance component and reactance component are high in the band near f2), and as shown in FIG. 13, signal loss occurs in the passband (band near frequency f2 in the figure). As the value of the parasitic capacitance increases, the frequency at which parallel resonance occurs approaches the passband (the band around frequency f2 in the figure), so the amount of signal loss increases.

In this way, the electronic component 300 according to Embodiment 3 does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from occurring between the top surface electrode and the electronic component 300 . As a result, the electronic component 300 can improve the filter characteristics without lowering the Q value of the inductor due to the top electrode. For example, as described with reference to FIGS. 10 to 15, unnecessary parallel resonance is not caused by the parasitic capacitance and the inductor L11, so that the passband is not narrowed and signal loss is prevented. can be prevented. In addition, the capacitor C11 is arranged on the mounting substrate (first main surface 11) and the inductor L11 is placed above the capacitor C11 without considering the parasitic capacitance generated between the conductor pattern of the inductor L11 and the top surface electrode. , L12, the influence of the parasitic capacitance on the filter characteristics can be reduced as much as possible. By arranging the inductor on the top surface side in this way, the degree of freedom in designing the conductor pattern can be improved. As described above, electronic component 300 according to the third embodiment does not have a top surface electrode, so that it is possible to prevent parasitic capacitance from being generated between the top surface electrode and the characteristic as a filter device. can be improved.

The embodiments disclosed this time should be considered illustrative in all respects and not restrictive. The scope of the present invention is indicated by the scope of the claims rather than the above description, and is intended to include all modifications within the scope and meaning equivalent to the scope of the claims.

10 insulator, 11 first principal surface, 12 second principal surface, 21 first side surface, 22 second side surface, 23 third side surface, 24 fourth side surface, 31 first external electrode, 32 second external electrode, 31a third 1 electrode, 31b second electrode, 31c third electrode, 32a fourth electrode, 32b fifth electrode, 32c sixth electrode, 100, 200, 300 electronic components, 310b, 310c, 320b, 320c ends.

Claims

an insulator;
an inductor configured in the insulator and having a first conductor pattern;
A first external electrode electrically connected to the first conductor pattern,
The insulator has a first main surface, a second main surface facing the first main surface, and a first side surface, a second side surface, and a third side surface connecting the first main surface and the second main surface. , and a fourth side,
The first side faces the second side,
The third side faces the fourth side,
The first conductor pattern has a coil opening,
The first external electrode is
a first electrode provided along the first main surface;
a second electrode provided along the first side surface and electrically connected to the first electrode;
a third electrode provided along the second side surface and electrically connected to the first electrode;
The first electrode has a portion that overlaps the coil opening when the first main surface is viewed in plan,
The electronic component, wherein the first external electrode does not overlap the coil opening on the second main surface when the first main surface is viewed in plan.
The electronic component according to claim 1, wherein the first external electrode does not overlap the first conductor pattern on the second main surface when the first main surface is viewed in plan.
The inductor is composed of a plurality of conductor patterns including the first conductor pattern,
3. The electronic component according to claim 2, wherein said first external electrode does not overlap said plurality of conductor patterns on said second main surface when said first main surface is viewed in plan.
The electronic component according to claim 1, wherein the first external electrode does not have electrodes along the third side surface and the fourth side surface.
5. The electronic component according to claim 4, wherein said first external electrode has a concave or substantially concave shape when viewed from said third side surface with said first main surface facing downward. .
further comprising a second external electrode;
The second external electrode has a fourth electrode provided along the first main surface,
The second external electrode includes a fifth electrode provided along the first side surface and electrically connected to the fourth electrode, and a fifth electrode provided along the second side surface electrically connected to the fourth electrode. 2. The electronic component of claim 1, further comprising at least one of the positively connected sixth electrodes.
The electronic component according to claim 6, wherein the second external electrode has both the fifth electrode and the sixth electrode.
The electronic component according to claim 6 or 7, wherein the second external electrode is not provided on the third side surface and the fourth side surface.
9. The electronic component according to claim 8, wherein said second external electrode has a concave or substantially concave shape when said second external electrode is viewed from said fourth side surface with said first main surface facing downward. .
The electronic component according to any one of claims 1 to 9, wherein the first main surface is a surface to be placed on a mounting board.
further comprising a capacitor connected in series with the inductor within the insulator;
The electronic component according to any one of claims 1 to 10, wherein said capacitor is arranged closer to said first main surface than said inductor.
further comprising another inductor connected in parallel with the inductor and the capacitor within the insulator;
12. The electronic component according to claim 11, wherein said capacitor is arranged closer to said first main surface than said other inductor.
13. The electronic component according to claim 12, wherein said another inductor is arranged closer to said second main surface than said inductor.