WO2023137604A1 - Time delay estimation of passive intermodulation - Google Patents

Time delay estimation of passive intermodulation Download PDF

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Publication number
WO2023137604A1
WO2023137604A1 PCT/CN2022/072643 CN2022072643W WO2023137604A1 WO 2023137604 A1 WO2023137604 A1 WO 2023137604A1 CN 2022072643 W CN2022072643 W CN 2022072643W WO 2023137604 A1 WO2023137604 A1 WO 2023137604A1
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WO
WIPO (PCT)
Prior art keywords
signal
pim
controller
replica
time delay
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PCT/CN2022/072643
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French (fr)
Inventor
Hao YE
Ingolf Meier
Jin ELLGARDT
Peng Liu
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Telefonaktiebolaget Lm Ericsson (Publ)
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Priority to PCT/CN2022/072643 priority Critical patent/WO2023137604A1/en
Publication of WO2023137604A1 publication Critical patent/WO2023137604A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/15Performance testing
    • H04B17/191Over-the-air testing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/20Monitoring; Testing of receivers
    • H04B17/201Monitoring; Testing of receivers for measurement of specific parameters of the receiver or components thereof
    • H04B17/204Monitoring; Testing of receivers for measurement of specific parameters of the receiver or components thereof of interfering signals, e.g. passive intermodulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/30Monitoring; Testing of propagation channels
    • H04B17/309Measuring or estimating channel quality parameters
    • H04B17/364Delay profiles

Definitions

  • Embodiments presented herein relate to a method, a controller, a computer program, and a computer program product for estimating time delay of passive intermodulation (PIM) caused by an external PIM source.
  • PIM passive intermodulation
  • PIM is a type of distortion generated by nonlinearity of passive components, such as filters, duplexers, connectors, antennas and so forth at a cell site.
  • passive components such as filters, duplexers, connectors, antennas and so forth at a cell site.
  • the PIM is categorized as either internal or external.
  • PIM generated by the filters of the transmission (TX) radio chains in the antenna system at the cell site, loose cable connections, dirty connectors, poor performance duplexers, and aged antennas is called internal PIM whereas PIM generated by a metal fence on the roof top of a building, a metal roof, or even a drainpipe, in vicinity of the cell site is called external PIM.
  • External PIM thus refers to the case where the PIM occurs after the signals have left the transmitter antenna with the resultant intermodulation reflecting back into the receiver.
  • PIM might cause the transmission power of the cell site to be backed off in order to avoid PIM to affect the receiver (RX) radio chains in the antenna system of the cell site, thus compromising the network performance.
  • RX receiver radio chains
  • a 1-dB drop in uplink sensitivity caused by PIM might reduce coverage by as much as 11%in a macro network.
  • One way to mitigate PIM for active antenna systems is to scale up existing solutions for classic antenna systems comprising from 2 to 8 TX radio chains (and equally may RX radio chains) to the AASs comprising from 16 to 64 or more TX radio chains or more (and equally may RX radio chains) .
  • One drawback of this approach is the computational cost that comes with it. Implementing a PIM cancellation function designed for traditional approaches in an AAS might be impractical.
  • Another way to mitigate PIM is to use the PIM eigen components in the uplink to steer the nulls in the downlink.
  • this principle only tries to avoid exciting the PIM source.
  • Null steering in the downlink comes with a cost of reduced capacity in terms of total power and spatial steering.
  • the location and subsequent cancellation of PIM are two tasks performed to mitigate PIM related issues.
  • the core of these two tasks involves the calculation of the time delay value of the PIM. Accurate calculation of this time delay can improve the corresponding location and cancellation of the PIM.
  • An object of embodiments herein is to address the above issues by providing time-efficient and accurate determination of the time delay value of PIM caused by an external PIM source.
  • a method for estimating time delay of PIM caused by an external PIM source is performed by a controller.
  • the method comprises obtaining an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU.
  • the method comprises determining a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal.
  • the second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source.
  • the method comprises estimating the time delay of the PIM from a peak located in the sequence of time lag values.
  • a controller for estimating time delay of PIM caused by an external PIM source.
  • the controller comprises processing circuitry.
  • the processing circuitry is configured to cause the controller to obtain an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU.
  • the processing circuitry is configured to cause the controller to determine a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal.
  • the second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source.
  • the processing circuitry is configured to cause the controller to estimate the time delay of the PIM from a peak located in the sequence of time lag values.
  • a controller for estimating time delay of PIM caused by an external PIM source.
  • the controller comprises an obtain module configured to obtain an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU.
  • the controller comprises a determine module configured to determine a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal.
  • the second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source.
  • the controller comprises an estimate module configured to estimate the time delay of the PIM from a peak located in the sequence of time lag values.
  • a computer program for estimating time delay of PIM caused by an external PIM source comprising computer program code which, when run on a controller, causes the controller to perform a method according to the first aspect.
  • a computer program product comprising a computer program according to the fourth aspect and a computer readable storage medium on which the computer program is stored.
  • the computer readable storage medium could be a non-transitory computer readable storage medium.
  • these aspects provide time-efficient and accurate estimation of the time delay of the PIM.
  • these aspects enable the time delay of the PIM to be estimated where the PIM as caused by an external PIM source is based on transmission from another RU as compared to the RU which is impacted by the PIM.
  • these aspects can be used in conjunction with, and to improve, techniques for PIM cancellation and techniques for locating the PIM source.
  • these aspects utilize already available information and do not require dedicated measurements to be made.
  • Fig. 1 is a schematic diagram illustrating a communication network according to embodiments
  • Fig. 2 is a schematic diagram illustrating part of the communication network in Fig. 1 according to an example
  • Fig. 3 shows simulation results according to an example
  • Fig. 4 is a flowchart of methods according to embodiments.
  • Fig. 5 is a block diagram of a controller according to an embodiment
  • Fig. 6 is a block diagram of the processing module of the controller in Fig. 5 according to an embodiment
  • Fig. 7 is a schematic diagram illustrating part of the communication network in Fig. 1 according to an embodiment
  • Fig. 8 shows simulation results according to an example
  • Fig. 9 is a flowchart of a methods according to an embodiment
  • Fig. 10 is a schematic diagram showing functional units of a controller according to an embodiment
  • Fig. 11 is a schematic diagram showing functional modules of a controller according to an embodiment.
  • Fig. 12 shows one example of a computer program product comprising computer readable storage medium according to an embodiment.
  • Fig. 1 is a schematic diagram illustrating a communication network 100 where embodiments presented herein can be applied.
  • the communication network 100 could be a third generation (3G) telecommunications network, a fourth generation
  • (4G) telecommunications network or a fifth (5G) telecommunications network and support any 3GPP telecommunications standard, where applicable.
  • the communication network 100 comprises a radio network node 170 configured to provide network access to user equipment (UE) in a radio access network 110.
  • radio access network nodes 170 are radio base stations (RBSs) , base transceiver stations (BTSs) , Node Bs (NBs) , evolved Node Bs (eNBs) , gNBs, access points (APs) , access nodes, backhaul nodes, and integrated access and backhaul (IAB) nodes.
  • the radio access network 110 is operatively connected to a core network 120.
  • the core network 120 is in turn operatively connected to a service network 130, such as the Internet.
  • the UE is thereby enabled to, via the radio access network node 170, access services of, and exchange data with, the service network 130.
  • the radio access network node 170 comprises, is collocated with, is integrated with, or is in operational communications with, at least two radio units (RUs) 140a, 140b.
  • RU 140a will hereinafter be denoted a first RU 140a
  • RU 140b will be denoted a second RU 140b.
  • the first RU 140a and the second RU 140b are thus part of one and the same radio access network node 170.
  • the RUs 140a, 140b are operatively connected to the core network 120 via either one and the same digital unit (DU) 150 or a separate DU each.
  • DU digital unit
  • the RUs 140a, 140b share an antenna system 180 for over the air transmission, as indicated by arrows 160a, 160b.
  • the antenna system 180 might be an active antenna system.
  • the communication network 100 further comprises a controller. There could be different possible locations of the controller in the communication network 100.
  • the controller is part of the second RU 140b.
  • the controller 200 is part of a digital unit operatively connected to the first RU 140a and the second RU 140b.
  • the controller 200 is part of centralized controller of a first digital unit operatively connected to the first RU 140a and a second digital unit operatively connected to the second RU 140b. Further aspects of the controller will be disclosed below.
  • Fig. 1 also schematically illustrates an external PIM source 190.
  • Signals transmitted from one or more of the RUs 140a, 140b might thus be (distorted and) reflected by the external PIM source 190 and received by at least one of the RUs 140a, 140b, thus causing PIM.
  • transmission from the first RU 140a causes PIM to the second RU 140b.
  • the time delay value of the PIM for one RU 140a cannot be calculated when some or all the PIM aggressors come from another RU 140a.
  • One reason for this is related to the basic principle of the estimation of the time delay, according to which the cross-correlation of the transmitted data and received data for the RU suffering from PIM is calculated to find a peak in the cross-correlation.
  • the cross-correlation calculation cannot be performed for the second RU 140b to find a valid peak. This is illustrated in Figs. 2 and 3.
  • Fig. 2 illustrates two signals, denoted “aggressor0” and “agressor1” being transmitted over the air from the first RU 140a via the antenna system 180. These two signals are reflected by the PIM source 190, causing PIM to the second RU 140b, as indicated by the signal “victim0” .
  • Fig. 3 shows, in terms of a sequence of time lag values 300, the result of the corresponding cross-correlation between a signal (not shown in Fig. 2) transmitted over the air from the second RU 140b via the antenna system 180 and the received signal “victim0” .
  • this transmitted signal does not contain any information of “aggressor0” or “agressor1” , the cross-correlation calculation between the transmitted signal and the signal “victim0” will not reveal any indication of the time delay of the PIM. This is in Fig. 3 illustrated by an invalid peak 310 in the sequence of time lag values 300.
  • the embodiments disclosed herein in particular relate to mechanisms for estimating time delay of PIM caused by an external PIM source 190.
  • a controller 200 a method performed by the controller 200, a computer program product comprising code, for example in the form of a computer program, that when run on a controller 200, causes the controller 200 to perform the method.
  • Fig. 4 is a flowchart illustrating embodiments of methods for estimating time delay of PIM caused by an external PIM source 190.
  • the methods are performed by the controller 200.
  • the methods are advantageously provided as computer programs 1220.
  • the controller 200 is configured to perform S102.
  • the controller 200 obtains an indication that a first signal transmitted over the air by the first RU 140a is reflected by the external PIM source 190 to cause PIM to the second RU 140b.
  • Information of the aggressor signal, as represented by the first signal, is then used in order to estimate the time delay of the PIM.
  • a signal hereinafter denoted a second signal
  • a replica of the first signal is compared to a replica of the first signal.
  • the controller 200 is configured to perform S108.
  • the controller 200 determines a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal.
  • the second signal is received over the air by the second RU 140b and comprises the first signal as reflected by the external PIM source 190.
  • the cross-correlation is thus calculated between the replica of the first signal and the signal received over the air by the second RU 140b.
  • the signal (i.e., the first signal) of the first RU 140a equals that of the signal (i.e., the replica of the first signal) used when calculating the cross-correlation.
  • the replica of the first signal thus replaces the signal transmitted over the air by the second RU 140b. This enables the time delay of the PIM to be found.
  • the controller 200 is configured to perform S110.
  • the controller 200 estimates the time delay of the PIM from a peak located in the sequence of time lag values.
  • the PIM is detected by means of performing a cross-correlation between downlink power of the first RU 140a and uplink signal power of the second RU 140b. If this cross-correlation is larger than some threshold value, PIM is caused to the second RU 140b. Hence, in some examples, that the PIM is caused to the second RU 140b is determined from a cross-correlation between downlink power of a data or control signal transmission at the first RU 140a and uplink signal power of a data or control signal reception at the second RU 140b.
  • the actual PIM is caused by the external PIM source 190 by the signal transmitted by the first RU 140a is reflected by the external PIM source 190.
  • this is determined from cell-identity information.
  • that the PIM is caused by the external PIM source 190 based on transmission of the first signal is determined according to cell-identity information comprised in the first signal transmitted over the air by the first RU 140a.
  • the cross-correlation is performed between the replica of the first signal and the second signal.
  • the replica of the first signal might either be provided to the controller 200 or be generated by the controller 200.
  • the controller 200 is configured to perform (optional) step S104.
  • S104 The controller 200 generates the replica of the first signal.
  • the replica of the first signal is not necessarily transmitted over the air by the second RU 140b. Hence, in some embodiments, the replica of the first signal is generated without being transmitted over the air from the second RU 140b. However, in other embodiments, the replica of the first signal is actually transmitted over the air from RU1 140b. Hence, in some embodiments, the controller 200 is configured to perform (optional) step S106.
  • the controller 200 transmits the replica of the first signal over the air by the second RU 140b.
  • the first signal is a dedicated test signal.
  • the first signal is a test signal that forms part of an ongoing downlink data or control transmission from the first RU 140a.
  • the test signal could be formed from a multi-link specific sequence and/or be formed from a random, or pseudo-random, sequence.
  • the different RUs 140a, 140b are not timewise synchronized with each other with respect to the transmission of signals. This could, for example, be the case where the link between one of the RUs 140a, 140b and the DU is longer, or shorter, than the link between another one of the RUs 140a, 140b and the same DU. Since the links generally corresponds to a certain latency, two links that have different lengths, will also have different latencies. If this is the case, then the replica of the first signal is time-aligned with transmission of the first signal. Hence, in some embodiments, the replica of the first signal is time-aligned with transmission of the first signal.
  • the first RU 140a and the second RU 140b are time-aligned with each other using any of: Global Navigation Satellite System (GNSS) clock signals, Synchronous Ethernet (SYNC-E) clock signals, Precision Time Protocol (PTP) clock signals, or clock signals from a digital unit operatively connected to the first RU 140a and the second RU 140b.
  • GNSS Global Navigation Satellite System
  • SYNC-E Synchronous Ethernet
  • PTP Precision Time Protocol
  • the time alignment might use a variety of buffers to compensate the latencies of different links and to ensure that the difference is not larger than a threshold value. Aspects of how to estimate the time delay of the PIM from a peak located in the sequence of time lag values will be disclosed next.
  • the time delay is estimated according to the position of the peak in the cross-correlation and the sampling rate.
  • the sequence of time lag values is estimated for a given signal sampling rate, and the time delay is estimated by using the signal sampling rate to convert the location of the peak in the sequence of time lag values to a time value.
  • the controller 200 comprises a sequence module 240, a synchronization module 250, a processing module 260, and an output module 270. Each of these modules 240: 270 as well as inputs and outputs of the controller 200 will now be described in turn.
  • the controller 200 has two flag inputs, one configuration input, and one data input.
  • the “Start flag” defines a first flag input. The first flag input is set when it is detected that PIM is caused to the second RU 140b and that the PIM is caused based on a signal being transmitted by another RU (i.e., by the first RU 140a) . When the first flag input is set, operation of the controller 200 is initiated.
  • the “Sync flag” defines a second flag input. This flag input comes from the DU and can be used to assist in time synchronization between multiple RUs 140a, 140b.
  • the “TXbuf_dly_cfg” defines a configuration input and is used to configure an internal delay register of the synchronization module 250.
  • the “Synced replica signal” is the replica of the first signal as time-aligned with transmission of the first signal by the first RU 140a.
  • the “Synced replica signal” is generated in the sequence module 240, for example from multi-link specific sequences stored in the sequence module 240.
  • the original random sequence sent by the first RU 140b might thus be replaced by a set of multi-link specific sequences, such as to achieve the production of the replica.
  • the “Synced replica signal” is not necessarily transmitted over the air from the antenna 180.
  • the “Signal mixed with PIM victim” is the uplink traffic data of the second RU 140b. That is, this is the signal above referred to as second signal which is received over the air by the second RU 140b and that comprises the first signal as reflected by the external PIM source 190.
  • the “PIM delay result” represents the time delay of the PIM as estimated by the controller 200.
  • the synchronization module 250 implements the above functionality of determining the time difference in latency between the first RU 140a and the second RU 140b. This time difference is input to the processing module 260.
  • the processing module 260 performs the cross-correlation between the two signals “Signal mixed with PIM victim” and Synced replica signal” and estimates the time delay of the PIM from the cross-correlation.
  • the output module 270 buffers the time delay of the PIM and provides as output the “PIM delay result” from the controller 200.
  • a TX Synchronizer block 262 is configured to, based on the time difference determined by the synchronization module 250, synchronize the replica of the first signal such that it is time-aligned with the transmission of the first signal by the first RU 140a.
  • a Synced Catcher block 264 is configured to synchronously transmit the “Synced replica signal” and receive the “Signal mixed with PIM victim” .
  • An X-Calculator block 266 is configured to perform the cross-correlation between the two signals “Signal mixed with PIM victim” and “Synced replica signal” and to identify the peak in the time lag values resulting from the cross-correlation.
  • a Time Converter block 268 is configured to convert the location of the peak in the sequence of time lag values to a time value that defines the time delay of the PIM.
  • FIG. 7 illustrates two signals, denoted “aggressor0” and “agressor1” being transmitted over the air from the first RU 140a via the antenna system 180. These two signals are reflected by the PIM source 190, causing PIM to the second RU 140b, as indicated by the signal “victim0” . But in comparison to Fig. 2, also a replica denoted “sa1rs” (short for synced aggressor1 replica signal) of the signal “agressor1” is generated and transmitted over the air from the second RU 140b via the antenna system 180.
  • sa1rs short for synced aggressor1 replica signal
  • the replica is thus time-aligned with the signal “agressor1” .
  • the replica is illustrated as being transmitted, an actual transmission of the replica is not necessary –the replica only needs to be kept internally for the purpose of performing the cross-correlation.
  • Fig. 8 shows, in terms of a sequence of time lag values 800, the result of the corresponding cross-correlation between the replica and the received signal “victim0” . Since the replica does indeed contain information of “agressor1” , the cross-correlation calculation between the transmitted signal and the signal “victim0” will correctly indicate the time delay of the PIM. This is in Fig. 8 illustrated by a valid peak 810 in the sequence of time lag values 800.
  • Fig. 9 is a flowchart illustrating a method for estimating time delay of PIM caused by an external PIM source 190 as performed by the controller 200 according to at least some of the above embodiments.
  • S202 A determination is made whether the PIM is based on transmission of a signal by the first RU 140a or the second RU 140b. One way to do this is to consider cell-ID information. If the PIM is based on transmission of a signal by the first RU 140a, S203 is entered. Else, S201 is entered again.
  • S203 A replica of the test signal transmitted by the first RU 140a is generated.
  • the replica does not need to be generated in real-time, it only needs to be accessible when the cross-correlation in S207 is to be claculated.
  • the second RU 140b stops using its original test signal and replaces this signal with the replica of the test signal.
  • the test signal of the second RU 140b is thus is a replica of the test signal of the first RU 140a.
  • S205 The RUs 140a, 140b synchronously in time send the test signal under the alignment processing in S204.
  • the second RU 140b transmits a replica of the test signal sent by the first RU 140a.
  • the first RU 140a uses a special test signal for this purpose.
  • S206 At least the test signal transmitted by the first RU 140a is received by the second RU 140b.
  • the received test signal is time-aligned with the replica of the test signal.
  • S207 The cross-correlation of the replica of the test signal as generated in S203 and the test signal as received in S206 is calculated. The highest peak is identified.
  • S208 The location of the highest peak as identified in S207 is identified, and the corresponding time delay of the PIM is determined.
  • S209 The time delay of the PIM as determined in S208 is output, possible for further processing.
  • the herein disclosed techniques can be used to estimate the time delay of the PIM for PIM caused by another RU.
  • Fig. 10 schematically illustrates, in terms of a number of functional units, the components of a controller 200 according to an embodiment.
  • Processing circuitry 210 is provided using any combination of one or more of a suitable central processing unit (CPU) , multiprocessor, microcontroller, digital signal processor (DSP) , etc., capable of executing software instructions stored in a computer program product 1210 (as in Fig. 12) , e.g. in the form of a storage medium 230.
  • the processing circuitry 210 may further be provided as at least one application specific integrated circuit (ASIC) , or field programmable gate array (FPGA) .
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • the processing circuitry 210 is configured to cause the controller 200 to perform a set of operations, or steps, as disclosed above.
  • the storage medium 230 may store the set of operations
  • the processing circuitry 210 may be configured to retrieve the set of operations from the storage medium 230 to cause the controller 200 to perform the set of operations.
  • the set of operations may be provided as a set of executable instructions.
  • the processing circuitry 210 is thereby arranged to execute methods as herein disclosed.
  • the storage medium 230 may also comprise persistent storage, which, for example, can be any single one or combination of magnetic memory, optical memory, solid state memory or even remotely mounted memory.
  • the controller 200 may further comprise a communications interface 220 at least configured for communications with the digital units 150 and the RUs 140a, 140b.
  • the communications interface 220 may comprise one or more transmitters and receivers, comprising analogue and digital components.
  • the processing circuitry 210 controls the general operation of the controller 200 e.g. by sending data and control signals to the communications interface 220 and the storage medium 230, by receiving data and reports from the communications interface 220, and by retrieving data and instructions from the storage medium 230.
  • Other components, as well as the related functionality, of the controller 200 are omitted in order not to obscure the concepts presented herein.
  • Fig. 11 schematically illustrates, in terms of a number of functional modules, the components of a controller 200 according to an embodiment.
  • the controller 200 of Fig. 11 comprises a number of functional modules; an obtain module 210a configured to perform step S102, a determine module 210d configured to perform step S108, and an estimate module 210e configured to perform step S110.
  • the controller 200 of Fig. 11 may further comprise a number of optional functional modules, such as any of a generate module 210b configured to perform step S104, and a transmit module 210c configured to perform step S106.
  • each functional module 210a: 210e may in one embodiment be implemented only in hardware and in another embodiment with the help of software, i.e., the latter embodiment having computer program instructions stored on the storage medium 230 which when run on the processing circuitry makes the controller 200 perform the corresponding steps mentioned above in conjunction with Fig 11. It should also be mentioned that even though the modules correspond to parts of a computer program, they do not need to be separate modules therein, but the way in which they are implemented in software is dependent on the programming language used.
  • one or more or all functional modules 210a: 210e may be implemented by the processing circuitry 210, possibly in cooperation with the communications interface 220 and/or the storage medium 230.
  • the processing circuitry 210 may thus be configured to from the storage medium 230 fetch instructions as provided by a functional module 210a: 210e and to execute these instructions, thereby performing any steps as disclosed herein.
  • the controller 200 may be provided as a standalone device or as a part of at least one further device.
  • the controller 200 may be provided in a node of the radio access network and might be part of, integrated with, or collocated with, a digital unit 150 or the second RU 140b.
  • functionality of the controller 200 may be distributed between at least two devices, or nodes.
  • a first portion of the instructions performed by the controller 200 may be executed in a first device, and a second portion of the of the instructions performed by the controller 200 may be executed in a second device; the herein disclosed embodiments are not limited to any particular number of devices on which the instructions performed by the controller 200 may be executed.
  • the methods according to the herein disclosed embodiments are suitable to be performed by a controller 200 residing in a cloud computational environment. Therefore, although a single processing circuitry 210 is illustrated in Fig. 10 the processing circuitry 210 may be distributed among a plurality of devices, or nodes. The same applies to the functional modules 210a: 210e of Fig. 11 and the computer program 1220 of Fig. 12.
  • Fig. 12 shows one example of a computer program product 1210 comprising computer readable storage medium 1230.
  • a computer program 1220 can be stored, which computer program 1220 can cause the processing circuitry 210 and thereto operatively coupled entities and devices, such as the communications interface 220 and the storage medium 230, to execute methods according to embodiments described herein.
  • the computer program 1220 and/or computer program product 1210 may thus provide means for performing any steps as herein disclosed.
  • the computer program product 1210 is illustrated as an optical disc, such as a CD (compact disc) or a DVD (digital versatile disc) or a Blu-Ray disc.
  • the computer program product 1210 could also be embodied as a memory, such as a random access memory (RAM) , a read-only memory (ROM) , an erasable programmable read-only memory (EPROM) , or an electrically erasable programmable read-only memory (EEPROM) and more particularly as a non-volatile storage medium of a device in an external memory such as a USB (Universal Serial Bus) memory or a Flash memory, such as a compact Flash memory.
  • the computer program 1220 is here schematically shown as a track on the depicted optical disk, the computer program 1220 can be stored in any way which is suitable for the computer program product 1210.

Abstract

There is provided mechanisms for estimating time delay of passive intermodulation (PIM) caused by an external PIM source. A method is performed by a controller. The method comprises obtaining an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU. The method comprises determining a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal. The second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source. The method comprises estimating the time delay of the PIM from a peak located in the sequence of time lag values.

Description

TIME DELAY ESTIMATION OF PASSIVE INTERMODULATION TECHNICAL FIELD
Embodiments presented herein relate to a method, a controller, a computer program, and a computer program product for estimating time delay of passive intermodulation (PIM) caused by an external PIM source.
BACKGROUND
In general terms, PIM is a type of distortion generated by nonlinearity of passive components, such as filters, duplexers, connectors, antennas and so forth at a cell site. Depending on the location of the component that generates the PIM, the PIM is categorized as either internal or external. For example, PIM generated by the filters of the transmission (TX) radio chains in the antenna system at the cell site, loose cable connections, dirty connectors, poor performance duplexers, and aged antennas, is called internal PIM whereas PIM generated by a metal fence on the roof top of a building, a metal roof, or even a drainpipe, in vicinity of the cell site is called external PIM. External PIM thus refers to the case where the PIM occurs after the signals have left the transmitter antenna with the resultant intermodulation reflecting back into the receiver. PIM might cause the transmission power of the cell site to be backed off in order to avoid PIM to affect the receiver (RX) radio chains in the antenna system of the cell site, thus compromising the network performance. For example, a 1-dB drop in uplink sensitivity caused by PIM might reduce coverage by as much as 11%in a macro network.
One way to mitigate PIM for active antenna systems (AASs) is to scale up existing solutions for classic antenna systems comprising from 2 to 8 TX radio chains (and equally may RX radio chains) to the AASs comprising from 16 to 64 or more TX radio chains or more (and equally may RX radio chains) . One drawback of this approach is the computational cost that comes with it. Implementing a PIM cancellation function designed for traditional approaches in an AAS might be impractical.
Another way to mitigate PIM is to use the PIM eigen components in the uplink to steer the nulls in the downlink. However, this principle only tries to avoid exciting the PIM source. Null steering in the downlink comes with a cost of reduced capacity in terms of total power and spatial steering.
The location and subsequent cancellation of PIM are two tasks performed to mitigate PIM related issues. The core of these two tasks involves the calculation of the time delay value of the PIM. Accurate calculation of this time delay can improve the corresponding location and cancellation of the PIM.
Hence, there is a need for accurate determination of the time delay value of the PIM.
SUMMARY
An object of embodiments herein is to address the above issues by providing time-efficient and accurate determination of the time delay value of PIM caused by an external PIM source.
According to a first aspect there is presented a method for estimating time delay of PIM caused by an external PIM source. The method is performed by a controller. The method comprises obtaining an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU. The method comprises determining a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal. The second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source. The method comprises estimating the time delay of the PIM from a peak located in the sequence of time lag values.
According to a second aspect there is presented a controller for estimating time delay of PIM caused by an external PIM source. The controller comprises processing circuitry. The processing circuitry is configured to cause the controller to obtain an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU. The processing circuitry is configured to cause the controller to determine a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal. The second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source. The processing circuitry is configured to cause the controller to estimate the time delay of the PIM from a peak located in the sequence of time lag values.
According to a third aspect there is presented a controller for estimating time delay of PIM caused by an external PIM source. The controller comprises an obtain module  configured to obtain an indication that a first signal transmitted over the air by a first RU is reflected by the external PIM source to cause PIM to a second RU. The controller comprises a determine module configured to determine a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal. The second signal is received over the air by the second RU and comprises the first signal as reflected by the external PIM source. The controller comprises an estimate module configured to estimate the time delay of the PIM from a peak located in the sequence of time lag values.
According to a fourth aspect there is presented a computer program for estimating time delay of PIM caused by an external PIM source, the computer program comprising computer program code which, when run on a controller, causes the controller to perform a method according to the first aspect.
According to a fifth aspect there is presented a computer program product comprising a computer program according to the fourth aspect and a computer readable storage medium on which the computer program is stored. The computer readable storage medium could be a non-transitory computer readable storage medium.
Advantageously, these aspects provide time-efficient and accurate estimation of the time delay of the PIM.
Advantageously, these aspects enable the time delay of the PIM to be estimated where the PIM as caused by an external PIM source is based on transmission from another RU as compared to the RU which is impacted by the PIM.
Advantageously, these aspects can be used in conjunction with, and to improve, techniques for PIM cancellation and techniques for locating the PIM source.
Advantageously, these aspects utilize already available information and do not require dedicated measurements to be made.
Other objectives, features and advantages of the enclosed embodiments will be apparent from the following detailed disclosure, from the attached dependent claims as well as from the drawings.
Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the element, apparatus, component, means, module, step, etc. " are to be interpreted openly as referring to at least one instance of the element, apparatus, component, means, module, step, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.
BRIEF DESCRIPTION OF THE DRAWINGS
The inventive concept is now described, by way of example, with reference to the accompanying drawings, in which:
Fig. 1 is a schematic diagram illustrating a communication network according to embodiments;
Fig. 2 is a schematic diagram illustrating part of the communication network in Fig. 1 according to an example;
Fig. 3 shows simulation results according to an example;
Fig. 4 is a flowchart of methods according to embodiments;
Fig. 5 is a block diagram of a controller according to an embodiment;
Fig. 6 is a block diagram of the processing module of the controller in Fig. 5 according to an embodiment
Fig. 7 is a schematic diagram illustrating part of the communication network in Fig. 1 according to an embodiment;
Fig. 8 shows simulation results according to an example;
Fig. 9 is a flowchart of a methods according to an embodiment;
Fig. 10 is a schematic diagram showing functional units of a controller according to an embodiment;
Fig. 11 is a schematic diagram showing functional modules of a controller according to an embodiment; and
Fig. 12 shows one example of a computer program product comprising computer readable storage medium according to an embodiment.
DETAILED DESCRIPTION
The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which certain embodiments of the inventive concept are shown. This inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout the description. Any step or feature illustrated by dashed lines should be regarded as optional.
Fig. 1 is a schematic diagram illustrating a communication network 100 where embodiments presented herein can be applied. The communication network 100 could be a third generation (3G) telecommunications network, a fourth generation
(4G) telecommunications network, or a fifth (5G) telecommunications network and support any 3GPP telecommunications standard, where applicable.
The communication network 100 comprises a radio network node 170 configured to provide network access to user equipment (UE) in a radio access network 110. Examples of radio access network nodes 170 are radio base stations (RBSs) , base transceiver stations (BTSs) , Node Bs (NBs) , evolved Node Bs (eNBs) , gNBs, access points (APs) , access nodes, backhaul nodes, and integrated access and backhaul (IAB) nodes. The radio access network 110 is operatively connected to a core network 120. The core network 120 is in turn operatively connected to a service network 130, such as the Internet. The UE is thereby enabled to, via the radio access network node 170, access services of, and exchange data with, the service network 130.
The radio access network node 170 comprises, is collocated with, is integrated with, or is in operational communications with, at least two radio units (RUs) 140a, 140b. Without loss of generality, and for ease of description, RU 140a will hereinafter be denoted a first RU 140a, whereas RU 140b will be denoted a second RU 140b. However, this does not imply that there is any hierarchical relationship among the  RUs  140a, 140b. In some examples, the first RU 140a and the second RU 140b are thus part of one and the same radio access network node 170. The  RUs  140a, 140b are operatively connected to the core network 120 via either one and the same digital unit (DU) 150 or a separate DU each. Further, the  RUs  140a, 140b share an antenna system 180 for over the air transmission, as indicated by  arrows  160a, 160b. The antenna system 180 might be an active antenna system. The communication network 100 further comprises a controller. There could be different possible locations of the controller in the communication network 100. In some examples, the controller is part of the second RU 140b. In some examples, the controller 200 is part of a digital unit operatively connected to the first RU 140a and the second RU 140b. In some examples, the controller 200 is part of centralized controller of a first digital unit operatively connected to the first RU 140a and a second digital unit operatively connected to the second RU 140b. Further aspects of the controller will be disclosed below.
Fig. 1 also schematically illustrates an external PIM source 190. Signals transmitted from one or more of the  RUs  140a, 140b might thus be (distorted and) reflected by the external PIM source 190 and received by at least one of the  RUs  140a, 140b, thus causing PIM. Without loss of generality, and for ease of description, it will hereinafter be assumed that transmission from the first RU 140a causes PIM to the second RU 140b.
As noted above there is a need for accurate determination of the time delay value of the PIM.
In further detail, under the current circumstances of the case that two or  more RUs  140a, 140b are operatively connected to one and the same DU 150, the time delay value of the PIM for one RU 140a cannot be calculated when some or all the PIM aggressors come from another RU 140a. One reason for this is related to the basic principle of the estimation of the time delay, according to which the cross-correlation of the transmitted data and received data for the RU suffering from PIM is calculated to find a peak in the cross-correlation. Thus, when the transmitted data of a given RU (say, the second RU 140b) does not contain any information of the PIM aggressor (say, the first RU 140a) whereas the received data contains PIM victim information,  the cross-correlation calculation cannot be performed for the second RU 140b to find a valid peak. This is illustrated in Figs. 2 and 3.
Fig. 2 illustrates two signals, denoted “aggressor0” and “agressor1” being transmitted over the air from the first RU 140a via the antenna system 180. These two signals are reflected by the PIM source 190, causing PIM to the second RU 140b, as indicated by the signal “victim0” . Fig. 3 shows, in terms of a sequence of time lag values 300, the result of the corresponding cross-correlation between a signal (not shown in Fig. 2) transmitted over the air from the second RU 140b via the antenna system 180 and the received signal “victim0” . Since this transmitted signal does not contain any information of “aggressor0” or “agressor1” , the cross-correlation calculation between the transmitted signal and the signal “victim0” will not reveal any indication of the time delay of the PIM. This is in Fig. 3 illustrated by an invalid peak 310 in the sequence of time lag values 300.
Since the time delay of the PIM cannot be accurately determined, this will lead to that the PIM cannot be cancelled. Similarly, without the time delay of the PIM, the PIM source 190 cannot be accurately located. How to accurately determine the time delay of the PIM is therefore addressed by the present disclosure.
The embodiments disclosed herein in particular relate to mechanisms for estimating time delay of PIM caused by an external PIM source 190. In order to obtain such mechanisms there is provided a controller 200, a method performed by the controller 200, a computer program product comprising code, for example in the form of a computer program, that when run on a controller 200, causes the controller 200 to perform the method.
Fig. 4 is a flowchart illustrating embodiments of methods for estimating time delay of PIM caused by an external PIM source 190. The methods are performed by the controller 200. The methods are advantageously provided as computer programs 1220.
It is assumed that a signal transmitted by the first RU 140a is detected to cause PIM to the second RU 140b. In particular, the controller 200 is configured to perform S102.
S102: The controller 200 obtains an indication that a first signal transmitted over the air by the first RU 140a is reflected by the external PIM source 190 to cause PIM to the second RU 140b.
Aspects of how it can be detected that the PIM is caused to the second RU 140b will be disclosed below.
Information of the aggressor signal, as represented by the first signal, is then used in order to estimate the time delay of the PIM. In particular, a signal (hereinafter denoted a second signal) as received over the air by the second RU 140b is compared to a replica of the first signal. However, this does not imply that the replica of the first signal is transmitted over the air by the second RU 140b. In particular, the controller 200 is configured to perform S108.
S108: The controller 200 determines a sequence of time lag values by performing a cross-correlation between a replica of the first signal and a second signal. The second signal is received over the air by the second RU 140b and comprises the first signal as reflected by the external PIM source 190.
In this way, instead of calculating the cross-correlation between the signal transmitted over the air by the second RU 140b and the signal received over the air by the second RU 140b, the cross-correlation is thus calculated between the replica of the first signal and the signal received over the air by the second RU 140b.
Hence, information of the RU (i.e., the first RU 140a) based on which transmission the PIM is caused by the external PIM source 190 is included when the cross-correlation is calculated. In particular, the signal (i.e., the first signal) of the first RU 140a equals that of the signal (i.e., the replica of the first signal) used when calculating the cross-correlation. When calculating the cross-correlation, the replica of the first signal thus replaces the signal transmitted over the air by the second RU 140b. This enables the time delay of the PIM to be found. In particular, the controller 200 is configured to perform S110.
S110: The controller 200 estimates the time delay of the PIM from a peak located in the sequence of time lag values.
Embodiments relating to further details of estimating time delay of PIM caused by an external PIM source 190 as performed by the controller 200 will now be disclosed.
Aspects of detecting PIM will be disclosed next.
There could be different ways to determine that PIM as such is caused to the second RU 140b. In some examples, the PIM is detected by means of performing a cross-correlation between downlink power of the first RU 140a and uplink signal power of the second RU 140b. If this cross-correlation is larger than some threshold value, PIM is caused to the second RU 140b. Hence, in some examples, that the PIM is caused to the second RU 140b is determined from a cross-correlation between downlink power of a data or control signal transmission at the first RU 140a and uplink signal power of a data or control signal reception at the second RU 140b.
Aspects of identifying that the external PIM source 190 causes the PIM based on the signal transmitted by the first RU 140a will be disclosed next.
As disclosed above, it is assumed that a signal transmitted by the first RU 140a is detected to cause PIM to the second RU 140b. The actual PIM is caused by the external PIM source 190 by the signal transmitted by the first RU 140a is reflected by the external PIM source 190. There could be different ways to determine that it is based on transmission of the first signal from the first RU 140a that the external PIM source 190 causes the PIM. In some aspects, this is determined from cell-identity information. In particular, in some embodiments, that the PIM is caused by the external PIM source 190 based on transmission of the first signal is determined according to cell-identity information comprised in the first signal transmitted over the air by the first RU 140a.
Aspects of the replica of the first signal will be disclosed next.
As disclosed above, the cross-correlation is performed between the replica of the first signal and the second signal. The replica of the first signal might either be provided to the controller 200 or be generated by the controller 200. Hence, in some embodiments, the controller 200 is configured to perform (optional) step S104.
S104: The controller 200 generates the replica of the first signal.
As further disclosed above, the replica of the first signal is not necessarily transmitted over the air by the second RU 140b. Hence, in some embodiments, the replica of the first signal is generated without being transmitted over the air from the second RU 140b. However, in other embodiments, the replica of the first signal is actually transmitted over the air from RU1 140b. Hence, in some embodiments, the controller 200 is configured to perform (optional) step S106.
S106: The controller 200 transmits the replica of the first signal over the air by the second RU 140b.
There could be different types of signals transmitted by the first RU 140a and hence different types of replicas of this signal. In some embodiments, the first signal is a dedicated test signal. In some embodiments, the first signal is a test signal that forms part of an ongoing downlink data or control transmission from the first RU 140a. In this respect, the test signal could be formed from a multi-link specific sequence and/or be formed from a random, or pseudo-random, sequence.
Aspects of synchronization, or time-alignment, between the replica of the first signal and the actual transmission of the first signal will be disclosed next.
In some aspects, the  different RUs  140a, 140b are not timewise synchronized with each other with respect to the transmission of signals. This could, for example, be the case where the link between one of the  RUs  140a, 140b and the DU is longer, or shorter, than the link between another one of the  RUs  140a, 140b and the same DU. Since the links generally corresponds to a certain latency, two links that have different lengths, will also have different latencies. If this is the case, then the replica of the first signal is time-aligned with transmission of the first signal. Hence, in some embodiments, the replica of the first signal is time-aligned with transmission of the first signal. There could be different ways to achieve time-aligned of the replica of the first signal with transmission of the first signal. In some non-limiting examples, the first RU 140a and the second RU 140b are time-aligned with each other using any of: Global Navigation Satellite System (GNSS) clock signals, Synchronous Ethernet (SYNC-E) clock signals, Precision Time Protocol (PTP) clock signals, or clock signals from a digital unit operatively connected to the first RU 140a and the second RU 140b. The time alignment might use a variety of buffers to compensate the latencies of different links and to ensure that the difference is not larger than a threshold value.  Aspects of how to estimate the time delay of the PIM from a peak located in the sequence of time lag values will be disclosed next.
In some aspects, the time delay is estimated according to the position of the peak in the cross-correlation and the sampling rate. In particular, in some embodiments, the sequence of time lag values is estimated for a given signal sampling rate, and the time delay is estimated by using the signal sampling rate to convert the location of the peak in the sequence of time lag values to a time value.
Reference is next made to the block diagram of the controller 200 illustrated in Fig. 5. The controller 200 comprises a sequence module 240, a synchronization module 250, a processing module 260, and an output module 270. Each of these modules 240: 270 as well as inputs and outputs of the controller 200 will now be described in turn. The controller 200 has two flag inputs, one configuration input, and one data input. The “Start flag” defines a first flag input. The first flag input is set when it is detected that PIM is caused to the second RU 140b and that the PIM is caused based on a signal being transmitted by another RU (i.e., by the first RU 140a) . When the first flag input is set, operation of the controller 200 is initiated. The “Sync flag” defines a second flag input. This flag input comes from the DU and can be used to assist in time synchronization between multiple RUs 140a, 140b. The “TXbuf_dly_cfg” defines a configuration input and is used to configure an internal delay register of the synchronization module 250. The “Synced replica signal” is the replica of the first signal as time-aligned with transmission of the first signal by the first RU 140a. The “Synced replica signal” is generated in the sequence module 240, for example from multi-link specific sequences stored in the sequence module 240. When the “Start flag” is set, the original random sequence sent by the first RU 140b might thus be replaced by a set of multi-link specific sequences, such as to achieve the production of the replica. However, the “Synced replica signal” is not necessarily transmitted over the air from the antenna 180. The “Signal mixed with PIM victim” is the uplink traffic data of the second RU 140b. That is, this is the signal above referred to as second signal which is received over the air by the second RU 140b and that comprises the first signal as reflected by the external PIM source 190. The “PIM delay result” represents the time delay of the PIM as estimated by the controller 200. The synchronization module 250 implements the above functionality of determining the time difference in latency between the first RU 140a and the second RU 140b. This  time difference is input to the processing module 260. The processing module 260 performs the cross-correlation between the two signals “Signal mixed with PIM victim” and Synced replica signal” and estimates the time delay of the PIM from the cross-correlation. The output module 270 buffers the time delay of the PIM and provides as output the “PIM delay result” from the controller 200.
Further details of the processing module 260 will be disclosed next with reference to Fig. 6. A TX Synchronizer block 262 is configured to, based on the time difference determined by the synchronization module 250, synchronize the replica of the first signal such that it is time-aligned with the transmission of the first signal by the first RU 140a. A Synced Catcher block 264 is configured to synchronously transmit the “Synced replica signal” and receive the “Signal mixed with PIM victim” . An X-Calculator block 266 is configured to perform the cross-correlation between the two signals “Signal mixed with PIM victim” and “Synced replica signal” and to identify the peak in the time lag values resulting from the cross-correlation. A Time Converter block 268 is configured to convert the location of the peak in the sequence of time lag values to a time value that defines the time delay of the PIM.
A comparison to Fig. 2 and Fig. 3 will be made next with reference to Fig. 7 and Fig. 8. As in Fig. 2, Fig. 7 illustrates two signals, denoted “aggressor0” and “agressor1” being transmitted over the air from the first RU 140a via the antenna system 180. These two signals are reflected by the PIM source 190, causing PIM to the second RU 140b, as indicated by the signal “victim0” . But in comparison to Fig. 2, also a replica denoted “sa1rs” (short for synced aggressor1 replica signal) of the signal “agressor1” is generated and transmitted over the air from the second RU 140b via the antenna system 180. The replica is thus time-aligned with the signal “agressor1” . In this respect, it is only necessary to generate a replica of one of the signals “aggressor0” and “agressor1” . However, as noted above, although the replica is illustrated as being transmitted, an actual transmission of the replica is not necessary –the replica only needs to be kept internally for the purpose of performing the cross-correlation.
Fig. 8 shows, in terms of a sequence of time lag values 800, the result of the corresponding cross-correlation between the replica and the received signal “victim0” . Since the replica does indeed contain information of “agressor1” , the cross-correlation calculation between the transmitted signal and the signal “victim0” will  correctly indicate the time delay of the PIM. This is in Fig. 8 illustrated by a valid peak 810 in the sequence of time lag values 800.
Fig. 9 is a flowchart illustrating a method for estimating time delay of PIM caused by an external PIM source 190 as performed by the controller 200 according to at least some of the above embodiments.
S201: PIM is detected for the second RU 140b.
S202: A determination is made whether the PIM is based on transmission of a signal by the first RU 140a or the second RU 140b. One way to do this is to consider cell-ID information. If the PIM is based on transmission of a signal by the first RU 140a, S203 is entered. Else, S201 is entered again.
S203: A replica of the test signal transmitted by the first RU 140a is generated. The replica does not need to be generated in real-time, it only needs to be accessible when the cross-correlation in S207 is to be claculated. The second RU 140b stops using its original test signal and replaces this signal with the replica of the test signal. The test signal of the second RU 140b is thus is a replica of the test signal of the first RU 140a.
S204: Due to different time delays for different radio links, the transmission of the test signal from one or more of the  RUs  140a, 140b is delayed to timewise align the transmission of the test signal between the  different RUs  140a, 140b.
S205: The  RUs  140a, 140b synchronously in time send the test signal under the alignment processing in S204. The second RU 140b transmits a replica of the test signal sent by the first RU 140a. In some examples, the first RU 140a uses a special test signal for this purpose.
S206: At least the test signal transmitted by the first RU 140a is received by the second RU 140b. The received test signal is time-aligned with the replica of the test signal.
S207: The cross-correlation of the replica of the test signal as generated in S203 and the test signal as received in S206 is calculated. The highest peak is identified.
S208: The location of the highest peak as identified in S207 is identified, and the corresponding time delay of the PIM is determined.
S209: The time delay of the PIM as determined in S208 is output, possible for further processing.
In summary, whereas traditional techniques only can be used to calculate the time delay of the PIM for one single RU, the herein disclosed techniques can be used to estimate the time delay of the PIM for PIM caused by another RU.
Fig. 10 schematically illustrates, in terms of a number of functional units, the components of a controller 200 according to an embodiment. Processing circuitry 210 is provided using any combination of one or more of a suitable central processing unit (CPU) , multiprocessor, microcontroller, digital signal processor (DSP) , etc., capable of executing software instructions stored in a computer program product 1210 (as in Fig. 12) , e.g. in the form of a storage medium 230. The processing circuitry 210 may further be provided as at least one application specific integrated circuit (ASIC) , or field programmable gate array (FPGA) .
Particularly, the processing circuitry 210 is configured to cause the controller 200 to perform a set of operations, or steps, as disclosed above. For example, the storage medium 230 may store the set of operations, and the processing circuitry 210 may be configured to retrieve the set of operations from the storage medium 230 to cause the controller 200 to perform the set of operations. The set of operations may be provided as a set of executable instructions.
Thus the processing circuitry 210 is thereby arranged to execute methods as herein disclosed. The storage medium 230 may also comprise persistent storage, which, for example, can be any single one or combination of magnetic memory, optical memory, solid state memory or even remotely mounted memory. The controller 200 may further comprise a communications interface 220 at least configured for communications with the digital units 150 and the  RUs  140a, 140b. As such the communications interface 220 may comprise one or more transmitters and receivers, comprising analogue and digital components. The processing circuitry 210 controls the general operation of the controller 200 e.g. by sending data and control signals to the communications interface 220 and the storage medium 230, by receiving data and reports from the communications interface 220, and by retrieving data and instructions from the storage medium 230. Other components, as well as the related  functionality, of the controller 200 are omitted in order not to obscure the concepts presented herein.
Fig. 11 schematically illustrates, in terms of a number of functional modules, the components of a controller 200 according to an embodiment. The controller 200 of Fig. 11 comprises a number of functional modules; an obtain module 210a configured to perform step S102, a determine module 210d configured to perform step S108, and an estimate module 210e configured to perform step S110. The controller 200 of Fig. 11 may further comprise a number of optional functional modules, such as any of a generate module 210b configured to perform step S104, and a transmit module 210c configured to perform step S106. In general terms, each functional module 210a: 210e may in one embodiment be implemented only in hardware and in another embodiment with the help of software, i.e., the latter embodiment having computer program instructions stored on the storage medium 230 which when run on the processing circuitry makes the controller 200 perform the corresponding steps mentioned above in conjunction with Fig 11. It should also be mentioned that even though the modules correspond to parts of a computer program, they do not need to be separate modules therein, but the way in which they are implemented in software is dependent on the programming language used. Preferably, one or more or all functional modules 210a: 210e may be implemented by the processing circuitry 210, possibly in cooperation with the communications interface 220 and/or the storage medium 230. The processing circuitry 210 may thus be configured to from the storage medium 230 fetch instructions as provided by a functional module 210a: 210e and to execute these instructions, thereby performing any steps as disclosed herein.
The controller 200 may be provided as a standalone device or as a part of at least one further device. For example, the controller 200 may be provided in a node of the radio access network and might be part of, integrated with, or collocated with, a digital unit 150 or the second RU 140b. Alternatively, functionality of the controller 200 may be distributed between at least two devices, or nodes. Thus, a first portion of the instructions performed by the controller 200 may be executed in a first device, and a second portion of the of the instructions performed by the controller 200 may be executed in a second device; the herein disclosed embodiments are not limited to any particular number of devices on which the instructions performed by the controller 200 may be executed. Hence, the methods according to the herein  disclosed embodiments are suitable to be performed by a controller 200 residing in a cloud computational environment. Therefore, although a single processing circuitry 210 is illustrated in Fig. 10 the processing circuitry 210 may be distributed among a plurality of devices, or nodes. The same applies to the functional modules 210a: 210e of Fig. 11 and the computer program 1220 of Fig. 12.
Fig. 12 shows one example of a computer program product 1210 comprising computer readable storage medium 1230. On this computer readable storage medium 1230, a computer program 1220 can be stored, which computer program 1220 can cause the processing circuitry 210 and thereto operatively coupled entities and devices, such as the communications interface 220 and the storage medium 230, to execute methods according to embodiments described herein. The computer program 1220 and/or computer program product 1210 may thus provide means for performing any steps as herein disclosed.
In the example of Fig. 12, the computer program product 1210 is illustrated as an optical disc, such as a CD (compact disc) or a DVD (digital versatile disc) or a Blu-Ray disc. The computer program product 1210 could also be embodied as a memory, such as a random access memory (RAM) , a read-only memory (ROM) , an erasable programmable read-only memory (EPROM) , or an electrically erasable programmable read-only memory (EEPROM) and more particularly as a non-volatile storage medium of a device in an external memory such as a USB (Universal Serial Bus) memory or a Flash memory, such as a compact Flash memory. Thus, while the computer program 1220 is here schematically shown as a track on the depicted optical disk, the computer program 1220 can be stored in any way which is suitable for the computer program product 1210.
The inventive concept has mainly been described above with reference to a few embodiments. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the inventive concept, as defined by the appended patent claims.

Claims (19)

  1. A method for estimating time delay of passive intermodulation, PIM, caused by an external PIM source (190) , the method being performed by a controller (200) , the method comprising:
    obtaining (S102) an indication that a first signal transmitted over the air by a first radio unit, RU, (140a) is reflected by the external PIM source (190) to cause PIM to a second RU (140b) ;
    determining (S108) a sequence of time lag values (300, 800) by performing a cross-correlation between a replica of the first signal and a second signal, wherein the second signal is received over the air by the second RU (140b) and comprises the first signal as reflected by the external PIM source (190) ; and
    estimating (S110) the time delay of the PIM from a peak located in the sequence of time lag values (300, 800) .
  2. The method according to claim 1, wherein the method further comprises:
    generating (S104) the replica of the first signal.
  3. The method according to claim 2, wherein the replica of the first signal is generated without being transmitted over the air from the second RU (140b) .
  4. The method according to claim 2, wherein the method further comprises:
    transmitting (S106) the replica of the first signal over the air by the second RU (140b) .
  5. The method according to any preceding claim, wherein the first signal is either a dedicated test signal or a test signal that forms part of an ongoing downlink data or control transmission from the first RU (140a) .
  6. The method according to any preceding claim, wherein the replica of the first signal is time-aligned with transmission of the first signal.
  7. The method according to any preceding claim, wherein the first RU (140a) and the second RU (140b) are time-aligned with each other using any of: Global  Navigation Satellite System clock signals, Synchronous Ethernet clock signals, Precision Time Protocol clock signals, clock signals from a digital unit operatively connected to the first RU (140a) and the second RU (140b) .
  8. The method according to any preceding claim, wherein the sequence of time lag values (300, 800) is estimated for a given signal sampling rate, and wherein the time delay is estimated by using the signal sampling rate to convert the location of the peak in the sequence of time lag values (300, 800) to a time value.
  9. The method according to any preceding claim, wherein that the PIM is caused to the second RU (140b) is determined from a cross-correlation between downlink power of a data or control signal transmission at the first RU (140a) and uplink signal power of a data or control signal reception at the second RU (140b) .
  10. The method according to any preceding claim, wherein that the PIM is caused by the external PIM source (190) based on transmission of the first signal is determined according to cell-identity information comprised in the first signal transmitted over the air by the first RU (140a) .
  11. The method according to any preceding claim, wherein the controller (200) is part of the second RU (140b) .
  12. The method according to any of claims 1 to 10, wherein the controller (200) is part of a digital unit (150) operatively connected to the first RU (140a) and the second RU (140b) .
  13. The method according to any of claims 1 to 10, wherein the controller (200) is part of centralized controller of a first digital unit operatively connected to the first RU (140a) and a second digital unit operatively connected to the second RU (140b) .
  14. The method according to any preceding claim, wherein the first RU (140a) and the second RU (140b) are part of one and the same radio access network node (170) .
  15. A controller (200) for estimating time delay of passive intermodulation, PIM, caused by an external PIM source (190) , the controller (200) comprising processing circuitry (210) , the processing circuitry being configured to cause the controller (200) to:
    obtain an indication that a first signal transmitted over the air by a first radio unit, RU, (140a) is reflected by the external PIM source (190) to cause PIM to a second RU (140b) ;
    determine a sequence of time lag values (300, 800) by performing a cross-correlation between a replica of the first signal and a second signal, wherein the second signal is received over the air by the second RU (140b) and comprises the first signal as reflected by the external PIM source (190) ; and
    estimate the time delay of the PIM from a peak located in the sequence of time lag values (300, 800) .
  16. A controller (200) for estimating time delay of passive intermodulation, PIM, caused by an external PIM source (190) , the controller (200) comprising:
    an obtain module (210a) configured to obtain an indication that a first signal transmitted over the air by a first radio unit, RU, (140a) is reflected by the external PIM source (190) to cause PIM to a second RU (140b) ;
    a determine module (210d) configured to determine a sequence of time lag values (300, 800) by performing a cross-correlation between a replica of the first signal and a second signal, wherein the second signal is received over the air by the second RU (140b) and comprises the first signal as reflected by the external PIM source (190) ; and
    an estimate module (210e) configured to estimate the time delay of the PIM from a peak located in the sequence of time lag values (300, 800) .
  17. The controller (200) according to claim 15 or 16, further being configured to perform the method according to any of claims 2 to 14.
  18. A computer program (1220) for estimating time delay of passive intermodulation, PIM, caused by an external PIM source (190) , the computer program comprising computer code which, when run on processing circuitry (210) of a controller (200) , causes the controller (200) to:
    obtain (S102) an indication that a first signal transmitted over the air by a first radio unit, RU, (140a) is reflected by the external PIM source (190) to cause PIM to a second RU (140b) ;
    determine (S108) a sequence of time lag values (300, 800) by performing a cross-correlation between a replica of the first signal and a second signal, wherein the second signal is received over the air by the second RU (140b) and comprises the first signal as reflected by the external PIM source (190) ; and
    estimate (S110) the time delay of the PIM from a peak located in the sequence of time lag values (300, 800) .
  19. A computer program product (1210) comprising a computer program (1220) according to claim 18, and a computer readable storage medium (1230) on which the computer program is stored.
PCT/CN2022/072643 2022-01-19 2022-01-19 Time delay estimation of passive intermodulation WO2023137604A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130310023A1 (en) * 2012-05-21 2013-11-21 Aceaxis Limited Method and Apparatus for Detection of Intermodulation Products
US20180062696A1 (en) * 2016-08-31 2018-03-01 Fujitsu Limited Communication device and cancellation method
WO2021052566A1 (en) * 2019-09-17 2021-03-25 Nokia Solutions And Networks Oy Apparatus for processing passive intermodulation products

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130310023A1 (en) * 2012-05-21 2013-11-21 Aceaxis Limited Method and Apparatus for Detection of Intermodulation Products
US20180062696A1 (en) * 2016-08-31 2018-03-01 Fujitsu Limited Communication device and cancellation method
WO2021052566A1 (en) * 2019-09-17 2021-03-25 Nokia Solutions And Networks Oy Apparatus for processing passive intermodulation products

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