WO2023087221A1

WO2023087221A1 - Power supply circuit and electronic device

Info

Publication number: WO2023087221A1
Application number: PCT/CN2021/131552
Authority: WO
Inventors: 鲍清雷; 赵阳; 李伟健
Original assignee: 华为技术有限公司
Priority date: 2021-11-18
Filing date: 2021-11-18
Publication date: 2023-05-25

Abstract

The present disclosure relates to a power supply circuit supplying power to a load, and an electronic device. The power supply circuit comprises a DC-DC converter, a first controller, and a first charge compensation circuit. The first controller may detect a power supply voltage to the load, and generate a control signal when the power supply voltage is below a threshold. The first charge compensation circuit may perform charge compensation on the load to increase the power supply voltage of the load, after receiving the control signal. By means of detecting voltage when the DC-DC converter supplies power to the load, an instantaneous drop of the power supply voltage of the load can be discovered, i.e., voltage dropping significantly, for example, the voltage being lower than a preset threshold voltage. The charge compensation circuit injects charge to the load when the power supply voltage drops instantaneously, so that the power supply voltage can be quickly pulled up, so as to prevent the load from working abnormally or prevent the electronic device from crashing.

Description

Power supply circuits and electronics

technical field

The present disclosure relates to the field of electronics, and more specifically relates to a power supply circuit and electronic equipment for supplying power to loads.

Background technique

With the continuous evolution of semiconductor technology, the integration of integrated circuit chips such as mobile phone processor chips and artificial intelligence chips is getting higher and higher. The operating current required by the integrated circuit chip as a load is increasing, and the power consumed by the chip varies with the working conditions of the chip. For example, the magnitude and speed of load jumps continue to increase, and often reach instantaneous current jumps of 10A to 100A. This will cause a large drop in the output voltage of a power supply circuit such as a DC-DC converter, for example up to 30mV˜100mV. Load transient response has become an important indicator of high-current power supply circuits. Excessive drop and overshoot will cause the circuit to work abnormally, or even crash.

In some conventional solutions, the transient characteristics are improved by increasing the switching frequency of the power switch tube of the DC-DC converter and using a small inductor. However, this approach causes efficiency problems such as a decrease in the efficiency of the DC-DC converter. In addition, conventional solutions have other problems such as reliability risks.

Contents of the invention

In view of the above problems, embodiments of the present disclosure aim to provide a power supply circuit, an electronic component and an electronic device for improving the transient characteristics of power supply to a load.

According to a first aspect of the present disclosure, a power supply circuit for powering a load is provided. The power supply circuit includes a DC-DC converter, a first controller and a first charge compensation circuit. A DC-DC converter is configured to power a load. The first controller is configured to generate a first control signal based on the feedback voltage signal and the first threshold voltage. The feedback voltage signal represents the supply voltage of the DC-DC converter to the load. The first charge compensation circuit is configured to inject charge into the load in response to receiving the first control signal. By detecting the voltage when the DC-DC converter supplies power to the load, it can be found that the load's power supply voltage drops instantaneously, that is, the voltage drops significantly, for example, the voltage is lower than a preset threshold voltage. The charge compensation circuit injects charge into the load when the power supply voltage drops instantaneously, and can quickly raise the power supply voltage to prevent problems such as abnormal load operation or electronic equipment crashes. In addition, since there is no need to change the operating frequency of the DC-DC converter or reduce the inductance of the DC-DC converter compared to the conventional scheme of increasing the operating frequency of the DC-DC converter or reducing the inductance of the DC-DC converter, there will be no DC-DC The efficiency of the converter drops.

In a possible implementation manner of the first aspect, the power supply circuit further includes a second controller and a second charge compensation circuit. The second controller is configured to generate a second control signal based on the feedback voltage signal and a second threshold voltage, the second threshold voltage being different from the first threshold voltage. The second charge compensation circuit is configured to inject charge into the load in response to receiving the second control signal. In a possible implementation manner of the first aspect, the amount of charge injected into the load by the second charge compensation circuit is different from the amount of charge injected into the load by the first charge compensation circuit. Due to the simultaneous use of two charge compensation circuits, an appropriate amount of charge can be controllably injected according to the drop in supply voltage to the load. On the one hand, this enables a more rapid increase in the supply voltage, and on the other hand, prevents the supply voltage from overshooting. Accordingly, the safety of the work of the load is improved.

In a possible implementation manner of the first aspect, the first controller includes a first comparator. The first comparator is configured to compare the feedback voltage signal to a first threshold voltage; and generate a first control signal in response to the feedback voltage signal being below the first threshold voltage. In a possible implementation manner of the first aspect, the second controller includes a second comparator. The second comparator is configured to compare the feedback voltage signal to a second threshold voltage; and generate a second control signal in response to the feedback voltage signal being below the second threshold voltage. By using the comparator to implement the controller, the detection and comparison of the supply voltage can be realized with a simple and low-cost circuit structure, and corresponding control signals can be generated.

In a possible implementation manner of the first aspect, the first comparator and the second comparator include operational amplifiers. The first comparator and the second comparator may be high-speed comparators, for example, the time from receiving the feedback voltage signal to outputting the first control signal is not higher than 100 ns, 80 ns, 50 ns, 30 ns or 10 ns. By using a high-speed comparator, the response speed of the power supply voltage drop can be improved, and the power supply voltage can be quickly increased to avoid potential damage to the load caused by the long supply voltage drop time.

In a possible implementation manner of the first aspect, the power supply circuit further includes an analog-to-digital converter configured to generate a feedback voltage signal in digital form based on the power supply voltage. The analog-to-digital converter may be a high-speed analog-to-digital converter, for example, the time from receiving the voltage to outputting the feedback voltage signal in digital form is not higher than 100 nanoseconds (ns), 80 ns, 50 ns, 30 ns or 10 ns. By using a high-speed analog-to-digital converter, the response speed of the power supply voltage drop can be improved, and the power supply voltage can be rapidly increased to avoid potential damage to the load caused by the long time of the power supply voltage drop.

In a possible implementation manner of the first aspect, the first charge compensation circuit includes a switch circuit and a charge storage circuit. The switch circuit is configured to switch the output voltage of the switch circuit from a first level to a second level based on the first control signal, the first level being different from the second level. The charge storage circuit is configured to inject charges into the load in response to the switching of the output voltage of the switch circuit from a first level to a second level. By using the switching circuit and the charge storage circuit, while having the advantage of injecting charge into the load, the response speed of the power supply voltage drop can be improved (because the switching circuit response speed is very short), and the power supply voltage can be quickly increased to avoid the power supply voltage drop Potential damage to the load caused by excessive time.

In a possible implementation manner of the first aspect, the switch circuit includes a first resistor, a second resistor, and a switch. The first resistor includes a first end coupled to a ground voltage. The second resistor includes a first end coupled to the supply voltage. The switch includes a control terminal and a switching terminal. The control terminal is coupled to the first controller. The switch terminal is configured to switch from the second end of the first resistor to the second end of the second resistor in response to the control terminal receiving the first control signal. In a possible implementation manner of the first aspect, the switch is a single-pole double-throw switch.

In a possible implementation manner of the first aspect, the switch circuit includes a first transistor and a second transistor. The first transistor includes a first gate coupled to the first controller; a first source coupled to the supply voltage; and a first drain coupled to the charge storage circuit. The second transistor includes a second gate coupled to the first controller; a second source coupled to a ground voltage; and a second drain coupled to the charge storage circuit. In a possible implementation of the first aspect, the first transistor is a P-type metal oxide semiconductor (PMOS) transistor, and the second transistor is an N-type metal oxide semiconductor (N-type metal oxide semiconductor) transistor. semiconductor, NMOS) transistor. By using the first transistor and the second transistor to realize the switching circuit, the response speed of the power supply voltage drop can be improved with a simple and low-cost circuit design (because the switching circuit response speed is very short), and the power supply voltage can be quickly increased to avoid power supply The potential damage to the load caused by the voltage drop for too long.

In a possible implementation of the first aspect, the charge storage circuit includes a capacitor. By using capacitors, the amount of charge injected into the load at a time is fixed and controllable. In addition, the charge injection speed of the capacitor is very fast, which can further improve the rapid increase of the supply voltage, so as to avoid the potential damage to the load caused by the supply voltage falling for a long time.

In a possible implementation manner of the first aspect, the DC-DC converter includes an error determination circuit, a pulse width modulator, a driver, a switching stage and a load capacitor. The error determination circuit is configured to generate a difference voltage based on the reference voltage and a feedback voltage signal representing the supply voltage, and the pulse width modulator is configured to generate a pulse width modulation (PWM) signal based on the difference voltage and the periodic signal. The driver is configured to generate a switch drive signal based on the PWM signal. The switch stage is configured to generate a charging current based on the switch drive signal, and the load capacitor is configured to generate a supply voltage using the charging current.

In a possible implementation manner of the first aspect, the error determination circuit includes an error amplifier. In a possible implementation manner of the first aspect, the periodic signal includes a triangular wave signal or a sawtooth wave signal. In a possible implementation manner of the first aspect, the DC-DC converter further includes a filter inductor located between the switching stage and the load capacitor.

In a possible implementation of the first aspect, the switch stage includes an upper switch located between the supply voltage and the charging node and a lower switch located between the charging node and ground. The upper switch and the lower switch are alternately turned on based on the PWM signal. In a possible implementation manner of the first aspect, the upper switch includes a PMOS transistor, and the lower switch includes an NMOS transistor. In a possible implementation manner of the first aspect, the upper switch includes an NMOS transistor, and the lower switch includes a PMOS transistor.

In a possible implementation manner of the first aspect, the DC-DC converter includes an error determination circuit, a driver, a switching stage and a load capacitor. The error determination circuit is configured to generate a difference voltage based on the reference voltage and a feedback voltage signal representative of the supply voltage. The driver is configured to generate a switching signal based on the difference voltage. The switch stage is configured to generate a charging current based on the switch drive signal, and the load capacitor is configured to generate a supply voltage using the charging current.

In a possible implementation manner of the first aspect, the error determination circuit includes an error amplifier. In one possible implementation of the first aspect, the switching stage includes an upper switch between the supply voltage and the charging node and a voltage divider between the charging node and ground. In a possible implementation manner of the first aspect, the upper switch includes a PMOS transistor or an NMOS transistor. The voltage divider includes a third resistor and a fourth resistor connected in series between the charging node and ground. An intermediate node between the third resistor and the fourth resistor provides a feedback voltage signal representative of the supply voltage.

According to a second aspect of the present disclosure, a chip is provided. The chip includes a power supply circuit according to the first aspect of the present disclosure.

According to a third aspect of the present disclosure, an electronic component is provided. An electronic assembly includes a circuit board and a power supply circuit according to the first aspect of the present disclosure. The power supply circuit according to the first aspect of the present disclosure is mounted on a circuit board.

According to a fourth aspect of the present disclosure, an electronic component is provided. An electronic assembly includes a circuit board and a chip according to the second aspect of the present disclosure. The chip according to the second aspect of the present disclosure is mounted on a circuit board.

According to a fifth aspect of the present disclosure, an electronic device is provided. An electronic device includes a power supply and a power supply circuit according to the first aspect of the present disclosure. The power supply circuit is coupled to a power source.

According to a sixth aspect of the present disclosure, a power supply circuit for powering a load is provided. The power supply circuit includes a DC-DC converter, a first controller and a first capacitor. A DC-DC converter is configured to power a load. The first controller includes a first input coupled to the output node of the DC-DC converter and a second input coupled to the first reference voltage node. The first capacitor includes a first terminal and a second terminal. The first terminal is coupled to a first control output node of the first controller via a first switch. The second terminal is coupled to the load. The first switch is used for providing a first level or a second level different from the first level to the first terminal of the first capacitor based on the output of the first controller. By detecting the voltage when the DC-DC converter supplies power to the load, it can be found that the load's power supply voltage drops instantaneously, that is, the voltage drops significantly, for example, the voltage is lower than a preset threshold voltage. The charger injects charge into the load when the power supply voltage drops instantaneously, and can quickly raise the power supply voltage to prevent problems such as abnormal load operation or electronic equipment crashes. In addition, since there is no need to change the operating frequency of the DC-DC converter or reduce the inductance of the DC-DC converter compared to the conventional scheme of increasing the operating frequency of the DC-DC converter or reducing the inductance of the DC-DC converter, there will be no DC-DC The efficiency of the converter drops.

In a possible implementation manner of the sixth aspect, the power supply circuit further includes a second controller and a second capacitor. The second controller includes a third input coupled to the output node of the DC-DC converter, and a fourth input coupled to the second reference voltage node. The second reference voltage node is different from the first reference voltage node. The second capacitor includes a third terminal and a fourth terminal. The third terminal is coupled to a second control output node of the second controller via a second switch different from the first switch. The fourth terminal is coupled to the load. The second switch is used for providing a third level or a fourth level different from the third level to the third terminal of the second capacitor based on the output of the second controller. Due to the simultaneous use of two chargers, an appropriate amount of charge can be controllably injected according to the drop in supply voltage to the load. On the one hand, this enables a more rapid increase in the supply voltage, and on the other hand, prevents the supply voltage from overshooting. Accordingly, the safety of the work of the load is improved.

In a possible implementation manner of the sixth aspect, the first switch includes a single-pole double-throw switch. The single pole double throw switch includes a control terminal coupled to a first control output node of the first controller; and a switch terminal configured to switch between a first level and a second level based on an output of the first controller.

In a possible implementation manner of the sixth aspect, the switch includes a first transistor and a second transistor. The first transistor includes a first gate coupled to the first controller; a first source coupled to the supply voltage; and a first drain coupled to the capacitor. The second transistor includes a second gate coupled to the first controller; a second source coupled to a ground voltage; and a second drain coupled to the capacitor. By using the first transistor and the second transistor to realize the switching circuit, the response speed of the power supply voltage drop can be improved with a simple and low-cost circuit design (because the switching circuit response speed is very short), and the power supply voltage can be quickly increased to avoid power supply The potential damage to the load caused by the voltage drop for too long.

According to a seventh aspect of the present disclosure, an electronic component is provided. The electronic component includes a circuit board; and the power supply circuit according to the sixth aspect, provided on the circuit board.

According to an eighth aspect of the present disclosure, an electronic device is provided. The electronic device includes a power supply; and the power supply circuit according to the sixth aspect, coupled to the power supply.

It should be understood that what is described in the Summary of the Invention is not intended to limit the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will be readily understood through the following description.

Description of drawings

The above and other features, advantages and aspects of the various embodiments of the present disclosure will become more apparent with reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, identical or similar reference numerals denote identical or similar elements, wherein:

FIG. 1 shows a schematic block diagram of a power supply path of an electronic device to a load;

Fig. 2 shows a schematic circuit diagram of a DC-DC converter;

Fig. 3 shows a schematic circuit diagram of another DC-DC converter;

Figure 4 shows a schematic circuit diagram of a power supply circuit according to some embodiments of the present disclosure;

Figure 5 shows an exemplary circuit diagram of a controller according to some embodiments of the present disclosure;

FIG. 6 shows an exemplary circuit diagram of a charge compensation circuit according to some embodiments of the present disclosure;

Figure 7 shows an exemplary circuit diagram of a controller and charge compensation circuit according to some embodiments of the present disclosure;

FIG. 8 shows an exemplary circuit diagram of a controller and a charge compensation circuit according to other embodiments of the present disclosure;

Figure 9 shows an exemplary circuit diagram of a controller and charge compensation circuit according to some embodiments of the present disclosure; and

FIG. 10 shows a schematic circuit diagram of a power supply circuit according to some embodiments of the present disclosure.

Detailed ways

Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the drawings, it should be understood that the disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein; A more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for exemplary purposes only, and are not intended to limit the protection scope of the present disclosure.

In the description of the embodiments of the present disclosure, the term "comprising" and its similar terms should be interpreted as an open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be read as "at least one embodiment". The terms "first", "second", etc. may refer to different or the same object. The term "and/or" means at least one of the two items associated with it. For example "A and/or B" means A, B, or A and B. Other definitions, both express and implied, may also be included below.

It should be understood that for the technical solutions provided by the embodiments of the present application, in the introduction of the following specific embodiments, some repetitions may not be repeated, but it should be considered that these specific embodiments have been referred to each other and can be combined with each other.

As mentioned above, some conventional schemes for mitigating supply voltage sags powering loads can lead to efficiency issues such as decreased efficiency of DC-DC converters. For example, in some conventional approaches, the bandwidth of the error amplifier of the DC-DC converter can be increased. The load of the error amplifier is actually the parasitic capacitance of the power switch tube of the DC-DC converter, and its magnitude is in the order of 100 picofarads to several nanofarads. Increasing bandwidth requires more power dissipation in the error amplifier, which reduces the efficiency of the dc-dc converter.

In the present disclosure, an additional controller and charge compensation circuit can be added on the basis of the DC-DC converter. When a large decrease (i.e., drop) of the power supply voltage of a load such as a processor chip is detected, by injecting charge into the node connected to the load, the power supply voltage of the power supply circuit to the load can be rapidly increased, thereby to a greater extent Avoid problems such as abnormal operation of loads such as chips or crashes of electronic equipment.

FIG. 1 shows a schematic block diagram of a power supply path of an electronic device 10 to a load. The electronic device 10 may include a power source 16, a power supply circuit 14, a load 12 and other components not shown. In one embodiment, the electronic device 10 may be a smart device such as a mobile phone, a computer, or a tablet computer. In one embodiment, power source 16 may be an internal power source, such as a battery, within electronic device 10 . Alternatively, the power supply 16 may also be a device such as a power adapter for converting an external power supply (such as a mains power supply) to supply power to various components in the electronic device 10 . The power supply circuit 14 converts the output of the power supply 16 to provide a suitable voltage to the load 12 . In one embodiment, the power supply circuit 14 may be, for example, a voltage converter, such as a DC-DC converter. In one embodiment, the load 12 is, for example, a processor chip, a memory chip, a display screen and other components that perform specific functions. The present disclosure does not limit the implementation manners of the electronic device 10 , the power supply 16 , the power supply circuit 14 and the load 12 . In one embodiment, the power supply circuit 14 of the present disclosure may be integrated in a chip, for example, and mounted on a circuit board together with the load 12 . Alternatively, the power supply circuit 14 of the present disclosure is integrated in a single chip together with the load 12 . In yet other embodiments, the power supply circuit 14 of the present disclosure may be implemented by discrete components and mounted on a circuit board, which is not limited in the present disclosure.

Fig. 2 shows a schematic circuit diagram of a DC-DC converter. In one embodiment, the DC converter includes an error determination circuit 22, a periodic signal generator 24, a pulse width modulator 26, a driver 28, a switching stage, an inductor L and a load capacitor Cload. The error determination circuit 22 may be implemented as an error amplifier and configured to generate a difference voltage Vea based on the reference voltage VREF and the fed-back supply voltage VO. The pulse width modulator 26 is configured to generate a PWM signal based on the difference voltage Vea and the periodic signal of the periodic signal generator 24 . In some embodiments, the DC converter may not include the periodic signal generator 24, but receives a periodic signal from outside. Driver 28 is configured to generate switch drive signals based on the PWM signal. In one embodiment, the switching stage may include an upper switch T1 located between the supply voltage VIN and the charging node and a lower switch T2 located between the charging node and ground. The present disclosure does not limit the implementation of the switch level. The switch stage is configured to generate a charging current based on the switch drive signal. The charging current is filtered by the inductor L and supplied to the load capacitor Cload. The load capacitor Cload is configured to generate a supply voltage VO at the output node of the DC-DC converter using the charging current. In one embodiment, the upper switch includes a PMOS transistor and the lower switch includes an NMOS transistor. The upper switch and the lower switch are alternately turned on based on the PWM signal. Alternatively, the upper switch may comprise an NMOS transistor and the lower switch may comprise a PMOS transistor, and it will be understood that the drive signal in this case is inverse to that in which the upper switch is a PMOS transistor and the lower switch is an NMOS transistor. Although a specific implementation of a DC-DC converter is shown in FIG. 2, the present disclosure is not limited thereto. Other configurations of the DC-DC converter are possible, such as those shown in Figure 3.

In the DC-DC converter shown in FIG. 2 , in order to quickly pull up the falling supply voltage VO, the response speed of the error determination circuit 22 needs to be increased. One way to increase the response speed is to increase the operating frequency of the upper switch T1 and the lower switch T2. However, increasing the switching frequency results in increased losses and a decrease in the efficiency of the DC-DC converter. In addition, the DC-DC converter is affected by the process, and the range of frequency increase is limited, and the charging speed of the load is limited by the charging speed of the inductor. Another way to improve the response speed is to reduce the inductance of the inductor L. However, after using a small inductor, it is necessary to increase the switching frequency to ensure that the inductor current ripple and output voltage ripple meet the working requirements. An increase in frequency in turn leads to a decrease in the efficiency of the DC-DC converter.

Fig. 3 shows a schematic circuit diagram of another DC-DC converter. The DC-DC converter includes an error determination circuit 22, a driver 28, a switching stage and a load capacitor Cload. The error determination circuit 22 is configured to generate the difference voltage Vea based on the reference voltage VREF and the feedback voltage signal VF representing the supply voltage. The driver 28 is configured to generate a switching signal based on the difference voltage Vea. The switching stage is configured to generate a charging current based on the switch drive signal, and the load capacitor Cload is configured to generate a supply voltage VO using the charging current. In one embodiment, the error determination circuit 22 may be implemented as an error amplifier, and the switching stage may include an upper switch T1 between the supply voltage and the charge node and a voltage divider between the charge node and ground. In one embodiment, the upper switch includes a PMOS transistor or an NMOS transistor. The voltage divider includes a third resistor R3 and a fourth resistor R4 connected in series between the charge node and ground. The intermediate node between the third resistor R3 and the fourth resistor R4 provides a feedback voltage signal VF representative of the supply voltage.

In the DC-DC converter shown in FIG. 3 , in order to quickly pull up the falling supply voltage VO, the response speed of the error determining circuit 22 needs to be increased. One way to improve the response speed is to increase the bandwidth of the error determination circuit 22 . However, as mentioned above, the load of the error amplifier is actually the parasitic capacitance of the power switch tube of the DC-DC converter, and its magnitude is in the order of 100 picofarads to several nanofarads. Increasing bandwidth requires more power dissipation in the error amplifier, which reduces the efficiency of the dc-dc converter. Another way to improve the response speed is to increase the size of the upper switch T1 to reduce the on-resistance or increase the capacitance value of the load capacitor Cload. However, increasing the size of the upper switch T1 requires a larger area, increasing the cost, and increasing its driving power. consumption. On the other hand, if the capacitance value of the load capacitor Cload is increased, a larger area is required, which also leads to an increase in cost. Therefore, there is a need for an improved power supply circuit to quickly pull up the power supply voltage when the power supply voltage VO of the load drops instantaneously, and can also alleviate the efficiency problem, power consumption problem or size temperature.

FIG. 4 shows a schematic circuit diagram of a power supply circuit according to some embodiments of the present disclosure. Compared with the DC-DC converter in FIG. 2 , the power supply circuit in FIG. 4 adds a first controller 50 and a first charge compensation circuit 60 . In other words, the power supply circuit in FIG. 4 includes a DC-DC converter, a first controller 50 and a first charge compensation circuit 60 . The same or similar circuit components in FIG. 4 as in FIG. 2 are denoted by the same or similar reference numerals, and will not be repeated here. It can be understood that the various aspects described above with respect to FIG. 2 can be selectively applied to the circuit of FIG. 4 .

In one embodiment, the first controller 50 includes a first input coupled to the output node of the DC-DC converter, and a second input (not shown) coupled to the first reference voltage node. The first controller 50 is configured to generate a first control signal based on the fed back voltage signal and the first threshold voltage. The feedback voltage signal represents the supply voltage VO of the DC-DC converter to the load. The first charge compensation circuit 60 is configured to inject charge into the load 12 in response to receiving the first control signal. By detecting the voltage when the DC-DC converter supplies power to the load, it can be found that the load's power supply voltage drops instantaneously, that is, the voltage drops significantly, for example, the voltage is lower than a preset threshold voltage. The charge compensation circuit injects charge into the load when the power supply voltage drops instantaneously, and can quickly raise the power supply voltage to prevent problems such as abnormal load operation or electronic equipment crashes. In addition, since there is no need to change the operating frequency of the DC-DC converter or reduce the inductance of the DC-DC converter compared to the conventional scheme of increasing the operating frequency of the DC-DC converter or reducing the inductance of the DC-DC converter, there will be no DC-DC The efficiency of the converter drops.

FIG. 5 shows an exemplary circuit diagram of the controller 52 according to some embodiments of the present disclosure. In one embodiment, the controller 52 may be a specific implementation of the first controller 50, so the various aspects described above with respect to the first controller 50 may be applicable to the first controller in FIG. repeat. In one embodiment, controller 52 may be a comparator such as an error amplifier. The error amplifier can compare the supply voltage VO with the reference voltage Vref0. When the supply voltage VO is lower than the reference voltage Vref0, the controller 52 may output a first control signal having a first value, and when the supply voltage VO is not lower than the reference voltage Vref0, the controller 52 may output a control signal having a value different from the first value another control signal. The reference voltage Vref0 may be set as a threshold voltage at which the power supply voltage VO drops. In other words, when the supply voltage VO changes from higher than the reference voltage Vref0 to lower than the reference voltage Vref0 , the controller 52 changes its output voltage to control the first charge compensation circuit 60 to perform charge compensation. By using the comparator to implement the controller, the detection and comparison of the supply voltage can be realized with a simple and low-cost circuit structure, and corresponding control signals can be generated. Although a specific implementation of the first controller 50 of the controller is shown here, the present disclosure is not limited thereto. Other circuits with voltage detection and comparison functions can be used to realize the generation of the control signal, such as shown in FIG. 9 .

FIG. 6 shows an exemplary circuit diagram of a charge compensation circuit according to some embodiments of the present disclosure. In one embodiment, the charge compensation circuit in FIG. 6 may be a specific implementation of the first charge compensation circuit 60, so the aspects described above for the first charge compensation circuit 60 may be applicable to the charge compensation circuit in FIG. 6, I won't repeat them here. In one embodiment, the charge compensation circuit may include a switch circuit 62 and a charge storage circuit 64 . The switch circuit 62 is configured to switch the output voltage of the switch circuit 62 from a first level to a second level based on a first control signal, the first level being different from the second level. For example, when the power supply voltage VO changes from being higher than the reference voltage Vref0 to being lower than the reference voltage Vref0, the controller 52 changes its output voltage, and the switch circuit 62 can change its output voltage accordingly, such as switching from the first level to the second level. level. The charge storage circuit 64 is configured to inject charges into the load 12 in response to the switching of the output voltage of the switch circuit 62 from the first level to the second level.

In one embodiment, the switch circuit 62 includes a first resistor R1 , a second resistor R2 and a switch S1 . The first resistor R1 includes a first end coupled to a ground voltage GND. The second resistor R2 includes a first end coupled to the power supply voltage Vpvdd. The switch S1 includes a control terminal and a switching terminal. The control terminals are coupled to a first controller 50 . The switch terminal is configured to switch from the second end of the first resistor R1 to the second end of the second resistor R2 in response to the control terminal receiving the first control signal. In one embodiment, the switch S1 may be a single pole double throw switch. In one embodiment, the charge storage circuit 64 may include a charge storage circuit C_com, such as a capacitor. In one embodiment, the capacitor includes a first terminal and a second terminal. The first terminal is coupled to the first control output node of the first controller 50 via the first switch S1. The second end is coupled to the load 12 . The first switch S1 switches between a first level and a second level different from the first level based on the output of the first controller 50 . Since the capacitance of the charge storage circuit C_com is fixed, the amount of injected charges can be determined by the power supply voltage Vpvdd, so that the increase range of the power supply voltage VO can be determined. In one embodiment, the charge Q of the charge storage circuit C_com=Vpvdd*C_com=ΔVO*Cload, that is, ΔVO=Vpvdd*C_com/Cload, where ΔVO represents the variation degree of the supply voltage VO. That is, the magnitude of the increase in the supply voltage after the charge is injected. When the power supply voltage Vpvdd is fixed, the capacitance of the charge storage circuit C_com is fixed, and the capacitance of the load capacitor Cload is fixed, ΔVO is basically determined, so that the magnitude of the voltage increase can be controlled and the problem of output overshoot can be avoided. Although capacitors are used here to implement the charge storage circuit, it can be understood that other devices or circuits with a charge storage function can also be used here.

FIG. 7 shows an exemplary circuit diagram of a controller and charge compensation circuit according to other embodiments of the present disclosure. In FIG. 7 , the circuit 700 includes N charge compensation paths, where N represents an integer greater than 1, for example, N may be equal to 2. Specifically, the circuit 700 includes N controllers 72_1...72_N, and N charge compensation circuits 70-1...70-N. The N controllers 72_1 . . . 72_N respectively have substantially similar functions and operating principles to the first controller 52 shown in FIG. 5 . The N charge compensation circuits 70 - 1 ... 70 -N respectively have basically similar functions and operating principles to those of the first charge compensation circuit shown in FIG. 6 .

The controllers 72_1 . . . 72_N respectively have different reference voltages. For example, the reference voltage Vref_1 is different from the reference voltage Vref_N, for example, the reference voltage Vref_1 is greater than the reference voltage Vref_N. Therefore, different charge compensations can be performed when the power supply voltage VO drops to different degrees. For example, when the supply voltage VO drops to the reference voltage Vref_1, the charge compensation circuit 70-1 starts to perform charge compensation on the load 12, and when the supply voltage VO drops to the reference voltage Vref_N, the charge compensation circuit 70-N also starts to perform charge compensation on the load 12. charge compensation. Further, the power supply voltages VPvdd_1 and VPvdd_N may also be different, and the charges stored by the charge storage circuits C_1 and C_N may also be different, for example, due to different capacitance values. In this way, different charge amounts can be controllably injected based on the drop magnitude of the supply voltage VO, so as to ensure that the supply voltage VO can be rapidly increased without overshooting it. In this way, it can be ensured that the supply voltage VO is always within the ideal working range. In one embodiment, the charge storage circuit C_N includes a third terminal and a fourth terminal. The third terminal is coupled to a second control output node of the second controller 72_N via a second switch S_N different from the first switch S_1. The fourth end is coupled to the load 12 . The second switch S2 switches between a third level and a fourth level different from the third level based on the output of the second controller 72_N. The third level may be the same as or different from the first level. The fourth level may be the same as or different from the second level.

Further, in order to improve the response speed of the charge injection, the controllers 72_1 . . . 72_N can be realized by using high-speed comparators. For example, the time from receiving the feedback voltage signal to outputting the first control signal by the controllers 72_1 . . . 72_N is not higher than 100 nanoseconds (ns), 80 ns, 50 ns, 30 ns or 10 ns. By using a high-speed comparator, the response speed of the power supply voltage drop can be improved, and the power supply voltage can be quickly increased to avoid potential damage to the load caused by the long supply voltage drop time.

In FIG. 7 , since N charge compensation circuits are used at the same time, an appropriate amount of charge can be controllably injected according to the drop of the supply voltage to the load. On the one hand, this enables a more rapid increase in the supply voltage, and on the other hand, prevents the supply voltage from overshooting. Accordingly, the safety of the work of the load is improved.

FIG. 8 shows an exemplary circuit diagram of a controller and charge compensation circuit according to still other embodiments of the present disclosure. The circuit 800 has the same structure and working principle as the circuit 700, and the same or similar components are shown with the same or similar reference numerals, and details will not be repeated here. The difference between the circuit 800 and the circuit 700 lies in the implementation of the charge compensation circuits 80 - 1 ... 80 -N, more specifically, the implementation of the switch circuits in the charge compensation circuits 80 - 1 ... 80 -N. The charge compensation circuit 80 - 1 may include, for example, a switch circuit and a charge storage circuit C_1 , and the charge compensation circuit 80 -N may include, for example, a switch circuit and a charge storage circuit C_N. The working principles of the charge storage circuit C_1 and the charge storage circuit C_N in FIG. 8 are similar to those of the charge storage circuit C_1 and the charge storage circuit C_N in FIG. 7 , and will not be repeated here.

The switch circuit in FIG. 8 includes a first transistor TP_1 and a second transistor TN_1 . The first transistor TP_1 includes a first gate, a first source and a first drain. The first gate is coupled to the first controller 82_1. The first source is coupled to the power voltage VPvdd_1. The first drain is coupled to the charge storage circuit C_1. The second transistor TN_1 includes a second gate, a second source and a second drain. The second gate is coupled to the first controller 82_1. The second source is coupled to the ground voltage. The second drain is coupled to the charge storage circuit C_1. In one embodiment, the first transistor TP_1 is a PMOS transistor, and the second transistor TN_1 is an NMOS transistor. By using the first transistor and the second transistor to realize the switching circuit, the response speed of the power supply voltage drop can be improved with a simple and low-cost circuit design (because the switching circuit response speed is very short), and the power supply voltage can be quickly increased to avoid power supply The potential damage to the load caused by the voltage drop for too long.

When the first controller 82_1 outputs the first control signal, for example, from a high level to a low level, the first transistor TP_1 changes from off to on and the second transistor TN_1 changes from on to off, thereby The voltage of the charge storage circuit C_1 starts to change to inject charge into the load 12 . Similarly, when the Nth controller 82_N outputs the Nth control signal, for example, from a high level to a low level, the transistor TP_N changes from off to on and the transistor TN_N changes from on to off, so that the charge The voltage of the storage circuit C_N starts to change to inject charge into the load 12 . In an embodiment, the charges stored by the charge storage circuits C_1 and C_N may also be different, for example due to different capacitance values. In this way, different charge amounts can be controllably injected based on the drop magnitude of the supply voltage VO, so as to ensure that the supply voltage VO can be rapidly increased without overshooting it. In this way, it can be ensured that the supply voltage VO is always within the ideal working range.

FIG. 9 shows an exemplary circuit diagram of a controller and charge compensation circuit according to some embodiments of the present disclosure. The circuit 900 has the same structure and working principle as the circuit 700, and the same or similar components are shown with the same or similar reference numerals, and will not be repeated here. Circuit 900 differs from circuit 700 in the way the controller is implemented. Controller 90 may include, for example, an analog-to-digital converter 92 and a comparator 94 . The analog-to-digital converter 92 is configured to generate a feedback voltage signal in digital form based on the supply voltage VO. The comparator 94 can generate N different control signals based on the voltage in digital form and different reference voltages, where N represents an integer greater than 1. Similar to the different control control in FIG. 7 , different control signals can be generated when the supply voltage VO drops to different amplitudes, thereby triggering the charge compensation circuits 70_1 . . . 70_N to provide different charge compensations. In FIG. 9 , since N charge compensation circuits are used at the same time, an appropriate amount of charge can be controllably injected according to the drop range of the supply voltage to the load. On the one hand, this enables a more rapid increase in the supply voltage, and on the other hand, prevents the supply voltage from overshooting. Accordingly, the safety of the work of the load is improved. In addition, in one embodiment, the analog-to-digital converter 92 can be a high-speed analog-to-digital converter, for example, the time from receiving the voltage to outputting the feedback voltage signal in digital form is not higher than 100 nanoseconds (ns), 80ns, 50ns, 30ns or 10ns. By using a high-speed analog-to-digital converter, the response speed of the power supply voltage drop can be improved, and the power supply voltage can be rapidly increased to avoid potential damage to the load caused by the long time of the power supply voltage drop.

FIG. 10 shows a schematic circuit diagram of a power supply circuit according to some embodiments of the present disclosure. The DC-DC converter includes an error determination circuit 22, a driver 28, a switching stage and a load capacitor Cload. The error determination circuit 22 is configured to generate the difference voltage Vea based on the reference voltage VREF and the feedback voltage signal VF representing the supply voltage. The driver 28 is configured to generate a switching signal based on the difference voltage Vea. The switching stage is configured to generate a charging current based on the switch drive signal, and the load capacitor Cload is configured to generate a supply voltage VO using the charging current. In one embodiment, the error determination circuit 22 may be implemented as an error amplifier, and the switching stage may include an upper switch T1 between the supply voltage and the charge node and a voltage divider between the charge node and ground. In one embodiment, the upper switch includes a PMOS transistor or an NMOS transistor. The voltage divider includes a third resistor R3 and a fourth resistor R4 connected in series between the charge node and ground. The intermediate node between the third resistor R3 and the fourth resistor R4 provides a feedback voltage signal VF representative of the supply voltage.

In one embodiment, the DC-DC converter further includes a first controller 50 and a first charge compensation circuit 60 . The first controller 50 is configured to generate a first control signal based on the feedback voltage signal VF and the first threshold voltage. The feedback voltage signal represents the supply voltage of the DC-DC converter to the load. The first charge compensation circuit 50 is configured to inject charge into the load in response to receiving the first control signal. It can be understood that the implementations of various controllers and charge compensation circuits described above with reference to FIGS. 4-9 can be applied to the first controller 50 and the first charge compensation circuit 60 in FIG. 10 , and details are not repeated here. By detecting the voltage when the DC-DC converter supplies power to the load, it can be found that the load's power supply voltage drops instantaneously, that is, the voltage drops significantly, for example, the voltage is lower than a preset threshold voltage. The charge compensation circuit injects charge into the load when the power supply voltage drops instantaneously, and can quickly raise the power supply voltage to prevent problems such as abnormal load operation or electronic equipment crashes. In addition, since there is no need to change the operating frequency of the DC-DC converter or reduce the inductance of the DC-DC converter compared to the conventional scheme of increasing the operating frequency of the DC-DC converter or reducing the inductance of the DC-DC converter, there will be no DC-DC The efficiency of the converter drops.

Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are merely example forms of implementing the claims.

Claims

A power supply circuit for supplying power to a load, comprising:

a DC-DC converter configured to power the load;

a first controller configured to generate a first control signal based on a feedback voltage signal representing a supply voltage of the DC-DC converter to the load and a first threshold voltage, and

The first charge compensation circuit is configured to inject charge into the load in response to receiving the first control signal.
The power supply circuit according to claim 1, further comprising:

a second controller configured to generate a second control signal based on the feedback voltage signal and a second threshold voltage, the second threshold voltage being different from the first threshold voltage; and

The second charge compensation circuit is configured to inject charge into the load in response to receiving the second control signal.
The power supply circuit according to claim 1 or 2, wherein the first controller comprises a first comparator configured to:

comparing the feedback voltage signal to the first threshold voltage; and

The first control signal is generated in response to the feedback voltage signal being below a first threshold voltage.
The power supply circuit according to any one of claims 1-3, further comprising:

An analog-to-digital converter configured to generate the feedback voltage signal in digital form based on the supply voltage.
The power supply circuit according to any one of claims 1-4, wherein the first charge compensation circuit comprises:

a switch circuit configured to switch an output voltage of the switch circuit from a first level to a second level based on the first control signal, the first level being different from the second level; and

The charge storage circuit is configured to inject charges into the load in response to the switching of the output voltage of the switch circuit from the first level to the second level.
The power supply circuit according to claim 5, wherein said switching circuit comprises:

a first resistor including a first end coupled to a ground voltage;

a second resistor including a first end coupled to a supply voltage; and

switches, including:

a control terminal coupled to the first comparator; and

A switch terminal configured to switch from the second end of the first resistor to the second end of the second resistor in response to the control terminal receiving the first control signal.
The power supply circuit according to claim 5, wherein said switching circuit comprises:

a first transistor comprising:

a first gate coupled to the first comparator;

a first source coupled to the supply voltage; and

a first drain coupled to the charge storage circuit; and

a second transistor comprising:

a second gate coupled to the first comparator;

a second source coupled to the ground voltage; and

The second drain is coupled to the charge storage circuit.
A power supply circuit according to any one of claims 5-7, wherein the charge storage circuit comprises a capacitor.
An electronic assembly comprising:

circuit boards; and

The power supply circuit according to any one of claims 1-8, arranged on the circuit board.
An electronic device comprising:

power supply; and

A power supply circuit according to any one of claims 1-8, coupled to the power supply.
A power supply circuit for supplying power to a load, comprising:

a DC-DC converter configured to power the load;

a first controller including a first input coupled to an output node of the DC-DC converter, and a second input coupled to a first reference voltage node; and

The first capacitor includes a first terminal and a second terminal, the first terminal is coupled to the first control output node of the first controller via a first switch, the second terminal is coupled to the load, the The first switch is used to provide a first level or a second level different from the first level to the first terminal of the first capacitor based on the output of the first controller.
The power supply circuit according to claim 11, further comprising:

a second controller including a third input coupled to the output node of the DC-DC converter, and a fourth input coupled to a second reference voltage node, the second reference voltage node being different from the the first reference voltage node; and

The second capacitor includes a third terminal and a fourth terminal, the third terminal is coupled to the second control output node of the second controller via a second switch different from the first switch, the fourth terminal Coupled to the load, the second switch is configured to provide a third level or a fourth level different from the third level to the third terminal of the second capacitor based on the output of the second controller. level.
The power supply circuit according to claim 11 or 12, wherein said first switch comprises a single pole double throw switch, said single pole double throw switch comprising:

a control terminal coupled to the first control output node of the first controller; and

A switching terminal configured to switch between the first level and the second level based on the output of the first controller.
The power supply circuit according to claim 11 or 12, wherein said switch comprises:

a first transistor comprising:

a first gate coupled to the first controller;

a first source coupled to a supply voltage; and

a first drain coupled to the capacitor; and

a second transistor comprising:

a second gate coupled to the first controller;

a second source coupled to a ground voltage; and

A second drain coupled to the capacitor.
An electronic assembly comprising:

circuit boards; and

The power supply circuit according to any one of claims 11-14, arranged on the circuit board.
An electronic device comprising:

power supply; and

A power supply circuit according to any one of claims 11-14, coupled to the power supply.