WO2023082932A1 - 低噪声放大器、相关设备及芯片 - Google Patents

低噪声放大器、相关设备及芯片 Download PDF

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Publication number
WO2023082932A1
WO2023082932A1 PCT/CN2022/125266 CN2022125266W WO2023082932A1 WO 2023082932 A1 WO2023082932 A1 WO 2023082932A1 CN 2022125266 W CN2022125266 W CN 2022125266W WO 2023082932 A1 WO2023082932 A1 WO 2023082932A1
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capacitor
terminal
resistor
inductor
transistor
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PCT/CN2022/125266
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English (en)
French (fr)
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张莽
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2023082932A1 publication Critical patent/WO2023082932A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only

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  • the utility model relates to the field of amplifier circuits, in particular to a low-noise amplifier, WiFi 6E communication equipment and a chip.
  • the low noise amplifier (Low Noise Amplifier, referred to as LNA) has assumed an increasingly important role in the communication system.
  • the low noise amplifier is a very important module of the RF front end in the communication system. Its role is Process the signal received by the antenna and reduce the noise of the communication module.
  • the performance of the low noise amplifier directly determines the sensitivity of the receiver in the communication system and then the signal spectrum template, etc., thereby affecting and determining various performance indicators of the entire communication system.
  • the ultra-wideband WiFi 6E concept the working bandwidth of the WiFi 6E communication low noise amplifier has been further expanded from 5.15GHz-5.85GHz to 5.15GHz-7.125GHz.
  • the ultra-wide working frequency band makes WiFi 6E once again solve the problem of insufficient WiFi spectrum resources, and provides a higher transmission rate, which is very suitable for high-performance applications.
  • the WiFi 6E communication low-noise amplifier in the related art includes a bias circuit and an input matching network circuit, an amplifying circuit and a load network circuit connected in sequence.
  • the role of the input matching network circuit is to match the input impedance within the operating bandwidth of the LNA to avoid interference to the antenna/RF filter in the communication system.
  • the main body of the amplifier circuit is a casecode structure amplifier circuit composed of two E_mode transistors.
  • the impedance characteristics of the load network circuit directly affect the power gain range of the LNA and the gain flatness within the working bandwidth.
  • the load network circuit includes an ESD protection circuit. In addition to the ESD protection function of the ESD protection circuit, its parasitic capacitance actually has a great influence on the circuit. effect, making it part of the load-matching network.
  • the performance index of the WiFi 6E communication low-noise amplifier in the related art is limited by the circuit in the case of a wider working bandwidth. Among them, the bandwidth of input matching network and load matching network is relatively narrow. In the ultra-wideband environment, WiFi 6E communication low-noise amplifiers are some important technical indicators, such as gain, S11, S22, and noise figure and other indicators are seriously deteriorated, which cannot meet the needs of WiFi 6E for ultra-wideband LNAs.
  • the utility model proposes a low-noise amplifier, WiFi 6E communication equipment and a chip with a wide operating frequency band and high performance indicators.
  • the utility model provides a low noise amplifier, which includes a bias circuit and an input matching network circuit, an amplification circuit and a load network circuit connected in sequence;
  • the bias circuit is connected to the amplifying circuit for providing a bias voltage for the amplifying circuit
  • the input matching network circuit is used to match the impedance of the externally connected pre-stage circuit with the amplifier circuit;
  • the load network circuit is used to achieve impedance matching with an externally connected post-stage circuit
  • the input matching network circuit includes a first capacitor, a second capacitor, a first inductor and a fifth inductor;
  • the positive terminal of the first capacitor serves as the input terminal of the input matching network circuit
  • the negative end of the first capacitor is respectively connected to the first end of the first inductor and the first end of the fifth inductor;
  • the second end of the fifth inductor is used as the output end of the input matching network circuit
  • the second terminal of the first inductor is connected to the positive terminal of the second capacitor
  • the negative end of the second capacitor is connected to ground
  • the load network circuit includes a primary matching circuit module, and the primary matching circuit module includes a fourth inductor, a sixth inductor, and a ninth capacitor;
  • the first end of the fourth inductor is used as the input end of the first-level matching circuit module
  • the second terminal of the fourth inductor is respectively connected to the first terminal of the sixth inductor and the positive terminal of the ninth capacitor, and serves as the output terminal of the first-stage matching circuit module;
  • Both the second terminal of the sixth inductor and the negative terminal of the ninth capacitor are connected to ground.
  • the low noise amplifier further includes a third capacitor, a fourth capacitor, an eighth capacitor, a fifth resistor, a sixth resistor, an eighth resistor, a second inductor, a fifth transistor, and a second voltage regulator;
  • the load network circuit further includes a third inductor, a seventh inductor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a seventh resistor, a ninth resistor, and a fourth transistor;
  • the amplifying circuit includes a first transistor and a second transistor
  • the input terminal of the input matching network circuit is used as the signal input terminal of the low noise amplifier
  • the output terminal of the input matching network circuit is respectively connected to the output terminal of the bias circuit, the positive terminal of the eighth capacitor and the gate of the first transistor;
  • the negative end of the eighth capacitor is connected to ground
  • the source of the first transistor is connected to ground by connecting the second inductor in series, and the drain of the first transistor is connected to the source of the second transistor;
  • the gate of the second transistor is respectively connected to the positive end of the third capacitor, the second end of the fifth resistor, and the second end of the sixth resistor;
  • the drain of the second transistor is respectively connected to the positive terminal of the fourth capacitor, the positive terminal of the fifth capacitor and the second terminal of the third inductor;
  • the negative end of the third capacitor is connected to ground; the first end of the fifth resistor is connected to the negative end of the fourth capacitor;
  • the first terminal of the sixth resistor is respectively connected to the first terminal of the ninth resistor, the positive terminal of the sixth capacitor and the source of the fifth transistor;
  • the second end of the ninth resistor is connected to the first end of the third inductor
  • the negative end of the sixth capacitor is connected to ground
  • the drain of the fifth transistor is connected to the positive terminal of the second regulated voltage source, and the gate of the fifth transistor is connected to the second terminal of the eighth resistor;
  • the negative terminal of the second voltage stabilizing source is connected to ground
  • the first end of the eighth resistor is connected to the first end of the seventh resistor, and serves as the control signal input end of the low noise amplifier;
  • the second end of the seventh resistor is connected to the gate of the fourth crystal
  • the source of the fourth crystal is connected to the negative terminal of the fifth capacitor, and the drain of the fourth crystal is connected to the positive terminal of the seventh capacitor;
  • the negative terminal of the seventh capacitor is connected to the input terminal of the primary matching circuit module
  • the output end of the first-level matching circuit module is connected to the first end of the seventh inductor
  • the second terminal of the seventh inductor serves as the signal output terminal of the low noise amplifier.
  • the bias circuit includes a first voltage stabilizing source, a third transistor, a first resistor, a second resistor, a third resistor and a fourth resistor;
  • the negative end of the first voltage stabilization source is connected to ground, and the positive end of the first voltage stabilization source is connected to the first end of the first resistor;
  • the second terminal of the first resistor is respectively connected to the drain of the third transistor, the first terminal of the second resistor, the first terminal of the third resistor and the first terminal of the fourth resistor ;
  • the source of the third transistor is connected to ground, and the gate of the third transistor is connected to the second end of the second resistor;
  • the second end of the third resistor is connected to ground
  • the second terminal of the fourth resistor is used as the output terminal of the bias circuit.
  • the first transistor and the second transistor are E_mode transistors of GaAs-based EDpHEMT process
  • the fourth transistor and the fifth transistor are D_mode switch transistors of GaAs-based EDpHEMT process.
  • the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all NMOS transistors.
  • the parameter of the second inductance L2 is adjustable, and the parameter of the ninth resistor is adjustable.
  • the parameters of the fourth inductor, the sixth inductor and the ninth capacitor are all adjustable.
  • the utility model also provides a WiFi 6E communication device, the WiFi 6E communication device includes the low noise amplifier described in any one of the above.
  • the utility model also provides a chip, the chip includes the low noise amplifier described in any one of the above, and the chip is made by GaAs-based EDpHEMT process.
  • the low noise amplifier of the present invention constitutes the input matching network circuit by setting the first capacitor, the second capacitor, the first inductor and the fifth inductor, so that the input matching network circuit forms a two-stage LC filter Network, in which the first capacitor, the second capacitor and the first inductor form a first-level LC filter network, the fifth inductor and the eighth capacitor connected to it form a second-level LC filter network, the second-level LC filter network further expands the bandwidth, and the eighth capacitor actually Formed by the gate/drain parasitic capacitance of the amplifying circuit.
  • the WiFi 6E communication low noise amplifier of the present utility model is provided with a first-level matching circuit module in the load network circuit, and the first-level matching circuit module includes a fourth inductance, a sixth inductance and a ninth capacitor.
  • the ninth capacitor is a parasitic capacitance of ESD
  • the sixth inductor and the ninth capacitor form a parallel resonant circuit
  • the parallel resonant circuit and the fourth inductor form a first-level matching circuit, which further expands the bandwidth of the first-level matching circuit.
  • the circuit structure makes the S11 index, S22 index and gain index of the low noise amplifier meet the performance requirements of WiFi 6E in the 5.15GHz-7.125GHz ultra-wide working frequency band. Therefore, the low-noise amplifier, the mobile communication device and the chip of the utility model have wide working frequency band and high performance index.
  • Fig. 1 is the circuit structural diagram of a low noise amplifier of the utility model embodiment
  • Fig. 2 is the circuit diagram of the input matching network circuit of the utility model embodiment one low noise amplifier
  • Fig. 3 is the circuit diagram of the first-stage matching circuit module of the low noise amplifier of the utility model embodiment
  • Fig. 4 is the circuit diagram of the utility model embodiment two low-noise amplifiers
  • Fig. 5 is a schematic diagram of the reflection coefficient S11 curve of the low noise amplifier of the embodiment of the present invention.
  • Fig. 6 is the S22 indicator curve schematic diagram of the utility model embodiment low noise amplifier
  • FIG. 7 is a schematic diagram of a gain curve of a low noise amplifier according to an embodiment of the present invention.
  • the embodiment of the utility model provides a low-noise amplifier 100 for ultra-wideband WiFi 6E communication.
  • FIG. 1 is a circuit structure diagram of a low noise amplifier according to an embodiment of the present invention.
  • the low noise amplifier 100 is applied to WiFi 6E products in the 5.15GHz-7.125GHz operating frequency band.
  • the low noise amplifier 100 is manufactured by GaAs-based EDpHEMT process.
  • the low noise amplifier 100 includes a bias circuit 4 and an input matching network circuit 1 , an amplifying circuit 2 and a load network circuit 3 connected in sequence.
  • the bias circuit 4 is used to provide a bias voltage of the amplifying circuit 2 , and the bias circuit 4 is connected to the amplifying circuit 2 .
  • the input matching network circuit 1 is used for impedance matching the externally connected pre-stage circuit and the amplifier circuit 2 .
  • the input matching network circuit 1 realizes the matching of the input impedance within the operating bandwidth of the LNA, so as to avoid interference to the antenna/radio frequency filter in the communication system.
  • FIG. 2 is a circuit diagram of an input matching network circuit of a low noise amplifier 100 according to an embodiment of the present invention.
  • the input matching network circuit 1 includes a first capacitor C1, a second capacitor C2, a first inductor L1 and a fifth inductor L5.
  • the circuit structure of the input matching network circuit 1 is:
  • the positive terminal of the first capacitor C1 is used as the input terminal of the input matching network circuit 1 .
  • the negative terminal of the first capacitor C1 is connected to the first terminal of the first inductor L1 and the first terminal of the fifth inductor L5 respectively.
  • the second terminal of the fifth inductor L5 is used as the output terminal of the input matching network circuit 1 .
  • the second terminal of the first inductor L1 is connected to the positive terminal of the second capacitor C2.
  • the negative end of the second capacitor C2 is connected to the ground GND.
  • the input matching network circuit 1 forms a two-stage LC filter network, wherein the first capacitor C1, the second capacitor C2 and the first inductor L1 form a one-stage LC filter network, and the fifth inductor L5 is connected to all
  • the transistor gate/drain parasitic capacitance of the amplifying circuit 2 forms a secondary LC filter network.
  • the second-stage LC filtering network further expands the bandwidth of the LNA 100 .
  • the amplifying circuit 2 is used for amplifying signals.
  • the amplifying circuit 2 is composed of a casecode structure amplifying circuit composed of two E_mode transistors.
  • the load network circuit 3 is used to achieve impedance matching with an externally connected subsequent stage circuit.
  • the impedance characteristic of the load network circuit 3 directly affects the power gain range of the LNA and the gain flatness within the working bandwidth.
  • the load network circuit 3 includes a primary matching circuit module 31 .
  • FIG. 3 is a circuit diagram of a first-stage matching circuit module of a low noise amplifier 100 according to an embodiment of the present invention.
  • the primary matching circuit module 31 includes a fourth inductor L4, a sixth inductor L6 and a ninth capacitor C9.
  • the first terminal of the fourth inductor L4 is used as the input terminal of the primary matching circuit module 31.
  • the second terminal of the fourth inductor L4 is respectively connected to the first terminal of the sixth inductor L6 and the positive terminal of the ninth capacitor C9, and serves as the output terminal of the primary matching circuit module 31 .
  • Both the second terminal of the sixth inductor L6 and the negative terminal of the ninth capacitor C9 are connected to the ground GND.
  • the ninth capacitor C9 is a parasitic capacitor of ESD
  • the sixth inductance L6 and the ninth capacitor C9 form a parallel resonant circuit
  • the parallel resonant circuit and the fourth inductance L4 form a first-level matching circuit, so that a The stage matching circuit further expands the bandwidth of the low noise amplifier 100 .
  • the low noise amplifier of the second embodiment is one of the specific circuit structures of the low noise amplifier 100 of the first embodiment.
  • FIG. 4 is a circuit diagram of a low noise amplifier according to Embodiment 2 of the present invention.
  • the low noise amplifier 100 further includes a third capacitor C3, a fourth capacitor C4, an eighth capacitor C8, a fifth resistor R5, a sixth resistor R6, an eighth resistor R8, a second inductor L2, a fifth The transistor M5 and the second regulated voltage source VDC2.
  • the eighth capacitor C8 is formed by the gate/drain parasitic capacitance of the E_mode transistor of the amplifier circuit 2 .
  • the five transistors M5 are D_mode switch transistors of a GaAs-based EDpHEMT process.
  • the load network circuit 3 further includes a third inductor L3, a seventh inductor L7, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C6, a seventh resistor R7, a ninth resistor R9 and a fourth transistor M4.
  • the fourth transistor M4 is a D_mode switch transistor of a GaAs-based EDpHEMT process.
  • the amplifying circuit 2 includes a first transistor M1 and a second transistor M2.
  • both the first transistor M1 and the second transistor M2 are E_mode transistors of GaAs-based EDpHEMT process.
  • the bias circuit 4 includes a first voltage regulator VDC1 , a third transistor M3 , a first resistor R1 , a second resistor R2 , a third resistor R3 and a fourth resistor R4 .
  • the circuit structure of the bias circuit 4 is:
  • the negative end of the first voltage stabilization source VDC1 is connected to the ground GND, and the positive end of the first voltage stabilization source VDC1 is connected to the first end of the first resistor R1.
  • the second terminal of the first resistor R1 is respectively connected to the drain of the third transistor M3, the first terminal of the second resistor R2, the first terminal of the third resistor R3 and the fourth resistor The first end of R4.
  • the source of the third transistor M3 is connected to the ground GND, and the gate of the third transistor M3 is connected to the second terminal of the second resistor R2.
  • the second end of the third resistor R3 is connected to the ground GND.
  • the second terminal of the fourth resistor R4 is used as the output terminal of the bias circuit.
  • the first transistor M1 , the second transistor M2 , the third transistor M3 , the fourth transistor M4 and the fifth transistor M5 are all NMOS transistors.
  • the use of NMOS tubes for all transistors can make the circuit easy to manufacture into chips, which is beneficial to chip manufacturing and application, and can also reduce chip costs.
  • both the first voltage stabilization source VDC1 and the second voltage stabilization source VDC2 are made of battery packs.
  • the circuit structure of the low noise amplifier 100 in the second embodiment is:
  • the input terminal of the input matching network circuit 1 is used as the signal input terminal LNAin of the low noise amplifier 100 .
  • the output terminal of the input matching network circuit 1 is respectively connected to the output terminal of the bias circuit 4 , the negative terminal of the eighth capacitor C8 and the gate of the first transistor M1 .
  • the negative end of the eighth capacitor C8 is connected to the ground GND.
  • the source of the first transistor M1 is connected to the ground GND through the second inductor L2 connected in series, and the drain of the first transistor M1 is connected to the source of the second transistor M2.
  • the gate of the second transistor M2 is respectively connected to the positive terminal of the third capacitor C3, the second terminal of the fifth resistor R5 and the second terminal of the sixth resistor R6.
  • the drain of the second transistor M2 is respectively connected to the positive terminal of the fourth capacitor C4, the positive terminal of the fifth capacitor C5 and the second terminal of the third inductor L3.
  • the negative end of the third capacitor C3 is connected to the ground GND; the first end of the fifth resistor R5 is connected to the negative end of the fourth capacitor C4.
  • the first terminal of the sixth resistor R6 is respectively connected to the first terminal of the ninth resistor R9, the positive terminal of the sixth capacitor C6 and the source of the fifth transistor M5.
  • the second end of the ninth resistor R9 is connected to the first end of the third inductor L3;
  • the negative end of the sixth capacitor C6 is connected to the ground GND.
  • the drain of the fifth transistor M5 is connected to the positive terminal of the second voltage stabilization source VDC2, and the gate of the fifth transistor M5 is connected to the second terminal of the eighth resistor R8.
  • the negative end of the second voltage stabilization source VDC2 is connected to the ground GND.
  • the first terminal of the eighth resistor R8 is connected to the first terminal of the seventh resistor R7 and serves as a control signal input terminal LNAen of the low noise amplifier 100 .
  • the second end of the seventh resistor R7 is connected to the gate of the fourth crystal.
  • the source of the fourth crystal is connected to the negative terminal of the fifth capacitor C5, and the drain of the fourth crystal is connected to the positive terminal of the seventh capacitor C6.
  • the negative terminal of the seventh capacitor C6 is connected to the input terminal of the primary matching circuit module 31 .
  • the output end of the primary matching circuit module 31 is connected to the first end of the seventh inductor L7.
  • the second terminal of the seventh inductor L7 serves as the signal output terminal LNAout of the low noise amplifier 100 .
  • the principle that the low noise amplifier 100 realizes the operating frequency bandwidth and high performance index is as follows:
  • the input matching network circuit 1 forms a two-stage LC filter network, wherein the first capacitor C1, the second capacitor C2 and the first inductor L1 form a one-stage LC filter network, and the fifth inductor L5 and The eighth capacitor C8 forms a secondary LC filter network.
  • the eighth capacitor C8 is formed by the gate/drain parasitic capacitance of the first transistor M1 of the amplifier circuit 2 .
  • the second-stage LC filtering network further expands the bandwidth of the LNA 100 . Therefore, the reflection coefficient S11 of the low noise amplifier is less than -10.3dB when the input radio frequency signal is within the frequency range of 5.1GHz-7.1GHz.
  • the parameter of the second inductance L2 is adjustable. Appropriately reducing the second inductance L2 of the first transistor M1 makes the reflection coefficient S11 worse within an acceptable range, which will increase the overall gain of the low noise amplifier 100 to a certain extent. Therefore, the gain of the low noise amplifier 100 is greater than 16.6dB when the input radio frequency signal is within the frequency range of 5.1GHz-7.1GHz.
  • the low noise amplifier 10 adopts two circuit structures to solve:
  • the first circuit structure is to add the ninth resistor R9 at the front end of the third inductor L3 used for power supply, and cooperate with the amplifier feedback circuit composed of the fourth capacitor C4 and the fifth resistor R5 to expand the bandwidth of the frequency band.
  • the ninth resistor R9 is an adjustable parameter. Adjusting the resistance value of the ninth resistor R9 can expand the matching bandwidth and increase the gain flatness.
  • the second circuit structure is that the load network circuit 3 is provided with a primary matching circuit module 31, wherein the primary matching circuit module 31 includes a fourth inductor L4, a sixth inductor L6 and a ninth capacitor C9.
  • the sixth inductance L6 and the parasitic ninth capacitance C9 formed by ESD form a parallel resonant circuit, and this resonant circuit is combined with L4 to form a newly added primary matching circuit.
  • the parameters of the fourth inductor L4, the sixth inductor L6 and the ninth capacitor C9 are all adjustable, which can expand the matching bandwidth and increase the flatness of the gain.
  • FIG. 5 is a schematic diagram of a reflection coefficient S11 curve of a low noise amplifier according to an embodiment of the present invention.
  • the reflection coefficient S11 index of the low noise amplifier 100 near the m14 point when the input radio frequency signal is 5.1GHz is -9.701dB.
  • the reflection coefficient S11 index of the low noise amplifier 100 near the m15 point when the input radio frequency signal is 6.0 GHz is -9.627 dB.
  • the reflection coefficient S11 index of the low noise amplifier 100 near the m16 point when the input radio frequency signal is 7.1 GHz is -10.216 dB.
  • FIG. 6 is a schematic diagram of the S22 index curve of the low noise amplifier of the embodiment of the present invention.
  • the S22 index of the low noise amplifier 100 near the m17 point when the input radio frequency signal is 5.1 GHz is 13.781 dB.
  • the reflection coefficient S22 index of the low noise amplifier 100 near the m18 point when the input radio frequency signal is 6.0 GHz is 12.932 dB.
  • the reflection coefficient S22 index of the low noise amplifier 100 near the m19 point when the input radio frequency signal is 7.1 GHz is 9.474 dB.
  • FIG. 7 is a schematic diagram of a gain curve of a low noise amplifier according to an embodiment of the present invention.
  • the gain index of the low noise amplifier 100 near the point m7 when the input radio frequency signal is 5.1 GHz is 16.683 dB.
  • the gain index of the low noise amplifier 100 near the m8 point when the input radio frequency signal is 6.0 GHz is 17.745 dB.
  • the gain index of the low noise amplifier 100 near the m9 point when the input radio frequency signal is 7.1 GHz is 16.632 dB.
  • the S11 index, S22 index and gain index of the low noise amplifier 100 meet the performance requirements of WiFi 6E in the 5.15GHz-7.125GHz ultra-wide operating frequency band.
  • resistors, capacitors, inductors, voltage regulators and transistors used in the present invention are all commonly used components in the field, with indicators and parameters that can be adjusted according to actual applications, and will not be described in detail here.
  • the utility model also provides a mobile communication device.
  • the mobile communication device comprises a low noise amplifier 100 as described. Due to the adoption of the low noise amplifier 100, the mobile communication device can work with a wide frequency band and high performance index.
  • the utility model also provides a chip.
  • the chip includes the low noise amplifier 100 .
  • the chip is made by GaAs-based EDpHEMT process. Because the chip adopts the low-noise amplifier 100, it can realize a wide working frequency band and high performance index.
  • the low noise amplifier of the present invention constitutes the input matching network circuit by setting the first capacitor, the second capacitor, the first inductor and the fifth inductor, so that the input matching network circuit forms a two-stage LC filter Network, in which the first capacitor, the second capacitor and the first inductor form a first-level LC filter network, the fifth inductor and the eighth capacitor connected to it form a second-level LC filter network, the second-level LC filter network further expands the bandwidth, and the eighth capacitor actually Formed by the gate/drain parasitic capacitance of the amplifying circuit.
  • the WiFi 6E communication low noise amplifier of the present utility model is provided with a first-level matching circuit module in the load network circuit, and the first-level matching circuit module includes a fourth inductance, a sixth inductance and a ninth capacitor.
  • the ninth capacitor is a parasitic capacitance of ESD
  • the sixth inductor and the ninth capacitor form a parallel resonant circuit
  • the parallel resonant circuit and the fourth inductor form a first-level matching circuit, which further expands the bandwidth of the first-level matching circuit.
  • the circuit structure makes the S11 index, S22 index and gain index of the low noise amplifier meet the performance requirements of WiFi 6E in the 5.15GHz-7.125GHz ultra-wide working frequency band. Therefore, the low-noise amplifier, the mobile communication device and the chip of the utility model have wide working frequency band and high performance index.

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Abstract

一种低噪声放大器、WiFi 6E通信设备和芯片，上述低噪声放大器包括偏置电路和依次连接的输入匹配网络电路、放大电路以及负载网络电路；所述输入匹配网络电路包括第一电容、第二电容、第八电容以及第一电感；所述负载网络电路包括一级匹配电路模块，所述一级匹配电路模块包括第四电感、第六电感以及第九电容。上述低噪声放大器，其工作频带宽且性能指标高。

Description

低噪声放大器、相关设备及芯片 技术领域
本实用新型涉及放大器电路领域，尤其涉及一种低噪声放大器、WiFi 6E通信设备及芯片。
背景技术
目前，通信技术的发展，低噪声放大器(Low Noise Amplifier，简称LNA)在通信系统中承担了越来越重要的角色，低噪声放大器是通信系统中的射频前端非常重要的模组，其作用为处理天线接收的信号，减弱通信模块的噪声。低噪声放大器的性能直接决定通信系统中的接收机的灵敏度进而信号频谱模板等，从而影响和决定整个通信系统的各项性能指标。随着超宽带的WiFi 6E概念的提出，WiFi 6E通信低噪声放大器的工作带宽进一步拓展，从5.15GHz-5.85GHz拓宽到5.15GHz-7.125GHz。超宽的工作频带，使得WiFi 6E再一次解决了WiFi频谱资源不足的问题，并且提供更高的传输速率，非常适合高性能应用。
相关技术的WiFi 6E通信低噪声放大器包括偏置电路和依次连接的输入匹配网络电路、放大电路以及负载网络电路。输入匹配网络电路作用是在LNA的工作带宽内实现输入阻抗的匹配,以避免对通信系统中的天线/射频滤波器的干扰。放大电路的主体由两个E_mode晶体管组成的casecode结构放大电路。负载网络电路的阻抗特性直接影响LNA的功率增益幅度和工作带宽内的增益平坦度，负载网络电路包括ESD保护电路，ESD保护电路除了起到ESD保护作用，实际上其寄生电容对电路有很大影响，使其成为了负载匹配网络的一部分。
然而，相关技术的WiFi 6E通信低噪声放大器在更宽的工作带宽情况下的性能指标受到电路的限制。其中，输入匹配网络和负载匹配网络带宽较窄。在超宽带环境中，WiFi 6E通信低噪声放大器 是一些重要的技术指标，例如增益、S11、S22以及噪声系数等指标恶化严重，无法满足WiFi 6E对于超宽带LNA的需求。
因此，实有必要提供一种新的低噪声放大器、相关设备和芯片解决上述问题。
实用新型内容
针对以上现有技术的不足，本实用新型提出一种工作频带宽且性能指标高的低噪声放大器、WiFi 6E通信设备及芯片。
为了解决上述技术问题，本实用新型提供了一种低噪声放大器，其包括偏置电路和依次连接的输入匹配网络电路、放大电路以及负载网络电路；
所述偏置电路与所述放大电路连接，用于为所述放大电路提供偏置电压；
所述输入匹配网络电路用于将外部连接的前级电路与所述放大电路阻抗匹配；
所述负载网络电路用于实现其与外部连接的后级电路阻抗匹配；
所述输入匹配网络电路包括第一电容、第二电容、第一电感以及第五电感；
所述第一电容的正极端作为所述输入匹配网络电路的输入端；
所述第一电容的负极端分别连接至所述第一电感的第一端和所述第五电感的第一端；
所述第五电感的第二端作为所述输入匹配网络电路的输出端；
所述第一电感的第二端连接至所述第二电容的正极端；
所述第二电容的负极端连接至接地；
所述负载网络电路包括一级匹配电路模块，所述一级匹配电路模块包括第四电感、第六电感以及第九电容；
所述第四电感的第一端作为所述一级匹配电路模块的输入端；
所述第四电感的第二端分别连接至所述第六电感的第一端和所述第九电容的正极端，并作为所述一级匹配电路模块的输出端；
所述第六电感的第二端和所述第九电容的负极端均连接至接地。
优选的，所述低噪声放大器还包括第三电容、第四电容、第八电容、第五电阻、第六电阻、第八电阻、第二电感、第五晶体管以及第二稳压源；
所述负载网络电路还包括第三电感、第七电感、第五电容、第六电容、第七电容、第七电阻、第九电阻以及第四晶体管；
所述放大电路包括第一晶体管和第二晶体管；
所述输入匹配网络电路的输入端作为所述低噪声放大器的信号输入端；
所述输入匹配网络电路的输出端分别连接至所述偏置电路的输出端、所述第八电容的正极端以及所述第一晶体管的栅极；
所述第八电容的负极端连接至接地；
所述第一晶体管的源极通过串联所述第二电感连接至接地，所述第一晶体管的漏极连接至所述第二晶体管的源极；
所述第二晶体管的栅极分别连接至所述第三电容的正极端、所述第五电阻的第二端以及所述第六电阻的第二端；
所述第二晶体管的漏极分别连接所述第四电容的正极端、所述第五电容的正极端以及所述第三电感的第二端；
所述第三电容的负极端连接至接地；所述第五电阻的第一端连接至所述第四电容的负极端；
所述第六电阻的第一端分别连接至所述第九电阻的第一端、所述第六电容的正极端以及所述第五晶体管的源极；
所述第九电阻的第二端连接至所述第三电感的第一端；
所述第六电容的负极端连接至接地；
所述第五晶体管的漏极连接至所述第二稳压源的正极端，所述第五晶体管的栅极连接至所述第八电阻的第二端；
所述第二稳压源的负极端连接至接地；
所述第八电阻的第一端连接至所述第七电阻的第一端，并作为 所述低噪声放大器的控制信号输入端；
所述第七电阻的第二端连接至所述第四晶体的栅极；
所述第四晶体的源极连接至所述第五电容的负极端，所述第四晶体的漏极连接至所述第七电容的正极端；
所述第七电容的负极端连接至所述一级匹配电路模块的输入端；
所述一级匹配电路模块的输出端连接至所述第七电感的第一端；
所述第七电感的第二端作为所述低噪声放大器的信号输出端。
优选的，所述偏置电路包括第一稳压源、第三晶体管、第一电阻、第二电阻、第三电阻以及第四电阻；
所述第一稳压源的负极端连接至接地，所述第一稳压源的正极端连接至所述第一电阻的第一端；
所述第一电阻的第二端分别连接至所述第三晶体管的漏极、所述第二电阻的第一端、所述第三电阻的第一端以及所述第四电阻的第一端；
所述第三晶体管的源极连接至接地，所述第三晶体管的栅极连接至所述第二电阻的第二端；
所述第三电阻的第二端连接至接地；
所述第四电阻的第二端作为所述偏置电路的输出端。
优选的，所述一晶体管和所述二晶体管均为GaAs基EDpHEMT工艺的E_mode晶体管，所述四晶体管以及所述五晶体管均为GaAs基EDpHEMT工艺的D_mode开关晶体管。
优选的，所述一晶体管、所述二晶体管、所述三晶体管、所述四晶体管以及所述五晶体管均为NMOS管。
优选的，所述第二电感L2为参数可调，所述第九电阻为参数可调。
优选的，所述第四电感、所述第六电感以及所述第九电容均为参数可调。
本实用新型还提供了一种一种WiFi 6E通信设备，所述WiFi 6E 通信设备包括如上中任意一项所述的低噪声放大器。
本实用新型还提供了一种芯片，所述芯片包括如上任意一项所述的低噪声放大器，所述芯片为GaAs基EDpHEMT工艺制成。
与相关技术相比，本实用新型的低噪声放大器通过设置第一电容、第二电容、第一电感以及第五电感构成所述输入匹配网络电路，使得所述输入匹配网络电路形成两级LC滤波网络，其中第一电容、第二电容以及第一电感形成一级LC滤波网络，第五电感与其连接的第八电容形成二级LC滤波网络，二级LC滤波网络进一步拓展带宽，第八电容实际由所述放大电路的栅/漏寄生电容形成。本实用新型的WiFi 6E还通信低噪声放大器通过在所述负载网络电路设置一级匹配电路模块，所述一级匹配电路模块包括第四电感、第六电感以及第九电容。其中，第九电容为ESD的寄生电容，第六电感与第九电容组成并联谐振电路，并联谐振电路与第四电感组成一级匹配电路，使得一级匹配电路进一步拓展带宽。该电路结构使得低噪声放大器的S11指标、S22指标以及增益指标满足WiFi 6E的5.15GHz-7.125GHz超宽的工作频带下的性能要求。从而使得本实用新型的低噪声放大器、移动通信设备及芯片的工作频带宽且性能指标高。
附图说明
下面结合附图详细说明本实用新型。通过结合以下附图所作的详细描述，本实用新型的上述或其他方面的内容将变得更清楚和更容易理解。附图中,
图1为本实用新型实施例一低噪声放大器的电路结构图；
图2为本实用新型实施例一低噪声放大器的输入匹配网络电路的电路图；
图3为本实用新型实施例一低噪声放大器的一级匹配电路模块的电路图；
图4为本实用新型实施例二低噪声放大器的电路图；
图5为本实用新型实施例低噪声放大器的反射系数S11曲线示 意图；
图6为本实用新型实施例低噪声放大器的S22指标曲线示意图；
图7为本实用新型实施例低噪声放大器的增益曲线示意图。
具体实施方式
下面结合附图详细说明本实用新型的具体实施方式。
在此记载的具体实施方式/实施例为本实用新型的特定的具体实施方式，用于说明本实用新型的构思，均是解释性和示例性的，不应解释为对本实用新型实施方式及本实用新型范围的限制。除在此记载的实施例外，本领域技术人员还能够基于本申请权利要求书和说明书所公开的内容采用显而易见的其它技术方案，这些技术方案包括采用对在此记载的实施例的做出任何显而易见的替换和修改的技术方案，都在本实用新型的保护范围之内。
(实施例一)
本实用新型实施例提供一种低噪声放大器100，用于超宽带WiFi 6E通信。
请同时参考图1-3所示，其中，图1为本实用新型实施例一低噪声放大器的电路结构图。
所述低噪声放大器100应用于5.15GHz-7.125GHz工作频带的WiFi 6E产品。
本实施方式中，所述低噪声放大器100采用GaAs基EDpHEMT工艺制成。
所述低噪声放大器100包括偏置电路4和依次连接的输入匹配网络电路1、放大电路2以及负载网络电路3。
所述偏置电路4用于提供所述放大电路2的偏置电压，所述偏置电路4与所述放大电路2连接。
所述输入匹配网络电路1用于将外部连接的前级电路与所述放大电路2阻抗匹配。所述输入匹配网络电路1在LNA的工作带宽内实现输入阻抗的匹配,以避免对通信系统中的天线/射频滤波 器的干扰。
请参考图2所示，图2为本实用新型实施例一低噪声放大器100的输入匹配网络电路的电路图。
具体的，所述输入匹配网络电路1包括第一电容C1、第二电容C2、第一电感L1以及第五电感L5。
所述输入匹配网络电路1的电路结构为：
所述第一电容C1的正极端作为所述输入匹配网络电路1的输入端。
所述第一电容C1的负极端分别连接至所述第一电感L1的第一端和第五电感L5的第一端。
所述第五电感L5的第二端作为所述输入匹配网络电路1的输出端。
所述第一电感L1的第二端连接至所述第二电容C2的正极端。
所述第二电容C2的负极端连接至接地GND。
其中，所述输入匹配网络电路1形成两级LC滤波网络，其中所述第一电容C1、第二电容C2以及第一电感L1形成一级LC滤波网络，所述第五电感L5与其连接的所述放大电路2的晶体管栅/漏寄生电容形成二级LC滤波网络。二级LC滤波网络进一步拓展低噪声放大器100的带宽。
所述放大电路2用于放大信号。本实施方式中，所述放大电路2由两个E_mode晶体管组成的casecode结构放大电路构成。
所述负载网络电路3用于实现其与外部连接的后级电路阻抗匹配。所述负载网络电路3的阻抗特性直接影响LNA的功率增益幅度和工作带宽内的增益平坦度。
所述负载网络电路3包括一级匹配电路模块31。
请参考图3所示，图3为本实用新型实施例一低噪声放大器100的一级匹配电路模块的电路图。
具体的，所述一级匹配电路模块31包括第四电感L4、第六电感L6以及第九电容C9。
所述第四电感L4的第一端作为所述一级匹配电路模块31的输 入端。
所述第四电感L4的第二端分别连接至所述第六电感L6的第一端和所述第九电容C9的正极端，并作为所述一级匹配电路模块31的输出端。
所述第六电感L6的第二端和所述第九电容C9的负极端均连接至接地GND。
其中，所述第九电容C9为ESD的寄生电容，所述第六电感L6与所述第九电容C9组成并联谐振电路，并联谐振电路与所述第四电感L4组成一级匹配电路，使得一级匹配电路进一步拓展低噪声放大器100的带宽。
(实施例二)
实施例二的低噪声放大器为实施例一低噪声放大器100中的其中一种具体电路结构。
请参考图4所示，图4为本实用新型实施例二低噪声放大器的电路图。
在实施例二中，所述低噪声放大器100还包括第三电容C3、第四电容C4、第八电容C8第五电阻R5、第六电阻R6、第八电阻R8、第二电感L2、第五晶体管M5以及第二稳压源VDC2。其中，所述第八电容C8为所述放大电路2的E_mode晶体管的栅/漏寄生电容形成。
本实施例中，所述五晶体管M5为GaAs基EDpHEMT工艺的D_mode开关晶体管。
所述负载网络电路3还包括第三电感L3、第七电感L7、第五电容C5、第六电容C6、第七电容C6、第七电阻R7、第九电阻R9以及第四晶体管M4。
本实施例中，所述第四晶体管M4为GaAs基EDpHEMT工艺的D_mode开关晶体管。
所述放大电路2包括第一晶体管M1和第二晶体管M2。
本实施例中，所述一晶体管M1和所述二晶体管M2均为GaAs基EDpHEMT工艺的E_mode晶体管。
本实施方式中，所述偏置电路4包括第一稳压源VDC1、第三晶体管M3、第一电阻R1、第二电阻R2、第三电阻R3以及第四电阻R4。
所述偏置电路4的电路结构为：
所述第一稳压源VDC1的负极端连接至接地GND，所述第一稳压源VDC1的正极端连接至所述第一电阻R1的第一端。
所述第一电阻R1的第二端分别连接至所述第三晶体管M3的漏极、所述第二电阻R2的第一端、所述第三电阻R3的第一端以及所述第四电阻R4的第一端。
所述第三晶体管M3的源极连接至接地GND，所述第三晶体管M3的栅极连接至所述第二电阻R2的第二端。
所述第三电阻R3的第二端连接至接地GND。
所述第四电阻R4的第二端作为所述偏置电路的输出端。
在另一个实施例中，所述一晶体管M1、所述二晶体管M2、所述三晶体管M3、所述四晶体管M4以及所述五晶体管M5均为NMOS管。晶体管均采用NMOS管可以使得电路易于在制造成芯片，有利于芯片制造和应用，同时也可以降低芯片成本。
本实施例中，所述第一稳压源VDC1和所述第二稳压源VDC2均为电池组制成。
实施例二中的所述低噪声放大器100电路结构为：
所述输入匹配网络电路1的输入端作为所述低噪声放大器100的信号输入端LNAin。
所述输入匹配网络电路1的输出端分别连接至所述偏置电路4的输出端、所述第八电容C8的负极端以及所述第一晶体管M1的栅极。
所述第八电容C8的负极端连接至接地GND。
所述第一晶体管M1的源极通过串联所述第二电感L2连接至接地GND，所述第一晶体管M1的漏极连接至所述第二晶体管M2 的源极。
所述第二晶体管M2的栅极分别连接至所述第三电容C3的正极端、所述第五电阻R5的第二端以及所述第六电阻R6的第二端。
所述第二晶体管M2的漏极分别连接所述第四电容C4的正极端、所述第五电容C5的正极端以及所述第三电感L3的第二端。
所述第三电容C3的负极端连接至接地GND；所述第五电阻R5的第一端连接至所述第四电容C4的负极端。
所述第六电阻R6的第一端分别连接至所述第九电阻R9的第一端、所述第六电容C6的正极端以及所述第五晶体管M5的源极。
所述第九电阻R9的第二端连接至所述第三电感L3的第一端；
所述第六电容C6的负极端连接至接地GND。
所述第五晶体管M5的漏极连接至所述第二稳压源VDC2的正极端，所述第五晶体管M5的栅极连接至所述第八电阻R8的第二端。
所述第二稳压源VDC2的负极端连接至接地GND。
所述第八电阻R8的第一端连接至所述第七电阻R7的第一端，并作为所述低噪声放大器100的控制信号输入端LNAen。
所述第七电阻R7的第二端连接至所述第四晶体的栅极。
所述第四晶体的源极连接至所述第五电容C5的负极端，所述第四晶体的漏极连接至所述第七电容C6的正极端。
所述第七电容C6的负极端连接至所述一级匹配电路模块31的输入端。
所述一级匹配电路模块31的输出端连接至所述第七电感L7的第一端。
所述第七电感L7的第二端作为所述低噪声放大器100的信号输出端LNAout。
所述低噪声放大器100实现工作频带宽且性能指标高的原理如下：
在实施二中，所述输入匹配网络电路1形成两级LC滤波网络，其中所述第一电容C1、第二电容C2以及第一电感L1形成一级LC 滤波网络，所述第五电感L5与所述第八电容C8形成二级LC滤波网络。其中，所述第八电容C8为所述放大电路2的所述第一晶体管M1的栅/漏寄生电容形成。
二级LC滤波网络进一步拓展低噪声放大器100的带宽。因此，所述低噪声放大器在输入的所述射频信号为5.1GHz-7.1GHz频率范围内的反射系数S11小于-10.3dB。
在此基础上，所述第二电感L2为参数可调。适当的减小所述第一晶体管M1的所述第二电感L2，使反射系数S11在可接受的范围内变差，会使得低噪声放大器100整体增益有一定程度的上升。因此，所述低噪声放大器100在输入的所述射频信号为5.1GHz-7.1GHz频率范围内的增益大于16.6dB。
在实施例二中，为了解决超带宽问题，所述低噪声放大器10采用两种电路结构解决：
第一种电路结构是在用于供电作用的第三电感L3前端增加所述第九电阻R9，配合第四电容C4和第五电阻R5组成的放大器反馈电路，用以扩展频带带宽。
所述第九电阻R9为参数可调。调节所述第九电阻R9的阻值可以拓展了匹配带宽，增加了增益平坦度。
第二种电路结构是所述负载网络电路3中设置一级匹配电路模块31，其中所述一级匹配电路模块31包括第四电感L4、第六电感L6以及第九电容C9。所述第六电感L6与ESD形成的寄生电容第九电容C9组成并联谐振电路，这个谐振电路与L4组合成为新增加的一级匹配电路。所述第四电感L4、所述第六电感L6以及所述第九电容C9均为参数可调，可以拓展了匹配带宽，增加了增益平坦度。
以下为所述低噪声放大器10在实施例二的电路仿真结果如下：
请参考图5所示，图5为本实用新型实施例低噪声放大器的反射系数S11曲线示意图。
所述低噪声放大器100在输入的所述射频信号为5.1GHz频率 下的m14点附近的反射系数S11指标为-9.701dB。
所述低噪声放大器100在输入的所述射频信号为6.0GHz频率下的m15点附近的反射系数S11指标为-9.627dB。
所述低噪声放大器100在输入的所述射频信号为7.1GHz频率下的m16点附近的反射系数S11指标为-10.216dB。
请参考图6所示，图6为本实用新型实施例低噪声放大器的S22指标曲线示意图。
所述低噪声放大器100在输入的所述射频信号为5.1GHz频率下的m17点附近的S22指标为13.781dB。
所述低噪声放大器100在输入的所述射频信号为6.0GHz频率下的m18点附近的反射系数S22指标为12.932dB。
所述低噪声放大器100在输入的所述射频信号为7.1GHz频率下的m19点附近的反射系数S22指标为9.474dB。
请参考图7所示，图7为本实用新型实施例低噪声放大器的增益曲线示意图。
所述低噪声放大器100在输入的所述射频信号为5.1GHz频率下的m7点附近的增益指标为16.683dB。
所述低噪声放大器100在输入的所述射频信号为6.0GHz频率下的m8点附近的增益指标为17.745dB。
所述低噪声放大器100在输入的所述射频信号为7.1GHz频率下的m9点附近的增益指标为16.632dB。
综合上述仿真结果，低噪声放大器100的S11指标、S22指标以及增益指标满足WiFi 6E的5.15GHz-7.125GHz超宽的工作频带下的性能要求。
需要指出的是，本实用新型采用的相关电阻、电容、电感、稳压源以及晶体管均为本领域常用的元器件，具有指标和参数根据实际应用进行调整，在此，不作详细赘述。
本实用新型还提供了一种移动通信设备。所述移动通信设备包括如所述的低噪声放大器100。所述移动通信设备因采用所述低噪声放大器100可以工作频带宽且性能指标高。
本实用新型还提供了一种芯片。所述芯片包括所述的低噪声放大器100。所述芯片为GaAs基EDpHEMT工艺制成。所述芯片因采用所述低噪声放大器100可以实现工作频带宽且性能指标高。
与相关技术相比，本实用新型的低噪声放大器通过设置第一电容、第二电容、第一电感以及第五电感构成所述输入匹配网络电路，使得所述输入匹配网络电路形成两级LC滤波网络，其中第一电容、第二电容以及第一电感形成一级LC滤波网络，第五电感与其连接的第八电容形成二级LC滤波网络，二级LC滤波网络进一步拓展带宽，第八电容实际由所述放大电路的栅/漏寄生电容形成。本实用新型的WiFi 6E还通信低噪声放大器通过在所述负载网络电路设置一级匹配电路模块，所述一级匹配电路模块包括第四电感、第六电感以及第九电容。其中，第九电容为ESD的寄生电容，第六电感与第九电容组成并联谐振电路，并联谐振电路与第四电感组成一级匹配电路，使得一级匹配电路进一步拓展带宽。该电路结构使得低噪声放大器的S11指标、S22指标以及增益指标满足WiFi 6E的5.15GHz-7.125GHz超宽的工作频带下的性能要求。从而使得本实用新型的低噪声放大器、移动通信设备及芯片的工作频带宽且性能指标高。
需要说明的是，以上参照附图所描述的各个实施例仅用以说明本实用新型而非限制本实用新型的范围，本领域的普通技术人员应当理解，在不脱离本实用新型的精神和范围的前提下对本实用新型进行的修改或者等同替换，均应涵盖在本实用新型的范围之内。此外，除上下文另有所指外，以单数形式出现的词包括复数形式，反之亦然。另外，除非特别说明，那么任何实施例的全部或一部分可结合任何其它实施例的全部或一部分来使用。

Claims (9)

  1. 一种低噪声放大器，其包括偏置电路和依次连接的输入匹配网络电路、放大电路以及负载网络电路；
    所述偏置电路与所述放大电路连接，用于为所述放大电路提供偏置电压；
    所述输入匹配网络电路用于将外部连接的前级电路与所述放大电路实现阻抗匹配；
    所述负载网络电路用于实现其与外部连接的后级电路阻抗匹配；其特征在于，
    所述输入匹配网络电路包括第一电容、第二电容、第一电感以及第五电感；
    所述第一电容的正极端作为所述输入匹配网络电路的输入端；
    所述第一电容的负极端分别连接至所述第一电感的第一端和所述第五电感的第一端；
    所述第五电感的第二端作为所述输入匹配网络电路的输出端；
    所述第一电感的第二端连接至所述第二电容的正极端；
    所述第二电容的负极端连接至接地；
    所述负载网络电路包括一级匹配电路模块，所述一级匹配电路模块包括第四电感、第六电感以及第九电容；
    所述第四电感的第一端作为所述一级匹配电路模块的输入端；
    所述第四电感的第二端分别连接至所述第六电感的第一端和所述第九电容的正极端，并作为所述一级匹配电路模块的输出端；
    所述第六电感的第二端和所述第九电容的负极端均连接至接地。
  2. 根据权利要求1所述的低噪声放大器，其特征在于，
    所述低噪声放大器还包括第三电容、第四电容、第八电容、第五电阻、第六电阻、第八电阻、第二电感、第五晶体管以及第二稳压源；
    所述负载网络电路还包括第三电感、第七电感、第五电容、第 六电容、第七电容、第七电阻、第九电阻以及第四晶体管；
    所述放大电路包括第一晶体管和第二晶体管；
    所述输入匹配网络电路的输入端作为所述低噪声放大器的信号输入端；
    所述输入匹配网络电路的输出端分别连接至所述偏置电路的输出端、所述第八电容的正极端以及所述第一晶体管的栅极；
    所述第八电容的负极端连接至接地；
    所述第一晶体管的源极通过串联所述第二电感连接至接地，所述第一晶体管的漏极连接至所述第二晶体管的源极；
    所述第二晶体管的栅极分别连接至所述第三电容的正极端、所述第五电阻的第二端以及所述第六电阻的第二端；
    所述第二晶体管的漏极分别连接所述第四电容的正极端、所述第五电容的正极端以及所述第三电感的第二端；
    所述第三电容的负极端连接至接地；所述第五电阻的第一端连接至所述第四电容的负极端；
    所述第六电阻的第一端分别连接至所述第九电阻的第一端、所述第六电容的正极端以及所述第五晶体管的源极；
    所述第九电阻的第二端连接至所述第三电感的第一端；
    所述第六电容的负极端连接至接地；
    所述第五晶体管的漏极连接至所述第二稳压源的正极端，所述第五晶体管的栅极连接至所述第八电阻的第二端；
    所述第二稳压源的负极端连接至接地；
    所述第八电阻的第一端连接至所述第七电阻的第一端，并作为所述低噪声放大器的控制信号输入端；
    所述第七电阻的第二端连接至所述第四晶体的栅极；
    所述第四晶体的源极连接至所述第五电容的负极端，所述第四晶体的漏极连接至所述第七电容的正极端；
    所述第七电容的负极端连接至所述一级匹配电路模块的输入端；
    所述一级匹配电路模块的输出端连接至所述第七电感的第一 端；
    所述第七电感的第二端作为所述低噪声放大器的信号输出端。
  3. 根据权利要求2所述的低噪声放大器，其特征在于，所述偏置电路包括第一稳压源、第三晶体管、第一电阻、第二电阻、第三电阻以及第四电阻；
    所述第一稳压源的负极端连接至接地，所述第一稳压源的正极端连接至所述第一电阻的第一端；
    所述第一电阻的第二端分别连接至所述第三晶体管的漏极、所述第二电阻的第一端、所述第三电阻的第一端以及所述第四电阻的第一端；
    所述第三晶体管的源极连接至接地，所述第三晶体管的栅极连接至所述第二电阻的第二端；
    所述第三电阻的第二端连接至接地；
    所述第四电阻的第二端作为所述偏置电路的输出端。
  4. 根据权利要求3所述的低噪声放大器，其特征在于，所述一晶体管和所述二晶体管均为GaAs基EDpHEMT工艺的E_mode晶体管，所述四晶体管以及所述五晶体管均为GaAs基EDpHEMT工艺的D_mode开关晶体管。
  5. 根据权利要求3所述的低噪声放大器，其特征在于，所述一晶体管、所述二晶体管、所述三晶体管、所述四晶体管以及所述五晶体管均为NMOS管。
  6. 根据权利要求3所述的低噪声放大器，其特征在于，所述第二电感L2为参数可调，所述第九电阻为参数可调。
  7. 根据权利要求3所述的低噪声放大器，其特征在于，所述第四电感、所述第六电感以及所述第九电容均为参数可调。
  8. 一种WiFi 6E通信设备，其特征在于，所述WiFi 6E通信设备包括如权利要求1-7中任意一项所述的低噪声放大器。
  9. 一种芯片，运用于WiFi 6E通信，其特征在于，所述芯片包括如权利要求1-7中任意一项所述的低噪声放大器，所述芯片为GaAs基EDpHEMT工艺制成。
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