WO2023073570A1

WO2023073570A1 - Superconducting variable inductance transistor

Info

Publication number: WO2023073570A1
Application number: PCT/IB2022/060270
Authority: WO
Inventors: Francesco GIAZOTTO; Federico PAOLUCCI; Giorgio DE SIMONI; Elia STRAMBINI; Angelo DI BERNARDO; Simone GASPARINETTI; Claudio PUGLIA
Original assignee: Consiglio Nazionale Delle Ricerche
Priority date: 2021-10-27
Filing date: 2022-10-26
Publication date: 2023-05-04
Also published as: IT202100027515A1

Abstract

A superconducting variable inductance transistor is disclosed which comprises a superconducting channel (2) made of superconducting metal, having a predefined Josephson inductance value (L_J), and a gate electrode (8) placed in correspondence with an internal region (4) of the superconducting channel, wherein said internal region is arranged to be affected by an electric field (6) generated by applying a gate voltage to said gate electrode. The superconducting transistor is capable of switching between a first state wherein the Josephson inductance has a first value (L₀) and a second state wherein the Josephson inductance has a second value (L₁), the second value being greater than the first value, and the superconducting transistor remains in a superconducting condition in both states.

Description

“Superconducting variable inductance transistor”

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DESCRIPTION

The present invention relates to a superconducting variable inductance transistor, in particular a transistor controlled through the application of an electric field.

Modem superconducting electronics is based on the modulation of the critical supercurrent Ic of a superconductor and, as a consequence, of its kinetic inductance, through a bias provided by a gate electrode (Phys. C 482, 6 (2012)).

In this context, different approaches and different architectures have been proposed.

Known superconducting field effect transistors (SuFET) are realized by using a conduction channel comprising a superconducting oxide whose low density of free carriers can be modulated by applying to the conduction channel an electric field generated through a gate electrode. As a result, the superconducting properties of the channel are modified (see Physica B 135, 124 (1985), document US5240906, document US 2011/0254053).

Other superconducting field-effect devices (FETs) exploit superconducting electrodes separated by a conductive channel (see documents US5024993, US5232905, US5272358, US5380704,

US5422336, US 5434530) or by a conductive barrier (see US5441926) of conductive (semiconductive) material with low density of free carriers, to which a gate electrode (JoFET) is connected. In this way, the supercurrent circulating between the two electrodes is controlled by the gate voltage affecting the resistivity of the semiconducting channel.

Another approach consists in controlling the quasiparticle-current of a channel through the injection of a current from a gate electrode (metallic or superconducting), which controls the tunnel current flowing through a semiconductor contacted by two superconducting electrodes (see document US 4575741 ). Still another approach consists in controlling the supercurrent of a channel through two superconducting gates, which control the resonant tunneling, mediated by a ferromagnet, flowing between two normal-metal or superconducting metal electrodes (see document US 6344659).

Superconducting materials are also used in bipolar junction transistors (BJTs), wherein a quasiparticle current flowing between a base (superconductor) and a collector (superconductor) is controlled by a current flowing between an emitter (metal or superconductor) and the base (see documents US4157555, EP0163031 B1 , US 4575741 , EP0357321A2, US5318952, US6344659).

All the above-discussed technologies rely on manufacturing processes comprising many and complex manufacturing steps. The materials used are complex to synthesize and the overall quality necessary for the proper functioning of these devices requires the use of dedicated substrates, which are not easily compatible with large-scale production.

Furthermore, the modulation of the channel conductivity is limited, and its improvement requires the production of channels having a thickness comparable to the unit cell of the material of the channel itself. For these reasons, these technologies are not used for industrial production.

Superconducting metals have also been used to make transistors based on the modulation of the critical current of a channel through a magnetic field (see cryotron, Electron. Rad. Eng. 25, 387 (1963)) or through a controlled injection of current (see nanocryotron, Nano Lett. 14, 5784 (2014); Supercond. Sci. Technol. 30, 044002 (2017)).

These architectures are based on a simple construction technology, but the control of the transistor through a current makes it difficult to interface these devices with traditional semiconductor devices. In addition, the nanocryotrons show a low operation speed since their dynamics is limited by the thermalization speed of a superconductor (usually of the order of microseconds). In addition to the above, it is worth noticing that the superconducting computing technology with major industrial applications is represented by the rapid single flux quantum (RSFQ) approach, wherein magnetic fields are used to change a logic state that is encoded through the presence or the absence of a magnetic flux quantum (see IEEE Trans. Magn. 23, 759 (1987); IEEE Trans. Appl. Supercond. 21 , 760 (2011 ); IEEE Trans. Appl. Supercon. 29, 1102805 (2019)). RSFQ circuits involve the use of Josephson junctions combined with superconducting inductors and their integration with CMOS technology is not easy.

In recent years, field-effect devices have been developed wherein an electric field modulates the critical current of a metallic superconductor without changing its surface charge density. The supercurrent suppression is not dependent on the gate voltage sign, and this has been demonstrated in nanowires and films (see Nat. Nanotech. 13, 802 (2018)), in Josephson junctions (Nano Lett. 18, 4195 (2018); Phys. Rev. Appl. 11 , 024061 (2019); Appl. Phys. Lett. 116, 242601 (2020); Appl. Phys. Lett. 116, 252601 (2020)), in proximitized metal systems (ACS Nano 13, 7871 (2019)) and in interferometers (Nano Lett. 19, 6263 (2019)). Some electronic circuits based on this technology and operating in DC have been also proposed (see Phys. Rev. Appl. 11 , 024061 (2019), AVS Quantum Sci. 1 , 016501 (2019)).

The above-mentioned effects refer to the static response (in DC) of a superconducting circuit. When considering time-dependent signals, a superconducting constriction shows an inductive component inversely proportional to its critical current (the so-called “Josephson inductance", Lj oc 1/lc). Likewise, thin superconducting wires with low charge density exhibit a kinetic inductance. For typical devices, the inductive contribution becomes significant in the radiofrequency and microwaves domain. The in-situ control of a Josephson inductance has been obtained inductively in SQUID type devices (Superconducting Quantum Interference Device), leading to the realization, for example, of resonators with frequency tunable over a wide spectrum (J. Low Temp. Phys. 151 , 1034 (2008); Appl. Phys. Lett. 114, 192601 (2019)) and cryogenic microwave switches (Phys. Rev. Appl. 6, 024009 (2016)).

Alternatively, also a direct current injection through a constriction (or a nanowire) has been exploited to regulate the inductance of the same, albeit in a more limited frequency interval (Appl. Phys. Lett. 108, 172601 (2016)).

Finally, by using hybrid superconductor-semiconductor junctions, it is possible to obtain an electrostatic control of a Josephson inductance. With this technique, quantum devices operating at microwave frequencies have been proposed (Phys. Rev. Lett. 115, 127001 ; ibid, 127002 (2015); Nat. Nano. 13, 915 (2018)). By applying an inductance modulation at predetermined frequencies (characteristic modes of the system and their harmonics, sums and differences of mode frequencies), a series of interactions between these modes are enabled. These interactions have been exploited to achieve a parametric amplification close to the quantum limit (Appl. Phys. Lett. 93, 042510 (2008)), quantum gates between different qubits (Phys. Rev. Applied 6, 064007 (2016)), broadband microwave radiation entanglement (Phys. Rev. Lett. 124, 140503 (2020)) and three- photon spontaneous parametric down-conversion (Phys. Rev. X 10, 011011 (2020)).

As above indicated, despite the high performances of these known devices, it is very difficult to use them in industries because of the production constraints due to their physical characteristics and the materials involved, the high realization costs and the difficult integration of these devices with standard CMOS devices currently employed in commercial products.

For example, industries have not yet been able to directly use these known devices in apparatuses to be used for improving the slowness of satellite and terrestrial communication equipment or for increasing the computing power of supercomputers, which represent nowadays the two main challenges for the electronic industry. There is therefore the need to provide an innovative superconducting variable inductance transistor which allows obtaining devices with high performances in terms of switch speed, overall dimensions and dissipated energy, that can be easily produced with an economic process and that can be fully integrated with CMOS devices, thus overcoming the problems of the prior art.

These and other objects are fully achieved by virtue of a superconducting variable inductance transistor having the characteristics defined in independent claim 1.

Preferred embodiments of the invention are specified in the dependent claims, whose subject-matter is to be understood as forming integral or integrating part of the present description.

Further characteristic and advantages of the present invention will become apparent from the following description, provided merely by way of non-limiting example, with reference to the attached drawings, in which:

- Figure 1 shows a schematic side view of a superconducting variable inductance transistor 1 according to the present invention;

- Figure 2 shows a circuit symbol of the superconducting transistor of Figure 1 ;

- Figure 3 shows a circuit scheme of a single-pole, double-throw (SPDT) microwave switch;

- Figure 4 shows a circuit scheme of a single-pole, double-throw (SPDT) microwave switch realized with N sections; and

- Figure 5 shows a single-pole, four-throw 1 :4 microwave switch obtained with three single-pole, double-throw switches.

Briefly, the superconducting variable inductance transistor of the present invention allows obtaining devices with high performances in terms of switch speed, overall dimensions, and dissipated energy and, furthermore, it allows implementing a binary logic capable of achieving clock frequencies at least 100 times higher than the one of products currently available on the market. In particular, the superconducting variable inductance transistor of the present invention exploits the possibility to modulate the critical current (Ic) of a superconducting metal channel through the application of a predetermined voltage to a control electrode (gate) of the superconducting transistor.

The Josephson inductance Lj (Lj oc /L/IC, where h is the Planck's reduced constant) of the superconducting channel of the superconducting transistor can be tuned between two states, namely a first state “0” (low impedance/inductance) and a second state “1” (high impedance/inductance).

In particular, it is possible to tune only the imaginary part of the total impedance of the junction, i.e. , to change only the Josephson inductance value LJ, while maintaining the transistor in the superconducting state.

In this way, the alternating voltage drop (AC) at the ends of the superconducting channel is equal to:

V(w) = l(w)Z(w, VG) (1 ) where VG is the gate voltage, l(co) is the alternating current flowing in the superconducting channel and Z(w, VG) is the impedance of the superconducting channel which, for a predetermined working frequency co, depends only on the gate voltage VG.

The gate voltage can be controlled both in quasi-static regime (operating frequency at least an order of magnitude lower than signal frequency) and in high-frequency regime (operating frequency comparable signal frequency).

The superconducting variable inductance transistor of the present invention can be used for obtaining advanced radio frequency devices such as switches, digital to analogue converters (DACs), logic gates, etc. Such electronic devices are characterized by high energy efficiency and operating frequency of the order of THz. In addition, the use of a voltage for controlling the impedance of the transistor ensures compatibility with existing semiconductor technology standard devices (CMOS).

The physical principle acting in the superconducting variable inductance transistor of the present invention has been demonstrated by the research group of superconducting quantum technologies of the Nanoscience Institute of Pisa (Nat. Nanotech. 13, 802 (2018); Nano Lett. 18, 4195 (2018); Phys. Rev. Appl. 11 , 024061 (2019); ACS Nano 13, 7871 (2019); Nano Lett. 19, 6263 (2019); AVS Quantum Sci. 1 , 016501 (2019); Appl. Phys. Lett. 116, 242601 (2020); Appl. Phys. Lett. 116, 252601 (2020)).

The devices disclosed in the above publications can be realized using superconducting metals, i.e., metals that show non-dissipative charge transport properties below a characteristic temperature called critical temperature (Tc). The maximum non-dissipative current that can be sustained by these devices is the so-called critical current (Ic). The critical current Ic is a property of each material and of the geometry of the device, but it can be controlled by applying a predetermined gate voltage to a control electrode (gate electrode) placed close to the superconducting channel.

In particular, it is possible to continuously adjust the value of the critical current Ic from an initial value (when the gate voltage VG is equal to 0) up to its complete suppression (the critical current Ic is equal to 0 for a gate voltage VG > Vc, where Vc is the critical voltage above which the transistor loses the superconducting state), by continuously varying the Josephson inductance Lj and the residual resistance of the wire generated by the quasiparticles (Rj).

The devices disclosed in the above publications work between a superconducting and a dissipative state, while the superconducting variable inductance transistor of the present invention operates between two purely superconducting states, characterized by a respective different Josephson inductance.

Figure 1 shows a schematic side view of a superconducting variable inductance transistor 1 according to the present invention. The superconducting transistor 1 comprises a superconducting channel 2 made entirely of a superconducting metal. An internal region 4 of the superconducting channel 2 is arranged to be affected by an electric field 6 generated by application of a gate voltage VG to a gate electrode 8 of the superconducting transistor 1 . The gate electrode 8 is placed in correspondence of said internal region 4.

Figure 2 shows a circuit symbol 10 of the superconducting transistor 1 of Figure 1 . The gate electrode 8 is the horizontal wire, while the vertical wire 12 represents a variable inductance Lj.

The superconducting transistor 1 is capable to switch between a first state “0” wherein the variable inductance Lj has a first value Lo, and a second state “1” wherein the variable inductance Lj has a second value Li.

The second value Li is greater than the first value Lo but the superconducting transistor 1 remains, in both states, in the superconducting condition and is controlled through the gate electrode 8.

In particular, the following equation is applied:

Li = 1 O Lo (2)

The operating frequencies of the superconducting transistor 1 are linked to the superconducting metal of the superconducting channel 2, the operating temperature, and the contrast required between the first and second state.

For example, at a temperature T inferior to the critical temperature Tc, a superconducting transistor 1 with an aluminum superconducting channel 4 exhibits a superconducting gap (determined experimentally and substantially equal to the known value):

A ~ 200 iieV (3) and, thus, a first state operating frequency coo limited to: a)

⁰ 100 GHz (4) L_o tl ^{V 7} where h is the Planck constant, and Lo and Ro are the Josephson inductance and the quasiparticle resistance of the wire with VG=0, i.e. the quasiparticle contribution to the resistance of the superconducting channel 4 as expected from the two fluid model, with the gate voltage VG equal to 0. This first state operating frequency coo is the frequency of the superconducting transistor 1 in the first state (with first value Lo).

For the high inductance configuration (Li = 10Lo), a second state operating frequency coi is obtained as the ratio of the two impedances:

by assuming a negligible change in the quasi-particle resistance (R1 s Ro), i.e. with the quasi-particle resistance of the zero-gate wire with a predetermined gate voltage VG substantially equal to the quasi-particle resistance of the zero-gate wire the gate voltage VG equal to 0. This second state operating frequency coi is the frequency of the superconducting transistor 1 in the second state (with second value Li).

In case where the change of Ri is not negligible with respect to Ro, the frequency coi is further reduced by the ratio R1/R0.

The upper limit of the operation frequency of superconducting switches based on the superconducting transistor 1 of the present invention is the first state operating frequency coo since, as detailed here below, the second state operating frequency coi is characteristic of a closed channel state.

By using superconducting materials having a higher critical temperature Tc, e.g. the niobium (7c~9 K), it is possible to increase the maximum operating frequency of impedance transistors:

given the larger superconducting gap of niobium (A_Nb ~ 3 meV).

Figure 3 shows a circuit scheme of a single-pole, double-throw (SPDT) microwave switch.

A signal coming from a first port P1 can be sent to a second port P2, or to a third port P3, by applying respective first and second voltages V2, V3 to the gate electrodes that control respective superconducting variable inductance transistors 1 a, 1 b.

The applied voltages V2, V3 are chosen between an opening value for which the respective superconducting transistor 1a, 1 b has a low inductance value, Lo ("open" state), and a closing value at which the transistor 1 a, 1 b has a high inductance value, Li> 10 Lo ("closed" state).

To select the second port P2 (respectively, the third port P3), it is assigned to the first voltage V2 (respectively, the second voltage V3) the open value, and to second voltage V3 (respectively, the first voltage V2) the closed value.

In the open and closed states, the superconducting transistor 1 a, 1 b has an imaginary impedance ZLJ = icoLj where LJ(VG) is the junction inductance that varies between Lo and Li and the contribution due to the quasi-particle resistance is neglected.

To ensure good isolation (isolation > 20 dB), the condition: l^il » l^ol (7) must be verified, where Zo is the impedance of the ports P1 , P2, P3 (typically, 50 ohms).

This condition may limit the device operation frequencies to:

for inductive transistors (Li > 50 nH).

Unlike the frequency limits induced by the choice of the superconducting material, this frequency can be appropriately scaled by choosing the appropriate geometry of the superconducting transistor 1 a, 1 b or by increasing the inductance modulation (i.e., Li » 1 OLo).

If the variation on the quasi-particle resistance is not negligible, the condition Ri » Zo must be added to this condition. The latter can be easily obtained by increasing, for example, the normal state resistance (RN » Zo) which, by definition, is always less than the quasi-particle resistance (Ri > RN).

In addition, to minimize signal losses in reflection, the input impedance seen from the first port P1 must be made as close to Zo as possible (i.e., |Zi_o| < Zo). If this condition is difficult to obtain, it is possible to optimize the transmission by means of impedance matching techniques per se known, realized with appropriate electronic circuits, as shown in Figure 3.

The larger the gap of the superconductor is, the more relevant the impedance matching is, and therefore the higher in frequency is the band of interest.

The addition of condensers proportional to: c = Lj/Z₀ ² (9) provides a good matching for frequencies much smaller than the circuit self-resonant frequency (equal to 1/(2 n c Lj) ).

This constraint can be further relaxed by dividing the circuit into N sections, each with normal state resistance ZL/N, as shown in Figure 4 which depicts a circuit scheme of a single-pole, double-throw (SPDT) microwave switch realized with N sections (N=8).

By assuming full reproducibility of the superconducting transistors 1 a, 1 b, they can be controlled by a same voltage source.

Since this is an impedance-matched device, the switch of Figure 3 can be integrated with other similar devices to make “single-pole: 2^x-throvi/’ type switches (x is a natural number). The number of elementary switches required to do this is equal to

= 2^X - 1. For example, with three elementary switches (x=2) a four-output 1 :4 switch can be implemented, with seven elementary switches (x=6) a 1 :8 switch can be implemented, and so on (the number of outputs is equal to 2^X).

Figure 5 shows a single-pole, four-throw 1 :4 microwave switch obtained with three single-pole, double-throw switches.

On the other hand, the number of gate voltages VG that must be specified independently is equal to 2x. Thus, there is an exponential scaling of the number of output gates, compared to a linear scaling of the number of independent controls required.

Finally, by summing voltages applied by different sources, it is possible to exploit the bipolarity of the device so that only one independent control needs to be applied to each elementary switch, in addition to a common voltage. The number of required controls in this case is reduced to 1 +x.

The functionalities of the superconducting transistor 1 , 1 a, 1 b described here above refer to a digital control fixed by two distinct gate voltage values. Specifically, the value of the output inductance is Lo or Li depending on the value of the digital input signal (0 or 1 ) that is supplied to the gate electrode 8. This approach is ideal for making switches, DACs, logic gates, etc.

Given the flexibility of operation of the superconducting transistor 1 , 1 a, 1 b of the present invention, it is also possible to perform a parametric control. In this case the signal that controls the gate 8 contains a continuous and a sinusoidal component. In this way the inductance of the superconducting transistor 1 , 1 a, I bacquires a component oscillating with the frequency of the signal (and subsequent harmonics).

The advantages related to the use of two superconducting states instead of a resistive/superconducting condition of the prior art devices are mainly two: (i) a greater separation between the impedance values in the two states, and (ii) a reduction of power dissipation as the superconducting transistor 1 operates always in the superconducting state.

Furthermore, compared to SQUID-type magnetic control devices, the electrostatic control provides better stability, noise reduction and crosstalk abatement between different devices.

Compared to hybrid super-semiconducting field-effect devices, the monolithicity of the superconducting transistor 1 , 1 a, 1 b provides greater simplicity of fabrication, lower fabrication cost and greater stability. The two inductance states can thus be selected thanks to the suppression of the critical current due to the gate voltage VG.

The main advantage of the technology of the present invention consists in combining the energy efficiency of computing platforms based on superconductors along with the possibility to use conventional encoding of logic signals based on voltage levels. Higher scalability and integrability are obtained compared to current technologies already applied for large- scale applications that are based either on semiconductors or superconductors.

In particular, compared the superconducting computing technologies which are commercially available, the present technology is robust to external magnetic perturbations because it does not involve the use of magnetic flux or current bias, it offers a much higher device scalability, it has larger fan-out and higher gate-to-channel resistance (these are essential to maximize the transmission of signals to downstream devices without information getting lost) and it has a much higher switching speed. The need for cooling systems and cryogenic liquids to bring the superconducting transistor 1 , 1 a, 1 b below the critical temperature of the superconducting materials can be overcome by using closed cycle cryocoolers (i.e. , dry cryostats), which are currently available on the market and allow reaching the necessary operational temperatures in an efficient, rapid and not expensive way.

In fact, dry cryocoolers are already adopted for large-scale applications (both commercial and industrial ones) which require operational temperatures below that of liquid nitrogen such as, for example, superconducting computing platforms based on rapid single flux quantum (RSFQ) logic.

The superconducting transistor 1 , 1 a, 1 b of the present invention offers a high degree of compatibility with any other superconducting and quantum computing technologies available on the market. Unlike the RSFQ technology, the present technology does not require an additional interface to a CMOS system, meaning that the superconducting transistor 1 , 1 a, 1 b is naturally suitable for hybrid superconductor/sem iconductor computing platforms.

Other advantages include its full compatibility with the fabrication techniques currently used for the realization of quantum processor based on superconductors. Thanks to the present technology it is possible to achieve a direct integration of microwave switches and frequency-tunable resonators with quantum processors, which would facilitate the implementation of measurement and control operations on the same processors.

Clearly, the principle of the invention remaining the same, the embodiments and the details of production can be varied considerably from what has been described and illustrated purely by way of non-limiting example, without departing from the scope of protection of the present as defined in the attached claims.

Claims

1. Superconducting variable inductance transistor (1 ) comprising:

- a superconducting channel (2) made of superconducting metal, the superconducting channel (2) having a predefined Josephson inductance value (Lj);

- a gate electrode (8) placed in correspondence of an internal region (4) of the superconducting channel (2); wherein said internal region (4) is arranged to be affected by an electric field (6) generated by applying a gate voltage (VG) to said gate electrode (8), the superconducting transistor (1 ) being capable to switch between a first state wherein the Josephson inductance (Lj) has a first value (Lo) and a second state wherein the variable inductance (Lj) has a second value (Li), the second value (Li) of the Josephson inductance being greater than the first value (Lo) of the Josephson inductance and the superconducting transistor (1 ) remaining, when in both the first and the second state, in a superconducting condition.

2. Superconducting variable inductance transistor (1 ) according to claim 1 , wherein the second value (Li) of the Josephson inductance is equal to ten times the first value (Lo).

3. Superconducting variable inductance transistor (1 ) according to claims 1 or 2, wherein the inductance value (Lj) comprises an imaginary part and the superconducting transistor (1 ) is arranged to switch between the first state and the second state by changing only the imaginary part of said inductance value (LJ).

4. Superconducting variable inductance transistor (1 ) according to any of the preceding claims, wherein the superconducting transistor (1 ) has an aluminum superconducting channel (2) exhibiting a superconducting gap equal to: A ~ 200 iieV and, thus, a first state operating frequency (coo) equal to:

R_o 2A )₀ = ~ 100 GHz

L_o h where h is the Planck constant, and Lo and Ro are the Josephson inductance and the quasi-particle resistance of the internal region (4) with the gate voltage (VG) equal to 0, this first state operating frequency (coo) being the frequency of the superconducting transistor (1 ) in the first state.

5. Superconducting variable inductance transistor (1 ) according to claim 4, wherein the superconducting transistor (1 ) has a second state operating frequency (coi) equal to:

where h is the Planck constant, and Li and Ri are the Josephson inductance and the quasiparticle resistance of the internal region (4) with a predetermined gate voltage (VG) substantially equal to the quasi-particle resistance of the internal region (4) with the gate voltage (VG) equal to 0, this second state operating frequency (coi) being the frequency of the superconducting transistor (1 ) in the second state.

6. Superconducting variable inductance transistor (1 ) according to claim 5, wherein the quasi-particle resistance of the internal region (4) with a predetermined gate voltage (VG) is different to the quasi-particle resistance of the internal region (4) with the gate voltage (VG) equal to 0 and the second state operating frequency (coi) is further reduced by the ratio R1/R0.