WO2023072226A1

WO2023072226A1 - Multi-level lookup table circuit, function solving method and related device

Info

Publication number: WO2023072226A1
Application number: PCT/CN2022/128135
Authority: WO
Inventors: 孟畅; 钱炜慷; 申小龙; 倪磊滨; 吴志航; 吴威; 赵俊峰
Original assignee: 华为技术有限公司
Priority date: 2021-11-01
Filing date: 2022-10-28
Publication date: 2023-05-04
Also published as: CN116070556A

Abstract

A multi-level lookup table circuit, the circuit being applicable to scenarios such as optical modules, wireless, and neural networks. The circuit can be used in the described scenarios to solve for an output value of an objective function on the basis of multiple lookup tables, the multiple lookup tables comprise a first lookup table (LUT0) and a second lookup table (LUT1), and a first input sequence of the objective function comprising a first subset and a second subset. The circuit comprises a first module (301) and a second module (302). The first module (301) is used to determine an output value of a first function on the basis of the first subset and the first lookup table (LUT0), the first function being a nested function in the objective function. The second module (302) is used to determine an output value of the objective function on the basis of the second subset, the second lookup table (LUT1) and the output value of the first function. By means of a cascading connection between the first module (301) and the second module (302), the area, delay and energy consumption of the circuit corresponding to the objective function can be reduced.

Description

A multi-level look-up table circuit, function solving method and related equipment

This application claims the priority of the Chinese patent application submitted to the China Patent Office on November 1, 2021, with the application number 202111283778.4, and the title of the invention is "a multi-level lookup table circuit, function solving method and related equipment", the entire content of which Incorporated in this application by reference.

technical field

The embodiments of the present application relate to the field of computer technology, and in particular to a multi-level lookup table circuit, a function solving method and related equipment.

Background technique

As the size of transistors shrinks to the nanometer level, how to further reduce the power consumption of computing systems has attracted more and more attention. Using a lookup table (LUT) to calculate is a popular low-power technology. This technology calculates the results of commonly used functions in advance and stores them in the LUT. The result is obtained by looking up the table during operation.

However, the number of rows of LUTs grows exponentially with the number of function inputs, resulting in larger circuit area, higher latency, and higher power consumption using this technique.

Therefore, how to reduce the area, delay and power consumption of the circuit corresponding to the LUT is an urgent technical problem to be solved.

Contents of the invention

Embodiments of the present application provide a multi-level lookup table circuit, a function solving method and related equipment. All functions can be decomposed into approximate Boolean functions, so as to solve the output value of the function through the cascade of the first module and the second module. In addition, the delay and energy consumption of the circuit corresponding to the function can be reduced by cascading multiple modules.

The first aspect of the embodiment of the present application provides a multi-level lookup table circuit, which can be applied to optical modules, wireless, neural networks and other scenarios, and the circuit can be used in the above scenarios to solve the objective function based on multiple lookup tables Output values, the plurality of lookup tables include a first lookup table and a second lookup table, the first input sequence of the objective function includes a first subset and a second subset; the circuit includes a first module and a second module. The first module is configured to determine the output value of the first function based on the first subset and the first lookup table, and the first function is a nested function in the objective function. The second module is configured to determine the output value of the objective function based on the second subset, the second lookup table, and the output value of the first function.

In the embodiment of the present application, the circuit can solve the output value of the objective function by means of multiple lookup tables. The first module and the second module can determine outputs of different functions based on different look-up tables. That is, the first module can determine the output of the first function based on the first subset and the first lookup table, and the second module can determine the output of the objective function based on the second subset, the second lookup table, and the output of the first function. Decomposing the objective function into a Boolean function improves the efficiency of solving the objective function and can obtain multi-level logical decomposition results. In addition, through the cascade connection of the first module and the second module, the area, delay and energy consumption of the circuit corresponding to the objective function can also be reduced.

Optionally, in a possible implementation manner of the first aspect, the above-mentioned circuit further includes a scrambling module; the scrambling module is configured to obtain the second input sequence of the objective function, and scramble the ordering of the second input sequence, Obtain the first input sequence, and decompose the first input sequence to obtain the first subset and the second subset; the shuffling module is also used to send the first subset to the first module, and send the second subset to the second module .

In this possible implementation, the second input sequence is reordered by the scrambling module, and the more times of reordering, the more likely the objective function is, and the more likely it is to approach the objective function, which in turn can make the subsequent The approximate processing of the truth table realizes the expressive ability of the objective function.

Optionally, in a possible implementation manner of the first aspect, the above circuit further includes a configuration module; the configuration module is configured to approximate the truth table corresponding to the objective function to obtain an approximated truth table, and decomposing the approximated truth table into a first lookup table and a second lookup table; the configuration module is further configured to send the first lookup table to the first module, and send the second lookup table to the second module.

In this possible implementation, by configuring the unit to approximate the truth table corresponding to the objective function that does not meet the decomposition conditions, the truth table that does not meet the decomposition conditions can be approximated, and the truth table that meets the decomposition conditions can be obtained , and then the output value of the objective function can be solved based on multiple lookup tables.

Optionally, in a possible implementation of the first aspect, the expression of the above objective function is as follows:

f(x)=F(Φ(B),A);

Among them, f(x) is the objective function, F(Φ(B),A) is the objective function or the approximated objective function, B is the first subset, A is the second subset, and Φ(B) is the first subset a function.

In this possible implementation, by decomposing the objective function into two functions, and determining the output value of the objective function through two lookup tables, the area of the circuit can be saved by cascading the first module and the second module. Latency and energy consumption.

Optionally, in a possible implementation manner of the first aspect, the above-mentioned objective function is a function that does not satisfy a decomposition condition, and the decomposition condition is a decomposition condition of a Boolean function corresponding to a truth table.

In this possible implementation, the objective function that does not satisfy the decomposition condition can be approximately decomposed to obtain multiple lookup tables, and then the output value of the objective function can be obtained according to the multiple lookup tables, the first module and the second module.

Optionally, in a possible implementation of the first aspect, the above decomposition conditions of the truth table include at least one of the following, the behavior of the truth table is the second subset, and the columns are the first subset: truth table All elements in the row of the truth table are 0; all elements in the row of the truth table are 1; the behavior of the truth table contains the eigenvectors of 0 and 1; the behavior of the truth table is a vector obtained by inverting the eigenvector bit by bit.

The second aspect of the embodiment of the present application provides a method for solving a function, the method is applied to a lookup table scenario, and the method includes: obtaining a first input sequence of an objective function, the first input sequence includes at least two subsets, and the at least two subsets include In the first subset and the second subset, the objective function is a function that does not satisfy the decomposition condition, and the decomposition condition is the decomposition condition of the truth table corresponding to the Boolean function; the first lookup table and the first lookup table of the objective function are determined based on the first input sequence and the decomposition condition. The second lookup table, the first lookup table is related to the first subset, the second lookup table is related to the second subset; the output value of the first function is determined based on the first subset and the first lookup table, and the first function is the target A nested function within a function; determining an output value of the objective function based on the second subset, the second lookup table, and the output value of the first function.

In the embodiment of the present application, the first lookup table and the second lookup table of the truth table corresponding to the objective function that does not satisfy the decomposition condition can be determined based on the first input sequence and the decomposition condition, and then the objective function can be solved based on multiple lookup tables output value.

Optionally, in a possible implementation of the second aspect, the above step: before obtaining the first input sequence of the objective function, the method further includes: obtaining a second input sequence of the objective function; Sort to get the first input sequence.

In this possible implementation manner, by reordering the second input sequence, the subsequent approximate processing of the truth table can realize the expressiveness of the objective function.

Optionally, in a possible implementation of the second aspect, the above steps further include: disturbing the sorting of the second input sequence to obtain a third input sequence; determining that the first error is smaller than the second error, and the first error is The error between the output value obtained based on the first input sequence and the actual output of the objective function, and the second error is the error between the output value obtained based on the third input sequence and the actual output.

In this possible implementation, the input sequence can be scrambled multiple times, and the first input sequence can be determined based on the error between the output value corresponding to different scrambling situations and the real output value, so that it can be determined based on the first input sequence The first lookup table and the second lookup table can realize the solution of the objective function.

Optionally, in a possible implementation of the second aspect, the expression of the above objective function is as follows:

f(x)≈F(Φ(B),A);

Among them, f(x) is the objective function, F(Φ(B),A) is the approximated objective function, B is the first subset, A is the second subset, and Φ(B) is the first function.

Optionally, in a possible implementation of the second aspect, the above step: determining the first lookup table and the second lookup table of the objective function based on the decomposition conditions of the first input sequence and the Boolean function includes: based on the first The input sequence and decomposition conditions are used to approximate the truth table of the objective function to obtain an approximated truth table; the approximated truth table is decomposed to obtain a first lookup table and a second lookup table.

In this possible implementation manner, the approximate calculation is aimed at fault-tolerant applications, and this technique introduces a small error into the system in exchange for reductions in circuit area, delay, and power consumption. Approximate LUT is a technology that combines LUT operation and approximate calculation, and compared with accurate LUT, the storage overhead is greatly reduced. The approximate LUT can approximate functions with many input numbers, and at the same time, the circuit area is small, the power consumption is low, and the delay is low.

Optionally, in a possible implementation of the second aspect, the above decomposition conditions of the truth table include at least one of the following, the behavior of the truth table is the second subset, and the columns are the first subset: each true All elements in the row of the value table are 0; all elements in the row of each truth table are 1; the behavior of each truth table contains eigenvectors of 0 and 1; the behavior eigenvector of each truth table is taken bit by bit The resulting vector.

The third aspect of the embodiment of the present application provides an electronic device, the electronic device is applied to a lookup table scenario, and the electronic device includes: an acquisition unit, configured to acquire the first input sequence of the objective function, the first input sequence includes at least two subsets , at least two subsets include the first subset and the second subset, the objective function is a function that does not satisfy the decomposition condition, and the decomposition condition is the decomposition condition of the Boolean function corresponding to the truth table; the first determination unit is used to base on the first input The sequence and the decomposition condition determine the first lookup table and the second lookup table of the objective function, the first lookup table is related to the first subset, and the second lookup table is related to the second subset; the second determination unit is used for based on the first The subset and the first lookup table determine the output value of the first function, and the first function is a nested function in the objective function; the third determining unit is used for output based on the second subset, the second lookup table, and the first function value determines the output value of the objective function.

Optionally, in a possible implementation manner of the third aspect, the above-mentioned acquiring unit is further configured to acquire a second input sequence of the objective function; the electronic device further includes: a scrambling unit configured to scramble the second input sequence Sorting of sequences to obtain the first input sequence.

Optionally, in a possible implementation of the third aspect, the above-mentioned scrambling unit is also used to scramble the sorting of the second input sequence to obtain the third input sequence; the scrambling unit is specifically used to determine the order of the second input sequence. The first error is smaller than the second error, the first error is the error between the output value obtained based on the first input sequence and the actual output of the objective function, and the second error is the difference between the output value obtained based on the third input sequence and the actual output error.

Optionally, in a possible implementation of the third aspect, the expression of the above objective function is as follows:

f(x)≈F(Φ(B),A);

Wherein, f(x) is the objective function F(Φ(B),A) is the approximated objective function, B is the first subset, A is the second subset, and Φ(B) is the first function.

Optionally, in a possible implementation manner of the third aspect, the above-mentioned first determination unit is specifically configured to perform approximate processing on the truth table of the objective function based on the first input sequence and decomposition conditions, to obtain the approximated Truth table; the first determination unit is specifically used to decompose the approximated truth table to obtain a first lookup table and a second lookup table.

Optionally, in a possible implementation of the third aspect, the above decomposition conditions of the truth table include at least one of the following: all elements in each row of the truth table are 0; All elements in are 1; the behavior of each truth table contains eigenvectors of 0 and 1; the vector obtained by inverting the behavioral eigenvectors of each truth table bit by bit.

A fourth aspect of the present application provides an electronic device, and the electronic device executes the method in the foregoing second aspect or any possible implementation manner of the second aspect.

The fifth aspect of the present application provides an electronic device, including: a processor, the processor is coupled with a memory, and the memory is used to store programs or instructions, and when the programs or instructions are executed by the processor, the electronic device realizes the above-mentioned second aspect Or the method in any possible implementation of the second aspect.

The sixth aspect of the present application provides a computer-readable medium, on which computer programs or instructions are stored, and when the computer programs or instructions are run on the computer, the computer executes the aforementioned second aspect or any possible implementation of the second aspect methods in methods.

A seventh aspect of the present application provides a computer program product. When the computer program product is executed on a computer, the computer executes the method in the foregoing second aspect or any possible implementation manner of the second aspect.

Among them, the third, fifth, sixth, seventh aspects or the technical effects brought by any of the possible implementations may refer to the second aspect or the technical effects brought by the different possible implementations of the second aspect, here No longer.

It can be seen from the above technical solutions that the embodiments of the present application have the following advantages: the circuit can solve the output value of the objective function by means of multiple lookup tables. The first module and the second module can determine outputs of different functions based on different look-up tables. That is, the first module can determine the output of the first function based on the first subset and the first lookup table, and the second module can determine the output of the objective function based on the second subset, the second lookup table, and the output of the first function. Decomposing the objective function into a Boolean function improves the efficiency of solving the objective function and can obtain multi-level logical decomposition results. In addition, through the cascade connection of the first module and the second module, the area, delay and energy consumption of the circuit corresponding to the objective function can also be reduced.

Description of drawings

Figure 1 is an example diagram of the accurate decomposition of Boolean functions;

FIG. 2 is a schematic structural diagram of a system architecture provided in an embodiment of the present application;

FIG. 3 is a schematic structural diagram of a multi-level look-up table circuit provided by an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a scrambling module provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a truth table approximation and decomposition process provided in the embodiment of the present application;

FIG. 6 is an example diagram of a solution to an optimization problem provided by an embodiment of the present application;

Fig. 7 is another schematic structural diagram of the multi-level look-up table circuit provided by the embodiment of the present application;

FIG. 8 is another example diagram of a solution to an optimization problem provided by an embodiment of the present application;

Figure 9 and Figure 10 are example diagrams of the effect of the multi-level look-up table circuit on the continuous function provided by the embodiment of the present application;

Figure 11 is an example diagram of the effect of the multi-level look-up table circuit on the discontinuous function provided by the embodiment of the present application;

Fig. 12 is a schematic diagram of the process of testing a multi-level look-up table circuit provided by the embodiment of the present application;

Fig. 13 is a schematic flow chart of the function solving method provided by the embodiment of the present application;

FIG. 14 is a schematic flow chart of the approximate processing method provided by the embodiment of the present application;

Fig. 15 is a comparison example diagram of a fifth output bit truth table before and after approximation provided by the embodiment of the present application;

Fig. 16 is a comparison example diagram before and after approximation of a fourth output bit truth table provided by the embodiment of the present application;

Fig. 17 is the curve of the accurate cosine function obtained based on the function solving method provided by the embodiment of the present application;

Fig. 18 is a comparison graph between the approximate cosine function and the exact cosine function obtained based on the function solving method provided by the embodiment of the present application;

FIG. 19 is a schematic structural diagram of an electronic device provided by an embodiment of the present application;

FIG. 20 is another schematic structural diagram of an electronic device provided by an embodiment of the present application.

Detailed ways

under

The following will describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

For ease of understanding, the relevant terms and concepts mainly involved in the embodiments of the present application are firstly introduced below.

1. Neural network

A neural network can be composed of neural units, and a neural unit can refer to an operation unit that takes X _s and the intercept b as input, and the output of the operation unit can be:

Among them, s=1, 2, ... n, n is a natural number greater than 1, W _s is the weight of X _s , and b is the bias of the neuron unit. f is the activation function of the neural unit, which is used to introduce nonlinear characteristics into the neural network to convert the input signal in the neural unit into an output signal. The output signal of this activation function can be used as the input of the next convolutional layer. The activation function may be a sigmoid function. A neural network is a network formed by connecting many of the above-mentioned single neural units, that is, the output of one neural unit can be the input of another neural unit. The input of each neural unit can be connected with the local receptive field of the previous layer to extract the features of the local receptive field. The local receptive field can be an area composed of several neural units.

2. Truth table

A truth table is a table representing all possible states between inputs and outputs of a logical event. A table listing the true and false values of a propositional formula. Usually 1 means true and 0 means false.

3. Look up table (look up table, LUT)

The essence of LUT is a random access memory (random access memory, RAM). At present, 4-input LUTs are mostly used in field programmable logic gate arrays (field programmable gate arrays, FPGAs), so each LUT can be regarded as a 16×1 RAM with 4-bit address lines. When the user describes a logic circuit through a schematic diagram or a hardware description language (hardware description language, HDL), the programmable logic device (programmable logic device, PLD)/FPGA development software will automatically calculate all possible results of the logic circuit, And write the result to RAM in advance. In this way, each time a signal is input for logical operation, it is equivalent to inputting an address for table lookup, finding out the content corresponding to the address, and then outputting it.

4. Disjoint decomposition of Boolean functions

Let f be a Boolean function with n inputs, its input is X={x ₁ ,x ₂ ,…,x _n }, divide the input X into a set A (which can be called a free set) and B (which can be called a constrained set ). If there are functions F and Φ such that f(X)=F(Φ(B),A), then f is said to have a disjoint decomposition of the free set A and the constrained set B.

However, not all Boolean functions can be disjointly decomposed. The necessary and sufficient condition for disjoint decomposition is the following Theorem 1.

Theorem 1: Divide the input X of the Boolean function into sets A and B, the Boolean function f has a disjoint decomposition about the free set A and the constrained set B, if and only if the two-dimensional truth value with A as the row and B as the column All rows of a table fall into one of four categories:

Type 1 (Type1), all elements in the row are 0;

Type 2 (Type2), all elements in the row are 1;

Type 3 (Type3), the behavior contains eigenvectors of 0 and 1;

Type 4 (Type4), the vector obtained by bit-by-bit inversion of the behavior feature vector.

Exemplarily, an example diagram of the exact decomposition of a Boolean function as shown in Figure 1, wherein, the free set A={x ₁ ,x ₂ }, the constraint set B={x ₃ ,x ₄ }, the two-dimensional truth table The four rows belong to categories 3, 4, 2, and 4, respectively. Thus there is a disjoint decomposition f(X)=F(Φ(B),A), where,

Currently, the number of rows of LUTs grows exponentially with the number of function inputs, resulting in larger area, higher latency, and higher power consumption of the circuits used in this technique. Therefore, how to reduce the area, delay and power consumption of the circuit corresponding to the LUT is an urgent technical problem to be solved.

In order to solve the above technical problems, embodiments of the present application provide a multi-level look-up table circuit, a function solving method and related equipment. All functions can be decomposed into approximate Boolean functions, so as to solve the output value of the function through the cascade of the first module and the second module. In addition, the area, delay and energy consumption of the circuit corresponding to the function can be reduced by cascading multiple modules.

FIG. 2 is a system architecture diagram of a circuit application provided by an embodiment of the present application. The system architecture diagram shown in FIG. 2 includes a control unit 201 and a multi-level look-up table unit 202 connected to the control unit 201 .

The operation flow of the system is that the control unit 201 reads the input of the function, and the control unit 201 looks up the table from the multi-level look-up table unit 202 to obtain the output value of the function.

Optionally, the system architecture may further include an arithmetic logic unit (arithmetic logic unit, ALU) 203 . Wherein, the arithmetic logic unit 203 is connected with the control unit 201 .

The operation flow of the system can be adjusted as follows: the control unit 201 reads the input of the function, the control unit 201 obtains the feature information (such as derivative information, etc.) The information and the function input are operated to obtain the output of the function.

In one possible implementation, system architectures with ALUs are generally suitable for decomposition of accurate LUTs. System architectures that do not have an ALU are generally suitable for decomposition that approximates a LUT. Wherein, for the description of the exact LUT and the approximate LUT, reference may be made later, and details are not repeated here.

The system architecture provided in the embodiments of the present application can be applied to scenarios such as optical modules, wireless networks, and neural networks, and is not specifically limited here. In some cases, the system may also be referred to as an accelerated computing system.

The above-mentioned multi-level look-up table unit (also called a multi-level look-up table circuit) will be described in detail below.

The multi-level lookup table link provided in the embodiment of the present application can be applied to multiple-input-single-output scenarios, and can also be applied to multiple-input-multiple-output scenarios, which are described below:

1. For scenarios where multiple input and single output are used.

Taking the multi-level look-up table circuit as an example of a two-level look-up circuit, the multi-level look-up table circuit provided in the embodiment of the present application may be shown in FIG. 3 . The multi-level lookup table circuit is used to solve the output value of the objective function based on multiple lookup tables, the multiple lookup tables include a first lookup table and a second lookup table, and the first input sequence of the objective function includes a first subset and a second lookup table Two subsets. The first subset can be understood as a subsequence in the first input sequence, and the second subset can be understood as another subsequence in the first input sequence. The multi-level look-up table circuit includes a first module 301 and a second module 302 .

The first module 301 is configured to determine the output value of the first function based on the first subset and the first lookup table, and the first function is a nested function in the objective function;

The second module 302 is configured to determine the output value of the objective function based on the second subset, the second lookup table, and the output value of the first function.

Optionally, the expression of the objective function is: f(X)=F(Φ(B), A), wherein, f(X) is the objective function, and F(Φ(B), A) is the objective function or approximate After the objective function, the first input sequence: X'={x' _n ,…,x′ ₁ }, the first subset: B=x’ _b ,…,x′ ₁ , the second subset: A=x ' _n ,…,x' _b+1 , Φ(B) is the first function. Then the number of inputs to the first lookup table is b, and the number of inputs to the second lookup table is n−b+1.

The multi-level look-up table circuit can reduce the area, delay and energy consumption of the circuit corresponding to the objective function through the cascade connection of the first module and the second module. The first module and the second module can realize the decomposition of approximate Boolean functions.

Optionally, the multi-level lookup table circuit may also include a scrambling module 303, which is used to obtain the second input sequence of the objective function, scramble the sorting of the second input sequence, obtain the first input sequence, and decompose the first input sequence Obtain the first subset and the second subset. The shuffling module 303 is further configured to send the first subset to the first module 301 and send the second subset to the second module 302 .

Optionally, the structure of the scrambling module 303 can be as shown in FIG. 4 , the scrambling module 303 reorders (or calls it scrambling) the second input sequence to obtain the first input sequence: X'={x' _n , … ,x′ ₁ }. The first b ones are input into the first module 301 as the first subset B, and the nb ones are input into the second module 302 as the second subset A. As shown in FIG. 4 , the scrambling module 303 can be realized by using n n-to-1 multiplexers (multiplexers, MUX), and the jth MUX is controlled by the signal S _j to determine the specific scrambling situation.

In this way, by introducing a scrambling module to scramble the input of the objective function, the expression ability of the subsequent approximate LUT can be improved.

Optionally, the objective function in this embodiment of the present application may be a continuous function and a part of discontinuous functions that can be decomposed by Boolean functions. It may also be a function that does not satisfy the decomposition condition, which is the decomposition condition of the Boolean function corresponding to the truth table. Wherein, the decomposition condition of the truth table is as described in the above-mentioned Theorem 1, and details are not repeated here.

Optionally, if the objective function is a function that does not satisfy the decomposition condition, the multi-level lookup table circuit may also include a configuration module 304 for approximating the truth table corresponding to the objective function to obtain an approximated truth table, And the approximated truth table is decomposed into a first lookup table and a second lookup table. The configuration module 304 is further configured to send the first lookup table to the first module 301 and send the second lookup table to the second module 302 .

Optionally, the configuration module 304 can also be understood as being used to configure the first lookup table and the second lookup table, write the input sorting information to the scrambling module 303 according to a certain sequence, and write the sorting information to the first module and the second lookup table. The second module writes data approximating the LUT.

In addition, the above-mentioned scrambling module 303 can also be used to scramble the second input sequence multiple times to obtain different scrambled input sequences, and after output values obtained based on different scrambled input sequences, compare each output value The error between the actual output of the objective function and the minimum error is determined to be the first input sequence corresponding to the input sequence.

The process of approximating the truth table corresponding to the objective function and decomposing the approximated truth table into a first lookup table and a second lookup table will be described below. This process can be understood as: if the objective function does not satisfy the aforementioned Theorem 1, modify the truth table of the objective function and introduce approximation, so that the approximated truth table can be decomposed.

Exemplarily, as shown in (a) in Figure 5, the original truth table of the objective function does not satisfy Theorem 1, that is, there is no second subset (also called the free set) (A={x ₁ , x ₂ }) and the disjoint decomposition of the first subset (may also be called the constraint set) (B={x ₃ ,x ₄ }). By introducing an approximation, the two-dimensional truth table in (b) in Figure 5 satisfies Theorem 1, so that the original objective function can be decomposed into two functions F and Φ approximately. The decomposed first lookup table LUT0 and second lookup table LUT1 are shown in FIG. 5 .

The approximation processing in this embodiment can be understood as an optimization problem, the optimization goal is to minimize the error rate, and the variables to be solved are the feature vector V and the category vector T. Among them, the category vector T is used to represent the type to which each row of the truth table belongs (that is, the type in the aforementioned Theorem 1), for example, the category vector T=(1,3,1,3) corresponding to (b) in the aforementioned Figure 5 . Additionally, a set of driven feature vectors V and class vectors T corresponds to a unique approximate truth table. The truth table may be a multidimensional truth table, and here only a two-dimensional truth table is used as an example for description.

Solving an optimization problem involves the following steps:

Step 1: Randomly initialize the feature vector V.

Step 2: Alternately optimize the category vector T and feature vector V.

This step 2 may include the following 3 sub-steps:

Step 2.1, fix the feature vector V and change the category vector T to minimize the error rate;

Step 2.2, fix the category vector T and change the feature vector V to minimize the error rate;

Step 2.3, if neither V nor T changes, go to step 3, otherwise go to step 2.1.

Step 3, determine an approximate two-dimensional truth table according to the feature vector V and the category vector T.

For an exemplary accurate two-dimensional truth table and the above-mentioned steps for solving the optimization problem, reference may be made to FIG. 6 . It can be seen that the error rate of the approximate two-dimensional truth table is only 1/8.

Second, for the use of multi-input multi-output scenarios.

The multi-level look-up table circuit provided in the embodiment of the present application may be shown in FIG. 7 . The multi-level lookup table circuit is used to solve the output value of the objective function based on multiple lookup tables, the number of the multiple lookup tables is m, and the second input sequence of the objective function is X={x _n ,...,x ₁ } . The multi-level look-up table circuit includes m modules (the first module, . . . , the mth module). Wherein, each module is equivalent to the aforementioned Fig. 3 . Each module can be understood as the multi-level look-up table circuit in FIG. 3 . The number of multi-level look-up table circuits corresponds to the number of outputs.

The approximation processing in this embodiment can be understood as an optimization problem, the optimization goal is to minimize the normalized mean of error distance (NMED), and the variables to be solved are the feature vector V and the category vector T. Wherein, the feature vector V and the category vector T are the same as the feature vector V and the category vector T in the aforementioned multiple-input-single-output scenario, which will not be repeated here.

The calculation formula of the above-mentioned NMED can be as follows:

Among them, the objective function has I input and O output, p _i is the probability of the i-th group of input combinations appearing,

and g _i are respectively the output values of all output bits of the approximated function (also called approximate function) and target function (also called accurate function) according to the binary concatenation under the i-th input combination.

The optimization process can be decomposed into sequentially optimizing the objective function on each output bit from the output of the objective function according to the highest bit to the lowest bit of the binary system. Among them, when optimizing the kth output bit, the approximate function of other bits except the kth bit is fixed, and the optimal scrambling method on the kth output bit is determined, as well as the optimal feature vector V and category vector T, The NMED between the approximated function and the objective function is minimized.

Exemplarily, the above multi-output optimization problem may be as shown in FIG. 8 . Taking the 3-bit binary output as an example, when determining the optimal scrambling method of the highest bit, V and T, the truth table of the middle bit and the lowest bit is fixed. When determining the optimal scrambling mode, V and T of the middle bit, the truth table of the highest bit and the lowest bit is fixed. When determining the optimal scrambling method of the lowest bit, V and T, the truth table of the highest bit and the middle bit is fixed.

In the embodiment of the present application, on the one hand, the circuit can solve the output value of the objective function by means of multiple lookup tables. The first module and the second module can determine outputs of different functions based on different look-up tables. That is, the first module can determine the output of the first function based on the first subset and the first lookup table, and the second module can determine the output of the objective function based on the second subset, the second lookup table, and the output of the first function. Decomposing the objective function into a Boolean function improves the efficiency of multi-level logic function decomposition, and can obtain multi-level logic decomposition results. On the other hand, through the cascade connection of the first module and the second module, the area, delay and energy consumption of the circuit corresponding to the objective function can also be reduced. On the other hand, by approximating the truth table corresponding to the function that does not meet the Boolean function decomposition conditions, after decomposing the approximate truth table, it can be applied to the decomposition of all functions, and then the objective function can be realized through logic circuits. solve. Or understand that by introducing small errors into the system, it is exchanged for the reduction of circuit area, delay and power consumption. Approximate processing reduces storage overhead compared to exact LUTs. Approximate processing can approximate functions with many input numbers, and at the same time, the area of the circuit is small, the power consumption is low, and the delay is low.

In order to more intuitively see the beneficial effect of the multi-level look-up table circuit proposed by the embodiment of the present application, the following describes the performance of the two-level look-up table circuit and the prior art applied to continuous functions and discontinuous functions respectively. Among them, the prior art includes a LUT scheme (Round) in which the lowest bit is rounded and an approximate LUT (ApproxLUT) in which a derivative is stored.

1. Continuous function.

The selection of the continuous function can be shown in Table 1. Quantize the input sequence and output value of the continuous function to 16 bits, where the size of the constraint set is 9, and the number of rows corresponding to the first-level LUT is 512. The size of the free set is 7, and the number of rows of the corresponding second-level LUT is 256. This configuration approximates the decomposition of the continuous function.

Table 1

Wherein, the beneficial effect corresponding to Table 1 can be shown in FIG. 9, wherein, a decomposition-based approximate lookup table architecture (DALTA) is a multi-level lookup table circuit provided by the embodiment of the present application. As can be seen from Fig. 9, the curve of the continuous function obtained by the multi-level look-up table circuit provided in this embodiment is almost consistent with the curve of the accurate LUT (that is, the method of solving the function of the look-up table that can be decomposed by Theorem 1), indicating that this embodiment The provided multi-level look-up table circuit has very little error.

In addition, comparing the effects of the prior art Round and ApproxLUT as shown in Figure 10, it can be seen that the multi-level look-up table circuit provided by this embodiment reduces the area (Area) by 97.5% on the premise of reducing the error, 40.7 % delay (Latency) and 99% energy consumption (Energy). When the error of ApproxLUT is the same, DALTA reduces the delay by 92.4% and the energy consumption by 56.5% compared with ApproxLUT.

Second, the non-continuous function.

The selection of the discontinuous function can be shown in Table 2. The input sequence of the discontinuous function is quantized to 16 bits, wherein the size of the constraint set is 9, and the number of rows of the corresponding first-level LUT is 512. The size of the free set is 7, and the number of rows of the corresponding second-level LUT is 256. With this configuration, the discontinuous function is approximately decomposed.

Table 2

非连续函数non-continuous function	输入的比特位input bit	输出的比特位output bit	应用场景Application Scenario
Brent-KungBrent-Kung	1616	99	算术运算arithmetic operation
Forwardk2jForwardk2j	1616	1616	机器人科学robotics
Inversek2jInversek2j	1616	1616	机器人科学robotics
MultiplierMultiplier	1616	1616	算术运算arithmetic operation

Wherein, the beneficial effects corresponding to Table 2 may be shown in Table 3 and FIG. 11 . It can be seen from Table 3 that the solution provided by the embodiment of the present application (that is, DALTA) is compared with ApproxLUT on the discontinuous function. When consuming the same storage space, the error of DALTA is much lower than that of ApproxLUT. This is because ApproxLUT relies on Taylor expansion and does not work well on non-continuous functions. It can be seen from Figure 11 that, compared with Round, DALTA reduces the area by 95.8%, the delay by 39.0% and the energy consumption by 98.3% on the premise of reducing the error.

table 3

In addition, the effect of the multi-level look-up table circuit provided by the embodiment of the present application is further described by taking the cosine function as an example as the objective function. The process can be shown in FIG. 12 , the fixed output quantity (binary number of bits) m takes a fixed value of 16, and the input quantity (binary number of bits) n increases from 8 to 16. And determine the size of the free set and the size of the constraint set as n/2 and then round up (round up or down), and then generate a multi-level lookup table circuit according to the parameters m, n, the free set and the constraint set. And test the error, area, delay and power consumption of the multi-level look-up table circuit. The test results are shown in Table 4.

Table 4

输入比特位/输出比特位Input bit/Output bit	NMEDNMED	面积area	延时time delay		功耗power consumption
8/168/16	0.230％0.230%	3.0×3.0×	1.7×1.7×	4.5×4.5×
9/169/16	0.121％0.121%	4.3×4.3×	1.9×1.9×	6.4×6.4×
10/1610/16	0.124％0.124%	6.2×6.2×	1.8×1.8×	9.2×9.2×
11/1611/16	0.052％0.052%	9.4×9.4×	2.2×2.2×	13.9×13.9×
12/1612/16	0.060％0.060%	13.6×13.6×	2.4×2.4×	20.2×20.2×
13/1613/16	0.028％0.028%	20.7×20.7×	2.6×2.6×	30.8×30.8×
14/1614/16	0.027％0.027%	29.2×29.2×	2.5×2.5×	43.3×43.3×
15/1615/16	0.013％0.013%	45.0×45.0×	2.7×2.7×	66.7×66.7×
16/1616/16	0.014％0.014%	62.4×62.4×	1.6×1.6×	92.5×92.5×

Among them, × means: the improvement relative to the accurate LUT. It can be seen from Table 4 that as the number of inputs increases, the error NMED decreases gradually. Compared with the accurate LUT, the area and power consumption of this application decrease exponentially.

Currently, only Boolean functions that satisfy the above Theorem 1 can be decomposed, making the Boolean function-based lookup table technique unable to be applied to all functions.

To this end, the embodiments of the present application provide a method for solving a function and related equipment. All functions can be decomposed into approximate Boolean functions to obtain at least two lookup tables, so that the output value of the function can be obtained by solving the at least two lookup tables.

The function solving method provided by the embodiment of the present application is described below.

The function solving method provided in the embodiment of the present application can be applied to scenarios such as optical modules, wireless networks, and neural networks that are suitable for solving functions of a lookup table, and the details are not limited here. The method may be executed by an electronic device, or may be executed by a component of the electronic device (eg, a processor, a chip, or a chip system, etc.), which is not specifically limited here.

Please refer to FIG. 13 , the method includes steps 1301 to 1304 , which are described below respectively.

Step 1301, obtain the first input sequence of the objective function.

Optionally, before this step, the second input sequence of the objective function may also be obtained, and the sorting in the second input sequence is disturbed to obtain the first input sequence.

Further, the second input sequence may also be scrambled to obtain the third input sequence, and it is determined that the first error is smaller than the second error. The first error is an error between the output value of the objective function obtained based on the first input sequence and the actual output value of the objective function. The second error is a simple error between the output value of the objective function obtained based on the third input sequence and the actual output value of the objective function.

In this embodiment of the present application, there is no limitation on the shuffling manner and number of shuffling times of the second input sequence.

For how to determine the optimal scrambling scheme after scrambling, reference may be made to the description of the corresponding embodiment in FIG. 6 or FIG. 8 , which will not be repeated here. The input sequence obtained by determining the optimal scrambling scheme is the first input sequence.

The first input sequence in the embodiment of the present application includes at least two subsets, the at least two subsets include the first subset and the second subset, the objective function is a function that does not satisfy the decomposition condition, and the decomposition condition is that the Boolean function corresponds to true The decomposition criteria for the value table. Wherein, the decomposition condition can be understood as the above-mentioned Theorem 1, and details will not be repeated here.

Step 1302, determine a first lookup table and a second lookup table of the objective function based on the first input sequence and decomposition conditions.

After the first input sequence of the objective function is acquired, a first lookup table and a second lookup table of the objective function may be determined based on the first input sequence and decomposition conditions. Wherein, the first lookup table is related to the first subset, and the second lookup table is related to the second subset.

This step may specifically include: performing approximate processing on the truth table of the objective function based on the first input sequence and decomposition conditions to obtain an approximated truth table, and the approximated truth table satisfies the decomposition conditions. Therefore, the approximated truth table can be decomposed to obtain the first lookup table and the second lookup table.

For descriptions such as approximation processing in this step, reference may be made to the descriptions of the foregoing embodiments, and details are not repeated here.

Step 1303, determine the output value of the first function based on the first subset and the first lookup table.

After the first lookup table and the second lookup table are determined, the output value of the first function may be determined based on the first subset and the first lookup table. Wherein, the first function can be understood as a nested function of the objective function.

Step 1304, determine the output value of the objective function based on the second subset, the second lookup table and the output value of the first function.

After the first lookup table and the second lookup table are determined, the output value of the objective function may be determined based on the second subset, the second lookup table, and the output value of the first function. Since the output value is obtained by decomposing multiple lookup tables through the approximated truth table, the output value can be understood as the approximate output value of the objective function, and can also be understood as the output value of the approximated objective function.

In this embodiment, the expression of the objective function can be as follows:

f(X)≈F(Φ(B),A);

In this embodiment, at least two lookup tables can be obtained by decomposing an approximate Boolean function on an objective function that does not meet the decomposition conditions, so as to obtain the output value of the objective function (which can also be understood as an approximate value) through at least two lookup tables.

In the following, the objective function is the cosine function, the input sequence of the cosine value is 5 bits (x ₅ , x ₄ , x ₃ , x ₂ , x ₁ ), and the output value is 5 bits (y ₅ , y ₄ , y ₃ , y ₂ , y ₁ ). Set the size of the free set to 3 and the size of the constraint set to 2 as an example, for the approximation process in the above step 1302, the approximation of the truth table in the multi-input multi-output scenario and five truth tables based on the decomposition of the truth table after approximation (consistent with the number of output bits) to obtain the cosine function curve.

The approximation process can be shown in Figure 14, and the approximation process includes steps 1401 to 1404, which are described below:

Step 1401, decompose the highest bit (bit 5), and fix the remaining bits (bit 1-4).

Since the approximate function of the 1-4 bit has not been determined, this embodiment uses the exact function of the 1-4 bit to estimate the approximate function of the corresponding bit. Subsequently, this embodiment finds the optimal scrambling method on the 5th position, that is, the free set is {x ₁ , x ₂ , x ₃ } and the constraint set is {x ₄ , x ₅ }, and in this scrambling method Next, the optimal feature vector V={1,1,0,0} and category vector T={3,3,3,3,3,3,3,3}, so that the approximate function and the exact function NMED min. As shown in FIG. 15 , in this scrambling mode, the exact two-dimensional truth table and the approximate two-dimensional truth table on the fifth bit are exactly the same.

Step 1402, decompose the 4th digit, and fix the remaining digits (1-3 digits and 5th digit).

Since the approximation function on the 1st-3rd position has not been determined, the present embodiment uses the exact function of the 1st-3rd position to estimate the approximate function on the corresponding position. In addition, the approximate function on the 5th position has been completed after the first step operation get. Subsequently, this embodiment finds the optimal scrambling method on the 4th position, that is, the free set is {x ₃ , x ₄ , x ₅ } and the constraint set is {x ₁ , x ₂ }, and in this scrambling method Next, the optimal feature vector V={1,1,1,0} and category vector T={2,2,3,1,2,1,1,1}, so that the approximate function and the exact function NMED min. As shown in FIG. 16 , in this scrambling mode, there is one position difference between the exact two-dimensional truth table and the approximate two-dimensional truth table at the fourth bit.

Step 1403, and so on, decompose the 3rd, 2nd, and 1st bits respectively.

Decompose the 3rd digit and fix the remaining digits (1st, 2nd, 4th, 5th digits). Disassemble the 2nd digit and fix the remaining digits (1st digit and 3-5th digit). Decompose the 1st digit and fix the remaining digits (2-5 digits). Get the approximate function on the corresponding output bit.

Step 1404, repeat steps 1401 to 1403 until the preset condition is met.

The preset conditions in this method include that the value of NMED does not drop or the difference between the approximate output value of the function and the real output value is smaller than the preset threshold.

The exact cosine function curve is shown in FIG. 17 , and the obtained approximate cosine function with NMED=0.81% can be compared with the exact cosine function curve as shown in FIG. 18 . It can be seen that the approximate cosine function approximates the curve of the exact cosine function. It is proved that the solution result of the function solution method provided by this embodiment is closer to the real output value of the function.

The function solving method in the embodiment of the present application is described above, and the electronic device in the embodiment of the present application is described below. Please refer to FIG. 19. An embodiment of the electronic device in the embodiment of the present application includes:

The acquisition unit 1901 is configured to acquire a first input sequence of the objective function, the first input sequence includes at least two subsets, the at least two subsets include the first subset and the second subset, the objective function is a function that does not satisfy the decomposition condition, The decomposition condition is the decomposition condition of the Boolean function corresponding to the truth table;

The first determination unit 1902 is configured to determine a first lookup table and a second lookup table of the objective function based on the first input sequence and decomposition conditions, the first lookup table is related to the first subset, and the second lookup table is related to the second subset relevant;

The second determining unit 1903 is configured to determine the output value of the first function based on the first subset and the first lookup table, and the first function is a nested function in the objective function;

The third determining unit 1904 is configured to determine the output value of the objective function based on the second subset, the second lookup table, and the output value of the first function.

Optionally, the electronic device may further include a shuffling unit 1905, configured to shuffle the order of the second input sequence to obtain the first input sequence.

In this embodiment, the operations performed by each unit in the electronic device are similar to those described in the foregoing embodiment shown in FIG. 13 to FIG. 18 , and will not be repeated here.

In this embodiment, at least two lookup tables can be obtained by decomposing an approximate Boolean function on an objective function that does not meet the decomposition conditions, so that the second determination unit 1903 and the third determination unit 1904 can solve the objective function through at least two lookup tables Output value (also can be understood as an approximate value).

Referring to FIG. 20 , it is a schematic structural diagram of another electronic device provided by the present application. The electronic device may include a processor 2001 , a memory 2002 and a communication interface 2003 . The processor 2001, the memory 2002 and the communication interface 2003 are interconnected through lines. Wherein, program instructions and data are stored in the memory 2002 .

The memory 2002 stores program instructions and data corresponding to the steps executed by the electronic device in the corresponding embodiments shown in FIGS. 13 to 18 .

The processor 2001 is configured to execute the steps performed by the electronic device shown in any one of the above embodiments shown in FIG. 13 to FIG. 18 .

The communication interface 2003 may be used for receiving and sending data, and for performing steps related to acquiring, sending, and receiving in any of the embodiments shown in FIGS. 13 to 18 .

In an implementation manner, the electronic device may include more or fewer components than those shown in FIG. 20 , which is only an example in the present application and not limited thereto.

In the several embodiments provided in this application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated. to another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit. The above-mentioned integrated units may be fully or partially realized by software, hardware, firmware or any combination thereof.

When the integrated units are implemented using software, they may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the processes or functions according to the embodiments of the present application will be generated in whole or in part. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website, computer, server or data center Transmission to another website site, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or a data center integrated with one or more available media. The available medium may be a magnetic medium (such as a floppy disk, a hard disk, or a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (solid state disk, SSD)), etc.

The terms "first", "second" and the like in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It should be understood that the terms used in this way can be interchanged under appropriate circumstances, and this is merely a description of the manner in which objects with the same attribute are described in the embodiments of the present application. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, product, or apparatus comprising a series of elements is not necessarily limited to those elements, but may include elements not expressly included. Other elements listed explicitly or inherent to the process, method, product, or apparatus.

Claims

A multi-level lookup table circuit, characterized in that the circuit is used to solve the output value of an objective function based on a plurality of lookup tables, the plurality of lookup tables comprising a first lookup table and a second lookup table, the objective function The first input sequence includes a first subset and a second subset; the circuit includes a first module and a second module;

The first module is configured to determine an output value of a first function based on the first subset and the first lookup table, the first function being a nested function in the objective function;

The second module is configured to determine an output value of the objective function based on the second subset, the second lookup table, and the output value of the first function.
The circuit according to claim 1, wherein the circuit also includes a scrambling module;

The scrambling module is configured to obtain the second input sequence of the objective function, scramble the sorting of the second input sequence to obtain the first input sequence, and decompose the first input sequence to obtain the first input sequence. a subset and said second subset;

The scrambling module is further configured to send the first subset to the first module, and send the second subset to the second module.
The circuit according to claim 1, further comprising a configuration module;

The configuration module is configured to approximate the truth table corresponding to the objective function to obtain an approximated truth table, and decompose the approximated truth table into the first lookup table and the second lookup table. lookup table;

The configuration module is further configured to send the first lookup table to the first module, and send the second lookup table to the second module.
The circuit according to any one of claims 1 to 3, wherein the expression of the objective function is as follows:

f(x)=F(Φ(B),A);

Wherein, f(x) is the objective function, F(Φ(B), A) is the objective function or an approximated objective function, B is the first subset, and A is the second subset , Φ(B) is the first function.
The circuit according to any one of claims 1 to 4, wherein the objective function is a function that does not satisfy a decomposition condition, and the decomposition condition is a decomposition condition of a Boolean function corresponding to a truth table.
The circuit according to any one of claims 1 to 4, wherein the decomposition conditions of the truth table include at least one of the following, the second subset of behaviors of the truth table is listed as the Describe the first subset:

All elements in the rows of the truth table are 0;

All elements in the rows of the truth table are 1;

The behavior of the truth table includes eigenvectors of 0 and 1;

The behavior of the truth table is a vector obtained by inverting the feature vector bit by bit.
A method for solving a function, characterized in that the method is applied to a lookup table scene, and the method includes:

Obtaining a first input sequence of an objective function, the first input sequence includes at least two subsets, the at least two subsets include a first subset and a second subset, and the objective function is a function that does not satisfy a decomposition condition, The decomposition condition is a decomposition condition corresponding to a truth table of a Boolean function;

determining a first lookup table and a second lookup table of the objective function based on the first input sequence and the decomposition condition, the first lookup table is related to the first subset, and the second lookup table is related to the first subset said second subset is associated;

determining an output value of a first function based on the first subset and the first lookup table, the first function being a nested function in the objective function;

An output value of the objective function is determined based on the second subset, the second lookup table, and the output value of the first function.
The method according to claim 7, wherein, before obtaining the first input sequence of the objective function, the method further comprises:

obtaining a second input sequence of the objective function;

Shuffle the order of the second input sequence to obtain the first input sequence.
The method according to claim 8, characterized in that the method further comprises:

Shuffle the sorting of the second input sequence to obtain a third input sequence;

determining that the first error is smaller than a second error, the first error is an error between the output value obtained based on the first input sequence and the actual output of the objective function, and the second error is based on the third The error between the output value obtained by the input sequence and the actual output.
The method according to any one of claims 7 to 9, wherein the expression of the objective function is as follows:

f(x)≈F(Φ(B),A);

Wherein, f(x) is the objective function, F(Φ(B), A) is the approximated objective function, B is the first subset, A is the second subset, Φ(B) for the first function.
The method according to any one of claims 7 to 10, wherein the first lookup table and the second lookup table of the objective function are determined based on the decomposition conditions of the first input sequence and the Boolean function, include:

performing approximate processing on the truth table of the objective function based on the first input sequence and the decomposition condition to obtain an approximated truth table;

Decomposing the approximated truth table to obtain the first lookup table and the second lookup table.
The method according to any one of claims 7 to 11, wherein the decomposition conditions of the truth table include at least one of the following, the second subset of behaviors of the truth table is listed as the Describe the first subset:

All elements in the row of each truth table are 0;

All elements in the row of each truth table are 1;

The behavior of each of the truth tables includes eigenvectors of 0 and 1;

The behavior of each truth table is a vector obtained by inverting the feature vector bit by bit.
An electronic device, characterized in that the electronic device is applied to a lookup table scenario, and the electronic device includes:

An acquisition unit, configured to acquire a first input sequence of an objective function, the first input sequence includes at least two subsets, the at least two subsets include a first subset and a second subset, and the objective function does not satisfy The function of decomposition condition, described decomposition condition is the decomposition condition of Boolean function corresponding truth table;

a first determining unit, configured to determine a first lookup table and a second lookup table of the objective function based on the first input sequence and the decomposition condition, the first lookup table is related to the first subset, the second lookup table is associated with the second subset;

a second determining unit, configured to determine an output value of a first function based on the first subset and the first lookup table, the first function being a nested function in the objective function;

A third determining unit, configured to determine an output value of the objective function based on the second subset, the second lookup table, and the output value of the first function.
The electronic device according to claim 13, wherein the acquisition unit is also used to acquire the second input sequence of the objective function;

The electronic equipment also includes:

A shuffling unit, configured to shuffle the sorting of the second input sequence to obtain the first input sequence.
The electronic device according to claim 14, wherein the scrambling unit is further configured to scramble the sorting of the second input sequence to obtain a third input sequence;

The scrambling unit is specifically configured to determine that the first error is smaller than the second error, the first error is an error between the output value obtained based on the first input sequence and the actual output of the objective function, the The second error is an error between the output value obtained based on the third input sequence and the actual output.
The electronic device according to any one of claims 13 to 15, wherein the expression of the objective function is as follows:

f(x)≈F(Φ(B),A);

Wherein, f(x) is the objective function, F(Φ(B), A) is the approximated objective function, B is the first subset, A is the second subset, Φ(B) for the first function.
The electronic device according to any one of claims 13 to 16, wherein the first determining unit is specifically configured to evaluate the truth value of the objective function based on the first input sequence and the decomposition condition The table is approximated to obtain the approximated truth table;

The first determining unit is specifically configured to decompose the approximated truth table to obtain the first lookup table and the second lookup table.
The electronic device according to any one of claims 13 to 17, wherein the decomposition conditions of the truth table include at least one of the following, the second subset of behaviors of the truth table is listed as The first subset:

All elements in the row of each truth table are 0;

All elements in the row of each truth table are 1;

The behavior of each of the truth tables includes eigenvectors of 0 and 1;

The behavior of each truth table is a vector obtained by inverting the feature vector bit by bit.
An electronic device, characterized in that it includes: a processor, the processor is coupled with a memory, and the memory is used to store a program or an instruction, and when the program or instruction is executed by the processor, the electronic The device executes the method according to claims 7-12.
A computer-readable storage medium, characterized in that instructions are stored in the computer-readable storage medium, and when the instructions are executed on a computer, the computer executes the computer according to any one of claims 7 to 12. Methods.
A computer program product, characterized in that, when the computer program product is executed on a computer, the computer is made to execute the method according to any one of claims 7 to 12.