WO2023061172A1 - 应用升级方法、装置、计算设备和芯片系统 - Google Patents
应用升级方法、装置、计算设备和芯片系统 Download PDFInfo
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Definitions
- the present application relates to the computer field, and in particular to an application upgrading method, device, computing device and chip system.
- a data processing unit is a multi-core processor with high-performance computing capabilities. DPU unloads other chips in the host (such as: central processing unit (CPU), graphics processing unit (GPU)) running artificial intelligence, storage and other related applications to improve the data processing performance of the host and reduce host load.
- DPU unloads other chips in the host (such as: central processing unit (CPU), graphics processing unit (GPU)) running artificial intelligence, storage and other related applications to improve the data processing performance of the host and reduce host load.
- CPU central processing unit
- GPU graphics processing unit
- the new version of the application program takes effect by restarting the host computer connected to the DPU or restarting the operating system of the DPU.
- services are interrupted when the DPU runs the application program, that is, service processing fails.
- the operating system of the DPU restarts, it initializes and restores services.
- the restart time of the operating system is usually longer (for example, at the minute level), which leads to a longer service interruption time of the DPU and degrades user experience. Therefore, how to restore the service as soon as possible when upgrading the application program of the DPU is an urgent problem to be solved at present.
- the application provides an application upgrading method, device, computing device and chip system, thereby restoring business as soon as possible when upgrading the application program of the DPU.
- an application upgrade method is provided.
- the method is executed by a DPU connected to a host, and the method includes: when the DPU upgrades the first application program among the multiple application programs running on the DPU, read from the shared storage area of the memory in the DPU. Get the pre-upgrade data of the first application program, and restore the service of the first application program based on the pre-upgrade data.
- the shared storage area is used to store business data of multiple applications. The shared memory area cannot be accessed by the DPU's operating system.
- the shared storage area is an area that the operating system of the DPU cannot access, even if the service of the first application program is interrupted when the DPU upgrades the first application program, the operating system of the DPU will not reclaim the shared storage area. Loss of the pre-upgrade data of the first application saved in the zone. After the DPU upgrades the running first application program, it reads the pre-upgrade data of the first application program from the shared storage area, so that the DPU can quickly restore services and improve user experience when the application program is upgraded.
- the method before upgrading the first application program among the multiple application programs running on the DPU, the method further includes: receiving an upgrade request sent by the host, responding to the upgrade request, suspending the business of the first application program, and Store the pre-upgrade data of the first application program into the shared storage area.
- the upgrade request is used to instruct to upgrade the first application program.
- the pre-upgrade data includes the service data of the first application program before the upgrade of the first application program and the state of the hardware running the first application program. Therefore, when the DPU upgrades the first application program, it can quickly read the service data of the first application program and the hardware status of the first application program, quickly restore the service, shorten the time for upgrading the application program, and improve user experience.
- the DPU when the DPU starts the process of the first application program for the first time, it allocates a shared storage area for storing the service data and hardware state of the first application program to the first application program from memory.
- the shared storage area includes multiple sub-areas, and each sub-area in the multiple sub-areas is used to store service data and hardware status of one application program among multiple application programs.
- an application upgrading device in a second aspect, includes various modules for executing the application upgrading method in the first aspect or any possible design of the first aspect.
- a third aspect provides a processor, configured to execute the operation steps of the application upgrading method in the first aspect or any possible design of the first aspect.
- a computing device in a fourth aspect, includes at least one processor and a memory, and the memory is used to store a set of computer instructions; When the device executes the set of computer instructions, it executes the first aspect or the operation steps of the application upgrading method in any possible implementation manner of the first aspect.
- a computer-readable storage medium including: computer software instructions; when the computer software instructions are run in the computing device, the computing device is made to execute the computer program described in the first aspect or any one of the possible implementation manners of the first aspect. Operational steps of the method.
- a computer program product is provided.
- the computing device executes the operation steps of the method described in the first aspect or any possible implementation manner of the first aspect.
- a chip system in a seventh aspect, includes a processor, configured to implement the functions of the processor in the method of the first aspect above.
- the chip system further includes a memory, configured to store program instructions and/or data.
- the system-on-a-chip may consist of chips, or may include chips and other discrete devices.
- FIG. 1 is a schematic diagram of a computer device provided in an embodiment of the present application.
- FIG. 2 is a schematic flowchart of an application upgrading method provided in an embodiment of the present application
- FIG. 3 is a schematic diagram of a shared storage area provided by an embodiment of the present application.
- FIG. 4 is a schematic diagram of an application upgrade scenario provided by the present application.
- FIG. 5 is a schematic diagram of an application upgrading device provided by the present application.
- FIG. 6 is a schematic structural diagram of a computing device provided by the present application.
- An application program is a computer program that implements specific functions to meet user needs.
- the application is upgraded in order to fix the defects of the application, enhance the function of the application and improve the user experience.
- the embodiment of the present application provides an application upgrade method, in particular, a technology for upgrading an application running on a data processing unit (data process unit, DPU).
- DPU data processing unit
- the DPU can be installed on the computer equipment, and the computer equipment instructs the DPU to upgrade.
- the computing device may be a stand-alone server or a computing device in a computing cluster.
- FIG. 1 is a schematic diagram of a computer device provided by an embodiment of the present application.
- a computer device 100 includes a processor (Processor) 110, a memory 120 and a memory controller (Memory Controller) 130.
- processor Processor
- memory controller Memory Controller
- the processor 110 is the computing core and control core of the computer device 100 .
- the processor 110 may be a VLSI.
- An operating system 112 and other software programs are installed in the processor 110, so that the processor 110 can access the memory 120 and various Peripheral Component Interconnect Express (PCIe) devices.
- the processor 110 includes one or more processor cores (core) 111 .
- the processor core 111 in the processor 110 is, for example, a central processing unit (Central Processing unit, CPU) or other specific integrated circuit (Application Specific Integrated Circuit, ASIC).
- CPU central processing unit
- ASIC Application Specific Integrated Circuit
- the processor 110 can also be other general processors, digital signal processing (digital signal processing, DSP), application specific integrated circuit (application specific integrated circuit, ASIC), field programmable gate array (field programmable gate array, FPGA) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
- DSP digital signal processing
- ASIC application specific integrated circuit
- FPGA field programmable gate array
- Programmable logic devices discrete gate or transistor logic devices, discrete hardware components, etc.
- the computer device 100 may also include multiple processors.
- the processor 110 is configured to send an upgrade request to the DPU.
- Processor 110 may also send upgrade requests to other dedicated processors.
- a special-purpose processor is a processor for a specific application or domain. For example, a graphics processing unit (graphics processing unit, GPU) for processing image data or a DSP for processing signals.
- the memory 120 is the main storage of the computer device 100 .
- the memory 120 is generally used to store various running software in the operating system 112 , input and output data, and information exchanged with external storage. In order to improve the access speed of the processor 110, the memory 120 needs to have the advantage of fast access speed.
- a dynamic random access memory (Dynamic Random Access Memory, DRAM) is used as the memory 120 .
- the processor 110 can access the memory 120 at high speed through the memory controller 130 , and perform read and write operations on any storage unit in the memory 120 .
- the memory 120 may also be other random access memories, such as Static Random Access Memory (Static Random Access Memory, SRAM).
- the memory 120 may also be a read-only memory (Read Only Memory, ROM).
- ROM Read Only Memory
- the read-only memory for example, it may be a programmable read-only memory (Programmable Read Only Memory, PROM), an erasable programmable read-only memory (Erasable Programmable Read Only Memory, EPROM) and the like. This embodiment does not limit the quantity and type of the memory 120 .
- the memory 120 can be configured to have a power saving function. The power protection function means that when the system is powered off and then powered on again, the data stored in the memory will not be lost.
- the memory 120 having a power saving function is called a nonvolatile memory.
- the memory controller 130 is a bus circuit controller inside the computer device 100 that controls the memory 120 and is used to manage and plan data transmission from the memory 120 to the processor core 111 . Through the memory controller 130 , data can be exchanged between the memory 120 and the processor core 111 .
- the memory controller 130 may be a separate chip, and is connected to the processor core 111 through a system bus.
- the memory controller 130 may also be integrated into the processor 110 , may also be built into the North Bridge, or may be an independent memory controller chip.
- the embodiment of the present application does not limit the specific location and existence form of the memory controller. In practical applications, the memory controller 130 can control necessary logic to write data into the memory 120 or read data from the memory 120 .
- the memory controller 130 may be a memory controller in processor systems such as general processors, special accelerators, GPUs, FPGAs, and embedded processors.
- the computer device 100 also includes various input/output (Input/Output, I/O) devices 140 .
- the I/O device 140 refers to hardware for data transmission, and may also be understood as a device connected to an I/O interface. Common I/O devices include network cards, printers, keyboards, and mice. All external storage can also be used as I/O devices, such as hard disks, floppy disks, and CDs.
- the processor 110 , the memory 120 , the memory controller 130 and the I/O device 140 are connected through a bus 150 .
- the bus 150 may include a path for transferring information between the aforementioned components (eg, processor 110, memory 120).
- the bus 150 may also include a power bus, a control bus, a status signal bus, and the like. However, for clarity of illustration, the various buses are labeled as bus 150 in the figure.
- the bus 150 can be a PCIe bus, or an extended industry standard architecture (extended industry standard architecture, EISA) bus, a unified bus (unified bus, Ubus or UB), a computer express link (compute express link, CXL), a cache coherent interconnection protocol (cache coherent interconnect for accelerators, CCIX), etc.
- the processor 110 can access these I/O devices 140 through the PCIe bus.
- the processor 110 is connected to the memory 120 through a double data rate (DDR) bus.
- DDR double data rate
- different memories 120 may use different data buses to communicate with the processor 110, therefore, the DDR bus may also be replaced with other types of data buses, and the embodiment of the present application does not limit the bus type.
- the computer device 100 may be called a host.
- FIG. 1 is only a schematic diagram.
- the computer device 100 may also include other components, such as a hard disk, an optical drive, a power supply, a chassis, a heat dissipation system, and other input and output controllers and interfaces, which are not shown in FIG. 1 .
- the embodiment of the present application does not limit the number of processors, memory and memory controllers included in the computer device 100 .
- the computer device 100 also includes a DPU 160 that can be connected to the processor 110 through a PCIe bus.
- the DPU 160 offloads applications related to artificial intelligence and storage run by other chips (such as the processor 110 ) of the computer device 100 , improves the data processing performance of the computer device 100 , and reduces the load of the computer device 100 .
- the DPU 160 may be a small computer device, and may include a processor, memory, and a memory controller, etc., as the computer device 100 .
- the DPU 160 can upgrade the running application program according to the upgrade request sent by the processor 110 in the computer device 100 .
- the DPU 160 includes a processor 161 , a memory 162 and a storage 163 .
- the memory 163 can be a hard disk, and is used to store the application program of the new version of the DPU 160 .
- the processor, memory and memory controller included in the DPU 160 refer to the description of the computer device 100 above.
- the application upgrading method provided in the embodiment of the present application includes the following steps.
- the DPU 160 receives the upgrade request sent by the processor 110.
- DPU160 includes multiple processor cores, different processor cores can run different application programs, DPU160 can run multiple application programs, and upgrade multiple application programs respectively. Upgrading any one of multiple applications may not affect the running of other applications.
- An upgrade request may be used to indicate an upgrade of an application among multiple applications.
- the upgrade request may include the identifier of the application program, so that the DPU 160 can identify the application program that needs to be upgraded according to the identifier of the application program.
- the application program described in the embodiment of the present application may be a hardware driver program, a protocol program, or a service program for realizing user requirements.
- the DPU 160 executes S220.
- the DPU 160 responds to the upgrade request, suspends the service of the first application program, and stores the pre-upgrade data of the first application program into the shared storage area.
- DPU 160 upgrading the first application program may refer to replacing the first application program of the old version with the first application program of the new version. If the DPU 160 runs an old version of the first application program, the DPU 160 upgrades the first application program, which causes interruption of services supported by the first application program. Therefore, DPU 160 responds to the upgrade request, suspends the service of the first application program, and stores the pre-upgrade data of the first application program into the shared storage area.
- An operating system is a computer program that manages computer hardware and software resources, such as memory allocation and memory reclamation.
- the processor 161 starts the process of the first application program for the first time, the processor 161 applies to the operating system of the DPU 160 for the storage area allocated for the first application program. A storage area for the first application program.
- an embodiment of the present application provides a method for a processor to allocate a shared storage area for an application program.
- the processor 161 starts the process of the first application program for the first time, the processor 161 allocates to the first application program a shared storage area for storing service data and hardware status of the first application program. It should be understood that the shared memory area cannot be accessed by the operating system of DPU 160 . Therefore, after the process of the first application program finishes running, the operating system does not reclaim the storage area allocated to the first application program.
- the processor 161 may allocate the shared storage area according to all the applications supported by the DPU 160 and divide the number of sub-areas in the shared storage area.
- the shared storage area includes multiple sub-areas, and each sub-area in the multiple sub-areas is used to store business data of one of the multiple application programs and a hardware state for running the application program.
- the DPU 160 supports running 10 applications
- the shared storage area allocated by the processor 161 includes 10 sub-areas, and one application program uses one sub-area to store the business data of the application program and the hardware status of the running application program.
- the storage resource allocated by the processor 161 to the first application program is a sub-area in the shared storage area.
- the shared storage area may be a continuous physical storage space in the memory, that is, the sub-area used to store the business data and hardware state of the first application program is also a continuous physical storage space.
- the processor 161 will store the service data and hardware state when running the first application program into the shared storage area.
- the pre-upgrade data includes business data and hardware status when the first application program of the old version is running when the first application program is not upgraded, that is, after the processor 161 starts running the first application program, the business data of the first application program of the old version and hardware state are stored in the shared storage area.
- the processor 161 responds to the upgrade request and suspends
- the business of the first application program, and the business data and hardware status of the old version of the first application program that have not been stored in the shared storage area in time are stored in the shared storage area, so that the processor 161 can upgrade the first application program after upgrading the first application program.
- the pre-upgrade data before upgrading the first application program is obtained in time, and the business of the first application program is restored.
- the pre-upgrade data not only includes the business data and hardware status of the old version of the first application when the first application is not upgraded, but also includes the data of the old version of the first application that has not been stored in the shared storage area in time. Business data and hardware status.
- the hardware state comprises the state of the PCIe bus that DPU160 connects computer equipment 100, the hardware channel (such as: DMA engine channel, protocol channel (queue), the state of the state of the internal memory 160 of DPU160 and the internal memory 162 of DPU160 between the PCIe bus and DPU160, network channel) The status of the channel of the external device.
- the hardware channel such as: DMA engine channel, protocol channel (queue), the state of the state of the internal memory 160 of DPU160 and the internal memory 162 of DPU160 between the PCIe bus and DPU160, network channel
- the processor 161 of the DPU 160 can read the new version of the first application program from the memory 163 of the DPU 160 , and load the new version of the first application program into the memory 162 .
- the processor 161 reads the new version of the first application program from the memory 162, runs the new version of the first application program, and replaces the old version of the first application program with the new version of the first application program.
- the processor 161 also sets the running level of the first application program to user mode, thereby avoiding restarting the operating system of the DPU 160. Usually, restarting the operating system is at the minute level, and restarting the application program relative to restarting the operating system, thereby shortening the time for upgrading the first application program. The duration of the program.
- Kernel mode also known as host kernel mode, needs to restrict access between different programs, prevent access to memory data of other programs, or obtain data from peripheral devices
- the processor is divided into two permission levels: user mode and Kernel state.
- user mode When a task or a process executes in kernel code by executing a system call, the process is said to be in kernel mode. At this time, the processor is executing in the kernel code with the highest privilege level.
- the processor In the kernel mode, the processor can access all data in the memory, including peripheral devices, such as memory, network card, etc.
- the DPU 160 reads the pre-upgrade data of the first application program from the shared storage area.
- the pre-upgrade data of the first application After the DPU 160 upgrades the running first application program, it reads the pre-upgrade data of the first application program from the shared storage area.
- the pre-upgrade data may include service data and hardware status when an old version of the first application program is running when the first application program is not upgraded.
- the pre-upgrade data may also include service data and hardware status of the first application program running an old version that has not been stored in the shared storage area in time.
- the Basic Input Output System (BIOS) of DPU160 divides a part of continuous physical memory space as a shared storage area according to the memory size required by the business process.
- BIOS Basic Input Output System
- the first application program is started, an interface for creating a shared storage area is provided, and the identifier of the first application program is bound to the shared storage area.
- an interface for retrieving the shared storage area is provided, and the DPU 160 reads pre-upgrade data from the first sub-area according to the first sub-area in the shared storage area associated with the identifier of the first application program.
- the DPU 160 restores the service of the first application program based on the pre-upgrade data.
- the DPU 160 reads the pre-upgrade data of the first application program from the shared storage area, and based on the pre-upgrade data, the service of the first application program can be quickly restored. Since the upgrade process does not need to restart the computer device 100 or the DPU, the business process of the first application program in the user mode is upgraded within 1 second. Although the business drops or returns to zero within 1 second, the business continues to run after 1 second. Make users unaware of upgrading applications.
- the first application program is used to implement deposit service functions.
- the deposit service is interrupted. If the DPU 160 stores the deposit business data and hardware status in the shared storage area before upgrading the first application program, the DPU 160 reads the deposit business data and hardware status from the shared storage area, and resumes the deposit business based on the deposit business data and hardware status, thereby avoiding deposit The operation request of the business fails, so that the DPU160 can quickly resume the deposit business when upgrading the application program, avoiding bank staff to re-operate the deposit business, and improving user experience.
- the DPU 160 may send an upgrade completion response to the processor 110 to inform the computer device 100 that the first application program is successfully upgraded.
- the DPU deploys the application program that needs to be frequently upgraded to the business process in the user mode, and quickly restarts the upgraded business process without restarting the operating system of the DPU.
- the DPU deploys a shared storage area to provide a dedicated shared storage area for business processes. Business-related hardware status, queue information, and IO status are all stored in the shared storage area. The shared storage area can be restored when the process of the new version of the application is started. The data in the storage area continues to process the business running before the upgrade, so that the host will not be aware of the DPU upgrade operation and improve user experience.
- the process of upgrading the application provided by the embodiment of the present application is illustrated below with an example.
- the DPU is used to implement the control function of the Non-Volatile Memory Express (NVMe) protocol, and provide an interface based on the NVMe protocol to the host connected to the DPU.
- the DPU provides 2*100GE service ports for accessing the storage network.
- the storage network connected to the DPU includes at least one of a storage array and a distributed storage resource pool.
- the DPU integrates the storage space in the storage network, converts it into a namespace of the NVMe protocol, and provides it to the host.
- the host sends service data streams to the DPU, and the DPU sends the service data streams to the storage array or distributed storage resource pool.
- NOF non-
- the main task of quickly restoring the host business is to restore the information of the above three queues and the running I/O information.
- the process of an IO request of the host includes 8 steps in Figure 4, namely 1, the NVMe initiator (initiator, INI) driver writes the IO request of the host into the NVMe queue, and the NVMe queue includes the send queue (send queue, SQ) and completion Queue (complete queue, CQ)).
- the NVMe INI driver processes the IO requests of the NVMe queue;
- the NVMe target (target, TGT) driver initiates a data DMA request for the IO request; 4. DMAs the data from the host's memory to the DPU's memory; 5.
- the NOF INI driver Initiate a NOF IO request; 6, DMA the data from the memory of the DPU to the storage array; 7, write the IO completion message; 8, the host processes the IO completion message.
- steps 2 to 8 are the main processing process of the IO request by the DPU, and the NVMe TGT driver and the NOF INI driver are the key to the startup process of the business process.
- the DPU shuts down the running application of the old version, and restarts the service process using the execution file of the new version of the application.
- the DPU calls the initialization function of the NOF INI driver, and the NOF INI driver checks that the business process is not started for the first time, and executes the recovery process. Specifically, stop the data DMA operation, restore the DMA queue to the initialized state; restore the memory resource and state of the business interface object; restore the memory resource and state of the NOF INI driver connection; restore the queue resource and state of the NOF INI driver connection; The unfinished IO context is cleared, and the NVMe TGT driver re-initiates the IO request.
- the DPU calls the initialization function of the NVMe TGT driver, and the NVMe TGT driver checks that the business process is not started for the first time, and executes the recovery process. Specifically, stop the data DMA operation, restore the used data DMA queue to the initialized state; restore the memory resource and state of the NVMe control object; restore the memory resource and state of the NVMe queue; restore the memory resource and state of the executing IO context , restart the execution of the unfinished IO from step 3 in Figure 4; resume the processing of the NVMe queue, and continue to process the new IO issued by the host.
- the computing device includes corresponding hardware structures and/or software modules for performing various functions.
- the present application can be implemented in the form of hardware or a combination of hardware and computer software with reference to the units and method steps of the examples described in the embodiments disclosed in the present application. Whether a certain function is executed by hardware or computer software drives the hardware depends on the specific application scenario and design constraints of the technical solution.
- FIG. 5 is a schematic structural diagram of a possible application upgrading device provided by this embodiment.
- These application upgrading devices can be used to implement the functions of the processors in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments.
- the application upgrading device may be the data processing unit 160 shown in FIG. 2 , or may be a module (such as a chip) applied to a server.
- the application upgrading apparatus 500 includes a communication module 510 , a management module 520 , an upgrading module 530 , a service module 540 and a storage module 550 .
- the application upgrading apparatus 500 is used to implement the functions of the data processing unit 160 in the method embodiment shown in FIG. 2 above.
- the communication module 510 is configured to receive an upgrade request sent by the computer device 100, where the upgrade request is used to instruct to upgrade the first application program.
- the communication module 510 is configured to execute S210 in FIG. 2 .
- the upgrade module 530 is configured to respond to the upgrade request, suspend the service of the first application program, and store the pre-upgrade data of the first application program into the shared storage area.
- the upgrade module 530 is used to execute S220 in FIG. 2 .
- the upgrade module 530 is used to upgrade the first application program among the multiple application programs running on the DPU.
- the service module 540 is configured to read the pre-upgrade data of the first application program from the shared storage area of the memory in the DPU, and restore the service of the first application program based on the pre-upgrade data.
- the shared storage area is used to store business data of multiple applications.
- the shared memory area cannot be accessed by the DPU's operating system.
- the upgrade module 530 is used to execute S230, S240 and S250 in FIG. 2 .
- the management module 520 is configured to allocate to the first application a shared storage area for storing business data and hardware status of the first application when the process of the first application is started for the first time.
- the storage module 550 may correspond to storing information such as pre-upgrade data in the foregoing method embodiments.
- the application upgrading apparatus 500 may also include a process management module, a protocol module, a driver module, and the like.
- the process management module is used to manage running processes.
- Protocol modules are used to implement protocol conversion.
- the driver module is used to realize the conversion between software and hardware.
- the application upgrading apparatus 500 in the embodiment of the present application may be realized by a DPU.
- the application upgrading device 500 according to the embodiment of the present application may correspond to the implementation of the method described in the embodiment of the present application, and the above-mentioned and other operations and/or functions of each unit in the application upgrading device 500 are to realize the respective methods in FIG. 2 For the sake of brevity, the corresponding process will not be repeated here.
- FIG. 6 is a schematic structural diagram of a computing device 600 provided in this embodiment.
- the computing device 600 includes a processor 610 , a bus 620 , a memory 630 , a memory unit 650 (also referred to as a main memory unit), and a communication interface 640 .
- the processor 610 , the memory 630 , the memory unit 650 and the communication interface 640 are connected through the bus 620 .
- the processor 610 may be a CPU, and the processor 610 may also be other general-purpose processors, DSP, ASIC, FPGA or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components wait.
- a general purpose processor may be a microprocessor or any conventional processor or the like.
- the communication interface 640 is used to realize communication between the computing device 600 and external devices or devices. In this embodiment, the communication interface 640 is used for data interaction with other computing devices.
- Bus 620 may include a path for transferring information between the components described above (eg, processor 610, memory unit 650, and memory 630).
- the bus 620 may also include a power bus, a control bus, a status signal bus, and the like.
- the various buses are labeled as bus 620 in the figure.
- the bus 620 can be a fast peripheral component interconnection standard (Peripheral Component Interconnect Express, PCIe) bus, or an extended industry standard architecture (extended industry standard architecture, EISA) bus, unified bus (unified bus, Ubus or UB), computer fast link ( compute express link (CXL), cache coherent interconnect for accelerators (CCIX), etc.
- PCIe peripheral component interconnection standard
- EISA extended industry standard architecture
- unified bus unified bus, Ubus or UB
- CXL compute express link
- CIX cache coherent interconnect for accelerators
- computing device 600 may include multiple processors.
- the processor may be a multi-CPU processor.
- a processor herein may refer to one or more devices, circuits, and/or computing units for processing data (eg, computer program instructions).
- the processor 610 may call the pre-upgrade data stored in the memory 630, and restore the service of the first application program based on the pre-upgrade data.
- the computing device 600 includes only one processor 610 and one memory 630 as an example.
- the processor 610 and the memory 630 are respectively used to indicate a type of device or device.
- the quantity of each type of device or equipment can be determined according to business needs.
- the memory unit 650 may correspond to a storage medium for storing information such as data before upgrading in the above method embodiments.
- Memory unit 650 can be volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory.
- the non-volatile memory can be read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically programmable Erases programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
- Volatile memory can be random access memory (RAM), which acts as external cache memory.
- RAM random access memory
- SRAM static random access memory
- DRAM dynamic random access memory
- SDRAM synchronous dynamic random access memory
- Double data rate synchronous dynamic random access memory double data date SDRAM, DDR SDRAM
- enhanced SDRAM enhanced synchronous dynamic random access memory
- SLDRAM synchronous connection dynamic random access memory
- direct rambus RAM direct rambus RAM
- the storage 630 is used to store a new version of the first application program, and may be a solid-state hard disk or a mechanical hard disk.
- the aforementioned computing device 600 may be a DPU.
- the computing device 600 according to this embodiment may correspond to the application upgrading apparatus 500 in this embodiment, and may correspond to executing the above-mentioned and other operations and/or other operations of the respective modules in the application upgrading apparatus 500 according to the corresponding subject in FIG. 2 or functions are respectively to realize the corresponding process in FIG. 2 , and for the sake of brevity, details are not repeated here.
- the method steps in this embodiment may be implemented by means of hardware, and may also be implemented by means of a processor executing software instructions.
- Software instructions can be composed of corresponding software modules, and software modules can be stored in random access memory (random access memory, RAM), flash memory, read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM) , PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically erasable programmable read-only memory (electrically EPROM, EEPROM), register, hard disk, mobile hard disk, CD-ROM or known in the art any other form of storage medium.
- An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium.
- the storage medium may also be a component of the processor.
- the processor and storage medium can be located in the ASIC. Additionally, the ASIC may reside in a computing device. Certainly, the processor and the storage medium may also exist in the network device or the terminal device as discrete components.
- the present application also provides a chip system, which includes a processor, configured to realize the function of the data processing unit in the above method.
- the chip system further includes a memory, configured to store program instructions and/or data.
- the system-on-a-chip may consist of chips, or may include chips and other discrete devices.
- all or part of them may be implemented by software, hardware, firmware or any combination thereof.
- software When implemented using software, it may be implemented in whole or in part in the form of a computer program product.
- the computer program product comprises one or more computer programs or instructions. When the computer program or instructions are loaded and executed on the computer, the processes or functions described in the embodiments of the present application are executed in whole or in part.
- the computer may be a general purpose computer, a special purpose computer, a computer network, network equipment, user equipment, or other programmable devices.
- the computer program or instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program or instructions may be downloaded from a website, computer, A server or data center transmits to another website site, computer, server or data center by wired or wireless means.
- the computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or a data center integrating one or more available media. Described usable medium can be magnetic medium, for example, floppy disk, hard disk, magnetic tape; It can also be optical medium, for example, digital video disc (digital video disc, DVD); It can also be semiconductor medium, for example, solid state drive (solid state drive) , SSD).
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Abstract
公开了应用升级方法、装置、计算设备和芯片系统,涉及计算机领域。方法由连接主机的DPU执行,方法包括:DPU升级DPU上运行的多个应用程序中的第一应用程序时,从DPU中内存的共享存储区域读取第一应用程序的升级前数据,基于升级前数据恢复第一应用程序的业务。由于共享存储区域是DPU的操作系统不能访问的区域,即使DPU升级第一应用程序时,第一应用程序的业务中断,DPU的操作系统也不会回收共享存储区域,避免共享存储区域中保存的第一应用程序的升级前数据的丢失。DPU升级运行的第一应用程序后,可以从共享存储区域读取第一应用程序的升级前数据,使DPU可以在升级应用程序时,快速地恢复业务。
Description
本申请要求于2021年10月14日提交国家知识产权局、申请号为202111196030.0、申请名称为“一种DPU卡系统软件的升级方法”的中国专利申请的优先权,以及要求于2021年12月31日提交国家知识产权局、申请号为202111667437.7、申请名称为“应用升级方法、装置、计算设备和芯片系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本申请涉及计算机领域,尤其涉及一种应用升级方法、装置、计算设备和芯片系统。
数据处理单元(data process unit,DPU)是一种具备高性能计算能力的多核处理器。DPU卸载主机中其他芯片(如:中央处理器(central processing unit,CPU)、图形处理器(graphics processing unit,GPU))运行的与人工智能,存储等相关应用,提升主机的数据处理性能,降低主机负载。
目前,通过重启DPU所连接的主机或重启DPU的操作系统使新版本的应用程序生效。由此导致DPU运行应用程序时业务中断,即业务处理失败。DPU的操作系统重启后进行初始化恢复业务。而且操作系统的重启时长通常较长(如:分钟级别),导致DPU的业务中断时长也较长,降低用户体验。因此,如何在升级DPU的应用程序时,尽快恢复业务是目前亟需解决的问题。
发明内容
本申请提供了应用升级方法、装置、计算设备和芯片系统,由此在升级DPU的应用程序时,尽快地恢复业务。
第一方面,提供了一种应用升级方法,方法由连接主机的DPU执行,方法包括:DPU升级DPU上运行的多个应用程序中的第一应用程序时,从DPU中内存的共享存储区域读取第一应用程序的升级前数据,基于升级前数据恢复第一应用程序的业务。共享存储区域用于存储多个应用程序的业务数据。共享存储区域不能被DPU的操作系统访问。
如此,由于共享存储区域是DPU的操作系统不能访问的区域,即使DPU升级第一应用程序时,第一应用程序的业务中断,DPU的操作系统也不会回收共享存储区域,因此,避免共享存储区域中保存的第一应用程序的升级前数据的丢失。DPU升级运行的第一应用程序后,从共享存储区域读取第一应用程序的升级前数据,使DPU可以在升级应用程序时,快速地恢复业务,提升用户体验。
在一种可能的实现方式中,升级DPU上运行的多个应用程序中的第一应用程序之前,方法还包括:接收主机发送的升级请求,响应升级请求,暂停第一应用程序的业 务,并将第一应用程序的升级前数据存入共享存储区域。升级请求用于指示升级第一应用程序。其中,升级前数据包括升级第一应用程序之前第一应用程序的业务数据和运行第一应用程序的硬件状态。从而,以便于DPU升级第一应用程序时可以快速地读取第一应用程序的业务数据和运行第一应用程序的硬件状态,快速地恢复业务,缩短升级应用程序的时长,提升用户体验。
在另一种可能的实现方式中,DPU首次启动第一应用程序的进程时,从内存中为第一应用程序分配用于存储第一应用程序的业务数据和硬件状态的共享存储区域。
在另一种可能的实现方式中,共享存储区域包含多个子区域,多个子区域中的每个子区域用于存储多个应用程序中一个应用程序的业务数据和硬件状态。
第二方面,提供了一种应用升级装置,所述装置包括用于执行第一方面或第一方面任一种可能设计中的应用升级方法的各个模块。
第三方面,提供了一种处理器,所述处理器用于执行第一方面或第一方面任一种可能设计中的应用升级方法的操作步骤。
第四方面,提供一种计算设备,该计算设备包括至少一个处理器和存储器,存储器用于存储一组计算机指令;当处理器作为第一方面或第一方面任一种可能实现方式中的执行设备执行所述一组计算机指令时,执行第一方面或第一方面任一种可能实现方式中的应用升级方法的操作步骤。
第五方面,提供一种计算机可读存储介质,包括:计算机软件指令;当计算机软件指令在计算设备中运行时,使得计算设备执行如第一方面或第一方面任意一种可能的实现方式中所述方法的操作步骤。
第六方面,提供一种计算机程序产品,当计算机程序产品在计算机上运行时,使得计算设备执行如第一方面或第一方面任意一种可能的实现方式中所述方法的操作步骤。
第七方面,提供一种芯片系统,该芯片系统包括处理器,用于实现上述第一方面的方法中处理器的功能。在一种可能的设计中,所述芯片系统还包括存储器,用于保存程序指令和/或数据。该芯片系统,可以由芯片构成,也可以包括芯片和其他分立器件。
本申请在上述各方面提供的实现方式的基础上,还可以进行进一步组合以提供更多实现方式。
图1为本申请实施例提供的一种计算机设备的示意图;
图2为本申请实施例提供的一种应用升级方法的流程示意图;
图3为本申请实施例提供的一种共享存储区域的示意图;
图4为本申请提供的一种应用升级场景的示意图;
图5为本申请提供的一种应用升级装置的示意图;
图6为本申请提供的一种计算设备的结构示意图。
应用程序是一种满足用户需求实现特定功能的计算机程序。为了修复应用程序的缺陷、增强应用程序的功能和提升用户体验,对应用程序进行升级。
本申请实施例提供一种应用升级方法,尤其是提供一种数据处理单元(data process unit,DPU)上运行的应用程序升级的技术。通过将应用程序与操作系统剥离,升级应用程序时避免重启DPU的操作系统,从而缩短升级应用程序的时长,并且在升级应用程序前,将应用程序的升级前数据存储到DPU的操作系统不能访问的存储区域,避免存储区域中保存的应用程序的业务数据丢失,使DPU可以在升级应用程序时,快速地恢复业务,提升用户体验。
DPU可以安装在计算机设备上,由计算机设备指示DPU进行升级。计算机设备可以是独立的服务器或者计算集群中的计算设备。下面结合附图对本申请实施例提供应用升级的实施方式进行详细说明。
图1为本申请实施例提供的一种计算机设备的示意图。如图1所示,计算机设备100包括处理器(Processor)110、内存120和内存控制器(Memory Controller)130。
处理器110是计算机设备100的运算核心和控制核心。处理器110可以是一块超大规模的集成电路。处理器110中安装有操作系统112和其他软件程序,使得处理器110实现对内存120及各种快捷外围部件互连标准(Peripheral Component Interconnect Express,PCIe)设备的访问。处理器110包括一个或多个处理器核(core)111。处理器110中的处理器核111例如是中央处理器(Central Processing unit,CPU)或其他特定集成电路(Application Specific Integrated Circuit,ASIC)。处理器110还可以是其他通用处理器、数字信号处理器(digital signal processing,DSP)、专用集成电路(application specific integrated circuit,ASIC)、现场可编程门阵列(field programmable gate array,FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。实际应用中,计算机设备100也可以包括多个处理器。
本申请实施例中,处理器110用于向DPU发送升级请求。处理器110还可以向其他专用处理器发送升级请求。专用处理器是针对特定应用或者领域的处理器。例如用于处理图像数据的图像处理单元(graphics processing unit,GPU)或用于处理信号的DSP。
内存120是计算机设备100的主存。内存120通常用来存放操作系统112中各种正在运行的软件、输入和输出数据以及与外存交换的信息等。为了提高处理器110的访问速度,内存120需要具备访问速度快的优点。在计算机系统架构中,采用动态随机存取存储器(Dynamic Random Access Memory,DRAM)作为内存120。处理器110能够通过内存控制器130高速访问内存120,对内存120中的任意一个存储单元进行读操作和写操作。除了DRAM之外,内存120还可以是其他随机存取存储器,例如静态随机存取存储器(Static Random Access Memory,SRAM)等。另外,内存120也可以是只读存储器(Read Only Memory,ROM)。而对于只读存储器,举例来说,可以是可编程只读存储器(Programmable Read Only Memory,PROM)、可抹除可编程只读存储器(Erasable Programmable Read Only Memory,EPROM)等。本实施例不对内存120的数量和类型进行限定。此外,可对内存120进行配置使其具有保电功能。保电功能是指系统发生掉电又重新上电时,存储器中存储的数据也不会丢失。具有保电功能的内存120被称为非易失性存储器。
内存控制器130是计算机设备100内部控制内存120并用于管理与规划从内存120 到处理器核111间的数据传输的总线电路控制器。通过内存控制器130,内存120与处理器核111之间可以交换数据。内存控制器130可以是一个单独的芯片,并通过系统总线与处理器核111连接。内存控制器130也可以被集成到处理器110中,也可以被内置于北桥中,还可以是一块独立的内存控制器芯片,本申请实施例不对内存控制器的具体位置和存在形式进行限定。实际应用中,内存控制器130可以控制必要的逻辑以将数据写入内存120或从内存120中读取数据。内存控制器130可以是通用处理器、专用加速器、GPU、FPGA、嵌入式处理器等处理器系统中的内存控制器。
计算机设备100还包括各种输入/输出(Input/Output,I/O)设备140。I/O设备140是指进行数据传输的硬件,也可以理解为与I/O接口对接的设备。常见的I/O设备有网卡、打印机、键盘、鼠标等。所有的外存也可以作为I/O设备,如硬盘、软盘、光盘等。
处理器110、内存120、内存控制器130和I/O设备140通过总线150相连。总线150可以包括一通路,用于在上述组件(如处理器110、内存120)之间传送信息。总线150除包括数据总线之外,还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见,在图中将各种总线都标为总线150。总线150可以是PCIe总线,或扩展工业标准结构(extended industry standard architecture,EISA)总线、统一总线(unified bus,Ubus或UB)、计算机快速链接(compute express link,CXL)、缓存一致互联协议(cache coherent interconnect for accelerators,CCIX)等。例如,处理器110可以通过PCIe总线访问这些I/O设备140。处理器110通过双倍速率(double data rate,DDR)总线和内存120相连。这里,不同的内存120可能采用不同的数据总线与处理器110通信,因此,DDR总线也可以替换为其他类型的数据总线,本申请实施例不对总线类型进行限定。
需要说明的是,计算机设备100可以称为主机。图1只是示意图,该计算机设备100中还可以包括其它部件,如还可以包括硬盘、光驱、电源、机箱、散热系统以及其他输入输出控制器和接口,在图1中未画出。本申请的实施例对该计算机设备100中包括的处理器、内存和内存控制器的数量不做限定。
计算机设备100还包括DPU160,可以通过PCIe总线与处理器110连接。DPU160卸载计算机设备100其他芯片(如:处理器110)运行的与人工智能,存储等相关应用,提升计算机设备100的数据处理性能,降低计算机设备100的负载。
DPU160可以是一个小型计算机设备,可以如计算机设备100包含处理器、内存和内存控制器等。DPU160可以根据计算机设备100中处理器110发送的升级请求对运行的应用程序进行升级。
接下来,结合图2对DPU运行的应用程序进行升级的过程进行说明。如图2所示,假设DPU160包括处理器161、内存162和存储器163。存储器163可以是硬盘,用于存储DPU160新版本的应用程序。关于DPU160包含的处理器、内存和内存控制器的详细解释可以参考上计算机设备100的阐述。本申请实施例提供的应用升级方法包括以下步骤。
S210、DPU160接收处理器110发送的升级请求。
DPU160包括多个处理器核,不同的处理器核可以运行不同应用程序,DPU160可 以运行多个应用程序,对多个应用程序分别进行升级。对多个应用程序中任意一个应用程序进行升级,可以不影响运行其他应用程序。升级请求可以用于指示升级多个应用程序中的一个应用程序。升级请求可以包含应用程序的标识,以便于DPU160根据应用程序的标识识别需要升级的应用程序。本申请实施例所述的应用程序可以是硬件驱动程序、协议程序或用于实现用户需求的业务程序等。
假设升级请求可以用于指示升级多个应用程序中的第一应用程序,DPU160执行S220。
S220、DPU160响应升级请求,暂停第一应用程序的业务,并将第一应用程序的升级前数据存入共享存储区域。
DPU160升级第一应用程序可以是指用新版本的第一应用程序替换旧版本的第一应用程序。若DPU160运行旧版本的第一应用程序时,DPU160升级第一应用程序,导致第一应用程序支持的业务中断。因此,DPU160响应升级请求,暂停第一应用程序的业务,并将第一应用程序的升级前数据存入共享存储区域。
操作系统是管理计算机硬件与软件资源的计算机程序,例如内存分配和内存回收。若处理器161首次启动第一应用程序的进程时,处理器161向DPU160的操作系统申请为第一应用程序分配的存储区域,在第一应用程序的进程结束运行后,操作系统需要回收分配给第一应用程序的存储区域。
为了避免升级第一应用程序时,第一应用程序的业务数据丢失,本申请实施例提供一种处理器为应用程序分配共享存储区域的方法。处理器161首次启动第一应用程序的进程时,处理器161为第一应用程序分配用于存储第一应用程序的业务数据和硬件状态的共享存储区域。应理解,共享存储区域不能被DPU160的操作系统访问。因此,在第一应用程序的进程结束运行后,操作系统不回收分配给第一应用程序的存储区域。
在一些实施例中,处理器161可以根据DPU160支持运行的所有应用程序分配共享存储区域,以及划分共享存储区域中子区域的数量。共享存储区域包含多个子区域,多个子区域中的每个子区域用于存储多个应用程序中一个应用程序的业务数据和运行应用程序的硬件状态。例如,DPU160支持运行的10个应用程序,处理器161分配的共享存储区域包括10个子区域,一个应用程序使用一个子区域来存储应用程序的业务数据和运行应用程序的硬件状态。示例地,如图3所示,处理器161为第一应用程序分配的存储资源是从共享存储区域中的一个子区域。
需要说明的是,共享存储区域可以内存中连续的物理存储空间,即用于存储第一应用程序的业务数据和硬件状态的子区域也是连续的物理存储空间。
应理解,处理器161无论运行旧版本的第一应用程序还是运行新版本的第一应用程序,处理器161均将运行第一应用程序时的业务数据和硬件状态存入共享存储区域。
升级前数据包括未执行升级第一应用程序时运行旧版本的第一应用程序时业务数据和硬件状态,即处理器161启动运行第一应用程序后,将旧版本的第一应用程序时业务数据和硬件状态存入共享存储区域。在一些实施例中,如果在升级第一应用程序之前,存在未及时存入共享存储区域的运行旧版本的第一应用程序的业务数据和硬件状态,此时,处理器161响应升级请求,暂停第一应用程序的业务,并将未及时存入 共享存储区域的旧版本的第一应用程序的业务数据和硬件状态存入共享存储区域,以便于处理器161在升级第一应用程序后,能够及时获取升级第一应用程序前的升级前数据,恢复第一应用程序的业务。因此,升级前数据不仅包括未执行升级第一应用程序时运行旧版本的第一应用程序时业务数据和硬件状态,还可以包括未及时存入共享存储区域的运行旧版本的第一应用程序的业务数据和硬件状态。
硬件状态包括DPU160连接计算机设备100的PCIe总线的状态、PCIe总线与DPU160的内存162之间的硬件通道(如:DMA引擎通道,协议通道(队列),网络通道)的状态和DPU160的内存160与外部设备的通道的状态。
S230、DPU160升级运行的第一应用程序。
DPU160的处理器161可以从DPU160的存储器163中读取新版本的第一应用程序,将新版本的第一应用程序加载到内存162。处理器161从内存162读取新版本的第一应用程序,运行新版本的第一应用程序,用新版本的第一应用程序替换旧版本的第一应用程序。处理器161还将第一应用程序的运行级别设置为用户态,从而,避免重启DPU160的操作系统,通常重启操作系统在分钟级别,相对于重启操作系统来重启应用程序,从而缩短升级第一应用程序的时长。
内核态,也可以称为主机内核态,由于需要限制不同的程序之间的访问能力,防止获取其他程序的内存数据,或者获取外围设备的数据,处理器划分出两个权限等级:用户态和内核态。当一个任务或者一个进程执行系统调用而在内核代码中执行时,该进程被称为处于内核态。此时处理器处于特权级最高的内核代码中执行。在内核态,处理器可以访问内存的所有数据,包括外围设备,例如内存,网卡等。
S240、DPU160从共享存储区域读取第一应用程序的升级前数据。
由于共享存储区域是DPU160的操作系统不能访问的区域,即使DPU160升级第一应用程序时,第一应用程序的业务中断,DPU160的操作系统也不会回收共享存储区域,因此,共享存储区域依然保存第一应用程序的升级前数据。DPU160升级运行的第一应用程序后,从共享存储区域读取第一应用程序的升级前数据。升级前数据可以包括未执行升级第一应用程序时运行旧版本的第一应用程序时业务数据和硬件状态。可选地,升级前数据还可以包括未及时存入共享存储区域的运行旧版本的第一应用程序的业务数据和硬件状态。
例如,DPU160的基本输入输出系统(Basic Input Output System,BIOS)根据业务进程需要的内存大小,划分一部分连续的物理内存空间作为共享存储区域。在启动第一应用程序时,提供创建共享存储区域的接口,将第一应用程序的标识与共享存储区域绑定。在重启第一应用程序时,提供共享存储区域找回的接口,DPU160根据与第一应用程序的标识关联的共享存储区域中第一子区域,从第一子区域读取升级前数据。
S250、DPU160基于升级前数据恢复第一应用程序的业务。
DPU160从共享存储区域读取第一应用程序的升级前数据,基于升级前数据可以快速地恢复第一应用程序的业务。由于升级的过程无需重启计算机设备100或DPU,使得用户态的第一应用程序的业务进程在1秒内完成升级,虽然在1秒内出现业务跌落或归零,但是1秒后业务继续运行,使用户对升级应用程序无感知。
例如,在银行业务系统中,第一应用程序用于实现存款业务功能。DPU160升级第一应用程序时,造成存款业务中断。若DPU160升级第一应用程序前,将存款业务数据和硬件状态存储到共享存储区域,DPU160从共享存储区域读取存款业务数据和硬件状态,基于存款业务数据和硬件状态恢复存款业务,从而避免存款业务的操作请求失败,使DPU160可以在升级应用程序时,快速地恢复存款业务,避免银行工作人员重新操作存款业务,提升用户体验。
可选地,DPU160对第一应用程序进行升级成功后,可以向处理器110发送升级完成响应,告知计算机设备100对第一应用程序进行升级成功。
由此可见,DPU将需要频繁升级的应用程序部署到用户态的业务进程,在不重启DPU的操作系统的情况下,快速重新拉起升级后的业务进程。另外,DPU部署共享存储区域,为业务进程提供专用的共享存储区域,与业务相关的硬件状态、队列信息、IO状态都保存在共享存储区域,新版本的应用程序的进程拉起时可以恢复共享存储区域中的数据,继续处理升级前运行的业务,使主机不会感知DPU的升级操作,提升用户体验。
下面对本申请实施例提供的应用升级的过程进行举例说明。假设DPU用于实现非易失性内存扩展(Non Volatile Memory Express,NVMe)协议的控制功能,向DPU连接的主机提供基于NVMe协议的接口。DPU提供2*100GE的业务接口,用于接入存储网络。DPU连接的存储网络包括存储阵列和分布式存储资源池中至少一种。DPU对存储网络中的存储空间进行整合,转换为NVMe协议的命名(namespace)空间,提供给主机使用。主机向DPU发送业务数据流,DPU将业务数据流发送给存储阵列或者分布式存储资源池。本实施例中主要数据通信通道有3种:主机和DPU之间的NVMe队列、DPU和存储阵列之间的基于光纤的非易失性内存(NVMe over fabrics,NOF)队列和数据的DMA队列。
在DPU升级应用程序,新版本的应用程序的业务进程重启时,快速恢复主机业务的主要工作就是恢复上述3种队列的信息和运行的I/O信息。
主机的一个IO请求的流程包含图4中8个步骤,即1,NVMe启动器(initiator,INI)驱动将主机的IO请求写入NVMe队列,NVMe队列包括发送队列(send queue,SQ)和完成队列(complete queue,CQ))。2,NVMe INI驱动处理NVMe队列的IO请求;3,NVMe目标器(target,TGT)驱动发起IO请求的数据DMA请求;4,将数据DMA从主机的内存到DPU的内存;5,NOF INI驱动发起NOF IO请求;6,将数据DMA从DPU的内存到存储阵列;7,写入IO完成消息;8,主机处理IO完成消息。其中,第2步至第8步是DPU对IO请求的主要处理过程,NVMe TGT驱动和NOF INI驱动是业务进程启动过程中的关键。
DPU将运行的旧版本的应用程序关闭,使用新版本的应用程序的执行文件重启业务进程。DPU调用NOF INI驱动的初始化函数,NOF INI驱动检查业务进程不是首次启动,执行恢复的流程。具体地,停止数据DMA操作,将DMA队列还原到初始化的状态;恢复业务接口对象的内存资源和状态;恢复NOF INI驱动连接的内存资源和状态;恢复NOF INI驱动连接的队列资源和状态;将未完成的IO上下文清除,由NVMe TGT驱动重新发起IO请求。DPU调用NVMe TGT驱动的初始化函数,NVMe TGT 驱动检查业务进程不是首次启动,执行恢复的流程。具体地,停止数据DMA操作,将使用的数据DMA队列还原到初始化的状态;恢复NVMe控制对象的内存资源和状态;恢复NVMe队列的内存资源和状态;恢复正在执行的IO上下文的内存资源和状态,将未完成的IO从图4中第3步重新开始执行;恢复NVMe队列的处理,继续处理主机下发的新IO。
可以理解的是,为了实现上述实施例中的功能,计算设备包括了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到,结合本申请中所公开的实施例描述的各示例的单元及方法步骤,本申请能够以硬件或硬件和计算机软件相结合的形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行,取决于技术方案的特定应用场景和设计约束条件。
上文中结合图1至图4,详细描述了根据本实施例所提供的应用升级方法,下面将结合图5,描述根据本实施例所提供的应用升级装置。
图5为本实施例提供的可能的应用升级装置的结构示意图。这些应用升级装置可以用于实现上述方法实施例中处理器的功能,因此也能实现上述方法实施例所具备的有益效果。在本实施例中,该应用升级装置可以是如图2所示的数据处理单元160,还可以是应用于服务器的模块(如芯片)。
如图5所示,应用升级装置500包括通信模块510、管理模块520、升级模块530、业务模块540和存储模块550。应用升级装置500用于实现上述图2中所示的方法实施例中数据处理单元160的功能。
通信模块510用于接收计算机设备100发送的升级请求,升级请求用于指示升级第一应用程序。例如,通信模块510用于执行图2中S210。
升级模块530用于响应升级请求,暂停第一应用程序的业务,并将第一应用程序的升级前数据存入共享存储区域。例如,升级模块530用于执行图2中S220。
升级模块530用于升级DPU上运行的多个应用程序中的第一应用程序。
业务模块540用于从DPU中内存的共享存储区域读取第一应用程序的升级前数据,基于升级前数据恢复第一应用程序的业务。共享存储区域用于存储多个应用程序的业务数据。共享存储区域不能被DPU的操作系统访问。例如,升级模块530用于执行图2中S230、S240和S250。
管理模块520用于在首次启动第一应用程序的进程时,为第一应用程序分配用于存储第一应用程序的业务数据和硬件状态的共享存储区域。
存储模块550可以对应上述方法实施例中用于存储升级前数据等信息。
应用升级装置500还可以包括进程管理模块、协议模块和驱动模块等。进程管理模块用于管理运行的进程。协议模块用于实现协议转换。驱动模块用于实现软件与硬件的转换。
应理解的是,本申请实施例的应用升级装置500可以通过DPU实现。根据本申请实施例的应用升级装置500可对应于执行本申请实施例中描述的方法,并且应用升级装置500中的各个单元的上述和其它操作和/或功能分别为了实现图2中的各个方法的相应流程,为了简洁,在此不再赘述。
图6为本实施例提供的一种计算设备600的结构示意图。如图所示,计算设备600 包括处理器610、总线620、存储器630、内存单元650(也可以称为主存(main memory)单元)和通信接口640。处理器610、存储器630、内存单元650和通信接口640通过总线620相连。
应理解,在本实施例中,处理器610可以是CPU,该处理器610还可以是其他通用处理器、DSP、ASIC、FPGA或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者是任何常规的处理器等。
通信接口640用于实现计算设备600与外部设备或器件的通信。在本实施例中,通信接口640用于与其他计算设备进行数据交互。
总线620可以包括一通路,用于在上述组件(如处理器610、内存单元650和存储器630)之间传送信息。总线620除包括数据总线之外,还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见,在图中将各种总线都标为总线620。总线620可以是快捷外围部件互连标准(Peripheral Component Interconnect Express,PCIe)总线,或扩展工业标准结构(extended industry standard architecture,EISA)总线、统一总线(unified bus,Ubus或UB)、计算机快速链接(compute express link,CXL)、缓存一致互联协议(cache coherent interconnect for accelerators,CCIX)等。
作为一个示例,计算设备600可以包括多个处理器。处理器可以是一个多核(multi-CPU)处理器。这里的处理器可以指一个或多个设备、电路、和/或用于处理数据(例如计算机程序指令)的计算单元。处理器610可以调用存储器630存储的升级前数据,基于升级前数据恢复第一应用程序的业务。
值得说明的是,图6中仅以计算设备600包括1个处理器610和1个存储器630为例,此处,处理器610和存储器630分别用于指示一类器件或设备,具体实施例中,可以根据业务需求确定每种类型的器件或设备的数量。
内存单元650可以对应上述方法实施例中用于存储升级前数据等信息的存储介质。内存单元650可以是易失性存储器或非易失性存储器,或可包括易失性和非易失性存储器两者。其中,非易失性存储器可以是只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory,RAM),其用作外部高速缓存。通过示例性但不是限制性说明,许多形式的RAM可用,例如静态随机存取存储器(static RAM,SRAM)、动态随机存取存储器(DRAM)、同步动态随机存取存储器(synchronous DRAM,SDRAM)、双倍数据速率同步动态随机存取存储器(double data date SDRAM,DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM,ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM,SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM,DR RAM)。
存储器630用于存储新版本的第一应用程序,可以是固态硬盘或机械硬盘。
应理解,上述计算设备600可以是一个DPU。根据本实施例的计算设备600可对应于本实施例中的应用升级装置500,并可以对应于执行根据图2中的相应主体,并且应用升级装置500中的各个模块的上述和其它操作和/或功能分别为了实现图2中的相应流程,为了简洁,在此不再赘述。
本实施例中的方法步骤可以通过硬件的方式来实现,也可以由处理器执行软件指令的方式来实现。软件指令可以由相应的软件模块组成,软件模块可以被存放于随机存取存储器(random access memory,RAM)、闪存、只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)、寄存器、硬盘、移动硬盘、CD-ROM或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器,从而使处理器能够从该存储介质读取信息,且可向该存储介质写入信息。当然,存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另外,该ASIC可以位于计算设备中。当然,处理器和存储介质也可以作为分立组件存在于网络设备或终端设备中。
本申请还提供一种芯片系统,该芯片系统包括处理器,用于实现上述方法中数据处理单元的功能。在一种可能的设计中,所述芯片系统还包括存储器,用于保存程序指令和/或数据。该芯片系统,可以由芯片构成,也可以包括芯片和其他分立器件。
在上述实施例中,可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时,可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机程序或指令。在计算机上加载和执行所述计算机程序或指令时,全部或部分地执行本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、网络设备、用户设备或者其它可编程装置。所述计算机程序或指令可以存储在计算机可读存储介质中,或者从一个计算机可读存储介质向另一个计算机可读存储介质传输,例如,所述计算机程序或指令可以从一个网站站点、计算机、服务器或数据中心通过有线或无线方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是集成一个或多个可用介质的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质,例如,软盘、硬盘、磁带;也可以是光介质,例如,数字视频光盘(digital video disc,DVD);还可以是半导体介质,例如,固态硬盘(solid state drive,SSD)。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到各种等效的修改或替换,这些修改或替换都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。
Claims (11)
- 一种应用升级方法,其特征在于,所述方法由连接主机的数据处理单元DPU执行,所述方法包括:升级所述DPU上运行的多个应用程序中的第一应用程序;从所述DPU中内存的共享存储区域读取所述第一应用程序的升级前数据,所述共享存储区域用于存储所述多个应用程序的业务数据,所述共享存储区域不能被所述DPU的操作系统访问;基于所述升级前数据恢复所述第一应用程序的业务。
- 根据权利要求1所述的方法,其特征在于,升级所述DPU上运行的多个应用程序中的第一应用程序之前,所述方法还包括:接收所述主机发送的升级请求,所述升级请求用于指示升级所述第一应用程序;响应所述升级请求,暂停所述第一应用程序的业务,并将所述第一应用程序的升级前数据存入所述共享存储区域。
- 根据权利要求1或2所述的方法,其特征在于,所述升级前数据包括升级所述第一应用程序之前所述第一应用程序的业务数据和运行所述第一应用程序的硬件状态。
- 根据权利要求1-3中任一项所述的方法,其特征在于,所述共享存储区域包含多个子区域,所述多个子区域中的每个子区域用于存储所述多个应用程序中一个应用程序的业务数据和硬件状态。
- 一种应用升级装置,其特征在于,包括:升级模块,用于升级所述DPU上运行的多个应用程序中的第一应用程序;业务模块,用于从所述DPU中内存的共享存储区域读取所述第一应用程序的升级前数据,所述共享存储区域用于存储所述多个应用程序的业务数据,所述共享存储区域不能被所述DPU的操作系统访问;所述业务模块,还用于基于所述升级前数据恢复所述第一应用程序的业务。
- 根据权利要求5所述的装置,其特征在于,所述装置还包括通信模块;所述通信模块,用于接收主机发送的升级请求,所述升级请求用于指示升级所述第一应用程序;升级模块,用于响应所述升级请求,暂停所述第一应用程序的业务,并将所述第一应用程序的升级前数据存入所述共享存储区域。
- 根据权利要求5或6所述的装置,其特征在于,所述升级前数据包括升级所述第一应用程序之前所述第一应用程序的业务数据和运行所述第一应用程序的硬件状态。
- 根据权利要求5-7中任一项所述的装置,其特征在于,所述共享存储区域包含多个子区域,所述多个子区域中的每个子区域用于存储所述多个应用程序中一个应用程序的业务数据和硬件状态。
- 一种处理器,其特征在于,所述处理器用于执行上述权利要求1-4中任一项所述的方法的操作步骤。
- 一种计算设备,其特征在于,包括存储器和处理器,所述存储器用于存储一组计算机指令;当所述处理器执行所述一组计算机指令时,执行上述权利要求1-4中任一项所述的方法的操作步骤。
- 一种芯片系统,其特征在于,所述芯片系统包括存储器和至少一个处理器,所述存储器用于存储一组计算机指令;当所述处理器执行所述一组计算机指令时,执行上述权利要求1-4中任一项所述的方法的操作步骤。
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