WO2023044800A1

WO2023044800A1 - Methods, devices, and computer readable medium for communication

Info

Publication number: WO2023044800A1
Application number: PCT/CN2021/120449
Authority: WO
Inventors: Zhaobang MIAO; Lin Liang; Gang Wang
Original assignee: Nec Corporation
Priority date: 2021-09-24
Filing date: 2021-09-24
Publication date: 2023-03-30

Abstract

A terminal device (110-1) transmits a sidelink synchronization signal on an unlicensed band to another terminal device (110-2). The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH), a second set of symbols for a first sequence for a sidelink primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS. The second set of symbols and the third set of symbols further comprise the PSBCH. In this way, the occupied channel bandwidth requirement can be fulfilled.

Description

METHODS, DEVICES, AND COMPUTER READABLE MEDIUM FOR COMMUNICATION

TECHNICAL FIELD

Embodiments of the present disclosure generally relate to the field of telecommunication, and in particular, to methods, devices, and computer readable medium for communication.

BACKGROUND

Several technologies have been proposed to improve communication performances. For example, device to device (D2D) /sidelink communication has been proposed. Sidelink is the special kind of communication mechanism between device and device without going through eNB. It means that it requires new physical layer design.

SUMMARY

In general, example embodiments of the present disclosure provide a solution for communication.

In a first aspect, there is provided a method for communication. The communication method comprises: transmitting, at a first terminal device and to a second terminal device, a sidelink synchronization signal on an unlicensed band, and wherein the sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a sidelink primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS, and wherein the second set of symbols and the third set of symbols further comprise the PSBCH or a reference symbol.

In a second aspect, there is provided a method for communication. The communication method comprises: determining, at a first terminal device, a number of subcarriers for transmitting a sidelink synchronization signal, wherein the number of subcarriers meets an occupied channel bandwidth requirement; generating, at the first terminal device, a first sequence for a primary synchronization signal, S-PSS, based on a M-sequence; generating, at the first terminal device, a second sequence for a secondary synchronization signal, S-SSS, based on a gold sequence, wherein both the M-sequence and the gold sequence have a first length, and wherein the first length is larger than the number of subcarriers or a difference between the first length and the number of subcarriers is within a range; and transmitting, to a second terminal device, the sidelink synchronization signal on an unlicensed band, and wherein the sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a secondary synchronization signal, S-SSS.

In a third aspect, there is provided a terminal device. The terminal device comprises a processing unit; and a memory coupled to the processing unit and storing instructions thereon, the instructions, when executed by the processing unit, causing the terminal device to perform acts comprising: transmitting, at a first terminal device and to a second terminal device, a sidelink synchronization signal on an unlicensed band, and wherein the sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a sidelink primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS, and wherein the second set of symbols and the third set of symbols further comprise the PSBCH or a reference symbol.

In a fourth aspect, there is provided a terminal device. The terminal device comprises a processing unit; and a memory coupled to the processing unit and storing instructions thereon, the instructions, when executed by the processing unit, causing the terminal device to perform acts comprising: determining, at a first terminal device, a number of subcarriers for transmitting a sidelink synchronization signal, wherein the number of subcarriers meets an occupied channel bandwidth requirement; generating, at the first terminal device, a first sequence for a primary synchronization signal, S-PSS, based on a M-sequence; generating, at the first terminal device, a second sequence for a secondary synchronization signal, S-SSS, based on a gold sequence, wherein both the M-sequence and the gold sequence have a first length, and wherein the first length is larger than the number of subcarriers or a difference between the first length and the number of subcarriers is within a range; and transmitting, to a second terminal device, the sidelink synchronization signal on an unlicensed band, and wherein the sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a secondary synchronization signal, S-SSS.

In a fifth aspect, there is provided a computer readable medium having instructions stored thereon, the instructions, when executed on at least one processor, causing the at least one processor to carry out the method according to any one of the first aspect or second aspect.

Other features of the present disclosure will become easily comprehensible through the following description.

BRIEF DESCRIPTION OF THE DRAWINGS

Through the more detailed description of some example embodiments of the present disclosure in the accompanying drawings, the above and other objects, features and advantages of the present disclosure will become more apparent, wherein:

Fig. 1 is a schematic diagram of a communication environment in which embodiments of the present disclosure can be implemented;

Fig. 2 illustrates a signaling flow for communications according to some embodiments of the present disclosure;

Fig. 3 illustrates a schematic diagram of a structure of a sidelink synchronization signal block (S-SSB) according to some embodiments of the present disclosure;

Fig. 4 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 5 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 6 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 7 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 8 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 9 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 10 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 11 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 12 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 13 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 14 illustrates a signaling flow for communications according to some embodiments of the present disclosure;

Fig. 15 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 16 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 17 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 18 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 19 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 20 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 21 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 22 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 23 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 24 illustrates a schematic diagram of a structure of a S-SSB according to some embodiments of the present disclosure;

Fig. 25 is a flowchart of an example method in accordance with an embodiment of the present disclosure;

Fig. 26 is a flowchart of an example method in accordance with an embodiment of the present disclosure; and

Fig. 27 is a simplified block diagram of a device that is suitable for implementing embodiments of the present disclosure.

Throughout the drawings, the same or similar reference numerals represent the same or similar element.

DETAILED DESCRIPTION

Principle of the present disclosure will now be described with reference to some example embodiments. It is to be understood that these embodiments are described only for the purpose of illustration and help those skilled in the art to understand and implement the present disclosure, without suggesting any limitations as to the scope of the disclosure. The disclosure described herein can be implemented in various manners other than the ones described below.

In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skills in the art to which this disclosure belongs.

As used herein, the term ‘terminal device’ refers to any device having wireless or wired communication capabilities. Examples of the terminal device include, but not limited to, user equipment (UE) , personal computers, desktops, mobile phones, cellular phones, smart phones, personal digital assistants (PDAs) , portable computers, tablets, wearable devices, internet of things (IoT) devices, Ultra-reliable and Low Latency Communications (URLLC) devices, Internet of Everything (IoE) devices, machine type communication (MTC) devices, device on vehicle for V2X communication where X means pedestrian, vehicle, or infrastructure/network, devices for Integrated Access and Backhaul (IAB) , Space borne vehicles or Air borne vehicles in Non-terrestrial networks (NTN) including Satellites and High Altitude Platforms (HAPs) encompassing Unmanned Aircraft Systems (UAS) , eXtended Reality (XR) devices including different types of realities such as Augmented Reality (AR) , Mixed Reality (MR) and Virtual Reality (VR) , the unmanned aerial vehicle (UAV) commonly known as a drone which is an aircraft without any human pilot, devices on high speed train (HST) , or image capture devices such as digital cameras, sensors, gaming devices, music storage and playback appliances, or Internet appliances enabling wireless or wired Internet access and browsing and the like. The ‘terminal device’ can further has ‘multicast/broadcast’ feature, to support public safety and mission critical, V2X applications, transparent IPv4/IPv6 multicast delivery, IPTV, smart TV, radio services, software delivery over wireless, group communications and IoT applications. It may also incorporate one or multiple Subscriber Identity Module (SIM) as known as Multi-SIM. The term “terminal device” can be used interchangeably with a UE, a mobile station, a subscriber station, a mobile terminal, a user terminal or a wireless device. In the following description, the terms “terminal device” , “communication device” , “terminal” , “user equipment” and “UE” may be used interchangeably.

The terminal device or the network device may have Artificial intelligence (AI) or Machine learning capability. It generally includes a model which has been trained from numerous collected data for a specific function, and can be used to predict some information.

The terminal or the network device may work on several frequency ranges, e.g. FR1 (410 MHz –7125 MHz) , FR2 (24.25GHz to 71GHz) , frequency band larger than 100GHz as well as Terahertz (THz) . It can further work on licensed/unlicensed/shared spectrum. The terminal device may have more than one connection with the network devices under Multi-Radio Dual Connectivity (MR-DC) application scenario. The terminal device or the network device can work on full duplex, flexible duplex and cross division duplex modes.

The term “network device” refers to a device which is capable of providing or hosting a cell or coverage where terminal devices can communicate. Examples of a network device include, but not limited to, a Node B (NodeB or NB) , an evolved NodeB (eNodeB or eNB) , a next generation NodeB (gNB) , a transmission reception point (TRP) , a remote radio unit (RRU) , a radio head (RH) , a remote radio head (RRH) , an IAB node, a low power node such as a femto node, a pico node, a reconfigurable intelligent surface (RIS) , and the like.

In one embodiment, the terminal device may be connected with a first network device and a second network device. One of the first network device and the second network device may be a master node and the other one may be a secondary node. The first network device and the second network device may use different radio access technologies (RATs) . In one embodiment, the first network device may be a first RAT device and the second network device may be a second RAT device. In one embodiment, the first RAT device is eNB and the second RAT device is gNB. Information related with different RATs may be transmitted to the terminal device from at least one of the first network device and the second network device. In one embodiment, first information may be transmitted to the terminal device from the first network device and second information may be transmitted to the terminal device from the second network device directly or via the first network device. In one embodiment, information related with configuration for the terminal device configured by the second network device may be transmitted from the second network device via the first network device. Information related with reconfiguration for the terminal device configured by the second network device may be transmitted to the terminal device from the second network device directly or via the first network device.

Communications discussed herein may use conform to any suitable standards including, but not limited to, New Radio Access (NR) , Long Term Evolution (LTE) , LTE-Evolution, LTE-Advanced (LTE-A) , Wideband Code Division Multiple Access (WCDMA) , Code Division Multiple Access (CDMA) , cdma2000, and Global System for Mobile Communications (GSM) and the like. Furthermore, the communications may be performed according to any generation communication protocols either currently known or to be developed in the future. Examples of the communication protocols include, but not limited to, the first generation (1G) , the second generation (2G) , 2.5G, 2.85G, the third generation (3G) , the fourth generation (4G) , 4.5G, the fifth generation (5G) , and the sixth (6G) communication protocols. The techniques described herein may be used for the wireless networks and radio technologies mentioned above as well as other wireless networks and radio technologies. The embodiments of the present disclosure may be performed according to any generation communication protocols either currently known or to be developed in the future. Examples of the communication protocols include, but not limited to, the first generation (1G) , the second generation (2G) , 2.5G, 2.75G, the third generation (3G) , the fourth generation (4G) , 4.5G, the fifth generation (5G) communication protocols, 5.5G, 5G-Advanced networks, or the sixth generation (6G) networks.

The term “circuitry” used herein may refer to hardware circuits and/or combinations of hardware circuits and software. For example, the circuitry may be a combination of analog and/or digital hardware circuits with software/firmware. As a further example, the circuitry may be any portions of hardware processors with software including digital signal processor (s) , software, and memory (ies) that work together to cause an apparatus, such as a terminal device or a network device, to perform various functions. In a still further example, the circuitry may be hardware circuits and or processors, such as a microprocessor or a portion of a microprocessor, that requires software/firmware for operation, but the software may not be present when it is not needed for operation. As used herein, the term circuitry also covers an implementation of merely a hardware circuit or processor (s) or a portion of a hardware circuit or processor (s) and its (or their) accompanying software and/or firmware.

As used herein, the singular forms “a” , “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. The term “includes” and its variants are to be read as open terms that mean “includes, but is not limited to. ” The term “based on” is to be read as “based at least in part on. ” The term “one embodiment” and “an embodiment” are to be read as “at least one embodiment. ” The term “another embodiment” is to be read as “at least one other embodiment. ” The terms “first, ” “second, ” and the like may refer to different or same objects. Other definitions, explicit and implicit, may be included below.

In some examples, values, procedures, or apparatus are referred to as “best, ” “lowest, ” “highest, ” “minimum, ” “maximum, ” or the like. It will be appreciated that such descriptions are intended to indicate that a selection among many used functional alternatives can be made, and such selections need not be better, smaller, higher, or otherwise preferable to other selections.

The sidelink communications can be performed on unlicensed band. A terminal device needs to transmit a synchronization signal to another terminal device. In the time domain, an S-SS/PSBCH block consists of

OFDM symbols, numbered in increasing order from 0 to

within the S-SS/PSBCH block. The number of OFDM symbols in an S-SS/PSBCH block

can be 13 for normal cyclic prefix and

can be 11 for extended cyclic prefix. The first OFDM symbol in an S-SS/PSBCH block is the first OFDM symbol in the slot. In the frequency domain, an S-SS/PSBCH block consists of 132 contiguous subcarriers with the subcarriers numbered in increasing order from 0 to 131 within the sidelink S-SS/PSBCH block. The quantities k and l represent the frequency and time indices, respectively, within one sidelink S-SS/PSBCH block. For an S-SS/PSBCH block, the terminal device shall use antenna port 4000 for transmission of S-PSS, S-SSS, PSBCH and DM-RS for PSBCH; the same cyclic prefix length and subcarrier spacing for the sequence for primary synchronization signal (S-PSS) , sequence for secondary synchronization signal (S-SSS) , physical sidelink broadcast channel (PSBCH) and demodulation reference signal (DMRS) for PSBCH. The first PSBCH symbol in one slot can be used for automatic gain control (AGC) tuning by the terminal device and the last guard symbol can be reserved for transmitting/receiving (TX/RX) switching.

Conventionally, in NR vehicle to everything (V2X) , S-SSB bandwidth is 11RBs. PSBCH spans 11RBs. The S-SSB is designed based on length-127 M-sequences for S-PSS and length-127 Gold sequences for S-SSS. Two symbols are used for each of S-PSS and S-SSS, respectively. As mentioned above, S-SSB occupied contiguous 11 PRBs (～2MHz for 15KHz SCS; ～4MHz for 30KHz SCS) , which cannot fulfil the occupied channel bandwidth (OCB) requirement (at least 16MHz) within a 20MHz BW. Thus, it is worth studying how to design S-SSB structure for SL-U to fulfil OCB requirement.

According to embodiments, solutions on synchronization signal blocks are proposed. A terminal device transmits a sidelink synchronization signal on an unlicensed band to another terminal device. The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, PSS, and a third set of symbols for a second sequence for a secondary synchronization signal, SSS. The second set of symbols and the third set of symbols further comprise the PSBCH. In this way, the OCB requirement can be fulfilled.

Fig. 1 illustrates a schematic diagram of a communication system in which embodiments of the present disclosure can be implemented. The communication system 100, which is a part of a communication network, comprises a terminal device 110-1, a terminal device 110-2, ..., a terminal device 110-N, which can be collectively referred to as “terminal device (s) 110. ” The number N can be any suitable integer number. The terminal devices 110 can communication with each other and a link between terminal devices is referred to as sidelink.

The communication system 100 further comprises a network device. In the communication system 100, the network device 120 and the terminal devices 110 can communicate data and control information to each other. The numbers of terminal devices shown in Fig. 1 are given for the purpose of illustration without suggesting any limitations.

Communications in the communication system 100 may be implemented according to any proper communication protocol (s) , comprising, but not limited to, cellular communication protocols of the first generation (1G) , the second generation (2G) , the third generation (3G) , the fourth generation (4G) and the fifth generation (5G) and on the like, wireless local network communication protocols such as Institute for Electrical and Electronics Engineers (IEEE) 802.11 and the like, and/or any other protocols currently known or to be developed in the future. Moreover, the communication may utilize any proper wireless communication technology, comprising but not limited to: Code Divided Multiple Address (CDMA) , Frequency Divided Multiple Address (FDMA) , Time Divided Multiple Address (TDMA) , Frequency Divided Duplexer (FDD) , Time Divided Duplexer (TDD) , Multiple-Input Multiple-Output (MIMO) , Orthogonal Frequency Divided Multiple Access (OFDMA) and/or any other technologies currently known or to be developed in the future.

Embodiments of the present disclosure can be applied to any suitable scenarios. For example, embodiments of the present disclosure can be implemented at reduced capability NR devices. Alternatively, embodiments of the present disclosure can be implemented in one of the followings: NR multiple-input and multiple-output (MIMO) , NR sidelink enhancements, NR systems with frequency above 52.6GHz, an extending NR operation up to 71GHz, narrow band-Internet of Thing (NB-IOT) /enhanced Machine Type Communication (eMTC) over non-terrestrial networks (NTN) , NTN, UE power saving enhancements, NR coverage enhancement, NB-IoT and LTE-MTC, Integrated Access and Backhaul (IAB) , NR Multicast and Broadcast Services, or enhancements on Multi-Radio Dual-Connectivity.

The term “slot” used herein refers to a dynamic scheduling unit. One slot comprises a predetermined number of symbols. The term “downlink (DL) sub-slot” may refer to a virtual sub-slot constructed based on uplink (UL) sub-slot. The DL sub-slot may comprise fewer symbols than one DL slot. The slot used herein may refer to a normal slot which comprises a predetermined number of symbols and also refer to a sub-slot which comprises fewer symbols than the predetermined number of symbols.

Embodiments of the present disclosure will be described in detail below. Reference is first made to Fig. 2, which shows a signaling chart illustrating process 200 between the terminal device and the network device according to some example embodiments of the present disclosure. Only for the purpose of discussion, the process 200 will be described with reference to Fig. 1. The process 200 may involve the terminal device 110-1 (referred to as “first terminal device” ) and the terminal device 110-2 (referred to as “second terminal device” ) in Fig. 1.

The terminal device 110-1 may generate 2010 a first sequence for a sidelink primary synchronization signal (S-PSS) . For example, the first sequence for the S-PSS can be defined by:

d _s-pss (n) =1-2x (m)

m= (n+22+43N ^SL _ID, 2) mod 127 (1)

0≤n≤127

where x (i+7) = (x (i+4) +x (i) ) mod 2, and [x (6) x (5) x (4) x (3) x (2) x (1) x (0) ] = [1 1 1 0 1 1 0] , d _s-pss (n) represents the first sequence for PSS, n represents the n ^th symbol in the first sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 +336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0,1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences. Embodiments of the present disclosure are not limited to this aspect.

The terminal device 110-1 may generate 2020 a second sequence for a sidelink secondary synchronization signal (S-SSS) . For example, the second sequence for the S-SSS can be defined by:

d _s-sss (n) = [1-2x ₀ ( (n+m ₀) mod 127) ] [1-2x ₁ ( (n+m ₁) mod 127) ]

0≤n＜127

where x ₀ (i+7) = (x ₀ (i+4) + x ₀ (i) ) mod 2, x ₁ (i+7) = (x ₁ (i+1) + x ₁ (i) ) mod 2, and [x ₀ (6) x ₀ (5) x ₀ (4) x ₀ (3) x ₀ (2) x ₀ (1) x ₀ (0) ] = [0 0 0 0 0 0 1] , [x ₁ (6) x ₁ (5) x ₁ (4) x ₁ (3) x ₁ (2) x ₁ (1) x ₁ (0) ] = [0 0 0 0 0 0 1] , d _s-sss (n) represents the second sequence for SSS, n represents the n ^th symbol in the second sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0, 1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the second sequence for SSS can be generated based on any proper sequences. Embodiments of the present disclosure are not limited to this aspect.

In some embodiments, the first sequence for the S-PSS can be an M sequence. The length of the first sequence can be 127. In addition, the second sequence for the S-SSS can be a gold sequence. The length of the second sequence can be 127.

In some embodiments, the terminal device 110-1 may map the first sequence to a first number of central continuous subcarriers in a bandwidth of the sidelink synchronization signal. Alternatively or in addition, the terminal device 110-1 may map the second sequence to the first number of central continuous subcarriers in a bandwidth of the sidelink synchronization signal. The first number of central continuous subcarriers can be 127.

The terminal device 110-1 transmits 2030 a sidelink synchronization signal to the terminal device 110-2. The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, PSS, and a third set of symbols for a second sequence for a secondary synchronization signal, SSS. The second set of symbols and the third set of symbols further comprise the PSBCH. In this way, the OCB requirement can be fulfilled. In other words, the frequency domain of the PSBCH symbols can be extended. In some embodiments, the PSBCH can also be located in other frequency domain of the S-PSS and/or SSS symbols. Alternatively, the PSBCH located in other frequency domain of the S-PSS and/or SSS symbols can be replaced with reference symbols.

In some embodiments, the transmission power of the first sequence and/or the second sequence may be higher than a transmission power of PSBCH in a same symbol (aka, power boost) . In other words, the first sequence and/or the second sequence may borrow transmission power from the PSBCH/reference in the same symbol, i.e., from the subcarriers above and below the first sequence and/or the second sequence.

Figs. 3-13 illustrate schematic diagrams of structures of a S-SSB according to some embodiments of the present disclosure, respectively. The sidelink synchronization signal may comprise a first number of symbols. In some embodiments, the first number of symbols may be 14 symbols. In some other embodiments, the first number of symbols may be 7 symbols. It should be noted that the first number of symbols may be any suitable number of symbols. In some embodiments, in one sidelink synchronization signal, there may be at least one PSBCH symbol after the last S-SSS. In some other embodiments, in one sidelink synchronization signal, there may be no PSBCH symbol after the last S-SSS.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot. The first symbol in the 14 symbol can be a PSBCH symbol. The second symbol in the 14 symbol can comprise the first sequence for the S-PSS, the second symbol may further comprise the PSBCH or a reference symbol. The third symbol in the 14 symbol can comprise the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol. The fourth symbol in the 14 symbol can comprise the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol. The fifth symbol in the 14 symbol can comprise the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol. In some embodiments, the subsequent 8 symbols in the 14 symbol can be PSBCH symbols. The guard symbol can also exist. Alternatively, the guard symbol can be omitted. In some embodiments, there are no restrictions on the TX UE behaviors on the guard symbol.

For example, as shown in Fig. 3, in the S-SSB 300, the number of subcarriers in the portion 3120 can be 127 and the total number of subcarriers in the bandwidth 3110 can be 1068. The symbols 310-1, 310-2, 310-3, 310-4, 310-5, 310-6, 310-7, 310-8 and 310-9 can be PSBCH symbols. The second symbol comprises the S-PSS 320-1 and the PBSCH/reference symbols 340-1 and 340-2. The third symbol comprises the S-PSS 320-2 and the PBSCH/reference symbols 340-3 and 340-4. The fourth symbol comprises the S-SSS 330-1 and the PBSCH/reference symbols 340-5 and 340-6. The fifth symbol comprises the S-SSS 330-2 and the PBSCH/reference symbols 340-7 and 340-8. The S-SSB 300 may also comprise a guard symbol 350. Table 1 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS.

Table 1

Alternatively, the first symbol in the 14 symbol is a PSBCH symbol. The second symbol in the 14 symbol can comprise the first sequence for the S-PSS, the second symbol may also comprise the PSBCH or a reference symbol. The third symbol in the 14 symbol can be a PSBCH symbol. The fourth symbol in the 14 symbol may comprise the second sequence for the S-SSS. The fourth symbol may further comprise the PSBCH or a reference symbol. In some embodiments, the subsequent 9 symbols in the 14 symbol are PSBCH symbols.

For example, as shown in Fig. 4, in the S-SSB 400, the number of subcarriers in the portion 4120 can be 127 and the total number of subcarriers in the bandwidth 4110 can be 1068. The symbols 410-1, 410-2, 410-3, 410-4, 410-5, 410-6, 410-7, 410-8 and 410-9 can be PSBCH symbols. The second symbol comprises the S-PSS 420-1 and the PBSCH/reference symbols 440-1 and 440-2. The third symbol can be a PBSCH/reference symbol 440-3. The fourth symbol comprises the S-SSS 430-1 and the PBSCH/reference symbols 440-4 and 440-5. The fifth symbol can be a PBSCH/reference symbol 440-6. The S-SSB 400 may also comprise a guard symbol 450. Table 2 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS.

Table 2

In other embodiments, the first and second symbols in the 14 symbol can be PSBCH symbols. The third symbol in the 14 symbol can comprise the first sequence for the S-PSS, the third symbol further may comprise the PSBCH or a reference symbol. The fourth symbol in the 14 symbol can be a PSBCH symbol. The fifth symbol in the 14 symbol may comprise the second sequence for the S-SSS, the fifth symbol may further comprise PSBCH or a reference symbol. In some embodiments, the subsequent 8 symbols in the 14 symbol may be PSBCH symbols.

For example, as shown in Fig. 5, in the S-SSB 500, the number of subcarriers in the portion 5120 can be 127 and the total number of subcarriers in the bandwidth 5110 can be 1068. The symbols 510-1, 510-2, 510-3, 510-4, 510-5, 510-6, 510-7, 510-8 and 510-9 can be PSBCH symbols. The second symbol can be PBSCH/reference symbol 540-1. The third symbol can comprise the S-PSS 520-1 and the PBSCH/reference symbols 540-2 and 540-3. The fourth symbol can be PBSCH/reference symbol 540-4. The fifth symbol can comprise the S-SSS 530-1 and the PBSCH/reference symbols 540-5 and 540-6. The S-SSB 500 may also comprise a guard symbol 550. Table 3 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS.

Table 3

In some embodiments, the first symbol in the 14 symbol can be a PSBCH symbol. The second symbol in the 14 symbol may comprise the first sequence for the S-PSS, the second symbol may further comprise the PSBCH or a reference symbol. The third and fourth symbols in the 14 symbol can be PSBCH symbols. The fifth symbol in the 14 symbol may comprise the second sequence for the S-SSS. The fifth symbol may further comprise the PSBCH or a reference symbol. In some embodiments, the subsequent 8 symbols in the 14 symbol can be PSBCH symbols.

For example, as shown in Fig. 6, in the S-SSB 600, the number of subcarriers in the portion 6120 can be 127 and the total number of subcarriers in the bandwidth 6110 can be 1068. The symbols 610-1, 610-2, 610-3, 610-4, 610-5, 610-6, 610-7, 610-8 and 610-9 can be PSBCH symbols. The second symbol can comprise the S-PSS 620-1 and the PBSCH/reference symbols 640-1 and 640-2. The third symbol can be PBSCH/reference symbol 640-3. The fourth symbol can be PBSCH/reference symbol 640-4. The fifth symbol can comprise the S-SSS 630-1 and the PBSCH/reference symbols 640-5 and 640-6. The S-SSB 600 may also comprise a guard symbol 650. Table 4 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS.

Table 4

In other embodiments, the first and second symbols in the 14 symbol may be PSBCH symbols. The third symbol in the 14 symbol may comprise the first sequence for the S-PSS, the third symbol may further comprise the PSBCH or a reference symbol. The fourth symbol in the 14 symbol may comprise the second sequence for the S-SSS, the fourth symbol may further comprise the PSBCH or a reference symbol. In some embodiments, the subsequent 9 symbols in the 14 symbol can be PSBCH symbols.

For example, as shown in Fig. 7, in the S-SSB 700, the number of subcarriers in the portion 7120 can be 127 and the total number of subcarriers in the bandwidth 7110 can be 1068. The symbols 710-1, 710-2, 710-3, 710-4, 710-5, 710-6, 710-7, 710-8 and 710-9 can be PSBCH symbols. The second symbol can be PBSCH/reference symbol 740-1. The third symbol can comprise the S-PSS 720-1 and the PBSCH/reference symbols 740-2 and 740-3. The fourth symbol comprises the S-SSS 730-1 and the PBSCH/reference symbols 740-4 and 740-5. The fifth symbol can be PBSCH/reference symbol 740-6. The S-SSB 700 may also comprise a guard symbol 750. Table 5 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS.

Table 5

Alternatively, the sidelink synchronization signal comprises a first number of symbols in one slot. For example, the first number of symbols can be 7 symbols. It should be noted that the first number can be any suitable number.

In some embodiments, the first symbol in the first number of symbols can be a PSBCH symbol. The second symbol in the first number of symbols may comprise the first sequence for the S-PSS, the second symbol may further comprise the PSBCH or a reference symbol. The third symbol in the first number of symbols may comprise the first sequence for the S-PSS, the third symbol may further comprise the PSBCH or a reference symbol. The fourth symbol in the first number of symbols may comprise the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol. The fifth symbol in the first number of symbols may comprise the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol.

For example, as shown in Fig. 8, in the S-SSB 800, the number of subcarriers in the portion 8120 can be 127 and the total number of subcarriers in the bandwidth 8110 can be 1068. The symbols 810-1 and 810-2 can be PSBCH symbols. The second symbol comprises the S-PSS 820-1 and the PBSCH/reference symbols 840-1 and 840-2. The third symbol comprises the S-PSS 820-2 and the PBSCH/reference symbols 840-3 and 840-4. The fourth symbol comprises the S-SSS 830-1 and the PBSCH/reference symbols 840-5 and 840-6. The fifth symbol comprises the S-SSS 830-2 and the PBSCH/reference symbols 840-7 and 840-8. The S-SSB 800 may also comprise a guard symbol 850. It should be noted that the S-SSB 800 can comprise other PSBCH symbols which are not shown.

In other embodiments, the first symbol in the first number of symbols can be a PSBCH symbol. The second symbol in the first number of symbols may comprise the first sequence for the S-PSS, the second symbol may further comprise the PSBCH or a reference symbol. The third symbol in the first number of symbols can be a PSBCH symbol. The fourth symbol in the first number of symbols may comprise the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol.

For example, as shown in Fig. 9, in the S-SSB 900, the number of subcarriers in the portion 9120 can be 127 and the total number of subcarriers in the bandwidth 9110 can be 1068. The symbols 910-1 and 910-2 can be PSBCH symbols. The second symbol comprises the S-PSS 920-1 and the PBSCH/reference symbols 940-1 and 940-2. The third symbol can be a PBSCH/reference symbol 940-3. The fourth symbol comprises the S-SSS 930-1 and the PBSCH/reference symbols 940-4 and 940-5. The fifth symbol can be a PBSCH/reference symbol 940-6. The S-SSB 900 may also comprise a guard symbol 950. It should be noted that the S-SSB 900 can comprise other PSBCH symbols which are not shown.

In some embodiments, the first symbol in the first number of symbols can be PSBCH symbols. The second symbol in the first number of symbols may comprise the first sequence for the S-PSS and the second symbol may further comprise the PSBCH or a reference symbol. The third and fourth symbols in the first number of symbols may be PSBCH symbols. The fifth symbol in the first number of symbols may comprise the second sequence for the S-SSS and the fifth symbol may further comprise the PSBCH or a reference symbol.

For example, as shown in Fig. 10, in the S-SSB 1000, the number of subcarriers in the portion 10120 can be 127 and the total number of subcarriers in the bandwidth 10110 can be 1068. The symbols 1010-1, 1010-2 and 1010-3 can be PSBCH symbols. The second symbol can comprise the S-PSS 1020-1 and the PBSCH/reference symbols 1040-1 and 1040-2. The third symbol can be PBSCH/reference symbol 1040-3. The fourth symbol can be PBSCH/reference symbol 1040-4. The fifth symbol comprises the S-SSS 1030-1 and the PBSCH/reference symbols 1040-5 and 1040-6. The S-SSB 1000 may also comprise a guard symbol 1050. It should be noted that the S-SSB 1000 can comprise other PSBCH symbols which are not shown.

In some embodiments, the first and second symbols in the first number of symbols can be PSBCH symbol. The third symbol in the first number of symbols may comprise the first sequence for the S-PSS and the third symbol may further comprise the PSBCH or a reference symbol. The fourth symbol in the first number of symbols may comprise the second sequence for the S-SSS. The fourth symbol can further comprise the PSBCH or a reference symbol.

For example, as shown in Fig. 11, in the S-SSB 1100, the number of subcarriers in the portion 11120 can be 127 and the total number of subcarriers in the bandwidth 11110 can be 1068. The symbols 1110-1 can be a PSBCH symbol. The second symbol can be PBSCH/reference symbol 1140-1. The third symbol can comprise the S-PSS 1120-1 and the PBSCH/reference symbols 1140-2 and 1140-3. The fourth symbol comprises the S-SSS 1130-1 and the PBSCH/reference symbols 1140-4 and 1140-5. The fifth symbol can be PBSCH/reference symbol 1140-6. The S-SSB 1100 may also comprise a guard symbol 1150. It should be noted that the S-SSB 1100 can comprise other PSBCH symbols which are not shown.

In other embodiments, the first and second symbols in the first number of symbols can be PSBCH symbol. The third symbol in the first number of symbols may comprise the first sequence for the S-PSS and the third symbol may further comprise the PSBCH or a reference symbol. The fourth symbol can further comprise the PSBCH or a reference symbol. The fifth symbol in the first number of symbols may comprise the second sequence for the S-SSS.

For example, as shown in Fig. 12, in the S-SSB 1200, the number of subcarriers in the portion 12120 can be 127 and the total number of subcarriers in the bandwidth 12110 can be 1068. The symbols 1210-1 can be a PSBCH symbol. The second symbol can be PBSCH/reference symbol 1240-1. The third symbol can comprise the S-PSS 1220-1 and the PBSCH/reference symbols 1240-2 and 1240-3. The fourth symbol can be PBSCH/reference symbol 1240-4. The fourth symbol comprises the S-SSS 1230-1 and the PBSCH/reference symbols 1240-5 and 1240-6. The S-SSB 1200 may also comprise a guard symbol 1250. It should be noted that the S-SSB 1200 can comprise other PSBCH symbols which are not shown.

In some embodiments, the resources block for the PSBCH may be interlaced in frequency domain in the sidelink synchronization signal. For example, if the SCS is 15 kHz and the total bandwidth is 20MHz, there can be 100 resource blocks and 1200 subcarriers. In this case, 10 resource blocks belong to one interlace and there can be 10 interlaces within the total bandwidth. In other embodiments, if the SCS is 30 kHz and the total bandwidth is 20MHz, there can be 50 resource blocks and 600 subcarriers. In this case, 10 resource blocks belong to one interlace and there can be 5 interlaces within the total bandwidth.

As shown in Fig. 13, in the S-SSB 1300, the bandwidth 13110 can be 20 MHz and the SCS can be 15 kHz. The resource blocks 1310-1, 1310-2, 1310-3, 1310-4, 1310-5, 1310-6, 1310-7, 1310-8, 1310-9 and 1310-10 belong to the interlace 1310.. The S-PSS symbols 1320-1 and 1320-2 and SSS symbols 1330-1 and 1330-2 can locate in the center 127 subcarriers. The PSBCH may be interlaced on resources blocks. For example, PSBCH is located in interlace 1310. In other words, PSBCH is interlaced on resource blocks 1310-1, 1310-2, ..., 1310-10. Moreover, as shown in Fig. 13, the resource block 1310-4 may be rate matched in the resources occupied by the S-PSS symbols 1320-1 and 1320-2 and the S-SSS symbols 1330-1 and 1330-2. Alternatively, the resource block 1310-4 may be punctured in the resources occupied by the S-PSS symbols 1320-1 and 1320-2 and the S-SSS symbols 1330-1 and 1330-2. It should be noted that the numbers of the S-PSS symbols and the S-SSS symbols are only examples. In other embodiments, PSBCH may be interlaced by occupying any other proper interlace.

A long S-PSS and S-SSS sequence may be mapped to contiguous subcarriers which fulfill OCB requirements. Embodiments of the present disclosure will be described in detail below. Reference is first made to Fig. 14, which shows a signaling chart illustrating process 1400 between the terminal device and the network device according to some example embodiments of the present disclosure. Only for the purpose of discussion, the process 1400 will be described with reference to Fig. 1. The process 1400 may involve the terminal device 110-1 (referred to as “first terminal device” ) and the terminal device 110-2 (referred to as “second terminal device” ) in Fig. 1.

The terminal device 110-1 determines 1410 a number of subcarriers for transmitting a sidelink synchronization signal. The number of subcarriers meets the OCB requirement. For example, if the subcarrier space (SCS) of the sidelink synchronization signal is 30 kHz, the number of subcarriers can be 534. Alternatively, if the SCS of the sidelink synchronization signal is 15 kHz, the number of subcarriers can be 1067. In this way, the OCB requirement can be fulfilled.

The terminal device 110-1 generates 1420 a first sequence for a primary synchronization signal (PSS) based on an M-sequence. The M-sequence has a first length which is a power of two. In some embodiments, the first length can be larger than the number of subcarriers. For example, if the number of subcarriers is 534, the first length can be larger than the 534, for example, 1024. In other embodiments, if the number of subcarriers is 1067, the first length can be larger than the 1024, for example, 2048. Alternatively, a difference between the first length and the number of subcarriers can be within a range. For example, if the number of subcarriers is 534, the first length can be 512. In other embodiments, if the number of subcarriers is 1067, the first length can be 1024.

In some embodiments, for 30 KHz S-SSB block, the terminal device 110-1 may generate the first sequence for PSS based on a 1024-M sequence. In some embodiments, the M-sequence may be generated from a first primitive polynomial y ¹⁰+y ³+1, where y represents a variable. Alternatively, the M-sequence may be generated from a second primitive polynomial y ¹⁰+y ⁷+1, where y represents a variable. For example, the first sequence for the sidelink primary synchronization signal can be defined by:

d _s-pss (n) =1-2x (m)

m= (n+512N ^SL _ID, 2) mod 1023 (3)

0≤n≤N (for example, N=534)

where x (i+10) = (x (i+3) +x (i) ) mod 2 or x (i+10) = (x (i+7) +x (i) ) mod 2, d _s-pss (n) represents the first sequence for PSS, n represents the n ^th symbol in the first sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0, 1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

Alternatively, for 30 KHz S-SSB block, the terminal device 110-1 may generate the first sequence for PSS based on a 512-M sequence. In some embodiments, the M-sequence may be generated from a first primitive polynomial y ⁹+y ⁴+1, where y represents a variable. Alternatively, the M-sequence may be generated from a second primitive polynomial y ⁹+y ⁵+1, where y represents a variable. For example, the first sequence for the sidelink primary synchronization signal can be defined by:

d _s-pss (n) =1-2x (m)

m= (n+256N ^SL _ID, 2) mod 511 (4)

0≤n≤N (for example, N=512)

where x (i+9) = (x (i+4) +x (i) ) mod 2 or x (i+9) = (x (i+5) +x (i) ) mod 2, d _s-pss (n) represents the first sequence for PSS, n represents the n ^th symbol in the first sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0, 1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

In some embodiments, for 15 KHz S-SSB block, the terminal device 110-1 may generate the first sequence for PSS based on a 2048-M sequence. In some embodiments, the M-sequence may be generated from a first primitive polynomial y ¹¹+y ²+1, where y represents a variable. Alternatively, the M-sequence may be generated from a second primitive polynomial y ¹¹+y ⁹+1, where y represents a variable. For example, the first sequence for the sidelink primary synchronization signal can be defined by:

d _s-pss (n) =1-2x (m)

m= (n+1024N ^SL _ID, 2) mod 2047 (5)

0≤n≤N (for example, N=1067)

where x (i+11) = (x (i+2) +x (i) ) mod 2 or x (i+11) = (x (i+8) +x (i) ) mod 2, d _s-pss (n) represents the first sequence for PSS, n represents the n ^th symbol in the first sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2 , where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0, 1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

Alternatively, for 15 KHz S-SSB block, the terminal device 110-1 may generate the first sequence for PSS based on a 1024-M sequence. In some embodiments, the M-sequence may be generated from a first primitive polynomial y ¹⁰+y ³+1, where y represents a variable. Alternatively, the M-sequence may be generated from a second primitive polynomial y ¹⁰+y ⁷+1, where y represents a variable. For example, the first sequence for the sidelink primary synchronization signal can be defined by:

d _s-pss (n) =1-2x (m)m= (n+512N ^SL _ID, 2) mod 1023 (6)

0≤n≤N (for example, N=1024)

where x (i+10) = (x (i+3) +x (i) ) mod 2 or x (i+10) = (x (i+7) +x (i) ) mod 2, d _s-pss (n) represents the first sequence for PSS, n represents the n ^th symbol in the first sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 +336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0, 1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

The terminal device 110-1 generates 1430 a second sequence for a secondary synchronization signal (SSS) based on a gold sequence. The gold sequence also has the first length.

In some embodiments, for 30 KHz S-SSB block, the terminal device 110-1 may generate the second sequence for SSS based on two 1024-M sequences. In some embodiments, the two M-sequences may be generated from a first primitive polynomial y ¹⁰+y ³+1 and a second primitive polynomial y ¹⁰+y ⁷+1, where y represents a variable. For example, the second sequence for the sidelink secondary synchronization signal can be defined by:

0≤n<N (e.g., N=534)

where x ₀ (i+10) = (x ₀ (i+3) + x ₀ (i) ) mod 2 and x ₁ (i+10) = (x ₁ (i+7) + x ₁ (i) ) mod 2, d _s-sss (n) represents the second sequence for SSS, n represents the n ^th symbol in the second sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0,1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

In other embodiments, for 30 KHz S-SSB block, the terminal device 110-1 may generate the second sequence for SSS based on two 512-M sequences. In some embodiments, the two M-sequences may be generated from a first primitive polynomial y ⁹+y ⁴+1 and a second primitive polynomial y ⁹+y ⁵+1, where y represents a variable. For example, the second sequence for the sidelink secondary synchronization signal can be defined by:

0≤n<N (e.g., N=512)

where x ₀ (i+9) = (x ₀ (i+4) + x ₀ (i) ) mod 2 and x ₁ (i+9) = (x ₁ (i+5) + x ₁ (i) ) mod 2, d _s-sss (n) represents the second sequence for SSS, n represents the n ^th symbol in the second sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0,1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

Alternatively, for 15 KHz S-SSB block, the terminal device 110-1 may generate the second sequence for SSS based on two 2048-M sequences. In some embodiments, the two M-sequences may be generated from a first primitive polynomial y ¹¹+y ²+1 and a second primitive polynomial y ¹¹+y ⁹+1, where y represents a variable. For example, the second sequence for the sidelink secondary synchronization signal (S-SSS) can be defined by:

0≤n<N (e.g., N=1067)

where x ₀ (i+11) = (x ₀ (i+2) + x ₀ (i) ) mod 2 and x ₁ (i+11) = (x ₁ (i+9) + x ₁ (i) ) mod 2, d _s-sss (n) represents the second sequence for SSS, n represents the n ^th symbol in the second sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0,1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

In other embodiments, for 15 KHz S-SSB block, the terminal device 110-1 may generate the second sequence for SSS based on two 1024-M sequences. In some embodiments, the two M-sequences may be generated from a first primitive polynomial y ¹⁰+y ³+1 and a second primitive polynomial y ¹⁰+y ⁷+1, where y represents a variable. For example, the second sequence for the S-SSS can be defined by:

0≤n<N (e.g., N=1024)

where x ₀ (i+10) = (x ₀ (i+3) + x ₀ (i) ) mod 2 and x ₁ (i+10) = (x ₁ (i+7) + x ₁ (i) ) mod 2, d _s-sss (n) represents the second sequence for SSS, n represents the n ^th symbol in the second sequence, there are 672 unique physical layer sidelink synchronization identities given by N ^SL _ID = N ^SL _ID, 1 + 336 N ^SL _ID, 2, where N ^SL _ID, 1 ∈ {0, 1, ..., 335} , N ^SL _ID, 2 ∈ {0, 1} . The sidelink synchronization identities are divided into two sets, id_net consisting of N ^SL _ID = 0,1, …, 335 and id_oon consisting of N ^SL _ID =336, 337, …, 671. It should be noted that the first sequence for PSS can be generated based on any proper sequences.

Referring back to Fig. 14, the terminal device 110-1 transmits 1440 a sidelink synchronization signal to the terminal device 110-2. The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, PSS, and a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS.

Figs. 15-24 illustrate schematic diagrams of structures of a S-SSB according to some embodiments of the present disclosure, respectively.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot. The first symbol in the 14 symbol can be a PSBCH symbol. The second symbol in the 14 symbol can comprise the first sequence for the S-PSS. The third symbol in the 14 symbol can comprise the first sequence for the S-PSS. The fourth symbol in the 14 symbol can comprise the second sequence for the S-SSS. The fifth symbol in the 14 symbol can comprise the second sequence for the S-SSS. In some embodiments, the subsequent 8 symbols in the 14 symbol can be PSBCH symbols. The guard symbol can also exist. Alternatively, the guard symbol can be omitted. In some embodiments, there are no restrictions on the TX UE behaviors on the guard symbol.

For example, as shown in Fig. 15, in the S-SSB 1500, the total number of subcarriers in the bandwidth 15110 can be 1068. The symbols 1510-1, 1510-2, 1510-3, 1510-4, 1510-5, 1510-6, 1510-7, 1510-8 and 1510-9 can be PSBCH symbols. The second symbol comprises the S-PSS 1520-1. The third symbol comprises the 1520-2. The fourth symbol comprises the S-SSS 1530-1. The fifth symbol comprises the S-SSS 1530-2. The S-SSB 1500 may also comprise a guard symbol 1540.

Table 6 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS, wherein the SCS is 15 kHz and the first length is 1067. It should be noted that Table 6 is only example and different tables may be applied to any one of: a first scenario where the SCS is 15kHz and the first length is 1024, a second scenario where the SCS is 30kHz and the first length is 534, or a third scenario where the SCS is 30kHz and the first length is 512.

Table 6

Alternatively, the first symbol in the 14 symbol is a PSBCH symbol. The second symbol in the 14 symbol can comprise the first sequence for the S-PSS. The third symbol in the 14 symbol can be a PSBCH symbol. The fourth symbol in the 14 symbol may comprise the second sequence for the S-SSS. The fourth symbol may further comprise the PSBCH or a reference symbol. In some embodiments, the subsequent 9 symbols in the 14 symbol are PSBCH symbols.

For example, as shown in Fig. 16, in the S-SSB 1600, the total number of subcarriers in the bandwidth 16110 can be 1068. The symbols 1610-1, 1610-2, 1610-3, 1610-4, 1610-5, 1610-6, 1610-7, 1610-8, 1610-9, 1610-10 and 1610-11 can be PSBCH symbols. The second symbol comprises the S-PSS 1620-1. The fourth symbol comprises the S-SSS 1630-1. The S-SSB 1600 may also comprise a guard symbol 1640. Table 7 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS, wherein the SCS is 15 kHz and the first length is 1067. It should be noted that Table 6 is only example and different tables may be applied to any one of:a first scenario where the SCS is 15kHz and the first length is 1024, a second scenario where the SCS is 30kHz and the first length is 534, or a third scenario where the SCS is 30kHz and the first length is 512.

Table 7

In other embodiments, the first symbol in the 14 symbol can be a PSBCH symbol. The second symbol in the 14 symbol can comprise the first sequence for the S-PSS. The third symbol in the 14 symbol can comprise the second sequence for the S-SSS. In some embodiments, the subsequent 10 symbols in the 14 symbol may be PSBCH symbols.

For example, as shown in Fig. 17, in the S-SSB 1700, the total number of subcarriers in the bandwidth 17110 can be 1068. The symbols 1710-1, 1710-2, 1710-3, 1710-4, 1710-5, 1710-6, 1710-7, 1710-8, 1710-9, 1710-10 and 1710-11 can be PSBCH symbols. The second symbol can comprise the S-PSS 1720-1. The third symbol comprises the S-SSS 1730-1. The S-SSB 1700 may also comprise a guard symbol 1750. Table 8 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS, wherein the SCS is 15 kHz and the first length is 1067. It should be noted that Table 6 is only example and different tables may be applied to any one of:a first scenario where the SCS is 15kHz and the first length is 1024, a second scenario where the SCS is 30kHz and the first length is 534, or a third scenario where the SCS is 30kHz and the first length is 512.

Table 8

In some embodiments, the first symbol in the 14 symbol can be a PSBCH symbol. The second symbol in the 14 symbol may comprise the first sequence for the S-PSS. The third and fourth symbols in the 14 symbol can be PSBCH symbols. The fifth symbol in the 14 symbol may comprise the second sequence for the S-SSS. In some embodiments, the subsequent 8 symbols in the 14 symbol can be PSBCH symbols.

For example, as shown in Fig. 18, in the S-SSB 1800, the total number of subcarriers in the bandwidth 18110 can be 1068. The symbols 1810-1, 1810-2, 1810-3, 1810-4, 1810-5, 1810-6, 1810-7, 1810-8, 1810-9, 1810-10 and 1810-11 can be PSBCH symbols. The second symbol can comprise the S-PSS 1820-1. The fifth symbol comprises the S-SSS 1830-1. The S-SSB 1800 may also comprise a guard symbol 1850. Table 9 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS, wherein the SCS is 15 kHz and the first length is 1067. It should be noted that Table 6 is only example and different tables may be applied to any one of:a first scenario where the SCS is 15kHz and the first length is 1024, a second scenario where the SCS is 30kHz and the first length is 534, or a third scenario where the SCS is 30kHz and the first length is 512.

Table 9

In other embodiments, the first and second symbols in the 14 symbol may be PSBCH symbols. The third symbol in the 14 symbol may comprise the first sequence for the S-PSS. The fourth symbol in the 14 symbol can be a PSBCH symbol. The fifth symbol in the 14 symbol may comprise the second sequence for the S-SSS. In some embodiments, the subsequent 9 symbols in the 14 symbol can be PSBCH symbols.

For example, as shown in Fig. 19, in the S-SSB 1900, the total number of subcarriers in the bandwidth 19110 can be 1068. The symbols 1910-1, 1910-2, 1910-3, 1910-4, 1910-5, 1910-6, 1910-7, 1910-8, 1910-9, 1910-10 and 1910-11 can be PSBCH symbols. The third symbol can comprise the S-PSS 1920-1. The fifth symbol comprises the S-SSS 1930-1. The S-SSB 1900 may also comprise a guard symbol 750. Table 10 below shows an example of resources within an S-SS/PSBCH block for S-PSS, S-SSS, PSBCH, and DM-RS, wherein the SCS is 15 kHz and the first length is 1067. It should be noted that Table 6 is only example and different tables may be applied to any one of:a first scenario where the SCS is 15kHz and the first length is 1024, a second scenario where the SCS is 30kHz and the first length is 534, or a third scenario where the SCS is 30kHz and the first length is 512.

Table 10

Alternatively, the sidelink synchronization signal comprises a first number of symbols in one slot. For example, the first number of symbols can be 7 symbols. It should be noted that the first number can be any suitable number. In some embodiments, there may be no PSBCH symbols after the symbol carrying the S-SSS.

In some embodiments, the first symbol in the first number of symbols can be a PSBCH symbol. The second symbol in the first number of symbols may comprise the first sequence for the S-PSS. The third symbol in the first number of symbols can be a PSBCH symbol. The fourth symbol in the first number of symbols may comprise the second sequence for the S-SSS. The fifth symbol in the first number of symbols may be a PSBCH symbol. In some embodiments, the last symbol can be a guard symbol.

For example, as shown in Fig. 20, in the S-SSB 2000, the total number of subcarriers in the bandwidth 20110 can be 1068. The symbols 2010-1, 2010-2, 2010-3 and 2010-4 can be PSBCH symbols. The second symbol comprises the S-PSS 2020-1. The fourth symbol comprises the S-SSS 2030-1. The S-SSB 2000 may also comprise a guard symbol 2050. It should be noted that the S-SSB 2000 can comprise other PSBCH symbols which are not shown.

In other embodiments, the first symbol in the first number of symbols can be a PSBCH symbol. The second symbol in the first number of symbols may comprise the first sequence for the S-PSS. The third symbol in the first number of symbols may comprise the second sequence for the S-SSS. In some embodiments, the subsequent symbols in the first number of symbols can be PSBCH symbols.

For example, as shown in Fig. 21, in the S-SSB 2100, the total number of subcarriers in the bandwidth 21110 can be 1068. The symbols 2110-1, 2110-2, 21110-3 and 2110-4 can be a PSBCH symbol. The second symbol comprises the S-PSS 2120-1. The third symbol comprises the S-SSS 2130-1. The S-SSB 2100 may also comprise a guard symbol 2150. It should be noted that the S-SSB 2100 can comprise other PSBCH symbols which are not shown.

In some embodiments, the first symbol in the first number of symbols can be a PSBCH symbol. The second symbol in the first number of symbols may comprise the first sequence for the S-PSS. The third and fourth symbols in the first number of symbols may be PSBCH symbols. The fifth symbol in the first number of symbols may comprise the second sequence for the S-SSS.

For example, as shown in Fig. 22, in the S-SSB 2200, the total number of subcarriers in the bandwidth 22110 can be 1068. The symbols 2210-1, 2210-2, 2210-3 and 2210-4 can be PSBCH symbols. The second symbol can comprise the S-PSS 2220-1. The fifth symbol comprises the S-SSS 2230-1. The S-SSB 2200 may also comprise a guard symbol 2250. It should be noted that the S-SSB 2200 can comprise other PSBCH symbols which are not shown.

In some embodiments, the first and second symbols in the first number of symbols can be PSBCH symbol. The third symbol in the first number of symbols may comprise the first sequence for the S-PSS. The fourth symbol can be a PSBCH symbol. The fifth symbol in the first number of symbols may comprise the second sequence for the S-SSS.

For example, as shown in Fig. 23, in the S-SSB 2300, the total number of subcarriers in the bandwidth 23110 can be 1068. The symbols 2310-1, 2310-2, 2310-3 and 2310-4 can be PSBCH symbols. The third symbol can comprise the S-PSS 2320-1. The fifth symbol can comprise the S-SSS 2330-1. The S-SSB 2300 may also comprise a guard symbol 2350. It should be noted that the S-SSB 2300 can comprise other PSBCH symbols which are not shown.

In other embodiments, the first symbol in the first number of symbols can be a PSBCH symbol. The second and third symbols in the first number of symbols may comprise the first sequence for the S-PSS. The fourth and fifth symbols in the first number of symbols may comprise the second sequence for the S-SSS.

For example, as shown in Fig. 24, in the S-SSB 2400, the total number of subcarriers in the bandwidth 24110 can be 1068. The symbols 2410-1 and 2410-2 can be PSBCH symbols. The second symbol can comprise the S-PSS 2420-1 and the third symbol can comprise the S-PSS 2420-2. The fourth symbol can comprise the S-SSS 2430-1 and the fifth symbol can comprise the S-SSS 2430-2. The S-SSB 2400 may also comprise a guard symbol 2450. It should be noted that the S-SSB 2400 can comprise other PSBCH symbols which are not shown.

Fig. 25 shows a flowchart of an example method 2500 in accordance with an embodiment of the present disclosure. The method 2500 can be implemented at any suitable devices. Only for the purpose of illustrations, the method 2500 can be implemented at a terminal device 110-1 as shown in Fig. 1.

At block 2510, the terminal device 110-1 transmits to the terminal device 110-2, a sidelink synchronization signal on an unlicensed band. The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a sidelink primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS. The second set of symbols and the third set of symbols further comprise the PSBCH or a reference symbol.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol. In some embodiments, the subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the 14 symbols is a PSBCH symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol. In some embodiments, the subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first and second symbols in the 14 symbols are PSBCH symbols, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the 14 symbols is a PSBCH symbol, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises PSBCH or a reference symbol. In some embodiments, the subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third and fourth symbols in the 14 symbols are PSBCH symbols, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol. In some embodiments, the subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first and second symbols in the 14 symbols are PSBCH symbols, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol. In some embodiments, the subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols is a PSBCH symbol, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol further comprise the PSBCH or a reference symbol, the fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol, and the last symbol in the first number of symbols comprises a guard symbol .

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols is a PSBCH symbol, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the first number of symbols is a PSBCH symbol, the fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols are PSBCH symbols, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third and fourth symbols in the first number of symbols are PSBCH symbols, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first and second symbols in the first number of symbols are PSBCH symbol, the third symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprise the PSBCH or a reference symbol, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the first number of symbols comprises 7 symbols.

In some embodiments, the first number of symbols comprises 14 symbols.

In some embodiments, resource blocks for the PSBCH are interlaced in frequency domain in the sidelink synchronization signal.

In some embodiments, the terminal device 110-1 may map the first sequence to a first number of central continuous subcarriers in a bandwidth of the sidelink synchronization signal. The terminal device 110-1 may also map the second sequence to the first number of central continuous subcarriers in the bandwidth of the sidelink synchronization signal.

In some embodiments, the first number of central continuous subcarriers is 127.

In some embodiments, the first sequence for the S-PSS is an M-sequence, the second sequence for the S-PSS is a gold sequence, both lengths of the first sequence and the second sequence are 127.

In some embodiments, a transmission power of the first sequence is higher than a transmission power of PSBCH in a same symbol. Alternatively or in addition, a transmission power of the second sequence is higher than a transmission power of PSBCH in a same symbol.

Fig. 26 shows a flowchart of an example method 2600 in accordance with an embodiment of the present disclosure. The method 2600 can be implemented at any suitable devices. Only for the purpose of illustrations, the method 2600 can be implemented at a terminal device 110-1 as shown in Fig. 1.

At block 2610, the terminal device 110-1 determines a number of subcarriers for transmitting a sidelink synchronization signal. The number of subcarriers meets an occupied channel bandwidth requirement.

At block 2620, the terminal device 110-1 generates a first sequence for a primary synchronization signal, S-PSS, based on an M-sequence. The M-sequence has a first length.

At block 2630, the terminal device 110-1 generates a second sequence for a secondary synchronization signal, S-SSS, based on a gold sequence. Both the M-sequence and the gold sequence have a first length. The first length is larger than the number of subcarriers or a difference between the first length and the number of subcarriers is within a range.

In some embodiments, a subcarrier space of the sidelink synchronization signal is 30kHz, the number of subcarriers is 534, the first length is larger than 534 or is 512. the first length is 1024.

In some embodiments, the M-sequence can be generated from a first primitive polynomial y ¹⁰+y ³+1, or the M-sequence can be generated from a second primitive polynomial y ¹⁰+y ⁷+1, and where y represents a variable.

In other embodiments, the first length is 1024. The gold sequence can be generated based on two M-sequences. In some embodiments, the two M-sequences may be generated from a first primitive polynomial y ¹⁰+y ³+1, and a second primitive polynomial y ¹⁰+y ⁷+1, and where y represents a variable.

Alternatively, the first length can be 512, the M-sequence can be generated from a first primitive polynomial y ⁹+y ⁴+1, and where y represents a variable. Alternatively, the M-sequence may be generated from a second primitive polynomial y ⁹+y ⁵+1, and where y represents a variable.

In some embodiments, the first length can be 512. The gold sequence may be generated based on two M-sequences. The two M-sequences can be generated from a first primitive polynomial y ⁹+y ⁴+1, and a second primitive polynomial y ⁹+y ⁵+1, and where y represents a variable.

Alternatively, a subcarrier space of the sidelink synchronization signal may be 15 kHz, the number of subcarriers is 1067, the first length is larger than 1067 or is 1024.

In some embodiments, the first length can be 2048. The M-sequence may be generated from a first primitive polynomial y ¹¹+y ²+1, and where y represents a variable. Alternatively, the M-sequence can be generated from a second primitive polynomial y ¹¹+y ⁹+1, and where y represents a variable.

In some embodiments, the first length can be 2048. The gold sequence may be generated based on two M-sequences. The two M-sequences can be generated from a first primitive polynomial y ¹¹+y ²+1, and a second primitive polynomial y ¹¹+y ⁹+1, and where y represents a variable.

In some embodiments, the first length can be 1024. The M-sequence may be generated from a first primitive polynomial y ¹⁰+y ³+1, and where y represents a variable. Alternatively, the M-sequence can be generated from a second primitive polynomial y ¹⁰+y ⁷+1, and where y represents a variable.

In some embodiments, the first length can be 1024. The gold sequence may be generated based on two M-sequences. The two M-sequences can be generated from a first primitive polynomial y ¹⁰+y ³+1, and a second primitive polynomial y ¹⁰+y ⁷+1, and where y represents a variable.

At block 2640, the terminal device 110-1 transmits, to the terminal device 110-2, the sidelink synchronization signal on an unlicensed band. The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a secondary synchronization signal, S-SSS.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS. In some embodiments, the subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol in the 14 symbols is a PSBCH symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS. In some embodiments, the subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols are PSBCH symbols, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol in the 14 symbols comprises the second sequence for the S-SSS. In some embodiments, the subsequent 10 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third and fourth symbols in the 14 symbols are PSBCH symbols, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS. In some embodiments, the subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first and second symbols in the 14 symbols are PSBCH symbols, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the fourth symbol is a PSBCH symbol, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS. In some embodiments, the subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, the first symbol in the first number of symbols is a PSBCH symbol, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol in the first number of symbols is a PSBCH symbol, the fourth symbol in the first number of symbols comprises the second sequence for the S-SSS. In some embodiments, the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols are PSBCH symbols, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the third and fourth symbols in the first number of symbols are PSBCH symbols, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS. In some embodiments, the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first and second symbols in the first number of symbols are PSBCH symbols, the third symbol in the first number of symbols comprises the first sequence for the S-PSS, the fourth symbol in the first number of symbols is a PSBCH symbol, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS. In some embodiments, the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first in the first number of symbols is a PSBCH symbol, the second and third symbol in the first number of symbols comprise the first sequence for the S-PSS, the fourth and fifth symbols in the first number of symbols comprise the second sequence for the S-SSS. In some embodiments, the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal 34comprises a first number of symbols in one slot, and the first symbol in the first number of symbols are PSBCH symbols, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol in the first number of symbols comprises the second sequence for the S-SSS. In some embodiments, the last symbol in the first number of symbols comprises a guard symbol. In some embodiments, the first number of symbols comprises 7 symbols.

In some embodiments, a terminal device comprises a circuitry configured to transmit to another terminal device, a sidelink synchronization signal on an unlicensed band. The sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a sidelink primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS. The second set of symbols and the third set of symbols further comprise the PSBCH or a reference symbol.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol, and subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the 14 symbols is a PSBCH symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol, and subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first and second symbols in the 14 symbols are PSBCH symbols, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the 14 symbols is a PSBCH symbol, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises PSBCH or a reference symbol, and subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third and fourth symbols in the 14 symbols are PSBCH symbols, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol, and subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first and second symbols in the 14 symbols are PSBCH symbols, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or a reference symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS , the fourth symbol further comprises the PSBCH or a reference symbol, and subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols is a PSBCH symbol, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or a reference symbol, the third symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol further comprise the PSBCH or a reference symbol, the fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or a reference symbol, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or a reference symbol, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the first number of symbols comprises 7 symbols.

In some embodiments, the terminal device comprises the circuitry configured to map the first sequence to a first number of central continuous subcarriers in a bandwidth of the sidelink synchronization signal; and map the second sequence to the first number of central continuous subcarriers in the bandwidth of the sidelink synchronization signal.

In some embodiments, the first number of central continuous subcarriers is 127.

In some embodiments, a terminal device comprises a circuitry configured to determine a number of subcarriers for transmitting a sidelink synchronization signal. The number of subcarriers meets an occupied channel bandwidth requirement.

In some embodiments, the terminal device comprises the circuitry configured to generate a first sequence for a primary synchronization signal, S-PSS, based on an M-sequence. The M-sequence has a first length.

In some embodiments, the terminal device comprises the circuitry configured to generate a second sequence for a secondary synchronization signal, S-SSS, based on a gold sequence. Both the M-sequence and the gold sequence have a first length. The first length is larger than the number of subcarriers or a difference between the first length and the number of subcarriers is within a range.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, and subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol in the 14 symbols is a PSBCH symbol, the fourth symbol in the 14 symbols comprises the second sequence for the S-SSS, and subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols are PSBCH symbols, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third symbol in the 14 symbols comprises the second sequence for the S-SSS, and subsequent 10 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first symbol in the 14 symbols is a PSBCH symbol, the second symbol in the 14 symbols comprises the first sequence for the S-PSS, the third and fourth symbols in the 14 symbols are PSBCH symbols, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, and subsequent 8 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises 14 symbols in one slot, and the first and second symbols in the 14 symbols are PSBCH symbols, the third symbol in the 14 symbols comprises the first sequence for the S-PSS, the fourth symbol is a PSBCH symbol, the fifth symbol in the 14 symbols comprises the second sequence for the S-SSS, and subsequent 9 symbols in the 14 symbols are PSBCH symbols.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, the first symbol in the first number of symbols is a PSBCH symbol, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol in the first number of symbols is a PSBCH symbol, the fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols are PSBCH symbols, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the third and fourth symbols in the first number of symbols are PSBCH symbols, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first and second symbols in the first number of symbols are PSBCH symbols, the third symbol in the first number of symbols comprises the first sequence for the S-PSS, the fourth symbol in the first number of symbols is a PSBCH symbol, the fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first in the first number of symbols is a PSBCH symbol, the second and third symbol in the first number of symbols comprise the first sequence for the S-PSS, the fourth and fifth symbols in the first number of symbols comprise the second sequence for the S-SSS, and the last symbol in the first number of symbols comprises a guard symbol.

In some embodiments, the sidelink synchronization signal comprises a first number of symbols in one slot, and the first symbol in the first number of symbols are PSBCH symbols, the second symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol in the first number of symbols comprises the second sequence for the S-SSS, and the last symbol in the first number of symbols comprises a guard symbol. In some embodiments, the first number of symbols comprises 7 symbols.

Fig. 27 is a simplified block diagram of a device 2700 that is suitable for implementing embodiments of the present disclosure. The device 2700 can be considered as a further example implementation of the terminal device 110 and the network device 120 as shown in Fig. 1. Accordingly, the device 2700 can be implemented at or as at least a part of the terminal device 110.

As shown, the device 2700 includes a processor 2710, a memory 2720 coupled to the processor 2710, a suitable transmitter (TX) and receiver (RX) 2740 coupled to the processor 2710, and a communication interface coupled to the TX/RX 2740. The memory 2720 stores at least a part of a program 2730. The TX/RX 2740 is for bidirectional communications. The TX/RX 2740 has at least one antenna to facilitate communication, though in practice an Access Node mentioned in this application may have several ones. The communication interface may represent any interface that is necessary for communication with other network elements, such as X2 interface for bidirectional communications between eNBs, S1 interface for communication between a Mobility Management Entity (MME) /Serving Gateway (S-GW) and the eNB, Un interface for communication between the eNB and a relay node (RN) , or Uu interface for communication between the eNB and a terminal device.

The program 2730 is assumed to include program instructions that, when executed by the associated processor 2710, enable the device 2700 to operate in accordance with the embodiments of the present disclosure, as discussed herein with reference to Fig. 2 to 14. The embodiments herein may be implemented by computer software executable by the processor 2710 of the device 2700, or by hardware, or by a combination of software and hardware. The processor 2710 may be configured to implement various embodiments of the present disclosure. Furthermore, a combination of the processor 2710 and memory 2720 may form processing means 1550 adapted to implement various embodiments of the present disclosure.

The memory 2720 may be of any type suitable to the local technical network and may be implemented using any suitable data storage technology, such as a non-transitory computer readable storage medium, semiconductor-based memory devices, magnetic memory devices and systems, optical memory devices and systems, fixed memory and removable memory, as non-limiting examples. While only one memory 2720 is shown in the device 2700, there may be several physically distinct memory modules in the device 2700. The processor 2710 may be of any type suitable to the local technical network, and may include one or more of general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs) and processors based on multicore processor architecture, as non-limiting examples. The device 2700 may have multiple processors, such as an application specific integrated circuit chip that is slaved in time to a clock which synchronizes the main processor.

Generally, various embodiments of the present disclosure may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. Some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device. While various aspects of embodiments of the present disclosure are illustrated and described as block diagrams, flowcharts, or using some other pictorial representation, it will be appreciated that the blocks, apparatus, systems, techniques or methods described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.

The present disclosure also provides at least one computer program product tangibly stored on a non-transitory computer readable storage medium. The computer program product includes computer-executable instructions, such as those included in program modules, being executed in a device on a target real or virtual processor, to carry out the process or method as described above with reference to any of Figs. 4-10. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, or the like that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or split between program modules as desired in various embodiments. Machine-executable instructions for program modules may be executed within a local or distributed device. In a distributed device, program modules may be located in both local and remote storage media.

Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowcharts and/or block diagrams to be implemented. The program code may execute entirely on a machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

The above program code may be embodied on a machine readable medium, which may be any tangible medium that may contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine readable medium may be a machine readable signal medium or a machine readable storage medium. A machine readable medium may include but not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine readable storage medium would include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM) , a read-only memory (ROM) , an erasable programmable read-only memory (EPROM or Flash memory) , an optical fiber, a portable compact disc read-only memory (CD-ROM) , an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are contained in the above discussions, these should not be construed as limitations on the scope of the present disclosure, but rather as descriptions of features that may be specific to particular embodiments. Certain features that are described in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment may also be implemented in multiple embodiments separately or in any suitable sub-combination.

Although the present disclosure has been described in language specific to structural features and/or methodological acts, it is to be understood that the present disclosure defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims

A communication method, comprising:

transmitting, at a first terminal device and to a second terminal device, a sidelink synchronization signal on an unlicensed band, and wherein the sidelink synchronization signal comprises:

a first set of symbols for physical sidelink broadcast channel (PSBCH) ,

a second set of symbols for a first sequence for a sidelink primary synchronization signal, S-PSS, and

a third set of symbols for a second sequence for a sidelink secondary synchronization signal, S-SSS, and

wherein the second set of symbols and the third set of symbols further comprise the PSBCH or a reference symbol.
The method of claim 1, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first symbol in the first number of symbols is a PSBCH symbol,

a second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or the reference symbol,

a third symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol further comprise the PSBCH or a reference symbol,

a fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or the reference symbol, and

a fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or the reference symbol.
The method of claim 1, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first symbol in the first number of symbols is a PSBCH symbol,

a second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or the reference symbol,

a third symbol in the first number of symbols is a PSBCH symbol, and

a fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprises the PSBCH or the reference symbol.
The method of claim 1, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first symbol in the first number of symbols are PSBCH symbols,

a second symbol in the first number of symbols comprises the first sequence for the S-PSS, the second symbol further comprises the PSBCH or the reference symbol,

a third and fourth symbols in the first number of symbols are PSBCH symbols, and

a fifth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or the reference symbol.
The method of claim 1, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first and second symbols in the first number of symbols are PSBCH symbol,

a third symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or the reference symbol, and

a fourth symbol in the first number of symbols comprises the second sequence for the S-SSS, the fourth symbol further comprise the PSBCH or the reference symbol.
The method of claim 1, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

first, second, and fourth symbols in the first number of symbols are PSBCH symbol,

a third symbol in the first number of symbols comprises the first sequence for the S-PSS, the third symbol further comprises the PSBCH or the reference symbol, and

a fifth symbol in the first number symbols comprises the second sequence for the S-SSS, the fifth symbol further comprises the PSBCH or the reference symbol.
The method of any of claims 2-6, wherein the first number of symbols further comprises at least one PSBCH symbol.
The method of any of claims 2-6, wherein a last symbol in the first number of symbols is a guard symbol.
The method of any of claims 2-8, wherein the first number is 7.
The method of any of claims 2-8, wherein the first number is 14.
The method of claim 1, wherein resource blocks for the PSBCH are interlaced in frequency domain in the sidelink synchronization signal.
The method of any of claims 1-11, further comprising:

mapping the first sequence to a first number of central continuous subcarriers in a bandwidth of the sidelink synchronization signal; and

mapping the second sequence to the first number of central continuous subcarriers in the bandwidth of the sidelink synchronization signal.
The method of claim 12, wherein the first number of central continuous subcarriers is 127.
The method of any of claims 1-11, wherein the first sequence for the S-PSS is an M-sequence, the second sequence for the S-PSS is a gold sequence, both lengths of the first sequence and the second sequence are 127.
The method of any of claims 1-11, wherein a transmission power of the first sequence is higher than a transmission power of PSBCH in a same symbol, and/or

wherein a transmission power of the second sequence is higher than a transmission power of PSBCH in a same symbol.
A communication method, comprising:

determining, at a first terminal device, a number of subcarriers for transmitting a sidelink synchronization signal, wherein the number of subcarriers meets an occupied channel bandwidth requirement;

generating, at the first terminal device, a first sequence for a primary synchronization signal, S-PSS, based on an M-sequence;

generating, at the first terminal device, a second sequence for a secondary synchronization signal, S-SSS, based on a gold sequence, wherein both the M-sequence and the gold sequence have a first length, and wherein the first length is larger than the number of subcarriers or a difference between the first length and the number of subcarriers is within a range; and

transmitting, to a second terminal device, the sidelink synchronization signal on an unlicensed band, and wherein the sidelink synchronization signal comprises: a first set of symbols for physical sidelink broadcast channel (PSBCH) , a second set of symbols for a first sequence for a primary synchronization signal, S-PSS, and a third set of symbols for a second sequence for a secondary synchronization signal, S-SSS.
The method of claim 16, wherein a subcarrier space of the sidelink synchronization signal is 30kHz, the number of subcarriers is 534, the first length is larger than 534 or is 512.
The method of claim 17, wherein the first length is 1024, wherein the M-sequence is generated from a first primitive polynomial y ¹⁰+y ³+1, or

wherein the M-sequence is generated from a second primitive polynomial y ¹⁰+y ⁷+1, and wherein y represents a variable.
The method of claim 17, wherein the first length is 1024, wherein the gold sequence is generated based on two M-sequences, and wherein the two M-sequences are generated from a first primitive polynomial y ¹⁰+y ³+1, and a second primitive polynomial y ¹⁰+y ⁷+1, and wherein y represents a variable.
The method of claim 17, wherein the first length is 512, wherein the M-sequence is generated from a first primitive polynomial y ⁹+y ⁴+1, or

wherein the M-sequence is generated from a second primitive polynomial y ⁹+y ⁵+1, and wherein y represents a variable.
The method of claim 17, wherein the first length is 512, wherein the gold sequence is generated based on two M-sequences, and wherein the two M-sequences are generated from a first primitive polynomial y ⁹+y ⁴+1, and a second primitive polynomial y ⁹+y ⁵+1, and wherein y represents a variable.
The method of claim 16, wherein a subcarrier space of the sidelink synchronization signal is 15kHz, the number of subcarriers is 1067, the first length is larger than 1067 or is 1024.
The method of claim 22, wherein the first length is 2048, wherein the M-sequence is generated from a first primitive polynomial y ¹¹+y ²+1, or

wherein the M-sequence is generated from a second primitive polynomial y ¹¹+y ⁹+1, and wherein y represents a variable.
The method of claim 17, wherein the first length is 2048, wherein the gold sequence is generated based on two M-sequences, and wherein the two M-sequences are generated from a first primitive polynomial y ¹¹+y ²+1, and a second primitive polynomial y ¹¹+y ⁹+1, and wherein y represents a variable.
The method of claim 22, wherein the first length is 1024, wherein the M-sequence is generated from a first primitive polynomial y ¹⁰+y ³+1, or

wherein the M-sequence is generated from a second primitive polynomial y ¹⁰+y ⁷+1, and wherein y represents a variable.
The method of claim 22, wherein the first length is 1024, wherein the gold sequence is generated based on two M-sequences, and wherein the two M-sequences are generated from a first primitive polynomial y ¹⁰+y ³+1, and a second primitive polynomial y ¹⁰+y ⁷+1, and wherein y represents a variable.
The method of claim 16, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first symbol in the first number of symbols is a PSBCH symbol,

a second symbol in the first number of symbols comprises the first sequence for the S-PSS,

a third symbol in the first number of symbols is a PSBCH symbol, and

a fourth symbol in the first number of symbols comprises the second sequence for the S-SSS.
The method of claim 16, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first symbol in the first number of symbols are PSBCH symbols,

a second symbol in the first number of symbols comprises the first sequence for the S-PSS,

a third and fourth symbols in the first number of symbols are PSBCH symbols, and

a fifth symbol in the first number of symbols comprises the second sequence for the S-SSS.
The method of claim 16, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first and second symbols in the first number of symbols are PSBCH symbols,

a third symbol in the first number of symbols comprises the first sequence for the S-PSS,

a fourth symbol in the first number of symbols is a PSBCH symbol, and

a fifth symbol in the first number of symbols comprises the second sequence for the S-SSS.
The method of claim 16, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first in the first number of symbols is a PSBCH symbol,

a second and third symbol in the first number of symbols comprise the first sequence for the S-PSS, and

a fourth and fifth symbols in the first number of symbols comprise the second sequence for the S-SSS.
The method of claim 16, wherein the sidelink synchronization signal comprises a first number of symbols in one slot, and wherein:

a first symbol in the first number of symbols are PSBCH symbols,

a second symbol in the first number of symbols comprises the first sequence for the S-PSS, and

a third symbol in the first number of symbols comprises the second sequence for the S-SSS.
The method of any of claims 27-31, wherein the first number of symbols further comprises at least one PSBCH symbol.
The method of any of claims 27-31, wherein a last symbol in the first number of symbols is a guard symbol.
The method of any one of claims 27-33, wherein the first number is 7.
The method of any one of claims 27-33, wherein the first number is 14.
A terminal device comprising:

a processor; and

a memory coupled to the processor and storing instructions thereon, the instructions, when executed by the processor, causing the terminal device to perform the method according to any of claims 1 to 15 or any of claims 16 to 35.
A computer readable medium having instructions stored thereon, the instructions, when executed on at least one processor, causing the at least one processor to perform the method according to any of claims 1 to 15 or any of claims 16 to 35.