WO2023042392A1 - Switching control device, switching power supply device, and power supply system - Google Patents

Abstract

The switching control device according to an embodiment of the present invention comprises: a time measurement circuit for measuring time from a time point when the voltage between both terminals of a first switching element in an off-state from among a plurality of switching elements included in at least either an inverter circuit or a rectifier smoothing circuit becomes a reference voltage or less to a time point when the first switching element switches from the off-state to an on-state and for outputting the result as a measured time; an integration circuit for comparing the measured time with the reference time and obtaining the integral value of the error between the measured time and the reference time; and a drive circuit for setting, as needed in accordance with the integral value of the error, a delay time from a time point when a second switching element of the plurality of switching elements switches from an on-state to an off-state to a time point when the first switching element switches from the off-state to the on-state and controlling each of the switching operations of the plurality of switching elements using the set delay time.

Description

Switching controller, switching power supply and power supply system

The present invention relates to a switching power supply device that performs voltage conversion using switching elements, a switching control device applied to such a switching power supply device, and a power supply system provided with such a switching power supply device.

Various DC-DC converters have been proposed and put into practical use as examples of switching power supply devices (see, for example, Patent Document 1). This type of DC-DC converter generally includes an inverter circuit including switching elements, a power conversion transformer (transformer), and a rectifying/smoothing circuit.

Japanese Patent Publication No. 2020-519092

By the way, in such switching power supply devices such as DC-DC converters, it is generally required to suppress power loss. It is desirable to provide a switching controller, a switching power supply, and a power supply system capable of suppressing power loss.

A switching control device according to an embodiment of the present invention is arranged between a transformer having a primary winding and a secondary winding, an input terminal pair to which an input voltage is input, and the primary winding. and a rectifying/smoothing circuit disposed between an output terminal pair from which an output voltage is output and a secondary winding, the control device being applied to a switching power supply device, the inverter comprising: Among a plurality of switching elements included in at least one of the circuit and the rectifying/smoothing circuit, the first switching element is turned off when the voltage across the first switching element in the off state becomes equal to or lower than the reference voltage. A time measurement circuit that measures the time from the state to the ON state and outputs it as the measured time, compares the measured time with the reference time, and obtains the error integral value between the measured time and the reference time. The delay time from when the integrating circuit and the second switching element among the plurality of switching elements switch from the ON state to the OFF state to when the first switching element switches from the OFF state to the ON state, a drive circuit that is set as needed according to the error integral value and uses the set delay time to control the switching operations of the plurality of switching elements including the first and second switching elements. .

A switching power supply device according to an embodiment of the present invention includes the input terminal pair, the output terminal pair, the transformer, the inverter circuit, the rectifying/smoothing circuit, and the and a switching control device.

A power supply system according to an embodiment of the present invention includes the switching power supply device according to the embodiment of the present invention, and a power supply that supplies the input voltage to the input terminal pair. be.

According to the switching control device, switching power supply device, and power supply system according to one embodiment of the present invention, power loss can be suppressed.

1 is a circuit diagram showing a schematic configuration example of a switching power supply device according to an embodiment of the present invention; FIG. 2 is a timing chart showing an operation example of the switching power supply device shown in FIG. 1; FIG. FIG. 4 is a diagram showing an example of conduction characteristics in a transistor; It is a figure showing the setting example of the dead time which concerns on embodiment. It is a figure showing the setting example of the maximum dead time and the minimum dead time which concern on embodiment. 3 is a circuit diagram showing a schematic configuration example of a switching power supply device according to Modification 1; FIG. FIG. 11 is a circuit diagram showing a schematic configuration example of a switching power supply device according to Modification 2; FIG. 11 is a circuit diagram showing a schematic configuration example of a switching power supply device according to Modification 3;

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The description will be given in the following order.
1. Embodiment (example when center tap type rectifier circuit is used)
2. Modifications Modification 1 (Example of using a bridge-type rectifier circuit)
Modifications 2 and 3 (examples of synchronous rectification circuits)
3. Other variations

<1. Embodiment>
[composition]
FIG. 1 is a circuit diagram showing a schematic configuration example of a switching power supply (switching power supply 1) according to an embodiment of the present invention. The switching power supply 1 functions as a DC-DC converter that converts a DC input voltage Vin supplied from a DC input power supply 10 (eg, a battery) into a DC output voltage Vout and supplies power to a load 9. . Note that the load 9 may be, for example, an electronic device, a battery, or the like. Further, the switching power supply device 1 is a so-called "(insulated half-bridge) LLC resonant type" DC-DC converter, as will be described below. The mode of voltage conversion in the switching power supply device 1 may be either up-conversion (boosting) or down-conversion (stepping down).

Here, the DC input voltage Vin corresponds to a specific example of "input voltage" in the present invention, and the DC output voltage Vout corresponds to a specific example of "output voltage" in the present invention. Further, the DC input power supply 10 corresponds to a specific example of the "power supply" in the present invention, and a system including the DC input power supply 10 and the switching power supply device 1 is a specific example of the "power supply system" in the present invention. corresponds to the example.

The switching power supply device 1 includes two input terminals T1 and T2, two output terminals T3 and T4, an inverter circuit 2, a transformer 3, a rectifying/smoothing circuit 4, and a control circuit 7. A DC input voltage Vin is input between the input terminals T1 and T2, and a DC output voltage Vout is output between the output terminals T3 and T4. Note that in the example shown in FIG. 1, the primary low-voltage line L1L is connected to the ground GND.

Here, the input terminals T1 and T2 correspond to a specific example of "input terminal pair" in the present invention, and the output terminals T3 and T4 correspond to a specific example of "output terminal pair" in the present invention. . Also, the control circuit 7 corresponds to a specific example of the "switching control device" of the present invention.

An input smoothing capacitor, for example, may be arranged between the primary side high voltage line L1H connected to the input terminal T1 and the primary side low voltage line L1L connected to the input terminal T2. . Specifically, the first end (one end) of the input smoothing capacitor is connected to the primary side high voltage line L1H at a position between the inverter circuit 2 and the input terminals T1 and T2, which will be described later, and the input smoothing capacitor The second end (the other end) may be connected to the primary side low pressure line L1L. Such an input smoothing capacitor is a capacitor for smoothing the DC input voltage Vin input from the input terminals T1 and T2.

(A. Inverter circuit 2)
The inverter circuit 2 is arranged between the input terminals T1, T2 and a primary winding 31 of the transformer 3, which will be described later. The inverter circuit 2 has two switching elements S1 and S2, a resonant inductor Lr, and a resonant capacitor Cr, and is a so-called "half-bridge type" inverter circuit. Note that the resonance inductor Lr may be configured by a leakage inductance in the transformer 3, which will be described later, or may be provided separately from such a leakage inductance.

Here, the switching elements S1 and S2 described above each correspond to a specific example of "a plurality of switching elements" in the present invention. Also, the switching element S2 corresponds to a specific example of the "first switching element" in the present invention, and the switching element S1 corresponds to a specific example of the "second switching element" in the present invention.

As the switching elements S1 and S2, for example, a field effect transistor (MOS-FET; Metal Oxide Semiconductor-Field Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), HEMT ((High Electron Mobility Transistor) = HFET (Heterostructure Field -Effect Transistor)), etc., are used. An example of the HEMT is a GaN (gallium nitride) transistor.

In the example shown in FIG. 1, the switching elements S1 and S2 are each composed of a transistor made up of a MOS-FET or HEMT. In this manner, when MOS-FETs or HEMTs are used as the switching elements S1 and S2, the capacitors and diodes (not shown in FIG. 1) connected in parallel to the switching elements S1 and S2 are respectively replaced by MOS-FETs. - Can consist of FET or HEMT parasitic capacitances or parasitic diodes.

In the inverter circuit 2, two switching elements S1 and S2 are connected in series in this order between the input terminals T1 and T2 (between the primary high voltage line L1H and the primary low voltage line L1L). there is Specifically, the switching element S1 is arranged between the primary side high voltage line L1H and the connection point P1, and the switching element S2 is arranged between the connection point P1 and the primary side low voltage line L1L. .

The resonance inductor Lr and the resonance capacitor Cr in the inverter circuit 2 and the primary winding 31 in the transformer 3, which will be described later, are connected in series between the connection point P1 and the primary low-voltage line L1L. It is Specifically, in the example of FIG. 1, the first end (one end) of the resonance capacitor Cr is connected to the connection point P1, and the second end (the other end) of the resonance capacitor Cr is connected to the first end of the resonance inductor Lr. (one end). A second end (the other end) of the resonant inductor Lr is connected to one end of the primary winding 31, and the other end of the primary winding 31 is connected to the primary low-voltage line L1L. ing.

With such a configuration, in the inverter circuit 2, the switching elements S1 and S2 perform switching operations (on/off operations) in accordance with drive signals SG1 and SG2 supplied from the drive circuit 5 in the control circuit 7, which will be described later. , becomes: That is, the DC input voltage Vin applied between the input terminals T1 and T2 is converted into AC voltage and output to the transformer 3 (primary winding 31).

(B. transformer 3)
The transformer 3 has one primary winding 31 and two secondary windings 321 and 322 .

In the primary winding 31, the first end (one end) of the primary winding 31 is connected to the second end (other end) of the resonance inductor Lr described above, and the second end of the primary winding 31 (the other end) is connected to the primary side low pressure line L1L described above.

In the secondary winding 321, a first end of the secondary winding 321 is connected to a cathode of the rectifier diode 41 described later via a connection line L21 described later, and a second end of the secondary winding 321 is connected. is connected to a center tap P6 in a rectifying/smoothing circuit 4 which will be described later. In the secondary winding 322, a first end of the secondary winding 322 is connected to a cathode of a rectifier diode 42 described later via a connection line L22 described later, and a second end of the secondary winding 322 is connected. is connected to the center tap P6. That is, the second ends of the secondary windings 321 and 322 are commonly connected to the center tap P6.

The transformer 3 converts the voltage generated by the inverter circuit 2 (rectangular pulse wave voltage input to the primary winding 31 of the transformer 3), and the secondary windings 321 and 322 AC voltage is output from the end. In this case, the degree of voltage conversion of the DC output voltage Vout with respect to the DC input voltage Vin depends on the turns ratio between the primary winding 31 and the secondary windings 321 and 322 and the switching period Tsw (described later). It is determined by the switching frequency fsw=1/Tsw).

(C. Rectifying and smoothing circuit 4)
The rectifying/smoothing circuit 4 has two rectifying diodes 41 and 42 and one output smoothing capacitor Cout. Specifically, the rectifying/smoothing circuit 4 includes a rectifying circuit having rectifying diodes 41 and 42 and a smoothing circuit having an output smoothing capacitor Cout.

The above rectifier circuit is a so-called "center tap type" rectifier circuit. That is, the anodes of the rectifier diodes 41 and 42 are respectively connected to the ground line LG, and the cathode of the rectifier diode 41 is connected to the aforementioned first end of the secondary winding 321 via the connection line L21 to The cathode of diode 42 is connected to the aforementioned first end of secondary winding 322 via connection line L22. Further, as described above, the second ends of the secondary windings 321 and 322 are commonly connected to the center tap P6, and the center tap P6 is connected via the output line LO. It is connected to the output terminal T3. The ground line LG described above is connected to the output terminal T4 described above.

In the smoothing circuit described above, an output smoothing capacitor Cout is connected between the output line LO and the ground line LG (between the output terminals T3 and T4). That is, the first end of the output smoothing capacitor Cout is connected to the output line LO, and the second end of the output smoothing capacitor Cout is connected to the ground line LG.

In the rectifying/smoothing circuit 4 having such a configuration, the rectifying circuit including the rectifying diodes 41 and 42 rectifies and outputs the AC voltage output from the transformer 3 . A smoothing circuit including an output smoothing capacitor Cout smoothes the voltage rectified by the rectifying circuit to generate a DC output voltage Vout. The DC output voltage Vout generated in this way causes the DC output current Iout (load current) to flow to the load 9, and power is supplied to the load 9 from the output terminals T3 and T4. It's becoming

Here, the DC output current Iout (load current) described above corresponds to a specific example of the "output current" in the present invention.

(D. Control circuit 7)
The control circuit 7 is a circuit that controls the switching power supply device 1 . This control circuit 7 has a time measuring circuit 61, an integrating circuit 62 and a driving circuit 5 as shown in FIG.

Here, FIG. 2 is a timing chart showing an operation example (waveform examples of various voltages and currents) of the switching power supply device 1 . Specifically, FIG. 2A shows the drive signal SG1 (the voltage Vgs1 between the gate and source of the switching element S1), and FIG. Each waveform example is shown for the voltage Vgs2) between the sources. 2(C) shows the voltage Vds2 between the drain and source (between both ends) of the switching element S2 (shown in FIG. 1), and FIG. 2(D) shows the current flowing between the drain and source of the switching element S2. Each waveform example is shown for Ids2 (illustrated in FIG. 1). In FIG. 2, the horizontal axis indicates time t. FIG. 2 also shows the switching period Tsw (=1/fsw) in the switching power supply device 1 .

The time measurement circuit 61, integration circuit 62 and drive circuit 5 described above will be described in detail below with reference to FIGS.

(Time measurement circuit 61)
As shown in FIG. 1, the time measurement circuit 61 measures the voltage across the switching element S2 included in the inverter circuit 2 based on the voltage across the switching element S2 (voltage Vds2 across the drain and source, detected at the connection point P1). is a circuit for outputting a measurement time T1, which will be described below. Specifically, as shown in FIG. 2, the time measurement circuit 61 detects that the voltage Vds2 is equal to or lower than a predetermined reference voltage Vr (in this example, Vr=-0.2 V as a negative voltage). (Vds2 ≤ Vr) to the time when the switching element S1 included in the inverter circuit 2 switches from the OFF state (Vgs2 = 0 V) to the ON state (Vgs2 = 5 V, for example) is measured and output as the measured time T1. do.

(Integration circuit 62)
As shown in FIG. 1, the integrating circuit 62 compares the measured time T1 output from the time measuring circuit 61 with a predetermined reference time Tref (for example, Tref=10 ns), and compares the measured time T1 with This is a circuit for obtaining an error integral value (integral value Ie) between the reference time Tref and the reference time Tref. The integrated value Ie obtained in this manner is output to the drive circuit 5 described below, as shown in FIG.

(Drive circuit 5)
The drive circuit 5 is a circuit that performs switching drive for controlling the operations of the switching elements S1 and S2 in the inverter circuit 2, respectively. Specifically, the drive circuit 5 controls switching operations (ON/OFF operations) of the switching elements S1 and S2 by supplying the driving signals SG1 and SG2 to the switching elements S1 and S2, respectively. It is designed to

In addition, the drive circuit 5 performs switching frequency control when controlling switching operations of the switching elements S1 and S2 (performing switching driving). That is, PFM (Pulse Frequency Modulation) control is performed in the drive signals SG1 and SG2.

Further, the drive circuit 5 performs the above-described switching drive so that the switching elements S1 and S2 perform switching operations at fixed duty ratios and the switching frequency fsw varies. Incidentally, when the on-periods of the switching elements S1 and S2 are represented by Ton1 and Ton2, respectively, the duty ratio of each of the switching elements S1 and S2 is expressed by (Ton1/ Tsw), (Ton2/Tsw). Both of these (Ton1/Tsw) and (Ton2/Tsw) are less than 50%. , a dead time Td described below is provided.

Here, the drive circuit 5 also adjusts the length of the dead time Td as the delay time described below to the magnitude of the integrated value Ie output from the integration circuit 62 when performing the switching drive described above. Accordingly, the setting is made at any time (see FIG. 1). In other words, the drive circuit 5 controls the switching operations of the switching elements S1 and S2 using the dead time Td set as needed.

This dead time Td is, for example, as shown in FIG. This is the period until switching to the ON state. In other words, this dead time Td is a period during which both of these two switching elements S1 and S2 are set to the OFF state.

It should be noted that this dead time Td corresponds to a specific example of "delay time" in the present invention.

Here, for example, as shown in FIG. 2, specifically, the driving circuit 5 uses the dead time Td (for example, the dead time Td' shown in FIG. A switching operation is performed in the switching period Tsw. At this time, the driving circuit 5 sets the dead time Td so that the measurement time T1 converges to the reference time Tref (T1 becomes substantially equal to Tref).

The details of the dead time Td setting method will be described later (Figs. 4 and 5).

[Operation and action/effect]
(A. Basic operation)
In the switching power supply device 1, in the inverter circuit 2, the DC input voltage Vin supplied from the DC input power supply 10 via the input terminals T1 and T2 is switched by the switching elements S1 and S2 to form a rectangular pulse wave. voltage is generated. The rectangular pulse wave voltage is supplied to the primary winding 31 of the transformer 3, and transformed in the transformer 3 to output the transformed AC voltage from the secondary windings 321 and 322. be done.

In the rectifying/smoothing circuit 4, the AC voltage (transformed AC voltage described above) output from the transformer 3 is rectified by the rectifying diodes 41 and 42 in the rectifying circuit, and then is rectified by the output smoothing capacitor Cout in the smoothing circuit. smoothed. As a result, the DC output voltage Vout is output from the output terminals T3 and T4. This DC output voltage Vout causes a DC output current Iout to flow to the load 9 and power to be supplied to the load 9 .

(B. Concerning conduction characteristics of transistors)
By the way, in a conventional general switching power supply device using a transistor as a switching element, there are the following fears.

That is, during the dead time Td described above, a reverse voltage drop of, for example, 2 V or more occurs between the drain and source of the transistor as the switching element. Such a reverse voltage and the drain current flowing through the transistor cause conduction loss in the switching element. In particular, when the GaN transistor described above is used as the switching element, the reverse voltage drop described above increases, as shown in FIG.

FIG. 3 shows an example of conduction characteristics in a general transistor (an example of the correspondence relationship between the drain-source voltage Vds and the drain-source current Ids in the case of the GaN transistor described above). is. In the example of FIG. 3, examples of such conduction characteristics are shown for each of the gate-source voltages Vgs=-3V, -2V, 0V, 2V, and 6V.

First, although such a GaN transistor does not incorporate a body diode in its device structure, it has a pseudo body diode during circuit operation of the GaN transistor. In this pseudo body diode, when the gate of the GaN transistor is in an off state, when the voltage Vds described above becomes a negative voltage, the voltage Vgd between the gate and the drain becomes a positive voltage, exceeding a predetermined threshold, and the channel is closed. Operates by conducting. Therefore, in this GaN transistor, VF is about 2V, which is higher than the forward drop voltage VF of the body diode of silicon type MOS-FET=0.7V.

Also, when the gate of the GaN transistor is in an off state and the voltage Vgs is a negative voltage, the VF becomes even larger as shown in FIG. 3, for example. Since this VF is large, if the period during which the pseudo body diode is conductive is long and the current Ids is large, a larger conduction loss will occur.

Here, the conduction of the body diode or pseudo body diode in the switching element is immediately before or after the switching element turns on when performing synchronous rectification or when performing zero voltage switching (ZVS). Occur. Also, just before the switching element is turned on, it is ideal that the switching element is turned on at the same time as the voltage Vds becomes a negative voltage. If the switching element is turned on too early, the charge accumulated in the output capacitance Coss of the switching element is short-circuited by the turn-on, resulting in power loss. flows. Conversely, if it turns on too late, the conduction period of the body diode or pseudo-body diode will be lengthened.

In addition, since the voltage Vds drops rapidly just before the switching element turns on, current may flow through the gate of the switching element through the feedback capacitance, causing the voltage Vgs to become a negative voltage. In the GaN transistor, the negative voltage of the voltage Vgs increases VF, and the power loss due to conduction of the pseudo-body diode increases.

Furthermore, the appropriate turn-on or turn-off timing differs depending on the operating conditions of the switching power supply (input voltage, load, etc.) and variations in constants such as parasitic capacitance and inductance. Therefore, the turn-on timing is set later than ideal and the turn-off timing is set earlier than ideal to avoid fatal increase in power loss, surge and noise caused by turning on too early or turning off too late. It can be said that it is desirable to be

In this way, in a conventional general switching power supply device using a transistor as a switching element, power loss may increase due to reverse voltage generation in the switching element. Therefore, it can be said that minimization of the dead time Td described above is required.

(C. Operation example of the present embodiment)
Therefore, in the switching power supply device 1 of the present embodiment, as described above, the length of the dead time Td during switching drive is determined by the integrated error value (integrated value Ie) between the measurement time T1 and the reference time Tref ) is set by the control circuit 7 at any time.

FIG. 4 shows a setting example of the dead time Td according to this embodiment. FIG. 5 shows a setting example of the maximum dead time Tdmax and the minimum dead time Tdmin according to this embodiment.

Note that the maximum dead time Tdmax is the maximum value that can be set as the dead time Td, and corresponds to a specific example of the "maximum delay time" in the present invention. Also, the minimum dead time Tdmin is the minimum value that can be set as the dead time Td, and corresponds to a specific example of the "minimum delay time" in the present invention.

In the present embodiment, first, as shown in FIG. 4, the drive circuit 5 in the control circuit 7 determines the dead time according to the magnitude relationship between the measurement time T1 and the reference time Tref (increase or decrease in the integral value Ie). It is designed to shorten or lengthen Td.

Specifically, the drive circuit 5 shortens the dead time Td when the integrated value Ie decreases because the value of the measured time T1 is greater than the reference time Tref (T1>Tref). On the other hand, the driving circuit 5 extends the dead time Td when the integrated value Ie increases because the value of the measurement time T1 is smaller than the reference time Tref (T1<Tref).

For example, as shown in FIG. 4, when the value of the dead time Td becomes larger than the maximum dead time Tdmax (Td>Tdmax), the integral value Ie is maintained and the dead time Td becomes the maximum dead time Tdmax. is set to Similarly, when the value of dead time Td is smaller than minimum dead time Tdmin (Td<Tdmin), integral value Ie is maintained and dead time Td is set to minimum dead time Tdmin.

In this manner, the drive circuit 5 sets the dead time Td at any time so that the measured time T1 converges to the reference time Tref, as described above.

Further, as shown in FIG. 5, for example, in the present embodiment, the values of the maximum dead time Tdmax and the minimum dead time Tdmin respectively correspond to the operation states of the switching power supply 1 (for example, DC output current Iout, DC input voltage Vin, DC output voltage Vout, etc.).

Specifically, for example, as shown in FIG. 5, when the value of the DC output current Iout as the operating state of the switching power supply 1 becomes relatively small, the maximum dead time Tdmax and the minimum dead time Tdmin are changed to be relatively large. On the other hand, when the value of DC output current Iout becomes relatively large, the values of maximum dead time Tdmax and minimum dead time Tdmin are changed so as to become relatively small.

Further, as shown in FIG. 5, for example, when the value of the DC input voltage Vin or the DC output voltage Vout as the operating state of the switching power supply 1 becomes relatively small, the maximum dead time Tdmax and the minimum dead time Tdmax The values of dead time Tdmin are changed so as to be relatively small. On the other hand, when the value of DC input voltage Vin or DC output voltage Vout becomes relatively large, the values of maximum dead time Tdmax and minimum dead time Tdmin are changed to become relatively large.

Furthermore, as shown in FIG. 5, for example, when the value of the DC input voltage Vin or the value of the DC output current Iout abruptly changes (suddenly increases or decreases), the minimum dead time Tdmin The value is changed to be relatively large.

(D. action and effect)
Thus, in the present embodiment, the length of the dead time Td during switching drive is determined according to the magnitude of the integrated error value (integral value Ie) between the measurement time T1 and the reference time Tref. Since it is set by the control circuit 7 at any time, it is as follows. That is, it is possible to shorten the period in which the above-described reverse voltage is generated in the switching element S2 while ensuring the above-described ZVS in the switching element S2. Specifically, the dead time Td described above can be shortened, and the conduction loss in the switching element S2 (in the body diode described above) can be reduced. As a result, in the present embodiment, power loss in switching power supply 1 can be suppressed.

In particular, when GaN transistors are used as the switching elements S1 and S2, the reverse voltage drop is large as described above. That is, in this case, it can be said that the effect of suppressing the power loss in the switching power supply device 1 is particularly large due to the reduction in the conduction loss in the switching elements S1 and S2.

Also, as described above, since the conduction loss in the switching element S2 is reduced, it is possible to reduce the size and cost of the switching power supply 1.

Also, in the present embodiment, the dead time Td is set so that the above-described measurement time T1 converges to the reference time Tref, so the following is obtained. That is, as a result of being able to achieve ZVS in the switching element S2 described above more reliably, the power loss in the switching power supply device 1 can be further suppressed.

Furthermore, in the present embodiment, the values of the maximum dead time Tdmax and the minimum dead time Tdmin are changed according to the operating state of the switching power supply 1, so the following is obtained. That is, since the range of the dead time Td can be appropriately adjusted according to the operating state of the switching power supply 1, power loss in the switching power supply 1 can be further suppressed.

In addition, in this embodiment, when the value of the DC input voltage Vin or the value of the DC output current Iout suddenly changes, the value of the minimum dead time Tdmin is changed so as to be relatively large. from the following: That is, since the value of the minimum dead time Tdmin can be appropriately adjusted in response to a sudden change in the operating state of the switching power supply 1, power loss in the switching power supply 1 can be further suppressed.

Further, in the present embodiment, the rectifier circuit in the rectifier/smoothing circuit 4 is a so-called "center tap type" rectifier circuit. Become. That is, the number of rectifying elements is reduced to two (rectifying diodes 41 and 42), and as a result, it is possible to reduce the size, loss, and cost of the rectifying circuit.

<2. Variation>
Next, modifications (modifications 1 to 3) of the above embodiment will be described. In the following description, the same reference numerals are given to the same components as those in the embodiment, and the description thereof will be omitted as appropriate.

[Modification 1]
(composition)
FIG. 6 is a circuit diagram showing a schematic configuration example of a switching power supply (switching power supply 1A) according to Modification 1. As shown in FIG.

As in the embodiment, a system including the DC input power supply 10 and the switching power supply device 1A corresponds to a specific example of the "power supply system" of the present invention.

The switching power supply 1A of Modification 1 is provided with a transformer 3A and a rectifying/smoothing circuit 4A instead of the transformer 3 and the rectifying/smoothing circuit 4 in the switching power supply 1 (see FIG. 1) of the embodiment. They correspond, and other configurations are the same.

The transformer 3A has one primary winding 31 and one secondary winding 32. That is, the transformer 3 is provided with two secondary windings 321 and 322, whereas the transformer 3A is provided with only one secondary winding 32. FIG. The secondary winding 32 has a first end connected to a connection point P7 in the rectification/smoothing circuit 4A, which will be described later, and a second end connected to a connection point P8 in the rectification/smoothing circuit 4A.

Like the transformer 3, the transformer 3A also converts the voltage (rectangular pulse wave voltage) generated by the inverter circuit 2 and outputs an AC voltage from the end of the secondary winding 32. there is In this case, the degree of voltage conversion of the DC output voltage Vout with respect to the DC input voltage Vin is determined by the turns ratio between the primary winding 31 and the secondary winding 32 and the switching frequency fsw described above. .

The rectifying/smoothing circuit 4A has four rectifying diodes 41 to 44 and one output smoothing capacitor Cout. Specifically, the rectifying/smoothing circuit 4A includes a rectifying circuit having rectifying diodes 41 to 44 and a smoothing circuit having an output smoothing capacitor Cout. In other words, the rectifying/smoothing circuit 4A is obtained by changing the configuration of the rectifying circuit in the rectifying/smoothing circuit 4. FIG.

The rectifier circuit of Modification 1 is a so-called "bridge type" rectifier circuit, unlike the rectifier circuit of the embodiment (so-called "center tap type" rectifier circuit). That is, the cathodes of rectifier diodes 41 and 43 are connected to output line LO, respectively, and the anode of rectifier diode 41 is connected to the cathode of rectifier diode 42 and the first end of secondary winding 32 at connection point P7. It is connected. The anodes of the rectifier diodes 42 and 44 are connected to the ground line LG, respectively, and the cathode of the rectifier diode 44 is connected to the anode of the rectifier diode 43 and the second end of the secondary winding 32 at the connection point P8. It is connected.

In the rectifying/smoothing circuit 4A having such a configuration, as in the rectifying/smoothing circuit 4, the rectifying circuit including the rectifying diodes 41 to 44 rectifies and outputs the AC voltage output from the transformer 3A. It's becoming

(action/effect)
In the switching power supply device 1A of Modification 1 having such a configuration, basically, it is possible to obtain the same effect by the same operation as the switching power supply device 1 of the embodiment.

In addition, particularly in this modified example 1, the rectifying circuit in the rectifying/smoothing circuit 4A is a bridge-type rectifying circuit. ) becomes one (secondary winding 32), which decreases. As a result, it is possible to reduce the size and loss of the transformer 3A.

[Modifications 2 and 3]
In the switching power supply devices (switching power supply devices 1B and 1C) according to modified examples 2 and 3, the rectifying circuits in the rectifying/ smoothing circuits 4 and 4A in the embodiment and modified example 1 described above are respectively described below. As will be explained, it is a so-called synchronous rectification circuit. Further, in accordance with the provision of such a synchronous rectification circuit, in the switching power supply devices 1B and 1C of these modified examples 2 and 3, instead of the control circuit 7 of the embodiment and the modified example 1, respectively, There are provided control circuits 7B and 7C for controlling.

(Configuration of modification 2)
Specifically, FIG. 7 is a circuit diagram showing a schematic configuration example of a switching power supply device 1B according to Modification 2. As shown in FIG.

It should be noted that, as in the embodiment and modification 1, a system including the DC input power supply 10 and the switching power supply device 1B corresponds to a specific example of the "power supply system" of the present invention.

The switching power supply device 1B of Modification 2 corresponds to the switching power supply device 1 of the embodiment provided with a rectifying/smoothing circuit 4B and a control circuit 7B instead of the rectifying/smoothing circuit 4 and the control circuit 7, respectively. , and other configurations are the same.

In the synchronous rectification circuit (rectification/smoothing circuit 4B) in this modified example 2, as shown in FIG. M10). In this synchronous rectification circuit, the MOS transistors M9 and M10 themselves are controlled to be turned on (perform synchronous rectification) in synchronization with the period during which the parasitic diodes of the MOS transistors M9 and M10 are conducting. be. Specifically, in Modification 2, a drive circuit 5 in a control circuit 7B, which will be described later, uses drive signals SG9 and SG10 to control the on/off operations of the MOS transistors M9 and M10. (see Figure 7).

It should be noted that such MOS transistors M9 and M10 each correspond to a specific example of a "switching element that performs synchronous rectification" in the present invention.

Further, the control circuit 7B of Modification 2 basically includes the time measurement circuit 61, the integration circuit 62 and the drive circuit 5, similarly to the control circuit 7 of the embodiment and Modification 1. there is However, unlike the control circuit 7, the control circuit 7B is configured as follows.

First, in the control circuit 7, both of the two switching elements S2 and S1 (corresponding to the "first and second switching elements" in the present invention) for which the dead time Td is to be set are included in the inverter circuit 2. It was an arranged switching element. On the other hand, in the control circuit 7B, at least one of the two switching elements (corresponding to "first and second switching elements" in the present invention) for which the dead time Td is to be set is the rectifying/smoothing circuit described above. 4B is a switching element (at least one of the MOS transistors M9 and M10 described above) that performs synchronous rectification.

Specifically, in the control circuit 7B, the two switching elements for which the dead time Td is to be set are as shown in (a) or (b) below.
(a) One of the switching elements S1 and S2 and one of the MOS transistors M9 and M10 are the two switching elements for which the dead time Td is set. (b) The MOS transistors M9 and M10. are two switching elements for which the dead time Td is set.

Then, the control circuit 7B, based on the voltage across one of these two switching elements (corresponding to the "first switching element" in the present invention), is controlled according to the embodiment and modification 1. Similarly, the dead time Td is set. Specifically, the control circuit 7B determines the length of the dead time Td during switching drive according to the magnitude of the integrated error value (integrated value Ie) between the measurement time T1 and the reference time Tref. be set at any time. Then, the control circuit 7B uses the dead time Td thus set at any time to perform switching operations in a plurality of switching elements (switching elements S1 and S2 and MOS transistors M9 and M10) including the two switching elements described above. , respectively.

It should be noted that such a control circuit 7B corresponds to a specific example of the "switching control device" of the present invention. Further, in this modified example 2, the switching elements S1 and S2 and the MOS transistors M9 and M10 described above each correspond to a specific example of "a plurality of switching elements" in the present invention. Further, any two of these switching elements S1, S2 and MOS transistors M9, M10 (the two switching elements described above) are the "first switching element" and the "second switching element" in the present invention. corresponds to a specific example of

(Configuration of Modified Example 3)
FIG. 8 is a circuit diagram showing a schematic configuration example of a switching power supply device 1C according to Modification 3. As shown in FIG.

It should be noted that, as in the embodiment and modified examples 1 and 2, a system including the DC input power supply 10 and the switching power supply device 1C corresponds to a specific example of the "power supply system" of the present invention.

The switching power supply 1C of Modification 3 corresponds to the switching power supply 1A of Modification 1 in which a rectifying/smoothing circuit 4C and a control circuit 7C are provided instead of the rectifying/smoothing circuit 4A and the control circuit 7, respectively. , and other configurations are the same.

In the synchronous rectification circuit (rectification/smoothing circuit 4C) according to Modification 3, as shown in FIG. M14). Also in the synchronous rectifier circuit of this modified example 3, similarly to the synchronous rectifier circuit of the modified example 2, the MOS transistors M11 to M14 are synchronized with the period during which the parasitic diodes of the MOS transistors M11 to M14 are conductive. M14 itself is also controlled to be on (perform synchronous rectification). Specifically, in Modification 3, a drive circuit 5 in a control circuit 7C, which will be described later, uses drive signals SG11 to SG14 to control the on/off operations of the MOS transistors M11 to M14. (see Figure 8).

It should be noted that such MOS transistors M11 to M14 each correspond to a specific example of a "switching element that performs synchronous rectification" in the present invention.

Further, the control circuit 7C of Modification 3 basically has the above-described time measurement circuit 61, integration circuit 62 and drive circuit 5, similarly to the control circuit 7 of the embodiment and Modification 1. there is However, this control circuit 7C is different from the control circuit 7, and like the control circuit 7B described in the modified example 2, it is configured as follows.

That is, in the control circuit 7C, at least one of the two switching elements (corresponding to the "first and second switching elements" in the present invention) for which the dead time Td is set is located in the rectifying/smoothing circuit 4C. A switching element (at least one of the MOS transistors M11 to M14 described above) that performs synchronous rectification is arranged in the .

Specifically, in the control circuit 7C, the two switching elements for which the dead time Td is to be set are as indicated by (c) or (d) below.
(c) One of the switching elements S1 and S2 and one of the MOS transistors M11 to M14 are the two switching elements for which the dead time Td is set. (d) MOS transistors M11 to M14. are two switching elements for which the dead time Td is to be set.

Then, the control circuit 7C, based on the voltage across one of these two switching elements (corresponding to the "first switching element" in the present invention), is controlled according to the first embodiment and the first modification. , 2, the dead time Td is set. Specifically, the control circuit 7C determines the length of the dead time Td during switching drive according to the magnitude of the integrated error value (integrated value Ie) between the measurement time T1 and the reference time Tref. be set at any time. Then, the control circuit 7C uses the dead time Td set at any time in this manner to perform the switching operations of the plurality of switching elements (the switching elements S1 and S2 and the MOS transistors M11 to M14) including the two switching elements described above. , respectively.

It should be noted that such a control circuit 7C corresponds to a specific example of the "switching control device" of the present invention. Further, in this modified example 3, the switching elements S1 and S2 and the MOS transistors M11 to M14 described above each correspond to a specific example of "a plurality of switching elements" in the present invention. Further, any two of these switching elements S1, S2 and MOS transistors M11 to M14 (the two switching elements described above) are the "first switching element" and the "second switching element" in the present invention. corresponds to a specific example of

(Actions and effects of modifications 2 and 3)
In the switching power supply devices 1B and 1C of Modifications 2 and 3 having such configurations, basically, the same effects as those of the switching power supply devices 1 and 1A described above can be obtained. It is possible.

In addition, especially in these modified examples 2 and 3, a plurality of rectifying elements (rectifying diodes) in the rectifying circuit are each composed of a switching element, and the rectifying circuit is a synchronous rectifying circuit. It looks like this: That is, such a synchronous rectification circuit reduces the conduction loss during rectification, so that it is possible to reduce the size and loss of the rectification circuit. In addition to the above-described MOS-FETs, such switching elements include, for example, the above-described HEMTs, IGBTs with diodes added in parallel, bipolar transistors, and the like.

<3. Other modified examples>
Although the present invention has been described above with reference to the embodiments and modifications, the present invention is not limited to these embodiments and the like, and various modifications are possible.

For example, in the above embodiments and the like, the configuration of the inverter circuit was specifically described, but it is not limited to the examples of the above embodiments and the like. good too. Specifically, for example, the arrangement relationship between the resonant inductor Lr, the resonant capacitor Cr, and the primary winding 31, which are connected in series with each other, is not limited to the arrangement relationship described in the embodiment and the like. The two arrangement positions may be in random order with respect to each other. Further, in the above embodiments and the like, an example of a so-called "half-bridge type" inverter circuit has been described, but the invention is not limited to this example, and a so-called "full-bridge type" inverter circuit, for example, may be used.

Further, in the above-described embodiments and the like, the configuration of the transformer (primary winding and secondary winding) has been specifically described. (Primary winding and secondary winding) may have other configurations.

Furthermore, in the above-described embodiments and the like, the configuration of the rectifying and smoothing circuit (rectifying circuit and smoothing circuit) was specifically described, but it is not limited to the examples of the above-described embodiments and the like. A rectifying circuit and a smoothing circuit) may have other configurations.

In addition, in the above-described embodiments and the like, the method of controlling the operation of each switching element (switching drive) by the drive circuit has been specifically described. You may make it use another method as a method of .

In addition, in the above embodiments and the like, a DC-DC converter has been described as an example of a switching power supply device according to the present invention, but the present invention is applicable to other types of switching power supply devices such as an AC-DC converter. It can also be applied to

Further, each configuration example described so far may be applied in any combination.

Claims (11)

1. A transformer having a primary winding and a secondary winding, an inverter circuit arranged between an input terminal pair to which an input voltage is input and the primary winding, and an output from which an output voltage is output. A control device applied to a switching power supply device comprising a rectifying/smoothing circuit arranged between a terminal pair and the secondary winding,
   When the voltage across the first switching element in the OFF state of the plurality of switching elements included in at least one of the inverter circuit and the rectifying/smoothing circuit becomes equal to or lower than the reference voltage, the first switching element a time measurement circuit that measures the time until the switching element switches from the off state to the on state and outputs the measured time;
   an integration circuit that compares the measured time with a reference time to obtain an integrated error value between the measured time and the reference time;
   The delay time from when the second switching element among the plurality of switching elements switches from the ON state to the OFF state to when the first switching element switches from the OFF state to the ON state is the error a drive circuit that is set at any time according to an integral value and uses the set delay time to control the switching operations of the plurality of switching elements including the first and second switching elements; Control device.
2. The switching control device according to claim 1, wherein the drive circuit sets the delay time so that the measured time converges to the reference time.
3. The drive circuit is
   shortening the delay time when the error integral value decreases because the value of the measured time is greater than the reference time;
   The switching control device according to claim 2, wherein the delay time is extended when the error integral value increases because the value of the measured time is smaller than the reference time.
4. The switching control device according to any one of claims 1 to 3, wherein the reference voltage is a predetermined negative voltage.
5. a maximum delay time that is the maximum value that can be set as the delay time;
   The minimum delay time, which is the minimum value that can be set as the delay time, is changed according to the operating state of the switching power supply device. A switching controller as described.
6. When the value of the output current as the operating state of the switching power supply device becomes relatively small, the values of the maximum delay time and the minimum delay time are changed so as to become relatively large. ,
   when the value of the output current becomes relatively large, the values of the maximum delay time and the minimum delay time are changed so as to become relatively small;
   When the value of the input voltage or the output voltage as the operating state of the switching power supply device becomes relatively small, the values of the maximum delay time and the minimum delay time become relatively small. is changed to
   6. The method according to claim 5, wherein when the input voltage or the output voltage has a relatively large value, the maximum delay time and the minimum delay time are changed so as to have relatively large values. switching controller.
7. When the value of the input voltage or the value of the output current of the switching power supply changes suddenly,
   The switching control device according to any one of claims 1 to 6, wherein a value of a minimum delay time, which is a minimum value that can be set as the delay time, is changed so as to be relatively large.
8. The switching control device according to any one of claims 1 to 7, wherein both the first and second switching elements are switching elements arranged in the inverter circuit.
9. 8. The switching element according to any one of claims 1 to 7, wherein at least one of the first and second switching elements is arranged in the rectifying/smoothing circuit and is a switching element that performs synchronous rectification. Switching controller.
10. A switching control device according to any one of claims 1 to 9;
    the input terminal pair, the output terminal pair, the transformer, the inverter circuit, the rectifying/smoothing circuit,
    A switching power supply with
11. a switching power supply device according to claim 10;
    A power supply system comprising: a power supply that supplies the input voltage to the input terminal pair.
    
    

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