WO2023020202A1

WO2023020202A1 - Integrated circuit, communication method, and communication system

Info

Publication number: WO2023020202A1
Application number: PCT/CN2022/107454
Authority: WO
Inventors: 杨巍
Original assignee: 北京希姆计算科技有限公司
Priority date: 2021-08-16
Filing date: 2022-07-22
Publication date: 2023-02-23
Also published as: CN115913468A

Abstract

Disclosed in the embodiments of the present invention are an integrated circuit, a communication method, and a communication system. The method in the embodiments of the present invention comprises: first, performing data verification on a received data packet; detecting the serial number of the data packet after data verification is passed, so as to generate a serial number detection result; and generating feedback information according to the serial number detection result, and sending the feedback information. Therefore, the reliability of data transmission can be improved.

Description

Integrated circuit, communication method and communication system

This application claims the priority of the Chinese patent application with application number 2021109390652 and titled "Integrated Circuit, Communication Method and Communication System" filed on August 16, 2021, the entire contents of which are incorporated by reference in this application.

technical field

The present invention relates to the technical field of communication, and more specifically, to an integrated circuit, a communication method and a communication system.

Background technique

With the rapid development of artificial intelligence, human beings are entering the era of comprehensive intelligence. In the context of comprehensive intelligence, the amount of data that corresponding hardware devices need to process is increasing, and the demand for hardware computing power is also increasing. At present, integrated circuits are widely used in order to improve hardware computing capabilities, so how to improve the reliability of data transmission between terminals in the integrated circuit is crucial.

Contents of the invention

In view of this, embodiments of the present invention provide an integrated circuit, a communication method, and a communication system, so as to improve the reliability of data transmission.

In a first aspect, an embodiment of the present invention provides a communication method, the method comprising:

receive packets;

Perform data verification on the data packet;

In response to the data packet passing the verification, detecting the serial number of the data packet, and generating a serial number detection result;

Generate feedback information according to the serial number detection result.

Optionally, generating feedback information according to the serial number detection result includes:

In response to the sequence number of the data packet being the same as the sequence number to be received, generating a first feedback message, the first feedback message indicates that the data packet is a normal packet;

Generate feedback information according to the first feedback message and the sequence number to be received.

In response to the sequence number of the data packet being smaller than the sequence number to be received, generating a second feedback message, the second feedback message is used to indicate that the data packet is a duplicate packet;

Generate feedback information according to the second feedback message and the sequence number to be received.

In response to the sequence number of the data packet being greater than the sequence number to be received, generating a third feedback message, the third feedback message is used to indicate that the data packet is an invalid packet;

Generate feedback information according to the third feedback message and the sequence number to be received.

Optionally, the feedback information includes the type of the data packet detection result and the sequence number of the last received normal packet corresponding to the data sending end.

Optionally, performing data verification on the data packet includes:

Determine the target verification method according to the type of the verification code in the data packet;

Perform data verification on the data packet according to the target verification method.

Optionally, the method also includes:

In response to the data packet failing the check, the data packet is filtered.

In a second aspect, an embodiment of the present invention provides an integrated circuit, and the integrated circuit includes:

The verification circuit is configured to perform data verification on the received data packet and generate verification information;

An error packet filtering unit configured to filter the data packets according to the verification information;

A serial number detection unit configured to detect the serial number of the received data packet and generate a serial number detection result; and

A control unit configured to generate and send feedback information according to the serial number detection result.

Optionally, the control unit includes a normal packet filtering module;

The sequence number detection unit is further configured to send the sequence number detection result to the normal packet filtering module in response to the sequence number detection result being that the sequence number of the data packet is the same as the sequence number to be received;

The normal packet filtering module is configured to generate a first feedback message according to the sequence number detection result, and the first feedback message indicates that the data packet is a normal packet.

Optionally, the control unit includes a repeated packet filtering module;

The sequence number detection unit is further configured to send the sequence number detection result to the duplicate packet filtering module in response to the sequence number detection result being that the sequence number of the data packet is smaller than the sequence number to be received;

The duplicate packet filtering module is configured to generate a second feedback message according to the sequence number detection result, and the second feedback message indicates that the data packet is a duplicate packet.

Optionally, the control unit includes an invalid packet filtering module;

The sequence number detection unit is further configured to send the sequence number detection result to the invalid packet filtering module in response to the sequence number detection result being that the sequence number of the data packet is greater than the sequence number to be received;

The invalid packet filtering module is configured to generate a third feedback message according to the sequence number detection result, and the third feedback message indicates that the data packet is an invalid packet.

Optionally, the control unit includes:

The information feedback module is configured to generate and send the feedback information, the feedback information includes the type of the data packet detection result and the sequence number of the last received normal packet corresponding to the data sending end.

Optionally, the integrated circuit also includes a timeout monitoring unit;

The error packet filtering unit is also configured to send a data packet error message to the timeout monitoring unit in response to the data packet being an error packet;

The timeout monitoring unit is configured to reset the sequence number detection unit and the information feedback module after a preset monitoring time in response to receiving a packet error message, so as to clear the error packet.

Optionally, the verification circuit is further configured to determine a target verification method according to the type of the verification code in the data packet, and perform data verification on the data packet according to the target verification method.

In a third aspect, an embodiment of the present invention provides a communication system, and the communication system includes:

at least one integrated circuit as described above; and

At least one remote integrated circuit configured to transmit data packets.

Optionally, the remote integrated circuit is further configured to delete the sent normal packet or repeated packet in response to the sent data packet being a normal packet or a repeated packet.

Optionally, the remote integrated circuit is further configured to send the next data packet according to the sequence number in the feedback information in response to the sent data packet being an invalid packet.

In the embodiment of the present invention, data verification is first performed on the received data packet, and the serial number of the data packet is detected after the data verification is passed, the serial number detection result is generated, and feedback information is generated and sent according to the serial number detection result, by Therefore, the reliability of data transmission can be improved.

Description of drawings

Through the following description of the embodiments of the present invention with reference to the accompanying drawings, the above and other objects, features and advantages of the present invention will be more clear, in the accompanying drawings:

FIG. 1 is a schematic diagram of a d2d system in the related art;

FIG. 2 is a flow chart of a communication method in the related art;

Fig. 3 is a flowchart of a communication method according to an embodiment of the present invention;

Fig. 4 is the schematic diagram of the data packet of the embodiment of the present invention;

Fig. 5 is a schematic diagram of feedback information according to an embodiment of the present invention;

6 is a schematic diagram of an integrated circuit according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a communication system according to an embodiment of the present invention;

FIG. 8 is an interaction flowchart of a communication method according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of data verification according to an embodiment of the present invention.

Detailed ways

The present invention is described below based on examples, but the present invention is not limited to these examples. In the following detailed description of the invention, some specific details are set forth in detail. The present invention can be fully understood by those skilled in the art without the description of these detailed parts. In order not to obscure the essence of the present invention, well-known methods, procedures, procedures, components and circuits have not been described in detail.

Additionally, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.

Unless the context clearly requires, the words "including", "including" and similar words in the description should be interpreted as inclusive rather than exclusive or exhaustive; that is, "including but not limited to".

In the description of the present invention, it should be understood that the terms "first", "second" and so on are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

In hardware devices, integrated circuits are the main components, and chips are mostly the core of integrated circuits. Therefore, the chip technology and computing power determine the upper limit of data processing of hardware products. With the development of Moore's Law, chip design and manufacturing are getting closer and closer to the limit of Moore's Law, but the demand for hardware data processing is still rising. Among them, Moore's Law was proposed by Gordon Moore, one of the founders of Intel (Intel), and its content is: the number of transistors that can be accommodated on an integrated circuit will double approximately every two years. In this context, the miniaturization of chips (chiplets) and the packaging of multi-chip dies (die) have become the future hardware design trends for processing big data.

Small chip packaging, that is, packaging multiple chip dies into one chip (chip), can improve the mass production yield of chips and reduce design risks. Different chip dies are equivalent to different small chip systems, and in different small chips, there may be different data sources that need to communicate with different chips. In practice, the data sources in different chip dies must be Communication is carried out through the die to die (d2d, bare chip to bare chip) subsystem, and the communication module between d2d often uses analog devices, and analog devices will have BER (Bit error rate, bit error rate) in the communication process Therefore, when an error occurs, how to correctly discard the erroneous data at the receiving end and ensure the integrity of the received data becomes the key to reliable transmission between chips.

FIG. 1 is a schematic diagram of a related art d2d system. As shown in FIG. 1, the d2d system 1 includes two

chips

21 and 22, and each chip mainly includes SoC logic (System on Chip, system on chip) and d2d subsystem logic (d2d subsys). Taking chip 21 as an example, chip 21 includes SoC 211 and d2d subsystem logic 212 . The d2d subsystem logic 212 includes a d2d control module 2121 and a d2d physical layer circuit 2122 . Wherein, the d2d control module is a controller digital circuit logic (d2d controller).

Chip 21 and chip 22 perform data transmission and communication through d2d subsys. However, the d2d physical layer circuit (d2d phy) in d2d subsys will have a BER phenomenon in high-speed data transmission, that is, it cannot guarantee that the transmitted data is 100% correct, so there will be a certain probability of error at the receiving end, and frame loss for erroneous data Processing is the key to ensure reliable data processing at the receiving end.

FIG. 2 is a flowchart of a communication method in the related art. As shown in Figure 2, the communication method of the related art includes the following steps:

In step S110, chip A receives a data packet or a heartbeat packet from chip B. Wherein, the data packet contains data information and ID (IDentity) information, and the heartbeat packet only contains ID information. In the communication transmission, the heartbeat packet can be periodically sent to detect packet loss through the ID information in the heartbeat packet. Wherein, the ID information is the serial number of the data packet or the heartbeat packet, and is used to identify the data packet or the heartbeat packet.

In step S120, chip A reads the ID information in the heartbeat packet or data packet, and compares it with the ID information of the data packet sent by chip B last time. Among them, chip A will send data packets to chip B, and maintain the ID of the data packets sent to chip B. The latest data packet ID sent by chip B refers to the ID information of the data packet sent by chip A to chip B last time.

Step S130, determine whether the ID information in the heartbeat packet or data packet read by chip A is equal to the ID information of the data packet stored in chip A and sent to chip B last time, if they are equal, execute step S140, if not, Execute step S150.

In the related technology, after chip A sends data packet a to chip B, it stores the ID information of the data packet a, and after receiving the data packet a, chip B sends data packet b (or heartbeat packet b) to chip A, the The data packet b (or heartbeat packet b) contains the ID information of the data packet a recently received from chip A, so chip A can judge the ID information of the data packet a in storage and the received data packet Whether the ID information in b is consistent is to determine whether chip B has successfully received the data packet it sent last time, so as to ensure the reliability of communication transmission.

In step S140, it is determined that chip B has successfully received the latest data packet sent by chip A, and chip A updates the corresponding ID information and adds it to the next data packet sent to chip B. That is to say, when the ID information of the data packet received by chip A is equal to the last stored ID of the data packet sent to chip B, it is determined that chip B has successfully received the data packet sent by chip A last time, and chip A updates The corresponding ID information is added to the data packet sent to chip B next time. For example, assuming that the ID information is accumulated sequentially according to the number of sent data packets, the ID information of the last data packet sent to chip B stored in chip A is 5, and the ID information of the data packet received from chip B is also 5, Then it is determined that chip B has successfully received the data packet sent by chip A last time, and when chip A sends the data packet to chip B next time, chip A will update the corresponding ID information to 6, and the updated ID information 6 is added to the data packet sent to chip B next time, so as to judge the reliability of the data packet sent next time.

Step S150, determining that chip B has not received the latest data packet sent by chip B, chip A updates the corresponding ID information and adds it to the latest data packet sent, and sends the data packet to chip B. That is to say, when the ID information of the data packet received by chip A is not equal to the ID information of the last data packet sent to chip B stored by chip A, it is determined that chip B has not received the data packet sent by chip A last time, and chip A Update the corresponding ID information and add it to the data packet sent last time, and send the data packet to chip B. For example, it is also assumed that the ID information is accumulated sequentially according to the number of data packets sent, the last ID information stored in chip A is 5, and the ID information of the data packet received from chip B is 4, then it is determined that chip B only receives The data corresponding to the acknowledgment ID sent by chip A is 4, and the data packet corresponding to the ID information sent by chip A last time is 5 is not received, that is, packet loss occurs. When sending normally, it is necessary to add one to the ID information before sending. At this time, chip A updates the corresponding ID information to 5, which remains unchanged, and adds the updated ID information 5 to the last sent data packet. , to send the data packet to chip B, that is, to resend the last sent data packet to chip B.

In the related technology, the chips at both ends of the communication record locally the IDs of the data packets sent by the other party and the IDs of the data packets recently sent to the other party locally, and determine whether there is packet loss through comparison, thereby improving the reliability of communication. However, this method requires double processing logic and increases the implementation complexity. Moreover, when there is large inter-chip data communication and the inter-chip delay is large, for example, the data sending end continuously sends data packets with ID=0, 1, and 2. At this time, the chip sending end records ID=2 locally. Due to the delay problem , when 0 arrives at the receiving chip, data packets 1 and 2 have been sent from the sending chip, and on the way of sending, the receiving end only receives the ID=0 data packet, then the receiving end receives the packet ID=0, that is, the data packet 1, 2 has been sent from the sender but the receiver has not yet received it. At this time, the ID of the data packet that the receiver wants to feed back to the sender is ID = 0, while the local record of the sender is ID = 2, and then the ID of the sender will appear Statistical matching errors, so the reliability of communication transmission in this way is low. Therefore, this embodiment provides an integrated circuit, a communication method and a communication system, so as to improve the reliability of communication transmission.

Fig. 3 is a flowchart of a communication method according to an embodiment of the present invention. As shown in Figure 3, the communication method of this embodiment includes the following steps:

Step S210, receiving a data packet. Taking the d2d system as an example, the chip receives data packets sent by the remote chip. Wherein, the data packet includes original data and a corresponding serial number, and the original data refers to data to be transmitted. Among them, the format of the data packet can be summarized as including the header position and the non-header position, the non-header position is the original data position, and the data in the header position is the control information of the data packet, such as packet type, packet length, serial number and other information.

Fig. 4 is a schematic diagram of a data packet according to an embodiment of the present invention. As shown in Figure 4, the data length of the original data in the data packet 4 can be any length between 0 and 1024DW (Data word, word length, 4 bytes). The length of the serial number in the data packet 4 may be 12 bits, that is, the serial number may be 0-4095 (decimal notation). It should be understood that the data packet structure in this embodiment is only exemplary, and its data length and serial number can be set based on specific application scenarios. If the original data sent is long and has a large amount of data, the original The data length of the data location and the number of digits of the serial number.

Step S220, performing data verification on the data packet.

In an optional implementation, taking the d2d system as an example, the physical layer circuit (d2d phy) of the chip will check the data integrity of the data packet after receiving the data packet, and give an indication message rx_err to represent Data correctness in the packet. Wherein, the error in the data in the data packet can be expressed as the error in the data packet, which includes two cases, that is, there is an error in the position data of the packet header, or there is an error in the position data of the non-packet header.

In an optional implementation, the data packet also includes a check code, and step S220 includes: determining a target verification method according to the type of the check code in the data packet, and performing a check on the data packet according to the target check method Data validation. That is to say, the data verification method of the data receiving end corresponds to the data processing of the data sending end. For example, if the data sending end adds a cyclic redundancy check code to the data, the data receiving end uses the corresponding cyclic redundancy check method for data verification; if the data sending end adds other check codes to the data, for example Parity check code, Hamming check code, etc., the data receiving end needs to use the corresponding check method to check the data packet.

Step S230, in response to the data packet passing the check, detect the serial number of the data packet, and generate a serial number detection result.

In an optional implementation manner, after the data packet passes the data integrity check, the sequence number in the data packet is detected according to the sequence number to be received, and a sequence number detection result is generated. Wherein, the sequence number to be received is the sequence number of the next data packet to be received from the corresponding data sending end. Since the sequence number to be received is maintained at the receiving end, the receiving end can judge whether the currently received data packet is abnormal by comparing the locally maintained sequence number to be received with the sequence number in the currently received data packet. For example, assuming that the sequence number of the last received data packet from the data sender is 5, then the sequence number of the next data packet to be received from the corresponding data sender is 6, that is, the sequence number to be received is 6. Then if the data transmission is normal, the sequence number in the currently received data packet should be 6.

Optionally, a sequence number detection result is generated by comparing the relationship between the sequence number of the data packet and the sequence number to be received. Wherein, the sequence number detection result may be that the sequence number of the data packet is the same as the sequence number to be received, or the sequence number of the data packet is before the sequence number to be received, or the sequence number of the data packet is after the sequence number to be received.

In an optional implementation manner, if the data packet fails the data integrity check of the physical layer circuit, that is, the data packet has an error, the data packet is filtered. Further optionally, since the data error in the data packet may occur in the middle position, the data is not completely received when the data error is detected, so in this embodiment, after waiting for a predetermined monitoring time, clear the remaining data packet, to ensure that bad packets are completely cleared. After the receiving end filters the wrong data packet, it may not be able to feed back the information of the wrong data packet to the sending end. Optionally, the data sending end is provided with a timeout mechanism. If the feedback information about the data packet is not received within a predetermined time, That is, it is determined that the data packet has an error, and the data packet is resent.

Step S240, generating feedback information according to the detection result of the serial number. Optionally, the feedback information includes the type of the data packet detection result and the sequence number of the last normal packet received from the corresponding data sending end. Wherein, the type of the detection result of the data packet is used to represent the detection result of the sequence number of the data packet, for example, the data is normal, the data is repeated, and the data is invalid. The sequence number of the normal packet received last time corresponding to the data sender refers to the sequence number of a normal packet closest to the current time point. For example, suppose the sequence number of the currently received data packet is 5, and the previously received data packet is The sequence number of the normal packet is 4. If the currently received data packet is determined to be a normal packet after step S230, the sequence number of the latest normal packet received from the corresponding data sender is 5. If it is determined through step S230 that the currently received data packet is not a normal packet, the sequence number of the last normal packet received from the corresponding data sending end is 4.

Fig. 5 is a schematic diagram of feedback information according to an embodiment of the present invention. As shown in FIG. 5 , the feedback information 5 includes the message type (that is, the type of the data packet detection result) and the sequence number of the last normal packet received. Optionally, the message type in the feedback information 5 occupies 4 bits, and the sequence number occupies 12 bits. It should be understood that this embodiment does not limit this. Optionally, the message type corresponding to 1000 (binary representation) is set to indicate that the data packet received this time is a normal packet, the message type corresponding to 1001 is set to indicate that the data packet received this time is a duplicate packet, and the message type corresponding to 1010 is set It indicates that the data packet received this time is an invalid packet, and other values are reserved for extended use. It should be understood that the above settings are only exemplary, and are not limited by this embodiment.

In an optional implementation manner, step S240 includes: generating a first feedback message in response to the sequence number of the data packet being the same as the sequence number to be received. Wherein, the first feedback message indicates that the data packet is a normal packet. After the data packet is determined to be a normal data packet, information for feeding back the normal packet to the sending end may be further generated. In an optional implementation, if the sequence number detection result is that the sequence number of the data packet is the same as the sequence number to be received, a first feedback message is generated, and feedback information is generated according to the first feedback message and the sequence number to be received . In this case, the message type in the feedback information indicates that the data packet received this time is a normal packet, and the sequence number in the feedback information is the sequence number of the normal packet sent by the data sending end received last time (that is, the current The sequence number of the received packet). For example, if the sequence number of the currently received data packet is 5, and the sequence number to be received is also 5, and the data packet is a normal packet, then the message type in the feedback information is 1000, and the sequence number is 5.

In an optional implementation manner, step S240 includes: generating a second feedback message in response to the sequence number of the data packet being smaller than the sequence number to be received. Wherein, the second feedback message is used to indicate that the data packet is a repeated packet. After the data packet is determined to be a normal repeated packet, the repeated packet can be filtered, and at the same time, information for feeding back the repeated packet to the sending end is generated, so that the sending end sends a normal data packet. In an optional implementation manner, if the sequence number detection result is that the sequence number of the data packet is smaller than the sequence number to be received, a second feedback message is generated, and the feedback information is generated according to the second feedback message and the sequence number to be received. In this case, the message type in the feedback information indicates that the data packet received this time is a repeated packet, and the sequence number in the feedback information is the sequence number of the last normal packet received (that is, the previous sequence number of the sequence number to be received). serial number). For example, the sequence number of the currently received data packet is 3, and the sequence number to be received is also 5. Among them, the serial number to be received is 5, that is, the data receiving end has successfully received the data packet with the serial number 0-4 sent by the corresponding data sending end, that is, the currently received data packet with the serial number 3 is a duplicate packet , and the last time the sequence number of the normal packet received from the corresponding data sender is 4, the message type in the feedback information is 1001 and the sequence number is 4, to notify the corresponding data sender that it has successfully received the corresponding data sender. A data packet with a sequence number of 0-4 makes the data sender send a data packet with a sequence number of 5.

In an optional implementation manner, step S240 includes: generating a third feedback message in response to the sequence number of the data packet being greater than the sequence number to be received. Wherein, the third feedback message is used to ensure that the data packet is an invalid packet. After the data packet is determined to be a normal invalid packet, the invalid packet can be filtered, and at the same time, information for feeding back the invalid packet to the sender is generated, so that the sender sends a normal data packet. In an optional implementation manner, if the result of the sequence number detection is that the sequence number of the data packet is greater than the sequence number to be received, a third feedback message is generated, and feedback information is generated according to the third feedback message and the sequence number to be received. In this case, the message type in the feedback information indicates that the data packet received this time is an invalid packet, and the sequence number in the feedback information is the sequence number of the last normal packet received (that is, the previous sequence number of the sequence number to be received). serial number). For example, the sequence number of the currently received data packet is 7, and the sequence number to be received is also 5. Among them, the serial number to be received is 5, that is, the data receiving end has successfully received the data packet with the serial number 0-4 sent by the corresponding data sending end, but has not received the data packet after the serial number 4, which is normal Next, the serial number of the currently received data packet should be 5, so the currently received data packet with a serial number of 7 is an invalid packet, and the latest received normal packet with a serial number of 4 from the corresponding data sender, then the The message type is 1010, the sequence number is 4, to notify the corresponding data sender that the data packet with the sequence number 0-4 sent by the corresponding data sender has been successfully received, so that the data sender sends the data packet with the sequence number 5 .

Therefore, in this embodiment, the data sending end does not need to execute the judgment logic of the sequence number of the data packet sent to the corresponding data receiving end last time and the sequence number received from the data received data packet or the heartbeat packet, which can Determine whether the BER phenomenon occurs based on its own timeout mechanism and the feedback information of the data receiving end, and send the correct data packet to the data receiving end based on the feedback information, or based on the last saved sequence sent to the corresponding data packet when the timeout mechanism is activated number to resend the corresponding data packet, that is, this embodiment only needs the data receiving end to execute the judgment logic of the serial number of the received data packet and the serial number to be received, which reduces the processing logic compared to the double processing logic of the prior art implementation complexity. Moreover, since the data sending end sends the next data packet according to the serial number in the feedback information without verifying the serial number in the feedback information and the stored serial number information, the embodiment of the present invention also avoids the situation of matching errors, and further The reliability of communication transmission is improved.

FIG. 6 is a schematic diagram of an integrated circuit according to an embodiment of the present invention. As shown in FIG. 6 , the integrated circuit 6 of the embodiment of the present invention includes a verification circuit 61 (equivalent to the d2d physical layer circuit 2122 in FIG. 1 ), an error packet filtering power supply 62 , a serial number monitoring unit 63 and a control unit 64 . Further optionally, the control unit 64 further includes an information feedback module 644 . Optionally, the integrated circuit 6 further includes a timeout monitoring unit 65 . Wherein, taking the integrated circuit 6 as a chip in the d2d system as an example, the verification circuit 61 is equivalent to the d2d physical layer circuit 2122 in FIG. Unit 65 is equivalent to the d2d control module 2121 in FIG. 1 .

Wherein, the verification circuit 61 is configured to perform data verification on the received data packets to generate verification information. Optionally, after receiving the data packet, the verification circuit 61 will perform data integrity verification on the data, and give an indication message rx_err to represent the correctness of the data in the data packet. Optionally, the data packet also includes a check code. The verification circuit 61 performs data verification on the received data packet by using a corresponding verification method based on the type of the verification code added to the data by the data sending end. For example, if the data sending end adds a cyclic redundancy check code to the data, the data receiving end uses the corresponding cyclic redundancy check method for data verification; if the data sending end adds other check codes to the data, for example Parity check code, Hamming check code, etc., the data receiving end needs to use the corresponding check method to check the data packet.

In an optional implementation manner, the verification information includes a data packet rx_pkt and an indication message rx_err. Wherein, the data format of the data packet rx_pkt is shown in FIG. 4 , including original data and corresponding serial numbers. The indication message rx_err is used to characterize the correctness of the data packet. For example, if the indication message rx_err is 1, it indicates that the data packet has an error, wherein the format of the data packet can be summarized as including the position of the header and the position of the non-header (that is, the position of the original data). error, or non-header location data is incorrect. The indication message rx_err being 0 indicates that the data packet is correct, that is, the position data of the packet header is correct, and the position data of the non-packet header is correct. Further optionally, the verification information also includes data indication information rx_valid and packet header indication information rx_head, which are used to further locate the error location. The data indication information rx_valid is used to indicate whether the data packet is valid, wherein the valid data packet means that the original data position in the data packet or the packet header position in the data packet has data. Packet header indication information rx_head is used to represent the packet header position. For example, if the data indication information rx_valid is 1, it means that the original data position in the data packet or the header position in the data packet has data; if the data indication information rx_valid is 0, it means that the original data position in the data packet and the header position in the data packet are both no data. Packet header indication information rx_head being 1 indicates that the currently received data is a packet header, that is, indicating the packet header position of the data packet; packet header indication information rx_head being 0 indicates that the currently received data is not a packet header, that is, indicating the non-packet header position of the data packet. Therefore, if the verification circuit 61 verifies that the data in the data packet is wrong, the location of the data error can be determined through the data indication information rx_valid and the packet header indication information rx_head. As shown in Figure 9, the specific judgment logic is: under the premise of rx_valid=1, that is, when the received data is valid, if rx_head=1 and rx_err=1, it indicates that there is an error in the header of the data packet; if rx_head is When 0 and rx_err is 1, it indicates that there is an error in the non-header position of the data packet. If rx_valid is 0, it means that an invalid data packet is received, and no further judgment is required. If rx_valid is 1 and rx_err is 0, it means that there is no error in the header position and non-header position of the data packet.

In an optional implementation manner, the verification circuit 61 sends the data packet rx_pkt, the indication message rx_err, the data indication information rx_valid and the packet header indication information rx_head to the error packet filtering unit 62 in parallel. Optionally, the above information may also be sent serially, or the above information is packaged and sent, which is not limited in this embodiment.

The error packet filtering unit 62 is configured to filter the data packet according to the above verification information. In an optional implementation manner, the error packet filtering unit 62 confirms whether there is an error in the data in the data packet according to the indication message rx_err, and if there is an error, filters the error information.

Further optionally, the error packet filtering unit 62 is further configured to send a data packet error message to the timeout monitoring unit 65 in response to the data packet being an error packet. The timeout monitoring unit 65 is configured to reset the serial number detection unit and the information feedback module after a preset monitoring time in response to receiving a packet error message, so as to clear the error packet. Since the data error in the data packet may occur in the middle position, the data is not completely received when the data error is detected and part of the data has been sent to the follow-up unit by the error packet filtering unit 62, so in the present embodiment, the timeout monitoring unit 65 After waiting for a predetermined monitoring time, reset the sequence number detection unit 63 and the information feedback module 644 to clear the remaining data packets therein, so as to ensure that the error data packets are completely cleared. Optionally, the data sending end is provided with a timeout mechanism. If the feedback information about the data packet is received after the predetermined time, it is determined that the data packet is wrong, and the data packet is resent.

In this embodiment, the error packet filtering unit 62 confirms that there is no error in the data in the data packet according to the indication message rx_err, and then sends the data packet to the sequence number detection unit 63 .

The serial number detecting unit 63 is configured to detect the serial number of the received data packet, and generate a serial number detection result, and the control unit 64 is configured to generate feedback information according to the serial number detection result. Optionally, the feedback information includes the type of the data packet detection result and the sequence number of the last normal packet received from the corresponding data sending end. In other optional implementation manners, the serial number in the feedback information may also be a serial number to be received. Wherein, the type of the data packet detection result is used to represent the detection result of the serial number of the data, for example, the data is normal, the data is repeated, and the data is invalid.

In an optional implementation manner, the sequence number detection unit 63 detects the sequence number in the data packet according to the sequence number to be received, and generates a sequence number detection result. Wherein, the sequence number to be received is also the sequence number of the next data packet to be received from the corresponding data sending end. For example, assuming that the latest received data packet sequence number of the sending end is 5, the sequence number to be received is 6, that is, if the data transmission is normal, the sequence number in the currently received data packet should be 6.

Optionally, the sequence number detection unit 63 generates a sequence number detection result by comparing the relationship between the sequence number of the data packet and the sequence number to be received. Wherein, the sequence number detection result may be that the sequence number of the data packet is the same as the sequence number to be received, or the sequence number of the data packet is smaller than the sequence number to be received, or the sequence number of the data packet is greater than the sequence number to be received.

In an optional implementation manner, the control unit 64 includes an invalid packet filtering module 641 . Wherein, the sequence number detection unit 63 is further configured to send the sequence number detection result to the invalid packet filtering module 641 in response to the sequence number detection result being that the sequence number of the data packet is greater than the sequence number to be received. The invalid packet filtering module 641 is configured to generate a third feedback message according to the sequence number detection result. Wherein, the third feedback message indicates that the data packet is an invalid packet.

In an optional implementation manner, the invalid packet filtering module 641 is further configured to send a third feedback message to the information feedback module 644, and the information feedback module 644 generates feedback information according to the third feedback message and feeds back the information to the data sending end. Feedback. Optionally, in this embodiment, the message format of the feedback information is as shown in FIG. 5 . Wherein, the message type in the feedback information indicates that the data packet received this time is an invalid packet, and the sequence number in the feedback information is the sequence number of the last normal packet received. For example, the sequence number of the currently received data packet is 7, and the sequence number to be received is also 5. Among them, the serial number to be received is 5, that is, the data receiving end has successfully received the data packet with the serial number 0-4 sent by the corresponding data sending end, but has not received the data packet after the serial number 4, so the current The received data packet with sequence number 7 is an invalid packet, then the message type in the feedback information is 1010, and the sequence number is 4, to notify the corresponding data sender that it has successfully received the sequence number sent by the corresponding data sender as 0 A data packet of -4 makes the data sender send a data packet with a sequence number of 5.

In an optional implementation manner, the control unit 64 includes a repeated packet filtering module 642 . Wherein, the sequence number detection unit 63 is further configured to send the sequence number detection result to the duplicate packet filtering module 642 in response to the sequence number detection result being that the sequence number of the data packet is smaller than the sequence number to be received. The duplicate packet filtering module 642 is configured to generate a second feedback message according to the sequence number detection result. Wherein, the second feedback message indicates that the data packet is a repeated packet.

In an optional implementation manner, the repeated packet filtering module 642 is further configured to send a second feedback message to the information feedback module 644, and the information feedback module 644 generates feedback information according to the second feedback message and feeds back the information to the data sending end. Feedback. Wherein, the message type in the feedback information indicates that the data packet received this time is a repeated packet, and the sequence number in the feedback information is the sequence number of the last normal packet received. For example, the sequence number of the currently received data packet is 3, and the sequence number to be received is also 5. Among them, the serial number to be received is 5, that is, the data receiving end has successfully received the data packet with the serial number 0-4 sent by the corresponding data sending end, that is, the currently received data packet with the serial number 3 is a duplicate packet , the message type in the feedback information is 1001, and the sequence number is 4, to notify the corresponding data sender that it has successfully received the data packet with the sequence number 0-4 sent by the corresponding data sender, so that the data sender sends the sequence number for 5 packets.

In an optional implementation manner, the control unit 64 includes a normal packet filtering module 643 . The sequence number detection unit 63 is further configured to send the sequence number detection result to the normal packet filtering module 643 in response to the sequence number detection result being that the sequence number of the data packet is the same as the sequence number to be received. The normal packet filtering module 643 is configured to generate a first feedback message according to the sequence number detection result. Wherein, the first feedback message indicates that the data packet is a normal packet.

In an optional implementation manner, the normal packet filtering module 643 is further configured to send the first feedback message to the information feedback module 644, and the information feedback module 644 generates feedback information according to the first feedback message and feeds back the information to the data sending end. Feedback. Wherein, the message type in the feedback information indicates that the data packet received this time is a normal packet, and the sequence number in the feedback information is the sequence number of the normal packet sent by the data sending end received last time (that is, the currently received packet sequence number). For example, if the sequence number of the currently received data packet is 5, and the sequence number to be received is also 5, then the message type in the feedback information is 1000, and the sequence number is 5.

In an optional implementation manner, the integrated circuit 6 of this embodiment further includes an SoC system 66 . The normal packet filtering module 643 sends the data packet to the SoC system 66 to analyze or process the data packet.

Fig. 7 is a schematic diagram of a communication system according to an embodiment of the present invention. As shown in FIG. 7 , the communication system 7 of the embodiment of the present invention includes at least one integrated circuit 71 and at least one remote integrated circuit 72 . Wherein, the integrated circuit 71 may be the integrated circuit 6 in the above-mentioned embodiment, which will not be repeated here.

In this embodiment, the remote integrated circuit 72 is configured to send data packets. In an optional implementation manner, the remote integrated circuit 72 is further configured to delete the sent normal packet or repeated packet in response to the sent data packet being a normal packet or a repeated packet. Optionally, the remote integrated circuit 72 receives the feedback information sent by the integrated circuit 71. If the message type in the feedback information indicates that the corresponding data packet is a normal packet or a repeated packet, that is, the data packet has been successfully sent to the integrated circuit 71. , then delete the data packet to release storage space, and at the same time, send the next data packet according to the sequence number in the feedback information. For example, if the sequence number in the feedback information is 5, then the data packet corresponding to the sequence number 6 is sent.

In an optional implementation manner, the remote integrated circuit 72 is further configured to send the next data packet according to the sequence number in the feedback information in response to the sent data packet being an invalid packet. Optionally, the remote integrated circuit 72 receives the feedback information sent by the integrated circuit 71. If the message type in the feedback information indicates that the corresponding data packet is an invalid packet, that is, the data packet before the data packet has not been successfully sent, then Send the next data packet according to the sequence number in the feedback information. For example, if the sequence number in the feedback information is 5, then the data packet corresponding to the sequence number 6 is sent.

In an optional implementation manner, the remote integrated circuit 72 is provided with a timeout mechanism. The remote integrated circuit 72 is further configured to resend the data packet in response to not receiving feedback information about the data packet within a predetermined time, that is, determining that the data packet is erroneous.

Fig. 8 is an interactive flowchart of the communication method according to the embodiment of the present invention. As shown in FIG. 8, the interaction process of the communication method in this embodiment includes the following steps:

Step S1: the remote integrated circuit 72 sends the data packet a to the integrated circuit 71 . Among them, the sequence number of data packet a is 7.

Step S2: The integrated circuit 71 performs data verification on the data packet a. Wherein, the specific verification method is similar to the foregoing embodiment, and will not be repeated here.

Step S3: The integrated circuit 71 detects the serial number of the data packet a in response to the data packet a passing the check. Optionally, the data packet a is detected according to the sequence number to be received calculated and determined by the integrated circuit 71, and the relationship between the sequence number of the data packet a and the sequence number to be received is determined.

Step S4: Assuming that the sequence number to be received is 6, the integrated circuit 71 generates corresponding feedback information a' in response to the sequence number 7 of the data packet a being greater than the sequence number 6 to be received. Wherein, the data type in the feedback information a' indicates that the data packet a is an invalid packet, and the sequence number in the feedback information a' is the sequence number 5 of the last successfully received data packet.

Step S5 , the integrated circuit 71 sends feedback information a′ to the remote integrated circuit 72 .

The remote integrated circuit 72 receives the feedback information a', determines that the data packet corresponding to the feedback information a' is an invalid packet, and determines the next data packet b to be sent according to the sequence number in the feedback information a'.

Step S6 , the remote integrated circuit 72 sends the data packet b to the integrated circuit 71 . Wherein, the sequence number of data packet b is 6.

In step S7, the integrated circuit 71 performs data verification on the data packet b, and detects the serial number of the data packet b after the data packet b passes the data verification. Optionally, the data packet b is detected according to the sequence number to be received calculated and determined by the integrated circuit 71, and the relationship between the sequence number of the data packet b and the sequence number to be received is determined. As mentioned above, the data packet a received last time is an invalid packet, so the serial number to be received is still 6, and the integrated circuit 71 responds that the serial number 6 of the data packet b is the same as the serial number 6 to be received, and generates corresponding feedback information b'. Wherein, the data type in the feedback information b' indicates that the data packet b is a normal packet, the sequence number in the feedback information b' is the sequence number 6 of the latest successfully received data packet, and the integrated circuit 71 updates the sequence number to be received to 7.

Step S8 , the integrated circuit 71 sends feedback information b′ to the remote integrated circuit 72 .

In step S9, the remote integrated circuit 72 receives the feedback information b', determines that the data packet b corresponding to the feedback information b' is a normal packet, and the remote integrated circuit 72 deletes the corresponding data packet b.

Step S10 , the remote integrated circuit 72 sends the data packet c to the integrated circuit 71 . Wherein, the sequence number of data packet c is 3.

Step S11 , the integrated circuit 71 performs data verification on the data packet c, and detects the serial number of the data packet c after the data packet c passes the data verification. Optionally, the data packet c is detected according to the sequence number to be received calculated and determined by the integrated circuit 71, and the relationship between the sequence number of the data packet c and the sequence number to be received is determined. As mentioned above, the data packet b received last time is a normal packet, so the sequence number to be received is updated to 7, and the integrated circuit 71 generates corresponding feedback information c in response to the sequence number 3 of the data packet c being smaller than the sequence number 7 to be received '. Wherein, the data type in the feedback information c' indicates that the data packet c is a repeated packet, and the sequence number in the feedback information c' is the sequence number 6 of the latest successfully received data packet.

Step S12 , the integrated circuit 71 sends feedback information c′ to the remote integrated circuit 72 .

In step S13, the remote integrated circuit 72 receives the feedback information c', determines that the data packet c corresponding to the feedback information c' is a duplicate packet, and the remote integrated circuit 72 deletes the corresponding data packet c.

In step S14, the remote integrated circuit 72 sends the data packet a to the integrated circuit 71 based on the feedback information c′. The remote integrated circuit 72 determines the sequence number of the last successfully sent data packet as 6 according to the sequence number in the feedback information c', and then determines the sequence number of the next data packet to be sent as 7, that is, data packet a.

In step S15, the integrated circuit 71 performs data verification on the received data packet a, and filters the data packet a in response to the fact that the data packet a fails the verification.

In step S16, the remote integrated circuit 72 resends the data packet a to the integrated circuit 71 in response to not receiving the corresponding feedback information within a predetermined time.

Therefore, in this embodiment, firstly, data verification is performed on the received data packet, and after the data verification is passed, the serial number of the data packet is detected to generate a serial number detection result, and generate and send the serial number according to the serial number detection result. Feedback information, thus, can accurately determine data packets with data errors, received normal packets, invalid packets and duplicate packets, and then can prompt the data sending end to resend normal packets, thus, this embodiment can improve the efficiency of data transmission reliability.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

A communication method, characterized in that the method comprises:

receive packets;

Perform data verification on the data packet;

In response to the data packet passing the verification, detecting the serial number of the data packet, and generating a serial number detection result;

Generate feedback information according to the serial number detection result.
The method according to claim 1, wherein generating feedback information according to the serial number detection result comprises:

In response to the sequence number of the data packet being the same as the sequence number to be received, generating a first feedback message, the first feedback message indicates that the data packet is a normal packet;

Generate feedback information according to the first feedback message and the sequence number to be received.
The method according to claim 1, wherein generating feedback information according to the serial number detection result comprises:

In response to the sequence number of the data packet being smaller than the sequence number to be received, generating a second feedback message, the second feedback message is used to indicate that the data packet is a duplicate packet;

Generate feedback information according to the second feedback message and the sequence number to be received.
The method according to claim 1, wherein generating feedback information according to the serial number detection result comprises:

In response to the sequence number of the data packet being greater than the sequence number to be received, generating a third feedback message, the third feedback message is used to indicate that the data packet is an invalid packet;

Generate feedback information according to the third feedback message and the sequence number to be received.
The method according to any one of claims 1-4, wherein performing data verification on the data packet comprises:

Determine the target verification method according to the type of the verification code in the data packet;

Perform data verification on the data packet according to the target verification method.
The method according to claim 1, wherein the feedback information includes the type of the data packet detection result and the sequence number of the last received normal packet corresponding to the data sending end.
The method according to claim 1, further comprising:

In response to the data packet failing the check, the data packet is filtered.
An integrated circuit, characterized in that the integrated circuit includes:

The verification circuit is configured to perform data verification on the received data packet and generate verification information;

An error packet filtering unit configured to filter the data packets according to the verification information;

A serial number detection unit configured to detect the serial number of the received data packet and generate a serial number detection result; and

A control unit configured to generate and send feedback information according to the serial number detection result.
The integrated circuit according to claim 8, wherein the control unit comprises a normal packet filtering module;

The sequence number detection unit is further configured to send the sequence number detection result to the normal packet filtering module in response to the sequence number detection result being that the sequence number of the data packet is the same as the sequence number to be received;

The normal packet filtering module is configured to generate a first feedback message according to the sequence number detection result, and the first feedback message indicates that the data packet is a normal packet.
The integrated circuit according to claim 8, wherein the control unit comprises a repeated packet filtering module;

The sequence number detection unit is further configured to send the sequence number detection result to the duplicate packet filtering module in response to the sequence number detection result being that the sequence number of the data packet is smaller than the sequence number to be received;

The duplicate packet filtering module is configured to generate a second feedback message according to the sequence number detection result, and the second feedback message indicates that the data packet is a duplicate packet.
The integrated circuit according to claim 8, wherein the control unit comprises an invalid packet filtering module;

The sequence number detection unit is further configured to send the sequence number detection result to the invalid packet filtering module in response to the sequence number detection result being that the sequence number of the data packet is greater than the sequence number to be received;

The invalid packet filtering module is configured to generate a third feedback message according to the sequence number detection result, and the third feedback message indicates that the data packet is an invalid packet.
The integrated circuit according to any one of claims 8-11, wherein the control unit comprises:

The information feedback module is configured to generate and send the feedback information, the feedback information includes the type of the data packet detection result and the sequence number of the last received normal packet corresponding to the data sending end.
The integrated circuit according to claim 12, further comprising a timeout monitoring unit;

The error packet filtering unit is also configured to send a data packet error message to the timeout monitoring unit in response to the data packet being an error packet;

The timeout monitoring unit is configured to reset the sequence number detection unit and the information feedback module after a preset monitoring time in response to receiving a packet error message, so as to clear the error packets.
A communication system, characterized in that the communication system includes:

at least one integrated circuit according to any one of claims 8-13; and

At least one remote integrated circuit configured to transmit data packets.
The communication system according to claim 14, wherein the remote integrated circuit is further configured to delete the sent normal packet or repeated packet in response to the sent data packet being a normal packet or a repeated packet; or, in response to The sent data packet is an invalid packet, and the next data packet is sent according to the sequence number in the feedback information.