WO2023019557A1

WO2023019557A1 - Amplification circuit, radio-frequency receiver, communication module, and electronic device

Info

Publication number: WO2023019557A1
Application number: PCT/CN2021/113800
Authority: WO
Inventors: 顾成杰
Original assignee: 华为技术有限公司
Priority date: 2021-08-20
Filing date: 2021-08-20
Publication date: 2023-02-23
Also published as: CN117941249A

Abstract

The present application relates to the field of communications, and discloses an amplification circuit, a radio-frequency receiver, a communication module, and an electronic device, for use in improving the linearity of the amplification circuit. The amplification circuit comprises a first amplification branch, a second amplification branch, and a first floating current mirror; the first amplification branch comprises a first voltage node that is used for sampling current of the first amplification branch to obtain a first voltage; the first floating current mirror is coupled to the first voltage node, and converts the first voltage to obtain a second voltage; the second amplification branch comprises a second voltage node, and receives the second voltage by means of the second voltage node; the second voltage is used for controlling current of the second amplification branch; and the first amplification branch and the second amplification branch are coupled to an output end of the amplification circuit.

Description

Amplifying circuits, RF receivers, communication modules and electronic equipment

technical field

The present application relates to the communication field, in particular to an amplifier circuit, a radio frequency receiver, a communication module and electronic equipment.

Background technique

In radio frequency communication, the radio frequency signal can be amplified by the amplifier circuit. When the transistor is applied to the amplifier circuit, it has nonlinear characteristics and limits the linearity of the amplifier circuit.

Contents of the invention

Embodiments of the present application provide an amplifying circuit, a radio frequency receiver, a communication module and electronic equipment, which are used to improve the linearity of the amplifying circuit.

In order to achieve the above object, the embodiments of the present application adopt the following technical solutions:

In a first aspect, an amplifying circuit is provided, including a first amplifying branch, a second amplifying branch, and a first floating current mirror; the first amplifying branch includes a first voltage node, and the first voltage node is used for first The current of the amplifying branch is sampled to obtain the first voltage; the first floating current mirror is coupled to the first voltage node, and the first voltage is converted to obtain the second voltage; the second amplifying branch includes the second voltage node, and the second amplifying The branch receives a second voltage through the second voltage node, and the second voltage is used to control the current of the second amplifying branch; the first amplifying branch and the second amplifying branch are coupled to the output end of the amplifying circuit.

In the amplifying circuit provided in the embodiment of the present application, the current of one amplifying branch is coupled to the other amplifying branch through a floating current mirror, so that the currents in the two amplifying circuits are in a certain ratio, and the two amplifying branches are coupled At the output end of the amplifying circuit, the non-linear components in the signals output by the two amplifying branches are superimposed, thereby partially or completely canceling the non-linear components in the signals output by the amplifying circuit, so as to improve the linearity of the amplifying circuit.

In a possible implementation manner, the first amplification branch and the second amplification branch are coupled to the first output terminal of the amplification circuit. This implementation manner can be applied to the amplification of one signal, and can also be applied to the amplification of a differential signal.

In a possible implementation manner, the first amplification branch and the second amplification branch are respectively coupled to two differential phase output terminals of the amplification circuit. This embodiment can be applied to the amplification of differential signals. At this time, the nonlinear component of the output signal of the first amplification branch is superimposed with the nonlinear component of the output signal of the second amplification branch. Since the differential signal is passed between the two signals The difference is used to transmit data, so the differential signal output by the differential phase output realizes the difference between the nonlinear components in the two signals, and partially or completely cancels the nonlinear components in the output signal of the amplifying circuit to improve the performance of the amplifying circuit linearity.

In a possible implementation manner, the first amplification branch includes a coupled first transistor and a first resistor, and the first voltage node is a coupling point of the first transistor and the first resistor. The current in the first amplification branch is converted into a first voltage by the first resistor.

In a possible implementation manner, the source of the first transistor is coupled to the first resistor. That is, the source-drain current of the first transistor is converted into the first voltage through the first resistor.

In a possible implementation manner, the first resistor is an adjustable resistor. When the first resistor is an adjustable resistor, the magnification of the coupled first transistor can be adjusted by changing the resistance value of the first resistor to realize linearity adjustment (including amplification of effective signals and nonlinear components).

In a possible implementation manner, the second amplification branch includes a coupled second transistor and a second resistor, and the second voltage node is a gate of the second transistor. The second voltage is applied to the gate of the second transistor to adjust the current of the second amplification branch through the second voltage. In addition, the second transistor is applied in the amplifying circuit to generate a nonlinear component, which can partially or completely cancel the nonlinear component generated by the first transistor, and the current in the second amplifying branch is converted into a voltage signal through the second resistor.

In a possible implementation manner, the source of the second transistor is coupled to the second resistor. That is, the source-drain current of the second transistor is converted into a voltage signal through the second resistor.

In a possible implementation manner, the second resistor is an adjustable resistor. When the second resistor is an adjustable resistor, the magnification of the coupled second transistor (including the amplification of effective signals and nonlinear components) can be adjusted by changing the resistance value of the first resistor

In a possible implementation manner, the first floating current mirror includes a third transistor and a fourth transistor, one of the third transistor and the fourth transistor is an N-type transistor and the other is a P-type transistor, and the drain of the third transistor and the source of the fourth transistor is coupled to the first voltage node, and the drain of the fourth transistor and the source of the third transistor are coupled to the second voltage node. The floating current mirror can mirror the current in the first amplifying branch to the second amplifying branch, so as to partially or completely offset the nonlinear components of the output signals of the two amplifying branches, so as to improve the linearity of the amplifying circuit. The present application does not limit the specific structure of the current mirror, and there may be other implementation manners.

In a possible implementation manner, the amplifying circuit further includes a third amplifying branch, a fourth amplifying branch, and a second floating current mirror, the third amplifying branch includes a third voltage node, and the third voltage node is used for The current of the three amplification branches is sampled to obtain the third voltage; the second floating current mirror is coupled to the third voltage node, and the third voltage is converted to obtain the fourth voltage; the fourth amplification branch includes a fourth voltage node, and the fourth The amplifying branch receives a fourth voltage through the fourth voltage node, and the fourth voltage is used to control the current of the fourth amplifying branch; the third amplifying branch and the fourth amplifying branch are coupled to the output terminal of the amplifying circuit. The first amplifying branch, the first floating current mirror and the second amplifying branch mentioned above can be used to amplify one of a pair of differential signals, and partially or completely amplify the nonlinear component in the signal. offset. The third amplifying branch, the second floating current mirror and the fourth amplifying branch here can be used to amplify the other signal of a pair of differential signals, and partially or completely cancel the nonlinear component in the signal , to improve the linearity of the amplifying circuit.

In a possible implementation manner, when the first amplification branch and the second amplification branch are coupled to the first output end of the amplification circuit, the third amplification branch and the fourth amplification branch are coupled to the second output terminal of the amplification circuit. output. The two-way signals can be amplified, and the non-linear components in the two-way signals are partially or completely canceled to improve the linearity of the amplifying circuit.

In a possible implementation manner, when the first amplification branch and the second amplification branch are respectively coupled to the two differential phase output ends of the amplification circuit, the first amplification branch and the fourth amplification branch are coupled to the first The output terminal, the second amplification branch and the third amplification branch are coupled to the second output terminal, and the first output terminal and the second output terminal are differential phase output terminals. This embodiment can be applied to the amplification of differential signals. At this time, the nonlinear component of the output signal of the first amplification branch is superimposed on the nonlinear component of the output signal of the second amplification branch, and the non-linear component of the output signal of the third amplification branch The linear component is superimposed on the nonlinear component of the output signal of the fourth amplifying branch. Since the differential signal transmits data through the difference between the two signals, the differential signal output by the differential phase output terminal realizes the comparison between the first amplifying branch and the second Make a difference between the nonlinear components in the two signals output by the second amplification branch, and make a difference between the nonlinear components in the two signals output by the third amplification branch and the fourth amplification branch, so as to make a difference in the output signal of the amplification circuit The nonlinear component of the amplifier is partially or completely canceled to improve the linearity of the amplifier circuit.

In a possible implementation manner, signals input by the first amplification branch and the third amplification branch are differential signals. The differential signal can be amplified, and the non-linear component in the output differential signal can be partially or completely canceled, so as to improve the linearity of the amplifying circuit.

In a possible implementation manner, the amplifying circuit further includes a bias circuit, and the bias circuit is configured to provide a bias current to the first floating current mirror. The bias circuit provides bias current for the current mirror in the amplifying circuit, which can form a current source to determine the DC bias point.

In a possible implementation manner, the output terminal of the amplifying circuit is also coupled to an RC load, and the RC load includes a capacitor, a third resistor and a fourth resistor, the capacitor is coupled between the two differential phase output terminals of the amplifying circuit, and the third resistor Coupled to one of the two differential phase outputs, the fourth resistor is coupled to the other of the two differential phase outputs. The use of RC loads will not cause the problem of limited linearity caused by excessive loads. It does not need to use low-impedance devices such as op amps to achieve high linearity. A pole is realized through passive resistors and capacitors without consumption. In the case of current, the differential signal output by the amplifying circuit is first-order filtered to reduce power consumption.

In a second aspect, a radio frequency receiver is provided, including a mixer, an amplifying circuit as described in the first aspect and any implementation thereof, and a low-pass filter, the amplifying circuit is used to input the mixed frequency of the mixer Signal and output the amplified signal to the low-pass filter; the low-pass filter is used to filter the signal amplified by the amplifying circuit.

A third aspect provides a communication module, including the radio frequency receiver, digital baseband and antenna as described in the second aspect, and the radio frequency receiver is coupled between the antenna and the digital baseband.

In a fourth aspect, an electronic device is provided, including the communication module, a processor, and a display screen as described in the third aspect.

Regarding the technical effects of the second aspect and the fourth aspect, reference may be made to the technical effects of the first aspect and any implementation thereof.

Description of drawings

FIG. 1 is a schematic diagram of a characteristic curve of a transistor provided in an embodiment of the present application;

FIG. 2 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

FIG. 3 is a schematic structural diagram of a receiving link of an electronic device provided in an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a TIA provided in an embodiment of the present application;

FIG. 5 is a schematic structural diagram of another TIA provided in the embodiment of the present application;

FIG. 6 is a first structural schematic diagram of an amplifier circuit provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram II of an amplifying circuit provided in an embodiment of the present application;

FIG. 8 is a schematic structural diagram III of an amplifier circuit provided in an embodiment of the present application;

FIG. 9 is a structural schematic diagram 4 of an amplifier circuit provided in an embodiment of the present application;

FIG. 10 is a schematic structural diagram V of an amplifier circuit provided in an embodiment of the present application;

FIG. 11 is a schematic structural diagram VI of an amplifier circuit provided by an embodiment of the present application;

FIG. 12 is a schematic structural diagram VII of an amplifier circuit provided by an embodiment of the present application;

FIG. 13 is a schematic eighth structural diagram of an amplifier circuit provided in an embodiment of the present application.

Detailed ways

As used in this application, the terms "component," "module," "system" and the like are intended to refer to a computer-related entity, which may be hardware, firmware, a combination of hardware and software, software, or an operating system. software. For example, a component may be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and/or a computer. As an example, both an application running on a computing device and the computing device can be components. One or more components can reside within a process and/or thread of execution and a component can be localized on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures thereon. These components can be communicated through, for example, according to having one or more packets of data (e.g., data from a component that interacts with another component in a local system, a distributed system, and/or in the form of network to interact with other systems) to communicate with local and/or remote processes.

First describe some concepts involved in this application:

Transimpedance amplifier: Suppose the amplifier gain A=Y/X, Y is the output signal, and X is the input signal. When the input signal X is a current signal and the output signal is a voltage signal, A=Y (voltage)/X (current), at this time the dimension of A is resistance, so this amplifier is called a transimpedance amplifier.

Floating current mirror: It can also be called a mirror constant current source. It is a standard component commonly found in analog integrated circuits. The output current of the floating current mirror is proportional to the input current. In the embodiment of the present application, the floating current mirror is used to couple the low-frequency input signal to obtain another low-frequency signal. These two signals are respectively input into different amplification branches and the signals output by different amplification branches are superimposed, which can improve the amplification circuit. The amplification efficiency is high, and the area of the amplification circuit can also be reduced, thereby realizing the miniaturization of the amplification circuit.

Differential signaling: Data is transmitted by the difference between two signals. For example, if the difference between two signals is greater than the threshold, it means 1, and if the difference between the two signals is smaller than the threshold, it means 0.

Linear region and nonlinear region: Figure 1 shows the characteristic curve of a transistor (i.e. metal oxide semiconductor field effect transistor (MOSFET)). region and saturation region. The sub-threshold region and the saturation region can be collectively referred to as the nonlinear region. When a transistor is applied to an amplifying circuit, the transistor works in a nonlinear region, which makes the amplifying circuit have nonlinear characteristics (that is, the output signal of the amplifying circuit has a nonlinear component), and makes the linearity of the amplifying circuit limited.

In the embodiment of the present application, the signals output by different amplification branches in the amplifying circuit can be superimposed, thereby partially or completely offsetting the nonlinear component in the output signal, so as to improve the linearity of the amplifying circuit, and the output signal can also be Effective signal superposition enhancement in .

The amplifying circuit provided in the embodiment of the present application can be applied to an electronic device, and the electronic device can be a device that includes a wireless transceiver function and can cooperate with a network device to provide communication services for users. Specifically, electronic equipment may refer to terminal equipment, user equipment (UE), access terminal, subscriber unit, subscriber station, mobile station, mobile station, remote station, remote terminal, mobile equipment, user terminal, terminal, wireless A communication device, user agent, or user device. For example, electronic devices can be outdoor communication devices such as customer premise equipment (CPE), network bridges, monitors, electronic screens, and lantern controls, and can be mobile phones, smart speakers, smart watches, wireless communication Handheld devices, computing devices or other processing devices connected to wireless modems, robots, drones, smart driving vehicles, smart homes, in-vehicle devices, medical devices, smart logistics devices, wearable devices, 5G networks or future networks after 5G The electronic equipment and the like in the application are not limited in this embodiment.

As shown in FIG. 2 , taking the electronic device as a mobile phone as an example, the structure of the electronic device will be described. The electronic device 100 can be a mobile phone. The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a power management module 140, a battery 141, a wireless charging coil 142, an antenna 1, an antenna 2. Mobile communication module 150, wireless communication module 160, audio module 170, speaker 170A, receiver 170B, microphone 170C, earphone jack 170D, sensor module 180, button 190, motor 191, indicator 192, camera 193, display screen 194 and A subscriber identification module (subscriber identification module, SIM) card interface 195 and the like.

Wherein, the sensor module 180 may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, and the like.

It can be understood that, the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100 . In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine certain components, or separate certain components, or arrange different components. The illustrated components can be realized in hardware, software or a combination of software and hardware.

The processor 110 may include one or more processing units, for example: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processing unit (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), controller, memory, video codec, digital signal processor (digital signal processor, DSP), baseband processor and neural network processor (neural-network processing unit, NPU), etc. Wherein, different processing units may be independent devices, or may be integrated in one or more processors. For example, the processor 110 may be an application processor AP. Alternatively, the above-mentioned processor 110 may be integrated in a system on chip (system on chip, SOC). Alternatively, the above-mentioned processor 110 may be integrated in an IC chip. The processor 110 may include an analog front end (analog front end, AFE) and a microprocessing unit (microcontroller unit, MCU) in an IC chip.

Wherein, the controller may be the nerve center and command center of the electronic device 100 . The controller can generate an operation control signal according to the instruction opcode and timing signal, and complete the control of fetching and executing the instruction.

A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to use the instruction or data again, it can be called directly from the memory. Repeated access is avoided, and the waiting time of the processor 110 is reduced, thereby improving the efficiency of the system.

In some embodiments, processor 110 may include one or more interfaces. The interface may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous transmitter (universal asynchronous receiver/transmitter, UART) interface, mobile industry processor interface (mobile industry processor interface, MIPI), general-purpose input and output (general-purpose input/output, GPIO) interface, subscriber identity module (subscriber identity module, SIM) interface, and /or USB interface, etc.

It can be understood that the interface connection relationship between the modules shown in the embodiment of the present invention is only a schematic illustration, and does not constitute a structural limitation of the electronic device 100 . In other embodiments of the present application, the electronic device 100 may also adopt different interface connection manners in the foregoing embodiments, or a combination of multiple interface connection manners.

The power management module 140 is configured to receive charging input from the charger. Wherein, the charger may be a wireless charger (such as a wireless charging base of the electronic device 100 or other devices capable of wirelessly charging the electronic device 100), or a wired charger. For example, the power management module 140 may receive a charging input from a wired charger through the USB interface 130 . The power management module 140 may receive wireless charging input through the wireless charging coil 142 of the electronic device.

Wherein, the power management module 140 can also provide power for electronic equipment while charging the battery 141 . The power management module 140 receives the input of the battery 141 to supply power for the processor 110 , the pressure sensor, the internal memory 121 , the external memory interface 120 , the display screen 194 , the camera 193 and the wireless communication module 160 . The power management module 140 can also be used to monitor parameters such as the battery capacity of the battery 141 , the number of battery cycles, and the state of health of the battery (leakage, impedance). In some other embodiments, the power management module 140 may also be disposed in the processor 110 . For example, in the embodiment of the present application, the power management module 140 may provide a constant voltage source (such as a constant voltage of 5 volts (V)) or a constant current source for the pressure sensor.

The wireless communication function of the electronic device 100 may be realized by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.

Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 may be used to cover single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: Antenna 1 can be multiplexed as a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 150 can provide wireless communication solutions including 2G/3G/4G/5G applied on the electronic device 100 . The wireless communication module 160 can provide wireless local area network (wireless local area networks, WLAN) (such as wireless fidelity (wireless fidelity, Wi-Fi) network), bluetooth (bluetooth, BT), global navigation satellite Wireless communication solutions such as global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), and infrared technology (IR). In some embodiments, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with the network and other devices through wireless communication technology.

The electronic device 100 realizes the display function through the GPU, the display screen 194 and the application processor. The GPU is a microprocessor for image processing, and is connected to the display screen 194 and the application processor. GPUs are used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

The display screen 194 is used to display images, videos and the like. The display screen 194 includes a display panel. In some embodiments, the electronic device 100 may include 1 or N display screens 194 , where N is a positive integer greater than 1.

The electronic device 100 can realize the shooting function through the ISP, the camera 193 , the video codec, the GPU, the display screen 194 , and the application processor. The ISP is used for processing the data fed back by the camera 193 . In some embodiments, the ISP may be located in the camera 193 . Camera 193 is used to capture still images or video. In some embodiments, the electronic device 100 may include 1 or N cameras 193 , where N is a positive integer greater than 1.

The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, so as to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function. Such as saving music, video and other files in the external memory card.

The internal memory 121 may be used to store computer-executable program code, which includes instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by executing instructions stored in the internal memory 121 . In addition, the internal memory 121 may include a high-speed random access memory, and may also include a nonvolatile memory.

The electronic device 100 can implement audio functions through the audio module 170 , the speaker 170A, the receiver 170B, the microphone 170C, the earphone interface 170D, and the application processor. Such as music playback, recording, etc.

The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signal. In some embodiments, the audio module 170 may be set in the processor 110 , or some functional modules of the audio module 170 may be set in the processor 110 . Speaker 170A, also referred to as a "horn", is used to convert audio electrical signals into sound signals. Receiver 170B, also called "earpiece", is used to convert audio electrical signals into sound signals. The microphone 170C, also called "microphone" or "microphone", is used to convert sound signals into electrical signals. The electronic device 100 may be provided with at least one microphone 170C. The earphone interface 170D is used for connecting wired earphones. The earphone interface 170D may be a USB interface 130, or a 3.5mm open mobile terminal platform (open mobile terminal platform, OMTP) standard interface, or a cellular telecommunications industry association of the USA (CTIA) standard interface.

The buttons 190 include a power button, a volume button, and the like. The key 190 may be a mechanical key. It can also be a touch button. The electronic device 100 can receive key input and generate key signal input related to user settings and function control of the electronic device 100 . The motor 191 can generate a vibrating reminder. The motor 191 can be used for incoming call vibration prompts, and can also be used for touch vibration feedback. The indicator 192 can be an indicator light, and can be used to indicate charging status, power change, and can also be used to indicate messages, missed calls, notifications, and the like. The SIM card interface 195 is used for connecting a SIM card. The SIM card can be connected and separated from the electronic device 100 by inserting it into the SIM card interface 195 or pulling it out from the SIM card interface 195 . The electronic device 100 may support 1 or N SIM card interfaces, where N is a positive integer greater than 1. SIM card interface 195 can support Nano SIM card, Micro SIM card, SIM card etc. In some embodiments, the electronic device 100 adopts an eSIM, that is, an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100 .

As shown in Figure 3, the receiving link of the electronic device supporting Wi-Fi communication (belonging to the wireless communication module 160 in Figure 2) includes a digital baseband (digital base band, DBB) 21, a radio frequency receiver 22, a phase-locked loop ( phase locked loop (PLL) 23 , local oscillator generator (LO) 24 and antenna 25 . DBB 21 is coupled to antenna 25 via radio frequency receiver 22. Wherein, the radio frequency receiver 22 includes a low pass filter (low pass filter, LPF) 221, a transimpedance amplifier (trans-impedance amplifier, TIA) 222 and a mixer 223.

Wherein, PLL 23 is used for inputting the clock signal, and outputs the first oscillating signal of fixed frequency to LO 24.

The LO 24 is used to process the first oscillating signal (optional frequency division, and optional output quadrature phase) and output second oscillating signals of multiple local oscillator frequencies.

The mixer 223 is used to mix the second oscillating signal and the high-frequency analog signal passing through the antenna, and output it to the TIA 222. The mixer 223 may be a current type mixer, that is, the output signal is a current signal.

The TIA 222 is used to input the signal mixed by the mixer 223 and output the amplified signal to the LPF 223.

LPF 221 is used to filter the amplified signal.

The DBB 12 is used to demodulate the signal output by the radio frequency receiver 22.

With the improvement of Wi-Fi transmission bandwidth, the demodulation capability of DBB is getting higher and higher, and some DBBs even support 4096 quadrature amplitude modulation (QAM) demodulation, so the linearity requirements for the receiving link are also increasing. higher. However, the current common TIA is usually difficult to balance high linearity and high transmission bandwidth at the same time. Therefore, in high-bandwidth Wi-Fi scenarios, the linearity of TIA will affect the linearity of the entire receiving link.

Exemplarily, FIG. 4 shows a structure of a TIA, the TIA includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C1, a capacitor C2, an amplifier A, a transistor M1, and a transistor M2 , transistor M3 and transistor M4. Wherein, the transistor M1 and the transistor M2 are N-type transistors, and the transistor M3 and the transistor M4 are P-type transistors.

The sources of the transistor M1 and the transistor M2 are coupled to the power supply VDD, and the gates of the transistor M1 and the transistor M2 are coupled to the output terminal of the amplifier A. The drain of the transistor M1, the first terminal of the capacitor C3, the first terminal of the resistor R5, the first terminal of the resistor R1, the first terminal of the capacitor C1, and the drain of the transistor M3 are coupled to each other. The drain of the transistor M2, the second terminal of the capacitor C3, the first terminal of the resistor R6, the second terminal of the resistor R2, the second terminal of the capacitor C2 and the drain of the transistor M4 are coupled to each other. The second end of the resistor R5 and the second end of the resistor R6 serve as the output end of the TIA. The second terminal of the resistor R1, the first terminal of the resistor R2, the second terminal of the capacitor C1, the first terminal of the capacitor C2 and the non-inverting input terminal of the amplifier A are coupled together. The source of the transistor M3 and the first terminal of the resistor R3 are coupled together as an input terminal of the TIA. The source of the transistor M4 and the first terminal of the resistor R4 are coupled together as another input terminal of the TIA. The second end of the resistor R3 and the second end of the resistor R4 are coupled to the power supply VSS. The inverting input terminal of the amplifier A inputs the reference signal Vref.

The structure of the TIA is called a common gate transimpedance amplifier (common gate TIA), which is essentially a current buffer. Through the load impedance (C3, R5, R6), the current signal input at the input terminal is converted into a voltage signal and passed through the output terminal. output. Due to the nonlinear influence of the transistor itself and the excessive load impedance, the linearity of the TIA is very poor.

Exemplarily, FIG. 5 shows another TIA structure, and the TIA includes an operational amplifier OA, a resistor R1, a resistor R2, a capacitor C1 and a capacitor C2. The non-inverting input terminal of the operational amplifier OA, the first terminal of the resistor R1 and the first terminal of the capacitor C1 are coupled together as an input terminal of the TIA. The inverting input terminal of the operational amplifier OA, the first terminal of the resistor R2 and the first terminal of the capacitor C2 are coupled together as the other input terminal of the TIA. The inverting output terminal of the operational amplifier OA, the second terminal of the resistor R1 and the second terminal of the capacitor C1 are coupled together as an output terminal of the TIA. The non-inverting output terminal of the operational amplifier OA, the second terminal of the resistor R2 and the second terminal of the capacitor C2 are coupled together as the other output terminal of the TIA.

The noise (especially flicker noise) performance of this TIA is poor, and the power consumption of the operational amplifier is relatively large. Under the requirements of high bandwidth and high linearity, the disadvantage of power consumption is particularly obvious. The area occupied by the operational amplifier itself is very large, which will also cause the TIA area to be too large.

The embodiment of the present application provides an amplifying circuit, a radio frequency receiver, a communication module, and an electronic device. For a low-frequency input signal, another signal is obtained by coupling a floating current mirror, and the two signals are respectively input into two amplifying branches. Amplify, the two amplification branches are coupled to the output end of the amplification circuit, so that the nonlinear components in the signals output by the two amplification branches are superimposed, thereby partially performing the nonlinear component in the signal output by the amplification circuit Or all offset to improve the linearity of the amplifying circuit, and can also superimpose and enhance the effective signal output by the amplifying circuit. Compared with an amplifying circuit that uses a DC blocking capacitor or an operational amplifier to couple signals, the area of the amplifying circuit can be reduced. In particular, the amplifying circuit can be a TIA, which can be applied to the receiving chain of the aforementioned electronic equipment.

Among them, in the embodiment of the present application, the reason for coupling the low-frequency input signal through the floating current mirror instead of coupling the low-frequency input signal through the DC-blocking capacitor is as follows: For a radio frequency signal whose input signal is high-frequency, it can be obtained by DC-blocking capacitive coupling. For a new signal that is in a fixed ratio to the original input signal, the DC blocking capacitor presents a high-pass characteristic to the signal, that is, when the frequency of the signal is higher, the impedance of the DC blocking capacitor is lower. When the frequency of the signal is lower, the impedance of the DC blocking capacitor is lower. higher. However, when the input signal is an analog baseband signal, its frequency is sometimes as low as 100KHz or even 1KHz. If the DC blocking capacitor needs to present the signal path characteristics at this time, a large DC blocking capacitor needs to be used, so it is not suitable for coupling low frequency. input signal. However, in the embodiment of the present application, the floating current mirror is used to couple the low-frequency input signal, so as to avoid the large area of the amplifying circuit caused by the excessively large DC-blocking capacitor required to couple the low-frequency signal through the DC-blocking capacitor.

Specifically, as shown in Fig. 6 and Fig. 7, the embodiment of the present application provides an amplifying circuit 61, including a first amplifying branch 611, a second amplifying branch 612, a third amplifying branch 613, a fourth amplifying branch circuit 614, a first floating current mirror 615 and a second floating current mirror 616.

The amplification circuit 61 also includes two input terminals (IN1 and IN2) and two output terminals (OUT1 and OUT2). The two input terminals (IN1 and IN2) of the amplifying circuit 61 respectively input a pair of first differential signals (the first input signal and the second input signal), therefore, these two input terminals (IN1 and IN2) can be called differential phase input. The two output terminals ( OUT1 and OUT2 ) of the amplifying circuit 61 respectively output a pair of second differential signals, therefore, these two output terminals ( OUT1 and OUT2 ) can be called differential phase output terminals. The first differential signal may be a current signal, and the second differential signal may be a voltage signal.

The first amplifying branch 611 is used to amplify the first input signal to output the first output signal, the first amplifying branch 611 includes a first voltage node N1, and the first voltage node N1 is used for amplifying the first amplifying branch 611 The current is sampled to obtain the first voltage. The first floating current mirror 615 is coupled to the first voltage node N1, and converts the first voltage to obtain a second voltage, that is, the second voltage is equal to the first voltage that is K1 times. The second amplifying branch 612 includes a second voltage node N2, the second amplifying branch 612 receives a second voltage through the second voltage node N2, the second voltage is used to control the current of the second amplifying branch 612, the second amplifying branch 612 outputs a second output signal. The first amplification branch 611 and the second amplification branch 612 are coupled to the output terminal of the amplification circuit 61 .

The third amplifying branch 613 is used to amplify the second input signal to output a third output signal, the third amplifying branch 613 includes a third voltage node N3, and the third voltage node N3 is used to amplify the second input signal of the third amplifying branch 613 The current is sampled to obtain the third voltage. The second floating current mirror 616 is coupled to the third voltage node N3, and converts the third voltage to obtain a fourth voltage, that is, the fourth voltage is equal to the third voltage that is K2 times. The fourth amplifying branch 614 includes a fourth voltage node N4, the fourth amplifying branch 614 receives a fourth voltage through the fourth voltage node N4, the fourth voltage is used to control the current of the fourth amplifying branch 614, the fourth amplifying branch 614 outputs a fourth output signal. The third amplification branch 613 and the fourth amplification branch 614 are coupled to the output terminal of the amplification circuit 61 .

In a possible implementation manner, as shown in FIG. 6, the first amplification branch 611 and the second amplification branch 612 are coupled to the same output terminal (OUT1) of the amplification circuit 61, and the third amplification branch 613 and the fourth amplification branch The amplification branch 614 is coupled to the same output terminal ( OUT2 ) of the amplification circuit 61 . One of the second differential signals is the superposition of the first output signal and the second output signal, and is output through the output terminal OUT1. The other signal in the second differential signal is the superposition of the third output signal and the fourth output signal, and is output through the output terminal OUT2.

In another possible implementation, as shown in FIG. 7, the first amplification branch 611 and the second amplification branch 612 are respectively coupled to the two differential phase output ends of the amplification circuit 61, and the first amplification branch 611 is coupled to At the output terminal OUT1, the second amplifying branch 612 is coupled to the output terminal OUT2; the third amplifying branch 613 and the fourth amplifying branch 614 are also respectively coupled to the two differential phase output terminals of the amplifying circuit 61, the third amplifying branch 613 is coupled to the output terminal OUT2, and the fourth amplification branch 614 is coupled to the output terminal OUT1. One signal of the second differential signal is the superposition of the first output signal and the fourth output signal, and the other signal of the second differential signal is the superposition of the third output signal and the second output signal.

In addition, as shown in FIG. 8 (based on FIG. 6 ) or FIG. 9 (based on FIG. 7 ), the two output ends of the amplifying circuit 61 can also be coupled to an RC load 81, and coupled to other circuits (such as LPF) through the RC load 81 The RC load 81 includes a capacitor C, a resistor R1 and a resistor R2, the capacitor C is coupled between the two output terminals (OUT1 and OUT2) of the amplifying circuit 61, the resistor R1 is coupled to the output terminal OUT1, and the resistor R2 is coupled to the output terminal OUT2. Then there will be no problem of limited linearity caused by excessive load, and there is no need to use low-impedance devices such as op amps to achieve high linearity. A pole is realized through passive resistors and capacitors, without consuming current. In this case, the first-order filtering of the differential signal output by the amplifying circuit is implemented to reduce power consumption.

The amplifying circuit, radio frequency receiver, communication module and electronic equipment provided in the embodiments of the present application can control the current in the second amplifying branch by coupling the current in the first amplifying branch through a floating current mirror, and can be applied to low-frequency signals Amplification, compared with the amplifying circuit that uses DC blocking capacitors or operational amplifiers to couple signals, can reduce the area of the amplifying circuit.

Several possible structures of the above-mentioned amplifying circuit and how to use the above-mentioned amplifying circuit for nonlinear cancellation are described below in conjunction with FIGS. 10-12 .

As shown in Figures 10-12, the first amplification branch 611 includes a coupled first transistor MOS1 and a first resistor R1, the first voltage node N1 is the coupling point of the first transistor MOS1 and the first resistor R1, and the coupling point coupled to the first input terminal IN1 of the amplifying circuit. The second amplification branch 612 includes a coupled second transistor MOS2 and a second resistor R2, and the second voltage node N2 is the gate of the second transistor MOS2. The third amplifying branch 613 includes a coupled third transistor MOS3 and a third resistor R3, the third voltage node N3 is the coupling point of the third transistor MOS3 and the third resistor R3, and the coupling point is coupled to the second input of the amplifying circuit Terminal IN2. The fourth amplification branch 614 includes a coupled fourth transistor MOS4 and a fourth resistor R4, and the fourth voltage node N4 is the gate of the fourth transistor MOS4.

The first transistor MOS1 and the third transistor MOS3 can be regarded as common-gate amplifiers, for example, both are N-type transistors in FIGS. 10-12 . The gate of the first transistor MOS1 is coupled to the gate of the third transistor MOS3, the source of the first transistor MOS1 (that is, the first voltage node N1) is used to input the first input signal (first voltage), and the drain of the first transistor MOS1 The pole is used to output the first output signal, and the source of the first transistor MOS1 is coupled to the resistor R1. The source of the third transistor MOS3 (that is, the third voltage node N3) is used to input the second input signal (third voltage), the drain of the third transistor MOS3 is used to output the third output signal, and the source of the third transistor MOS3 Coupling resistor R3.

The second transistor MOS2 and the fourth transistor MOS4 can be regarded as common source amplifiers, for example, both are N-type transistors in FIG. 10 , and both are P-type transistors in FIG. 11 and FIG. 12 . The gate of the second transistor MOS2 (ie, the second voltage node N2 ) is used to input the second voltage, the source of the second transistor MOS2 is coupled to the resistor R2 , and the drain of the second transistor MOS2 is used to output the second output signal. The gate of the fourth transistor MOS4 (that is, the fourth voltage node N4 ) is used to input the fourth voltage, the source of the fourth transistor MOS4 is coupled to the resistor R4 , and the drain of the fourth transistor MOS4 is used to output the fourth output signal.

In FIG. 10, the drain of the second transistor MOS2 and the drain of the first transistor MOS1 are coupled to the first output terminal OUT1 of the amplifying circuit, and are coupled to the load 1; the drain of the fourth transistor MOS4 is coupled to the drain of the third transistor MOS3 The drain of the amplifying circuit is coupled to the second output terminal OUT2 of the amplifying circuit, and is coupled to the load 2 . In Fig. 11, the drain of the second transistor MOS2 and the drain of the first transistor MOS1 are coupled to the first output terminal OUT1 of the amplifying circuit, the drain of the fourth transistor MOS4 and the drain of the third transistor MOS3 are coupled to the The second output terminal OUT2 of the amplifying circuit. In Fig. 12, the drain of the second transistor MOS2 and the drain of the third transistor MOS3 are coupled to the second output terminal OUT2 of the amplifying circuit, the drain of the fourth transistor MOS4 and the drain of the first transistor MOS1 are coupled to the The first output terminal OUT1 of the amplifying circuit. Wherein, the load 1 and the load 2 are used to convert the current output by the coupled transistor into a voltage.

The resistors R1-R4 amplify the input signal (current signal) into an output signal (voltage signal). In addition, the resistors R1-R4 can be adjustable resistors, which are used to adjust the amplification factor of the coupled transistor (including the amplification of effective signals and nonlinear components), for example, the resistor R1 is used to adjust the amplification factor of the first transistor MOS1, The resistor R2 is used to adjust the amplification factor of the second transistor MOS2, the resistor R3 is used to adjust the amplification factor of the third transistor MOS3, and the resistor R4 is used to adjust the amplification factor of the fourth transistor MOS4.

The first transistor MOS1 is biased in the nonlinear region, so that the first output signal output by the first transistor MOS1 includes not only the effective signal linearly amplified to the first input signal, but also the first nonlinear component (mainly the third-order nonlinear linear components). The second transistor MOS2 is biased in the non-linear region, so that the second output signal output by the second transistor MOS2 includes not only the effective signal linearly amplified to the second voltage, but also a second non-linear component (mainly a third-order non-linear portion). Wherein, the second nonlinear component is used for anti-phase superposition with the first nonlinear component for partial or full cancellation.

In a possible implementation manner, for the structure shown in FIG. 6, the first transistor MOS1 and the second transistor MOS2 may be transistors of the same type (for example, both are N-type transistors or both are P-type transistors), and the first A transistor MOS1 and a second transistor MOS2 can be biased in the non-linear region, this embodiment can refer to the example shown in Figure 10, so that the second non-linear component and the first non-linear component are superimposed, and the The nonlinear component is partially or completely canceled, and the linear component (ie, the linearly amplified effective signal) in the first output signal is superimposed and enhanced. When the amplitude of the second nonlinear component is closer to that of the first nonlinear component, the cancellation effect is better.

In another possible implementation manner, for the structure shown in FIG. 6, the first transistor MOS1 and the second transistor MOS2 may be different types of transistors (for example, one transistor is a P-type transistor and the other is an N-type transistor), and , the first transistor MOS1 and the second transistor MOS2 may be biased in a non-linear region, and this implementation manner may refer to the example shown in FIG. 11 . Its technical effect refers to the previous description.

In yet another possible implementation manner, for the structure shown in FIG. 7, the first transistor MOS1 and the second transistor MOS2 may be different types of transistors (for example, one transistor is an N-type transistor and the other transistor is a P-type transistor), Moreover, the first transistor MOS1 and the second transistor MOS2 can be biased in the nonlinear region, and this embodiment can refer to the example shown in FIG. The data is transmitted through the difference between the two signals, so a pair of differential signals as a whole shows the difference of the nonlinear component in the two signals, that is, partially or completely cancels the nonlinear component in the first output signal, and the second output signal A linear component in the output signal (that is, a linearly amplified effective signal) is superimposed and enhanced. When the amplitude of the second nonlinear component is closer to that of the first nonlinear component, the cancellation effect is better.

The third transistor MOS3 is biased in the nonlinear region, so that the third output signal output by the third transistor MOS3 includes a third nonlinear component (mainly a third-order nonlinear linear components). The fourth transistor MOS4 is biased in the non-linear region, so that the fourth output signal output by the fourth transistor MOS4 includes the fourth non-linear component (mainly third-order non-linear portion). Wherein, the fourth nonlinear component is used for antiphase superposition with the third nonlinear component for partial or full cancellation.

In a possible implementation manner, for the structure shown in FIG. 6, the third transistor MOS3 and the fourth transistor MOS4 may be transistors of the same type (for example, both are N-type transistors or both are P-type transistors), and the first The three-transistor MOS3 and the fourth transistor MOS4 can be biased in the non-linear region. This embodiment can refer to the example shown in FIG. The nonlinear component is partially or completely canceled, and the linear component (ie, the linearly amplified effective signal) in the third output signal is superimposed and enhanced. When the amplitude of the fourth nonlinear component is closer to that of the third nonlinear component, the cancellation effect is better.

In another possible implementation manner, for the structure shown in FIG. 6, the third transistor MOS3 and the fourth transistor MOS4 may be different types of transistors (for example, one transistor is a P-type transistor and the other is an N-type transistor), and , the third transistor MOS3 and the fourth transistor MOS4 may be biased in a non-linear region, and this implementation manner may refer to the example shown in FIG. 11 . Its technical effect refers to the previous description.

In yet another possible implementation manner, for the structure shown in FIG. 7, the third transistor MOS3 and the fourth transistor MOS4 may be transistors of different types (for example, one transistor is an N-type transistor and the other transistor is a P-type transistor), and , the third transistor MOS3 and the fourth transistor MOS4 can be biased in the non-linear region, this embodiment can refer to the example shown in Figure 12, since the differential signal transmits data through the difference between the two signals, so a pair of differential signals The above shows that the nonlinear components in the two signals are differenced, that is, the nonlinear components in the third output signal are partially or completely canceled, and the linear components in the third output signal (ie, the effective signal that is linearly amplified) are superimposed enhanced. When the amplitude of the fourth nonlinear component is closer to that of the third nonlinear component, the cancellation effect is better.

The first floating current mirror 615 includes a transistor M1 and a transistor M2, and the transistor M1 and the transistor M2 are transistors of different types, for example, the transistor M1 is a P-type transistor, and the transistor M2 is an N-type transistor, or the transistor M1 is an N-type transistor, and the transistor M2 is a P-type transistor. The source of the transistor M2 is coupled to the drain of the transistor M1 and coupled to the first voltage node N1 for inputting the first voltage, the source of the transistor M1 is coupled to the drain of the transistor M2 and coupled to the second voltage node N2 , for outputting the second voltage to the gate of the second transistor MOS2 (that is, the second voltage node N2).

The second floating current mirror 616 includes a transistor M3 and a transistor M4, and the transistor M3 and the transistor M4 are transistors of different types, for example, the transistor M3 is a P-type transistor, and the transistor M4 is an N-type transistor, or the transistor M3 is an N-type transistor, and the transistor M4 is a P-type transistor. The source of the transistor M4 is coupled to the drain of the transistor M3 and coupled to the third voltage node N3 for inputting the third voltage, the source of the transistor M3 is coupled to the drain of the transistor M4 and coupled to the fourth voltage node N4 , for outputting the fourth voltage to the gate of the fourth transistor MOS4 (that is, the fourth voltage node N4).

The gates of transistor M1 and transistor M3 are used for input signal VB1, the gates of transistor M2 and transistor M4 are used for input signal VB2, and the floating current mirror can be adjusted by adjusting the duty cycle (high and low level ratio) of signal VB1 and signal VB2 The ratio of the output voltage signal to the input voltage signal.

As shown in FIG. 13 , the amplifying circuit further includes a bias circuit 131 and a common mode feedback (CMFB) circuit 132 . The bias circuit 131 is used to provide the bias current (represented by a current source in the figure) for the first floating current mirror 615, the second floating current mirror 616 and the CMFB circuit, and the common mode feedback circuit 132 is used to use the two amplifier circuits 61 The differential signals output from the output terminals (OUT1 and OUT2) are converted into common-mode signals OUT1' and OUT2' relative to the reference voltage Vref.

The above-mentioned amplifying circuit, radio frequency receiver, communication module, and electronic equipment provided in the embodiments of the present application couple the current of one amplifying branch to the other amplifying branch through a floating current mirror, so that the currents in the two amplifying circuits become A certain ratio, and the two amplification branches are coupled to the output end of the amplification circuit, so that the nonlinear components in the signals output by the two amplification branches are superimposed, so that the nonlinear components in the signal output by the amplification circuit are partially Or offset them all to improve the linearity of the amplifying circuit.

Those skilled in the art can appreciate that the modules and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.

The device embodiments described above are only illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple modules or components can be combined or integrated. to another device, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or modules may be in electrical, mechanical or other forms.

The modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one device, or may be distributed to multiple devices. Part or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims

An amplifying circuit, characterized in that it includes a first amplifying branch, a second amplifying branch and a first floating current mirror;

The first amplification branch includes a first voltage node, and the first voltage node is used to sample the current of the first amplification branch to obtain a first voltage;

The first floating current mirror is coupled to the first voltage node, and converts the first voltage to obtain a second voltage;

The second amplifying branch includes a second voltage node, the second amplifying branch receives the second voltage through the second voltage node, and the second voltage is used to control the voltage of the second amplifying branch current;

The first amplification branch and the second amplification branch are coupled to the output end of the amplification circuit.
The amplifying circuit according to claim 1, wherein the first amplifying branch and the second amplifying branch are coupled to a first output end of the amplifying circuit.
The amplifying circuit according to claim 1, wherein the first amplifying branch and the second amplifying branch are respectively coupled to two differential phase output ends of the amplifying circuit.
The amplifying circuit according to any one of claims 1-3, wherein the first amplifying branch includes a coupled first transistor and a first resistor, and the first voltage node is the first transistor and The coupling point of the first resistor.
The amplifying circuit according to claim 4, wherein the source of the first transistor is coupled to the first resistor.
The amplifying circuit according to any one of claims 4-5, wherein the first resistor is an adjustable resistor.
The amplifying circuit according to any one of claims 1-6, wherein the second amplifying branch includes a coupled second transistor and a second resistor, and the second voltage node is a terminal of the second transistor grid.
The amplifying circuit according to claim 7, wherein the source of the second transistor is coupled to the second resistor.
The amplifying circuit according to any one of claims 7-8, wherein the second resistor is an adjustable resistor.
The amplifier circuit according to any one of claims 1-7, wherein the first floating current mirror includes a third transistor and a fourth transistor, and one of the third transistor and the fourth transistor is The other of the N-type transistor is a P-type transistor, the drain of the third transistor and the source of the fourth transistor are coupled to the first voltage node, the drain of the fourth transistor is coupled to the third The source of the transistor is coupled to the second voltage node.
The amplifying circuit according to any one of claims 1-10, characterized in that, the amplifying circuit further comprises a third amplifying branch, a fourth amplifying branch and a second floating current mirror,

The third amplification branch includes a third voltage node, and the third voltage node is used to sample the current of the third amplification branch to obtain a third voltage;

The second floating current mirror is coupled to the third voltage node, and converts the third voltage to obtain a fourth voltage;

The fourth amplifying branch includes a fourth voltage node, the fourth amplifying branch receives the fourth voltage through the fourth voltage node, and the fourth voltage is used to control the fourth amplifying branch current;

The third amplification branch and the fourth amplification branch are coupled to the output end of the amplification circuit.
The amplifying circuit according to claim 11, wherein when the first amplifying branch and the second amplifying branch are coupled to the first output terminal of the amplifying circuit, the third amplifying branch and the fourth amplifying branch coupled to the second output end of the amplifying circuit.
The amplifying circuit according to claim 11, wherein when the first amplifying branch and the second amplifying branch are respectively coupled to the two differential phase output terminals of the amplifying circuit, the first The amplification branch and the fourth amplification branch are coupled to the first output end, the second amplification branch and the third amplification branch are coupled to the second output end, and the first output end and the second output terminal is the differential phase output terminal.
The amplifying circuit according to any one of claims 11-13, wherein the signals input by the first amplifying branch and the third amplifying branch are differential signals.
The amplifying circuit according to any one of claims 1-14, characterized in that the amplifying circuit further comprises a bias circuit, and the bias circuit is configured to provide a bias current to the first floating current mirror.
The amplifying circuit according to any one of claims 1-15, characterized in that, the output terminal of the amplifying circuit is also coupled to an RC load, the RC load includes a capacitor, a third resistor and a fourth resistor, and the capacitive coupling Between the two differential phase output terminals of the amplifying circuit, the third resistor is coupled to one of the two differential phase output terminals, and the fourth resistor is coupled to the other of the two differential phase output terminals. an output terminal.
A radio frequency receiver, characterized in that it comprises a mixer, an amplifying circuit and a low-pass filter as claimed in any one of claims 1-16,

The amplifying circuit is used to input the signal mixed by the mixer and output the amplified signal to the low-pass filter;

The low pass filter is used to filter the amplified signal.
A communication module, characterized by comprising the radio frequency receiver according to claim 17, a digital baseband and an antenna, and the radio frequency receiver is coupled between the antenna and the digital baseband.
An electronic device, characterized by comprising a communication module, a processor and a display screen as claimed in claim 18.