WO2023019394A1 - Photosensitive apparatus and related electronic apparatus - Google Patents

Photosensitive apparatus and related electronic apparatus Download PDF

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Publication number
WO2023019394A1
WO2023019394A1 PCT/CN2021/112749 CN2021112749W WO2023019394A1 WO 2023019394 A1 WO2023019394 A1 WO 2023019394A1 CN 2021112749 W CN2021112749 W CN 2021112749W WO 2023019394 A1 WO2023019394 A1 WO 2023019394A1
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coupled
discharge
photosensitive device
terminal
capacitor
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PCT/CN2021/112749
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French (fr)
Chinese (zh)
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江哲豪
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迪克创新科技有限公司
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Priority to PCT/CN2021/112749 priority Critical patent/WO2023019394A1/en
Priority to CN202180004709.7A priority patent/CN114207390A/en
Publication of WO2023019394A1 publication Critical patent/WO2023019394A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00Photometry, e.g. photographic exposure meter
    • G01J1/42Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/4204Photometry, e.g. photographic exposure meter using electric radiation detectors with determination of ambient light

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  • the present application relates to a sensor, in particular to a photosensitive device and related electronic devices.
  • One of the objectives of the present application is to disclose a photosensitive device and a related electronic device to solve the above problems.
  • An embodiment of the present application discloses a photosensitive device, the photosensitive device operates in an initial stage, a coarse conversion stage, and a fine conversion stage in sequence, and the photosensitive device includes: a photodiode coupled to a first reference voltage; an integral A unit, used to perform an integral operation according to the charge generated by the photodiode, and output an integrated voltage correspondingly; a switch, coupled between the integral unit and the successive approximation analog-to-digital converter sampled by the top plate; the A top-plate-sampled successive approximation analog-to-digital converter, comprising a comparator whose first input is coupled to a threshold voltage during the coarse conversion stage, and whose second input is passed through the The switch is selectively coupled to the integrated voltage, the second input terminal of the comparator is also coupled to a capacitor array, and the output terminal of the comparator is coupled to a successive approximation logic circuit; the capacitor array includes A plurality of capacitors are coupled to the second input terminal of the comparator through the top plate; the
  • An embodiment of the present application discloses an electronic device, including: a display screen; and the above-mentioned photosensitive device, which is disposed under the display screen and senses ambient light passing through the display screen.
  • the photosensitive device and related electronic device of the present application can simultaneously take into account high dynamic range, high sensitivity and high resolution in the application of extremely short exposure time.
  • FIG. 1 is a schematic diagram of an embodiment of a photosensitive device proposed in the present application operating in a rough switching stage.
  • FIG. 2 is a schematic diagram of an embodiment of the photosensitive device proposed in the present application operating in the fine switching stage.
  • FIG. 3 is an operation timing diagram of the photosensitive device of the present application.
  • FIG. 4 is an operation timing diagram of the photosensitive device of the present application at an initial stage.
  • FIG. 5 is an operation timing diagram of the photosensitive device of the present application during the discharge operation.
  • first and second features are in direct contact with each other; and may also include additional components are formed between the first and second features, such that the first and second features may not be in direct contact.
  • this disclosure may reuse reference symbols and/or labels in various embodiments. Such repetition is for the sake of brevity and clarity, and does not in itself represent a relationship between the different embodiments and/or configurations discussed.
  • FIG. 1 is a schematic diagram of an embodiment of a photosensitive device proposed in the present application.
  • the photosensitive device 100 in FIG. 1 can be used as an ambient light sensor to detect the charge accumulated by the photodiode 102 in a period of time (which is positively related to the average illuminance of the period of time), and output as a rough converted digital code DO_c And fine conversion digital code DO_f.
  • the photosensitive device 100 can be used to sense ambient light. For example, it can be installed in an electronic device as a proximity sensor.
  • the present application proposes that the photosensitive device 100 be arranged under the display screen of the electronic device to form an under-screen proximity sensor. Sensing is performed to reduce the bezel width of the non-display area of the electronic device.
  • the photosensitive device 100 in order to prevent the backlight of the display screen from interfering with the sensing of ambient light by the photosensitive device 100, the photosensitive device 100 only performs sensing during the blanking period when the backlight of the display screen does not emit light.
  • the blanking period is extremely short, and the display screen
  • the light transmittance to ambient light is extremely low, and in the case of an organic light emitting diode display, it is only about 2% to 4%.
  • the photosensitive device 100 in FIG. 1 divides the sensing process into three stages: initial stage, coarse conversion stage and fine conversion stage .
  • the coarse transition phase must be during the blanking period so as not to be disturbed by the display backlight, but the initial phase and the fine transition phase are not disturbed by the display backlight. Jamming, may be performed outside the blanking period.
  • the anode of the photodiode 102 in FIG. 1 is coupled to the first reference voltage V1 , and the cathode is coupled to the integration unit 104 .
  • the integrating unit 104 is used for performing an integrating operation according to the charge generated by the photodiode 102 irradiated by light, and correspondingly outputs the integrated voltage Vo. Because the integrating unit 104 cannot integrate forever, the integrated voltage Vo will inevitably be saturated if it keeps increasing. Therefore, the photosensitive device 100 of the present application uses the comparator 1062 to determine whether the integrated voltage Vo is higher than the threshold voltage Vth.
  • the controller 110 If the integrated voltage Vo is higher than the threshold voltage Vth, the controller 110 is notified to add 1 to the coarse conversion digital code DO_c, and the controller 110 uses the discharge unit 108 to discharge the integration unit 104 to pull down the integration voltage Vo, so that the integration unit 104 can In the coarse conversion stage, the charge generated by the photodiode 102 after being irradiated by light is continuously integrated.
  • the controller 110 will be triggered to add 1 to the coarse converted digital code DO_c only when the integral voltage Vo exceeds the threshold voltage Vth.
  • the threshold voltage Vth is set lower, the probability of the discharge operation will inevitably increase. Since the discharge operation may affect the accuracy of the integral operation, too frequent discharge operations are critical to maintaining the accuracy of the photosensitive device 100. is unfavorable.
  • the present application also utilizes the successive approximation analog-to-digital converter 106 to convert the remaining integrated voltage Vo, which is less than the threshold voltage Vth at the end of the coarse conversion phase, into a fine conversion digital code DO_f in the fine conversion phase.
  • the sensitivity and resolution of the photosensitive device 100 are improved.
  • the successive approximation analog-to-digital converter 106 of the present application is a top-plate sampling architecture as shown in FIG. 1 and FIG.
  • a plurality of capacitors included in the capacitor array 1066 all pass through the top pole
  • the plate is coupled to the second input of the comparator 1062 .
  • the advantage of this is that when the photosensitive device 100 is in the rough conversion stage and the switch 108 is turned on, the integral voltage Vo and the threshold voltage Vth are respectively directly coupled to the two input terminals of the comparator 1062, so that the successive approximation analog-to-digital converter 106 becomes a simple comparator, and in fact the capacitor array 1068 will continuously sample; therefore, when the photosensitive device 100 enters the fine conversion stage from the coarse conversion stage, the switch 108 is turned off, and the successive approximation analog-to-digital converter 106 can concentrate on performing the successive approximation analog-to-digital conversion on the integral voltage Vo sampled by the capacitor array 1068 when entering the fine conversion stage from the coarse conversion stage, and the controller 110 will convert the successive approximation analog-to-digital converter 106 in The output signal Ss output by the fine conversion stage is converted into a fine conversion digital code DO_f.
  • the first input terminal of the comparator 1062 of the successive approximation analog-to-digital converter 106 sampled by the top plate can be originally coupled to the threshold voltage Vth through the control signal Sm generated by the controller 110 Switched to be coupled to the second reference voltage V2.
  • the successive approximation logic circuit 1064 respectively controls the bottom plates of the multiple capacitors of the capacitor array 1066 to selectively couple to one of multiple voltages (such as the first reference voltage V1, the second reference voltage V1, and the second reference voltage) according to the output signal Ss of the comparator 1062.
  • Voltage V2, the third reference voltage V3 wherein the second reference voltage may be between the first reference voltage V1 and the third reference voltage V3.
  • a non-top-plate sampling architecture SAR ADC for example, a bottom-plate sampling architecture SAR ADC may also be used as the SAR ADC 106 .
  • a bottom-plate sampling architecture SAR ADC may also be used as the SAR ADC 106 .
  • another comparator needs to be additionally added as the coarse conversion. stage used.
  • the integrating unit 104 includes an operational amplifier 1042 , an integrating capacitor Cint, a switch 1044 , a switch 1046 and a switch 1048 .
  • the operational amplifier 1042 includes a positive input terminal, a negative input terminal and an output terminal, the negative input terminal is coupled to the photodiode 102 ; the positive input terminal is coupled to the fourth reference voltage V4.
  • One terminal of the integrating capacitor Cint is coupled to the negative input terminal of the operational amplifier 1042 .
  • the switch 1044 is coupled between the negative terminal of the operational amplifier 1042 and the output terminal; the switch 1046 is coupled between the other end of the integrating capacitor Cint and the output terminal of the operational amplifier 1042; the switch 1048 is coupled to the integral between the other end of the capacitor Cint and the reset voltage Vrst.
  • the controller 110 controls the switches 1044 , 1046 and 1048 correspondingly through the control signals Srst1 , Srst2 and Srst3 , so that the switch 1044 is turned off. , the switch 1046 is turned on and the switch 1048 is turned off. Then the controller 110 turns off the switch 1046 at time T01, and turns on the switch 1044 and the switch 1048 at time T02 so that the integrated voltage Vo is reset to the reset voltage Vrst, and then the controller 110 turns off the switch 1044 and the switch 1048 at time T03. The switch 1048 is turned off, and the switch 1044 is turned on again at time T04 to complete the reset of the integration unit 104 .
  • the integrated voltage Vo is reset to the reset voltage Vrst during the initial stage, then enters the coarse switching stage at time T1, and enters the fine switching stage from the coarse switching stage at time T8. transition phase, and ends the fine transition phase at time T9.
  • the length of time T1 to T8 is a preset time length, which, as mentioned above, needs to be shorter than the blanking period of the matched display screen. It can also be observed from FIG.
  • the time length of the discharge operation is a preset time length, that is, the time length of time T2 to T3 is the same as the time length of time T4 to T5 and the time length of time T6 to T7. Details about the discharge unit 108 will be described below.
  • the discharge unit 108 includes a discharge capacitor Cd, the first end of the discharge capacitor Cd is coupled to the photodiode 102, the second end of the discharge capacitor Cd is selectively coupled to the discharge reference voltage Vrp through the switch 1082, and the discharge capacitor The second terminal of Cd is also selectively coupled to the first terminal of the discharge capacitor Cd through a switch 1084 .
  • the controller 110 controls the switches 1084 and 1082 correspondingly through the control signals Sd1 and Sd2 , so that the switch 1084 is turned on and the switch 1082 is turned off.
  • the controller 110 will turn off the switch 1084 at time T21, and turn on the switch 1082 at time T22 to absorb the charge accumulated in the integration capacitor Cint to the discharge capacitor Cd is equivalent to discharging the integral capacitor Cint, thereby reducing the integral voltage Vo.
  • the controller 110 turns off the switch 1082 at time T23 and turns on the switch 1084 again at time T24 to complete the discharging operation.
  • the specific implementation of the discharge unit 108 of the present application is not limited to the embodiments shown in FIG. 1 and FIG. 2 , as long as the integration voltage Vo of the integration unit 104 can be reduced through the control of the controller 110, any method can be applied. in the photosensitive device 100 .
  • the present application does not limit the implementation manner of the controller 110 .
  • the controller 110 can be realized by using a processor together with software or firmware, or by using a specific circuit in pure hardware.
  • the integrating capacitor Cint in the integrating unit 104 of the photosensitive device 100 of the present application may have a smaller value to increase the gain of the integrating unit 104 , so as to increase the efficiency of the rough conversion and increase the sensitivity of the photosensitive device 100 .
  • the capacitive array 1066 of the successive approximation analog-to-digital converter 106 sampled by the top plate can be enlarged to improve the resolution of the fine conversion. In this way, even if the photosensitive device 100 is disposed under the display screen, it can simultaneously take into account high dynamic range, high sensitivity and high resolution with a very short exposure time.

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Abstract

Disclosed in the present application are a photosensitive apparatus and a related electronic apparatus. The photosensitive apparatus sequentially operates in an initial stage, a coarse conversion stage and a fine conversion stage. The photosensitive apparatus comprises: a photodiode; an integration unit, which is used for performing an integration operation according to a charge generated by the photodiode, and correspondingly outputting an integration voltage; and a switch, which is coupled between the integration unit and a top plate sampling successive approximation analog-to-digital converter. The top plate sampling successive approximation analog-to-digital converter includes: a comparator, wherein a first input end thereof is coupled to a threshold voltage in the coarse conversion stage, and a second input end thereof is selectively coupled to the integration voltage by means of the switch; a capacitor array, which comprises a plurality of capacitors, which are all coupled to the second input end of the comparator by means of a top plate; and a successive approximation logic circuit.

Description

感光装置及相关电子装置Photosensitive devices and related electronic devices 技术领域technical field
本申请涉及一种传感器,尤其涉及一种感光装置及相关电子装置。The present application relates to a sensor, in particular to a photosensitive device and related electronic devices.
背景技术Background technique
在环境光传感器的领域中,高动态范围一直是设计者追求的目标之一,以往的做法往往达到了高动态范围,却牺牲了传感器的敏感度。如果还要加上极短曝光时间内完成环境光传感的需求,则难度更高。因此,本领域亟需一种全新的设计来取代现有的环境光传感器做法,以克服上述的所有问题。In the field of ambient light sensors, high dynamic range has always been one of the goals pursued by designers. In the past, high dynamic range was often achieved, but the sensitivity of the sensor was sacrificed. If the need to complete ambient light sensing within a very short exposure time is also added, the difficulty is even higher. Therefore, a new design is urgently needed in this field to replace the existing ambient light sensor method, so as to overcome all the above-mentioned problems.
发明内容Contents of the invention
本申请的目的之一在于公开一种感光装置及相关电子装置,来解决上述问题。One of the objectives of the present application is to disclose a photosensitive device and a related electronic device to solve the above problems.
本申请的一实施例公开了一种感光装置,所述感光装置依序操作在初始阶段、粗转换阶段以及细转换阶段,所述感光装置包括:光电二极管,耦接于第一参考电压;积分单元,用来依据所述光电二极管产生的电荷进行积分操作,并对应地输出积分电压;开关,耦接于所述积分单元以及顶极板采样的逐次逼近式模数转换器之间;所述顶极板采样的逐次逼近式模数转换器,包含:比较器,所述比较器的第一输入端在所述粗转换阶段耦接至阈值电压,所述比较器的第二输入端通过所述开关选择性地耦接至所述积分电压,所述比较器的第二输入端还耦接至电容阵列,所述比较器的输出端耦接至逐次逼近逻辑电路;所述电容阵列,包括多个电容皆通过顶极板耦接至所述比较器的所述第二输入端;所述逐次逼近逻辑电路,用来依据所述比较器的输出信号分别控制所述多个电容的底极板选择性地耦接至多个电压的其中 之一;放电单元,耦接于所述积分单元;以及控制器,用以控制所述开关导通以使所述感光装置进入所述粗转换阶段,以及控制所述开关不导通以使所述感光装置进入所述细转换阶段,其中在所述粗转换阶段,所述控制器控制所述比较器的所述第一输入端耦接至所述阈值电压,且当所述比较器的所述输出信号指示所述积分电压高于所述阈值电压时,所述控制器将粗转换数字码累加1,并控制所述放电单元对所述积分单元进行放电操作,以降低所述积分电压。An embodiment of the present application discloses a photosensitive device, the photosensitive device operates in an initial stage, a coarse conversion stage, and a fine conversion stage in sequence, and the photosensitive device includes: a photodiode coupled to a first reference voltage; an integral A unit, used to perform an integral operation according to the charge generated by the photodiode, and output an integrated voltage correspondingly; a switch, coupled between the integral unit and the successive approximation analog-to-digital converter sampled by the top plate; the A top-plate-sampled successive approximation analog-to-digital converter, comprising a comparator whose first input is coupled to a threshold voltage during the coarse conversion stage, and whose second input is passed through the The switch is selectively coupled to the integrated voltage, the second input terminal of the comparator is also coupled to a capacitor array, and the output terminal of the comparator is coupled to a successive approximation logic circuit; the capacitor array includes A plurality of capacitors are coupled to the second input terminal of the comparator through the top plate; the successive approximation logic circuit is used to control the bottom electrodes of the plurality of capacitors respectively according to the output signal of the comparator a plate selectively coupled to one of a plurality of voltages; a discharge unit coupled to the integration unit; and a controller configured to control the conduction of the switch so that the photosensitive device enters the rough switching stage, and controlling the switch to be non-conductive so that the photosensitive device enters the fine switching stage, wherein in the coarse switching stage, the controller controls the first input terminal of the comparator to be coupled to the threshold voltage, and when the output signal of the comparator indicates that the integration voltage is higher than the threshold voltage, the controller will add 1 to the coarse conversion digital code, and control the discharge unit to the integration unit A discharge operation is performed to lower the integrated voltage.
本申请的一实施例公开了一种电子装置,包括:显示屏;以及上述的感光装置,设置于所述显示屏之下方,并对通过所述显示屏的环境光进行传感。An embodiment of the present application discloses an electronic device, including: a display screen; and the above-mentioned photosensitive device, which is disposed under the display screen and senses ambient light passing through the display screen.
本申请的感光装置及相关电子装置可以在极短曝光时间的应用中,同时兼顾高动态范围、高敏感度与高分辨率。The photosensitive device and related electronic device of the present application can simultaneously take into account high dynamic range, high sensitivity and high resolution in the application of extremely short exposure time.
附图说明Description of drawings
图1为本申请提出的感光装置操作在粗转换阶段的实施例的示意图。FIG. 1 is a schematic diagram of an embodiment of a photosensitive device proposed in the present application operating in a rough switching stage.
图2为本申请提出的感光装置操作在细转换阶段的实施例的示意图。FIG. 2 is a schematic diagram of an embodiment of the photosensitive device proposed in the present application operating in the fine switching stage.
图3为本申请的感光装置的操作时序图。FIG. 3 is an operation timing diagram of the photosensitive device of the present application.
图4为本申请的感光装置在初始阶段的操作时序图。FIG. 4 is an operation timing diagram of the photosensitive device of the present application at an initial stage.
图5为本申请的感光装置在放电操作的操作时序图。FIG. 5 is an operation timing diagram of the photosensitive device of the present application during the discharge operation.
具体实施方式Detailed ways
以下揭示内容提供了多种实施方式或例示,其能用以实现本揭示内容的不同特征。下文所述之组件与配置的具体例子系用以简化本揭示内容。当可想见,这些叙述仅为例示,其本意并非用于限制本揭示 内容。举例来说,在下文的描述中,将一第一特征形成于一第二特征上或之上,可能包括某些实施例其中所述的第一与第二特征彼此直接接触;且也可能包括某些实施例其中还有额外的组件形成于上述第一与第二特征之间,而使得第一与第二特征可能没有直接接触。此外,本揭示内容可能会在多个实施例中重复使用组件符号和/或标号。此种重复使用乃是基于简洁与清楚的目的,且其本身不代表所讨论的不同实施例和/或组态之间的关系。The following disclosure provides various implementations or illustrations, which can be used to achieve different features of the disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. It will be appreciated that these descriptions are examples only and are not intended to limit the disclosure. For example, in the description below, forming a first feature on or over a second feature may include some embodiments wherein the first and second features are in direct contact with each other; and may also include In some embodiments, additional components are formed between the first and second features, such that the first and second features may not be in direct contact. In addition, this disclosure may reuse reference symbols and/or labels in various embodiments. Such repetition is for the sake of brevity and clarity, and does not in itself represent a relationship between the different embodiments and/or configurations discussed.
虽然用以界定本申请较广范围的数值范围与参数皆是约略的数值,此处已尽可能精确地呈现具体实施例中的相关数值。然而,任何数值本质上不可避免地含有因个别测试方法所致的标准偏差。在此处,「约」通常系指实际数值在一特定数值或范围的正负10%、5%、1%或0.5%之内。或者是,「约」一词代表实际数值落在平均值的可接受标准误差之内,视本申请所属技术领域中具有通常知识者的考虑而定。当可理解,除了实验例之外,或除非另有明确的说明,此处所用的所有范围、数量、数值与百分比(例如用以描述材料用量、时间长短、温度、操作条件、数量比例及其他相似者)均经过「约」的修饰。因此,除非另有相反的说明,本说明书与附随申请专利范围所揭示的数值参数皆为约略的数值,且可视需求而更动。至少应将这些数值参数理解为所指出的有效位数与套用一般进位法所得到的数值。在此处,将数值范围表示成由一端点至另一端点或介于二端点之间;除非另有说明,此处所述的数值范围皆包括端点。Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the application are approximations, the relative numerical values set forth in the specific examples are reported here as precisely as possible. Any numerical value, however, inherently inherently contain standard deviations resulting from their individual testing methodology. As used herein, "about" generally means that the actual value is within plus or minus 10%, 5%, 1%, or 0.5% of a particular value or range. Alternatively, the term "about" means that the actual value falls within an acceptable standard error of the mean, as considered by one of ordinary skill in the art to which this application pertains. It should be understood that, except for the experimental examples, or unless otherwise clearly stated, all ranges, quantities, numerical values and percentages used herein (for example, to describe the amount of material used, the length of time, temperature, operating conditions, ratios of quantities and others) similar) are modified by "about". Therefore, unless otherwise stated to the contrary, the numerical parameters disclosed in this specification and the appended patent claims are approximate values and may be changed as required. At least these numerical parameters should be understood as the value obtained by applying the normal rounding method to the indicated effective digits. Herein, numerical ranges are expressed as being from one endpoint to another endpoint or between two endpoints; unless otherwise stated, the numerical ranges stated herein are inclusive of the endpoints.
图1为本申请提出的感光装置的实施例的示意图。图1感光装置100可作为环境光传感器,用来侦测光电二极管102在一个时间段中所累积到的电荷(其正相关于所述时间段的平均照度),并输出为粗转换数字码DO_c及细转换数字码DO_f。FIG. 1 is a schematic diagram of an embodiment of a photosensitive device proposed in the present application. The photosensitive device 100 in FIG. 1 can be used as an ambient light sensor to detect the charge accumulated by the photodiode 102 in a period of time (which is positively related to the average illuminance of the period of time), and output as a rough converted digital code DO_c And fine conversion digital code DO_f.
感光装置100可用来传感环境光,例如可设置于电子装置中作为接近传感器,本申请提出将感光装置100设置于电子装置的显示屏之下形成屏下接近传感器,对通过显示屏的环境光进行传感,以缩小电子装置的非显示屏范围的边框宽度。本申请为了避免显示屏的背光干 扰感光装置100对环境光的传感,感光装置100只在显示屏的背光不发光的消隐时段进行传感,然而所述消隐时段极短,且显示屏对环境光的透光率一般来说极低,以有机发光二极管显示屏来说,只有约2%至4%左右。The photosensitive device 100 can be used to sense ambient light. For example, it can be installed in an electronic device as a proximity sensor. The present application proposes that the photosensitive device 100 be arranged under the display screen of the electronic device to form an under-screen proximity sensor. Sensing is performed to reduce the bezel width of the non-display area of the electronic device. In this application, in order to prevent the backlight of the display screen from interfering with the sensing of ambient light by the photosensitive device 100, the photosensitive device 100 only performs sensing during the blanking period when the backlight of the display screen does not emit light. However, the blanking period is extremely short, and the display screen Generally speaking, the light transmittance to ambient light is extremely low, and in the case of an organic light emitting diode display, it is only about 2% to 4%.
为了在极短的时间内完成高敏感度且高动态范围的环境光侦测,图1的感光装置100将传感的流程依序分为三个阶段:初始阶段、粗转换阶段以及细转换阶段。以屏下接近传感器的应用来说,所述粗转换阶段必须要在所述消隐时段期间内以免被显示屏背光干扰,但所述初始阶段以及所述细转换阶段则不会被显示屏背光干扰,可在所述消隐时段之外执行。In order to complete ambient light detection with high sensitivity and high dynamic range in a very short time, the photosensitive device 100 in FIG. 1 divides the sensing process into three stages: initial stage, coarse conversion stage and fine conversion stage . For an under-display proximity sensor application, the coarse transition phase must be during the blanking period so as not to be disturbed by the display backlight, but the initial phase and the fine transition phase are not disturbed by the display backlight. Jamming, may be performed outside the blanking period.
图1的光电二极管102的阳极耦接于第一参考电压V1,阴极耦接于积分单元104。积分单元104用来依据光电二极管102受到光照射后产生的电荷进行积分操作,并对应地输出积分电压Vo。因为积分单元104不可能永无止尽的积分下去,积分电压Vo一直增加势必会饱和,因此本申请的感光装置100利用比较器1062来判断积分电压Vo是否高于阈值电压Vth,若积分电压Vo高于阈值电压Vth,则通知控制器110将粗转换数字码DO_c累加1,控制器110并利用放电单元108对积分单元104进行放电操作以拉低积分电压Vo,使积分单元104得以在所述粗转换阶段持续地对光电二极管102受到光照射后产生的电荷进行积分操作。The anode of the photodiode 102 in FIG. 1 is coupled to the first reference voltage V1 , and the cathode is coupled to the integration unit 104 . The integrating unit 104 is used for performing an integrating operation according to the charge generated by the photodiode 102 irradiated by light, and correspondingly outputs the integrated voltage Vo. Because the integrating unit 104 cannot integrate forever, the integrated voltage Vo will inevitably be saturated if it keeps increasing. Therefore, the photosensitive device 100 of the present application uses the comparator 1062 to determine whether the integrated voltage Vo is higher than the threshold voltage Vth. If the integrated voltage Vo is higher than the threshold voltage Vth, the controller 110 is notified to add 1 to the coarse conversion digital code DO_c, and the controller 110 uses the discharge unit 108 to discharge the integration unit 104 to pull down the integration voltage Vo, so that the integration unit 104 can In the coarse conversion stage, the charge generated by the photodiode 102 after being irradiated by light is continuously integrated.
光线越强,积分电压Vo上升的速度也越快,因此在固定的所述粗转换阶段的时间长度下,超过阈值电压Vth的次数也越多,当所述粗转换阶段结束时,粗转换数字码DO_c自然也越大。但相对地,光线越弱,当所述粗转换阶段结束时,粗转换数字码DO_c就越小。The stronger the light, the faster the rising speed of the integrated voltage Vo. Therefore, under the fixed time length of the rough conversion phase, the number of times the threshold voltage Vth is exceeded is also more. When the rough conversion phase ends, the rough conversion digital The code DO_c is also naturally larger. But relatively, the weaker the light is, the smaller the coarse conversion digital code DO_c is when the coarse conversion phase ends.
可以理解的是,积分电压Vo必须要超过阈值电压Vth,才会触发控制器110将粗转换数字码DO_c累加1。在环境光很低的时候,有可能光电二极管102在整个述粗转换阶段产生的电荷都无法使积分电压Vo超过阈值电压Vth,使敏感度受限于阈值电压Vth。但若将阈值电压Vth设定的越低,势必会使放电操作发生的机率提高,由于 放电操作可能会影响积分操作的精准度,因此过于频繁的放电操作对维持感光装置100的精准度来说是不利的。故,本申请还利用逐次逼近式模数转换器106来在所述细转换阶段将所述粗转换阶段结束时残馀的不满阈值电压Vth的积分电压Vo转换为转细换数字码DO_f,以提高感光装置100的敏感度及分辨率。It can be understood that the controller 110 will be triggered to add 1 to the coarse converted digital code DO_c only when the integral voltage Vo exceeds the threshold voltage Vth. When the ambient light is very low, it is possible that the charges generated by the photodiode 102 during the entire coarse conversion stage cannot make the integrated voltage Vo exceed the threshold voltage Vth, so that the sensitivity is limited by the threshold voltage Vth. However, if the threshold voltage Vth is set lower, the probability of the discharge operation will inevitably increase. Since the discharge operation may affect the accuracy of the integral operation, too frequent discharge operations are critical to maintaining the accuracy of the photosensitive device 100. is unfavorable. Therefore, the present application also utilizes the successive approximation analog-to-digital converter 106 to convert the remaining integrated voltage Vo, which is less than the threshold voltage Vth at the end of the coarse conversion phase, into a fine conversion digital code DO_f in the fine conversion phase. The sensitivity and resolution of the photosensitive device 100 are improved.
具体来说,本申请的逐次逼近式模数转换器106为如图1和图2所示的顶极板采样架构,即逐次逼近式模数转换器106的待采样输入电压直接耦接比较器1062的第二输入端,电容阵列1066所包括的多个电容(电容值为C、C、2C、…、2N-1C,其中C为单位电容值,N为大于1的整数)皆通过顶极板耦接至比较器1062的所述第二输入端。这样的好处在于当感光装置100在所述粗转换阶段,开关108为导通时,积分电压Vo和阈值电压Vth分别直接耦接于比较器1062的两输入端,使逐次逼近式模数转换器106成为单纯的比较器,且实际上电容阵列1068会持续地进行采样;因此当感光装置100由所述粗转换阶段进入所述细转换阶段时,开关108断开,逐次逼近式模数转换器106便可专心针对由所述粗转换阶段进入所述细转换阶段时,电容阵列1068采样到的积分电压Vo进行逐次逼近式模数转换,控制器110并将逐次逼近式模数转换器106在所述细转换阶段所输出的输出信号Ss转换为转细换数字码DO_f。Specifically, the successive approximation analog-to-digital converter 106 of the present application is a top-plate sampling architecture as shown in FIG. 1 and FIG. At the second input terminal of 1062, a plurality of capacitors (capacitance values C, C, 2C, ..., 2N-1C) included in the capacitor array 1066 all pass through the top pole The plate is coupled to the second input of the comparator 1062 . The advantage of this is that when the photosensitive device 100 is in the rough conversion stage and the switch 108 is turned on, the integral voltage Vo and the threshold voltage Vth are respectively directly coupled to the two input terminals of the comparator 1062, so that the successive approximation analog-to-digital converter 106 becomes a simple comparator, and in fact the capacitor array 1068 will continuously sample; therefore, when the photosensitive device 100 enters the fine conversion stage from the coarse conversion stage, the switch 108 is turned off, and the successive approximation analog-to-digital converter 106 can concentrate on performing the successive approximation analog-to-digital conversion on the integral voltage Vo sampled by the capacitor array 1068 when entering the fine conversion stage from the coarse conversion stage, and the controller 110 will convert the successive approximation analog-to-digital converter 106 in The output signal Ss output by the fine conversion stage is converted into a fine conversion digital code DO_f.
关于逐次逼近式模数转换器106的操作还包括以下细节。当进入所述细转换阶段后,顶极板采样的逐次逼近式模数转换器106的比较器1062的第一输入端可以通过控制器110产生的控制信号Sm来从原本耦接至阈值电压Vth切换为耦接至第二参考电压V2。逐次逼近逻辑电路1064则依据比较器1062的输出信号Ss分别控制电容阵列1066的多个电容的底极板选择性地耦接至多个电压的其中之一(例如第一参考电压V1、第二参考电压V2、第三参考电压V3),其中第二参考电压可介于第一参考电压V1和第三参考电压V3之间。Further details regarding the operation of the successive approximation analog-to-digital converter 106 include the following. After entering the fine conversion stage, the first input terminal of the comparator 1062 of the successive approximation analog-to-digital converter 106 sampled by the top plate can be originally coupled to the threshold voltage Vth through the control signal Sm generated by the controller 110 Switched to be coupled to the second reference voltage V2. The successive approximation logic circuit 1064 respectively controls the bottom plates of the multiple capacitors of the capacitor array 1066 to selectively couple to one of multiple voltages (such as the first reference voltage V1, the second reference voltage V1, and the second reference voltage) according to the output signal Ss of the comparator 1062. Voltage V2, the third reference voltage V3), wherein the second reference voltage may be between the first reference voltage V1 and the third reference voltage V3.
在某些实施例中,也可以采用非顶极板采样架构的逐次逼近式模数转换器,例如采用底极板采样架构的逐次逼近式模数转换器来作为 逐次逼近式模数转换器106。但因为采用底极板采样架构的逐次逼近式模数转换器106的比较器的输入端不会直接通过开关108耦接至积分电压Vo,故需额外增设另一个比较器来作为所述粗转换阶段所用。In some embodiments, a non-top-plate sampling architecture SAR ADC, for example, a bottom-plate sampling architecture SAR ADC may also be used as the SAR ADC 106 . However, because the input terminal of the comparator of the successive approximation analog-to-digital converter 106 using the bottom plate sampling architecture will not be directly coupled to the integrated voltage Vo through the switch 108, another comparator needs to be additionally added as the coarse conversion. stage used.
接下来说明积分单元104的细节。积分单元104包括运算放大器1042、积分电容Cint、开关1044、开关1046以及开关1048。其中运算放大器1042包括正输入端、负输入端以及输出端,所述负输入端耦接至光电二极管102;所述正输入端耦接至第四参考电压V4。积分电容Cint的一端耦接于运算放大器1042的负输入端。开关1044耦接于运算放大器1042的所述负端和所述输出端之间;开关1046耦接于积分电容Cint的另一端和运算放大器1042的所述输出端之间;开关1048耦接于积分电容Cint的所述另一端和重置电压Vrst之间。Next, details of the integrating unit 104 will be described. The integrating unit 104 includes an operational amplifier 1042 , an integrating capacitor Cint, a switch 1044 , a switch 1046 and a switch 1048 . The operational amplifier 1042 includes a positive input terminal, a negative input terminal and an output terminal, the negative input terminal is coupled to the photodiode 102 ; the positive input terminal is coupled to the fourth reference voltage V4. One terminal of the integrating capacitor Cint is coupled to the negative input terminal of the operational amplifier 1042 . The switch 1044 is coupled between the negative terminal of the operational amplifier 1042 and the output terminal; the switch 1046 is coupled between the other end of the integrating capacitor Cint and the output terminal of the operational amplifier 1042; the switch 1048 is coupled to the integral between the other end of the capacitor Cint and the reset voltage Vrst.
请一并参阅图4,在所述粗转换阶段之前的所述初始阶段的时间T0,控制器110会通过控制信号Srst1、Srst2及Srst3对应地控制开关1044、1046以及1048,使开关1044断开、开关1046导通以及开关1048断开。接着在时间T01控制器110使开关1046断开,并在时间T02使开关1044和开关1048导通以使积分电压Vo被重置为重置电压Vrst,接着控制器110在时间T03使开关1044和开关1048断开,并在时间T04使开关1044重新导通以完成积分积分单元104的重置。Please also refer to FIG. 4 , at the time T0 of the initial stage before the rough conversion stage, the controller 110 controls the switches 1044 , 1046 and 1048 correspondingly through the control signals Srst1 , Srst2 and Srst3 , so that the switch 1044 is turned off. , the switch 1046 is turned on and the switch 1048 is turned off. Then the controller 110 turns off the switch 1046 at time T01, and turns on the switch 1044 and the switch 1048 at time T02 so that the integrated voltage Vo is reset to the reset voltage Vrst, and then the controller 110 turns off the switch 1044 and the switch 1048 at time T03. The switch 1048 is turned off, and the switch 1044 is turned on again at time T04 to complete the reset of the integration unit 104 .
请参与图3,可以看到在所述初始阶段积分电压Vo被重置为重置电压Vrst,接着在时间T1进入所述粗转换阶段,并在时间T8从所述粗转换阶段进入所述细转换阶段,并在时间T9结束所述细转换阶段。在本实施例中,时间T1到T8的长度为预设的时间长度,如前所述,需要小于所搭配的显示屏的消隐时段。由图3还可以观察到当积分电压Vo高于阈值电压Vth,比较器1062的输出信号Ss便会被触发,使控制器110控制放电单元108对积分单元104进行放电操作来使积分电容Cint累积的电荷移动至放电单元108以降低积分电压Vo。在本实施例中,放电操作的时间长度为预设的时间长度,也就是时间T2到T3的时间长度和时间T4到T5的时间长度以及时间T6到T7的时间长度相同。关于放电单元108的细节将说明于下。Referring to FIG. 3, it can be seen that the integrated voltage Vo is reset to the reset voltage Vrst during the initial stage, then enters the coarse switching stage at time T1, and enters the fine switching stage from the coarse switching stage at time T8. transition phase, and ends the fine transition phase at time T9. In this embodiment, the length of time T1 to T8 is a preset time length, which, as mentioned above, needs to be shorter than the blanking period of the matched display screen. It can also be observed from FIG. 3 that when the integral voltage Vo is higher than the threshold voltage Vth, the output signal Ss of the comparator 1062 will be triggered, so that the controller 110 controls the discharge unit 108 to discharge the integral unit 104 to accumulate the integral capacitance Cint The charges of are moved to the discharge unit 108 to reduce the integrated voltage Vo. In this embodiment, the time length of the discharge operation is a preset time length, that is, the time length of time T2 to T3 is the same as the time length of time T4 to T5 and the time length of time T6 to T7. Details about the discharge unit 108 will be described below.
请重新参考图1,放电单元108包含放电电容Cd,放电电容Cd的第一端耦接光电二极管102,放电电容Cd的第二端通过开关1082选择性地耦接至放电参考电压Vrp,放电电容Cd的所述第二端还通过开关1084选择性地耦接至放电电容Cd的所述第一端。Please refer to FIG. 1 again, the discharge unit 108 includes a discharge capacitor Cd, the first end of the discharge capacitor Cd is coupled to the photodiode 102, the second end of the discharge capacitor Cd is selectively coupled to the discharge reference voltage Vrp through the switch 1082, and the discharge capacitor The second terminal of Cd is also selectively coupled to the first terminal of the discharge capacitor Cd through a switch 1084 .
请一并参阅图5,在非放电操作时,控制器110会通过控制信号Sd1及Sd2对应地控制开关1084以及1082,使开关1084导通以及开关1082断开。而当进入所述放电操作时,例如时间T2至T3间,控制器110会在时间T21使开关1084断开,并在时间T22使开关1082导通以将积分电容Cint累积的电荷吸收至放电电容Cd,等同于使积分电容Cint放电,进而使积分电压Vo降低。接着控制器110在时间T23使开关1082断开,并在时间T24使开关1084重新导通以完成所述放电操作。Please refer to FIG. 5 together. During the non-discharging operation, the controller 110 controls the switches 1084 and 1082 correspondingly through the control signals Sd1 and Sd2 , so that the switch 1084 is turned on and the switch 1082 is turned off. When entering the discharge operation, for example, between time T2 and T3, the controller 110 will turn off the switch 1084 at time T21, and turn on the switch 1082 at time T22 to absorb the charge accumulated in the integration capacitor Cint to the discharge capacitor Cd is equivalent to discharging the integral capacitor Cint, thereby reducing the integral voltage Vo. Then the controller 110 turns off the switch 1082 at time T23 and turns on the switch 1084 again at time T24 to complete the discharging operation.
应注意的是,本申请的放电单元108的具体实施方式不限于图1和图2的实施例,只要能够通过控制器110的控制来使积分单元104的积分电压Vo降低的任何方式皆可应用于感光装置100。此外,本申请也不对控制器110的实现方式多做限定。举例来说,控制器110可以使用处理器搭配软件或固件实现,或使用特定电路来以纯硬件的方式实现。It should be noted that the specific implementation of the discharge unit 108 of the present application is not limited to the embodiments shown in FIG. 1 and FIG. 2 , as long as the integration voltage Vo of the integration unit 104 can be reduced through the control of the controller 110, any method can be applied. in the photosensitive device 100 . In addition, the present application does not limit the implementation manner of the controller 110 . For example, the controller 110 can be realized by using a processor together with software or firmware, or by using a specific circuit in pure hardware.
本申请的感光装置100的积分单元104中的积分电容Cint可以具有较小的值以提高积分单元104的增益,使粗转换的效率提高以增加感光装置100敏感度。同时可以扩大顶极板采样的逐次逼近式模数转换器106的电容阵列1066以提高细转换的分辨率。这样一来,即使感光装置100设置在显示屏下,亦可在极短曝光时间同时兼顾高动态范围、高敏感度以及高分辨率。The integrating capacitor Cint in the integrating unit 104 of the photosensitive device 100 of the present application may have a smaller value to increase the gain of the integrating unit 104 , so as to increase the efficiency of the rough conversion and increase the sensitivity of the photosensitive device 100 . At the same time, the capacitive array 1066 of the successive approximation analog-to-digital converter 106 sampled by the top plate can be enlarged to improve the resolution of the fine conversion. In this way, even if the photosensitive device 100 is disposed under the display screen, it can simultaneously take into account high dynamic range, high sensitivity and high resolution with a very short exposure time.
上文的叙述简要地提出了本申请某些实施例之特征,而使得本申请所属技术领域具有通常知识者能够更全面地理解本揭示内容的多种态样。本申请所属技术领域具有通常知识者当可明了,其可轻易地利用本揭示内容作为基础,来设计或更动其他工艺与结构,以实现与此处所述之实施方式相同的目的和/或达到相同的优点。本申请所属 技术领域具有通常知识者应当明白,这些均等的实施方式仍属于本揭示内容之精神与范围,且其可进行各种变更、替代与更动,而不会悖离本揭示内容之精神与范围。The foregoing description briefly sets forth features of certain embodiments of the present application, so that those skilled in the art to which the present application pertains can more fully understand the various aspects of the present disclosure. Those with ordinary knowledge in the technical field to which this application belongs should understand that they can easily use the disclosure as a basis to design or modify other processes and structures to achieve the same purpose and/or achieve the same advantages. Those with ordinary knowledge in the technical field of the present application should understand that these equivalent embodiments still belong to the spirit and scope of the present disclosure, and various changes, substitutions and changes can be made without departing from the spirit of the present disclosure. with range.

Claims (15)

  1. 一种感光装置,其特征在于,所述感光装置依序操作在初始阶段、粗转换阶段以及细转换阶段,所述感光装置包括:A photosensitive device, characterized in that the photosensitive device operates in an initial stage, a coarse conversion stage, and a fine conversion stage in sequence, and the photosensitive device includes:
    光电二极管,耦接于第一参考电压;a photodiode coupled to a first reference voltage;
    积分单元,用来依据所述光电二极管产生的电荷进行积分操作,并对应地输出积分电压;an integration unit, used to perform an integration operation according to the charge generated by the photodiode, and output an integration voltage correspondingly;
    开关,耦接于所述积分单元以及顶极板采样的逐次逼近式模数转换器之间;a switch, coupled between the integration unit and the successive approximation analog-to-digital converter sampled by the top plate;
    所述顶极板采样的逐次逼近式模数转换器,包含:The successive approximation analog-to-digital converter of the top plate sampling includes:
    比较器,所述比较器的第一输入端在所述粗转换阶段耦接至阈值电压,所述比较器的第二输入端通过所述开关选择性地耦接至所述积分电压,所述比较器的第二输入端还耦接至电容阵列,所述比较器的输出端耦接至逐次逼近逻辑电路;a comparator having a first input coupled to a threshold voltage during the coarse switching phase, a second input of the comparator selectively coupled to the integrated voltage through the switch, the The second input terminal of the comparator is also coupled to the capacitor array, and the output terminal of the comparator is coupled to the successive approximation logic circuit;
    所述电容阵列,包括多个电容皆通过顶极板耦接至所述比较器的所述第二输入端;The capacitor array, including a plurality of capacitors are coupled to the second input terminal of the comparator through the top plate;
    所述逐次逼近逻辑电路,用来依据所述比较器的输出信号分别控制所述多个电容的底极板选择性地耦接至多个电压的其中之一;The successive approximation logic circuit is used to respectively control the bottom plates of the plurality of capacitors to be selectively coupled to one of the plurality of voltages according to the output signal of the comparator;
    放电单元,耦接于所述积分单元;以及a discharge unit coupled to the integration unit; and
    控制器,用以控制所述开关导通以使所述感光装置进入所述粗转换阶段,以及控制所述开关不导通以使所述感光装置进入所述细转换阶段,其中在所述粗转换阶段,所述控制器控制所述比较器的所述第一输入端耦接至所述阈值电压,且当所述比较器的所述输出信号指示所述积分电压高于所述阈值电压时,所述控制器将粗转换数字码累加1,并控制所述放电单元对所述积分单元进行放电操作,以降低所述积分电压。a controller, configured to control the switch to be turned on so that the photosensitive device enters the coarse switching stage, and control the switch to be non-conductive to make the photosensitive device enter the fine switching stage, wherein in the coarse In a conversion stage, the controller controls the first input terminal of the comparator to be coupled to the threshold voltage, and when the output signal of the comparator indicates that the integrated voltage is higher than the threshold voltage , the controller accumulates the coarse conversion digital code by 1, and controls the discharge unit to perform a discharge operation on the integration unit, so as to reduce the integration voltage.
  2. 如权利要求1所述的感光装置,其特征在于,所述积分单元包括:The photosensitive device according to claim 1, wherein the integrating unit comprises:
    运算放大器,包括正输入端、负输入端以及输出端,所述负输入端耦接至所述光电二极管;以及an operational amplifier comprising a positive input, a negative input, and an output, the negative input being coupled to the photodiode; and
    积分电容,耦接于所述运算放大器的所述负输入端与所述输出端之间。The integrating capacitor is coupled between the negative input terminal and the output terminal of the operational amplifier.
  3. 如权利要求2所述的感光装置,其特征在于,当所述控制器控制所述放电单元对所述积分单元进行所述放电操作时,所述积分电容累积的电荷移动至所述放电单元。The photosensitive device according to claim 2, wherein when the controller controls the discharge unit to perform the discharge operation on the integration unit, the charge accumulated in the integration capacitor moves to the discharge unit.
  4. 如权利要求3所述的感光装置,其特征在于,所述放电单元包含放电电容,所述放电电容的第一端耦接所述光电二极管,所述放电电容的第二端选择性地耦接至放电参考电压,以及所述放电电容的所述第二端还选择性地耦接至所述放电电容的所述第一端。The photosensitive device according to claim 3, wherein the discharge unit comprises a discharge capacitor, a first end of the discharge capacitor is coupled to the photodiode, and a second end of the discharge capacitor is selectively coupled to the photodiode. to a discharge reference voltage, and the second terminal of the discharge capacitor is also selectively coupled to the first terminal of the discharge capacitor.
  5. 如权利要求4所述的感光装置,其特征在于,所述控制器控制所述开关导通以使所述感光装置进入所述粗转换阶段并维持第一预设时间长度后,控制所述开关不导通以使所述感光装置进入所述细转换阶段。The light-sensing device according to claim 4, wherein the controller controls the switch to be turned on so that the light-sensing device enters the rough switching stage and maintains the first preset time length, and then controls the switch is non-conductive to enter the photosensitive device into the fine switching phase.
  6. 如权利要求4所述的感光装置,其特征在于,当所述比较器的所述输出信号指示所述积分电压高于所述阈值电压时,所述控制器控制所述放电单元对所述积分单元进行所述放电操作并维持第二预设时间长度。The photosensitive device according to claim 4, wherein when the output signal of the comparator indicates that the integrated voltage is higher than the threshold voltage, the controller controls the discharge unit to The unit performs the discharging operation and maintains it for a second preset time period.
  7. 如权利要求4所述的感光装置,其特征在于,在所述粗转换阶段且所述控制器非控制所述放电单元对所述积分单元进行所述放电操作时,所述控制器控制所述放电电容的所述第二端耦接至所述放电电容的所述第一端,并且和所述放电参考电压断开。The photosensitive device according to claim 4, wherein during the rough conversion stage and the controller does not control the discharge unit to perform the discharge operation on the integration unit, the controller controls the The second end of the discharge capacitor is coupled to the first end of the discharge capacitor and disconnected from the discharge reference voltage.
  8. 如权利要求4所述的感光装置,其特征在于,在所述粗转换阶段且所述控制器控制所述放电单元对所述积分单元进行所述放电操作时,所述控制器控制所述放电电容的所述第二端耦接至所述放电参考电压,并且和所述放电电容的所述第一端断开。The photosensitive device according to claim 4, wherein during the rough conversion stage and the controller controls the discharge unit to perform the discharge operation on the integration unit, the controller controls the discharge The second end of the capacitor is coupled to the discharge reference voltage and disconnected from the first end of the discharge capacitor.
  9. 如权利要求2所述的感光装置,其特征在于:The photosensitive device according to claim 2, characterized in that:
    所述积分电容的第一端耦接至所述运算放大器的所述负输入端,以及所述积分电容的所述第一端还选择性地耦接至所述运算放大器的所述输出端;以及a first terminal of the integrating capacitor is coupled to the negative input terminal of the operational amplifier, and the first terminal of the integrating capacitor is also selectively coupled to the output terminal of the operational amplifier; as well as
    所述积分电容的第二端选择性地耦接至所述运算放大器的所述输 出端,以及所述积分电容的所述第二端还选择性地耦接至所述重置电压。A second terminal of the integrating capacitor is selectively coupled to the output terminal of the operational amplifier, and the second terminal of the integrating capacitor is also selectively coupled to the reset voltage.
  10. 如权利要求9所述的感光装置,其特征在于,在所述粗转换阶段,所述积分电容的所述第一端和所述运算放大器的所述输出端断开,以及所述积分电容的所述第二端耦接至所述运算放大器的所述输出端以及和所述重置电压断开。The photosensitive device according to claim 9, characterized in that, in the coarse switching stage, the first terminal of the integrating capacitor is disconnected from the output terminal of the operational amplifier, and the output terminal of the integrating capacitor is The second terminal is coupled to the output terminal of the operational amplifier and disconnected from the reset voltage.
  11. 如权利要求9所述的感光装置,其特征在于,在所述粗转换阶段之前的初始阶段,所述积分电容的所述第一端耦接至所述运算放大器的所述输出端,以及所述积分电容的所述第二端耦接至所述重置电压以及和所述运算放大器的所述输出端断开。The photosensitive device according to claim 9, wherein at an initial stage before the coarse conversion stage, the first terminal of the integrating capacitor is coupled to the output terminal of the operational amplifier, and the The second terminal of the integrating capacitor is coupled to the reset voltage and disconnected from the output terminal of the operational amplifier.
  12. 如权利要求1所述的感光装置,其特征在于,所述逐次逼近逻辑电路在所述细转换阶段依据所述比较器的输出信号分别控制所述多个电容的底极板选择性地耦接至所述第一参考电压、第二参考电压或第三参考电压,以将所述感光装置从所述粗转换阶段进入所述细转换阶段时的所述积分电压转换为数字信号以作为细转换数字码,其中所述粗转换阶段所累积的所述粗转换字码加上所述细转换阶段所得到的所述细转换数字码正相关于所述粗转换阶段的平均照度。The photosensitive device according to claim 1, wherein the successive approximation logic circuit respectively controls the bottom plates of the plurality of capacitors to selectively couple to each other according to the output signal of the comparator in the fine conversion stage. to the first reference voltage, the second reference voltage, or the third reference voltage to convert the integrated voltage when the photosensitive device enters the fine conversion phase from the coarse conversion phase into a digital signal as a fine conversion A digital code, wherein the coarse conversion character code accumulated in the coarse conversion stage plus the fine conversion digital code obtained in the fine conversion stage is positively related to the average illuminance in the coarse conversion stage.
  13. 如权利要求12所述的感光装置,其特征在于,所述控制器控还制所述比较器的所述第一输入端在所述细转换阶段耦接至所述第二参考电压。The photosensitive device according to claim 12, wherein the controller controls the first input terminal of the comparator to be coupled to the second reference voltage during the fine switching phase.
  14. 一种电子装置,其特征在于,包括:An electronic device, characterized in that it comprises:
    显示屏;以及display screen; and
    如权利要求1至13中任一项所述的感光装置,设置于所述显示屏之下方,并对通过所述显示屏的环境光进行传感。The photosensitive device according to any one of claims 1 to 13, which is arranged under the display screen and senses ambient light passing through the display screen.
  15. 如权利要求14所述的电子装置,其特征在于,所述第一预设时间长度小于所述显示屏的消隐时段。The electronic device as claimed in claim 14, wherein the first preset time length is shorter than a blanking period of the display screen.
PCT/CN2021/112749 2021-08-16 2021-08-16 Photosensitive apparatus and related electronic apparatus WO2023019394A1 (en)

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JPH08147714A (en) * 1994-11-25 1996-06-07 Fujitsu Ten Ltd Focusing servo controller
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GB201207673D0 (en) * 2012-05-02 2012-06-13 Bae Systems Plc Controlling bias voltages for optical modulators
CN211236238U (en) * 2017-03-29 2020-08-11 深圳市大疆创新科技有限公司 Light detection and ranging (LIDAR) system and unmanned vehicle
CN112865798A (en) * 2021-01-15 2021-05-28 中国科学院半导体研究所 Noise shaping successive approximation analog-to-digital converter and noise shaping method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08147714A (en) * 1994-11-25 1996-06-07 Fujitsu Ten Ltd Focusing servo controller
CN101606245A (en) * 2007-02-07 2009-12-16 夏普株式会社 Light sensing system
GB201207673D0 (en) * 2012-05-02 2012-06-13 Bae Systems Plc Controlling bias voltages for optical modulators
CN211236238U (en) * 2017-03-29 2020-08-11 深圳市大疆创新科技有限公司 Light detection and ranging (LIDAR) system and unmanned vehicle
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