WO2023011294A1 - Signal processing method and apparatus, and processing chip and signal transmission system - Google Patents

Signal processing method and apparatus, and processing chip and signal transmission system Download PDF

Info

Publication number
WO2023011294A1
WO2023011294A1 PCT/CN2022/108339 CN2022108339W WO2023011294A1 WO 2023011294 A1 WO2023011294 A1 WO 2023011294A1 CN 2022108339 W CN2022108339 W CN 2022108339W WO 2023011294 A1 WO2023011294 A1 WO 2023011294A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
module
dimensionality reduction
equalization
sub
Prior art date
Application number
PCT/CN2022/108339
Other languages
French (fr)
Chinese (zh)
Inventor
尚冬冬
李星
周蒙
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2023011294A1 publication Critical patent/WO2023011294A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/10Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/12Neutralising, balancing, or compensation arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60Receivers
    • H04B10/66Non-coherent receivers, e.g. using direct detection
    • H04B10/69Electrical arrangements in the receiver
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/01Equalisers

Definitions

  • the present application relates to the technical field of communications, and in particular to a signal processing method and device, a processing chip, and a signal transmission system.
  • a signal transmission system generally includes a signal sending device and a signal receiving device, the signal sending device and the signal receiving device are connected through a transmission link (link), and the signal sending device sends a signal to the signal receiving device through the transmission link.
  • the signal usually has intersymbol intrference (ISI).
  • ISI intersymbol intrference
  • the signal receiving device usually uses an equalization algorithm to equalize the signal to eliminate or weaken the ISI of the signal.
  • the MLSE algorithm is an equalization algorithm with better performance, so the MLSE algorithm is usually used to equalize the signal.
  • the signal receiving device usually includes a digital signal processing (digital signal processing, DSP) chip, and the DSP chip performs equalization processing on the signal.
  • the DSP chip includes a feed forward equalization (feed forward equalization, FFE), a post filter (post filter) and an MLSE module connected in sequence, and a path branch calculation module respectively connected to the MLSE module and the post filter.
  • FFE feed forward equalization
  • post filter post filter
  • MLSE module path branch calculation module respectively connected to the MLSE module and the post filter.
  • the FFE equalizes the received signal to obtain an equalized signal.
  • the equalized signal has no ISI and is nonlinear, but the equalized signal contains colored noise.
  • the post-filter filters the equalized signal to obtain a filtered signal.
  • the post-filter converts the colored noise in the equalized signal into white noise, and introduces a variable noise into the equalized signal. controlled ISI.
  • the path branch calculation module calculates the number of path branches of the filtered signal (that is, the number of possible sequences of the filtered signal) according to the filter coefficients of the post filter.
  • the MLSE module performs MLSE processing on the filtered signal according to the number of path branches of the filtered signal to obtain an optimal solution. Among them, the complexity of the MLSE algorithm depends on the number of path branches input to the MLSE module.
  • the number of path branches input to the MLSE module is M L . That is, the number of path branches input to the MLSE module is positively correlated with the modulation order of the post-filter and the number of states (ie, the number of levels) of the filtered signal.
  • the modulation order of the post-filter the higher the modulation order of the post-filter, the higher the number of states of the filtered signal. The more, the higher the complexity of the MLSE algorithm.
  • a 4-level pulse amplitude modulation (phase amplitude modulation, PAM) signal (abbreviated as a PAM4 signal, the number of states of the PAM4 signal is 4)
  • PAM4 signal phase amplitude modulation
  • the resource occupied by the MLSE module to perform MLSE processing on the filtered signal output by the post filter according to the path branch number 16 is as high as 1 million logic gate circuits, so the MLSE processing process Resource consumption is large.
  • the present application provides a signal processing method and device, a processing chip, and a signal transmission system, which help reduce resource consumption of MLSE.
  • the technical scheme of the application is as follows:
  • a signal processing device in a first aspect, includes: an equalization module, a rough decision module, a filter module, an MLSE module, and a mapping module connected in sequence, and the rough decision module is also connected to the mapping module.
  • the equalization module is used to equalize the initial signal input to the equalization module to obtain an equalized signal.
  • the rough judgment module is used to determine the dimensionality reduction position information and the dimensionality reduction signal according to the balanced signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the balanced signal, and the dimensionality reduction signal includes the dimensionality reduction at each moment in n moments
  • the sub-signal, the dimension reduction signal has nothing to do with the modulation format
  • the dimension reduction position information includes the position identification value corresponding to each time in the n times
  • the position identification value corresponding to each time is used to indicate the dimension reduction sub-signal at each time In the corresponding position in the equalized signal
  • n is a positive integer.
  • the filtering module is used for filtering the dimensionality reduction signal to obtain the filtered signal.
  • the MLSE module is used to determine the target path branch (eg, the optimal path branch) of the filtered signal.
  • the mapping module is used to map the target path branch of the filtered signal to obtain the target signal (such as the optimal signal) according to the dimensionality reduction position information.
  • the number of signal states of the target signal is equal to the number of signal states of the balanced signal.
  • Each of the target signals The signal states are the same as or correspond to the respective signal states of the equalized signal.
  • the equalized signal has no ISI and is nonlinear, but the equalized signal contains colored noise, so the dimensionality reduction signal contains colored noise.
  • the filtering module converts the colored noise in the dimensionality reduction signal into white noise, and introduces controllable ISI into the dimensionality reduction signal, so the filtered signal contains white noise and controllable ISI.
  • the target path branch output by the MLSE module includes decision values at each of the n time moments, and the decision values in the target path branch may be hard values or soft values. If the decision value in this target path branch is a hard value, then the individual signal states of the target signal are identical to the individual signal states of the equalized signal. If the decision value in the target path branch is a soft value, the respective signal states of the target signal correspond to the respective signal states of the equalized signal.
  • the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, so the filtered signal input to the MLSE module has nothing to do with the modulation format, and the filtered signal
  • the number of signal states is less than the number of signal states of the dimensionality reduction signal, and the MLSE module needs to calculate fewer path branches in the process of determining the target path branch of the filtered signal, and the process of determining the target path branch of the filtered signal by the MLSE module is the same as
  • the modulation format is irrelevant, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
  • the equalized signal has two state positions adjacent to the corresponding position, the corresponding position is located between the two state positions, the The Euclidean distance between the corresponding position and the two state positions is equal, each state position corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
  • the rough judgment module is specifically configured to: determine the dimensionality reduction position information according to the equalized signal; determine the dimensionality reduction signal according to the equalization signal and the dimensionality reduction position information.
  • the equalized signal includes equalized sub-signals at each of the n times.
  • Determining the dimension-reduced position information according to the equalized signal includes: determining a position identification value corresponding to each time point according to the equalized sub-signal at each time point in the n time points.
  • Determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: determining the dimensionality reduction subsignal at each moment according to the equalization subsignal at each moment in the n moments and the position identification value corresponding to each moment Signal.
  • the equalization module includes: a first equalization submodule and a second equalization submodule.
  • the first equalization submodule, the second equalization submodule and the rough judgment module are connected in sequence, and the first equalization submodule is also connected with the rough judgment module.
  • the first equalization sub-module is used to perform a first equalization process on the initial signal to obtain a first equalized signal.
  • the second equalization sub-module is used for performing a second equalization process on the first equalized signal to obtain a second equalized signal.
  • the equalization signal obtained by the equalization module includes a first equalization signal and a second equalization signal
  • the corresponding position of the dimensionality reduction sub-signal in the equalization signal is the corresponding position of the dimensionality reduction sub-signal in the second equalization signal
  • the equalization sub-signal is a sub-signal in the second equalized signal.
  • the first equalized signal and the second equalized signal respectively include equalized sub-signals at each of the n times.
  • the equalization module since the equalization module includes two cascaded equalization sub-modules, the equalization module can perform two-level equalization processing on the initial signal input to the equalization module, which helps to improve the equalization signal output by the equalization module (section The signal-to-noise ratio of the second equalization signal), thereby improving the accuracy of the dimensionality reduction position information determined by the rough decision module and the dimensionality reduction signal.
  • the first equalization sub-module is an FFE or a multiple-input multiple-output (multiple-input multiple-out-put, MIMO) equalizer.
  • the second equalization sub-module is decision feedback equalization (decision feedback equalization, DFE).
  • the rough decision module is specifically used to: determine the dimensionality reduction position information according to the second equalization signal; determine the dimensionality reduction position information according to the first equalization signal and the dimensionality reduction position information Dimensionality reduction signal.
  • determining the dimensionality reduction position information by the rough decision module according to the second equalized signal includes: the rough decision module determines the corresponding The location identifier value.
  • the coarse judgment module determines the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction position information includes: the rough judgment module according to the equalization sub-signal at each moment of the n moments included in the first equalization signal and the corresponding Determine the dimensionality reduction sub-signal at each moment.
  • the filtered signal includes a filtered sub-signal at each of the n moments
  • the target path branch includes a decision value at each of the n moments
  • each of the n moments The decision value of is obtained by the MLSE module based on the filtered sub-signals at each moment
  • the target signal includes target sub-signals at each of the n times.
  • the mapping module is specifically used to: determine the target sub-signal at each time according to the decision value at each time in the n times and the position identification value corresponding to each time; Signal identifies the target signal.
  • the judgment value is a hard value
  • the mapping module is specifically configured to: determine the sum of the judgment value at each of the n moments and the position identification value corresponding to each moment as the target subsignal.
  • the decision value is a soft value
  • the mapping module is specifically configured to: determine the mapping rule corresponding to each moment according to the position identification value corresponding to each moment in the n moments; The value and the mapping rule corresponding to each moment determine the target sub-signal at each moment.
  • the signal state of the equalized signal includes -3, -1, 1, and 3, the signal state of the dimensionality reduction signal includes -1 and 1, and the position identification value includes -2, 0, and 2.
  • p_ind_d(k) is the position identification value corresponding to the kth moment
  • ld_out(k) is the judgment value at the kth moment
  • hd_out(k) is the target sub-signal at the kth moment
  • max is a constant
  • k is a positive value not greater than n Integer, in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal.
  • the signal processing device further includes: an autocorrelation estimation module.
  • the autocorrelation estimation module is respectively connected with the equalization module, the filtering module and the MLSE module.
  • the autocorrelation estimation module is used to determine the filter coefficient of the filter module according to the equalized signal, and provide the filter coefficient to the filter module and the MLSE module.
  • the filtering module is specifically configured to perform filtering processing on the dimensionality reduction signal according to the filtering coefficient.
  • the MLSE module is specifically used to determine the target path branch of the filtered signal according to the filter coefficient.
  • the filtered signal includes filtered sub-signals at each of the n times
  • the MLSE module is specifically configured to: determine according to the filter coefficient of the filtering module and the filtered sub-signal at each of the n times The branch metrics at each moment; determining the target path branch of the filtered signal according to the branch metrics at n times.
  • the signal processing device further includes: a decoding module.
  • the decoding module is connected with the mapping module.
  • the decoding module is used to decode the target signal to restore data.
  • the decoding module may include a forward error correction code (forward error correction, FEC) decoder, and the decoding module 107 recovers the data as a sequence composed of 0 and 1.
  • FEC forward error correction
  • the signal processing device is an intensity modulation device or a phase modulation device.
  • the equalized signal is a complex signal or a real signal.
  • the equalization signal is a PAM signal
  • the dimensionality reduction signal is a binary amplitude keying (on-off keying, OOK) signal.
  • the equalized signal is a quadrature amplitude modulation (quadrature amplitude modulation, QAM) signal
  • the dimensionality reduction signal is a quadrature phase shift keying (quadrature phase shift keying, QPSK) signal.
  • a signal processing method is provided, which is applied to a signal processing device.
  • the signal processing device includes an equalization module, a rough judgment module, a filter module, an MLSE module and a mapping module connected in sequence, and the rough judgment module is also connected with the mapping module.
  • the method includes: an equalization module performs equalization processing on an initial signal input to the equalization module to obtain an equalized signal.
  • the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, and the dimensionality reduction signal includes the dimensionality reduction sub-signals at each moment in n times , the dimensionality reduction signal has nothing to do with the modulation format, the dimensionality reduction position information includes the position identification value corresponding to each of the n times, and the position identification value corresponding to each time point is used to indicate that the dimensionality reduction sub-signal at each time point is at The corresponding position in the equalized signal, n is a positive integer.
  • the filtering module performs filtering processing on the dimensionality reduction signal to obtain the filtered signal.
  • the MLSE module determines target path branches of the filtered signal.
  • the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. The status is the same or corresponds.
  • the equalized signal has two state positions adjacent to the corresponding position, the corresponding position is located between the two state positions, the The Euclidean distance between the corresponding position and the two state positions is equal, each state position corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
  • the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalized signal, including: the rough judgment module determines the dimensionality reduction position information according to the equalized signal; the rough judgment module determines the dimensionality reduction signal according to the equalized signal and the dimensionality reduction position information.
  • the equalized signal includes equalized sub-signals at each of the n moments
  • the rough decision module determines the dimensionality reduction position information according to the equalized signal, including: the rough decision module The equalized sub-signal of , and determine the position identification value corresponding to each moment.
  • the rough judgment module determines the dimensionality reduction signal according to the equalized signal and the dimensionality reduction position information, including: the rough judgment module determines each Dimensionality reduction sub-signal at a moment.
  • the equalization module includes a first equalization submodule and a second equalization submodule.
  • the first equalization sub-module, the second equalization sub-module and the rough judgment module are connected in sequence, and the first equalization sub-module is also connected with the rough judgment module.
  • the equalization module equalizes the initial signal input to the equalization module to obtain an equalized signal, including: the first equalization sub-module performs first equalization processing on the initial signal to obtain the first equalized signal; the second equalization sub-module performs equalization on the first equalized signal second equalization processing to obtain a second equalization signal.
  • the equalization signal obtained by the equalization module includes a first equalization signal and a second equalization signal
  • the corresponding position of the dimensionality reduction sub-signal in the equalization signal is the corresponding position of the dimensionality reduction sub-signal in the second equalization signal
  • the equalization sub-signal is a sub-signal in the second equalized signal
  • the rough decision module determining the dimensionality reduction location information according to the equalized signal includes: the rough decision module determining the dimensionality reduction location information according to the second equalization signal.
  • the rough judgment module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information, including: the rough judgment module determines the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction location information.
  • the filtered signal includes a filtered sub-signal at each of the n moments
  • the target path branch includes a decision value at each of the n moments
  • each of the n moments The decision value of is obtained by the MLSE module based on the filtered sub-signals at each moment
  • the target signal includes target sub-signals at each of the n times.
  • the mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, including: the mapping module according to the decision value at each time in the n times and the position identification value corresponding to each time, Determine the target sub-signal at each moment; the mapping module determines the target signal according to the target sub-signals at n times.
  • the decision value is a hard value
  • the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including: mapping The module determines the sum of the decision value at each of the n moments and the position identification value corresponding to each moment as the target sub-signal at each moment.
  • the decision value is a soft value
  • the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including: mapping The module determines the mapping rule corresponding to each time according to the position identification value corresponding to each time in the n times; The mapping rule determines the target sub-signal at each moment.
  • the signal state of the equalized signal includes -3, -1, 1, and 3, the signal state of the dimensionality reduction signal includes -1 and 1, and the position identification value includes -2, 0, and 2.
  • p_ind_d(k) is the position identification value corresponding to the kth moment
  • ld_out(k) is the judgment value at the kth moment
  • hd_out(k) is the target sub-signal at the kth moment
  • max is a constant
  • k is a positive value not greater than n Integer, in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal.
  • the signal processing device further includes an autocorrelation estimation module, and the autocorrelation estimation module is respectively connected to the equalization module, the filtering module and the MLSE module.
  • the method also includes: the autocorrelation estimation module determines the filter coefficient of the filter module according to the equalized signal, and provides the filter coefficient to the filter module and the MLSE module respectively.
  • the filtering module performs filtering processing on the dimensionality reduction signal, including: the filtering module performs filtering processing on the dimensionality reduction signal according to the filtering coefficient.
  • the MLSE module determines the target path branch of the filtered signal, including: the MLSE module determines the target path branch of the filtered signal according to the filter coefficient.
  • the filtered signal includes filtered sub-signals at each of the n times, and the MLSE module determines the target path branch of the filtered signal according to the filter coefficient, including: the MLSE module determines the target path branch of the filtered signal according to the filter coefficient and the n times The filtered sub-signal at each moment determines the branch metric at each moment; the MLSE module determines the target path branch of the filtered signal according to the branch metrics at n moments.
  • the signal processing device further includes a decoding module connected to the mapping module.
  • the method also includes: the decoding module decodes the target signal to restore the data.
  • a third aspect provides a processing chip, where the processing chip includes the signal processing apparatus provided in the first aspect or any optional implementation manner of the first aspect.
  • the processing chip is a DSP chip.
  • a signal receiving device including a memory chip and a processing chip;
  • Memory chips are used to store computer programs
  • the processing chip is used to execute the computer program stored in the storage chip so that the signal receiving device executes the signal processing method provided in the second aspect or any optional implementation manner of the second aspect.
  • a fifth aspect provides a signal transmission system, including: a signal sending device and the signal receiving device as provided in the fourth aspect.
  • the signal sending device is connected to the signal receiving device through a transmission link, and the signal sending device is used to send a signal to the signal receiving device through the transmission link.
  • the signal sending device is an optical transmitter
  • the signal receiving device is an optical receiver
  • the transmission link is an optical link
  • a sixth aspect provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed, the implementation as provided in the second aspect or any optional implementation manner of the second aspect is provided. signal processing method.
  • a computer program product in a seventh aspect, includes a program or code, and when the program or code is executed, it realizes the signal processing provided in the second aspect or any optional implementation manner of the second aspect method.
  • the equalization module performs equalization processing on the initial signal to obtain an equalized signal
  • the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, and converts the dimensionality reduction
  • the dimension position information is output to the mapping module, and the dimension reduction signal is output to the filter module.
  • the filter module filters the dimension reduction signal to obtain a filter signal, and outputs the filter signal to the MLSE module.
  • the MLSE module determines the target path branch of the filter signal, and The target path branch of the filtered signal is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. Since the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module The number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal input to the MLSE module has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and The process of determining the branch of the target path by the MLSE module has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the
  • FIG. 1 is a schematic structural diagram of a signal transmission system provided by an embodiment of the present application.
  • Fig. 2 is the structural representation of a kind of DSP chip provided by related art
  • FIG. 3 is a schematic structural diagram of a signal processing device provided in an embodiment of the present application.
  • Fig. 4 is a corresponding relationship diagram between a position identification value and a signal state of a PAM4 signal provided by an embodiment of the present application;
  • FIG. 5 is a relationship diagram between an equalization signal and a dimensionality reduction signal provided by an embodiment of the present application
  • FIG. 6 is a relationship diagram between another equalization signal and a dimensionality reduction signal provided by an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a mapping rule provided by an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application.
  • Fig. 11 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application.
  • Fig. 12 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application.
  • FIG. 13 is a schematic diagram of a signal processing process provided by an embodiment of the present application.
  • FIG. 14 is a relationship diagram between signal power and BER provided by an embodiment of the present application.
  • FIG. 15 is a graph showing the relationship between power and BER of another signal provided by the embodiment of the present application.
  • Fig. 16 is a flowchart of a signal processing method provided by an embodiment of the present application.
  • the signal transmission system usually includes a signal sending device and a signal receiving device, the signal sending device and the signal receiving device are connected through a transmission link, and the signal sending device sends a signal to the signal receiving device through the transmission link.
  • the signal transmission system may be an optical transmission system, correspondingly, the signal sending device may be an optical transmitter, the signal receiving device may be an optical receiver, and the transmission link may be an optical link.
  • the signal transmission system may be a wireless transmission system, correspondingly, the signal sending device may be a wireless sending device, the signal receiving device may be a wireless receiving device, and the transmission link may be a wireless link.
  • the signal transmission system may also be a cable transmission system, and accordingly, the transmission link may be a cable link.
  • the transmission link includes a transmission medium and a transmission device.
  • an optical link usually includes an optical transmission medium such as an optical fiber, and may also include optical devices such as an optical amplifier and an optical connector, which are not limited in this embodiment of the present application.
  • FIG. 1 shows a schematic structural diagram of a signal transmission system provided by an embodiment of the present application.
  • Figure 1 takes the optical transmission system as an example to illustrate.
  • the signal transmission system includes a signal sending device 01 and a signal receiving device 02 , and the signal sending device 01 and the signal receiving device 02 are connected through a transmission link 03 .
  • the signal sending device 01 includes a sequentially connected laser (laser) 011, driver (driver) 012, and modulator (modulator) 013
  • the signal receiving device 02 includes a sequentially connected photoelectric conversion device (PD) 021 , an analog-digital converter (analog-digital converter, ADC) 022 and a DSP chip 023.
  • PD photoelectric conversion device
  • ADC analog-digital converter
  • the signal sending device 01 and the signal receiving device 02 are connected through the transmission link 03, specifically, the modulator 013 and the PD 021 are connected through the transmission link 03.
  • the optical signal sent by the laser 011 is driven by the driver 012 and then transmitted to the modulator 013.
  • the modulated optical signal is sent to the signal receiving device 02 through the transmission link 03.
  • the modulated optical signal carries the data to be sent.
  • the PD 021 converts the optical signal into an electrical signal, and the electrical signal converted by the PD 021 is an analog electrical signal.
  • the ADC performs analog-to-digital conversion on the analog electrical signal to obtain a digital electrical signal.
  • the digital electrical signal is processed to recover the data.
  • the signal During the signal transmission process, limited by the bandwidth of each device in the signal transmission system, the signal usually has ISI, which affects the quality of the signal.
  • the signal receiving device In order to ensure that the signal receiving device recovers correct data from the received signal, after receiving the signal, the signal receiving device usually uses an equalization algorithm to equalize the signal to eliminate or weaken the ISI of the signal.
  • Current equalization algorithms include FFE algorithm, DFE algorithm, MLSE algorithm, MAP (mapreduce) algorithm, etc. Compared with FFE algorithm, DFE algorithm, and MAP algorithm, the bit error rate (bit error rate; BER) of MLSE algorithm is lower, and The resource consumption is less, so the MLSE algorithm is usually used to equalize the signal.
  • the process of equalizing the signal is usually performed by the DSP chip in the signal receiving device.
  • FIG. 2 shows a schematic structural diagram of a DSP chip provided in the related art.
  • the DSP chip includes an FFE, a post-filter and an MLSE module connected in sequence, and a path branch calculation module connected to the MLSE module and the post-filter respectively.
  • the FFE performs equalization processing on the received signal (that is, a digital electrical signal) to obtain an equalized signal.
  • the equalized signal has no ISI and is non-linear, but the equalized signal contains colored noise.
  • the post-filter filters the equalized signal to obtain a filtered signal. During the process of filtering the equalized signal, the post-filter converts the colored noise in the equalized signal into white noise, and introduces a variable noise into the equalized signal.
  • the path branch calculation module calculates the number of path branches of the filtered signal according to the filter coefficients of the post filter.
  • the MLSE module performs MLSE processing on the filtered signal according to the number of path branches of the filtered signal to obtain an optimal solution.
  • the complexity of the MLSE algorithm depends on the number of path branches input to the MLSE module. Assume that the number of states of the filtered signal is M, and the modulation order of the post-filter is L (correspondingly, the length of the memory introduced is L-1, and the length of the memory introduced refers to the length of the controllable ISI introduced by the post-filter) , then the number of path branches input to the MLSE module is M L . That is to say, the number of path branches input to the MLSE module is positively correlated with the modulation order of the post-filter and the number of states of the filtered signal. The higher the modulation order of the post-filter is, the more the number of states of the filtered signal is. The higher the complexity.
  • the resource consumption of the MLSE process is still relatively large.
  • the number of path branches input to the MLSE module is 16, and the MLSE module performs MLSE processing on the filtered signal output by the post-filter according to the number of 16 path branches. resources up to 1 million logic gates. For PAM16 signals, the algorithm complexity of the MLSE module is higher and the resource consumption is greater.
  • the signal processing device includes an equalization module, a rough decision module, a filtering module, an MLSE module and a mapping module.
  • the equalization module performs equalization processing on the initial signal to obtain an equalized signal.
  • the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, outputs the dimensionality reduction position information to the mapping module, and outputs the dimensionality reduction signal to the filtering module.
  • the filtering module filters the dimensionality reduction signal to obtain a filtered signal, and outputs the filtered signal to the MLSE module.
  • the MLSE module determines the target path branch of the filtered signal (eg, the optimal path branch), and outputs the target path branch of the filtered signal to the mapping module.
  • the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal (for example, the optimal signal).
  • the dimensionality reduction signal has nothing to do with the modulation format
  • the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal
  • the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal
  • the input filter of the MLSE module The number of signal states of the signal is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal input to the MLSE module has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, Moreover, the process of determining the branch of the target path by the MLSE module has nothing to do with the modulation format. In this way, it is helpful to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
  • the technical solutions of the embodiments of the present application are introduced below.
  • FIG. 3 shows a schematic structural diagram of a signal processing device 10 provided by an embodiment of the present application.
  • the signal processing apparatus 10 may be a signal receiving device, or a functional component in the signal receiving device.
  • the signal processing device 10 is a DSP chip in the signal receiving device; or, the signal processing device 10 is a partial structure in the DSP chip; or, the signal processing device 10 includes a DSP chip and other structures in the signal receiving device, and the present application implements Examples are not limited to this.
  • the signal processing device 10 includes: an equalization module 101 , a rough decision module 102 , a filter module 103 , an MLSE module 104 and a mapping module 105 connected in sequence, and the rough decision module 102 is also connected to the mapping module 105 .
  • the rough decision module 102 has a first output terminal a1 and a second output terminal a2
  • the mapping module 105 has a first input terminal b1 and a second input terminal b2
  • the first output terminal a1 of the rough decision module 102 is connected to the filter module 103
  • the second output terminal a2 of the rough decision module 102 is connected to the second input terminal b2 of the mapping module 105
  • the first input terminal b1 of the mapping module 105 is connected to the MLSE module 104 .
  • the equalization module 101 is configured to perform equalization processing on an initial signal input to the equalization module 101 to obtain an equalized signal.
  • the rough decision module 102 is configured to determine dimensionality reduction position information and dimensionality reduction signals according to the equalized signal.
  • the dimension reduction signal can be output through the first output terminal a1 of the rough decision module 102, and the dimension reduction position information can be output through the second output terminal a2 of the rough decision module 102 .
  • the filtering module 103 is configured to perform filtering processing on the dimensionality reduction signal to obtain a filtered signal.
  • the MLSE module 104 is used to determine a target path branch (e.g., an optimal path branch) for the filtered signal.
  • the mapping module 105 is used for the dimensionality reduction position information, and maps the target path branch of the filtered signal to obtain a target signal (eg, an optimal signal).
  • the equalized signal has no ISI and is non-linear, but the equalized signal contains colored noise, so the dimensionality reduction signal contains colored noise, and the filtering module 103 converts the colored noise in the dimensionality reduction signal into is white noise, and introduces controllable ISI into the dimensionality reduction signal, so the filtered signal contains white noise and controllable ISI.
  • the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal
  • the dimensionality reduction signal includes dimensionality reduction sub-signals at each moment in n times
  • the dimensionality reduction signal has nothing to do with the modulation format
  • the dimensionality reduction signal The location information is related to the modulation format of the equalized signal (the dimensionality-reduced location information may be determined according to the modulation format of the equalized signal), and the dimensionality-reduced location information includes the location identification value corresponding to each moment in the n times, each The position identification value corresponding to each moment is used to indicate the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, and n is a positive integer.
  • the number of signal states of the equalized signal is equal to the number of signal states of the initial signal
  • the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal
  • the number of signal states of the target signal is equal to the number of signal states of the equalized signal
  • the numbers are equal, and each signal state of the target signal is the same as or corresponds to each signal state of the equalized signal.
  • the target path branch output by the MLSE module 104 includes decision values at each of the n time moments, and the decision values in the target path branch may be hard values or soft values. If the decision value in this target path branch is a hard value, then the individual signal states of the target signal are identical to the individual signal states of the equalized signal. If the decision value in the target path branch is a soft value, the respective signal states of the target signal correspond to the respective signal states of the equalized signal.
  • the initial signal may be a real number signal, and correspondingly, the equalization signal, the dimensionality reduction signal, the filtering signal and the target signal are all real number signals.
  • the initial signal may be a complex signal, and accordingly, the equalized signal, the dimensionality reduction signal, the filtered signal, and the target signal are all complex signals.
  • a real signal includes only the real part, and a complex signal includes both real and imaginary parts.
  • the number of signal states of the dimensionality reduction signal and the number of signal states of the filtered signal are smaller than the number of signal states of the initial signal, the number of signal states of the equalized signal, the number of signal states of the target signal, and the initial Signals have an equal number of signal states.
  • the initial signal, the equalization signal, and the target signal are all real signals, and specifically are PAM signals (such as PAM4 signals, PAM16 signals, etc.), then both the dimensionality reduction signal and the filtered signal can be OOK signals.
  • the initial signal, the equalized signal and the target signal are all complex signals, and specifically are QAM signals (such as 64QAM signals, 16QAM signals, etc.), then both the dimensionality reduction signal and the filtered signal may be QPSK signals.
  • the signal processing device 10 may be an intensity modulation device or a phase modulation device. If the signal processing device 10 is an intensity modulation device, the initial signal, the equalized signal, the dimensionality reduction signal, the filtered signal and the target signal are all real number signals. If the signal processing device 10 is a phase modulation device, the initial signal, the equalized signal, the dimensionality reduction signal, the filtered signal and the target signal are all complex signals.
  • the equalization module performs equalization processing on the initial signal to obtain an equalized signal
  • the rough decision module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, and outputs the dimensionality reduction position information
  • the mapping module output the dimension reduction signal to the filter module
  • the filter module filters the dimension reduction signal to obtain the filter signal
  • the MLSE module determines the target path branch of the filter signal
  • the target path of the filter signal The path branch is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal.
  • the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module
  • the number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal input to the MLSE module has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and The process of determining the branch of the target path by the MLSE module has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
  • the equalized signal has two state positions adjacent to the corresponding position, and the corresponding position Located between the two state positions, the corresponding position is equal to the Euclidean distance between the two state positions, each state position in the two state positions corresponds to a signal state of the balanced signal, and the two state positions The corresponding signal states are different.
  • the equalized signal is a PAM4 signal
  • the signal states of the PAM4 signal include -3, -1, 1 and 3.
  • the position identification value indicates the dimensionality reduction sub-signal ld_sig(
  • the equalized signal has two state positions adjacent to the corresponding position k, and the two state positions are consistent with the signal of the equalized signal
  • the states -3 and -1 are in one-to-one correspondence, the corresponding position k is located between the two state positions, and the corresponding Euclidean distance between the two state positions is equal to the corresponding position k.
  • the kth time is any one of the n times, 1 ⁇ k ⁇ n, and k is an integer.
  • the equalized signal is a PAM4 signal.
  • FIG. 4 shows a correspondence diagram between a location identifier value and a signal state of a PAM4 signal provided in an embodiment of the present application.
  • state position 3 The Euclidean distance between the state positions (this state position is called state position 3 for brevity), and the Euclidean distance between the corresponding position 2 and the state position 1 is equal to the Euclidean distance between the corresponding position 2 and the state position 3.
  • the rough judgment module 102 is used to determine the dimensionality reduction position information and the dimensionality reduction signal according to the equalized signal specifically includes: the rough judgment module 102 is specifically used to: determine the dimensionality reduction position information according to the equalized signal; according to the equalized signal and The dimensionality reduction position information determines the dimensionality reduction signal.
  • the realization process of determining the dimensionality reduction position information by the rough decision module 102 and the realization process of the dimensionality reduction signal determination by the rough decision module 102 are respectively introduced below.
  • the equalized signal includes equalized sub-signals at each of the n times
  • the rough decision module 102 determines the dimensionality reduction position information according to the equalized signal includes: the rough decision module 102 according to the For the equalized sub-signal at each of the n time instants, determine the position identification value corresponding to each instant.
  • the rough judgment module 102 judges the balanced sub-signal at each time according to the judgment rule, and determines the position identification value corresponding to each time according to the judgment result of the balanced sub-signal at each time.
  • the decision result of the equalized sub-signal at each moment includes two decision signal states (or called decision symbols), and the rough decision module 102 determines the position identification value corresponding to each moment according to the two decision signal states,
  • the two decision signal states correspond to two state positions, and the corresponding position indicated by the position identification value is equal to the Euclidean distance between the two state positions.
  • hd_sig(k) represents the equalized sub-signal at the kth moment, and each of -3, -1, 1 and 3 in the decision result is a decision signal state (or called a decision symbol).
  • Table 1 when hd_sig(k) ⁇ -1, the judgment result is -3 and -1; when -1 ⁇ hd_sig(k) ⁇ 1, the judgment result is -1 and 1; when hd_sig(k)> 1, the verdict is 1 and 3.
  • the relationship between the decision result and the location identification value may be as shown in FIG. 4 .
  • the equalized signal includes equalized sub-signals at each of the n times
  • the rough judgment module 102 determines the dimensionality reduction signal according to the equalization signal and dimensionality reduction position information including: rough judgment
  • the module 102 determines the dimensionality reduction sub-signal at each time point according to the balanced sub-signal at each time point in the n time points and the location identification value corresponding to each time point.
  • the rough decision module 102 implements dimensionality reduction of the equalized signal, so that the number of signal states of the dimensionality-reduced signal determined by the rough decision module 102 is smaller than the number of signal states of the equalized signal.
  • the signal state refers to the possible states of the signal
  • the number of signal states refers to the number of possible states of the signal at each moment.
  • signal states are also referred to as levels, therefore, the number of signal states is also referred to as the number of signal levels.
  • the equalized signal as an example of a PAM4 signal, please refer to FIG. 5 , which shows a relationship diagram between an equalized signal and a dimensionality reduction signal provided by an embodiment of the present application.
  • the signal states of the balanced signal include -3, -1, 1 and 3
  • the signal states of the dimensionality reduction signal include -1 and 1
  • the balance signal has 4 signal states
  • the dimensionality reduction signal has 2 Signal states, so the number of signal states of the reduced-dimensional signal is smaller than the number of signal states of the equalized signal, and the reduced-dimensional signal is independent of the modulation format of the equalized signal.
  • the most likely signal state (most likely to be the state of the signal sent by the signal sending device) is selected from the signal state of the equalized sub-signal at each moment, and based on this The most likely signal state obtains the signal state of the dimensionality reduction sub-signal at each moment, and the subsequent filtering module 103, MLSE module 104 and other modules process according to the dimensionality reduction sub-signal, which helps to simplify the filtering module 103, MLSE module 104, etc. Computational complexity of the module. Still taking the example that the equalized signal is a PAM4 signal, please refer to FIG.
  • the equalized signal includes the equalized sub-signals at the kth moment, the k+1th moment, and the k+2th moment, and the kth moment, the k+1st moment, and the k+2th moment
  • the signal states of the balanced sub-signal at each moment include -3, -1, 1, and 3, and the most likely signal states of the signal states of the balanced sub-signal at the kth moment are -3 and -1, and the k+1th
  • the most probable signal states of the signal states of the equalized sub-signal at time instant are 1 and 3, and the most probable signal states of the signal states of the equalized sub-signal at time k+2 are -1 and 1.
  • the dimensionality reduction signal and dimensionality reduction position information are obtained through the processing of the rough decision module 102 .
  • the dimensionality reduction signal includes the dimensionality reduction sub-signals at the kth moment, the k+1th moment and the k+2th moment, and the dimensionality reduction position information includes the kth moment, the k+1th moment and the k+2th moment
  • the signal state of the sub-signal at each of the kth time, the k+1 time and the k+2 time includes -1 and 1, the position identification value corresponding to the k time is -2, and the k+1 time corresponds to The position identification value of is 2, and the position identification value corresponding to the k+2th moment is 0.
  • the position identifier value -2 corresponding to the kth moment is determined according to the most likely signal states -3 and -1 of the equalized sub-signal at the kth moment, and the position identifier value 2 corresponding to the k+1th moment is determined according to the k+1th
  • the most probable signal states 1 and 3 of the balanced sub-signal at the moment are determined, and the position identification value 0 corresponding to the k+2th time is determined according to the most probable signal states -1 and 1 of the balanced sub-signal at the k+2th time .
  • the equalization module 101 may include at least one equalization sub-module.
  • FIG. 7 shows a schematic structural diagram of another signal processing apparatus 10 provided by an embodiment of the present application.
  • the equalization module 101 includes a first equalization sub-module 1011 and a second equalization sub-module 1012 .
  • the first equalization sub-module 1011 , the second equalization sub-module 1012 and the rough decision module 102 are connected in sequence, and the first equalization sub-module 1011 is also connected to the rough decision module 102 .
  • the rough decision module 102 has a first input terminal a3 and a second input terminal a4, the output terminal of the second equalization sub-module 1012 is connected to the first input terminal a3 of the rough decision module 102, and the output terminal of the first equalization sub-module 1011 It is connected with the second input terminal a4 of the rough decision module 102 .
  • the equalization module 101 is used to equalize the initial signal input to the equalization module 101, including: the first equalization sub-module 1011 is used to perform the first equalization process on the initial signal to obtain the first equalized signal (marked as 1hd_sig); The equalization sub-module 1012 is configured to perform a second equalization process on the first equalized signal to obtain a second equalized signal (marked as 2hd_sig).
  • the equalized signal (i.e. hd_sig) obtained by equalizing the initial signal by the equalization module 101 includes a first equalized signal (i.e. 1hd_sig) and a second equalized signal (i.e.
  • the corresponding position of the dimensionality reduction sub-signal in the equalized signal is the Corresponding positions of the dimensionality reduction sub-signals in the second equalized signal 2hd_sig, the first equalized signal and the second equalized signal respectively include the equalized sub-signals at each of the n times.
  • the first equalization sub-module 1011 may be an FFE or a MIMO equalizer
  • the second equalization sub-module 1012 may be a DFE.
  • the initial signal is a real number signal
  • the first equalization sub-module 1011 is an FFE.
  • the initial signal is a complex signal
  • the first equalization sub-module 1011 is a MIMO equalizer.
  • the equalization module 101 includes two sub-modules as an example. In practical applications, the equalization module 101 may include three or more sub-modules, and the sub-modules in the equalization module 101 may be FFE, DFE or MAP equalizers. device, which is not limited in the embodiment of this application.
  • the equalization module 101 can carry out two-stage equalization processing on the initial signal input to the equalization module 101, which helps to improve the equalized signal (the second equalized signal) output by the equalized module 101. ), thereby improving the accuracy of the dimensionality reduction position information and the dimensionality reduction signal output by the rough decision module 102.
  • the rough decision module 102 determining the dimensionality reduction position information according to the equalized signal includes: the rough decision module 102 determining the dimensionality reduction position information according to the second equalized signal.
  • the rough decision module 102 determines the position identification value corresponding to each time point according to the equalized sub-signal at each time point in the n time points included in the second equalized signal.
  • the rough decision module 102 determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: the rough decision module 102 determining the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction location information.
  • the rough decision module 102 determines the dimensionality reduction sub-signal at each time according to the equalization sub-signal at each time in the n time included in the first equalization signal and the position identification value corresponding to each time.
  • the rough judgment module 102 determines the process of the position identification value corresponding to each moment according to the equalized sub-signal at each moment included in the second equalized signal
  • the rough decision module 102 determines the corresponding position identification value according to each moment included in the first equalized signal
  • the process of determining the dimensionality reduction sub-signal at each moment by the equalization sub-signal and the position identification value corresponding to each moment can refer to the relevant description of the embodiment shown in FIG.
  • the equalized sub-signal used when the rough judgment module 102 determines the position identification value p_ind_d(k) corresponding to the k-th moment is the k-th equalized sub-signal included in the second equalized signal
  • the equalized sub-signal 2hd_sig(k) at the moment, the equalized sub-signal adopted when the rough decision module 102 determines the dimensionality reduction sub-signal ld_sig(k) at the kth moment is the equalized sub-signal 1hd_sig( k).
  • the second equalized signal has a Two state positions, the corresponding position is located between the two state positions, the corresponding position is equal to the Euclidean distance between the two state positions, and each state position in the two state positions corresponds to the second equalization signal A signal state, the signal states corresponding to the two state positions are different.
  • the filtering module 103 has a filtering coefficient, and the filtering module 103 is configured to perform filtering processing on the dimensionality reduction signal output by the rough decision module 102 according to the filtering coefficient to obtain a filtered signal.
  • the filtered signal includes filtered sub-signals at each of the n times.
  • the filtering module 103 is a post filter.
  • the filtered sub-signal at time +1, pf(k+1) represents the filtered sub-signal at time k+1.
  • the MLSE module 104 is used to determine a target path branch of the filtered signal output by the filtering module 103.
  • the target path branch is also called an optimal path branch or an optimal sequence.
  • the filtered signal includes filtered sub-signals at each of the n times.
  • the MLSE module 104 is specifically configured to: according to the filter coefficient of the filter module 103 and each of the n times The branch metrics at each moment are determined for the filtered sub-signals at n moments; and the target path branch of the filtered signal is determined according to the branch metrics at n moments.
  • the MLSE module 104 determines the codebook (code book) corresponding to the filtered signal according to the filter coefficient of the filter module 103 and the signal state of the filtered signal, and according to the filtered sub-signal at each moment and the filtered signal
  • the corresponding codebook determines the branch metrics at each moment, and the MLSE module 104 can determine multiple branch metrics at each moment, and the MLSE module 104 can determine the target branch metric from the multiple branch metrics at each moment (for example, the most optimal branch metric), and determine the target path branch of the filtered signal according to the target branch metric at n moments.
  • the MLSE module 104 determines a target branch metric from the m branch metrics at each moment to obtain n target branch metrics at n moments , the MLSE module 104 determines the target path branch of the filtered signal according to the n target branch metrics.
  • the MLSE module 104 determines the codebook corresponding to the filtered signal according to the filter coefficient of the filtering module 103 and the signal state of the filtered signal, and according to the filtered sub-signal
  • the codebook corresponding to the filtered signal determines the branch metrics at each moment, assuming that the number of branch metrics at each moment is m, the MLSE module 104 can determine m ⁇ n branch metrics at the n moments, and the MLSE module 104 Combining and accumulating the m ⁇ n branch metrics at n times (a branch metric at each moment is accumulated with all branch metrics at all other times), and determining the target path branch according to the accumulation result.
  • the MLSE module 104 may include a branch metric calculation submodule at n time, a cumulative branch metric calculation submodule and an optimal path selection submodule (these submodules are not shown in FIG. 4 and FIG. 7 ),
  • the branch metrics at each of the n moments can be determined by the branch metric calculation submodule at n moments, the branch metrics at the n moments are combined and accumulated by the cumulative branch metric calculation submodule, and determined by the optimal path selection submodule target path branch.
  • the initial signal is a PAM4 signal
  • the filtered signal is an OOK signal
  • the signal state of the filtered signal includes -1 and 1
  • the MLSE module 104 determines the filter coefficient c according to the signal state of the filtered signal.
  • the codebook corresponding to the signal includes -1+c, -1-c, 1+c and 1-c.
  • metric(k p ) represents the p-th branch metric at the k-th moment
  • cb p represents the p-th codebook in the codebook corresponding to the filtered signal
  • cb p is -1+c, -1-c, 1
  • pf(k) represents the filtered signal at the kth moment.
  • the MLSE module 104 calculates the filtered signal at each moment with each codebook in -1+c, -1-c, 1+c and 1-c, so the MLSE module 104 may obtain the 4 branch metrics at each moment, and the MLSE module 104 may determine the minimum branch metric among the 4 branch metrics at each moment as the target branch metric at each moment.
  • the algorithm complexity of the MLSE module 104 may be M L .
  • the dimensionality reduction signal may be an OOK signal, and the algorithm complexity of the MLSE module 104 may be 2 L .
  • the target path branch includes decision values at each of the n times, and the decision value at each moment is obtained by the MLSE module 104 based on the filtered sub-signal at each moment.
  • the decision value at each moment may be obtained by making a decision according to the target branch metric at each moment.
  • the decision value in the target path branch can be a hard value or a soft value, and the hard value (that is, the decision value) at each moment is -1 or 1, indicating that the MLSE module 104 judges that the signal at each moment is -1 or 1, the target path branch is a target sequence of length n consisting of -1 and 1.
  • the soft value is the probability ratio, also known as the logarithmic likelihood ratio (likelihood rate, LLR) value, the soft value (that is, the decision value) at each moment is the probability that the signal at each moment is 1 and the signal at each moment
  • LLR logarithmic likelihood ratio
  • the ratio of the probabilities of being -1 (the numerator is the probability that the signal is 1, and the denominator is the probability that the signal is -1).
  • the algorithm corresponding to the hard value is the viterbi algorithm, that is, when the MLSE module 104 adopts the viterbi algorithm, the decision value in the target path branch output by the MLSE module 104 is a hard value.
  • the algorithm corresponding to the soft value can be BCJR (Bahl, Cocke Jelinek and Raviv) algorithm or soft output viterbi algorithm (soft output viterbi algorithm, SOVA), that is, in the target path branch of MLSE module 104 output when MLSE module 104 adopts BCJR algorithm or SOVA
  • the judgment value of is a soft value.
  • the target path branch output by the MLSE module 104 (that is, the target path branch of the filtered signal) includes the decision values at each of the n moments, and the mapping module 105 performs a process of filtering the filtered signal according to the dimensionality reduction position information
  • the target path branch of is mapped to obtain the target signal, and the target signal includes target sub-signals at each of the n time points.
  • the mapping module 105 is specifically used to: determine the target sub-signal at each time according to the decision value at each time in the n times and the position identification value corresponding to each time; Signal identifies the target signal. For example, the mapping module 105 determines the target sub-signals at n times as a whole as the target signal.
  • the decision value in the target path branch can be hard value or soft value.
  • the mapping module 105 maps the target path branch of the filtered signal according to the dimensionality reduction position information in different ways.
  • the implementation manners of mapping the target path branch of the filtered signal by the mapping module 105 are respectively introduced below by taking the decision value of the target path branch as a hard value or a soft value.
  • the decision value in the target path branch is a hard value
  • the mapping module 105 is specifically configured to: identify the decision value at each moment in the n moments with the position corresponding to each moment The sum of values is determined as the target sub-signal at each moment.
  • hd_out(k) represents the target sub-signal at the kth moment
  • ld_out(k) represents the decision value at the kth moment
  • p_ind_d(k) represents the position identification value corresponding to the kth moment.
  • the decision value in the target path branch is a soft value
  • the mapping module 105 is specifically configured to: determine the value at each time point according to the position identification value corresponding to each time point in the n time points
  • a corresponding mapping rule determine the target sub-signal at each time according to the decision value at each time and the corresponding mapping rule at each time.
  • the dimensionality reduction signal can be an OOK signal.
  • the signal states of the balanced signal include -3, -1, 1, and 3, the signal states of the dimensionality reduction signal include -1 and 1, and the location identifier values include - 2, 0 and 2.
  • p_ind_d(k) is the position identification value corresponding to the kth moment
  • ld_out(k) is the judgment value at the kth moment
  • hd_out(k) is the target sub-signal at the kth moment
  • max is a constant
  • k is not greater than n A positive integer of , in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal
  • B is the low-order bit of the target sub-signal.
  • the mapping rule may also be as shown in FIG. 8 .
  • each signal state of the target signal is the same as that of the equalized signal
  • each signal state of the target signal corresponds to each signal state of the equalized signal
  • FIG. 9 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application
  • FIG. 10 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application.
  • the signal processing device 10 further includes an autocorrelation estimation module 106 .
  • the autocorrelation estimation module 106 is connected to the equalization module 101 , the filtering module 103 and the MLSE module 104 respectively.
  • the input terminal of the autocorrelation estimation module 106 is connected to the output terminal of the equalization module 101 , and the output terminal of the autocorrelation estimation module 106 is respectively connected to the input terminal of the filtering module 103 and the input terminal of the MLSE module 104 .
  • the input end of the autocorrelation estimation module 106 is connected to the output end of the equalization module 101, and for the signal processing device 10 shown in Figure 10, the input end of the autocorrelation estimation module 106 is connected to the first The output end of the equalization sub-module 1011 is connected.
  • the autocorrelation estimation module 106 is used to determine the filter coefficient of the filter module 103 according to the equalized signal, and provide the filter coefficient to the filter module 103 and the MLSE module 104 respectively, so that the filter module 103 performs filtering processing on the dimensionality reduction signal according to the filter coefficient , and, the MLSE module 104 determines the target path branch of the filtered signal according to the filter coefficient.
  • the autocorrelation estimation module 106 calculates the filter coefficient of the filtering module 103 according to the signal characteristics of the equalized signal (specifically, the first equalized signal output by the first equalization sub-module 1011 in the signal processing device 10 shown in FIG. 10 ).
  • the noise in the equalized signal (specifically the first equalized signal output by the first equalized sub-module 1011 in the signal processing device 10 shown in FIG. 10 ) is colored noise, and the autocorrelation estimation module 106 can calculate the correlation of the colored noise, according to The correlation of colored noise determines the filter coefficients.
  • Fig. 11 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application
  • Fig. 12 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application
  • the signal processing device 10 further includes a decoding module 107 .
  • the decoding module 107 is connected to the mapping module 105 , for example, an input terminal of the decoding module 107 is connected to an output terminal of the mapping module 105 .
  • the decoding module 107 is used for decoding the target signal output by the mapping module 105 to restore the data.
  • the decoding module 107 may include an FEC decoder, and the decoding module 107 may also include other decoders, which is not limited in this embodiment of the present application.
  • the data recovered by the decoding module 107 may be a sequence composed of 0 and 1.
  • the signal state of the target signal output by the mapping module 105 includes -3, -1, 1 and 3, as shown in Figure 4 and Figure 8, the bit symbol corresponding to -3 is 00, and the bit symbol corresponding to -1 is 01 , the bit symbol corresponding to 1 is 11, the bit symbol corresponding to 3 is 10, assuming that the target signal output by the mapping module 105 is 3, -1, 1, 3, -3, -1 in turn, then the decoding module 107 according to the target signal
  • the corresponding relationship between the signal state and the bit symbol, the recovered data is 100111100001.
  • the initial signal may also be a complex number signal. If the initial signal is a complex signal, then the equalized signal, the dimensionality reduction signal, the filtered signal, etc. are all complex signals.
  • the position identification value corresponding to each moment is a complex number.
  • the real part of the position identification value corresponding to each time instant, and the imaginary part of the position identification value corresponding to each time instant is determined according to the imaginary part of the equalized sub-signal at each time instant.
  • the rough judgment module 102 determines the dimensionality reduction sub-signal at each moment, it determines the dimensionality reduction sub-signal at each moment according to the real part of the equalization sub-signal at each moment and the real part of the position identification value corresponding to each moment. For the real part of the signal, the imaginary part of the dimensionality reduction sub-signal at each time is determined according to the imaginary part of the balanced sub-signal at each time and the imaginary part of the position identification value corresponding to each time.
  • the rough judgment module 102 determines the realization process of the real part of the position identification value corresponding to each moment, the rough judgment module 102 determines the realization process of the imaginary part of the position identification value corresponding to each moment, and the rough judgment module 102 determines the realization process of the imaginary part of the position identification value corresponding to each moment.
  • the realization process of the real part of the dimensionality reduction sub-signal, and the realization process of the imaginary part of the dimensionality reduction sub-signal determined by the rough decision module 102 at each moment can refer to the situation that the initial signal is a real number signal, and will not be repeated here .
  • FIG. 13 shows a schematic diagram of a signal processing process provided by the embodiment of the present application.
  • the signal processing device is the signal processing device 10 shown in FIG. 4, and the initial signal is a complex signal
  • the equalization module 101 equalizes the initial signal input to the equalization module 101 to obtain an equalized signal hd_sig.
  • the equalized signal hd_sig is a complex signal, and the number of signal states of the equalized signal hd_sig is 36.
  • the equalization module 101 outputs the equalized signal hd_sig to the coarse decision module 102.
  • the rough judgment module 102 determines the dimensionality reduction position information p_ind_d and the dimensionality reduction signal ld_sig according to the equalization signal hd_sig, the dimensionality reduction position information p_ind_d is a complex number, the dimensionality reduction signal ld_sig is a complex signal, and the number of signal states of the dimensionality reduction signal ld_sig is 4.
  • the rough decision module 102 outputs the dimensionality reduction signal ld_sig to the filtering module 103 through the first output terminal a1, and outputs the dimensionality reduction position information p_ind_d to the mapping module 105 through the second output terminal a2.
  • the filtering module 103 performs filtering processing on the dimensionality reduction signal ld_sig to obtain a filtered signal, and outputs the filtered signal to the MLSE module 104 .
  • the filtered signal is not shown in FIG. 13 , it can be understood that the filtered signal is a complex signal, and the number of signal states of the filtered signal is four.
  • the MLSE module 104 determines the target path branch ld_out of the filtered signal, and outputs the target path branch ld_out of the filtered signal to the mapping module 105, the target path branch ld_out is a complex signal, and the number of signal states of the target path branch ld_out is four.
  • the mapping module 105 maps the target path branch of the filtered signal according to the dimensionality reduction position information p_ind_d to obtain the target signal hd_out, the target signal hd_out is a complex signal, and the number of signal states of the target signal hd_out is 36.
  • Small black dots indicate the signal state, and larger dots indicate the most likely signal state.
  • FIG. 14 shows a relationship diagram between signal power and BER provided by an embodiment of the present application.
  • the equalization module 101 in the signal processing device corresponding to each of curves 1, 2, 3, 4 and 5, the equalization module 101 only includes FFE.
  • Curve 1 is a relationship diagram between the power of the equalized signal output by the FFE and the BER.
  • Curve 2 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device does not include a rough decision module.
  • Curve 3 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device includes a rough decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 4, Fig. 9 or Fig. 11 BER diagram).
  • Curve 4 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the BCIJ algorithm and the signal processing device does not include a rough decision module.
  • Curve 5 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the BCIJ algorithm and the signal processing device includes a coarse decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 4, Fig. 9 or Fig. 11 BER diagram). It can be seen from Figure 14 that the trend of curve 2 is the same as that of curve 3, and the distance between curve 2 and curve 3 is small, the trend of curve 4 is the same as that of curve 5, and the distance between curve 4 and curve 5 is the same.
  • a coarse decision module such as the power and BER of the signal output by the MLSE module 104 in Fig. 4, Fig. 9 or Fig. 11 BER diagram.
  • the distance between is small, so it can be determined that the performance of the signal output by the MLSE module based on the dimensionality reduction signal is comparable to the signal performance of the signal output by the MLSE module when the non-rough decision module is included in the signal processing device.
  • FIG. 15 shows a relationship diagram between power and BER of another signal provided by an embodiment of the present application.
  • the equalization module 101 of the signal processing device corresponding to curve 1 , curve 2 and curve 4 includes only FFE
  • the equalization module 101 of the signal processing device corresponding to curve 3 includes FFE and DFE.
  • Curve 1 is a relationship diagram between the power of the equalized signal output by the FFE and the BER.
  • Curve 2 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device includes a rough decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig.
  • Curve 3 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device includes a rough decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 7, Fig. 10 or Fig. 12 BER diagram).
  • Curve 4 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the viterbi algorithm adopted by the MLSE module is not included in the signal processing device. It can be seen from Fig.
  • the MLSE module is based on the reduction
  • the performance of the signal output by the dimensional signal is equivalent to the signal performance of the signal output by the MLSE module when the signal processing device includes the non-coarse judgment module.
  • the trend of curve 2 is quite different from the trend of curve 3, so it can be determined that when the equalization module 101 includes FFE and DFE, the signal output by the MLSE module based on the dimensionality reduction signal is higher than that when the equalization module 101 only includes FFE, and the MLSE module is based on dimensionality reduction The performance of the signal output signal is good.
  • the signal processing apparatus 10 shown in FIG. 7 , FIG. 10 and FIG. 12 may be applied in a scenario with a large bandwidth limit.
  • Using the signal processing device 10 in FIG. 7 , FIG. 10 and FIG. 12 in a large band-limit scenario can ensure the accuracy of the decision result of the rough decision module 102 when the signal state of the low-dimensional signal output by the rough decision module 102 is small.
  • the equalization module performs equalization processing on the initial signal to obtain an equalized signal
  • the rough decision module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, and outputs the dimensionality reduction position information
  • the mapping module output the dimension reduction signal to the filter module
  • the filter module filters the dimension reduction signal to obtain the filter signal
  • the MLSE module determines the target path branch of the filter signal
  • the target path of the filter signal The path branch is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal.
  • the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module
  • the number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and the MLSE module determines the target path branch
  • the path branching process has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
  • the signals processed by the filtering module and the MLSE module are both dimension-reduced signals, the number of signal states of the dimension-reduced signal is small, and the bit width of the signal is low, which helps Reduce resource consumption of filtering module and MLSE module.
  • the signal after dimensionality reduction can be the signal of the lowest dimension (such as OOK signal or QPSK signal), so the processing process of the filtering module and the processing process of the MLSE module have nothing to do with the modulation format, further reducing the resource consumption of the filtering module and MLSE module .
  • the resource consumption of the MLSE module in the signal processing device provided by the embodiment of the present application can be reduced by 30%, and the circuit area can be reduced by 50%.
  • the signal processing device is an intensity modulation device or a phase modulation device, but is not limited thereto. The higher the dimension of the initial signal (the larger the number of signal states), the more obvious the effect of the signal processing device in reducing resource consumption.
  • FIG. 16 shows a flowchart of a signal processing method provided by an embodiment of the present application.
  • the signal processing method may be applied to the signal processing apparatus provided in the foregoing embodiments.
  • the signal processing device includes an equalization module, a rough judgment module, a filter module, an MLSE module and a mapping module connected in sequence, and the rough judgment module is also connected with the mapping module.
  • the method includes:
  • the equalization module performs equalization processing on the initial signal input to the equalization module to obtain an equalized signal.
  • the initial signal is a real signal or a complex signal
  • the equalized signal is a real signal or a complex signal.
  • the equalized signal is a PAM signal.
  • the equalized signal is a QAM signal.
  • the equalized signal has no ISI and is non-linear, but the equalized signal contains colored noise.
  • the equalization module includes a first equalization submodule and a second equalization submodule, the first equalization submodule, the second equalization submodule and the rough decision module are connected in sequence, and the first equalization submodule is also connected with the rough decision module.
  • the equalization module equalizes the initial signal input to the equalization module to obtain an equalized signal, including: the first equalization sub-module performs first equalization processing on the initial signal to obtain the first equalized signal; the second equalization sub-module performs equalization on the first equalized signal second equalization processing to obtain a second equalization signal.
  • the equalized signals output by the equalized module are the first equalized signal and the second equalized signal, and the first equalized signal and the second equalized signal respectively include equalized sub-signals at each of the n times.
  • the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the balanced signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the balanced signal, and the dimensionality reduction signal includes the dimensionality reduction at each moment in the n moments
  • the sub-signal the dimension reduction signal has nothing to do with the modulation format
  • the dimension reduction position information includes the position identification value corresponding to each time in the n times
  • the position identification value corresponding to each time is used to indicate the dimension reduction sub-signal at each time corresponding position in the equalized signal.
  • the dimensionality reduction signal when the equalized signal is a real signal, the dimensionality reduction signal is a real signal.
  • the equalized signal is a complex signal
  • the dimensionality-reduced signal is a complex signal.
  • the equalization signal is a PAM signal
  • the dimensionality reduction signal is an OOK signal.
  • the equalized signal is a QAM signal
  • the dimensionality reduction signal is a QPSK signal.
  • the balanced signal has two state positions adjacent to the corresponding position, and the corresponding position is located in the two states Between positions, the Euclidean distance between the corresponding position and the two state positions is equal, each state position corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
  • the rough judgment module determining the dimensionality reduction position information and the dimensionality reduction signal according to the equalized signal includes: the rough judgment module determines the dimensionality reduction position information according to the equalized signal; the rough judgment module determines the dimensionality reduction signal according to the equalized signal and the dimensionality reduction position information.
  • the equalized signal includes the equalized sub-signals at each of the n times
  • the rough decision module determines the dimensionality reduction position information according to the equalized signal includes: , to determine the location identification value corresponding to each moment.
  • the coarse judgment module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction position information includes: the rough judgment module determines the The dimensionality reduction sub-signal of .
  • the coarse decision module determining the dimensionality reduction position information according to the equalization signal includes: the rough decision module determining the dimensionality reduction position information according to the second equalization signal.
  • the coarse judgment module determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: the rough judgment module determining the dimensionality reduction signal according to the second equalization signal and the dimensionality reduction location information. That is, the equalized signal used by the rough decision module to determine the dimensionality reduction position information is the second equalized signal, and the equalized signal used by the coarse decision module to determine the dimensionality reduction signal is the first equalized signal.
  • the corresponding position of the dimensionality reduction sub-signal at each moment in the equalization signal is the dimensionality reduction sub-signal at each moment in the second equalization signal corresponding position.
  • the second equalized signal has two state positions adjacent to the corresponding position, and the corresponding position is located in the two Between the state positions, the corresponding position is equal to the Euclidean distance between the two state positions, each state position in the two state positions corresponds to a signal state of the second balanced signal, and the signal corresponding to the two state positions The status is different.
  • the filtering module performs filtering processing on the dimensionality reduction signal to obtain a filtered signal.
  • the filter module has a filter coefficient, and the filter module can perform filter processing on the dimensionality reduction signal according to the filter coefficient to obtain a filter signal.
  • the filtered signal includes filtered sub-signals at each of the n times.
  • the filtering module converts the colored noise in the dimensionality reduction signal into white noise, and introduces controllable ISI into the dimensionality reduction signal, so the filtered signal contains white noise and controllable ISI.
  • the MLSE module determines a target path branch of the filtered signal.
  • the MLSE module can determine the target path branch of the filtered signal according to the filter coefficient of the filter module.
  • the target path branch includes decision values at each of the n times, and the decision value at each of the n times is obtained by the MLSE module based on the filtered sub-signal at each time.
  • the filtered signal includes the filtered sub-signals at each of the n times
  • the MLSE module determines the target path branch of the filtered signal according to the filter coefficient of the filter module, including: the MLSE module determines the target path branch of the filter signal according to the filter coefficient and the n times The filtered sub-signal at each moment in determines the branch metric at each moment; the MLSE module determines the target path branch of the filtered signal according to the branch metrics at n moments.
  • the mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, the number of signal states of the target signal is equal to the number of signal states of the balanced signal, and each signal state of the target signal is equal to the number of signal states of the balanced signal.
  • the respective signal states are the same or correspond.
  • the target path branch of the filtered signal includes a decision value at each of the n moments, and the decision value at each of the n moments is obtained by the MLSE module based on the filtered sub-signal at each moment,
  • the target signal includes target sub-signals at each of the n times.
  • the mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, including: the mapping module determines the The target sub-signal at each moment; the mapping module determines the target signal according to the target sub-signals at n times.
  • the decision value in the target path branch is a hard value or a soft value.
  • the mapping module determines the target at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment
  • the sub-signal includes: the mapping module determines the sum of the decision value at each of the n times and the corresponding position identification value at each time as the target sub-signal at each time.
  • the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including : The mapping module determines the mapping rule corresponding to each moment according to the position identifier value corresponding to each moment in the n times; the mapping module corresponds to the position identifier value corresponding to each moment according to the judgment value of each moment.
  • the mapping rules of determine the target sub-signal at each moment.
  • the signal states of the equalized signal include -3, -1, 1, and 3
  • the signal states of the dimensionality reduction signal include -1 and 1
  • the position identifier values include -2, 0, and 2.
  • p_ind_d(k) is the position identification value corresponding to the kth moment
  • ld_out(k) is the judgment value at the kth moment
  • hd_out(k) is the target sub-signal at the kth moment
  • max is a constant
  • k is not greater than n A positive integer of , in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal.
  • the signal processing device further includes an autocorrelation estimation module, and the autocorrelation estimation module is respectively connected to the equalization module, the filtering module and the MLSE module.
  • the method also includes: the autocorrelation estimation module determines the filter coefficient of the filter module according to the equalized signal, and provides the filter coefficient to the filter module and the MLSE module respectively, so that the filter module performs filtering processing on the dimensionality reduction signal according to the filter coefficient, and, MLSE The module determines the target path branch of the filtered signal according to the filter coefficient.
  • the signal processing device further includes a decoding module connected to the mapping module.
  • the signal processing method further includes: the decoding module decodes the target signal to recover data.
  • the equalization module performs equalization processing on the initial signal to obtain an equalized signal
  • the rough judgment module determines the dimensionality reduction position information and dimensionality reduction signal according to the equalization signal, and outputs the dimensionality reduction position information
  • the mapping module output the dimension reduction signal to the filter module
  • the filter module filters the dimension reduction signal to obtain the filter signal
  • the MLSE module determines the target path branch of the filter signal
  • the target path of the filter signal The path branch is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal.
  • the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module
  • the number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and the MLSE module determines the target path
  • the branching process has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
  • An embodiment of the present application provides a processing chip, and the processing chip includes the signal processing device 10 provided in the foregoing embodiment.
  • the processing chip is a DSP chip.
  • the processing chip may include a programmable logic circuit and/or program instructions, which are used to implement the signal processing method provided in the above-mentioned embodiments when the processing chip is running.
  • An embodiment of the present application provides a signal receiving device, where the signal receiving device includes a storage chip and a processing chip.
  • Memory chips are used to store computer programs.
  • the processing chip is configured to execute the computer program stored in the storage chip so that the signal receiving device executes the signal processing method provided by the above embodiments.
  • the signal receiving device is an optical receiver.
  • An embodiment of the present application provides a signal transmission system, and the signal transmission system includes a signal sending device and the signal receiving device provided in the foregoing embodiments.
  • the signal sending device is connected to the signal receiving device through a transmission link, and the signal sending device is used to send a signal to the signal receiving device through the transmission link.
  • the signal sending device is an optical transmitter
  • the signal receiving device is an optical receiver
  • the transmission link is an optical link.
  • Optical transmitters and optical receivers are collectively referred to as optical communication equipment.
  • An embodiment of the present application provides a computer-readable storage medium, and a computer program is stored in the computer-readable storage medium.
  • the computer program is executed (for example, executed by a processing chip), the signal processing method provided in the foregoing embodiments is implemented.
  • An embodiment of the present application provides a computer program product, where the computer program product includes a program or code, and when the program or code is executed (for example, executed by a processing chip, etc.), the signal processing method provided in the foregoing embodiment is implemented.
  • the above-mentioned equalization module can be realized through FFE, DFE, etc.
  • the above-mentioned filtering module can be realized through a post-post filter
  • the above-mentioned decoding module can be realized through FEC
  • the above-mentioned coarse judgment module and mapping module can be realized through firmware solidified with program instructions. function etc.
  • the hardware or firmware includes programmable logic circuits and/or program instructions.
  • the term “at least one” means one or more, and “plurality” means two or more, unless otherwise clearly defined.
  • the terms “first” and “second”, etc. are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
  • the term “and/or” is only an association relationship describing associated objects, indicating that there may be three types of relationships, for example, A and/or B may indicate: A exists alone, A and B exist simultaneously, and B exists independently. situation.
  • the character “/" in this article generally indicates that the contextual objects are an "or” relationship.

Abstract

A signal processing method and apparatus, and a processing chip and a signal transmission system. The signal processing apparatus comprises an equalization module, a rough decision module, a filtering module, a maximum likelihood sequence estimation (MLSE) module and a mapping module, wherein the equalization module is used for performing equalization processing on an initial signal to obtain an equalization signal; the rough decision module is used for determining dimension reduction position information and a dimension reduction signal according to the equalization signal, the number of signal states of the dimension reduction signal being less than the number of signal states of the equalization signal, and the dimension reduction signal being unrelated to a modulation format; the filtering module is used for performing filtering processing on the dimension reduction signal to obtain a filtering signal; the MLSE module is used for determining a target path branch of the filtering signal; and the mapping module is used for performing, according to the dimension reduction position information, mapping on the target path branch to obtain a target signal. By means of the present application, the resource consumption of an MLSE module is reduced.

Description

信号处理方法及装置、处理芯片、信号传输系统Signal processing method and device, processing chip, signal transmission system
本申请要求申请日为2021年8月4日、申请号为202110890844.8、申请名称为“信号处理方法及装置、处理芯片、信号传输系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of a Chinese patent application with an application date of August 4, 2021, an application number of 202110890844.8, and an application title of "Signal Processing Method and Device, Processing Chip, and Signal Transmission System", the entire contents of which are incorporated herein by reference. In this application.
技术领域technical field
本申请涉及通信技术领域,特别涉及一种信号处理方法及装置、处理芯片、信号传输系统。The present application relates to the technical field of communications, and in particular to a signal processing method and device, a processing chip, and a signal transmission system.
背景技术Background technique
信号传输系统通常包括信号发送设备和信号接收设备,信号发送设备与信号接收设备通过传输链路(link)连接,信号发送设备通过传输链路向信号接收设备发送信号。在信号传输过程中,受信号传输系统中的各个器件的带宽的限制,信号通常会出现码间串扰(intersymbol intrference,ISI)。为了保证信号接收设备从接收到的信号中恢复出正确的数据,信号接收设备接收到信号后,通常会采用均衡算法对信号进行均衡处理,以消除或减弱信号的ISI。MLSE算法是一种性能较优的均衡算法,因此通常采用MLSE算法对信号进行均衡处理。A signal transmission system generally includes a signal sending device and a signal receiving device, the signal sending device and the signal receiving device are connected through a transmission link (link), and the signal sending device sends a signal to the signal receiving device through the transmission link. During the signal transmission process, limited by the bandwidth of each device in the signal transmission system, the signal usually has intersymbol intrference (ISI). In order to ensure that the signal receiving device recovers correct data from the received signal, after receiving the signal, the signal receiving device usually uses an equalization algorithm to equalize the signal to eliminate or weaken the ISI of the signal. The MLSE algorithm is an equalization algorithm with better performance, so the MLSE algorithm is usually used to equalize the signal.
信号接收设备中通常包括数字信号处理(digital signal processing,DSP)芯片,由DSP芯片对信号进行均衡处理。示例地,DSP芯片中包括依次连接的前馈均衡器(feed forward equalization,FFE)、后置滤波器(postfilter)和MLSE模块,以及与MLSE模块和后置滤波器分别连接的路径分支计算模块。FFE对接收到的信号进行均衡处理得到均衡信号,该均衡信号无ISI且非线性,但是该均衡信号中包含有色噪声。后置滤波器对该均衡信号进行滤波处理得到滤波信号,后置滤波器对该均衡信号进行滤波处理的过程中将该均衡信号中的有色噪声转换为白噪声,并在该均衡信号中引入可控的ISI。路径分支计算模块根据后置滤波器的滤波系数计算该滤波信号的路径分支数(即滤波信号的可能序列的数量)。MLSE模块根据该滤波信号的路径分支数对该滤波信号进行MLSE处理得到最优解。其中,MLSE算法的复杂度取决于输入MLSE模块的路径分支数。假设滤波信号的状态数(也即电平数)为M,后置滤波器的调制阶数为L,则输入MLSE模块的路径分支数为M L。也即输入MLSE模块的路径分支数与后置滤波器的调制阶数以及滤波信号的状态数(即电平数)均正相关,后置滤波器的调制阶数越高,滤波信号的状态数越多,MLSE算法的复杂度越高。 The signal receiving device usually includes a digital signal processing (digital signal processing, DSP) chip, and the DSP chip performs equalization processing on the signal. Exemplarily, the DSP chip includes a feed forward equalization (feed forward equalization, FFE), a post filter (post filter) and an MLSE module connected in sequence, and a path branch calculation module respectively connected to the MLSE module and the post filter. The FFE equalizes the received signal to obtain an equalized signal. The equalized signal has no ISI and is nonlinear, but the equalized signal contains colored noise. The post-filter filters the equalized signal to obtain a filtered signal. During the process of filtering the equalized signal, the post-filter converts the colored noise in the equalized signal into white noise, and introduces a variable noise into the equalized signal. controlled ISI. The path branch calculation module calculates the number of path branches of the filtered signal (that is, the number of possible sequences of the filtered signal) according to the filter coefficients of the post filter. The MLSE module performs MLSE processing on the filtered signal according to the number of path branches of the filtered signal to obtain an optimal solution. Among them, the complexity of the MLSE algorithm depends on the number of path branches input to the MLSE module. Assuming that the number of states (that is, the number of levels) of the filtered signal is M, and the modulation order of the post-filter is L, the number of path branches input to the MLSE module is M L . That is, the number of path branches input to the MLSE module is positively correlated with the modulation order of the post-filter and the number of states (ie, the number of levels) of the filtered signal. The higher the modulation order of the post-filter, the higher the number of states of the filtered signal. The more, the higher the complexity of the MLSE algorithm.
为了降低MLSE算法的复杂度,减少MLSE处理过程的资源消耗,目前DSP芯片中通常采用2阶后置滤波器(也即后置滤波器的调制阶数为2)进行信号滤波。但是采用2阶后置滤波器时,MLSE处理过程的资源消耗仍然较大。示例地,对于4级脉冲幅度调制(phase amplitude modulation,PAM)信号(简称为PAM4信号,PAM4信号的状态数为4),DSP芯片中采用2阶后置滤波器时,输入MLSE模块的路径分支数为16(M L=4 2=16),MLSE模块根据路径分支数16对后置滤波器输出的滤波信号进行MLSE处理所占用的资源高达100万个逻辑门电路,因此MLSE处理过程中的资源消耗较大。 In order to reduce the complexity of the MLSE algorithm and reduce the resource consumption of the MLSE process, current DSP chips usually use a second-order post-filter (that is, the modulation order of the post-filter is 2) for signal filtering. However, when a 2-order post-filter is used, the resource consumption of the MLSE process is still relatively large. For example, for a 4-level pulse amplitude modulation (phase amplitude modulation, PAM) signal (abbreviated as a PAM4 signal, the number of states of the PAM4 signal is 4), when a 2-order post-filter is used in the DSP chip, the path branch of the input MLSE module The number is 16 ( ML = 4 2 = 16), and the resource occupied by the MLSE module to perform MLSE processing on the filtered signal output by the post filter according to the path branch number 16 is as high as 1 million logic gate circuits, so the MLSE processing process Resource consumption is large.
发明内容Contents of the invention
本申请提供了一种信号处理方法及装置、处理芯片、信号传输系统,有助于降低MLSE的资源消耗。本申请的技术方案如下:The present application provides a signal processing method and device, a processing chip, and a signal transmission system, which help reduce resource consumption of MLSE. The technical scheme of the application is as follows:
第一方面,提供了一种信号处理装置,该信号处理装置包括:依次连接的均衡模块、粗判决模块、滤波模块、MLSE模块和映射模块,粗判决模块还与映射模块连接。均衡模块用于对输入均衡模块的初始信号进行均衡处理,得到均衡信号。粗判决模块用于根据均衡信号确定降维位置信息和降维信号,降维信号的信号状态的数目小于均衡信号的信号状态的数目,降维信号中包括n个时刻中的各个时刻的降维子信号,降维信号与调制格式无关,降维位置信息包括该n个时刻中的各个时刻对应的位置标识值,每个时刻对应的位置标识值用于指示该每个时刻的降维子信号在均衡信号中的对应位置,n为正整数。滤波模块用于对降维信号进行滤波处理,得到滤波信号。MLSE模块用于确定滤波信号的目标路径分支(例如最优路径分支)。映射模块用于根据降维位置信息,对滤波信号的目标路径分支进行映射得到目标信号(例如最优信号),目标信号的信号状态的数目与均衡信号的信号状态的数目相等,目标信号的各个信号状态与均衡信号的各个信号状态相同或对应。In a first aspect, a signal processing device is provided, and the signal processing device includes: an equalization module, a rough decision module, a filter module, an MLSE module, and a mapping module connected in sequence, and the rough decision module is also connected to the mapping module. The equalization module is used to equalize the initial signal input to the equalization module to obtain an equalized signal. The rough judgment module is used to determine the dimensionality reduction position information and the dimensionality reduction signal according to the balanced signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the balanced signal, and the dimensionality reduction signal includes the dimensionality reduction at each moment in n moments The sub-signal, the dimension reduction signal has nothing to do with the modulation format, the dimension reduction position information includes the position identification value corresponding to each time in the n times, and the position identification value corresponding to each time is used to indicate the dimension reduction sub-signal at each time In the corresponding position in the equalized signal, n is a positive integer. The filtering module is used for filtering the dimensionality reduction signal to obtain the filtered signal. The MLSE module is used to determine the target path branch (eg, the optimal path branch) of the filtered signal. The mapping module is used to map the target path branch of the filtered signal to obtain the target signal (such as the optimal signal) according to the dimensionality reduction position information. The number of signal states of the target signal is equal to the number of signal states of the balanced signal. Each of the target signals The signal states are the same as or correspond to the respective signal states of the equalized signal.
其中,均衡信号无ISI且非线性,但是该均衡信号中包含有色噪声,因此降维信号中包含有色噪声。滤波模块对降维信号进行滤波的过程中,将降维信号中的有色噪声转换为白噪声,并在降维信号中引入可控的ISI,因此滤波信号中包含白噪声和可控的ISI。Among them, the equalized signal has no ISI and is nonlinear, but the equalized signal contains colored noise, so the dimensionality reduction signal contains colored noise. In the process of filtering the dimensionality reduction signal, the filtering module converts the colored noise in the dimensionality reduction signal into white noise, and introduces controllable ISI into the dimensionality reduction signal, so the filtered signal contains white noise and controllable ISI.
其中,MLSE模块输出的目标路径分支中包括所述n个时刻中的各个时刻的判决值,该目标路径分支中的判决值可以是硬值或软值。如果该目标路径分支中的判决值为硬值,则目标信号的各个信号状态与均衡信号的各个信号状态相同。如果该目标路径分支中的判决值为软值,则目标信号的各个信号状态与均衡信号的各个信号状态对应。Wherein, the target path branch output by the MLSE module includes decision values at each of the n time moments, and the decision values in the target path branch may be hard values or soft values. If the decision value in this target path branch is a hard value, then the individual signal states of the target signal are identical to the individual signal states of the equalized signal. If the decision value in the target path branch is a soft value, the respective signal states of the target signal correspond to the respective signal states of the equalized signal.
本申请提供的技术方案,由于降维信号与调制格式无关,降维信号的信号状态的数目小于均衡信号的信号状态的数目,因此输入MLSE模块的滤波信号与调制格式无关,且该滤波信号的信号状态的数目小于降维信号的信号状态的数目,MLSE模块确定该滤波信号的目标路径分支的过程中所需计算的路径分支较少,且MLSE模块确定该滤波信号的目标路径分支的过程与调制格式无关,有助于降低MLSE模块的算法复杂度,降低MLSE模块的资源消耗。In the technical solution provided by this application, since the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, so the filtered signal input to the MLSE module has nothing to do with the modulation format, and the filtered signal The number of signal states is less than the number of signal states of the dimensionality reduction signal, and the MLSE module needs to calculate fewer path branches in the process of determining the target path branch of the filtered signal, and the process of determining the target path branch of the filtered signal by the MLSE module is the same as The modulation format is irrelevant, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
可选地,对于每个时刻的降维子信号在均衡信号中的对应位置,该均衡信号具有与该对应位置相邻的两个状态位置,该对应位置位于该两个状态位置之间,该对应位置与该两个状态位置之间的欧式距离相等,每个状态位置对应该均衡信号的一个信号状态,该两个状态位置对应的信号状态不同。Optionally, for the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, the equalized signal has two state positions adjacent to the corresponding position, the corresponding position is located between the two state positions, the The Euclidean distance between the corresponding position and the two state positions is equal, each state position corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
可选地,粗判决模块具体用于:根据均衡信号确定降维位置信息;根据均衡信号和降维位置信息确定降维信号。Optionally, the rough judgment module is specifically configured to: determine the dimensionality reduction position information according to the equalized signal; determine the dimensionality reduction signal according to the equalization signal and the dimensionality reduction position information.
可选地,均衡信号中包括所述n个时刻中的各个时刻的均衡子信号。根据均衡信号确定降维位置信息,包括:根据所述n个时刻中的每个时刻的均衡子信号,确定该每个时刻对应的位置标识值。根据均衡信号和降维位置信息确定降维信号,包括:根据所述n个时刻中的每个时刻的均衡子信号和该每个时刻对应的位置标识值,确定该每个时刻的降维子信号。Optionally, the equalized signal includes equalized sub-signals at each of the n times. Determining the dimension-reduced position information according to the equalized signal includes: determining a position identification value corresponding to each time point according to the equalized sub-signal at each time point in the n time points. Determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: determining the dimensionality reduction subsignal at each moment according to the equalization subsignal at each moment in the n moments and the position identification value corresponding to each moment Signal.
可选地,均衡模块包括:第一均衡子模块和第二均衡子模块。第一均衡子模块、第二均 衡子模块和粗判决模块依次连接,第一均衡子模块还与粗判决模块连接。第一均衡子模块用于对初始信号进行第一均衡处理,得到第一均衡信号。第二均衡子模块用于对第一均衡信号进行第二均衡处理,得到第二均衡信号。其中,均衡模块得到的均衡信号包括第一均衡信号和第二均衡信号,降维子信号在均衡信号中的对应位置为降维子信号在第二均衡信号中的对应位置,所述均衡子信号为第二均衡信号中的子信号。其中,第一均衡信号和第二均衡信号中分别包括所述n个时刻中的各个时刻的均衡子信号。Optionally, the equalization module includes: a first equalization submodule and a second equalization submodule. The first equalization submodule, the second equalization submodule and the rough judgment module are connected in sequence, and the first equalization submodule is also connected with the rough judgment module. The first equalization sub-module is used to perform a first equalization process on the initial signal to obtain a first equalized signal. The second equalization sub-module is used for performing a second equalization process on the first equalized signal to obtain a second equalized signal. Wherein, the equalization signal obtained by the equalization module includes a first equalization signal and a second equalization signal, and the corresponding position of the dimensionality reduction sub-signal in the equalization signal is the corresponding position of the dimensionality reduction sub-signal in the second equalization signal, and the equalization sub-signal is a sub-signal in the second equalized signal. Wherein, the first equalized signal and the second equalized signal respectively include equalized sub-signals at each of the n times.
本申请提供的技术方案,由于均衡模块中包括两个级联的均衡子模块,因此均衡模块可以对输入均衡模块的初始信号进行两级均衡处理,有助于提升均衡模块输出的均衡信号(第二均衡信号)的信噪比,从而提升粗判决模块确定的降维位置信息以及降维信号的准确性。In the technical solution provided by this application, since the equalization module includes two cascaded equalization sub-modules, the equalization module can perform two-level equalization processing on the initial signal input to the equalization module, which helps to improve the equalization signal output by the equalization module (section The signal-to-noise ratio of the second equalization signal), thereby improving the accuracy of the dimensionality reduction position information determined by the rough decision module and the dimensionality reduction signal.
可选地,第一均衡子模块为FFE或多输入多输出(multiple-input multiple-out-put,MIMO)均衡器。第二均衡子模块为判决反馈均衡(decision feedback equalization,DFE)。Optionally, the first equalization sub-module is an FFE or a multiple-input multiple-output (multiple-input multiple-out-put, MIMO) equalizer. The second equalization sub-module is decision feedback equalization (decision feedback equalization, DFE).
可选地,在均衡模块包括第一均衡子模块和第二均衡子模块时,粗判决模块具体用于:根据第二均衡信号确定降维位置信息;根据第一均衡信号和降维位置信息确定降维信号。例如,粗判决模块根据第二均衡信号确定降维位置信息包括:粗判决模块根据第二均衡信号中包括的所述n个时刻中的每个时刻的均衡子信号,确定该每个时刻对应的位置标识值。粗判决模块根据第一均衡信号和降维位置信息确定降维信号包括:粗判决模块根据第一均衡信号中包括的所述n个时刻中的每个时刻的均衡子信号和该每个时刻对应的位置标识值,确定该每个时刻的降维子信号。Optionally, when the equalization module includes a first equalization submodule and a second equalization submodule, the rough decision module is specifically used to: determine the dimensionality reduction position information according to the second equalization signal; determine the dimensionality reduction position information according to the first equalization signal and the dimensionality reduction position information Dimensionality reduction signal. For example, determining the dimensionality reduction position information by the rough decision module according to the second equalized signal includes: the rough decision module determines the corresponding The location identifier value. The coarse judgment module determines the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction position information includes: the rough judgment module according to the equalization sub-signal at each moment of the n moments included in the first equalization signal and the corresponding Determine the dimensionality reduction sub-signal at each moment.
可选地,滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,目标路径分支中包括所述n个时刻中的各个时刻的判决值,所述n个时刻中的每个时刻的判决值是MLSE模块基于该每个时刻的滤波子信号获得的,目标信号中包括所述n个时刻中的各个时刻的目标子信号。映射模块具体用于:根据所述n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号;根据所述n个时刻的目标子信号确定目标信号。Optionally, the filtered signal includes a filtered sub-signal at each of the n moments, the target path branch includes a decision value at each of the n moments, and each of the n moments The decision value of is obtained by the MLSE module based on the filtered sub-signals at each moment, and the target signal includes target sub-signals at each of the n times. The mapping module is specifically used to: determine the target sub-signal at each time according to the decision value at each time in the n times and the position identification value corresponding to each time; Signal identifies the target signal.
可选地,判决值为硬值,映射模块具体用于:将所述n个时刻中的每个时刻的判决值与该每个时刻对应的位置标识值之和,确定为该每个时刻的目标子信号。Optionally, the judgment value is a hard value, and the mapping module is specifically configured to: determine the sum of the judgment value at each of the n moments and the position identification value corresponding to each moment as the target subsignal.
可选地,判决值为软值,映射模块具体用于:根据所述n个时刻中的每个时刻对应的位置标识值,确定该每个时刻对应的映射规则;根据该每个时刻的判决值和该每个时刻对应的映射规则,确定该每个时刻的目标子信号。Optionally, the decision value is a soft value, and the mapping module is specifically configured to: determine the mapping rule corresponding to each moment according to the position identification value corresponding to each moment in the n moments; The value and the mapping rule corresponding to each moment determine the target sub-signal at each moment.
可选地,均衡信号的信号状态包括-3、-1、1和3,降维信号的信号状态包括-1和1,位置标识值包括-2、0和2。当p_ind_d(k)=-2时,映射规则为hd_out(k)=[max,-ld_out(k)]。Optionally, the signal state of the equalized signal includes -3, -1, 1, and 3, the signal state of the dimensionality reduction signal includes -1 and 1, and the position identification value includes -2, 0, and 2. When p_ind_d(k)=-2, the mapping rule is hd_out(k)=[max, -ld_out(k)].
当p_ind_d(k)=0时,映射规则为hd_out(k)=[ld_out(k),max]。当p_ind_d(k)=2时,映射规则为hd_out(k)=[-max,ld_out(k)]。p_ind_d(k)为第k时刻对应的位置标识值,ld_out(k)为第k时刻的判决值,hd_out(k)为第k时刻的目标子信号,max为常数,k为不大于n的正整数,在映射规则的表述[A,B]中,A为目标子信号的高位比特,B为目标子信号的低位比特。When p_ind_d(k)=0, the mapping rule is hd_out(k)=[ld_out(k), max]. When p_ind_d(k)=2, the mapping rule is hd_out(k)=[-max, ld_out(k)]. p_ind_d(k) is the position identification value corresponding to the kth moment, ld_out(k) is the judgment value at the kth moment, hd_out(k) is the target sub-signal at the kth moment, max is a constant, k is a positive value not greater than n Integer, in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal.
可选地,信号处理装置还包括:自相关估计模块。自相关估计模块分别与均衡模块、滤波模块和MLSE模块连接。自相关估计模块用于根据均衡信号确定滤波模块的滤波系数,并向滤波模块和MLSE模块提供该滤波系数。滤波模块具体用于根据滤波系数对降维信号进行滤波处理。MLSE模块具体用于根据滤波系数确定滤波信号的目标路径分支。Optionally, the signal processing device further includes: an autocorrelation estimation module. The autocorrelation estimation module is respectively connected with the equalization module, the filtering module and the MLSE module. The autocorrelation estimation module is used to determine the filter coefficient of the filter module according to the equalized signal, and provide the filter coefficient to the filter module and the MLSE module. The filtering module is specifically configured to perform filtering processing on the dimensionality reduction signal according to the filtering coefficient. The MLSE module is specifically used to determine the target path branch of the filtered signal according to the filter coefficient.
可选地,滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,MLSE模块具体 用于:根据滤波模块的滤波系数和所述n个时刻中的每个时刻的滤波子信号确定该每个时刻的分支度量;根据该n个时刻的分支度量确定该滤波信号的目标路径分支。Optionally, the filtered signal includes filtered sub-signals at each of the n times, and the MLSE module is specifically configured to: determine according to the filter coefficient of the filtering module and the filtered sub-signal at each of the n times The branch metrics at each moment; determining the target path branch of the filtered signal according to the branch metrics at n times.
可选地,信号处理装置还包括:译码模块。译码模块与映射模块连接。译码模块用于对目标信号进行译码,以恢复出数据。其中,译码模块可以包括前向纠错码(forward error correction,FEC)译码器,译码模块107恢复出数据是0和1构成的序列。Optionally, the signal processing device further includes: a decoding module. The decoding module is connected with the mapping module. The decoding module is used to decode the target signal to restore data. Wherein, the decoding module may include a forward error correction code (forward error correction, FEC) decoder, and the decoding module 107 recovers the data as a sequence composed of 0 and 1.
可选地,信号处理装置为强度调制装置或相位调制装置。Optionally, the signal processing device is an intensity modulation device or a phase modulation device.
可选地,均衡信号是复数信号或实数信号。Optionally, the equalized signal is a complex signal or a real signal.
可选地,均衡信号是PAM信号,降维信号是二进制振幅键控(on-off keying,OOK)信号。或者,均衡信号是正交振幅调制(quadrature amplitude modulation,QAM)信号,降维信号是正交相移键控(quadrature phase shift keying,QPSK)信号。Optionally, the equalization signal is a PAM signal, and the dimensionality reduction signal is a binary amplitude keying (on-off keying, OOK) signal. Alternatively, the equalized signal is a quadrature amplitude modulation (quadrature amplitude modulation, QAM) signal, and the dimensionality reduction signal is a quadrature phase shift keying (quadrature phase shift keying, QPSK) signal.
第二方面,提供了一种信号处理方法,应用于信号处理装置。信号处理装置包括依次连接的均衡模块、粗判决模块、滤波模块、MLSE模块和映射模块,粗判决模块还与映射模块连接。该方法包括:均衡模块对输入均衡模块的初始信号进行均衡处理,得到均衡信号。粗判决模块根据均衡信号确定降维位置信息和降维信号,降维信号的信号状态的数目小于均衡信号的信号状态的数目,降维信号中包括n个时刻中的各个时刻的降维子信号,降维信号与调制格式无关,降维位置信息包括所述n个时刻中的各个时刻对应的位置标识值,每个时刻对应的位置标识值用于指示该每个时刻的降维子信号在均衡信号中的对应位置,n为正整数。滤波模块对降维信号进行滤波处理,得到滤波信号。MLSE模块确定滤波信号的目标路径分支。映射模块根据降维位置信息,对滤波信号的目标路径分支进行映射得到目标信号,目标信号的信号状态的数目与均衡信号的信号状态的数目相等,目标信号的各个信号状态与均衡信号的各个信号状态相同或对应。In a second aspect, a signal processing method is provided, which is applied to a signal processing device. The signal processing device includes an equalization module, a rough judgment module, a filter module, an MLSE module and a mapping module connected in sequence, and the rough judgment module is also connected with the mapping module. The method includes: an equalization module performs equalization processing on an initial signal input to the equalization module to obtain an equalized signal. The rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, and the dimensionality reduction signal includes the dimensionality reduction sub-signals at each moment in n times , the dimensionality reduction signal has nothing to do with the modulation format, the dimensionality reduction position information includes the position identification value corresponding to each of the n times, and the position identification value corresponding to each time point is used to indicate that the dimensionality reduction sub-signal at each time point is at The corresponding position in the equalized signal, n is a positive integer. The filtering module performs filtering processing on the dimensionality reduction signal to obtain the filtered signal. The MLSE module determines target path branches of the filtered signal. The mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. The status is the same or corresponds.
可选地,对于每个时刻的降维子信号在均衡信号中的对应位置,该均衡信号具有与该对应位置相邻的两个状态位置,该对应位置位于该两个状态位置之间,该对应位置与该两个状态位置之间的欧式距离相等,每个状态位置对应该均衡信号的一个信号状态,该两个状态位置对应的信号状态不同。Optionally, for the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, the equalized signal has two state positions adjacent to the corresponding position, the corresponding position is located between the two state positions, the The Euclidean distance between the corresponding position and the two state positions is equal, each state position corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
可选地,粗判决模块根据均衡信号确定降维位置信息和降维信号,包括:粗判决模块根据均衡信号确定降维位置信息;粗判决模块根据均衡信号和降维位置信息确定降维信号。Optionally, the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalized signal, including: the rough judgment module determines the dimensionality reduction position information according to the equalized signal; the rough judgment module determines the dimensionality reduction signal according to the equalized signal and the dimensionality reduction position information.
可选地,均衡信号中包括所述n个时刻中的各个时刻的均衡子信号,粗判决模块根据均衡信号确定降维位置信息,包括:粗判决模块根据所述n个时刻中的每个时刻的均衡子信号,确定该每个时刻对应的位置标识值。粗判决模块根据均衡信号和降维位置信息确定降维信号,包括:粗判决模块根据所述n个时刻中的每个时刻的均衡子信号和该每个时刻对应的位置标识值,确定该每个时刻的降维子信号。Optionally, the equalized signal includes equalized sub-signals at each of the n moments, and the rough decision module determines the dimensionality reduction position information according to the equalized signal, including: the rough decision module The equalized sub-signal of , and determine the position identification value corresponding to each moment. The rough judgment module determines the dimensionality reduction signal according to the equalized signal and the dimensionality reduction position information, including: the rough judgment module determines each Dimensionality reduction sub-signal at a moment.
可选地,均衡模块包括第一均衡子模块和第二均衡子模块。第一均衡子模块、第二均衡子模块和粗判决模块依次连接,第一均衡子模块还与粗判决模块连接。均衡模块对输入均衡模块的初始信号进行均衡处理,得到均衡信号,包括:第一均衡子模块对初始信号进行第一均衡处理,得到第一均衡信号;第二均衡子模块对第一均衡信号进行第二均衡处理,得到第二均衡信号。其中,均衡模块得到的均衡信号包括第一均衡信号和第二均衡信号,降维子信号在均衡信号中的对应位置为降维子信号在第二均衡信号中的对应位置,所述均衡子信号为第二均衡信号中的子信号。Optionally, the equalization module includes a first equalization submodule and a second equalization submodule. The first equalization sub-module, the second equalization sub-module and the rough judgment module are connected in sequence, and the first equalization sub-module is also connected with the rough judgment module. The equalization module equalizes the initial signal input to the equalization module to obtain an equalized signal, including: the first equalization sub-module performs first equalization processing on the initial signal to obtain the first equalized signal; the second equalization sub-module performs equalization on the first equalized signal second equalization processing to obtain a second equalization signal. Wherein, the equalization signal obtained by the equalization module includes a first equalization signal and a second equalization signal, and the corresponding position of the dimensionality reduction sub-signal in the equalization signal is the corresponding position of the dimensionality reduction sub-signal in the second equalization signal, and the equalization sub-signal is a sub-signal in the second equalized signal.
可选地,粗判决模块根据均衡信号确定降维位置信息,包括:粗判决模块根据第二均衡信号确定降维位置信息。粗判决模块根据均衡信号和降维位置信息确定降维信号,包括:粗判决模块根据第一均衡信号和降维位置信息确定降维信号。Optionally, the rough decision module determining the dimensionality reduction location information according to the equalized signal includes: the rough decision module determining the dimensionality reduction location information according to the second equalization signal. The rough judgment module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information, including: the rough judgment module determines the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction location information.
可选地,滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,目标路径分支中包括所述n个时刻中的各个时刻的判决值,所述n个时刻中的每个时刻的判决值是MLSE模块基于该每个时刻的滤波子信号获得的,目标信号中包括所述n个时刻中的各个时刻的目标子信号。映射模块根据降维位置信息,对滤波信号的目标路径分支进行映射得到目标信号,包括:映射模块根据所述n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号;映射模块根据该n个时刻的目标子信号确定目标信号。Optionally, the filtered signal includes a filtered sub-signal at each of the n moments, the target path branch includes a decision value at each of the n moments, and each of the n moments The decision value of is obtained by the MLSE module based on the filtered sub-signals at each moment, and the target signal includes target sub-signals at each of the n times. The mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, including: the mapping module according to the decision value at each time in the n times and the position identification value corresponding to each time, Determine the target sub-signal at each moment; the mapping module determines the target signal according to the target sub-signals at n times.
可选地,判决值为硬值,映射模块根据所述n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号,包括:映射模块将所述n个时刻中的每个时刻的判决值与该每个时刻对应的位置标识值之和,确定为该每个时刻的目标子信号。Optionally, the decision value is a hard value, and the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including: mapping The module determines the sum of the decision value at each of the n moments and the position identification value corresponding to each moment as the target sub-signal at each moment.
可选地,判决值为软值,映射模块根据所述n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号,包括:映射模块根据所述n个时刻中的每个时刻对应的位置标识值,确定该每个时刻对应的映射规则;映射模块根据该每个时刻的判决值和该每个时刻对应的位置标识值对应的映射规则,确定该每个时刻的目标子信号。Optionally, the decision value is a soft value, and the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including: mapping The module determines the mapping rule corresponding to each time according to the position identification value corresponding to each time in the n times; The mapping rule determines the target sub-signal at each moment.
可选地,均衡信号的信号状态包括-3、-1、1和3,降维信号的信号状态包括-1和1,位置标识值包括-2、0和2。当p_ind_d(k)=-2时,映射规则为hd_out(k)=[max,-ld_out(k)]。当p_ind_d(k)=0时,映射规则为hd_out(k)=[ld_out(k),max]。当p_ind_d(k)=2时,映射规则为hd_out(k)=[-max,ld_out(k)]。p_ind_d(k)为第k时刻对应的位置标识值,ld_out(k)为第k时刻的判决值,hd_out(k)为第k时刻的目标子信号,max为常数,k为不大于n的正整数,在映射规则的表述[A,B]中,A为目标子信号的高位比特,B为目标子信号的低位比特。Optionally, the signal state of the equalized signal includes -3, -1, 1, and 3, the signal state of the dimensionality reduction signal includes -1 and 1, and the position identification value includes -2, 0, and 2. When p_ind_d(k)=-2, the mapping rule is hd_out(k)=[max, -ld_out(k)]. When p_ind_d(k)=0, the mapping rule is hd_out(k)=[ld_out(k), max]. When p_ind_d(k)=2, the mapping rule is hd_out(k)=[-max, ld_out(k)]. p_ind_d(k) is the position identification value corresponding to the kth moment, ld_out(k) is the judgment value at the kth moment, hd_out(k) is the target sub-signal at the kth moment, max is a constant, k is a positive value not greater than n Integer, in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal.
可选地,信号处理装置还包括自相关估计模块,自相关估计模块分别与均衡模块、滤波模块和MLSE模块连接。该方法还包括:自相关估计模块根据均衡信号确定滤波模块的滤波系数,并向滤波模块和MLSE模块分别提供该滤波系数。滤波模块对降维信号进行滤波处理,包括:滤波模块根据该滤波系数对降维信号进行滤波处理。MLSE模块确定滤波信号的目标路径分支,包括:MLSE模块根据该滤波系数确定滤波信号的目标路径分支。Optionally, the signal processing device further includes an autocorrelation estimation module, and the autocorrelation estimation module is respectively connected to the equalization module, the filtering module and the MLSE module. The method also includes: the autocorrelation estimation module determines the filter coefficient of the filter module according to the equalized signal, and provides the filter coefficient to the filter module and the MLSE module respectively. The filtering module performs filtering processing on the dimensionality reduction signal, including: the filtering module performs filtering processing on the dimensionality reduction signal according to the filtering coefficient. The MLSE module determines the target path branch of the filtered signal, including: the MLSE module determines the target path branch of the filtered signal according to the filter coefficient.
可选地,滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,MLSE模块根据滤波系数确定滤波信号的目标路径分支,包括:MLSE模块根据滤波系数和所述n个时刻中的每个时刻的滤波子信号确定该每个时刻的分支度量;MLSE模块根据所述n个时刻的分支度量确定滤波信号的目标路径分支。Optionally, the filtered signal includes filtered sub-signals at each of the n times, and the MLSE module determines the target path branch of the filtered signal according to the filter coefficient, including: the MLSE module determines the target path branch of the filtered signal according to the filter coefficient and the n times The filtered sub-signal at each moment determines the branch metric at each moment; the MLSE module determines the target path branch of the filtered signal according to the branch metrics at n moments.
可选地,信号处理装置还包括译码模块,译码模块与映射模块连接。该方法还包括:译码模块对目标信号进行译码,以恢复出数据。Optionally, the signal processing device further includes a decoding module connected to the mapping module. The method also includes: the decoding module decodes the target signal to restore the data.
第三方面,提供了一种处理芯片,该处理芯片包括如第一方面或第一方面的任一可选实现方式所提供的信号处理装置。可选地,该处理芯片为DSP芯片。A third aspect provides a processing chip, where the processing chip includes the signal processing apparatus provided in the first aspect or any optional implementation manner of the first aspect. Optionally, the processing chip is a DSP chip.
第四方面,提供了一种信号接收设备,包括存储芯片和处理芯片;In the fourth aspect, a signal receiving device is provided, including a memory chip and a processing chip;
存储芯片用于存储计算机程序;Memory chips are used to store computer programs;
处理芯片用于执行存储芯片中存储的计算机程序以使得信号接收设备执行如第二方面或第二方面的任一可选实现方式所提供的信号处理方法。The processing chip is used to execute the computer program stored in the storage chip so that the signal receiving device executes the signal processing method provided in the second aspect or any optional implementation manner of the second aspect.
第五方面,提供了一种信号传输系统,包括:信号发送设备和如第四方面所提供的 信号接收设备。信号发送设备与信号接收设备通过传输链路连接,信号发送设备用于通过传输链路向信号接收设备发送信号。A fifth aspect provides a signal transmission system, including: a signal sending device and the signal receiving device as provided in the fourth aspect. The signal sending device is connected to the signal receiving device through a transmission link, and the signal sending device is used to send a signal to the signal receiving device through the transmission link.
可选地,信号发送设备为光发送机,信号接收设备为光接收机,传输链路为光链路。Optionally, the signal sending device is an optical transmitter, the signal receiving device is an optical receiver, and the transmission link is an optical link.
第六方面,提供了一种计算机可读存储介质,该计算机可读存储介质中存储有计算机程序,该计算机程序被执行时实现如第二方面或第二方面的任一可选实现方式所提供的信号处理方法。A sixth aspect provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed, the implementation as provided in the second aspect or any optional implementation manner of the second aspect is provided. signal processing method.
第七方面,提供了一种计算机程序产品,该计算机程序产品包括程序或代码,该程序或代码被执行时,实现如第二方面或第二方面的任一可选实现方式所提供的信号处理方法。In a seventh aspect, a computer program product is provided, the computer program product includes a program or code, and when the program or code is executed, it realizes the signal processing provided in the second aspect or any optional implementation manner of the second aspect method.
上述第二方面至第七方面的技术效果可以参考第一方面的技术效果,这里不再赘述。For the technical effects of the above-mentioned second to seventh aspects, reference may be made to the technical effects of the first aspect, which will not be repeated here.
本申请提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solution provided by the application are:
本申请实施例提供的信号处理方法及装置、处理芯片、信号传输系统,均衡模块对初始信号进行均衡处理得到均衡信号,粗判决模块根据均衡信号确定降维位置信息和降维信号,并将降维位置信息输出至映射模块,将降维信号输出至滤波模块,滤波模块对降维信号进行滤波得到滤波信号,并将滤波信号输出至MLSE模块,MLSE模块确定滤波信号的目标路径分支,并将滤波信号的目标路径分支输出至映射模块,映射模块根据降维位置信息对滤波信号的目标路径分支进行映射得到目标信号。由于降维信号与调制格式无关,降维信号的信号状态的数目小于均衡信号的信号状态的数目,滤波信号的信号状态的数目等于降维信号的信号状态的数目,因此输入MLSE模块的滤波信号的信号状态的数目小于均衡模块输出的均衡信号的信号状态的数目,且输入MLSE模块的滤波信号与调制格式无关,使得MLSE模块确定目标路径分支的过程中所需计算的路径分支较少,且MLSE模块确定目标路径分支的过程与调制格式无关,有助于降低MLSE模块的算法复杂度,降低MLSE模块的资源消耗。In the signal processing method and device, processing chip, and signal transmission system provided in the embodiments of the present application, the equalization module performs equalization processing on the initial signal to obtain an equalized signal, and the rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, and converts the dimensionality reduction The dimension position information is output to the mapping module, and the dimension reduction signal is output to the filter module. The filter module filters the dimension reduction signal to obtain a filter signal, and outputs the filter signal to the MLSE module. The MLSE module determines the target path branch of the filter signal, and The target path branch of the filtered signal is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. Since the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module The number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal input to the MLSE module has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and The process of determining the branch of the target path by the MLSE module has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
附图说明Description of drawings
图1是本申请实施例提供的一种信号传输系统的结构示意图;FIG. 1 is a schematic structural diagram of a signal transmission system provided by an embodiment of the present application;
图2是相关技术提供的一种DSP芯片的结构示意图;Fig. 2 is the structural representation of a kind of DSP chip provided by related art;
图3是本申请实施例提供的一种信号处理装置的结构示意图;FIG. 3 is a schematic structural diagram of a signal processing device provided in an embodiment of the present application;
图4是本申请实施例提供的一种位置标识值与PAM4信号的信号状态的对应关系图;Fig. 4 is a corresponding relationship diagram between a position identification value and a signal state of a PAM4 signal provided by an embodiment of the present application;
图5是本申请实施例提供的一种均衡信号与降维信号的关系图;FIG. 5 is a relationship diagram between an equalization signal and a dimensionality reduction signal provided by an embodiment of the present application;
图6是本申请实施例提供的另一种均衡信号与降维信号的关系图;FIG. 6 is a relationship diagram between another equalization signal and a dimensionality reduction signal provided by an embodiment of the present application;
图7是本申请实施例提供的另一种信号处理装置的结构示意图;FIG. 7 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application;
图8是本申请实施例提供的一种映射规则的示意图;FIG. 8 is a schematic diagram of a mapping rule provided by an embodiment of the present application;
图9是本申请实施例提供的再一种信号处理装置的结构示意图;FIG. 9 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application;
图10是本申请实施例提供的又一种信号处理装置的结构示意图;FIG. 10 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application;
图11是本申请实施例提供的又一种信号处理装置的结构示意图;Fig. 11 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application;
图12是本申请实施例提供的又一种信号处理装置的结构示意图;Fig. 12 is a schematic structural diagram of another signal processing device provided by an embodiment of the present application;
图13是本申请实施例提供的一种信号处理过程的示意图;FIG. 13 is a schematic diagram of a signal processing process provided by an embodiment of the present application;
图14是本申请实施例提供的一种信号的功率与BER的关系图;FIG. 14 is a relationship diagram between signal power and BER provided by an embodiment of the present application;
图15是本申请实施例提供的另一种信号的功率与BER的关系图;FIG. 15 is a graph showing the relationship between power and BER of another signal provided by the embodiment of the present application;
图16是本申请实施例提供的一种信号处理方法的流程图。Fig. 16 is a flowchart of a signal processing method provided by an embodiment of the present application.
具体实施方式Detailed ways
为使本申请的原理、技术方案和优点更加清楚,下面将结合附图对本申请实施方式作进一步地详细描述。In order to make the principles, technical solutions and advantages of the present application clearer, the implementation manners of the present application will be further described in detail below in conjunction with the accompanying drawings.
信号传输系统通常包括信号发送设备和信号接收设备,信号发送设备与信号接收设备通过传输链路连接,信号发送设备通过传输链路向信号接收设备发送信号。其中,信号传输系统可以是光传输系统,相应地,信号发送设备可以是光发送机,信号接收设备可以是光接收机,传输链路可以是光链路。或者,信号传输系统可以是无线传输系统,相应地,信号发送设备可以是无线发送设备,信号接收设备可以是无线接收设备,传输链路可以无线链路。信号传输系统还可以是电缆传输系统,相应地,传输链路可以是电缆链路。其中,传输链路中包括传输介质以及传输器件,例如,光链路中通常包括光纤等光传输介质,还可以包括光放大器,光连接器等光器件,本申请实施例对此不做限定。The signal transmission system usually includes a signal sending device and a signal receiving device, the signal sending device and the signal receiving device are connected through a transmission link, and the signal sending device sends a signal to the signal receiving device through the transmission link. Wherein, the signal transmission system may be an optical transmission system, correspondingly, the signal sending device may be an optical transmitter, the signal receiving device may be an optical receiver, and the transmission link may be an optical link. Alternatively, the signal transmission system may be a wireless transmission system, correspondingly, the signal sending device may be a wireless sending device, the signal receiving device may be a wireless receiving device, and the transmission link may be a wireless link. The signal transmission system may also be a cable transmission system, and accordingly, the transmission link may be a cable link. The transmission link includes a transmission medium and a transmission device. For example, an optical link usually includes an optical transmission medium such as an optical fiber, and may also include optical devices such as an optical amplifier and an optical connector, which are not limited in this embodiment of the present application.
示例地,请参考图1,其示出了本申请实施例提供的一种信号传输系统的结构示意图。图1以光传输系统为例说明。该信号传输系统包括信号发送设备01和信号接收设备02,信号发送设备01与信号接收设备02通过传输链路03连接。其中,信号发送设备01中包括依次连接的激光器(laser)011、驱动器(driver)012和调制器(modulator)013,信号接收设备02中包括依次连接的光电转换装置(photoelectric conversion device,PD)021、模数转换器(analog-digital converter,ADC)022和DSP芯片023。信号发送设备01与信号接收设备02通过传输链路03连接具体为调制器013与PD 021通过传输链路03连接。其中,激光器011发出的光信号经过驱动器012驱动之后传输至调制器013,调制器013利用待发送的数据对光信号进行调制之后,通过传输链路03向信号接收设备02发送调制后的光信号(调制后的光信号携带待发送的数据)。光信号传输至信号接收设备02之后,PD 021将光信号转换为电信号,PD 021转换得到的电信号为模拟电信号,ADC对该模拟电信号进行模数转换得到数字电信号,DSP芯片对该数字电信号进行处理,以恢复出数据。For example, please refer to FIG. 1 , which shows a schematic structural diagram of a signal transmission system provided by an embodiment of the present application. Figure 1 takes the optical transmission system as an example to illustrate. The signal transmission system includes a signal sending device 01 and a signal receiving device 02 , and the signal sending device 01 and the signal receiving device 02 are connected through a transmission link 03 . Wherein, the signal sending device 01 includes a sequentially connected laser (laser) 011, driver (driver) 012, and modulator (modulator) 013, and the signal receiving device 02 includes a sequentially connected photoelectric conversion device (PD) 021 , an analog-digital converter (analog-digital converter, ADC) 022 and a DSP chip 023. The signal sending device 01 and the signal receiving device 02 are connected through the transmission link 03, specifically, the modulator 013 and the PD 021 are connected through the transmission link 03. The optical signal sent by the laser 011 is driven by the driver 012 and then transmitted to the modulator 013. After the modulator 013 modulates the optical signal with the data to be sent, the modulated optical signal is sent to the signal receiving device 02 through the transmission link 03. (The modulated optical signal carries the data to be sent). After the optical signal is transmitted to the signal receiving device 02, the PD 021 converts the optical signal into an electrical signal, and the electrical signal converted by the PD 021 is an analog electrical signal. The ADC performs analog-to-digital conversion on the analog electrical signal to obtain a digital electrical signal. The digital electrical signal is processed to recover the data.
在信号传输过程中,受信号传输系统中的各个器件的带宽的限制,信号通常会出现ISI,影响信号的质量。为了保证信号接收设备从接收到的信号中恢复出正确的数据,信号接收设备接收到信号后,通常会采用均衡算法对信号进行均衡处理,以消除或减弱信号的ISI。目前的均衡算法包括FFE算法、DFE算法、MLSE算法、MAP(mapreduce)算法等,相比于FFE算法、DFE算法、MAP算法,MLSE算法的误码率(bit error rate;BER)较低,且资源消耗较少,因此通常采用MLSE算法对信号进行均衡处理。其中,对信号进行均衡处理的过程通常由信号接收设备中的DSP芯片执行。During the signal transmission process, limited by the bandwidth of each device in the signal transmission system, the signal usually has ISI, which affects the quality of the signal. In order to ensure that the signal receiving device recovers correct data from the received signal, after receiving the signal, the signal receiving device usually uses an equalization algorithm to equalize the signal to eliminate or weaken the ISI of the signal. Current equalization algorithms include FFE algorithm, DFE algorithm, MLSE algorithm, MAP (mapreduce) algorithm, etc. Compared with FFE algorithm, DFE algorithm, and MAP algorithm, the bit error rate (bit error rate; BER) of MLSE algorithm is lower, and The resource consumption is less, so the MLSE algorithm is usually used to equalize the signal. Wherein, the process of equalizing the signal is usually performed by the DSP chip in the signal receiving device.
示例地,请参考图2,其示出了相关技术提供的一种DSP芯片的结构示意图。该DSP芯片中包括依次连接的FFE、后置滤波器和MLSE模块,以及与MLSE模块和后置滤波器分别连接的路径分支计算模块。FFE对接收到的信号(也即是数字电信号)进行均衡处理得到均衡信号,该均衡信号无ISI且非线性,但是该均衡信号中包含有色噪声。后置滤波器对该均衡信号进行滤波处理得到滤波信号,后置滤波器对该均衡信号进行滤波处理的过程中将该均衡信号中的有色噪声转换为白噪声,并在该均衡信号中引入可控的ISI。路径分支计算模块根据后置滤波器的滤波系数计算该滤波信号的路径分支数。MLSE模块根据该滤波信号的路径分支数对该滤波信号进行MLSE处理得到最优解。As an example, please refer to FIG. 2 , which shows a schematic structural diagram of a DSP chip provided in the related art. The DSP chip includes an FFE, a post-filter and an MLSE module connected in sequence, and a path branch calculation module connected to the MLSE module and the post-filter respectively. The FFE performs equalization processing on the received signal (that is, a digital electrical signal) to obtain an equalized signal. The equalized signal has no ISI and is non-linear, but the equalized signal contains colored noise. The post-filter filters the equalized signal to obtain a filtered signal. During the process of filtering the equalized signal, the post-filter converts the colored noise in the equalized signal into white noise, and introduces a variable noise into the equalized signal. controlled ISI. The path branch calculation module calculates the number of path branches of the filtered signal according to the filter coefficients of the post filter. The MLSE module performs MLSE processing on the filtered signal according to the number of path branches of the filtered signal to obtain an optimal solution.
其中,MLSE算法的复杂度取决于输入MLSE模块的路径分支数。假设滤波信号的状态 数为M,后置滤波器的调制阶数为L(相应地,引入记忆长度为L-1,引入记忆长度指的是后置滤波器引入的可控的ISI的长度),则输入MLSE模块的路径分支数为M L。也即输入MLSE模块的路径分支数与后置滤波器的调制阶数以及滤波信号的状态数均正相关,后置滤波器的调制阶数越高,滤波信号的状态数越多,MLSE算法的复杂度越高。 Among them, the complexity of the MLSE algorithm depends on the number of path branches input to the MLSE module. Assume that the number of states of the filtered signal is M, and the modulation order of the post-filter is L (correspondingly, the length of the memory introduced is L-1, and the length of the memory introduced refers to the length of the controllable ISI introduced by the post-filter) , then the number of path branches input to the MLSE module is M L . That is to say, the number of path branches input to the MLSE module is positively correlated with the modulation order of the post-filter and the number of states of the filtered signal. The higher the modulation order of the post-filter is, the more the number of states of the filtered signal is. The higher the complexity.
为了降低MLSE算法的复杂度,减少MLSE处理过程的资源消耗,目前DSP芯片中通常采用2阶后置滤波器(也即后置滤波器的调制阶数L=2,相应地,引入记忆长度为L-1=1)进行信号滤波。但是采用2阶后置滤波器时,MLSE处理过程的资源消耗仍然较大。示例地,对于PAM4信号,DSP芯片中采用2阶后置滤波器时,输入MLSE模块的路径分支数为16,MLSE模块根据路径分支数16对后置滤波器输出的滤波信号进行MLSE处理所占用的资源高达100万个逻辑门电路。对于PAM16信号,MLSE模块的算法复杂度更高,资源消耗更大。In order to reduce the complexity of the MLSE algorithm and reduce the resource consumption of the MLSE process, a second-order post-filter is usually used in the current DSP chip (that is, the modulation order of the post-filter is L=2, and correspondingly, the memory length is introduced as L-1=1) performs signal filtering. However, when a 2-order post-filter is used, the resource consumption of the MLSE process is still relatively large. For example, for a PAM4 signal, when a second-order post-filter is used in the DSP chip, the number of path branches input to the MLSE module is 16, and the MLSE module performs MLSE processing on the filtered signal output by the post-filter according to the number of 16 path branches. resources up to 1 million logic gates. For PAM16 signals, the algorithm complexity of the MLSE module is higher and the resource consumption is greater.
有鉴于相关技术中MLSE模块的算法复杂度高以及资源消耗大的问题,本申请实施例提供了一种信号处理方法及装置、处理芯片、信号传输系统。在本申请实施例提供的技术方案中,信号处理装置包括均衡模块、粗判决模块、滤波模块、MLSE模块和映射模块。均衡模块对初始信号进行均衡处理得到均衡信号。粗判决模块根据均衡信号确定降维位置信息和降维信号,并将降维位置信息输出至映射模块,将降维信号输出至滤波模块。滤波模块对降维信号进行滤波获得滤波信号,并将滤波信号输出至MLSE模块。MLSE模块确定滤波信号的目标路径分支(例如最优路径分支),并将滤波信号的目标路径分支输出至映射模块。映射模块根据降维位置信息对滤波信号的目标路径分支进行映射得到目标信号(例如最优信号)。其中,降维信号与调制格式无关,降维信号的信号状态的数目小于均衡信号的信号状态的数目,滤波信号的信号状态的数目等于降维信号的信号状态的数目,因此输入MLSE模块的滤波信号的信号状态的数目小于均衡模块输出的均衡信号的信号状态的数目,且输入MLSE模块的滤波信号与调制格式无关,使得MLSE模块确定目标路径分支的过程中所需计算的路径分支较少,且MLSE模块确定目标路径分支的过程与调制格式无关,这样一来,有助于降低MLSE模块的算法复杂度,降低MLSE模块的资源消耗。下面介绍本申请实施例的技术方案。In view of the problems of high algorithm complexity and large resource consumption of the MLSE module in the related art, embodiments of the present application provide a signal processing method and device, a processing chip, and a signal transmission system. In the technical solution provided by the embodiment of the present application, the signal processing device includes an equalization module, a rough decision module, a filtering module, an MLSE module and a mapping module. The equalization module performs equalization processing on the initial signal to obtain an equalized signal. The rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, outputs the dimensionality reduction position information to the mapping module, and outputs the dimensionality reduction signal to the filtering module. The filtering module filters the dimensionality reduction signal to obtain a filtered signal, and outputs the filtered signal to the MLSE module. The MLSE module determines the target path branch of the filtered signal (eg, the optimal path branch), and outputs the target path branch of the filtered signal to the mapping module. The mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal (for example, the optimal signal). Among them, the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the input filter of the MLSE module The number of signal states of the signal is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal input to the MLSE module has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, Moreover, the process of determining the branch of the target path by the MLSE module has nothing to do with the modulation format. In this way, it is helpful to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module. The technical solutions of the embodiments of the present application are introduced below.
请参考图3,其示出了本申请实施例提供的一种信号处理装置10的结构示意图。信号处理装置10可以是信号接收设备,或者是信号接收设备中的功能组件。例如,信号处理装置10是信号接收设备中的DSP芯片;或者,信号处理装置10是DSP芯片中的部分结构;或者,信号处理装置10包括DSP芯片和信号接收设备中的其他结构,本申请实施例对此不作限定。Please refer to FIG. 3 , which shows a schematic structural diagram of a signal processing device 10 provided by an embodiment of the present application. The signal processing apparatus 10 may be a signal receiving device, or a functional component in the signal receiving device. For example, the signal processing device 10 is a DSP chip in the signal receiving device; or, the signal processing device 10 is a partial structure in the DSP chip; or, the signal processing device 10 includes a DSP chip and other structures in the signal receiving device, and the present application implements Examples are not limited to this.
如图3所示,信号处理装置10包括:依次连接的均衡模块101、粗判决模块102、滤波模块103、MLSE模块104和映射模块105,粗判决模块102还与映射模块105连接。例如,粗判决模块102具有第一输出端a1和第二输出端a2,映射模块105具有第一输入端b1和第二输入端b2,粗判决模块102的第一输出端a1与滤波模块103连接,粗判决模块102的第二输出端a2与映射模块105的第二输入端b2连接,映射模块105的第一输入端b1与MLSE模块104连接。均衡模块101用于对输入均衡模块101的初始信号进行均衡处理,得到均衡信号。粗判决模块102用于根据该均衡信号确定降维位置信息和降维信号。粗判决模块102确定降维位置信息和降维信号之后,可以通过粗判决模块102的第一输出端a1输出该降维信号,通过粗判决模块102的第二输出端a2输出该降维位置信息。滤波模块103用于对该降维信号进行滤波处理,得到滤波信号。MLSE模块104用于确定该滤波信号的目标路径分 支(例如最优路径分支)。映射模块105用于该降维位置信息,对该滤波信号的目标路径分支进行映射得到目标信号(例如最优信号)。As shown in FIG. 3 , the signal processing device 10 includes: an equalization module 101 , a rough decision module 102 , a filter module 103 , an MLSE module 104 and a mapping module 105 connected in sequence, and the rough decision module 102 is also connected to the mapping module 105 . For example, the rough decision module 102 has a first output terminal a1 and a second output terminal a2, the mapping module 105 has a first input terminal b1 and a second input terminal b2, and the first output terminal a1 of the rough decision module 102 is connected to the filter module 103 , the second output terminal a2 of the rough decision module 102 is connected to the second input terminal b2 of the mapping module 105 , and the first input terminal b1 of the mapping module 105 is connected to the MLSE module 104 . The equalization module 101 is configured to perform equalization processing on an initial signal input to the equalization module 101 to obtain an equalized signal. The rough decision module 102 is configured to determine dimensionality reduction position information and dimensionality reduction signals according to the equalized signal. After the rough decision module 102 determines the dimension reduction position information and the dimension reduction signal, the dimension reduction signal can be output through the first output terminal a1 of the rough decision module 102, and the dimension reduction position information can be output through the second output terminal a2 of the rough decision module 102 . The filtering module 103 is configured to perform filtering processing on the dimensionality reduction signal to obtain a filtered signal. The MLSE module 104 is used to determine a target path branch (e.g., an optimal path branch) for the filtered signal. The mapping module 105 is used for the dimensionality reduction position information, and maps the target path branch of the filtered signal to obtain a target signal (eg, an optimal signal).
其中,均衡信号无ISI且非线性,但是该均衡信号中包含有色噪声,因此降维信号中包含有色噪声,滤波模块103对降维信号进行滤波的过程中,将降维信号中的有色噪声转换为白噪声,并在降维信号中引入可控的ISI,因此滤波信号中包含白噪声和可控的ISI。Wherein, the equalized signal has no ISI and is non-linear, but the equalized signal contains colored noise, so the dimensionality reduction signal contains colored noise, and the filtering module 103 converts the colored noise in the dimensionality reduction signal into is white noise, and introduces controllable ISI into the dimensionality reduction signal, so the filtered signal contains white noise and controllable ISI.
其中,降维信号的信号状态的数目小于均衡信号的信号状态的数目,该降维信号中包括n个时刻中的各个时刻的降维子信号,该降维信号与调制格式无关,该降维位置信息与该均衡信号的调制格式相关(该降维位置信息可以是根据该均衡信号的调制格式确定的),该降维位置信息包括该n个时刻中的各个时刻对应的位置标识值,每个时刻对应的位置标识值用于指示该每个时刻的降维子信号在该均衡信号中的对应位置,n为正整数。Wherein, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, the dimensionality reduction signal includes dimensionality reduction sub-signals at each moment in n times, the dimensionality reduction signal has nothing to do with the modulation format, the dimensionality reduction signal The location information is related to the modulation format of the equalized signal (the dimensionality-reduced location information may be determined according to the modulation format of the equalized signal), and the dimensionality-reduced location information includes the location identification value corresponding to each moment in the n times, each The position identification value corresponding to each moment is used to indicate the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, and n is a positive integer.
其中,均衡信号的信号状态的数目与初始信号的信号状态的数目相等,滤波信号的信号状态的数目与降维信号的信号状态的数目相等,目标信号的信号状态的数目与均衡信号的信号状态的数目相等,目标信号的各个信号状态与均衡信号的各个信号状态相同或对应。示例地,MLSE模块104输出的目标路径分支中包括所述n个时刻中的各个时刻的判决值,该目标路径分支中的判决值可以是硬值或软值。如果该目标路径分支中的判决值为硬值,则目标信号的各个信号状态与均衡信号的各个信号状态相同。如果该目标路径分支中的判决值为软值,则目标信号的各个信号状态与均衡信号的各个信号状态对应。Among them, the number of signal states of the equalized signal is equal to the number of signal states of the initial signal, the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, and the number of signal states of the target signal is equal to the number of signal states of the equalized signal The numbers are equal, and each signal state of the target signal is the same as or corresponds to each signal state of the equalized signal. For example, the target path branch output by the MLSE module 104 includes decision values at each of the n time moments, and the decision values in the target path branch may be hard values or soft values. If the decision value in this target path branch is a hard value, then the individual signal states of the target signal are identical to the individual signal states of the equalized signal. If the decision value in the target path branch is a soft value, the respective signal states of the target signal correspond to the respective signal states of the equalized signal.
其中,初始信号可以是实数信号,相应地,均衡信号、降维信号、滤波信号以及目标信号均是实数信号。或者,初始信号可以是复数信号,相应地,均衡信号、降维信号、滤波信号以及目标信号均是复数信号。实数信号仅包括实部,复数信号包括实部和虚部。在本申请实施例中,降维信号的信号状态的数目以及滤波信号的信号状态的数目均小于初始信号的信号状态的数目,均衡信号的信号状态的数目、目标信号的信号状态的数目以及初始信号的信号状态的数目相等。例如,初始信号、均衡信号以及目标信号均是实数信号,且具体是PAM信号(例如PAM4信号、PAM16信号等),则降维信号和滤波信号均可以是OOK信号。或者,初始信号、均衡信号以及目标信号均是复数信号,且具体是QAM信号(例如64QAM信号、16QAM信号等),则降维信号和滤波信号均可以是QPSK信号。Wherein, the initial signal may be a real number signal, and correspondingly, the equalization signal, the dimensionality reduction signal, the filtering signal and the target signal are all real number signals. Alternatively, the initial signal may be a complex signal, and accordingly, the equalized signal, the dimensionality reduction signal, the filtered signal, and the target signal are all complex signals. A real signal includes only the real part, and a complex signal includes both real and imaginary parts. In the embodiment of the present application, the number of signal states of the dimensionality reduction signal and the number of signal states of the filtered signal are smaller than the number of signal states of the initial signal, the number of signal states of the equalized signal, the number of signal states of the target signal, and the initial Signals have an equal number of signal states. For example, the initial signal, the equalization signal, and the target signal are all real signals, and specifically are PAM signals (such as PAM4 signals, PAM16 signals, etc.), then both the dimensionality reduction signal and the filtered signal can be OOK signals. Alternatively, the initial signal, the equalized signal and the target signal are all complex signals, and specifically are QAM signals (such as 64QAM signals, 16QAM signals, etc.), then both the dimensionality reduction signal and the filtered signal may be QPSK signals.
可选地,信号处理装置10可以是强度调制装置或相位调制装置。如果信号处理装置10是强度调制装置,则初始信号、均衡信号、降维信号、滤波信号以及目标信号均是实数信号。如果信号处理装置10是相位调制装置,则初始信号、均衡信号、降维信号、滤波信号以及目标信号均是复数信号。Optionally, the signal processing device 10 may be an intensity modulation device or a phase modulation device. If the signal processing device 10 is an intensity modulation device, the initial signal, the equalized signal, the dimensionality reduction signal, the filtered signal and the target signal are all real number signals. If the signal processing device 10 is a phase modulation device, the initial signal, the equalized signal, the dimensionality reduction signal, the filtered signal and the target signal are all complex signals.
综上所述,本申请实施例提供的信号处理装置,均衡模块对初始信号进行均衡处理得到均衡信号,粗判决模块根据均衡信号确定降维位置信息和降维信号,并将降维位置信息输出至映射模块,将降维信号输出至滤波模块,滤波模块对降维信号进行滤波得到滤波信号,并将滤波信号输出至MLSE模块,MLSE模块确定滤波信号的目标路径分支,并将滤波信号的目标路径分支输出至映射模块,映射模块根据降维位置信息对滤波信号的目标路径分支进行映射得到目标信号。由于降维信号与调制格式无关,降维信号的信号状态的数目小于均衡信号的信号状态的数目,滤波信号的信号状态的数目等于降维信号的信号状态的数目,因此输入MLSE模块的滤波信号的信号状态的数目小于均衡模块输出的均衡信号的信号状态的数目,且输入MLSE模块的滤波信号与调制格式无关,使得 MLSE模块确定目标路径分支的过程中所需计算的路径分支较少,且MLSE模块确定目标路径分支的过程与调制格式无关,有助于降低MLSE模块的算法复杂度,降低MLSE模块的资源消耗。In summary, in the signal processing device provided by the embodiment of the present application, the equalization module performs equalization processing on the initial signal to obtain an equalized signal, and the rough decision module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, and outputs the dimensionality reduction position information To the mapping module, output the dimension reduction signal to the filter module, the filter module filters the dimension reduction signal to obtain the filter signal, and outputs the filter signal to the MLSE module, the MLSE module determines the target path branch of the filter signal, and the target path of the filter signal The path branch is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. Since the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module The number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal input to the MLSE module has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and The process of determining the branch of the target path by the MLSE module has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
在本申请实施例中,对于所述n个时刻中的每个时刻的降维子信号在均衡信号中的对应位置,该均衡信号具有与该对应位置相邻的两个状态位置,该对应位置位于该两个状态位置之间,该对应位置与该两个状态位置之间的欧式距离相等,该两个状态位置中的每个状态位置对应该均衡信号的一个信号状态,该两个状态位置对应的信号状态不同。In the embodiment of the present application, for the corresponding position of the dimensionality reduction sub-signal at each of the n times in the equalized signal, the equalized signal has two state positions adjacent to the corresponding position, and the corresponding position Located between the two state positions, the corresponding position is equal to the Euclidean distance between the two state positions, each state position in the two state positions corresponds to a signal state of the balanced signal, and the two state positions The corresponding signal states are different.
可选地,均衡信号为PAM4信号,PAM4信号的信号状态包括-3、-1、1和3。假设降维信号中包括第k时刻的降维子信号ld_sig(k)=-3,第k时刻对应的位置标识值为p_ind_d(k)=-2,该位置标识值指示降维子信号ld_sig(k)=-3在该均衡信号中的对应位置(假设为对应位置k),则该均衡信号具有与该对应位置k相邻的两个状态位置,该两个状态位置与该均衡信号的信号状态-3和-1一一对应,该对应位置k位于该两个状态位置之间,该对应位置k与该两个状态位置之间的欧式距离相等。再假设降维信号中包括第k时刻的降维子信号ld_sig(k)=-1,第k时刻对应的位置标识值为p_ind_d(k)=0,该位置标识值指示降维子信号ld_sig(k)=-1在该均衡信号中的对应位置k,则该均衡信号具有与该对应位置k相邻的两个状态位置,该两个状态位置与该均衡信号的信号状态-1和1一一对应,该对应位置k位于该两个状态位置之间,该对应位置k与该两个状态位置之间的欧式距离相等。又假设降维信号中包括第k时刻的降维子信号ld_sig(k)=3,第k时刻对应的位置标识值为p_ind_d(k)=2,该位置标识值指示降维子信号ld_sig(k)=3在该均衡信号中的对应位置k,则该均衡信号具有与该对应位置k相邻的两个状态位置,该两个状态位置与该均衡信号的信号状态1和3一一对应,该对应位置k位于该两个状态位置之间,该对应位置k与该两个状态位置之间的欧式距离相等。其中,第k时刻为所述n个时刻中的任一时刻,1≤k≤n,且k为整数。Optionally, the equalized signal is a PAM4 signal, and the signal states of the PAM4 signal include -3, -1, 1 and 3. Assuming that the dimensionality reduction signal includes the dimensionality reduction sub-signal ld_sig(k)=-3 at the kth moment, the position identification value corresponding to the kth moment is p_ind_d(k)=-2, and the position identification value indicates the dimensionality reduction sub-signal ld_sig( The corresponding position of k)=-3 in the equalized signal (assumed to be the corresponding position k), then the equalized signal has two state positions adjacent to the corresponding position k, and the two state positions are consistent with the signal of the equalized signal The states -3 and -1 are in one-to-one correspondence, the corresponding position k is located between the two state positions, and the corresponding Euclidean distance between the two state positions is equal to the corresponding position k. Assume again that the dimensionality reduction signal includes the dimensionality reduction sub-signal ld_sig(k)=-1 at the kth moment, and the position identifier value corresponding to the kth moment is p_ind_d(k)=0, which indicates the dimensionality reduction sub-signal ld_sig( k)=-1 in the corresponding position k in the balanced signal, then the balanced signal has two state positions adjacent to the corresponding position k, and the two state positions are equal to the signal states-1 and 1 of the balanced signal One correspondence, the corresponding position k is located between the two state positions, and the Euclidean distance between the corresponding position k and the two state positions is equal. It is also assumed that the dimensionality reduction signal includes the dimensionality reduction sub-signal ld_sig(k)=3 at the kth moment, and the position identification value corresponding to the kth moment is p_ind_d(k)=2, and the position identification value indicates the dimensionality reduction sub-signal ld_sig(k )=3 corresponding position k in the balanced signal, then the balanced signal has two state positions adjacent to the corresponding position k, and the two state positions correspond one to one to the signal states 1 and 3 of the balanced signal, The corresponding position k is located between the two state positions, and the corresponding position k is equal to the Euclidean distance between the two state positions. Wherein, the kth time is any one of the n times, 1≤k≤n, and k is an integer.
作为一种示例,均衡信号为PAM4信号,请参考图4,其示出了本申请实施例提供的一种位置标识值与PAM4信号的信号状态的对应关系图。位置标识值p_ind=-2指示的对应位置(为了简洁将此对应位置称为对应位置-2)位于信号状态-3对应的状态位置(为了简洁将此状态位置称为状态位置-3)与信号状态-1对应的状态位置(为了简洁将此状态位置称为状态位置-1)之间,且对应位置-2与状态位置-3之间的欧式距离等于对应位置-2与状态位置-1之间的欧式距离。位置标识值p_ind=0指示的对应位置(为了简洁将此对应位置称为对应位置0)位于信号状态-1对应的状态位置(为了简洁将此状态位置称为状态位置-1)与信号状态1对应的状态位置(为了简洁将此状态位置称为状态位置1)之间,且对应位置0与状态位置-1之间的欧式距离等于对应位置0与状态位置1之间的欧式距离。位置标识值p_ind=2指示的对应位置(为了简洁将此对应位置称为对应位置2)位于信号状态1对应的状态位置(为了简洁将此状态位置称为状态位置1)与信号状态3对应的状态位置(为了简洁将此状态位置称为状态位置3)之间,且对应位置2与状态位置1之间的欧式距离等于对应位置2与状态位置3之间的欧式距离。As an example, the equalized signal is a PAM4 signal. Please refer to FIG. 4 , which shows a correspondence diagram between a location identifier value and a signal state of a PAM4 signal provided in an embodiment of the present application. The corresponding position indicated by the position identification value p_ind=-2 (this corresponding position is referred to as corresponding position-2 for brevity) is located in the state position corresponding to signal state-3 (this state position is referred to as state position-3 for brevity) and signal Between the state positions corresponding to state-1 (this state position is referred to as state position-1 for brevity), and the Euclidean distance between the corresponding position-2 and the state position-3 is equal to the distance between the corresponding position-2 and the state position-1 Euclidean distance between . The corresponding position indicated by the position identification value p_ind=0 (this corresponding position is referred to as corresponding position 0 for brevity) is located in the state position corresponding to signal state-1 (this state position is referred to as state position-1 for brevity) and signal state 1 Between the corresponding state positions (this state position is referred to as state position 1 for brevity), and the Euclidean distance between the corresponding position 0 and the state position -1 is equal to the Euclidean distance between the corresponding position 0 and the state position 1. The corresponding position indicated by the position identification value p_ind=2 (for brevity, this corresponding position is referred to as corresponding position 2) is located at the state position corresponding to signal state 1 (for brevity, this state position is referred to as state position 1) corresponding to signal state 3 The Euclidean distance between the state positions (this state position is called state position 3 for brevity), and the Euclidean distance between the corresponding position 2 and the state position 1 is equal to the Euclidean distance between the corresponding position 2 and the state position 3.
在本申请实施例中,粗判决模块102用于根据均衡信号确定降维位置信息和降维信号具体包括:粗判决模块102具体用于:根据均衡信号确定降维位置信息;根据该均衡信号和该降维位置信息确定降维信号。下面对粗判决模块102确定降维位置信息的实现过程和粗判决模块102确定降维信号的实现过程分别进行介绍。In the embodiment of the present application, the rough judgment module 102 is used to determine the dimensionality reduction position information and the dimensionality reduction signal according to the equalized signal specifically includes: the rough judgment module 102 is specifically used to: determine the dimensionality reduction position information according to the equalized signal; according to the equalized signal and The dimensionality reduction position information determines the dimensionality reduction signal. The realization process of determining the dimensionality reduction position information by the rough decision module 102 and the realization process of the dimensionality reduction signal determination by the rough decision module 102 are respectively introduced below.
在本申请实施例的可选实现方式中,均衡信号中包括所述n个时刻中的各个时刻的均衡子信号,粗判决模块102根据均衡信号确定降维位置信息包括:粗判决模块102根据该n个时刻中的每个时刻的均衡子信号,确定该每个时刻对应的位置标识值。作为一种示例,粗判决模块102根据判决规则对每个时刻的均衡子信号进行判决,根据对该每个时刻的均衡子信号的判决结果确定该每个时刻对应的位置标识值。可选地,每个时刻的均衡子信号的判决结果包括两个判决信号状态(或称为判决符号),粗判决模块102根据该两个判决信号状态确定该每个时刻对应的位置标识值,该两个判决信号状态对应两个状态位置,该位置标识值指示的对应位置与该两个状态位置之间的欧式距离相等。In an optional implementation of the embodiment of the present application, the equalized signal includes equalized sub-signals at each of the n times, and the rough decision module 102 determines the dimensionality reduction position information according to the equalized signal includes: the rough decision module 102 according to the For the equalized sub-signal at each of the n time instants, determine the position identification value corresponding to each instant. As an example, the rough judgment module 102 judges the balanced sub-signal at each time according to the judgment rule, and determines the position identification value corresponding to each time according to the judgment result of the balanced sub-signal at each time. Optionally, the decision result of the equalized sub-signal at each moment includes two decision signal states (or called decision symbols), and the rough decision module 102 determines the position identification value corresponding to each moment according to the two decision signal states, The two decision signal states correspond to two state positions, and the corresponding position indicated by the position identification value is equal to the Euclidean distance between the two state positions.
以均衡信号是PAM4信号为例,则判决规则可以如下表1所示:Taking the balanced signal as a PAM4 signal as an example, the decision rules can be shown in Table 1 below:
表1Table 1
均衡子信号equalizer sub-signal 判决结果verdict
hd_sig(k)<-1hd_sig(k)<-1 -3和-1-3 and -1
-1≤hd_sig(k)≤1-1≤hd_sig(k)≤1 -1和1-1 and 1
hd_sig(k)>1hd_sig(k)>1 1和31 and 3
hd_sig(k)表示第k时刻的均衡子信号,判决结果中的-3、-1、1和3中的每个为一个判决信号状态(或称为判决符号)。根据表1可知,当hd_sig(k)<-1时,判决结果为-3和-1;当-1≤hd_sig(k)≤1时,判决结果为-1和1;当hd_sig(k)>1时,判决结果为1和3。hd_sig(k) represents the equalized sub-signal at the kth moment, and each of -3, -1, 1 and 3 in the decision result is a decision signal state (or called a decision symbol). According to Table 1, when hd_sig(k)<-1, the judgment result is -3 and -1; when -1≤hd_sig(k)≤1, the judgment result is -1 and 1; when hd_sig(k)> 1, the verdict is 1 and 3.
示例地,假设hd_sig(k)=-3,由于hd_sig(k)<-1,因此粗判决模块102根据表1所示的判决规则确定第k时刻的判决结果为-3和-1,从而根据该判决结果确定第k时刻对应的位置标识值p_ind_d(k)=[-3+(-1)]/2=-2。再示例地,假设hd_sig(k)=-1,由于-1≤hd_sig(k)≤1,因此粗判决模块102根据表1所示的判决规则确定第k时刻的判决结果为-1和1,从而根据该判决结果确定第k时刻对应的位置标识值p_ind_d(k)=(-1+1)/2=0。又示例地,假设hd_sig(k)=3,由于hd_sig(k)>1,因此粗判决模块102根据表1所示的判决规则确定第k时刻的判决结果为1和3,从而根据该判决结果确定p_ind_d(k)=(1+3)/2=2。其中,判决结果与位置标识值的关系可以如图4所示。For example, assuming that hd_sig(k)=-3, since hd_sig(k)<-1, the rough decision module 102 determines that the decision result at the kth moment is -3 and -1 according to the decision rule shown in Table 1, and thus according to The decision result determines the position identifier value p_ind_d(k)=[-3+(-1)]/2=-2 corresponding to the kth moment. As another example, assuming that hd_sig(k)=-1, since -1≤hd_sig(k)≤1, the rough decision module 102 determines that the decision result at the kth moment is -1 and 1 according to the decision rule shown in Table 1, Therefore, the position identifier value p_ind_d(k)=(-1+1)/2=0 corresponding to the kth moment is determined according to the decision result. As another example, assuming that hd_sig(k)=3, since hd_sig(k)>1, the rough judgment module 102 determines that the judgment results at the kth moment are 1 and 3 according to the judgment rules shown in Table 1, so that according to the judgment results It is determined that p_ind_d(k)=(1+3)/2=2. Wherein, the relationship between the decision result and the location identification value may be as shown in FIG. 4 .
在本申请实施例的可选实现方式中,均衡信号中包括所述n个时刻中的各个时刻的均衡子信号,粗判决模块102根据均衡信号和降维位置信息确定降维信号包括:粗判决模块102根据该n个时刻中的每个时刻的均衡子信号和该每个时刻对应的位置标识值,确定该每个时刻的降维子信号。作为一种示例,粗判决模块102采用降维公式ld_sig(k)=hd_sig(k)-p_ind_d(k)确定第k时刻的降维子信号,也即,第k时刻的降维子信号等于第k时刻的均衡子信号与第k时刻对应的位置标识值的差值。示例地,假设hd_sig(k)=-3,p_ind_d(k)=-2,则ld_sig(k)=-3-(-2)=-1。假设hd_sig(k)=-1,p_ind_d(k)=0,则ld_sig(k)=-1-0=-1。假设hd_sig(k)=3,p_ind_d(k)=2,则ld_sig(k)=3-2=1。In an optional implementation of the embodiment of the present application, the equalized signal includes equalized sub-signals at each of the n times, and the rough judgment module 102 determines the dimensionality reduction signal according to the equalization signal and dimensionality reduction position information including: rough judgment The module 102 determines the dimensionality reduction sub-signal at each time point according to the balanced sub-signal at each time point in the n time points and the location identification value corresponding to each time point. As an example, the rough decision module 102 uses the dimensionality reduction formula ld_sig(k)=hd_sig(k)-p_ind_d(k) to determine the dimensionality reduction sub-signal at the kth moment, that is, the dimensionality reduction subsignal at the kth moment is equal to the dimensionality reduction subsignal at the kth moment The difference between the equalization sub-signal at time k and the position identification value corresponding to time k. For example, assuming hd_sig(k)=-3, p_ind_d(k)=-2, then ld_sig(k)=-3-(-2)=-1. Suppose hd_sig(k)=-1, p_ind_d(k)=0, then ld_sig(k)=-1-0=-1. Suppose hd_sig(k)=3, p_ind_d(k)=2, then ld_sig(k)=3-2=1.
在本申请实施例中,粗判决模块102实现了对均衡信号的降维,使得粗判决模块102确定的降维信号的信号状态的数目小于均衡信号的信号状态的数目。信号状态指的是信号的可能状态,信号状态的数目指的是每个时刻的信号的可能状态的数量。在一些实施例中,信号状态也被称为电平,因此,信号状态的数目也被称为信号的电平数。In the embodiment of the present application, the rough decision module 102 implements dimensionality reduction of the equalized signal, so that the number of signal states of the dimensionality-reduced signal determined by the rough decision module 102 is smaller than the number of signal states of the equalized signal. The signal state refers to the possible states of the signal, and the number of signal states refers to the number of possible states of the signal at each moment. In some embodiments, signal states are also referred to as levels, therefore, the number of signal states is also referred to as the number of signal levels.
以均衡信号是PAM4信号为例,请参考图5,其示出了本申请实施例提供的一种均衡信号与降维信号的关系图。从图5中可以看出,均衡信号的信号状态包括-3、-1、1和3,降维信号的信号状态包括-1和1,均衡信号具有4个信号状态,降维信号具有2个信 号状态,因此降维信号的信号状态的数目小于均衡信号的信号状态的数目,且降维信号与均衡信号的调制格式无关。Taking the equalized signal as an example of a PAM4 signal, please refer to FIG. 5 , which shows a relationship diagram between an equalized signal and a dimensionality reduction signal provided by an embodiment of the present application. It can be seen from Figure 5 that the signal states of the balanced signal include -3, -1, 1 and 3, the signal states of the dimensionality reduction signal include -1 and 1, the balance signal has 4 signal states, and the dimensionality reduction signal has 2 Signal states, so the number of signal states of the reduced-dimensional signal is smaller than the number of signal states of the equalized signal, and the reduced-dimensional signal is independent of the modulation format of the equalized signal.
本申请实施例通过粗判决模块102的处理,在每个时刻的均衡子信号的信号状态中,选择最有可能的信号状态(最有可能是信号发送设备发送的信号的状态),并基于该最有可能的信号状态获得该每个时刻的降维子信号的信号状态,后续滤波模块103、MLSE模块104等模块根据降维子信号进行处理,有助于简化滤波模块103、MLSE模块104等模块的计算复杂度。仍然以均衡信号是PAM4信号为例,请参考图6,其示出了本申请实施例提供的另一种均衡信号与降维信号的关系图。如图6所示,均衡信号中包括第k时刻、第k+1时刻和第k+2时刻中的各个时刻的均衡子信号,第k时刻、第k+1时刻和第k+2时刻中的每个时刻的均衡子信号的信号状态包括-3、-1、1和3,第k时刻的均衡子信号的信号状态中最有可能的信号状态为-3和-1,第k+1时刻的均衡子信号的信号状态中最有可能的信号状态为1和3,第k+2时刻的均衡子信号的信号状态中最有可能的信号状态为-1和1。通过粗判决模块102的处理得到降维信号和降维位置信息。降维信号中包括第k时刻、第k+1时刻和第k+2时刻中的各个时刻的降维子信号,降维位置信息包括第k时刻、第k+1时刻和第k+2时刻中的各个时刻对应的位置标识值。第k时刻、第k+1时刻和第k+2时刻中的每个时刻的子信号的信号状态包括-1和1,第k时刻对应的位置标识值为-2,第k+1时刻对应的位置标识值为2,第k+2时刻对应的位置标识值为0。其中,第k时刻对应的位置标识值-2根据第k时刻的均衡子信号的最有可能的信号状态-3和-1确定,第k+1时刻对应的位置标识值2根据第k+1时刻的均衡子信号的最有可能的信号状态1和3确定,第k+2时刻对应的位置标识值0根据第k+2时刻的均衡子信号的最有可能的信号状态-1和1确定。In the embodiment of the present application, through the processing of the rough judgment module 102, the most likely signal state (most likely to be the state of the signal sent by the signal sending device) is selected from the signal state of the equalized sub-signal at each moment, and based on this The most likely signal state obtains the signal state of the dimensionality reduction sub-signal at each moment, and the subsequent filtering module 103, MLSE module 104 and other modules process according to the dimensionality reduction sub-signal, which helps to simplify the filtering module 103, MLSE module 104, etc. Computational complexity of the module. Still taking the example that the equalized signal is a PAM4 signal, please refer to FIG. 6 , which shows a relationship diagram between another equalized signal and a dimensionality reduction signal provided by an embodiment of the present application. As shown in Figure 6, the equalized signal includes the equalized sub-signals at the kth moment, the k+1th moment, and the k+2th moment, and the kth moment, the k+1st moment, and the k+2th moment The signal states of the balanced sub-signal at each moment include -3, -1, 1, and 3, and the most likely signal states of the signal states of the balanced sub-signal at the kth moment are -3 and -1, and the k+1th The most probable signal states of the signal states of the equalized sub-signal at time instant are 1 and 3, and the most probable signal states of the signal states of the equalized sub-signal at time k+2 are -1 and 1. The dimensionality reduction signal and dimensionality reduction position information are obtained through the processing of the rough decision module 102 . The dimensionality reduction signal includes the dimensionality reduction sub-signals at the kth moment, the k+1th moment and the k+2th moment, and the dimensionality reduction position information includes the kth moment, the k+1th moment and the k+2th moment The location identifier values corresponding to each moment in . The signal state of the sub-signal at each of the kth time, the k+1 time and the k+2 time includes -1 and 1, the position identification value corresponding to the k time is -2, and the k+1 time corresponds to The position identification value of is 2, and the position identification value corresponding to the k+2th moment is 0. Among them, the position identifier value -2 corresponding to the kth moment is determined according to the most likely signal states -3 and -1 of the equalized sub-signal at the kth moment, and the position identifier value 2 corresponding to the k+1th moment is determined according to the k+1th The most probable signal states 1 and 3 of the balanced sub-signal at the moment are determined, and the position identification value 0 corresponding to the k+2th time is determined according to the most probable signal states -1 and 1 of the balanced sub-signal at the k+2th time .
在本申请实施例中,均衡模块101中可以包括至少一个均衡子模块。作为一种示例,请参考图7,其示出了本申请实施例提供的另一种信号处理装置10的结构示意图。均衡模块101包括第一均衡子模块1011和第二均衡子模块1012。第一均衡子模块1011、第二均衡子模块1012和粗判决模块102依次连接,第一均衡子模块1011还与粗判决模块102连接。例如,粗判决模块102具有第一输入端a3和第二输入端a4,第二均衡子模块1012的输出端与粗判决模块102的第一输入端a3连接,第一均衡子模块1011的输出端与粗判决模块102的第二输入端a4连接。其中,均衡模块101用于对输入均衡模块101的初始信号进行均衡处理包括:第一均衡子模块1011用于对初始信号进行第一均衡处理,得到第一均衡信号(标记为1hd_sig);第二均衡子模块1012用于对第一均衡信号进行第二均衡处理,得到第二均衡信号(标记为2hd_sig)。均衡模块101对初始信号进行均衡处理得到的均衡信号(即hd_sig)包括第一均衡信号(即1hd_sig)和第二均衡信号(即2hd_sig),降维子信号在该均衡信号中的对应位置为该降维子信号在第二均衡信号2hd_sig中的对应位置,第一均衡信号和第二均衡信号中分别包括所述n个时刻中的各个时刻的均衡子信号。In the embodiment of the present application, the equalization module 101 may include at least one equalization sub-module. As an example, please refer to FIG. 7 , which shows a schematic structural diagram of another signal processing apparatus 10 provided by an embodiment of the present application. The equalization module 101 includes a first equalization sub-module 1011 and a second equalization sub-module 1012 . The first equalization sub-module 1011 , the second equalization sub-module 1012 and the rough decision module 102 are connected in sequence, and the first equalization sub-module 1011 is also connected to the rough decision module 102 . For example, the rough decision module 102 has a first input terminal a3 and a second input terminal a4, the output terminal of the second equalization sub-module 1012 is connected to the first input terminal a3 of the rough decision module 102, and the output terminal of the first equalization sub-module 1011 It is connected with the second input terminal a4 of the rough decision module 102 . Wherein, the equalization module 101 is used to equalize the initial signal input to the equalization module 101, including: the first equalization sub-module 1011 is used to perform the first equalization process on the initial signal to obtain the first equalized signal (marked as 1hd_sig); The equalization sub-module 1012 is configured to perform a second equalization process on the first equalized signal to obtain a second equalized signal (marked as 2hd_sig). The equalized signal (i.e. hd_sig) obtained by equalizing the initial signal by the equalization module 101 includes a first equalized signal (i.e. 1hd_sig) and a second equalized signal (i.e. 2hd_sig), and the corresponding position of the dimensionality reduction sub-signal in the equalized signal is the Corresponding positions of the dimensionality reduction sub-signals in the second equalized signal 2hd_sig, the first equalized signal and the second equalized signal respectively include the equalized sub-signals at each of the n times.
其中,第一均衡子模块1011可以为FFE或MIMO均衡器,第二均衡子模块1012可以为DFE。例如,初始信号是实数信号,第一均衡子模块1011为FFE。再例如,初始信号是复数信号,第一均衡子模块1011为MIMO均衡器。本申请实施例以均衡模块101包括两个子模块为例说明,在实际应用中,均衡模块101可以包括三个或三个以上子模块,均衡模块101中的子模块可以是FFE、DFE或MAP均衡器,本申请实施例对此不做限定。由于均衡模块101中包括两个级联的均衡子模块,因此均衡模块101可以对输入均衡模块101的初始信 号进行两级均衡处理,有助于提升均衡模块101输出的均衡信号(第二均衡信号)的信噪比,从而提升粗判决模块102输出的降维位置信息以及降维信号的准确性。Wherein, the first equalization sub-module 1011 may be an FFE or a MIMO equalizer, and the second equalization sub-module 1012 may be a DFE. For example, the initial signal is a real number signal, and the first equalization sub-module 1011 is an FFE. For another example, the initial signal is a complex signal, and the first equalization sub-module 1011 is a MIMO equalizer. In the embodiment of the present application, the equalization module 101 includes two sub-modules as an example. In practical applications, the equalization module 101 may include three or more sub-modules, and the sub-modules in the equalization module 101 may be FFE, DFE or MAP equalizers. device, which is not limited in the embodiment of this application. Since the equalization module 101 includes two cascaded equalization sub-modules, the equalization module 101 can carry out two-stage equalization processing on the initial signal input to the equalization module 101, which helps to improve the equalized signal (the second equalized signal) output by the equalized module 101. ), thereby improving the accuracy of the dimensionality reduction position information and the dimensionality reduction signal output by the rough decision module 102.
在本申请实施例中,对于图7所示的信号处理装置10,粗判决模块102根据均衡信号确定降维位置信息包括:粗判决模块102根据第二均衡信号确定降维位置信息。例如,粗判决模块102根据第二均衡信号中包括的所述n个时刻中的每个时刻的均衡子信号,确定该每个时刻对应的位置标识值。粗判决模块102根据均衡信号和降维位置信息确定降维信号包括:粗判决模块102根据第一均衡信号和降维位置信息确定降维信号。例如,粗判决模块102根据第一均衡信号中包括的所述n个时刻中的每个时刻的均衡子信号和该每个时刻对应的位置标识值,确定该每个时刻的降维子信号。其中,粗判决模块102根据第二均衡信号中包括的每个时刻的均衡子信号确定该每个时刻对应的位置标识值的过程,以及粗判决模块102根据第一均衡信号中包括的每个时刻的均衡子信号和该每个时刻对应的位置标识值确定该每个时刻的降维子信号的过程,均可以参考图4所示实施例的相关描述,这里不做赘述,与图4所示实施例不同的是,对于图7所示的信号处理装置10,粗判决模块102确定第k时刻对应的位置标识值p_ind_d(k)时采用的均衡子信号是第二均衡信号中包括的第k时刻的均衡子信号2hd_sig(k),粗判决模块102确定第k时刻的降维子信号ld_sig(k)时采用的均衡子信号是第一均衡信号中包括的第k时刻的均衡子信号1hd_sig(k)。在图7所示的信号处理装置10中,对于所述n个时刻中的每个时刻的降维子信号在第二均衡信号中的对应位置,第二均衡信号具有与该对应位置相邻的两个状态位置,该对应位置位于该两个状态位置之间,该对应位置与该两个状态位置之间的欧式距离相等,该两个状态位置中的每个状态位置对应第二均衡信号的一个信号状态,该两个状态位置对应的信号状态不同。In the embodiment of the present application, for the signal processing device 10 shown in FIG. 7 , the rough decision module 102 determining the dimensionality reduction position information according to the equalized signal includes: the rough decision module 102 determining the dimensionality reduction position information according to the second equalized signal. For example, the rough decision module 102 determines the position identification value corresponding to each time point according to the equalized sub-signal at each time point in the n time points included in the second equalized signal. The rough decision module 102 determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: the rough decision module 102 determining the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction location information. For example, the rough decision module 102 determines the dimensionality reduction sub-signal at each time according to the equalization sub-signal at each time in the n time included in the first equalization signal and the position identification value corresponding to each time. Among them, the rough judgment module 102 determines the process of the position identification value corresponding to each moment according to the equalized sub-signal at each moment included in the second equalized signal, and the rough decision module 102 determines the corresponding position identification value according to each moment included in the first equalized signal The process of determining the dimensionality reduction sub-signal at each moment by the equalization sub-signal and the position identification value corresponding to each moment can refer to the relevant description of the embodiment shown in FIG. The difference between the embodiments is that, for the signal processing device 10 shown in FIG. 7 , the equalized sub-signal used when the rough judgment module 102 determines the position identification value p_ind_d(k) corresponding to the k-th moment is the k-th equalized sub-signal included in the second equalized signal The equalized sub-signal 2hd_sig(k) at the moment, the equalized sub-signal adopted when the rough decision module 102 determines the dimensionality reduction sub-signal ld_sig(k) at the kth moment is the equalized sub-signal 1hd_sig( k). In the signal processing device 10 shown in FIG. 7 , for the corresponding position of the dimensionality reduction sub-signal at each of the n times in the second equalized signal, the second equalized signal has a Two state positions, the corresponding position is located between the two state positions, the corresponding position is equal to the Euclidean distance between the two state positions, and each state position in the two state positions corresponds to the second equalization signal A signal state, the signal states corresponding to the two state positions are different.
在本申请实施例中,滤波模块103具有滤波系数,滤波模块103用于根据该滤波系数对粗判决模块102输出的降维信号进行滤波处理,得到滤波信号。其中,该滤波信号中包括所述n个时刻中的各个时刻的滤波子信号。可选地,滤波模块103是后置滤波器。In the embodiment of the present application, the filtering module 103 has a filtering coefficient, and the filtering module 103 is configured to perform filtering processing on the dimensionality reduction signal output by the rough decision module 102 according to the filtering coefficient to obtain a filtered signal. Wherein, the filtered signal includes filtered sub-signals at each of the n times. Optionally, the filtering module 103 is a post filter.
在一种可选实现方式中,滤波模块103用于根据该滤波系数对粗判决模块102输出的降维信号进行滤波处理,包括:滤波模块103根据滤波模块103的滤波系数c、第k时刻的降维子信号ld_sig(k)和第k+1时刻的降维子信号ld_sig(k),采用滤波公式pf(k+1)=ld_sig(k+1)+c×ld_sig(k)确定第k+1时刻的滤波子信号,pf(k+1)表示第k+1时刻的滤波子信号。In an optional implementation, the filtering module 103 is configured to perform filtering processing on the dimensionality reduction signal output by the rough decision module 102 according to the filtering coefficient, including: the filtering module 103 according to the filtering coefficient c of the filtering module 103, the The dimensionality reduction sub-signal ld_sig(k) and the dimensionality reduction sub-signal ld_sig(k) at the k+1th moment, use the filter formula pf(k+1)=ld_sig(k+1)+c×ld_sig(k) to determine the kth The filtered sub-signal at time +1, pf(k+1) represents the filtered sub-signal at time k+1.
在本申请实施例中,MLSE模块104用于确定滤波模块103输出的滤波信号的目标路径分支,在一些实施例中,目标路径分支也被称为最优路径分支或最优序列。滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,在一种可选实现方式中,MLSE模块104具体用于:根据滤波模块103的滤波系数和所述n个时刻中的每个时刻的滤波子信号确定所述每个时刻的分支度量;根据所述n个时刻的分支度量确定滤波信号的目标路径分支。In the embodiment of the present application, the MLSE module 104 is used to determine a target path branch of the filtered signal output by the filtering module 103. In some embodiments, the target path branch is also called an optimal path branch or an optimal sequence. The filtered signal includes filtered sub-signals at each of the n times. In an optional implementation, the MLSE module 104 is specifically configured to: according to the filter coefficient of the filter module 103 and each of the n times The branch metrics at each moment are determined for the filtered sub-signals at n moments; and the target path branch of the filtered signal is determined according to the branch metrics at n moments.
作为一种可选实现方式,MLSE模块104根据滤波模块103的滤波系数和滤波信号的信号状态,确定该滤波信号对应的码本(code book),根据每个时刻的滤波子信号和该滤波信号对应的码本,确定该每个时刻的分支度量,MLSE模块104可以确定出每个时刻的多个分支度量,MLSE模块104可以从每个时刻的多个分支度量中确定目标分支度量(例如最优分支度量),根据该n个时刻的目标分支度量确定滤波信号的目标路径分支。示例地,假设该n个时刻中的每个时刻的分支度量的数量为m,MLSE模块104 从每个时刻的m个分支度量中确定一个目标分支度量,得到n个时刻的n个目标分支度量,MLSE模块104根据该n个目标分支度量确定滤波信号的目标路径分支。As an optional implementation, the MLSE module 104 determines the codebook (code book) corresponding to the filtered signal according to the filter coefficient of the filter module 103 and the signal state of the filtered signal, and according to the filtered sub-signal at each moment and the filtered signal The corresponding codebook determines the branch metrics at each moment, and the MLSE module 104 can determine multiple branch metrics at each moment, and the MLSE module 104 can determine the target branch metric from the multiple branch metrics at each moment (for example, the most optimal branch metric), and determine the target path branch of the filtered signal according to the target branch metric at n moments. Exemplarily, assuming that the number of branch metrics at each of the n moments is m, the MLSE module 104 determines a target branch metric from the m branch metrics at each moment to obtain n target branch metrics at n moments , the MLSE module 104 determines the target path branch of the filtered signal according to the n target branch metrics.
作为另一种可选实现方式,MLSE模块104根据滤波模块103的滤波系数和滤波信号的信号状态,确定该滤波信号对应的码本,根据所述n个时刻中的每个时刻的滤波子信号和该滤波信号对应的码本,确定该每个时刻的分支度量,假设每个时刻的分支度量的数量为m,MLSE模块104可以确定该n个时刻的m×n个分支度量,MLSE模块104对该n个时刻的m×n个分支度量进行组合累加(每个时刻的一个分支度量分别与其他所有时刻的所有分支度量进行累加),并根据累加结果确定目标路径分支。在本申请实施例中,MLSE模块104中可以包括n时刻分支度量计算子模块、累积分支度量计算子模块和最优路径选择子模块(图4和图7中均未示出这些子模块),可以由n时刻分支度量计算子模块确定该n个时刻中的每个时刻的分支度量,由累积分支度量计算子模块对该n个时刻的分支度量进行组合累加,由最优路径选择子模块确定目标路径分支。As another optional implementation, the MLSE module 104 determines the codebook corresponding to the filtered signal according to the filter coefficient of the filtering module 103 and the signal state of the filtered signal, and according to the filtered sub-signal The codebook corresponding to the filtered signal determines the branch metrics at each moment, assuming that the number of branch metrics at each moment is m, the MLSE module 104 can determine m×n branch metrics at the n moments, and the MLSE module 104 Combining and accumulating the m×n branch metrics at n times (a branch metric at each moment is accumulated with all branch metrics at all other times), and determining the target path branch according to the accumulation result. In the embodiment of the present application, the MLSE module 104 may include a branch metric calculation submodule at n time, a cumulative branch metric calculation submodule and an optimal path selection submodule (these submodules are not shown in FIG. 4 and FIG. 7 ), The branch metrics at each of the n moments can be determined by the branch metric calculation submodule at n moments, the branch metrics at the n moments are combined and accumulated by the cumulative branch metric calculation submodule, and determined by the optimal path selection submodule target path branch.
作为本申请实施例的一种示例,初始信号为PAM4信号,滤波信号为OOK信号,滤波信号的信号状态包括-1和1,MLSE模块104根据滤波系数c和滤波信号的信号状态,确定该滤波信号对应的码本包括-1+c、-1-c、1+c和1-c。MLSE模块104根据每个时刻的滤波子信号和该滤波信号对应的码本确定该每个时刻的分支度量包括:MLSE模块104采用分支度量公式metric(k p)=(pf(k)-cb p) 2确定第k时刻的分支度量。其中,metric(k p)表示第k时刻的第p个分支度量,cb p表示该滤波信号对应的码本中的第p个码本,cb p为-1+c、-1-c、1+c和1-c中的一个,pf(k)表示第k时刻的滤波信号。对于每个时刻的滤波信号,MLSE模块104将该每个时刻的滤波信号分别与-1+c、-1-c、1+c和1-c中的每个码本进行计算,因此MLSE模块104可以得到每个时刻的4个分支度量,MLSE模块104可以将每个时刻的4个分支度量中的最小分支度量确定为该每个时刻的目标分支度量。 As an example of the embodiment of the present application, the initial signal is a PAM4 signal, the filtered signal is an OOK signal, the signal state of the filtered signal includes -1 and 1, and the MLSE module 104 determines the filter coefficient c according to the signal state of the filtered signal. The codebook corresponding to the signal includes -1+c, -1-c, 1+c and 1-c. The MLSE module 104 determines the branch metric at each moment according to the filtered sub-signal at each moment and the codebook corresponding to the filtered signal includes: the MLSE module 104 adopts the branch metric formula metric(k p )=(pf(k)-cb p ) 2 Determine the branch metric at the kth moment. Among them, metric(k p ) represents the p-th branch metric at the k-th moment, cb p represents the p-th codebook in the codebook corresponding to the filtered signal, and cb p is -1+c, -1-c, 1 One of +c and 1-c, pf(k) represents the filtered signal at the kth moment. For the filtered signal at each moment, the MLSE module 104 calculates the filtered signal at each moment with each codebook in -1+c, -1-c, 1+c and 1-c, so the MLSE module 104 may obtain the 4 branch metrics at each moment, and the MLSE module 104 may determine the minimum branch metric among the 4 branch metrics at each moment as the target branch metric at each moment.
在本申请实施例中,假设降维信号的信号状态的数量为M,滤波模块103的阶数为L,则MLSE模块104的算法复杂度可以为M L。对于均衡信号是PAM4信号的情况,降维信号可以是OOK信号,则MLSE模块104的算法复杂度可以为2 LIn the embodiment of the present application, assuming that the number of signal states of the dimensionality reduction signal is M, and the order of the filtering module 103 is L, the algorithm complexity of the MLSE module 104 may be M L . For the case where the equalized signal is a PAM4 signal, the dimensionality reduction signal may be an OOK signal, and the algorithm complexity of the MLSE module 104 may be 2 L .
在本申请实施例中,目标路径分支中包括所述n个时刻中的各个时刻的判决值,每个时刻的判决值是MLSE模块104基于该每个时刻的滤波子信号获得的。例如,每个时刻的判决值可以是根据该每个时刻的目标分支度量进行判决获得的。其中,目标路径分支中的判决值可以是硬值或软值,每个时刻的硬值(即判决值)为-1或1,表示MLSE模块104判决出该每个时刻的信号为-1或1,则目标路径分支是由-1和1构成的长度为n的目标序列。软值为概率比值,又称对数似然比(likelihood rate,LLR)值,每个时刻的软值(即判决值)为该每个时刻的信号为1的概率与该每个时刻的信号为-1的概率的比值(分子是信号为1的概率,分母是信号为-1的概率)。硬值对应的算法为viterbi算法,即MLSE模块104采用viterbi算法时MLSE模块104输出的目标路径分支中的判决值为硬值。软值对应的算法可以是BCJR(Bahl,Cocke Jelinek和Raviv)算法或软输出viterbi算法(soft output viterbi algorithm,SOVA),即MLSE模块104采用BCJR算法或SOVA时MLSE模块104输出的目标路径分支中的判决值为软值。In this embodiment of the present application, the target path branch includes decision values at each of the n times, and the decision value at each moment is obtained by the MLSE module 104 based on the filtered sub-signal at each moment. For example, the decision value at each moment may be obtained by making a decision according to the target branch metric at each moment. Wherein, the decision value in the target path branch can be a hard value or a soft value, and the hard value (that is, the decision value) at each moment is -1 or 1, indicating that the MLSE module 104 judges that the signal at each moment is -1 or 1, the target path branch is a target sequence of length n consisting of -1 and 1. The soft value is the probability ratio, also known as the logarithmic likelihood ratio (likelihood rate, LLR) value, the soft value (that is, the decision value) at each moment is the probability that the signal at each moment is 1 and the signal at each moment The ratio of the probabilities of being -1 (the numerator is the probability that the signal is 1, and the denominator is the probability that the signal is -1). The algorithm corresponding to the hard value is the viterbi algorithm, that is, when the MLSE module 104 adopts the viterbi algorithm, the decision value in the target path branch output by the MLSE module 104 is a hard value. The algorithm corresponding to the soft value can be BCJR (Bahl, Cocke Jelinek and Raviv) algorithm or soft output viterbi algorithm (soft output viterbi algorithm, SOVA), that is, in the target path branch of MLSE module 104 output when MLSE module 104 adopts BCJR algorithm or SOVA The judgment value of is a soft value.
在本申请实施例中,MLSE模块104输出的目标路径分支(即滤波信号的目标路径分支)中包括所述n个时刻中的各个时刻的判决值,映射模块105根据降维位置信息对滤波信号的目标路径分支进行映射得到目标信号,该目标信号中包括该n个时刻中的各个时刻 的目标子信号。映射模块105具体用于:根据所述n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号;根据该n个时刻的目标子信号确定目标信号。例如,映射模块105将该n个时刻的目标子信号整体确定为目标信号。In the embodiment of the present application, the target path branch output by the MLSE module 104 (that is, the target path branch of the filtered signal) includes the decision values at each of the n moments, and the mapping module 105 performs a process of filtering the filtered signal according to the dimensionality reduction position information The target path branch of is mapped to obtain the target signal, and the target signal includes target sub-signals at each of the n time points. The mapping module 105 is specifically used to: determine the target sub-signal at each time according to the decision value at each time in the n times and the position identification value corresponding to each time; Signal identifies the target signal. For example, the mapping module 105 determines the target sub-signals at n times as a whole as the target signal.
如前所述,目标路径分支中的判决值可以为硬值或软值。在本申请实施例中,根据目标路径分支中的判决值的类型(硬值或软值)的不同,映射模块105根据降维位置信息对滤波信号的目标路径分支进行映射的方式不同。下面以目标路径分支中的判决值为硬值或软值,分别介绍映射模块105对滤波信号的目标路径分支进行映射的实现方式。As mentioned above, the decision value in the target path branch can be hard value or soft value. In the embodiment of the present application, according to the type of the decision value (hard value or soft value) in the target path branch, the mapping module 105 maps the target path branch of the filtered signal according to the dimensionality reduction position information in different ways. The implementation manners of mapping the target path branch of the filtered signal by the mapping module 105 are respectively introduced below by taking the decision value of the target path branch as a hard value or a soft value.
在一种可选实现方式中,目标路径分支中的判决值为硬值,映射模块105具体用于:将所述n个时刻中的每个时刻的判决值与该每个时刻对应的位置标识值之和,确定为该每个时刻的目标子信号。例如,映射模块105采用映射公式hd_out(k)=ld_out(k)+p_ind_d(k)确定第k时刻的目标子信号。hd_out(k)表示第k时刻的目标子信号,ld_out(k)表示第k时刻的判决值,p_ind_d(k)表示第k时刻对应的位置标识值。In an optional implementation manner, the decision value in the target path branch is a hard value, and the mapping module 105 is specifically configured to: identify the decision value at each moment in the n moments with the position corresponding to each moment The sum of values is determined as the target sub-signal at each moment. For example, the mapping module 105 uses the mapping formula hd_out(k)=ld_out(k)+p_ind_d(k) to determine the target sub-signal at the kth moment. hd_out(k) represents the target sub-signal at the kth moment, ld_out(k) represents the decision value at the kth moment, and p_ind_d(k) represents the position identification value corresponding to the kth moment.
作为一种示例,假设ld_out(k)=-1,p_ind_d(k)=-2,则hd_out(k)=-1+(-2)=-3。假设ld_out(k)=-1,p_ind_d(k)=0,则hd_out(k)=-1+0=-1。假设ld_out(k)=1,p_ind_d(k)=0,则hd_out(k)=1+0=1。假设ld_out(k)=1,p_ind_d(k)=2,则hd_out(k)=1+2=3。As an example, assuming ld_out(k)=-1, p_ind_d(k)=-2, then hd_out(k)=-1+(-2)=-3. Suppose ld_out(k)=-1, p_ind_d(k)=0, then hd_out(k)=-1+0=-1. Suppose ld_out(k)=1, p_ind_d(k)=0, then hd_out(k)=1+0=1. Suppose ld_out(k)=1, p_ind_d(k)=2, then hd_out(k)=1+2=3.
在另一种可选实现方式中,目标路径分支中的判决值为软值,映射模块105具体用于:根据所述n个时刻中的每个时刻对应的位置标识值,确定该每个时刻对应的映射规则;根据该每个时刻的判决值和该每个时刻对应的映射规则,确定该每个时刻的目标子信号。In another optional implementation manner, the decision value in the target path branch is a soft value, and the mapping module 105 is specifically configured to: determine the value at each time point according to the position identification value corresponding to each time point in the n time points A corresponding mapping rule: determine the target sub-signal at each time according to the decision value at each time and the corresponding mapping rule at each time.
以均衡信号是PAM4信号为例,降维信号可以是OOK信号,均衡信号的信号状态包括-3、-1、1和3,降维信号的信号状态包括-1和1,位置标识值包括-2、0和2。当p_ind_d(k)=-2时,映射规则可以为hd_out(k)=[max,-ld_out(k)]。当p_ind_d(k)=0时,映射规则可以为hd_out(k)=[ld_out(k),max]。当p_ind_d(k)=2时,映射规则可以为hd_out(k)=[-max,ld_out(k)]。其中,p_ind_d(k)为第k时刻对应的位置标识值,ld_out(k)为第k时刻的判决值,hd_out(k)为第k时刻的目标子信号,max为常数,k为不大于n的正整数,在映射规则的表述[A,B]中,A为目标子信号的高位比特,B为目标子信号的低位比特。当判决值为软值时,映射规则也可以如图8所示。Taking the balanced signal as a PAM4 signal as an example, the dimensionality reduction signal can be an OOK signal. The signal states of the balanced signal include -3, -1, 1, and 3, the signal states of the dimensionality reduction signal include -1 and 1, and the location identifier values include - 2, 0 and 2. When p_ind_d(k)=-2, the mapping rule may be hd_out(k)=[max, -ld_out(k)]. When p_ind_d(k)=0, the mapping rule may be hd_out(k)=[ld_out(k), max]. When p_ind_d(k)=2, the mapping rule may be hd_out(k)=[-max, ld_out(k)]. Among them, p_ind_d(k) is the position identification value corresponding to the kth moment, ld_out(k) is the judgment value at the kth moment, hd_out(k) is the target sub-signal at the kth moment, max is a constant, and k is not greater than n A positive integer of , in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal. When the judgment value is a soft value, the mapping rule may also be as shown in FIG. 8 .
示例地,假设第k时刻对应的位置标识值p_ind_d(k)=-2,则映射模块105确定第k时刻对应的映射规则为hd_out(k)=[max,-ld_out(k)],映射模块105根据第k时刻的判决值和第k时刻的对应的映射规则hd_out(k)=[max,-ld_out(k)],确定第k时刻的目标子信号。假设第k时刻对应的位置标识值p_ind_d(k)=0,则映射模块105确定第k时刻对应的映射规则为hd_out(k)=[ld_out(k),max],映射模块105根据第k时刻的判决值和第k时刻的对应的映射规则hd_out(k)=[ld_out(k),max],确定第k时刻的目标子信号。假设第k时刻对应的位置标识值p_ind_d(k)=2,则映射模块105确定第k时刻对应的映射规则为hd_out(k)=[-max,ld_out(k)],映射模块105根据第k时刻的判决值和第k时刻的对应的映射规则hd_out(k)=[-max,ld_out(k)],确定第k时刻的目标子信号。Exemplarily, assuming that the position identifier value p_ind_d(k)=-2 corresponding to the kth moment, the mapping module 105 determines that the mapping rule corresponding to the kth moment is hd_out(k)=[max,-ld_out(k)], and the mapping module 105 Determine the target sub-signal at the kth moment according to the decision value at the kth moment and the corresponding mapping rule hd_out(k)=[max, -ld_out(k)] at the kth moment. Assuming that the position identification value p_ind_d(k)=0 corresponding to the kth moment, the mapping module 105 determines that the mapping rule corresponding to the kth moment is hd_out(k)=[ld_out(k), max], and the mapping module 105 according to the kth moment The decision value of and the corresponding mapping rule hd_out(k)=[ld_out(k), max] at the kth moment determine the target sub-signal at the kth moment. Assuming that the position identifier value p_ind_d(k)=2 corresponding to the kth moment, the mapping module 105 determines that the mapping rule corresponding to the kth moment is hd_out(k)=[-max, ld_out(k)], and the mapping module 105 according to the kth The decision value at time and the corresponding mapping rule hd_out(k)=[-max, ld_out(k)] at time k to determine the target sub-signal at time k.
根据上述两种映射方式的介绍可知,在目标路径分支中的判决值为硬值时,目标信号的各个信号状态与均衡信号的各个信号状态相同,在目标路径分支中的判决值为软值时,目标信号的各个信号状态与均衡信号的各个信号状态对应。According to the introduction of the above two mapping methods, it can be seen that when the decision value in the target path branch is a hard value, each signal state of the target signal is the same as that of the equalized signal, and when the decision value in the target path branch is a soft value , each signal state of the target signal corresponds to each signal state of the equalized signal.
作为本申请实施例的可选实现方式,图9是本申请实施例提供的再一种信号处理装置10的结构示意图,图10是本申请实施例提供的又一种信号处理装置10的结构示意图。如图9 和图10所示,该信号处理装置10还包括自相关估计模块106。自相关估计模块106分别与均衡模块101、滤波模块103和MLSE模块104连接。例如,自相关估计模块106的输入端与均衡模块101的输出端连接,自相关估计模块106的输出端分别与滤波模块103的输入端和MLSE模块104的输入端连接。对于图9所示的信号处理装置10,自相关估计模块106的输入端与均衡模块101的输出端连接,对于图10所示的信号处理装置10,自相关估计模块106的输入端与第一均衡子模块1011的输出端连接。其中,自相关估计模块106用于根据均衡信号确定滤波模块103的滤波系数,并向滤波模块103和MLSE模块104分别提供该滤波系数,使得滤波模块103根据该滤波系数对降维信号进行滤波处理,以及,MLSE模块104根据该滤波系数确定该滤波信号的目标路径分支。可选地,自相关估计模块106根据均衡信号(在图10所示的信号处理装置10中具体是第一均衡子模块1011输出的第一均衡信号)的信号特征计算滤波模块103的滤波系数。均衡信号(在图10所示的信号处理装置10中具体是第一均衡子模块1011输出的第一均衡信号)中的噪声为有色噪声,自相关估计模块106可以计算有色噪声的相关性,根据有色噪声的相关性确定滤波系数。As an optional implementation of the embodiment of the present application, FIG. 9 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application, and FIG. 10 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application. . As shown in FIG. 9 and FIG. 10 , the signal processing device 10 further includes an autocorrelation estimation module 106 . The autocorrelation estimation module 106 is connected to the equalization module 101 , the filtering module 103 and the MLSE module 104 respectively. For example, the input terminal of the autocorrelation estimation module 106 is connected to the output terminal of the equalization module 101 , and the output terminal of the autocorrelation estimation module 106 is respectively connected to the input terminal of the filtering module 103 and the input terminal of the MLSE module 104 . For the signal processing device 10 shown in Figure 9, the input end of the autocorrelation estimation module 106 is connected to the output end of the equalization module 101, and for the signal processing device 10 shown in Figure 10, the input end of the autocorrelation estimation module 106 is connected to the first The output end of the equalization sub-module 1011 is connected. Among them, the autocorrelation estimation module 106 is used to determine the filter coefficient of the filter module 103 according to the equalized signal, and provide the filter coefficient to the filter module 103 and the MLSE module 104 respectively, so that the filter module 103 performs filtering processing on the dimensionality reduction signal according to the filter coefficient , and, the MLSE module 104 determines the target path branch of the filtered signal according to the filter coefficient. Optionally, the autocorrelation estimation module 106 calculates the filter coefficient of the filtering module 103 according to the signal characteristics of the equalized signal (specifically, the first equalized signal output by the first equalization sub-module 1011 in the signal processing device 10 shown in FIG. 10 ). The noise in the equalized signal (specifically the first equalized signal output by the first equalized sub-module 1011 in the signal processing device 10 shown in FIG. 10 ) is colored noise, and the autocorrelation estimation module 106 can calculate the correlation of the colored noise, according to The correlation of colored noise determines the filter coefficients.
作为本申请实施例的可选实现方式,图11是本申请实施例提供的又一种信号处理装置10的结构示意图,图12是本申请实施例提供的又一种信号处理装置10的结构示意图。如图11和图12所示,该信号处理装置10还包括译码模块107。译码模块107与映射模块105连接,例如,译码模块107的输入端与映射模块105的输出端连接。译码模块107用于对映射模块105输出的目标信号进行译码,以恢复出数据。其中,译码模块107可以包括FEC译码器,且译码模块107还可以包括其他的译码器,本申请实施例对此不作限定。As an optional implementation of the embodiment of the present application, Fig. 11 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application, and Fig. 12 is a schematic structural diagram of another signal processing device 10 provided in the embodiment of the present application . As shown in FIG. 11 and FIG. 12 , the signal processing device 10 further includes a decoding module 107 . The decoding module 107 is connected to the mapping module 105 , for example, an input terminal of the decoding module 107 is connected to an output terminal of the mapping module 105 . The decoding module 107 is used for decoding the target signal output by the mapping module 105 to restore the data. Wherein, the decoding module 107 may include an FEC decoder, and the decoding module 107 may also include other decoders, which is not limited in this embodiment of the present application.
其中,译码模块107恢复出数据可以是0和1构成的序列。示例地,映射模块105输出的目标信号的信号状态包括-3、-1、1和3,如图4和图8所示,-3对应的比特符号为00,-1对应的比特符号为01,1对应的比特符号为11,3对应的比特符号为10,假设映射模块105输出的目标信号依次为3、-1、1、3、-3、-1,则译码模块107根据目标信号的信号状态与比特符号的对应关系,恢复出数据为100111100001。Wherein, the data recovered by the decoding module 107 may be a sequence composed of 0 and 1. For example, the signal state of the target signal output by the mapping module 105 includes -3, -1, 1 and 3, as shown in Figure 4 and Figure 8, the bit symbol corresponding to -3 is 00, and the bit symbol corresponding to -1 is 01 , the bit symbol corresponding to 1 is 11, the bit symbol corresponding to 3 is 10, assuming that the target signal output by the mapping module 105 is 3, -1, 1, 3, -3, -1 in turn, then the decoding module 107 according to the target signal The corresponding relationship between the signal state and the bit symbol, the recovered data is 100111100001.
前述实施例以初始信号是实数信号为例说明,初始信号还可以是复数信号。如果初始信号是复数信号,则均衡信号、降维信号、滤波信号等均是复数信号。对于初始信号是复数信号的情况,每个时刻对应的位置标识值为复数,粗判决模块102确定每个时刻对应的位置标识值时,根据该每个时刻的均衡子信号的实部确定该每个时刻对应的位置标识值的实部,根据该每个时刻的均衡子信号的虚部确定该每个时刻对应的位置标识值的虚部。粗判决模块102确定每个时刻的降维子信号时,根据该每个时刻的均衡子信号的实部以及该每个时刻对应的位置标识值的实部,确定该每个时刻的降维子信号的实部,根据该每个时刻的均衡子信号的虚部以及该每个时刻对应的位置标识值的虚部,确定该每个时刻的降维子信号的虚部。粗判决模块102确定每个时刻对应的位置标识值的实部的实现过程,粗判决模块102确定该每个时刻对应的位置标识值的虚部的实现过程,粗判决模块102确定该每个时刻的降维子信号的实部的实现过程,以及,粗判决模块102确定该每个时刻的降维子信号的虚部的实现过程,均可以参考初始信号是实数信号的情况,这里不再赘述。The foregoing embodiments are described by taking the initial signal as a real number signal as an example, and the initial signal may also be a complex number signal. If the initial signal is a complex signal, then the equalized signal, the dimensionality reduction signal, the filtered signal, etc. are all complex signals. For the situation that the initial signal is a complex signal, the position identification value corresponding to each moment is a complex number. The real part of the position identification value corresponding to each time instant, and the imaginary part of the position identification value corresponding to each time instant is determined according to the imaginary part of the equalized sub-signal at each time instant. When the rough judgment module 102 determines the dimensionality reduction sub-signal at each moment, it determines the dimensionality reduction sub-signal at each moment according to the real part of the equalization sub-signal at each moment and the real part of the position identification value corresponding to each moment. For the real part of the signal, the imaginary part of the dimensionality reduction sub-signal at each time is determined according to the imaginary part of the balanced sub-signal at each time and the imaginary part of the position identification value corresponding to each time. The rough judgment module 102 determines the realization process of the real part of the position identification value corresponding to each moment, the rough judgment module 102 determines the realization process of the imaginary part of the position identification value corresponding to each moment, and the rough judgment module 102 determines the realization process of the imaginary part of the position identification value corresponding to each moment. The realization process of the real part of the dimensionality reduction sub-signal, and the realization process of the imaginary part of the dimensionality reduction sub-signal determined by the rough decision module 102 at each moment, can refer to the situation that the initial signal is a real number signal, and will not be repeated here .
示例地,请参考图13,其示出了本申请实施例提供的一种信号处理过程的示意图,图13以信号处理装置是图4所示的信号处理装置10,且以初始信号是复数信号为例说明。如图13所示,均衡模块101对输入均衡模块101的初始信号进行均衡处理得到均衡信号hd_sig,均衡信号hd_sig为复数信号,均衡信号hd_sig的信号状态的数目为36。均衡模块 101将均衡信号hd_sig输出至粗判决模块102。粗判决模块102根据均衡信号hd_sig确定降维位置信息p_ind_d和降维信号ld_sig,降维位置信息p_ind_d为复数,降维信号ld_sig为复数信号,降维信号ld_sig的信号状态的数目为4。粗判决模块102通过第一输出端a1将降维信号ld_sig输出至滤波模块103,通过第二输出端a2将降维位置信息p_ind_d输出至映射模块105。For example, please refer to FIG. 13, which shows a schematic diagram of a signal processing process provided by the embodiment of the present application. In FIG. 13, the signal processing device is the signal processing device 10 shown in FIG. 4, and the initial signal is a complex signal As an example. As shown in FIG. 13 , the equalization module 101 equalizes the initial signal input to the equalization module 101 to obtain an equalized signal hd_sig. The equalized signal hd_sig is a complex signal, and the number of signal states of the equalized signal hd_sig is 36. The equalization module 101 outputs the equalized signal hd_sig to the coarse decision module 102. The rough judgment module 102 determines the dimensionality reduction position information p_ind_d and the dimensionality reduction signal ld_sig according to the equalization signal hd_sig, the dimensionality reduction position information p_ind_d is a complex number, the dimensionality reduction signal ld_sig is a complex signal, and the number of signal states of the dimensionality reduction signal ld_sig is 4. The rough decision module 102 outputs the dimensionality reduction signal ld_sig to the filtering module 103 through the first output terminal a1, and outputs the dimensionality reduction position information p_ind_d to the mapping module 105 through the second output terminal a2.
滤波模块103对降维信号ld_sig进行滤波处理得到滤波信号,并将滤波信号输出至MLSE模块104。图13中虽未示出滤波信号,但是可以理解,滤波信号为复数信号,滤波信号的信号状态的数目为4。MLSE模块104确定滤波信号的目标路径分支ld_out,并向映射模块105输出滤波信号的目标路径分支ld_out,目标路径分支ld_out为复数信号,目标路径分支ld_out的信号状态的数目为4。映射模块105根据降维位置信息p_ind_d对滤波信号的目标路径分支进行映射得到目标信号hd_out,目标信号hd_out为复数信号,目标信号hd_out的信号状态的数目为36。在图13中。黑色小圆点表示信号状态,较大的圆点表示最有可能的信号状态。The filtering module 103 performs filtering processing on the dimensionality reduction signal ld_sig to obtain a filtered signal, and outputs the filtered signal to the MLSE module 104 . Although the filtered signal is not shown in FIG. 13 , it can be understood that the filtered signal is a complex signal, and the number of signal states of the filtered signal is four. The MLSE module 104 determines the target path branch ld_out of the filtered signal, and outputs the target path branch ld_out of the filtered signal to the mapping module 105, the target path branch ld_out is a complex signal, and the number of signal states of the target path branch ld_out is four. The mapping module 105 maps the target path branch of the filtered signal according to the dimensionality reduction position information p_ind_d to obtain the target signal hd_out, the target signal hd_out is a complex signal, and the number of signal states of the target signal hd_out is 36. In Figure 13. Small black dots indicate the signal state, and larger dots indicate the most likely signal state.
下面结合附图对本申请实施例提供的技术方案中,信号的功率与BER进行说明。The signal power and BER in the technical solutions provided by the embodiments of the present application will be described below with reference to the accompanying drawings.
示例地,请参考图14,其示出了本申请实施例提供的一种信号的功率与BER的关系图。在图14中,曲线1、曲线2、曲线3、曲线4和曲线5中的各个曲线对应的信号处理装置中,均衡模块101中仅包括FFE。曲线1为FFE输出的均衡信号的功率与BER的关系图。曲线2为MLSE模块采用viterbi算法且信号处理装置中不包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图。曲线3为MLSE模块采用viterbi算法且信号处理装置中包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图(例如图4、图9或图11中MLSE模块104输出的信号的功率与BER的关系图)。曲线4为MLSE模块采用BCIJ算法且信号处理装置中不包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图。曲线5为MLSE模块采用BCIJ算法且信号处理装置中包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图(例如图4、图9或图11中MLSE模块104输出的信号的功率与BER的关系图)。从图14中可以看出,曲线2的走势与曲线3的走势相同,且曲线2与曲线3之间的距离较小,曲线4的走势与曲线5的走势相同,且曲线4与曲线5之间的距离较小,因此可以确定MLSE模块基于降维信号输出的信号的性能与信号处理装置中包括不粗判决模块时MLSE模块输出的信号性能相当。For example, please refer to FIG. 14 , which shows a relationship diagram between signal power and BER provided by an embodiment of the present application. In FIG. 14 , in the signal processing device corresponding to each of curves 1, 2, 3, 4 and 5, the equalization module 101 only includes FFE. Curve 1 is a relationship diagram between the power of the equalized signal output by the FFE and the BER. Curve 2 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device does not include a rough decision module. Curve 3 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device includes a rough decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 4, Fig. 9 or Fig. 11 BER diagram). Curve 4 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the BCIJ algorithm and the signal processing device does not include a rough decision module. Curve 5 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the BCIJ algorithm and the signal processing device includes a coarse decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 4, Fig. 9 or Fig. 11 BER diagram). It can be seen from Figure 14 that the trend of curve 2 is the same as that of curve 3, and the distance between curve 2 and curve 3 is small, the trend of curve 4 is the same as that of curve 5, and the distance between curve 4 and curve 5 is the same. The distance between is small, so it can be determined that the performance of the signal output by the MLSE module based on the dimensionality reduction signal is comparable to the signal performance of the signal output by the MLSE module when the non-rough decision module is included in the signal processing device.
示例地,请参考图15,其示出了本申请实施例提供的另一种信号的功率与BER的关系图。在图15中,曲线1、曲线2和曲线4对应的信号处理装置中均衡模块101中仅包括FFE,曲线3对应的信号处理装置中均衡模块101中包括FFE和DFE。曲线1为FFE输出的均衡信号的功率与BER的关系图。曲线2为MLSE模块采用viterbi算法且信号处理装置中包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图(例如图4、图9或图11中MLSE模块104输出的信号的功率与BER的关系图)。曲线3为MLSE模块采用viterbi算法且信号处理装置中包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图(例如图7、图10或图12中MLSE模块104输出的信号的功率与BER的关系图)。曲线4为MLSE模块采用的viterbi算法且信号处理装置中不包括粗判决模块时MLSE模块输出的信号的功率与BER的关系图。从图15中可以看出,曲线3的走势与曲线4的走势相同,且曲线3与曲线4之间的距离较小,因此可以确定:均衡模块101中包括FFE和DFE时,MLSE模块基于降维信号输出的信号的性能与信号处理装置中包括不粗判决模块时MLSE模块输出的信号性能相当。曲线2的走势与曲线3的走势的差异较大,因此可以确定:均衡模块101中包括FFE和 DFE时MLSE模块基于降维信号输出的信号比均衡模块101中仅包括FFE时MLSE模块基于降维信号输出的信号的性能好。As an example, please refer to FIG. 15 , which shows a relationship diagram between power and BER of another signal provided by an embodiment of the present application. In FIG. 15 , the equalization module 101 of the signal processing device corresponding to curve 1 , curve 2 and curve 4 includes only FFE, and the equalization module 101 of the signal processing device corresponding to curve 3 includes FFE and DFE. Curve 1 is a relationship diagram between the power of the equalized signal output by the FFE and the BER. Curve 2 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device includes a rough decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 4, Fig. 9 or Fig. 11 BER diagram). Curve 3 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the MLSE module adopts the viterbi algorithm and the signal processing device includes a rough decision module (such as the power and BER of the signal output by the MLSE module 104 in Fig. 7, Fig. 10 or Fig. 12 BER diagram). Curve 4 is a relationship diagram between the power of the signal output by the MLSE module and the BER when the viterbi algorithm adopted by the MLSE module is not included in the signal processing device. It can be seen from Fig. 15 that the trend of curve 3 is the same as that of curve 4, and the distance between curve 3 and curve 4 is small, so it can be determined that: when the equalization module 101 includes FFE and DFE, the MLSE module is based on the reduction The performance of the signal output by the dimensional signal is equivalent to the signal performance of the signal output by the MLSE module when the signal processing device includes the non-coarse judgment module. The trend of curve 2 is quite different from the trend of curve 3, so it can be determined that when the equalization module 101 includes FFE and DFE, the signal output by the MLSE module based on the dimensionality reduction signal is higher than that when the equalization module 101 only includes FFE, and the MLSE module is based on dimensionality reduction The performance of the signal output signal is good.
在本申请实施例中,图7、图10和图12的信号处理装置10可以应用于大带限场景中。大带限场景中采用图7、图10和图12的信号处理装置10,可以使得粗判决模块102输出的低维信号的信号状态较少时,保证粗判决模块102判决的结果的准确性。In the embodiment of the present application, the signal processing apparatus 10 shown in FIG. 7 , FIG. 10 and FIG. 12 may be applied in a scenario with a large bandwidth limit. Using the signal processing device 10 in FIG. 7 , FIG. 10 and FIG. 12 in a large band-limit scenario can ensure the accuracy of the decision result of the rough decision module 102 when the signal state of the low-dimensional signal output by the rough decision module 102 is small.
综上所述,本申请实施例提供的信号处理装置,均衡模块对初始信号进行均衡处理得到均衡信号,粗判决模块根据均衡信号确定降维位置信息和降维信号,并将降维位置信息输出至映射模块,将降维信号输出至滤波模块,滤波模块对降维信号进行滤波得到滤波信号,并将滤波信号输出至MLSE模块,MLSE模块确定滤波信号的目标路径分支,并将滤波信号的目标路径分支输出至映射模块,映射模块根据降维位置信息对滤波信号的目标路径分支进行映射得到目标信号。由于降维信号与调制格式无关,降维信号的信号状态的数目小于均衡信号的信号状态的数目,滤波信号的信号状态的数目等于降维信号的信号状态的数目,因此输入MLSE模块的滤波信号的信号状态的数目小于均衡模块输出的均衡信号的信号状态的数目,且滤波信号与调制格式无关,使得MLSE模块确定目标路径分支的过程中所需计算的路径分支较少,且MLSE模块确定目标路径分支的过程与调制格式无关,有助于降低MLSE模块的算法复杂度,降低MLSE模块的资源消耗。In summary, in the signal processing device provided by the embodiment of the present application, the equalization module performs equalization processing on the initial signal to obtain an equalized signal, and the rough decision module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, and outputs the dimensionality reduction position information To the mapping module, output the dimension reduction signal to the filter module, the filter module filters the dimension reduction signal to obtain the filter signal, and outputs the filter signal to the MLSE module, the MLSE module determines the target path branch of the filter signal, and the target path of the filter signal The path branch is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. Since the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module The number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and the MLSE module determines the target path branch The path branching process has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
本申请实施例提供的信号处理装置中,滤波模块和MLSE模块处理的信号均是降维后的信号,降维后的信号的信号状态的数目较少,信号的位宽较低,有助于降低滤波模块和MLSE模块的资源消耗。另外,降维后的信号可以是最低维度的信号(例如OOK信号或QPSK信号),因此滤波模块的处理过程和MLSE模块的处理过程均与调制格式无关,进一步降低滤波模块和MLSE模块的资源消耗。经过实验确定,相比于传统的技术方案,本申请实施例提供的信号处理装置中的MLSE模块的资源消耗可以降低30%,电路面积可以降低50%。该信号处理装置是强度调制装置或相位调制装置,但不限于此,初始信号的维度越高(信号状态的数目越大),该信号处理装置在降低资源消耗方面的效果越明显。In the signal processing device provided by the embodiment of the present application, the signals processed by the filtering module and the MLSE module are both dimension-reduced signals, the number of signal states of the dimension-reduced signal is small, and the bit width of the signal is low, which helps Reduce resource consumption of filtering module and MLSE module. In addition, the signal after dimensionality reduction can be the signal of the lowest dimension (such as OOK signal or QPSK signal), so the processing process of the filtering module and the processing process of the MLSE module have nothing to do with the modulation format, further reducing the resource consumption of the filtering module and MLSE module . It is determined through experiments that, compared with the traditional technical solution, the resource consumption of the MLSE module in the signal processing device provided by the embodiment of the present application can be reduced by 30%, and the circuit area can be reduced by 50%. The signal processing device is an intensity modulation device or a phase modulation device, but is not limited thereto. The higher the dimension of the initial signal (the larger the number of signal states), the more obvious the effect of the signal processing device in reducing resource consumption.
以上是对本申请装置实施例的介绍,下面介绍本申请的方法实施例。The above is the introduction to the embodiment of the device of the present application, and the following describes the embodiment of the method of the present application.
示例地,请参考图16,其示出了本申请实施例提供的一种信号处理方法的流程图。该信号处理方法可以应用于前述实施例提供的信号处理装置。该信号处理装置包括依次连接的均衡模块、粗判决模块、滤波模块、MLSE模块和映射模块,粗判决模块还与映射模块连接。如图16所示,该方法包括:For example, please refer to FIG. 16 , which shows a flowchart of a signal processing method provided by an embodiment of the present application. The signal processing method may be applied to the signal processing apparatus provided in the foregoing embodiments. The signal processing device includes an equalization module, a rough judgment module, a filter module, an MLSE module and a mapping module connected in sequence, and the rough judgment module is also connected with the mapping module. As shown in Figure 16, the method includes:
S1601.均衡模块对输入均衡模块的初始信号进行均衡处理,得到均衡信号。S1601. The equalization module performs equalization processing on the initial signal input to the equalization module to obtain an equalized signal.
初始信号是实数信号或复数信号,相应地,均衡信号是实数信号或复数信号。例如,初始信号是PAM信号,则均衡信号是PAM信号。再例如,初始信号是QAM信号,则均衡信号是QAM信号。均衡信号无ISI且非线性,但是该均衡信号中包含有色噪声。The initial signal is a real signal or a complex signal, and correspondingly, the equalized signal is a real signal or a complex signal. For example, if the initial signal is a PAM signal, then the equalized signal is a PAM signal. For another example, if the initial signal is a QAM signal, then the equalized signal is a QAM signal. The equalized signal has no ISI and is non-linear, but the equalized signal contains colored noise.
可选地,均衡模块包括第一均衡子模块和第二均衡子模块,第一均衡子模块、第二均衡子模块和粗判决模块依次连接,第一均衡子模块还与粗判决模块连接。均衡模块对输入均衡模块的初始信号进行均衡处理,得到均衡信号,包括:第一均衡子模块对初始信号进行第一均衡处理,得到第一均衡信号;第二均衡子模块对第一均衡信号进行第二均衡处理,得到第二均衡信号。其中,均衡模块输出的均衡信号第一均衡信号和第二均衡信号,第一均衡信号和第二均衡信号分别包括n个时刻中的各个时刻的均衡子信号。Optionally, the equalization module includes a first equalization submodule and a second equalization submodule, the first equalization submodule, the second equalization submodule and the rough decision module are connected in sequence, and the first equalization submodule is also connected with the rough decision module. The equalization module equalizes the initial signal input to the equalization module to obtain an equalized signal, including: the first equalization sub-module performs first equalization processing on the initial signal to obtain the first equalized signal; the second equalization sub-module performs equalization on the first equalized signal second equalization processing to obtain a second equalization signal. Wherein, the equalized signals output by the equalized module are the first equalized signal and the second equalized signal, and the first equalized signal and the second equalized signal respectively include equalized sub-signals at each of the n times.
S1602.粗判决模块根据均衡信号确定降维位置信息和降维信号,降维信号的信号状态的数目小于均衡信号的信号状态的数目,降维信号中包括n个时刻中的各个时刻的降维子信号,降维信号与调制格式无关,降维位置信息包括该n个时刻中的各个时刻对应的位置标识值,每个时刻对应的位置标识值用于指示该每个时刻的降维子信号在均衡信号中的对应位置。S1602. The rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the balanced signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the balanced signal, and the dimensionality reduction signal includes the dimensionality reduction at each moment in the n moments The sub-signal, the dimension reduction signal has nothing to do with the modulation format, the dimension reduction position information includes the position identification value corresponding to each time in the n times, and the position identification value corresponding to each time is used to indicate the dimension reduction sub-signal at each time corresponding position in the equalized signal.
其中,当均衡信号是实数信号时,降维信号是实数信号。当均衡信号是复数信号时,降维信号是复数信号。例如,均衡信号是PAM信号,降维信号是OOK信号。再例如,均衡信号是QAM信号,降维信号是QPSK信号。Wherein, when the equalized signal is a real signal, the dimensionality reduction signal is a real signal. When the equalized signal is a complex signal, the dimensionality-reduced signal is a complex signal. For example, the equalization signal is a PAM signal, and the dimensionality reduction signal is an OOK signal. For another example, the equalized signal is a QAM signal, and the dimensionality reduction signal is a QPSK signal.
其中,对于所述n个时刻中的每个时刻的降维子信号在均衡信号中的对应位置,该均衡信号具有与该对应位置相邻的两个状态位置,该对应位置位于该两个状态位置之间,该对应位置与该两个状态位置之间的欧式距离相等,每个该状态位置对应该均衡信号的一个信号状态,该两个状态位置对应的信号状态不同。Wherein, for the corresponding position of the dimensionality reduction sub-signal at each time in the n times in the balanced signal, the balanced signal has two state positions adjacent to the corresponding position, and the corresponding position is located in the two states Between positions, the Euclidean distance between the corresponding position and the two state positions is equal, each state position corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
可选地,粗判决模块根据均衡信号确定降维位置信息和降维信号包括:粗判决模块根据均衡信号确定降维位置信息;粗判决模块根据均衡信号和降维位置信息确定降维信号。其中,均衡信号中包括所述n个时刻中的各个时刻的均衡子信号,粗判决模块根据均衡信号确定降维位置信息包括:粗判决模块根据该n个时刻中的每个时刻的均衡子信号,确定该每个时刻对应的位置标识值。粗判决模块根据均衡信号和降维位置信息确定降维信号包括:粗判决模块根据该n个时刻中的每个时刻的均衡子信号和该每个时刻对应的位置标识值,确定该每个时刻的降维子信号。Optionally, the rough judgment module determining the dimensionality reduction position information and the dimensionality reduction signal according to the equalized signal includes: the rough judgment module determines the dimensionality reduction position information according to the equalized signal; the rough judgment module determines the dimensionality reduction signal according to the equalized signal and the dimensionality reduction position information. Wherein, the equalized signal includes the equalized sub-signals at each of the n times, and the rough decision module determines the dimensionality reduction position information according to the equalized signal includes: , to determine the location identification value corresponding to each moment. The coarse judgment module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction position information includes: the rough judgment module determines the The dimensionality reduction sub-signal of .
可选地,在均衡模块包括第一均衡子模块和第二均衡子模块时,粗判决模块根据均衡信号确定降维位置信息包括:粗判决模块根据第二均衡信号确定降维位置信息。粗判决模块根据均衡信号和降维位置信息确定降维信号包括:粗判决模块根据第二均衡信号和降维位置信息确定降维信号。也即,粗判决模块确定降维位置信息时采用的均衡信号是第二均衡信号,粗判决模块确定降维信号时采用的均衡信号是第一均衡信号。其中,在均衡模块包括第一均衡子模块和第二均衡子模块时,每个时刻的降维子信号在均衡信号中的对应位置为该每个时刻的降维子信号在第二均衡信号中的对应位置。对于所述n个时刻中的每个时刻的降维子信号在第二均衡信号中的对应位置,第二均衡信号具有与该对应位置相邻的两个状态位置,该对应位置位于该两个状态位置之间,该对应位置与该两个状态位置之间的欧式距离相等,该两个状态位置中的每个状态位置对应第二均衡信号的一个信号状态,该两个状态位置对应的信号状态不同。Optionally, when the equalization module includes a first equalization submodule and a second equalization submodule, the coarse decision module determining the dimensionality reduction position information according to the equalization signal includes: the rough decision module determining the dimensionality reduction position information according to the second equalization signal. The coarse judgment module determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: the rough judgment module determining the dimensionality reduction signal according to the second equalization signal and the dimensionality reduction location information. That is, the equalized signal used by the rough decision module to determine the dimensionality reduction position information is the second equalized signal, and the equalized signal used by the coarse decision module to determine the dimensionality reduction signal is the first equalized signal. Wherein, when the equalization module includes a first equalization sub-module and a second equalization sub-module, the corresponding position of the dimensionality reduction sub-signal at each moment in the equalization signal is the dimensionality reduction sub-signal at each moment in the second equalization signal corresponding position. For the corresponding position of the dimensionality reduction sub-signal at each of the n times in the second equalized signal, the second equalized signal has two state positions adjacent to the corresponding position, and the corresponding position is located in the two Between the state positions, the corresponding position is equal to the Euclidean distance between the two state positions, each state position in the two state positions corresponds to a signal state of the second balanced signal, and the signal corresponding to the two state positions The status is different.
S1603.滤波模块对降维信号进行滤波处理,得到滤波信号。S1603. The filtering module performs filtering processing on the dimensionality reduction signal to obtain a filtered signal.
滤波模块具有滤波系数,滤波模块可以根据该滤波系数对降维信号进行滤波处理,得到滤波信号。其中,该滤波信号中包括所述n个时刻中的各个时刻的滤波子信号。滤波模块对降维信号进行滤波的过程中,将降维信号中的有色噪声转换为白噪声,并在降维信号中引入可控的ISI,因此滤波信号中包含白噪声和可控的ISI。The filter module has a filter coefficient, and the filter module can perform filter processing on the dimensionality reduction signal according to the filter coefficient to obtain a filter signal. Wherein, the filtered signal includes filtered sub-signals at each of the n times. In the process of filtering the dimensionality reduction signal, the filtering module converts the colored noise in the dimensionality reduction signal into white noise, and introduces controllable ISI into the dimensionality reduction signal, so the filtered signal contains white noise and controllable ISI.
S1604.MLSE模块确定滤波信号的目标路径分支。S1604. The MLSE module determines a target path branch of the filtered signal.
MLSE模块可以根据滤波模块的滤波系数确定该滤波信号的目标路径分支。该目标路径分支中包括该n个时刻中的各个时刻的判决值,该n个时刻中的每个时刻的判决值是该MLSE模块基于该每个时刻的滤波子信号获得的。The MLSE module can determine the target path branch of the filtered signal according to the filter coefficient of the filter module. The target path branch includes decision values at each of the n times, and the decision value at each of the n times is obtained by the MLSE module based on the filtered sub-signal at each time.
其中,滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,MLSE模块根据 滤波模块的滤波系数确定该滤波信号的目标路径分支,包括:MLSE模块根据该滤波系数和该n个时刻中的每个时刻的滤波子信号确定该每个时刻的分支度量;MLSE模块根据该n个时刻的分支度量确定该滤波信号的目标路径分支。Wherein, the filtered signal includes the filtered sub-signals at each of the n times, and the MLSE module determines the target path branch of the filtered signal according to the filter coefficient of the filter module, including: the MLSE module determines the target path branch of the filter signal according to the filter coefficient and the n times The filtered sub-signal at each moment in determines the branch metric at each moment; the MLSE module determines the target path branch of the filtered signal according to the branch metrics at n moments.
S1605.映射模块根据降维位置信息,对滤波信号的目标路径分支进行映射得到目标信号,目标信号的信号状态的数目与均衡信号的信号状态的数目相等,目标信号的各个信号状态与均衡信号的各个信号状态相同或对应。S1605. The mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, the number of signal states of the target signal is equal to the number of signal states of the balanced signal, and each signal state of the target signal is equal to the number of signal states of the balanced signal. The respective signal states are the same or correspond.
其中,滤波信号的目标路径分支中包括所述n个时刻中的各个时刻的判决值,该n个时刻中的每个时刻的判决值是MLSE模块基于该每个时刻的滤波子信号获得的,该目标信号中包括该n个时刻中的各个时刻的目标子信号。映射模块根据降维位置信息,对滤波信号的目标路径分支进行映射得到目标信号,包括:映射模块根据该n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号;映射模块根据该n个时刻的目标子信号确定该目标信号。Wherein, the target path branch of the filtered signal includes a decision value at each of the n moments, and the decision value at each of the n moments is obtained by the MLSE module based on the filtered sub-signal at each moment, The target signal includes target sub-signals at each of the n times. The mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, including: the mapping module determines the The target sub-signal at each moment; the mapping module determines the target signal according to the target sub-signals at n times.
在本申请实施例中,目标路径分支中的判决值为硬值或软值。可选地,在目标路径分支中的判决值为硬值时,映射模块根据该n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号,包括:映射模块将该n个时刻中的每个时刻的判决值与该每个时刻对应的位置标识值之和,确定为该每个时刻的目标子信号。在目标路径分支中的判决值为软值时,映射模块根据该n个时刻中的每个时刻的判决值和该每个时刻对应的位置标识值,确定该每个时刻的目标子信号,包括:映射模块根据该n个时刻中的每个时刻对应的位置标识值,确定该每个时刻对应的映射规则;映射模块根据该每个时刻的判决值和该每个时刻对应的位置标识值对应的映射规则,确定该每个时刻的目标子信号。In the embodiment of the present application, the decision value in the target path branch is a hard value or a soft value. Optionally, when the decision value in the target path branch is a hard value, the mapping module determines the target at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment The sub-signal includes: the mapping module determines the sum of the decision value at each of the n times and the corresponding position identification value at each time as the target sub-signal at each time. When the decision value in the target path branch is a soft value, the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including : The mapping module determines the mapping rule corresponding to each moment according to the position identifier value corresponding to each moment in the n times; the mapping module corresponds to the position identifier value corresponding to each moment according to the judgment value of each moment The mapping rules of , determine the target sub-signal at each moment.
示例地,均衡信号的信号状态包括-3、-1、1和3,降维信号的信号状态包括-1和1,位置标识值包括-2、0和2。目标路径分支中的判决值为软值时,映射规则可以如下:For example, the signal states of the equalized signal include -3, -1, 1, and 3, the signal states of the dimensionality reduction signal include -1 and 1, and the position identifier values include -2, 0, and 2. When the decision value in the target path branch is a soft value, the mapping rule can be as follows:
当p_ind_d(k)=-2时,映射规则为hd_out(k)=[max,-ld_out(k)];When p_ind_d(k)=-2, the mapping rule is hd_out(k)=[max, -ld_out(k)];
当p_ind_d(k)=0时,映射规则为hd_out(k)=[ld_out(k),max];When p_ind_d(k)=0, the mapping rule is hd_out(k)=[ld_out(k), max];
当p_ind_d(k)=2时,映射规则为hd_out(k)=[-max,ld_out(k)];When p_ind_d(k)=2, the mapping rule is hd_out(k)=[-max, ld_out(k)];
其中,p_ind_d(k)为第k时刻对应的位置标识值,ld_out(k)为第k时刻的判决值,hd_out(k)为第k时刻的目标子信号,max为常数,k为不大于n的正整数,在映射规则的表述[A,B]中,A为目标子信号的高位比特,B为目标子信号的低位比特。Among them, p_ind_d(k) is the position identification value corresponding to the kth moment, ld_out(k) is the judgment value at the kth moment, hd_out(k) is the target sub-signal at the kth moment, max is a constant, and k is not greater than n A positive integer of , in the expression [A, B] of the mapping rule, A is the high-order bit of the target sub-signal, and B is the low-order bit of the target sub-signal.
可选地,信号处理装置还包括自相关估计模块,自相关估计模块分别与均衡模块、滤波模块和MLSE模块连接。该方法还包括:自相关估计模块根据均衡信号确定滤波模块的滤波系数,并向滤波模块和MLSE模块分别提供该滤波系数,使得滤波模块根据该滤波系数对降维信号进行滤波处理,以及,MLSE模块根据该滤波系数确定该滤波信号的目标路径分支。Optionally, the signal processing device further includes an autocorrelation estimation module, and the autocorrelation estimation module is respectively connected to the equalization module, the filtering module and the MLSE module. The method also includes: the autocorrelation estimation module determines the filter coefficient of the filter module according to the equalized signal, and provides the filter coefficient to the filter module and the MLSE module respectively, so that the filter module performs filtering processing on the dimensionality reduction signal according to the filter coefficient, and, MLSE The module determines the target path branch of the filtered signal according to the filter coefficient.
可选地,信号处理装置还包括译码模块,译码模块与映射模块连接。该信号处理方法还包括:译码模块对目标信号进行译码,以恢复出数据。Optionally, the signal processing device further includes a decoding module connected to the mapping module. The signal processing method further includes: the decoding module decodes the target signal to recover data.
综上所述,本申请实施例提供的信号处理方法,均衡模块对初始信号进行均衡处理得到均衡信号,粗判决模块根据均衡信号确定降维位置信息和降维信号,并将降维位置信息输出至映射模块,将降维信号输出至滤波模块,滤波模块对降维信号进行滤波得到滤波信号,并将滤波信号输出至MLSE模块,MLSE模块确定滤波信号的目标路径分支,并将滤波信号的目标路径分支输出至映射模块,映射模块根据降维位置信息对滤波信号的 目标路径分支进行映射得到目标信号。由于降维信号与调制格式无关,降维信号的信号状态的数目小于均衡信号的信号状态的数目,滤波信号的信号状态的数目等于降维信号的信号状态的数目,因此输入MLSE模块的滤波信号的信号状态的数目小于均衡模块输出的均衡信号的信号状态的数目,且滤波信号与调制格式无关,使得MLSE模块确定目标路径分支的过程中所需计算的路径分支较少,MLSE模块确定目标路径分支的过程与调制格式无关,有助于降低MLSE模块的算法复杂度,降低MLSE模块的资源消耗。In summary, in the signal processing method provided by the embodiment of the present application, the equalization module performs equalization processing on the initial signal to obtain an equalized signal, and the rough judgment module determines the dimensionality reduction position information and dimensionality reduction signal according to the equalization signal, and outputs the dimensionality reduction position information To the mapping module, output the dimension reduction signal to the filter module, the filter module filters the dimension reduction signal to obtain the filter signal, and outputs the filter signal to the MLSE module, the MLSE module determines the target path branch of the filter signal, and the target path of the filter signal The path branch is output to the mapping module, and the mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain the target signal. Since the dimensionality reduction signal has nothing to do with the modulation format, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalized signal, and the number of signal states of the filtered signal is equal to the number of signal states of the dimensionality reduction signal, so the filtered signal input to the MLSE module The number of signal states of is less than the number of signal states of the equalized signal output by the equalization module, and the filtered signal has nothing to do with the modulation format, so that the MLSE module needs to calculate fewer path branches in the process of determining the target path branch, and the MLSE module determines the target path The branching process has nothing to do with the modulation format, which helps to reduce the algorithm complexity of the MLSE module and reduce the resource consumption of the MLSE module.
本申请实施例提供了一种处理芯片,该处理芯片包括上述实施例提供的信号处理装置10。可选地,该处理芯片为DSP芯片。其中,该处理芯片可以包括可编程逻辑电路和/或程序指令,当该处理芯片运行时用于实现如上述实施例提供的信号处理方法。An embodiment of the present application provides a processing chip, and the processing chip includes the signal processing device 10 provided in the foregoing embodiment. Optionally, the processing chip is a DSP chip. Wherein, the processing chip may include a programmable logic circuit and/or program instructions, which are used to implement the signal processing method provided in the above-mentioned embodiments when the processing chip is running.
本申请实施例提供了一种信号接收设备,该信号接收设备包括存储芯片和处理芯片。存储芯片用于存储计算机程序。处理芯片用于执行存储芯片中存储的计算机程序以使得该信号接收设备执行上述实施例提供的信号处理方法。An embodiment of the present application provides a signal receiving device, where the signal receiving device includes a storage chip and a processing chip. Memory chips are used to store computer programs. The processing chip is configured to execute the computer program stored in the storage chip so that the signal receiving device executes the signal processing method provided by the above embodiments.
可选地,该信号接收设备为光接收机。Optionally, the signal receiving device is an optical receiver.
本申请实施例提供了一种信号传输系统,该信号传输系统包括信号发送设备和上述实施例提供的信号接收设备。信号发送设备与信号接收设备通过传输链路连接,信号发送设备用于通过传输链路向信号接收设备发送信号。An embodiment of the present application provides a signal transmission system, and the signal transmission system includes a signal sending device and the signal receiving device provided in the foregoing embodiments. The signal sending device is connected to the signal receiving device through a transmission link, and the signal sending device is used to send a signal to the signal receiving device through the transmission link.
可选地,信号发送设备为光发送机,信号接收设备为光接收机,传输链路为光链路。光发送机和光接收机统称为光通信设备。Optionally, the signal sending device is an optical transmitter, the signal receiving device is an optical receiver, and the transmission link is an optical link. Optical transmitters and optical receivers are collectively referred to as optical communication equipment.
本申请实施例提供了一种计算机可读存储介质,该计算机可读存储介质中存储有计算机程序,该计算机程序被执行(例如,被处理芯片执行)时实现上述实施例提供的信号处理方法。An embodiment of the present application provides a computer-readable storage medium, and a computer program is stored in the computer-readable storage medium. When the computer program is executed (for example, executed by a processing chip), the signal processing method provided in the foregoing embodiments is implemented.
本申请实施例提供了一种计算机程序产品,该计算机程序产品包括程序或代码,该程序或代码被执行(例如,被处理芯片等执行)时实现上述实施例提供的信号处理方法。An embodiment of the present application provides a computer program product, where the computer program product includes a program or code, and when the program or code is executed (for example, executed by a processing chip, etc.), the signal processing method provided in the foregoing embodiment is implemented.
在上述实施例中,可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。例如,可以通过FFE、DFE等实现上述均衡模块,通过后置后置滤波器实现上述滤波模块,通过FEC实现上述译码模块,通过固化有程序指令的固件实现上述粗判决模块、映射模块等的功能等。当使用硬件或固件实现时,所述硬件或固件包括可编程逻辑电路和/或程序指令。在光通信设备上加载和执行所述程序指令时,全部或部分地产生按照本申请实施例所述的流程或功能。所述程序指令可以固化在光通信设备的处理电路。当使用软件实现时,可以全部或部分地以计算机程序产品的形式实现,所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时,全部或部分地产生按照本申请实施例所述的流程或功能。上述实施例提供的信号处理装置在执行上述信号处理方法时,仅以上述各功能模块的划分进行举例说明,实际应用中,可以根据需要而将上述功能分配由不同的功能模块完成,即将设备的内部结构划分成不同的功能 模块,以完成以上描述的全部或者部分功能。另外,上述实施例提供的信号处理装置、处理芯片、信号接收设备、信号传输系统实施例属于同一构思。In the above embodiments, all or part of them may be implemented by software, hardware, firmware or any combination thereof. For example, the above-mentioned equalization module can be realized through FFE, DFE, etc., the above-mentioned filtering module can be realized through a post-post filter, the above-mentioned decoding module can be realized through FEC, and the above-mentioned coarse judgment module and mapping module can be realized through firmware solidified with program instructions. function etc. When implemented using hardware or firmware, the hardware or firmware includes programmable logic circuits and/or program instructions. When the program instructions are loaded and executed on the optical communication device, the processes or functions according to the embodiments of the present application are generated in whole or in part. The program instructions can be fixed in the processing circuit of the optical communication device. When implemented in software, it may be implemented in whole or in part in the form of a computer program product comprising one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the processes or functions according to the embodiments of the present application will be generated in whole or in part. When the signal processing device provided by the above-mentioned embodiment executes the above-mentioned signal processing method, the division of the above-mentioned functional modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional modules according to needs, that is, The internal structure is divided into different functional modules to complete all or part of the functions described above. In addition, the embodiments of the signal processing device, the processing chip, the signal receiving device, and the signal transmission system provided in the above embodiments belong to the same idea.
本申请实施例提供的方法实施例和装置实施例等不同类型的实施例均可以相互参考。本申请实施例提供的方法实施例操作的先后顺序能够进行适当调整,操作也能够根据情况进行响应增减,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化的方法,都应涵盖在本申请的保护范围之内,因此不再赘述。Different types of embodiments such as method embodiments and device embodiments provided in the embodiments of the present application may refer to each other. The sequence of operations in the method embodiments provided in the embodiments of this application can be adjusted appropriately, and the operations can also be increased or decreased according to the situation. Any person familiar with the technical field can easily think of changes within the technical scope disclosed in this application. Methods should be covered within the scope of protection of the present application, so they will not be repeated here.
在本申请中,术语“至少一个”指一个或多个,“多个”指两个或两个以上,除非另有明确的限定。术语“第一”和“第二”等仅用于描述目的,而不能理解为指示或暗示相对重要性。术语“和/或”仅仅是一种描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。另外,本文中字符“/”,一般表示前后关联对象是一种“或”的关系。In this application, the term "at least one" means one or more, and "plurality" means two or more, unless otherwise clearly defined. The terms "first" and "second", etc. are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "and/or" is only an association relationship describing associated objects, indicating that there may be three types of relationships, for example, A and/or B may indicate: A exists alone, A and B exist simultaneously, and B exists independently. situation. In addition, the character "/" in this article generally indicates that the contextual objects are an "or" relationship.
以上所述,仅为本申请的示例性实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到各种等效的修改或替换,这些修改或替换都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。The above is only an exemplary embodiment of the application, but the protection scope of the application is not limited thereto. Any person familiar with the technical field can easily think of various equivalents within the technical scope disclosed in the application. The modifications or replacements should be covered by the scope of protection of this application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (37)

  1. 一种信号处理装置,其特征在于,所述信号处理装置包括:依次连接的均衡模块、粗判决模块、滤波模块、最大似然序列估计MLSE模块和映射模块,所述粗判决模块还与所述映射模块连接;A signal processing device, characterized in that the signal processing device comprises: an equalization module, a rough decision module, a filter module, a maximum likelihood sequence estimation MLSE module and a mapping module connected in sequence, and the rough decision module is also connected with the map module connection;
    所述均衡模块用于对输入所述均衡模块的初始信号进行均衡处理,得到均衡信号;The equalization module is used to equalize the initial signal input to the equalization module to obtain an equalized signal;
    所述粗判决模块用于根据所述均衡信号确定降维位置信息和降维信号,所述降维信号的信号状态的数目小于所述均衡信号的信号状态的数目,所述降维信号中包括n个时刻中的各个时刻的降维子信号,所述降维信号与所述均衡信号的调制格式无关,所述降维位置信息包括所述n个时刻中的各个时刻对应的位置标识值,每个时刻对应的位置标识值用于指示所述每个时刻的降维子信号在所述均衡信号中的对应位置,n为正整数;The rough judgment module is used to determine the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, and the dimensionality reduction signal includes Dimensionality reduction sub-signals at each of the n moments, the dimensionality reduction signal is independent of the modulation format of the equalized signal, the dimensionality reduction position information includes a position identification value corresponding to each of the n moments, The position identification value corresponding to each moment is used to indicate the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, and n is a positive integer;
    所述滤波模块用于对所述降维信号进行滤波处理,得到滤波信号;The filtering module is used to filter the dimensionality reduction signal to obtain a filtered signal;
    所述MLSE模块用于确定所述滤波信号的目标路径分支;The MLSE module is used to determine a target path branch of the filtered signal;
    所述映射模块用于根据所述降维位置信息,对所述滤波信号的目标路径分支进行映射得到目标信号,所述目标信号的信号状态的数目与所述均衡信号的信号状态的数目相等,所述目标信号的各个信号状态与所述均衡信号的各个信号状态相同或对应。The mapping module is configured to map the target path branch of the filtered signal according to the dimensionality reduction position information to obtain a target signal, the number of signal states of the target signal is equal to the number of signal states of the equalized signal, Each signal state of the target signal is the same as or corresponds to each signal state of the equalized signal.
  2. 根据权利要求1所述的信号处理装置,其特征在于,The signal processing device according to claim 1, wherein:
    对于所述每个时刻的降维子信号在所述均衡信号中的对应位置,所述均衡信号具有与所述对应位置相邻的两个状态位置,所述对应位置位于所述两个状态位置之间,所述对应位置与所述两个状态位置之间的欧式距离相等,每个所述状态位置对应所述均衡信号的一个信号状态,所述两个状态位置对应的信号状态不同。For the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, the equalized signal has two state positions adjacent to the corresponding position, and the corresponding position is located at the two state positions Between, the Euclidean distance between the corresponding position and the two state positions is equal, each of the state positions corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
  3. 根据权利要求2所述的信号处理装置,其特征在于,所述粗判决模块具体用于:The signal processing device according to claim 2, wherein the rough judgment module is specifically used for:
    根据所述均衡信号确定所述降维位置信息;determining the dimensionality reduction position information according to the equalized signal;
    根据所述均衡信号和所述降维位置信息确定所述降维信号。The dimensionality reduction signal is determined according to the equalization signal and the dimensionality reduction location information.
  4. 根据权利要求3所述的信号处理装置,其特征在于,The signal processing device according to claim 3, wherein:
    所述均衡信号中包括所述n个时刻中的各个时刻的均衡子信号,The balanced signal includes balanced sub-signals at each of the n times,
    所述根据所述均衡信号确定所述降维位置信息,包括:根据所述n个时刻中的每个时刻的均衡子信号,确定所述每个时刻对应的位置标识值;The determining the dimension-reduced position information according to the equalized signal includes: determining the position identification value corresponding to each time according to the equalized sub-signal at each time in the n times;
    所述根据所述均衡信号和所述降维位置信息确定所述降维信号,包括:根据所述n个时刻中的每个时刻的均衡子信号和所述每个时刻对应的位置标识值,确定所述每个时刻的降维子信号。The determining the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information includes: according to the equalization sub-signal at each moment in the n times and the location identification value corresponding to each moment, The dimensionality reduction sub-signal at each moment is determined.
  5. 根据权利要求3或4所述的信号处理装置,其特征在于,The signal processing device according to claim 3 or 4, characterized in that,
    所述均衡模块包括:第一均衡子模块和第二均衡子模块,所述第一均衡子模块、所述第二均衡子模块和所述粗判决模块依次连接,所述第一均衡子模块还与所述粗判决模块连接;The equalization module includes: a first equalization submodule and a second equalization submodule, the first equalization submodule, the second equalization submodule and the rough decision module are connected in sequence, and the first equalization submodule also connected with the rough judgment module;
    所述第一均衡子模块用于对所述初始信号进行第一均衡处理,得到第一均衡信号;The first equalization submodule is used to perform a first equalization process on the initial signal to obtain a first equalized signal;
    所述第二均衡子模块用于对所述第一均衡信号进行第二均衡处理,得到第二均衡信号,所述均衡模块得到的所述均衡信号包括所述第一均衡信号和所述第二均衡信号,所述降维子信号在所述均衡信号中的对应位置为所述降维子信号在所述第二均衡信号中的对应位置,所述均衡子信号为所述第二均衡信号中的子信号。The second equalization sub-module is configured to perform a second equalization process on the first equalized signal to obtain a second equalized signal, and the equalized signal obtained by the equalized module includes the first equalized signal and the second equalized signal. An equalized signal, the corresponding position of the dimensionality reduction sub-signal in the equalized signal is the corresponding position of the dimensionality reduction sub-signal in the second equalized signal, and the equalized sub-signal is the corresponding position in the second equalized signal sub-signal.
  6. 根据权利要求5所述的信号处理装置,其特征在于,The signal processing device according to claim 5, wherein:
    所述第一均衡子模块为前馈均衡器FFE或多输入多输出MIMO均衡器;The first equalization submodule is a feed-forward equalizer FFE or a multiple-input multiple-output MIMO equalizer;
    所述第二均衡子模块为判决反馈均衡器DFE。The second equalization sub-module is a decision feedback equalizer DFE.
  7. 根据权利要求5或6所述的信号处理装置,其特征在于,所述粗判决模块具体用于:The signal processing device according to claim 5 or 6, wherein the rough decision module is specifically used for:
    根据所述第二均衡信号确定所述降维位置信息;determining the dimensionality reduction position information according to the second equalized signal;
    根据所述第一均衡信号和所述降维位置信息确定所述降维信号。The dimensionality reduction signal is determined according to the first equalization signal and the dimensionality reduction location information.
  8. 根据权利要求1至7任一项所述的信号处理装置,其特征在于,The signal processing device according to any one of claims 1 to 7, characterized in that,
    所述滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,所述目标路径分支中包括所述n个时刻中的各个时刻的判决值,所述n个时刻中的每个时刻的判决值是所述MLSE模块基于所述每个时刻的滤波子信号获得的,所述目标信号中包括所述n个时刻中的各个时刻的目标子信号;所述映射模块具体用于:The filtered signal includes filtered sub-signals at each of the n moments, the target path branch includes decision values at each of the n moments, and each of the n moments The decision value of is obtained by the MLSE module based on the filtered sub-signals at each moment, and the target signal includes target sub-signals at each of the n moments; the mapping module is specifically used for:
    根据所述n个时刻中的每个时刻的判决值和所述每个时刻对应的位置标识值,确定所述每个时刻的目标子信号;Determine the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment;
    根据所述n个时刻的目标子信号确定所述目标信号。The target signal is determined according to the target sub-signals at the n moments.
  9. 根据权利要求8所述的信号处理装置,其特征在于,The signal processing device according to claim 8, wherein:
    所述判决值为硬值,所述映射模块具体用于:将所述n个时刻中的每个时刻的判决值与所述每个时刻对应的位置标识值之和,确定为所述每个时刻的目标子信号。The judgment value is a hard value, and the mapping module is specifically configured to: determine the sum of the judgment value at each time in the n times and the position identification value corresponding to each time as the sum of each target sub-signal at time.
  10. 根据权利要求8所述的信号处理装置,其特征在于,The signal processing device according to claim 8, wherein:
    所述判决值为软值,所述映射模块具体用于:根据所述n个时刻中的每个时刻对应的位置标识值,确定所述每个时刻对应的映射规则;根据所述每个时刻的判决值和所述每个时刻对应的映射规则,确定所述每个时刻的目标子信号。The decision value is a soft value, and the mapping module is specifically configured to: determine the mapping rule corresponding to each moment according to the position identification value corresponding to each moment in the n times; The decision value of and the mapping rule corresponding to each moment determine the target sub-signal at each moment.
  11. 根据权利要求10所述的信号处理装置,其特征在于,The signal processing device according to claim 10, wherein:
    所述均衡信号的信号状态包括-3、-1、1和3,所述降维信号的信号状态包括-1和1,所述位置标识值包括-2、0和2;The signal state of the equalized signal includes -3, -1, 1, and 3, the signal state of the dimensionality reduction signal includes -1 and 1, and the position identification value includes -2, 0, and 2;
    当p_ind_d(k)=-2时,所述映射规则为hd_out(k)=[max,-ld_out(k)];When p_ind_d(k)=-2, the mapping rule is hd_out(k)=[max, -ld_out(k)];
    当p_ind_d(k)=0时,所述映射规则为hd_out(k)=[ld_out(k),max];When p_ind_d(k)=0, the mapping rule is hd_out(k)=[ld_out(k), max];
    当p_ind_d(k)=2时,所述映射规则为hd_out(k)=[-max,ld_out(k)];When p_ind_d(k)=2, the mapping rule is hd_out(k)=[-max, ld_out(k)];
    其中,所述p_ind_d(k)为第k时刻对应的位置标识值,所述ld_out(k)为所述第k时刻的判决值,所述hd_out(k)为所述第k时刻的目标子信号,max为常数,k为不大于n的正整数,在所述映射规则的表述[A,B]中,A为目标子信号的高位比特,B为目标子信号的低位比特。Wherein, the p_ind_d(k) is the position identification value corresponding to the kth moment, the ld_out(k) is the judgment value at the kth moment, and the hd_out(k) is the target sub-signal at the kth moment , max is a constant, k is a positive integer not greater than n, in the expression [A, B] of the mapping rule, A is the upper bit of the target sub-signal, and B is the lower bit of the target sub-signal.
  12. 根据权利要求1至11任一项所述的信号处理装置,其特征在于,The signal processing device according to any one of claims 1 to 11, characterized in that,
    所述信号处理装置还包括:自相关估计模块,所述自相关估计模块分别与所述均衡模块、所述滤波模块和所述MLSE模块连接;The signal processing device further includes: an autocorrelation estimation module, the autocorrelation estimation module is respectively connected to the equalization module, the filtering module and the MLSE module;
    所述自相关估计模块用于根据所述均衡信号确定所述滤波模块的滤波系数;The autocorrelation estimation module is used to determine the filter coefficient of the filter module according to the equalized signal;
    所述滤波模块具体用于根据所述滤波系数对所述降维信号进行滤波处理;The filtering module is specifically configured to perform filtering processing on the dimensionality reduction signal according to the filtering coefficient;
    所述MLSE模块具体用于根据所述滤波系数确定所述滤波信号的目标路径分支。The MLSE module is specifically configured to determine a target path branch of the filtered signal according to the filter coefficient.
  13. 根据权利要求12所述的信号处理装置,其特征在于,The signal processing device according to claim 12, wherein:
    所述滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,The filtered signal includes filtered sub-signals at each of the n times,
    所述MLSE模块具体用于:The MLSE module is specifically designed to:
    根据所述滤波系数和所述n个时刻中的每个时刻的滤波子信号确定所述每个时刻的分支度量;determining the branch metric at each moment according to the filter coefficient and the filter sub-signal at each moment in the n moments;
    根据所述n个时刻的分支度量确定所述滤波信号的目标路径分支。A target path branch of the filtered signal is determined according to the branch metrics at the n time moments.
  14. 根据权利要求1至13任一项所述的信号处理装置,其特征在于,The signal processing device according to any one of claims 1 to 13, characterized in that,
    所述信号处理装置还包括:译码模块,所述译码模块与所述映射模块连接;The signal processing device further includes: a decoding module connected to the mapping module;
    所述译码模块用于对所述目标信号进行译码,以恢复出数据。The decoding module is used to decode the target signal to restore data.
  15. 根据权利要求1至14任一项所述的信号处理装置,其特征在于,The signal processing device according to any one of claims 1 to 14, characterized in that,
    所述信号处理装置为强度调制装置或相位调制装置。The signal processing means is an intensity modulation means or a phase modulation means.
  16. 根据权利要求1至15任一项所述的信号处理装置,其特征在于,The signal processing device according to any one of claims 1 to 15, characterized in that,
    所述均衡信号是复数信号或实数信号。The equalized signal is a complex signal or a real signal.
  17. 根据权利要求16所述的信号处理装置,其特征在于,The signal processing device according to claim 16, wherein:
    所述均衡信号是脉冲幅度调制PAM信号,所述降维信号是二进制振幅键控OOK信号;或者,The equalization signal is a pulse amplitude modulation PAM signal, and the dimensionality reduction signal is a binary amplitude keying OOK signal; or,
    所述均衡信号是正交振幅调制QAM信号,所述降维信号是正交相移键控QPSK信号。The equalized signal is a quadrature amplitude modulation QAM signal, and the dimensionality reduction signal is a quadrature phase shift keying QPSK signal.
  18. 一种信号处理方法,其特征在于,应用于信号处理装置,所述信号处理装置包括依次连接的均衡模块、粗判决模块、滤波模块、最大似然序列估计MLSE模块和映射模块,所述粗判决模块还与所述映射模块连接,所述方法包括:A signal processing method, characterized in that it is applied to a signal processing device, and the signal processing device includes an equalization module, a rough decision module, a filter module, a maximum likelihood sequence estimation MLSE module and a mapping module connected in sequence, and the rough decision The module is also connected with the mapping module, and the method includes:
    所述均衡模块对输入所述均衡模块的初始信号进行均衡处理,得到均衡信号;The equalization module performs equalization processing on the initial signal input to the equalization module to obtain an equalized signal;
    所述粗判决模块根据所述均衡信号确定降维位置信息和降维信号,所述降维信号的信号状态的数目小于所述均衡信号的信号状态的数目,所述降维信号中包括n个时刻中的各个时刻的降维子信号,所述降维信号与所述均衡信号的调制格式无关,所述降维位置信息包括所述n个时刻中的各个时刻对应的位置标识值,每个时刻对应的位置标识值用于指示所述每个时刻的降维子信号在所述均衡信号中的对应位置,n为正整数;The rough judgment module determines dimensionality reduction position information and dimensionality reduction signals according to the equalization signal, the number of signal states of the dimensionality reduction signal is less than the number of signal states of the equalization signal, and the dimensionality reduction signal includes n Dimensionality reduction sub-signals at each moment in time, the dimensionality reduction signal has nothing to do with the modulation format of the equalized signal, the dimensionality reduction position information includes the position identification value corresponding to each moment in the n times, each The position identification value corresponding to the time is used to indicate the corresponding position of the dimensionality reduction sub-signal at each time in the equalized signal, and n is a positive integer;
    所述滤波模块对所述降维信号进行滤波处理,得到滤波信号;The filtering module performs filtering processing on the dimensionality reduction signal to obtain a filtered signal;
    所述MLSE模块确定所述滤波信号的目标路径分支;the MLSE module determines a target path branch of the filtered signal;
    所述映射模块根据所述降维位置信息,对所述滤波信号的目标路径分支进行映射得到目标信号,所述目标信号的信号状态的数目与所述均衡信号的信号状态的数目相等,所述目标信号的各个信号状态与所述均衡信号的各个信号状态相同或对应。The mapping module maps the target path branch of the filtered signal according to the dimensionality reduction position information to obtain a target signal, the number of signal states of the target signal is equal to the number of signal states of the equalized signal, and the Each signal state of the target signal is the same as or corresponds to each signal state of the equalized signal.
  19. 根据权利要求18所述的方法,其特征在于,The method of claim 18, wherein,
    对于所述每个时刻的降维子信号在所述均衡信号中的对应位置,所述均衡信号具有与所述对应位置相邻的两个状态位置,所述对应位置位于所述两个状态位置之间,所述对应位置与所述两个状态位置之间的欧式距离相等,每个所述状态位置对应所述均衡信号的一个信号状态,所述两个状态位置对应的信号状态不同。For the corresponding position of the dimensionality reduction sub-signal at each moment in the equalized signal, the equalized signal has two state positions adjacent to the corresponding position, and the corresponding position is located at the two state positions Between, the Euclidean distance between the corresponding position and the two state positions is equal, each of the state positions corresponds to a signal state of the balanced signal, and the signal states corresponding to the two state positions are different.
  20. 根据权利要求19所述的方法,其特征在于,The method of claim 19, wherein,
    所述粗判决模块根据所述均衡信号确定降维位置信息和降维信号,包括:The rough judgment module determines the dimensionality reduction position information and the dimensionality reduction signal according to the equalization signal, including:
    所述粗判决模块根据所述均衡信号确定所述降维位置信息;The rough decision module determines the dimensionality reduction position information according to the equalized signal;
    所述粗判决模块根据所述均衡信号和所述降维位置信息确定所述降维信号。The rough decision module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction location information.
  21. 根据权利要求20所述的方法,其特征在于,The method of claim 20, wherein
    所述均衡信号中包括所述n个时刻中的各个时刻的均衡子信号,The balanced signal includes balanced sub-signals at each of the n times,
    所述粗判决模块根据所述均衡信号确定所述降维位置信息,包括:所述粗判决模块根据所述n个时刻中的每个时刻的均衡子信号,确定所述每个时刻对应的位置标识值;The rough judgment module determines the dimensionality reduction position information according to the equalized signal, including: the rough judgment module determines the position corresponding to each time according to the equalized sub-signal at each time in the n times identity value;
    所述粗判决模块根据所述均衡信号和所述降维位置信息确定所述降维信号,包括:所述粗判决模块根据所述n个时刻中的每个时刻的均衡子信号和所述每个时刻对应的位置标识值,确定所述每个时刻的降维子信号。The rough judgment module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction position information, including: the rough judgment module according to the equalization sub-signal at each moment in the n times and the each The position identification value corresponding to each moment, and determine the dimensionality reduction sub-signal at each moment.
  22. 根据权利要求20或21所述的方法,其特征在于,The method according to claim 20 or 21, characterized in that,
    所述均衡模块包括第一均衡子模块和第二均衡子模块,所述第一均衡子模块、所述第二均衡子模块和所述粗判决模块依次连接,所述第一均衡子模块还与所述粗判决模块连接;The equalization module includes a first equalization submodule and a second equalization submodule, the first equalization submodule, the second equalization submodule and the rough decision module are connected in sequence, and the first equalization submodule is also connected with The coarse decision module is connected;
    所述均衡模块对输入所述均衡模块的初始信号进行均衡处理,得到均衡信号,包括:The equalization module equalizes the initial signal input to the equalization module to obtain an equalized signal, including:
    所述第一均衡子模块对所述初始信号进行第一均衡处理,得到第一均衡信号;The first equalization sub-module performs a first equalization process on the initial signal to obtain a first equalized signal;
    所述第二均衡子模块对所述第一均衡信号进行第二均衡处理,得到第二均衡信号,所述均衡模块得到的所述均衡信号包括所述第一均衡信号和所述第二均衡信号,所述降维子信号在所述均衡信号中的对应位置为所述降维子信号在所述第二均衡信号中的对应位置,所述均衡子信号为所述第二均衡信号中的子信号。The second equalization sub-module performs a second equalization process on the first equalized signal to obtain a second equalized signal, and the equalized signal obtained by the equalized module includes the first equalized signal and the second equalized signal , the corresponding position of the dimensionality reduction sub-signal in the equalized signal is the corresponding position of the dimensionality reduction sub-signal in the second equalized signal, and the equalized sub-signal is a sub-signal in the second equalized signal Signal.
  23. 根据权利要求22所述的方法,其特征在于,The method of claim 22, wherein,
    所述粗判决模块根据所述均衡信号确定所述降维位置信息,包括:所述粗判决模块根据所述第二均衡信号确定所述降维位置信息;The rough judgment module determining the dimensionality reduction location information according to the equalized signal includes: the rough judgment module determining the dimensionality reduction location information according to the second equalization signal;
    所述粗判决模块根据所述均衡信号和所述降维位置信息确定所述降维信号,包括:所述粗判决模块根据所述第一均衡信号和所述降维位置信息确定所述降维信号。The rough judgment module determines the dimensionality reduction signal according to the equalization signal and the dimensionality reduction position information, including: the rough judgment module determines the dimensionality reduction signal according to the first equalization signal and the dimensionality reduction position information Signal.
  24. 根据权利要求18至23任一项所述的方法,其特征在于,A method according to any one of claims 18 to 23, wherein,
    所述滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,所述目标路径分支中包括所述n个时刻中的各个时刻的判决值,所述n个时刻中的每个时刻的判决值是所述MLSE模块基于所述每个时刻的滤波子信号获得的,所述目标信号中包括所述n个时刻中的各个时刻的目标子信号;The filtered signal includes filtered sub-signals at each of the n moments, the target path branch includes decision values at each of the n moments, and each of the n moments The decision value of is obtained by the MLSE module based on the filtered sub-signal at each moment, and the target signal includes the target sub-signal at each moment in the n moments;
    所述映射模块根据所述降维位置信息,对所述滤波信号的目标路径分支进行映射得到目标信号,包括:The mapping module maps the target path branch of the filtered signal to obtain the target signal according to the dimensionality reduction position information, including:
    所述映射模块根据所述n个时刻中的每个时刻的判决值和所述每个时刻对应的位置标识值,确定所述每个时刻的目标子信号;The mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment;
    所述映射模块根据所述n个时刻的目标子信号确定所述目标信号。The mapping module determines the target signal according to the target sub-signals at the n time points.
  25. 根据权利要求24所述的方法,其特征在于,The method of claim 24, wherein,
    所述判决值为硬值,所述映射模块根据所述n个时刻中的每个时刻的判决值和所述每个时刻对应的位置标识值,确定所述每个时刻的目标子信号,包括:The decision value is a hard value, and the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including :
    所述映射模块将所述n个时刻中的每个时刻的判决值与所述每个时刻对应的位置标识值之和,确定为所述每个时刻的目标子信号。The mapping module determines the sum of the decision value at each of the n moments and the position identification value corresponding to each moment as the target sub-signal at each moment.
  26. 根据权利要求24所述的方法,其特征在于,The method of claim 24, wherein,
    所述判决值为软值,所述映射模块根据所述n个时刻中的每个时刻的判决值和所述每个时刻对应的位置标识值,确定所述每个时刻的目标子信号,包括:The decision value is a soft value, and the mapping module determines the target sub-signal at each moment according to the decision value at each moment in the n moments and the position identification value corresponding to each moment, including :
    所述映射模块根据所述n个时刻中的每个时刻对应的位置标识值,确定所述每个时 刻对应的映射规则;The mapping module determines the mapping rule corresponding to each moment according to the position identification value corresponding to each moment in the n times;
    所述映射模块根据所述每个时刻的判决值和所述每个时刻对应的位置标识值对应的映射规则,确定所述每个时刻的目标子信号。The mapping module determines the target sub-signal at each time according to the decision value at each time and the mapping rule corresponding to the location identification value corresponding to each time.
  27. 根据权利要求26所述的方法,其特征在于,The method of claim 26, wherein
    所述均衡信号的信号状态包括-3、-1、1和3,所述降维信号的信号状态包括-1和1,所述位置标识值包括-2、0和2;The signal state of the equalized signal includes -3, -1, 1, and 3, the signal state of the dimensionality reduction signal includes -1 and 1, and the position identification value includes -2, 0, and 2;
    当p_ind_d(k)=-2时,所述映射规则为hd_out(k)=[max,-ld_out(k)];When p_ind_d(k)=-2, the mapping rule is hd_out(k)=[max, -ld_out(k)];
    当p_ind_d(k)=0时,所述映射规则为hd_out(k)=[ld_out(k),max];When p_ind_d(k)=0, the mapping rule is hd_out(k)=[ld_out(k), max];
    当p_ind_d(k)=2时,所述映射规则为hd_out(k)=[-max,ld_out(k)];When p_ind_d(k)=2, the mapping rule is hd_out(k)=[-max, ld_out(k)];
    其中,所述p_ind_d(k)为第k时刻对应的位置标识值,所述ld_out(k)为所述第k时刻的判决值,所述hd_out(k)为所述第k时刻的目标子信号,max为常数,k为不大于n的正整数,在所述映射规则的表述[A,B]中,A为目标子信号的高位比特,B为目标子信号的低位比特。Wherein, the p_ind_d(k) is the position identification value corresponding to the kth moment, the ld_out(k) is the judgment value at the kth moment, and the hd_out(k) is the target sub-signal at the kth moment , max is a constant, k is a positive integer not greater than n, in the expression [A, B] of the mapping rule, A is the upper bit of the target sub-signal, and B is the lower bit of the target sub-signal.
  28. 根据权利要求19至27任一项所述的方法,其特征在于,A method according to any one of claims 19 to 27, wherein
    所述信号处理装置还包括自相关估计模块,所述自相关估计模块分别与所述均衡模块、所述滤波模块和所述MLSE模块连接;The signal processing device also includes an autocorrelation estimation module, the autocorrelation estimation module is respectively connected to the equalization module, the filtering module and the MLSE module;
    所述方法还包括:所述自相关估计模块根据所述均衡信号确定所述滤波模块的滤波系数;The method further includes: the autocorrelation estimation module determines the filter coefficient of the filter module according to the equalized signal;
    所述滤波模块对所述降维信号进行滤波处理,包括:所述滤波模块根据所述滤波系数对所述降维信号进行滤波处理;The filtering module performs filtering processing on the dimensionality reduction signal, including: the filtering module performs filtering processing on the dimensionality reduction signal according to the filtering coefficient;
    所述MLSE模块确定所述滤波信号的目标路径分支,包括:所述MLSE模块根据所述滤波系数确定所述滤波信号的目标路径分支。The MLSE module determining the target path branch of the filtered signal includes: the MLSE module determining the target path branch of the filtered signal according to the filter coefficient.
  29. 根据权利要求28所述的方法,其特征在于,The method of claim 28, wherein,
    所述滤波信号中包括所述n个时刻中的各个时刻的滤波子信号,The filtered signal includes filtered sub-signals at each of the n times,
    所述MLSE模块根据所述滤波系数确定所述滤波信号的目标路径分支,包括:The MLSE module determines the target path branch of the filtered signal according to the filter coefficient, including:
    所述MLSE模块根据所述滤波系数和所述n个时刻中的每个时刻的滤波子信号确定所述每个时刻的分支度量;The MLSE module determines the branch metric at each moment according to the filter coefficient and the filter sub-signal at each moment in the n moments;
    所述MLSE模块根据所述n个时刻的分支度量确定所述滤波信号的目标路径分支。The MLSE module determines a target path branch of the filtered signal according to the branch metrics at the n moments.
  30. 根据权利要求18至29任一项所述的方法,其特征在于,A method according to any one of claims 18 to 29, wherein,
    所述信号处理装置还包括译码模块,所述译码模块与所述映射模块连接;The signal processing device further includes a decoding module connected to the mapping module;
    所述方法还包括:所述译码模块对所述目标信号进行译码,以恢复出数据。The method further includes: the decoding module decodes the target signal to recover data.
  31. 一种处理芯片,其特征在于,包括权利要求1至17任一项所述的信号处理装置。A processing chip, characterized by comprising the signal processing device according to any one of claims 1 to 17.
  32. 根据权利要求31所述的处理芯片,其特征在于,所述处理芯片为数字信号处理DSP芯片。The processing chip according to claim 31, characterized in that, the processing chip is a digital signal processing DSP chip.
  33. 一种信号接收设备,其特征在于,包括存储芯片和处理芯片;A signal receiving device, characterized in that it includes a memory chip and a processing chip;
    所述存储芯片用于存储计算机程序;The memory chip is used to store computer programs;
    所述处理芯片用于执行所述存储芯片中存储的计算机程序以使得所述信号接收设备执行如权利要求18至30任一项所述的信号处理方法。The processing chip is used to execute the computer program stored in the storage chip so that the signal receiving device executes the signal processing method according to any one of claims 18 to 30.
  34. 一种信号传输系统,其特征在于,包括:信号发送设备和如权利要求33所述的信号接收设备,所述信号发送设备与所述信号接收设备通过传输链路连接,所述信号发送 设备用于通过所述传输链路向所述信号接收设备发送信号。A signal transmission system, characterized in that it comprises: a signal sending device and a signal receiving device according to claim 33, the signal sending device is connected to the signal receiving device through a transmission link, and the signal sending device uses for sending a signal to the signal receiving device through the transmission link.
  35. 根据权利要求34所述的信号传输系统,其特征在于,所述信号发送设备为光发送机,所述信号接收设备为光接收机,所述传输链路为光链路。The signal transmission system according to claim 34, wherein the signal sending device is an optical transmitter, the signal receiving device is an optical receiver, and the transmission link is an optical link.
  36. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质中存储有计算机程序,所述计算机程序被执行时实现如权利要求18至30任一项所述的信号处理方法。A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed, the signal processing method according to any one of claims 18 to 30 is implemented.
  37. 一种计算机程序产品,其特征在于,所述计算机程序产品包括程序或代码,所述程序或代码被执行时,实现如权利要求18至30任一项所述的信号处理方法。A computer program product, characterized in that the computer program product includes a program or code, and when the program or code is executed, the signal processing method according to any one of claims 18 to 30 is realized.
PCT/CN2022/108339 2021-08-04 2022-07-27 Signal processing method and apparatus, and processing chip and signal transmission system WO2023011294A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202110890844.8 2021-08-04
CN202110890844.8A CN115706688A (en) 2021-08-04 2021-08-04 Signal processing method and device, processing chip and signal transmission system

Publications (1)

Publication Number Publication Date
WO2023011294A1 true WO2023011294A1 (en) 2023-02-09

Family

ID=85155228

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/108339 WO2023011294A1 (en) 2021-08-04 2022-07-27 Signal processing method and apparatus, and processing chip and signal transmission system

Country Status (2)

Country Link
CN (1) CN115706688A (en)
WO (1) WO2023011294A1 (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1599364A (en) * 2004-08-16 2005-03-23 西安电子科技大学 Data equalization method for burst communication
US20110051796A1 (en) * 2009-08-27 2011-03-03 Ali Khayrallah Equalization and residual self-interference suppression using serial localization with indecision
CN109981500A (en) * 2017-12-28 2019-07-05 海思光电子有限公司 A kind of method and signal processing apparatus of signal processing
CN110061761A (en) * 2018-01-19 2019-07-26 华为技术有限公司 Signal equalizing method and device, photoreceiver
US10404289B1 (en) * 2018-05-31 2019-09-03 Inphi Corporation Maximum likelihood error detection for decision feedback equalizers with PAM modulation
CN110740105A (en) * 2018-07-20 2020-01-31 华为技术有限公司 Signal processing method and device
CN112260972A (en) * 2020-10-21 2021-01-22 天津大学 Equalization method based on bit field superimposed training sequence under symbol interference channel

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1599364A (en) * 2004-08-16 2005-03-23 西安电子科技大学 Data equalization method for burst communication
US20110051796A1 (en) * 2009-08-27 2011-03-03 Ali Khayrallah Equalization and residual self-interference suppression using serial localization with indecision
CN109981500A (en) * 2017-12-28 2019-07-05 海思光电子有限公司 A kind of method and signal processing apparatus of signal processing
CN110061761A (en) * 2018-01-19 2019-07-26 华为技术有限公司 Signal equalizing method and device, photoreceiver
US10404289B1 (en) * 2018-05-31 2019-09-03 Inphi Corporation Maximum likelihood error detection for decision feedback equalizers with PAM modulation
CN110740105A (en) * 2018-07-20 2020-01-31 华为技术有限公司 Signal processing method and device
CN112260972A (en) * 2020-10-21 2021-01-22 天津大学 Equalization method based on bit field superimposed training sequence under symbol interference channel

Also Published As

Publication number Publication date
CN115706688A (en) 2023-02-17

Similar Documents

Publication Publication Date Title
CN109328451B (en) System and method for precoding faster-than-nyquist signaling
CA2658148C (en) A receiver structure and method for the demodulation of a quadrature-modulated signal
CN108781195B (en) Method and apparatus for providing high speed equalization
US8837626B2 (en) Conditional adaptation of linear filters in a system having nonlinearity
US9774400B2 (en) Method and apparatus for low-complexity quasi-reduced state soft-output equalizer
CN109873777B (en) Error correction method and error correction device
CN110061761B (en) Signal equalization method and device and optical receiver
US20230327921A1 (en) Decision feedback equalization embedded in slicer
US9306780B2 (en) Optical transmission for binary and duobinary modulation formats
KR20200132497A (en) OPTICAL TRANSMISSION aPPARATUS AND METHOD FOR PROCESSING SIGNAL BASED ON DIRECT-DETECTION
Li et al. Enhanced performance of a phosphorescent white LED CAP 64QAM VLC system utilizing deep neural network (DNN) post equalization
US7003716B2 (en) Method and apparatus for using multi-dimensional trellis codes over multi-path channels
US20090052516A1 (en) Per-survivor based adaptive equalizer
WO2023011294A1 (en) Signal processing method and apparatus, and processing chip and signal transmission system
CN113055321A (en) Optical communication data receiving method and system capable of suppressing burst error propagation
US20140369398A1 (en) Digital filter, partial response equalizer, and digital coherent receiver device and method
WO2020095916A1 (en) Optical transmission system
US11804991B2 (en) Sequence detection device using path-selective sequence detection and associated sequence detection method
Che Ultra-low-complexity map demapper for bandwidth-limited pluggable coherent optics beyond 800g
CN113055319B (en) Signal equalization method and device
CN115801137A (en) Signal processing method and system of optical communication receiving end
Cuc et al. Performances analysis of Turbo codes, LDPC codes and polar codes using AWGN channel with and without inter symbol interference
Che Is It Meaningful to Pursue Higher Symbol Rate beyond Bandwidth Constraint for Short-Reach Interconnectsƒ
Zhou et al. Digital signal processing for faster-than-Nyquist non-orthogonal systems: An overview
WO2023179850A1 (en) Equalisation module for a digital receiver

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22852008

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE