WO2022269837A1

WO2022269837A1 - Solid-state image capturing device

Info

Publication number: WO2022269837A1
Application number: PCT/JP2021/023865
Authority: WO
Inventors: 遥之中川
Original assignee: ソニーセミコンダクタソリューションズ株式会社
Priority date: 2021-06-23
Filing date: 2021-06-23
Publication date: 2022-12-29

Abstract

[Problem] To reduce noise. [Solution] This solid-state image capturing device comprises: a photoelectric conversion unit that generates charge in accordance with a light reception amount; a first charge storage unit that is electrically connected to one end of the photoelectric conversion unit and that stores the charge; a drain unit one end of which is electrically connected to the first charge storage unit and which drains the charge stored in the first charge storage unit; and a voltage control unit that controls the voltage level at one or both of the other end of the photoelectric conversion unit and the other end of the drain unit such that the voltage level at the other end of the photoelectric conversion unit is substantially the same as the voltage level at the other end of the drain unit at a drain timing when the drain unit drains the charge.

Description

Solid-state imaging device

An embodiment according to the present disclosure relates to a solid-state imaging device.

A compound semiconductor such as InGaAs is sometimes used as a photoelectric conversion unit of a solid-state imaging device. In addition, in the solid-state imaging device, readout of signal charges that have been photoelectrically converted and accumulated is performed. (See Patent Document 1).

WO2017/150167 JP 2011-187544 A

However, for example, as the amount of signal in the previous frame increases, it may become more difficult to appropriately reset the charge accumulated in the photoelectric conversion unit (InGaAs). Charges remaining without being reset may cause noise such as afterimages in the next frame.

Therefore, the present disclosure provides a solid-state imaging device capable of reducing noise.

In order to solve the above problems, according to the present disclosure,
a photoelectric conversion unit that generates an electric charge according to the amount of light received;
a first charge storage unit that is electrically connected to one end of the photoelectric conversion unit and that stores the charge;
a discharging portion having one end electrically connected to the first charge accumulating portion for discharging the charges accumulated in the first charge accumulating portion;
The other terminal of the photoelectric conversion unit is arranged so that the voltage level of the other end of the photoelectric conversion unit and the voltage level of the other end of the discharge unit are substantially the same at the discharge timing when the discharge unit discharges the charge. and a voltage control section that controls the voltage level of at least one of the end and the other end of the discharge section.

The voltage control section restores substantially the same voltage levels of the other end of the photoelectric conversion section and the other end of the discharge section while the charge is being discharged by the discharge section. A voltage level of at least one of the other end and the other end of the discharge section may be controlled.

The photoelectric conversion part may contain a compound semiconductor material.

The voltage control section may control the voltage level of the other end of the photoelectric conversion section so as to be substantially the same as the substantially constant voltage level of the other end of the discharge section at the discharge timing.

The voltage control section may control the voltage level of the other end of the discharge section so that it becomes substantially the same as the substantially constant voltage level of the other end of the photoelectric conversion section at the discharge timing.

The voltage control section adjusts the photoelectric conversion section to a predetermined voltage level between the voltage level of the other end of the photoelectric conversion section and the voltage level of the other end of the discharge section at the discharge timing. The voltage level of both the other end and the other end of the drain may be controlled.

An electrode may be further provided which is electrically connected to the other end of the photoelectric conversion section and to which a voltage is applied from the voltage control section.

The electrodes are arranged across the plurality of pixels and spaced apart from each other by a predetermined distance so that the voltage control section can control the voltage level of the other end of the photoelectric conversion section for the plurality of pixels. It may be divided into a plurality of parts and arranged so as to be separated from each other.

The electrodes may be divided and arranged in a matrix.

The electrodes may be arranged in a plurality of rows or divided into a plurality of rows.

The voltage control section may control the voltage level of at least one of the other end of the photoelectric conversion section and the other end of the discharge section, and may control discharge of the charge by the discharge section.

a first semiconductor chip on which the photoelectric conversion unit is arranged;
A second semiconductor chip stacked with the first semiconductor chip and having the first charge storage portion and the discharge portion disposed thereon may further be provided.

The voltage control section may simultaneously control the voltage level of at least one of the other end of the photoelectric conversion section and the other end of the discharge section for a plurality of pixels that are exposed at the same time.

It is a figure which shows an example of schematic structure of the solid-state imaging device to which this technique is applied. 3 is a diagram showing an example of a pixel circuit of each pixel of the solid-state imaging device according to the first embodiment; FIG. 2 is a cross-sectional view showing an example of a pixel structure according to the first embodiment; FIG. FIG. 4 is a schematic diagram showing an example of potentials of a first charge storage section and a second charge storage section according to the first embodiment; FIG. 3 is a schematic diagram showing an example of potential distribution of a photoelectric conversion unit, a first charge storage unit, and an ejection transistor according to the first embodiment; 4 is a top view showing an example of the configuration of electrodes according to the first embodiment; FIG. FIG. 4 is a top view showing an example of the configuration of electrodes according to a comparative example; 4 is a timing chart showing an example of the operation of the solid-state imaging device according to the first embodiment; 4 is a timing chart showing an example of operation of a solid-state imaging device according to a comparative example; FIG. 10 is a top view showing an example of the configuration of electrodes according to a first modified example; FIG. 11 is a top view showing an example of the configuration of electrodes according to a second modified example; It is a figure which shows an example of the pixel circuit of each pixel of the solid-state imaging device by 2nd Embodiment. FIG. 11 is a schematic diagram showing an example of potential distributions of a photoelectric conversion unit, a first charge storage unit, and an ejection transistor according to a second embodiment; 9 is a timing chart showing an example of the operation of the solid-state imaging device according to the second embodiment; It is a figure which shows an example of the pixel circuit of each pixel of the solid-state imaging device by 3rd Embodiment. FIG. 11 is a schematic diagram showing an example of potential distribution of a photoelectric conversion unit, a first charge storage unit, and an ejection transistor according to a third embodiment; 9 is a timing chart showing an example of the operation of the solid-state imaging device according to the third embodiment; It is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied. FIG. 2 is a diagram illustrating a usage example of the solid-state imaging device of FIG. 1; 1 is a diagram showing an example of a schematic configuration of an endoscopic surgery system; FIG. 3 is a block diagram showing an example of functional configurations of a camera head and a CCU; FIG. 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; FIG. FIG. 4 is an explanatory diagram showing an example of installation positions of an outside information detection unit and an imaging unit;

Hereinafter, embodiments of solid-state imaging devices will be described with reference to the drawings. The following description will focus on main components of the solid-state imaging device, but the solid-state imaging device may have components and functions that are not illustrated or described. The following description does not exclude components or features not shown or described.

<First Embodiment>
FIG. 1 shows an example of a schematic configuration of a solid-state imaging device to which the present technology is applied.

The solid-state imaging device 1 of FIG. 1 includes a semiconductor substrate 12 using, for example, single crystal silicon (Si) as a semiconductor, a pixel array region 3 in which pixels 2 are two-dimensionally arranged in a matrix, and a peripheral circuit region therearound. is configured with The peripheral circuit area includes a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, a control circuit 8, and the like.

The pixel 2 has a photoelectric conversion section made of a semiconductor thin film and a plurality of pixel transistors. A plurality of pixel transistors are composed of, for example, a plurality of MOS transistors such as a reset transistor, an amplification transistor, and a selection transistor.

The control circuit 8 receives an input clock and data instructing the operation mode, etc., and outputs data such as internal information of the solid-state imaging device 1 . That is, the control circuit 8 generates a clock signal and a control signal that serve as a reference for the operation of the vertical driving circuit 4, the column signal processing circuit 5, the horizontal driving circuit 6, etc. based on the vertical synchronizing signal, the horizontal synchronizing signal, and the master clock. do. The control circuit 8 then outputs the generated clock signal and control signal to the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, and the like.

The vertical drive circuit 4 is composed of, for example, a shift register, selects a predetermined pixel drive wiring 10, supplies a pulse for driving the pixels 2 to the selected pixel drive wiring 10, and drives the pixels 2 row by row. do. That is, the vertical drive circuit 4 sequentially selectively scans each pixel 2 in the pixel array region 3 in the vertical direction on a row-by-row basis. is supplied to the column signal processing circuit 5 through the vertical signal line 9 .

The column signal processing circuit 5 is arranged for each column of the pixels 2, and performs signal processing such as noise removal on the signals output from the pixels 2 of one row for each column. For example, the column signal processing circuit 5 performs signal processing such as CDS (Correlated Double Sampling) for removing pixel-specific fixed pattern noise and AD conversion.

The horizontal driving circuit 6 is composed of, for example, a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 5 in turn, and outputs pixel signals from each of the column signal processing circuits 5 to the horizontal signal line. 11 to output.

The output circuit 7 performs signal processing on the signals sequentially supplied from each of the column signal processing circuits 5 through the horizontal signal line 11 and outputs the processed signals. The output circuit 7 may, for example, perform only buffering, or may perform black level adjustment, column variation correction, various digital signal processing, and the like. The input/output terminal 13 exchanges signals with the outside.

The solid-state imaging device 1 configured as described above is a CMOS image sensor called a column AD system in which column signal processing circuits 5 that perform CDS processing and AD conversion processing are arranged for each column.

<Pixel circuit>
FIG. 2 shows an example of a pixel circuit of each pixel 2 of the solid-state imaging device 1 according to the first embodiment.

Each pixel 2 has a photoelectric conversion section 21, a first charge storage section 22, a discharge transistor 23, a transfer transistor 24, a second charge storage section 25, a reset transistor 26, an amplification transistor 27, and a selection transistor 28. The discharge transistor 23, the transfer transistor 24, and the reset transistor 26 are, for example, P-type MOS transistors. The amplification transistor 27 and the selection transistor 28 are, for example, N-type MOS transistors.

The photoelectric conversion unit 21 is made of a semiconductor thin film using a compound semiconductor such as InGaAs, and generates charges (signal charges) according to the amount of received light. A cathode of the photoelectric conversion section 21 is electrically connected to the vertical drive circuit (voltage control section) 4 via the pixel drive wiring 10 .

Further, the photoelectric conversion section 21 has a first end portion 21A (the other end) and a second end portion 21B (one end). The first end portion 21A is electrically connected to the vertical drive circuit 4 . The second end portion 21B is electrically connected to the first charge storage portion 22 . The voltage level of the first end portion 21A is also called a film voltage VA of the photoelectric conversion portion 21, which is a photoelectric conversion film. The membrane voltage VA is controlled by the vertical drive circuit 4 . Details of the vertical driving circuit 4 will be described later with reference to FIGS. 5 and 8. FIG.

The first charge storage unit (SN) 22 stores charges generated by the photoelectric conversion unit 21 . The first charge storage unit 22 is, for example, a capacitive element including at least one of PN junction capacitance, MOS capacitance, and wiring capacitance.

When the discharge transistor 23 is turned on by the discharge signal OFG, the electric charge accumulated in the first charge accumulation section 22 is discharged to the drain, thereby resetting the potential of the first charge accumulation section 22 . The drain of the discharge transistor 23 is connected to the reference voltage node of the reset power supply voltage.

Also, the discharge transistor (discharge part) 23 has a third end 23A (one end) and a fourth end 23B (other end). The third end portion 23A is electrically connected to the first charge storage portion 22 . The fourth end 23B is electrically connected to the reference voltage node of the reset power supply voltage. The voltage level of the fourth end 23B is also called reset voltage VB. The reset voltage VB is fixed at the reset power supply voltage.

The transfer transistor 24 transfers the charge accumulated in the first charge accumulation section 22 to the second charge accumulation section 25 when turned on by the transfer signal TRG.

A second charge accumulation unit (FD, Floating Diffusion) 25 accumulates charges transferred from the transfer transistor 24 . The second charge storage unit 25 is, for example, a capacitive element including at least one of PN junction capacitance, MOS capacitance, and wiring capacitance.

When the reset transistor 26 is turned on by the reset signal RST, the electric charge accumulated in the second charge accumulation section 25 is discharged to the source (reference voltage node VDD), thereby reducing the potential of the second charge accumulation section 25 to Reset.

The amplification transistor 27 outputs a pixel signal corresponding to the accumulated potential of the second charge accumulation section 25 . That is, the amplification transistor 27 constitutes a source follower circuit together with a load MOS (not shown) as a constant current source connected via the vertical signal line 9, and the charge accumulated in the second charge accumulation section 25 is A pixel signal indicating the corresponding level is output from the amplification transistor 27 to the column signal processing circuit 5 via the selection transistor 28 .

The selection transistor 28 is turned on when the pixel 2 is selected by the selection signal SEL, and outputs the pixel signal of the pixel 2 to the column signal processing circuit 5 via the vertical signal line 9 . Each signal line through which the discharge signal OFG, the transfer signal TRG, the selection signal SEL, and the reset signal RST are transmitted corresponds to the pixel drive wiring 10 in FIG.

<Pixel structure>
Next, the pixel structure of the first embodiment of the solid-state imaging device 1 will be described.

FIG. 3 is a cross-sectional view showing an example of the pixel structure according to the first embodiment.

The solid-state imaging device 1 further includes a first semiconductor chip 12A and a second semiconductor chip 12B. The first semiconductor chip 12A and the second semiconductor chip 12B are bonded together at a bonding surface S. The first semiconductor chip 12A and the second semiconductor chip 12B are, for example, Cu--Cu connected.

The photoelectric conversion unit 21 of each pixel 2 described with reference to FIG. 2 is arranged for each pixel on the first semiconductor chip 12A. The readout circuit including the first charge storage section 22 and discharge transistor 23 of each pixel 2 described with reference to FIG. are placed for each. Note that in the cross-sectional view of FIG. 3, the first charge storage unit 22, the discharge transistor 23, the transfer transistor 24, the second charge storage unit 25, the reset transistor 26, the amplification transistor 27, which are arranged in the second semiconductor chip 12B. Also, the illustration of the selection transistor 28 is omitted.

An N-type semiconductor thin film 41 serving as a photoelectric conversion section 21 is formed over the entire surface of the pixel array region 3 on the upper side, which is the light incident side, of the first semiconductor chip 12A. For the N-type semiconductor thin film 41, InGaP, InAlP, InGaAs, InAlAs, or a compound semiconductor having a chalcopyrite structure is used. A compound semiconductor with a chalcopyrite structure is a material that provides a high light absorption coefficient and high sensitivity over a wide wavelength range, and is preferably used as the N-type semiconductor thin film 41 for photoelectric conversion. Such chalcopyrite structure compound semiconductors are composed of elements surrounding IV group elements such as Cu, Al, Ga, In, S, and Se, and are A mixed crystal etc. are illustrated.

In the present embodiment, an InGaAs compound semiconductor is used as an example of the N-type semiconductor thin film 41 .

On the lower side of the N-type semiconductor thin film 41, which is the second semiconductor chip 12B (circuit) side, a high-concentration P-type layer 42 that constitutes a pixel electrode is formed for each pixel. Between the high-concentration P-type layers 42 formed for each pixel, an N-type layer 43 as a pixel separation region for separating each pixel 2 is formed of a compound semiconductor such as InP, for example. This N-type layer 43 has a role of preventing dark current in addition to functioning as a pixel separation region.

On the other hand, an N-type layer 44 having a higher concentration than the N-type semiconductor thin film 41 is also formed on the upper side of the N-type semiconductor thin film 41, which is the light incident side, using a compound semiconductor such as InP used as a pixel separation region. It is This high-concentration N-type layer 44 functions as a barrier layer that prevents backflow of charges generated in the N-type semiconductor thin film 41 . Compound semiconductors such as InGaAs, InP, and InAlAs can be used as the material of the high-concentration N-type layer 44, for example.

An anti-reflection coating (ARC, Anti-Reflective Coating) 45 is formed on the high-concentration N-type layer 44 as a barrier layer. Materials for the antireflection film 45 include, for example, silicon nitride (SiN), hafnium oxide (HfO ₂ ), aluminum oxide (Al ₂ O ₃ ), zirconium oxide (ZrO ₂ ), tantalum oxide (Ta ₂ O ₅ ), oxide Titanium (TiO ₂ ) or the like can be used.

On the antireflection film 45, an upper electrode 48 of the electrodes sandwiching the N-type semiconductor thin film 41 is provided. Electrode 48 is a transparent electrode. For example, ITO (Indium Tin Oxide) or the like can be used as the material of the electrode 48 . A voltage is applied to the electrode 48 from the vertical driving circuit 4 .

A passivation layer 51 and an insulating layer 52 are formed below the high-concentration P-type layer 42 constituting the pixel electrode and the N-type layer 43 as the pixel separation region. A connection electrode 53A of the first semiconductor chip 12A is formed so as to penetrate the passivation layer 51 and the insulating layer 52A. The connection electrodes 53B of the second semiconductor chip 12B are formed so as to penetrate the insulating layer 52B. The

connection electrodes

53A and 53B electrically connect the high-concentration P-type layer 42 that constitutes the pixel electrode and the first charge storage section 22 that stores charges. The material of the

connection electrodes

53A and 53B is, for example, copper (Cu).

FIG. 4 is a schematic diagram showing an example of potentials of the first charge storage section 22 and the second charge storage section 25 according to the first embodiment.

The first charge storage section 22 and the second charge storage section 25 are formed of, for example, diffusion layers of a silicon substrate (second semiconductor chip 12B).

The first charge storage section 22 is electrically connected to the connection electrode 53B. Therefore, the charges generated by the photoelectric conversion section 21 pass through the

connection electrodes

53A and 53B and are accumulated in the first charge accumulation section 22 .

The potential of the discharge transistor 23 is lowered by turning on the discharge transistor 23 before exposure is performed. After that, the discharge transistor 23 is turned off. As a result, the charges accumulated in the first charge accumulation section 22 are discharged, and the first charge accumulation section 22 is reset.

After the exposure is completed, the potential of the transfer transistor 24 is lowered by turning on the transfer transistor 24 . As a result, the first charge storage section 22 and the second charge storage section 25 are coupled, and the charge stored in the first charge storage section 22 by exposure is divided and moved to the second charge storage section 25 . The charge accumulated in the second charge accumulation section 25 is read as a pixel signal through the amplification transistor 27, the selection transistor 28 and the vertical signal line 9, as shown in FIG.

<Reset and Potential of First Charge Accumulator>
Next, resetting of the first charge storage section 22 by the discharge transistor 23 will be described.

FIG. 5 is a schematic diagram showing an example of potential distribution of the photoelectric conversion section 21, the first charge storage section 22, and the discharge transistor 23 according to the first embodiment.

FIG. 5 shows part of the cross-sectional view of the pixel 2 and part of the readout circuit. Further, in FIG. 5, a diffusion layer 49 is further provided. Diffusion layer 49 is electrically connected to P-type layer 42, which is an anode. In the example shown in FIG. 5, one diffusion layer 49 is provided for each pixel 2, forming a pn junction between the diffusion layer 49 and the N-type semiconductor thin film 41. In the example shown in FIG. The diffusion layer 49 is formed by diffusing Zn, for example.

During the accumulation time, photoelectrically converted charges (holes) are accumulated across part of the photoelectric conversion section 21 and the first charge accumulation section 22 .

Since the discharge transistor 23 is off, the amount of charges (holes) accumulated in the first charge accumulation unit 22 increases as the signal amount increases. Therefore, the potential of the first charge storage section 22 rises as indicated by the solid line. On the other hand, the smaller the signal amount, the smaller the amount of charges (holes) accumulated in the first charge accumulation unit 22 . Therefore, the potential of the first charge storage section 22 is lowered as indicated by the dotted line.

When the discharge transistor 23 is turned on, the charge in the first charge storage section 22 is reset. That is, part of the photoelectric conversion unit 21 and the charge accumulated in the first charge accumulation unit 22 are discharged to the drain of the discharge transistor 23 .

Here, if there is some kind of barrier that restricts the movement of charges, it may be difficult to completely reset the charges. That is, there is a possibility that some charges remain in the photoelectric conversion film 21 without being discharged even when the discharge transistor 23 is in the ON state.

The amount of charge that is not discharged by the barrier may fluctuate depending on the amount of signal. For example, the more intense the light that the pixel 2 is exposed to, the greater the amount of charge remaining in the photoelectric conversion film 21 after the reset of the first charge storage unit 22 . The amount of charge stored in the first charge storage unit 22 changes depending on the amount of charge remaining in the photoelectric conversion unit 21 . For example, if the signal amount in a certain frame is large, signal charges larger than the original signal amount will be read out in the next frame. For example, this leads to noise such as an afterimage that occurs when the light source, which is the subject, moves at high speed. That is, noise is generated under the influence of the signal amount of the previous frame.

Therefore, the vertical drive circuit 4 controls the film voltage VA of the photoelectric conversion unit 21 so that the film voltage VA and the reset voltage VB are substantially the same at the timing of resetting the charges in the first charge storage unit 22 . The vertical driving circuit 4 maintains the voltage level of the first end 21A of the photoelectric conversion unit 21 so that the voltage level of the fourth end 23B of the discharge transistor 23 and the voltage level of the fourth end 23B of the discharge transistor 23 are substantially the same while the charge is discharged by the discharge transistor 23. Control the voltage level (membrane voltage VA). Further, the vertical driving circuit 4 lowers the film voltage VA to the reset voltage VB and returns it to the reset voltage VB while the discharge transistor 23 is discharging electric charges.

Since the discharge transistor 23 is in the ON state, when the voltage level (film voltage VA) of the first end portion 21A of the photoelectric conversion section 21 decreases, the N-type semiconductor of the photoelectric conversion section 21 is discharged from the reference voltage node side of the reset power supply voltage. Holes flow in the thin film 41 . Therefore, regardless of the amount of signal in the previous frame, the N-type semiconductor thin film 41 is charged.

After that, when the film voltage VA returns to its original state, the amount of charge remaining in the photoelectric conversion unit 21 is determined by the barrier regardless of the signal amount of the previous frame. Thereby, the amount of charge remaining in the photoelectric conversion unit 21 can be made substantially constant by the barrier. As a result, it is possible to suppress the influence of variations in the amount of residual charge when resetting the first charge storage section 22, and to suppress noise such as afterimages. In addition, by performing the above voltage control on a plurality of pixels 2, the influence of variations in the amount of residual charge for each pixel 2 can be suppressed. That is, regardless of the amount of signal in the previous frame (state before resetting), the charges can be uniformly reset among the pixels 2, and the resetting of the charges in the first charge storage section 22 can be performed more appropriately. can.

<Electrode>
FIG. 6 is a top view showing an example of the configuration of the electrodes 48 according to the first embodiment.

The electrode 48 is electrically connected to the first end portion 21A of the photoelectric conversion portion 21 and is applied with voltage from the vertical drive circuit 4 .

As shown in FIG. 6, the electrodes 48 are divided into a plurality of parts and arranged so as to be separated from each other by a predetermined distance PD. More specifically, the electrodes 48 are divided and arranged in a matrix. Further, the electrodes 48 are arranged over the plurality of pixels 2 so that the vertical drive circuit 4 can control the voltage level of the first end portion 21A of the photoelectric conversion section 21 for the plurality of pixels 2 .

FIG. 7 is a top view showing an example of the configuration of the electrode 48 according to the comparative example.

In the example shown in FIG. 7, the electrode 48 is provided over the entire surface of the pixel array region 3 . However, in this case, the parasitic capacitance and resistance of the electrode 48 are increased, resulting in increased RC delay. The vertical driving circuit 4 changes the voltage level of the first end portion 21A by changing the voltage applied to the electrode 48 . If there is a delay in changing the voltage applied to the electrode 48, it may become difficult to appropriately control the voltage level of the first end 21A.

On the other hand, in the first embodiment, the RC delay of the electrode 48 can be suppressed by providing an interval so as to divide it into a plurality of parts. Thereby, the membrane voltage VA can be changed at a higher speed, and the frame rate can be improved.

Also, if the predetermined distance PD is too wide, it may be difficult to appropriately control the voltage of the first end portion 21A for all the pixels 2 . On the other hand, if the predetermined distance PD is too narrow, voltage control may be delayed as in the comparative example. The predetermined distance PD is determined within a range in which appropriate voltage control is possible.

<Action>
Next, operation of the solid-state imaging device 1 will be described.

FIG. 8 is a timing chart showing an example of the operation of the solid-state imaging device 1 according to the first embodiment. FIG. 8 shows a timing chart of the discharge signal OFG, reset signal RST and transfer signal TRG. That is, FIG. 8 shows a timing chart for turning on or off the discharge transistor 23, reset transistor 26 and transfer transistor 24. FIG.

Also, FIG. 8 shows a timing chart of the membrane voltage VA, which is the voltage level of the first end portion 21A. The vertical drive circuit 4 controls the membrane voltage VA to the membrane applied voltage or the reset power supply voltage. The membrane applied voltage is higher than the reset power supply voltage. The voltage applied to the membrane is, for example, 2.2V. The reset power supply voltage is, for example, 1.2V. The film applied voltage is, for example, a bias voltage (fixed voltage) normally applied to the first end portion 21A of the photoelectric conversion section 21 .

A period of one frame is from time t1 to time t8. The period from time t1 to time t4 is an accumulation time (exposure period). The period from time t5 to time t8 is the timing for resetting the charge in the first charge storage section 22 by the discharge transistor 23 .

First, at time t1, the discharge transistor 23 is turned off. As a result, the resetting of the charges in the first charge accumulating section 22 is completed, and the accumulation time is started.

Next, at time t2, the reset transistor 26 is turned on. This connects the second charge storage unit 25 to the reference voltage node VDD.

Next, at time t3, the reset transistor 26 is turned off. As a result, resetting of the charges in the second charge storage section 25 is completed.

Next, at time t4, the transfer transistor 24 is turned on. Thereby, the capacities of the first charge storage section 22 and the second charge storage section 25 are coupled. Therefore, after the accumulation time ends, the charges accumulated in the first charge accumulation section 22 are divided and transferred to the second charge accumulation section 25 .

Next, at time t5, the transfer transistor 24 is turned off. Thereby, the capacities of the first charge accumulation section 22 and the second charge accumulation section 25 are divided. The charge accumulated in the second charge accumulation section 25 after time t5 is read out as a pixel signal.

Next, at time t6, the discharge transistor 23 is turned on. Also, at time t6, the vertical drive circuit 4 lowers the membrane voltage VA from the membrane applied voltage to the reset power supply voltage. As a result, the membrane voltage VA becomes substantially the same as the reset voltage VB. As a result, as described with reference to FIG. 5, the N-type semiconductor thin film 41 is filled with charges.

It should be noted that the timing at which the film voltage VA is changed to the reset power supply voltage does not necessarily have to be the same as the timing at which the discharge transistor 23 is turned on. Either timing may come first. The vertical drive circuit 4 should set the film voltage VA to the reset power supply voltage after the transfer transistor 24 is turned off and before the ejection transistor 23 is turned off.

Next, at time t7, the vertical driving circuit 4 returns the membrane voltage VA from the reset power supply voltage to the membrane applied voltage. That is, the vertical driving circuit 4 restores (increases) the lowered voltage level of the first end portion 21A of the photoelectric conversion portion 21 while the discharge transistor 23 is discharging the electric charge. 21A voltage level. As a result, after the film voltage VA and the reset voltage VB are made substantially equal, the charge in the first charge storage section 22 can be reset by turning off the discharge transistor 23 . As a result, the amount of charge remaining in the photoelectric conversion unit 21 due to the barrier can be made independent of the signal amount during the accumulation time. That is, the charge in the first charge storage section 22 can be reset more appropriately regardless of the signal amount during the storage time.

In addition, the vertical drive circuit 4 can make the amount of charge remaining in the photoelectric conversion unit 21 uniform among the pixels 2 due to the barrier by performing the above voltage control for all the pixels 2 . As a result, the amount of charge remaining in the photoelectric conversion unit 21 due to the barrier can be made uniform among the pixels 2 regardless of the amount of charge photoelectrically converted in the previous frame (state before reset). As a result, noise such as afterimages in the next frame can be suppressed.

It should be noted that the timing at which the film voltage VA is changed to the film applied voltage is before the timing at which the discharge transistor 23 is turned off. This is because, if the drain transistor 23 is turned off while the film voltage VA remains at the reset power supply voltage, charge accumulation is started in the next frame in a state in which charges remain in the N-type semiconductor thin film 41 without being reset. .

Next, at time t8, the discharge transistor 23 is turned off. Therefore, the accumulation time for the next frame is started.

Also, the solid-state imaging device 1 is driven by, for example, a global shutter. Therefore, in all pixels 2, exposure starts and ends substantially simultaneously. In addition, the vertical drive circuit 4 controls the film voltage VA in all the pixels 2 substantially simultaneously.

FIG. 9 is a timing chart showing an example of the operation of the solid-state imaging device 1 according to the comparative example. In the comparative example, the vertical drive circuit 4 does not control the film voltage VA. That is, the comparative example is the same as the state in which the first end portion 21A is electrically connected to the fixed power supply for the membrane applied voltage.

In the example shown in FIG. 9, the membrane voltage VA is substantially constant. Therefore, the amount of charge remaining in the photoelectric conversion unit 21 may fluctuate depending on the signal amount during the accumulation time. As a result, there is a possibility that the signal read in the next frame will change for each pixel 2 depending on the amount of signal in the previous frame.

On the other hand, in the first embodiment, the amount of charge remaining in the photoelectric conversion unit 21 can be made uniform among the pixels 2 by the barrier, without depending on the accumulated signal amount. Thereby, the reset of the 1st charge storage part 22 can be performed more appropriately.

As described above, according to the first embodiment, the vertical driving circuit 4 sets the substantially constant reset voltage VB (reset power supply voltage) and The membrane voltage VA is controlled so as to be substantially the same. "Substantially the same" indicates that the membrane voltage VA does not necessarily have to be the same as the reset power supply voltage. The membrane voltage VA may, for example, be lowered to a voltage level at which charge sufficiently flows across the barrier.

Note that the vertical drive circuit 4 may lower the film voltage VA to a voltage lower than the reset power supply voltage. In this case as well, charges flow from the reset power supply voltage side to the N-type semiconductor thin film 41 .

Also, the signal charges are not limited to holes, and may be electrons. In this case, the conductivity types of the semiconductor substrate 12, the semiconductor thin film 41, etc. are reversed, or the polarity of the applied bias voltage is reversed.

Also, an ADC (Analog to Digital Converter) may be provided for each pixel 2 without being limited to the column AD method.

Also, in the first embodiment, the voltage control unit that controls the film voltage VA is the vertical drive circuit 4 . That is, the vertical drive circuit 4 controls the voltage level of the first end portion 21A, and also controls the MOS transistors such as the discharge transistor 23 and the like. However, the voltage control unit is not limited to the vertical driving circuit 4, and may be any configuration that can control the voltage.

Further, the electrode 48 is not limited to the example shown in FIG. 6, and may be provided over the entire surface of the pixel array region 3 as shown in FIG.

<First Modification of Electrode>
FIG. 10 is a top view showing an example of the configuration of the electrodes 48 according to the first modified example. The first modification differs from the first embodiment in the arrangement of the electrodes 48 .

In the example shown in FIG. 10, the electrodes 48 are divided into a plurality of rows separated by a predetermined distance PD.

The arrangement of the electrodes 48 may be changed as in the first modified example of the first embodiment. Also in this case, an effect equivalent to that of the first embodiment can be obtained.

<Second Modification of Electrode>
FIG. 11 is a top view showing an example of the configuration of the electrode 48 according to the second modified example. The second modification differs from the first embodiment in the arrangement of the electrodes 48 .

In the example shown in FIG. 11, the electrodes 48 are divided into a plurality of rows separated by a predetermined distance PD.

The arrangement of the electrodes 48 may be changed as in the second modification of the first embodiment. Also in this case, an effect equivalent to that of the first embodiment can be obtained.

<Second embodiment>
FIG. 12 is a diagram showing an example of a pixel circuit of each pixel 2 of the solid-state imaging device 1 according to the second embodiment. The second embodiment differs from the first embodiment in that the vertical drive circuit 4 controls the voltage level of the fourth end 23B of the ejection transistor 23. FIG.

In the example shown in FIG. 12, the first end 21A of the photoelectric conversion unit 21 is electrically connected to the reference voltage node of the voltage applied to the membrane. Therefore, the voltage of the first end 21A is fixed.

A fourth end portion 23B of the ejection transistor 23 is electrically connected to the vertical drive circuit 4 . Therefore, the vertical drive circuit 4 controls the voltage level of the fourth end 23B of the ejection transistor 23. FIG.

FIG. 13 is a schematic diagram showing an example of potential distribution of the photoelectric conversion section 21, the first charge accumulation section 22, and the discharge transistor 23 according to the second embodiment.

The vertical driving circuit 4 controls the reset voltage VB of the discharge transistor 23 so that the film voltage VA and the reset voltage VB are substantially the same at the timing of resetting the first charge storage section 22 . More specifically, the vertical drive circuit 4 controls the first voltage level of the discharge transistor 23 to be substantially the same as the substantially constant voltage level of the first end 21A of the photoelectric conversion section 21 during discharge of the charges by the discharge transistor 23 . It controls the voltage level (reset voltage VB) of the 4-terminal portion 23B. Further, the vertical driving circuit 4 raises the reset voltage VB to the film voltage VA and returns it to the film voltage VA while the discharge transistor 23 is discharging electric charges.

FIG. 14 is a timing chart showing an example of the operation of the solid-state imaging device 1 according to the second embodiment. The operations of the discharge transistor 23, the reset transistor 26, and the transfer transistor 24 shown in FIG. 14 are the same as those in FIG. 8 described in the first embodiment.

Also, FIG. 14 shows a timing chart of the reset voltage VB, which is the voltage level of the fourth end portion 23B. The vertical drive circuit 4 controls the reset voltage VB to be the film applied voltage or the reset power supply voltage.

The time from time t1 to time t6 is the same as in FIG. 8 described in the first embodiment.

Next, at time t6, the discharge transistor 23 is turned on. Also, at time t6, the vertical driving circuit 4 raises the reset voltage VB from the reset power supply voltage to the applied film voltage. As a result, the reset voltage VB becomes substantially the same as the membrane voltage VA. As a result, the N-type semiconductor thin film 41 is filled with charges.

Next, at time t7, the vertical driving circuit 4 returns the reset voltage VB from the membrane applied voltage to the reset power supply voltage. That is, the vertical driving circuit 4 causes the fourth end 23B of the discharge transistor 23 to return (lower) the raised voltage level of the fourth end 23B of the discharge transistor 23 while the charge is being discharged by the discharge transistor 23. Control voltage levels. As a result, after the film voltage VA and the reset voltage VB are made substantially equal, the charge in the first charge storage section 22 can be reset by turning off the discharge transistor 23 . As a result, the amount of charge remaining in the photoelectric conversion unit 21 due to the barrier can be made independent of the signal amount during the accumulation time. That is, the charge in the first charge storage section 22 can be reset more appropriately regardless of the signal amount during the storage time.

The reset voltage VB may be controlled as in the second embodiment. Also in this case, an effect equivalent to that of the first embodiment can be obtained. Also, the solid-state imaging device 1 according to the second embodiment may be combined with the first modified example or the second modified example.

<Third Embodiment>
FIG. 15 is a diagram showing an example of a pixel circuit of each pixel 2 of the solid-state imaging device 1 according to the third embodiment. The third embodiment differs from the first embodiment in that the vertical drive circuit 4 controls the voltage levels of both the first end 21A of the photoelectric conversion section 21 and the fourth end 23B of the discharge transistor 23. is different.

In the example shown in FIG. 15, the first end portion 21A of the photoelectric conversion portion 21 is electrically connected to the vertical driving circuit 4. A fourth end portion 23B of the discharge transistor 23 is electrically connected to the vertical drive circuit 4 . Therefore, the vertical drive circuit 4 controls the voltage levels of both the first end 21A of the photoelectric conversion section 21 and the fourth end 23B of the discharge transistor 23 .

FIG. 16 is a schematic diagram showing an example of potential distribution of the photoelectric conversion section 21, the first charge accumulation section 22, and the discharge transistor 23 according to the third embodiment.

The vertical driving circuit 4 controls both the film voltage VA and the reset voltage VB so that the film voltage VA and the reset voltage VB are substantially the same at the timing of resetting the first charge storage section 22 . More specifically, the vertical drive circuit 4 controls the voltage level of the first end 21A of the photoelectric conversion unit 21, the voltage level of the fourth end 23B of the discharge transistor 23, and The voltage levels of both the first end portion 21A of the photoelectric conversion portion 21 and the fourth end portion 23B of the discharge transistor 23 are controlled so as to have a predetermined voltage level VP between. In addition, the vertical drive circuit 4 lowers the film voltage VA back to the predetermined voltage level VP and raises the reset voltage VB back to the predetermined voltage level VP during the discharge of charges by the discharge transistor 23 .

FIG. 17 is a timing chart showing an example of the operation of the solid-state imaging device 1 according to the third embodiment. The operations of the discharge transistor 23, the reset transistor 26, and the transfer transistor 24 shown in FIG. 17 are the same as those in FIG. 8 described in the first embodiment.

Also, FIG. 17 shows a timing chart of the membrane voltage VA and the reset voltage VB.

Next, at time t6, the discharge transistor 23 is turned on. At time t6, the vertical driving circuit 4 lowers the film voltage VA to the predetermined voltage level VP and raises the reset voltage VB to the predetermined voltage level VP. As a result, the membrane voltage VA and the reset voltage VB become substantially the same. As a result, the N-type semiconductor thin film 41 is filled with charges.

Next, at time t7, the vertical drive circuit 4 restores the membrane voltage VA and reset voltage VB to the membrane applied voltage and reset power supply voltage, respectively. That is, the vertical driving circuit 4 restores the substantially same voltage levels of the first end 21A of the photoelectric conversion unit 21 and the fourth end 23B of the discharge transistor 23 while the discharge transistor 23 discharges the electric charge. In addition, the voltage levels (membrane voltage VA and reset voltage VB) of both the first end portion 21A of the photoelectric conversion portion 21 and the fourth end portion 23B of the discharge transistor 23 are controlled. As a result, after the film voltage VA and the reset voltage VB are made substantially equal, the charge in the first charge storage section 22 can be reset by turning off the discharge transistor 23 . As a result, the amount of charge remaining in the photoelectric conversion unit 21 due to the barrier can be made independent of the signal amount during the accumulation time. That is, the charge in the first charge storage section 22 can be reset more appropriately regardless of the signal amount during the storage time.

Both the membrane voltage VA and the reset voltage VB may be controlled as in the third embodiment. Also in this case, an effect equivalent to that of the first embodiment can be obtained. Further, the solid-state imaging device 1 according to the third embodiment may be combined with the first modified example or the second modified example.

<Example of application to electronic equipment>
The present technology is not limited to application to solid-state imaging devices. That is, the present technology can be applied to an image capture unit (photoelectric conversion unit) such as an imaging device such as a digital still camera or a video camera, a mobile terminal device having an imaging function, or a copying machine using a solid-state imaging device as an image reading unit. It is applicable to general electronic equipment using a solid-state imaging device. The solid-state imaging device may be formed as a single chip, or may be in the form of a module having an imaging function in which an imaging section and a signal processing section or an optical system are packaged together.

FIG. 18 is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied.

An imaging device 300 in FIG. 18 includes an optical unit 301 including a lens group, a solid-state imaging device (imaging device) 302 adopting the configuration of the solid-state imaging device 1 in FIG. Processor) circuit 303 . The imaging device 300 also includes a frame memory 304 , a display unit 305 , a recording unit 306 , an operation unit 307 and a power supply unit 308 . DSP circuit 303 , frame memory 304 , display unit 305 , recording unit 306 , operation unit 307 and power supply unit 308 are interconnected via bus line 309 .

The optical unit 301 captures incident light (image light) from a subject and forms an image on the imaging surface of the solid-state imaging device 302 . The solid-state imaging device 302 converts the amount of incident light imaged on the imaging surface by the optical unit 301 into an electric signal for each pixel, and outputs the electric signal as a pixel signal. As the solid-state imaging device 302, the solid-state imaging device 1 shown in FIG. 1, for example, a solid-state imaging device that suppresses deterioration in image quality due to discharge of charge from the processed end surface of the photoelectric conversion section 21 can be used.

The display unit 305 is, for example, a panel type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and displays moving images or still images captured by the solid-state imaging device 302 . A recording unit 306 records a moving image or still image captured by the solid-state imaging device 302 in a recording medium such as a hard disk or a semiconductor memory.

The operation unit 307 issues operation commands for various functions of the imaging device 300 under the user's operation. A power supply unit 308 appropriately supplies various power supplies as operating power supplies for the DSP circuit 303, the frame memory 304, the display unit 305, the recording unit 306, and the operation unit 307 to these supply targets.

As described above, by using the solid-state imaging device 1 to which each of the above-described embodiments is applied as the solid-state imaging device 302, for example, deterioration in image quality due to discharge of electric charge from the end surface of the processed portion of the photoelectric conversion unit 21 can be suppressed. can do. Also, it is possible to improve the S/N ratio and achieve a high dynamic range. Therefore, even in the imaging device 300 such as a video camera, a digital still camera, and a camera module for a mobile device such as a mobile phone, it is possible to improve the quality of the captured image.

<Usage example of image sensor>
FIG. 19 is a diagram showing a usage example of an image sensor using the solid-state imaging device 1 described above.

An image sensor using the solid-state imaging device 1 described above can be used, for example, in various cases for sensing light such as visible light, infrared light, ultraviolet light, and X-rays as follows.

・Devices that capture images for viewing purposes, such as digital cameras and mobile devices with camera functions. Devices used for transportation, such as in-vehicle sensors that capture images behind, around, and inside the vehicle, surveillance cameras that monitor running vehicles and roads, and ranging sensors that measure the distance between vehicles. Devices used in home appliances such as TVs, refrigerators, air conditioners, etc., to take pictures and operate devices according to gestures ・Endoscopes, devices that perform angiography by receiving infrared light, etc. equipment used for medical and healthcare purposes ・Equipment used for security purposes, such as surveillance cameras for crime prevention and cameras for personal authentication ・Skin measuring instruments for photographing the skin and photographing the scalp Equipment used for beauty, such as microscopes used for beauty ・Equipment used for sports, such as action cameras and wearable cameras for use in sports ・Cameras, etc. for monitoring the condition of fields and crops , agricultural equipment

<Example of application to an endoscopic surgery system>
The technology (the present technology) according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

FIG. 20 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (this technology) can be applied.

FIG. 20 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000 . As illustrated, an endoscopic surgery system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy treatment instrument 11112, and a support arm device 11120 for supporting the endoscope 11100. , and a cart 11200 loaded with various devices for endoscopic surgery.

An endoscope 11100 is composed of a lens barrel 11101 whose distal end is inserted into the body cavity of a patient 11132 and a camera head 11102 connected to the proximal end of the lens barrel 11101 . In the illustrated example, an endoscope 11100 configured as a so-called rigid scope having a rigid lens barrel 11101 is illustrated, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel. good.

The tip of the lens barrel 11101 is provided with an opening into which the objective lens is fitted. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel 11101 by a light guide extending inside the lens barrel 11101, where it reaches the objective. Through the lens, the light is irradiated toward the observation object inside the body cavity of the patient 11132 . Note that the endoscope 11100 may be a straight scope, a perspective scope, or a side scope.

An optical system and an imaging element are provided inside the camera head 11102, and the reflected light (observation light) from the observation target is focused on the imaging element by the optical system. The imaging element photoelectrically converts the observation light to generate an electric signal corresponding to the observation light, that is, an image signal corresponding to the observation image. The image signal is transmitted to a camera control unit (CCU: Camera Control Unit) 11201 as RAW data.

The CCU 11201 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and controls the operations of the endoscope 11100 and the display device 11202 in an integrated manner. Further, the CCU 11201 receives an image signal from the camera head 11102 and performs various image processing such as development processing (demosaicing) for displaying an image based on the image signal.

The display device 11202 displays an image based on an image signal subjected to image processing by the CCU 11201 under the control of the CCU 11201 .

The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), for example, and supplies the endoscope 11100 with irradiation light for photographing a surgical site or the like.

The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204 . For example, the user inputs an instruction or the like to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) by the endoscope 11100 .

The treatment instrument control device 11205 controls driving of the energy treatment instrument 11112 for tissue cauterization, incision, blood vessel sealing, or the like. The pneumoperitoneum device 11206 inflates the body cavity of the patient 11132 for the purpose of securing the visual field of the endoscope 11100 and securing the operator's working space, and injects gas into the body cavity through the pneumoperitoneum tube 11111. send in. The recorder 11207 is a device capable of recording various types of information regarding surgery. The printer 11208 is a device capable of printing various types of information regarding surgery in various formats such as text, images, and graphs.

It should be noted that the light source device 11203 that supplies the endoscope 11100 with irradiation light for photographing the surgical site can be composed of, for example, a white light source composed of an LED, a laser light source, or a combination thereof. When a white light source is configured by a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high accuracy. It can be carried out. Further, in this case, the observation target is irradiated with laser light from each of the RGB laser light sources in a time-division manner, and by controlling the drive of the imaging element of the camera head 11102 in synchronization with the irradiation timing, each of RGB can be handled. It is also possible to pick up images by time division. According to this method, a color image can be obtained without providing a color filter in the imaging element.

Further, the driving of the light source device 11203 may be controlled so as to change the intensity of the output light every predetermined time. By controlling the drive of the imaging device of the camera head 11102 in synchronism with the timing of the change in the intensity of the light to obtain an image in a time-division manner and synthesizing the images, a high dynamic A range of images can be generated.

Also, the light source device 11203 may be configured to be able to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, the wavelength dependence of light absorption in body tissues is used to irradiate a narrower band of light than the irradiation light (i.e., white light) used during normal observation, thereby observing the mucosal surface layer. So-called narrow band imaging, in which a predetermined tissue such as a blood vessel is imaged with high contrast, is performed. Alternatively, in special light observation, fluorescence observation may be performed in which an image is obtained from fluorescence generated by irradiation with excitation light. In fluorescence observation, the body tissue is irradiated with excitation light and the fluorescence from the body tissue is observed (autofluorescence observation), or a reagent such as indocyanine green (ICG) is locally injected into the body tissue and the body tissue is A fluorescence image can be obtained by irradiating excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 11203 can be configured to be able to supply narrowband light and/or excitation light corresponding to such special light observation.

FIG. 21 is a block diagram showing an example of functional configurations of the camera head 11102 and CCU 11201 shown in FIG.

The camera head 11102 has a lens unit 11401, an imaging section 11402, a drive section 11403, a communication section 11404, and a camera head control section 11405. The CCU 11201 has a communication section 11411 , an image processing section 11412 and a control section 11413 . The camera head 11102 and the CCU 11201 are communicably connected to each other via a transmission cable 11400 .

A lens unit 11401 is an optical system provided at a connection with the lens barrel 11101 . Observation light captured from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401 . A lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

The imaging unit 11402 is composed of an imaging element. The imaging device constituting the imaging unit 11402 may be one (so-called single-plate type) or plural (so-called multi-plate type). When the image pickup unit 11402 is configured as a multi-plate type, for example, image signals corresponding to RGB may be generated by each image pickup element, and a color image may be obtained by synthesizing the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for respectively acquiring right-eye and left-eye image signals corresponding to 3D (Dimensional) display. The 3D display enables the operator 11131 to more accurately grasp the depth of the living tissue in the surgical site. Note that when the imaging unit 11402 is configured as a multi-plate type, a plurality of systems of lens units 11401 may be provided corresponding to each imaging element.

Also, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102 . For example, the imaging unit 11402 may be provided inside the lens barrel 11101 immediately after the objective lens.

The drive unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under control from the camera head control unit 11405 . Thereby, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

The communication unit 11404 is composed of a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400 .

Also, the communication unit 11404 receives a control signal for controlling driving of the camera head 11102 from the CCU 11201 and supplies it to the camera head control unit 11405 . The control signal includes, for example, information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and/or information to specify the magnification and focus of the captured image. Contains information about conditions.

Note that the imaging conditions such as the frame rate, exposure value, magnification, and focus may be appropriately designated by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. good. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

The camera head control unit 11405 controls driving of the camera head 11102 based on the control signal from the CCU 11201 received via the communication unit 11404.

The communication unit 11411 is composed of a communication device for transmitting and receiving various information to and from the camera head 11102 . The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400 .

Also, the communication unit 11411 transmits a control signal for controlling driving of the camera head 11102 to the camera head 11102 . Image signals and control signals can be transmitted by electric communication, optical communication, or the like.

The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data transmitted from the camera head 11102 .

The control unit 11413 performs various controls related to the imaging of the surgical site and the like by the endoscope 11100 and the display of the captured image obtained by the imaging of the surgical site and the like. For example, the control unit 11413 generates control signals for controlling driving of the camera head 11102 .

In addition, the control unit 11413 causes the display device 11202 to display a captured image showing the surgical site and the like based on the image signal that has undergone image processing by the image processing unit 11412 . At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 detects the shape, color, and the like of the edges of objects included in the captured image, thereby detecting surgical instruments such as forceps, specific body parts, bleeding, mist during use of the energy treatment instrument 11112, and the like. can recognize. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition result to display various types of surgical assistance information superimposed on the image of the surgical site. By superimposing and presenting the surgery support information to the operator 11131, the burden on the operator 11131 can be reduced and the operator 11131 can proceed with the surgery reliably.

A transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable compatible with electrical signal communication, an optical fiber compatible with optical communication, or a composite cable of these.

Here, in the illustrated example, wired communication is performed using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 11402 of the camera head 11102 among the configurations described above. Specifically, the solid-state imaging device 1 to which each embodiment described above is applied can be applied to the imaging unit 10402 . By applying the technology according to the present disclosure to the imaging unit 10402, it is possible to suppress deterioration of the image quality of the operation site image obtained by the imaging unit 10402, improve the S/N ratio, and achieve a high dynamic range. A clear image of the surgical site can be obtained, and the operator can reliably confirm the surgical site.

Although the endoscopic surgery system has been described as an example here, the technology according to the present disclosure may also be applied to, for example, a microsurgery system.

<Example of application to a moving body>
The technology (the present technology) according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure can be realized as a device mounted on any type of moving body such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility, airplanes, drones, ships, and robots. may

FIG. 22 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology according to the present disclosure can be applied.

A vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in FIG. 22 , vehicle control system 12000 includes drive system control unit 12010 , body system control unit 12020 , vehicle exterior information detection unit 12030 , vehicle interior information detection unit 12040 , and integrated control unit 12050 . Also, as the functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio/image output unit 12052, and an in-vehicle network I/F (interface) 12053 are illustrated.

The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the driving system control unit 12010 includes a driving force generator for generating driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism to adjust and a brake device to generate braking force of the vehicle.

The body system control unit 12020 controls the operation of various devices equipped on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, winkers or fog lamps. In this case, the body system control unit 12020 can receive radio waves transmitted from a portable device that substitutes for a key or signals from various switches. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, etc. of the vehicle.

The vehicle exterior information detection unit 12030 detects information outside the vehicle in which the vehicle control system 12000 is installed. For example, the vehicle exterior information detection unit 12030 is connected with an imaging section 12031 . The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the exterior of the vehicle, and receives the captured image. The vehicle exterior information detection unit 12030 may perform object detection processing or distance detection processing such as people, vehicles, obstacles, signs, or characters on the road surface based on the received image.

The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of received light. The imaging unit 12031 can output the electric signal as an image, and can also output it as distance measurement information. Also, the light received by the imaging unit 12031 may be visible light or non-visible light such as infrared rays.

The in-vehicle information detection unit 12040 detects in-vehicle information. The in-vehicle information detection unit 12040 is connected to, for example, a driver state detection section 12041 that detects the state of the driver. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 detects the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether the driver is dozing off.

The microcomputer 12051 calculates control target values for the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and controls the drive system control unit. A control command can be output to 12010 . For example, the microcomputer 12051 realizes the functions of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, or vehicle lane deviation warning. Cooperative control can be performed for the purpose of

In addition, the microcomputer 12051 controls the driving force generator, the steering mechanism, the braking device, etc. based on the information about the vehicle surroundings acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, so that the driver's Cooperative control can be performed for the purpose of autonomous driving, etc., in which vehicles autonomously travel without depending on operation.

Also, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the information detection unit 12030 outside the vehicle. For example, the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030, and performs cooperative control aimed at anti-glare such as switching from high beam to low beam. It can be carried out.

The audio/image output unit 12052 transmits at least one of audio and/or image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle. In the example of FIG. 22, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are illustrated as output devices. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

FIG. 23 is a diagram showing an example of the installation position of the imaging unit 12031. As shown in FIG.

In FIG. 23, the vehicle 12100 has

imaging units

12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

The

imaging units

12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose of the vehicle 12100, the side mirrors, the rear bumper, the back door, and the upper part of the windshield in the vehicle interior, for example. An image pickup unit 12101 provided in the front nose and an image pickup unit 12105 provided above the windshield in the passenger compartment mainly acquire images in front of the vehicle 12100 .

Imaging units

12102 and 12103 provided in the side mirrors mainly acquire side images of the vehicle 12100 . An imaging unit 12104 provided in the rear bumper or back door mainly acquires an image behind the vehicle 12100 . Forward images acquired by the

imaging units

12101 and 12105 are mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, and the like.

Note that FIG. 23 shows an example of the imaging range of the imaging units 12101 to 12104. FIG. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided in the front nose, the imaging ranges 12112 and 12113 indicate the imaging ranges of the

imaging units

12102 and 12103 provided in the side mirrors, respectively, and the imaging range 12114 The imaging range of an imaging unit 12104 provided on the rear bumper or back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 determines the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and changes in this distance over time (relative velocity with respect to the vehicle 12100). , it is possible to extract, as the preceding vehicle, the closest three-dimensional object on the course of the vehicle 12100, which runs at a predetermined speed (for example, 0 km/h or more) in substantially the same direction as the vehicle 12100. can. Furthermore, the microcomputer 12051 can set the inter-vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including following stop control) and automatic acceleration control (including following start control). In this way, cooperative control can be performed for the purpose of automatic driving in which the vehicle runs autonomously without relying on the operation of the driver.

For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 converts three-dimensional object data related to three-dimensional objects to other three-dimensional objects such as motorcycles, ordinary vehicles, large vehicles, pedestrians, and utility poles. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into those that are visible to the driver of the vehicle 12100 and those that are difficult to see. Then, the microcomputer 12051 judges the collision risk indicating the degree of danger of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, an audio speaker 12061 and a display unit 12062 are displayed. By outputting an alarm to the driver via the drive system control unit 12010 and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be performed.

At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not the pedestrian exists in the captured images of the imaging units 12101 to 12104 . Such recognition of a pedestrian is performed by, for example, a procedure for extracting feature points in images captured by the imaging units 12101 to 12104 as infrared cameras, and performing pattern matching processing on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. This is done by a procedure that determines When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and recognizes the pedestrian, the audio image output unit 12052 outputs a rectangular outline for emphasis to the recognized pedestrian. is superimposed on the display unit 12062 . Also, the audio/image output unit 12052 may control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 among the configurations described above. Specifically, the solid-state imaging device 1 to which each embodiment described above is applied can be applied to the imaging unit 12031 . By applying the technology according to the present disclosure to the imaging unit 12031, it is possible to obtain a captured image that is easier to see, so it is possible to reduce driver fatigue and improve the safety of the driver and the vehicle.

In the above example, the case where the charge (signal charge) handled as a signal in the photoelectric conversion unit 21 is a hole has been described, but the present technology can also be applied to a solid-state imaging device that uses electrons as signal charges. In this case, the conductivity types of the semiconductor substrate 12, the semiconductor thin film 41, etc. are reversed, or the polarity of the applied bias voltage is reversed.

In addition, the present technology is not limited to application to solid-state imaging devices that detect the distribution of the amount of incident visible light and capture an image. In a broad sense, it can be applied to solid-state imaging devices (physical quantity distribution detectors) such as fingerprint detection sensors that detect the distribution of other physical quantities such as pressure and capacitance and capture images. be.

Embodiments of the present technology are not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present technology.

For example, a form obtained by combining all or part of the multiple embodiments described above can be adopted.

It should be noted that the effects described in this specification are merely examples and are not limited, and there may be effects other than those described in this specification.

In addition, this technique can take the following structures.
(1) a photoelectric conversion unit that generates an electric charge according to the amount of light received;
a first charge storage unit that is electrically connected to one end of the photoelectric conversion unit and that stores the charge;
a discharging portion having one end electrically connected to the first charge accumulating portion for discharging the charges accumulated in the first charge accumulating portion;
The other terminal of the photoelectric conversion unit is arranged so that the voltage level of the other end of the photoelectric conversion unit and the voltage level of the other end of the discharge unit are substantially the same at the discharge timing when the discharge unit discharges the charge. and a voltage control section that controls the voltage level of at least one of the end and the other end of the discharge section.
(2) The voltage control unit controls the photoelectric conversion unit so as to restore substantially the same voltage levels of the other end of the photoelectric conversion unit and the other end of the discharge unit while the charge is discharged by the discharge unit. The solid-state imaging device according to (1), wherein the voltage level of at least one of the other end of the conversion section and the other end of the discharge section is controlled.
(3) The solid-state imaging device according to (1) or (2), wherein the photoelectric conversion section includes a compound semiconductor material.
(4) The voltage control section controls the voltage level of the other end of the photoelectric conversion section so as to be substantially the same as the substantially constant voltage level of the other end of the discharge section at the discharge timing. ) to (3).
(5) The voltage control section controls the voltage level of the other end of the discharge section so as to be substantially the same as the substantially constant voltage level of the other end of the photoelectric conversion section at the discharge timing. ) to (3).
(6) The voltage control section adjusts the photoelectric conversion section to a predetermined voltage level between the voltage level of the other end of the photoelectric conversion section and the voltage level of the other end of the discharge section at the discharge timing. The solid-state imaging device according to any one of (1) to (3), wherein voltage levels of both the other end of the conversion section and the other end of the discharge section are controlled.
(7) The solid-state imaging device according to any one of (1) to (6), further comprising an electrode electrically connected to the other end of the photoelectric conversion section and to which a voltage is applied from the voltage control section. .
(8) The electrodes are arranged over the plurality of pixels and are spaced apart from each other by a predetermined distance so that the voltage control section can control the voltage level of the other end of the photoelectric conversion section for the plurality of pixels. The solid-state imaging device according to (7), wherein the solid-state imaging device according to (7) is divided into a plurality of parts so as to be spaced apart from each other.
(9) The solid-state imaging device according to (8), wherein the electrodes are divided and arranged in a matrix.
(10) The solid-state imaging device according to (8), wherein the electrodes are arranged in a plurality of rows or divided into a plurality of rows.
(11) The voltage control unit controls the voltage level of at least one of the other end of the photoelectric conversion unit and the other end of the discharge unit, and controls discharge of the charge by the discharge unit. ) to (10).
(12) a first semiconductor chip on which the photoelectric conversion unit is arranged;
The solid-state imaging device according to any one of (1) to (11), further comprising a second semiconductor chip stacked with the first semiconductor chip and having the first charge storage section and the discharging section arranged thereon.
(13) The voltage control section simultaneously controls the voltage level of at least one of the other end of the photoelectric conversion section and the other end of the discharge section for a plurality of pixels exposed at the same time. The solid-state imaging device according to any one of (12) to (12).

Aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that can be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. That is, various additions, changes, and partial deletions are possible without departing from the conceptual idea and spirit of the present disclosure derived from the content defined in the claims and equivalents thereof.

1 solid-state imaging device, 2 pixels, 4 vertical drive circuit, 12A first semiconductor chip, 12B second semiconductor chip, 21 photoelectric conversion unit, 21A first end, 21B second end, 22 first charge storage unit, 23 Discharge transistor, 23A third end, 23B fourth end, 48 electrode, PD predetermined distance, VA membrane voltage, VB reset voltage

Claims

a photoelectric conversion unit that generates an electric charge according to the amount of light received;
a first charge storage unit that is electrically connected to one end of the photoelectric conversion unit and that stores the charge;
a discharging portion having one end electrically connected to the first charge accumulating portion for discharging the charges accumulated in the first charge accumulating portion;
so that the voltage level of the other end of the photoelectric conversion unit and the voltage level of the other end of the discharge unit are substantially the same at the discharge timing when the discharge unit discharges the charges of the first charge storage unit; A solid-state imaging device, comprising: a voltage control section that controls a voltage level of at least one of the other end of the photoelectric conversion section and the other end of the discharge section.
The voltage control section restores substantially the same voltage levels of the other end of the photoelectric conversion section and the other end of the discharge section while the charge is being discharged by the discharge section. 2. The solid-state imaging device according to claim 1, wherein the voltage level of at least one of the other end and the other end of said discharge section is controlled.
The solid-state imaging device according to claim 1, wherein the photoelectric conversion section contains a compound semiconductor material.
2. The voltage control unit according to claim 1, wherein the voltage control unit controls the voltage level of the other end of the photoelectric conversion unit so as to be substantially the same as the substantially constant voltage level of the other end of the discharge unit at the discharge timing. solid-state imaging device.
2. The voltage control unit according to claim 1, wherein the voltage control unit controls the voltage level of the other end of the discharge unit so that the voltage level of the other end of the photoelectric conversion unit is substantially the same as the substantially constant voltage level of the other end of the photoelectric conversion unit at the discharge timing. solid-state imaging device.
The voltage control section adjusts the photoelectric conversion section to a predetermined voltage level between the voltage level of the other end of the photoelectric conversion section and the voltage level of the other end of the discharge section at the discharge timing. 2. The solid-state imaging device according to claim 1, wherein voltage levels of both the other end and the other end of said discharge section are controlled.
2. The solid-state imaging device according to claim 1, further comprising an electrode electrically connected to the other end of said photoelectric conversion section and to which a voltage is applied from said voltage control section.
The electrodes are arranged across the plurality of pixels and spaced apart from each other by a predetermined distance so that the voltage control section can control the voltage level of the other end of the photoelectric conversion section for the plurality of pixels. 8. The solid-state imaging device according to claim 7, which is divided into a plurality of parts and arranged so as to be separated from each other.
The solid-state imaging device according to claim 8, wherein the electrodes are divided and arranged in a matrix.
The solid-state imaging device according to claim 8, wherein the electrodes are arranged in a plurality of rows or divided into a plurality of rows.
2. The voltage control unit according to claim 1, wherein the voltage control unit controls the voltage level of at least one of the other end of the photoelectric conversion unit and the other end of the discharge unit, and controls discharge of the charge by the discharge unit. solid-state imaging device.
a first semiconductor chip on which the photoelectric conversion unit is arranged;
2. The solid-state imaging device according to claim 1, further comprising a second semiconductor chip stacked with said first semiconductor chip and having said first charge storage section and said discharging section arranged thereon.
2. The voltage control unit according to claim 1, wherein the voltage control unit simultaneously controls the voltage level of at least one of the other end of the photoelectric conversion unit and the other end of the discharge unit for a plurality of pixels that are exposed at the same time. Solid-state imaging device.