WO2022268207A1

WO2022268207A1 - Device and method for partitioning blocks in video coding

Info

Publication number: WO2022268207A1
Application number: PCT/CN2022/101203
Authority: WO
Inventors: Chihyuan Chen; Yuchiao YANG; Chihyu TENG
Original assignee: FG Innovation Company Limited
Priority date: 2021-06-25
Filing date: 2022-06-24
Publication date: 2022-12-29

Abstract

A method of decoding a bitstream by an electronic device is provided. The electronic device receives the bitstream. In addition, the electronic device determines, from general constraints information in the bitstream, a maximum constraint indication used for determining a maximum value of a parameter indication included in a sequence parameter set of the bitstream. The maximum constraint indication does not impose a constraint on the maximum value of the parameter indication when the maximum constraint indication is equal to zero.

Description

DEVICE AND METHOD FOR PARTITIONING BLOCKS IN VIDEO CODING

CROSS-REFERENCE TO RELATED APPLICATION (S)

The present disclosure claims the benefit of and priority to U.S. Provisional Patent Application Serial No. 63/215,375, filed on June 25, 2021, entitled “PROPOSED SIGNALING OF PARTITION BASED ON THE BLOCK SIZE COMPARISON” (hereinafter referred to as “‘375 provisional” ) . The disclosure of the ‘375 provisional is hereby incorporated fully by reference into the present disclosure.

FIELD

The present disclosure is generally related to video coding, and more specifically, to techniques of partition based on an aspect ratio of blocks.

BACKGROUND

Many of standardized video compression techniques has been developed, such as moving picture expert group (MPEG) -1, MPEG-2, H. 263, MPEG-4 part 2, MPEG-4 part 10, advanced video coding (AVC) /H. 264, and high efficiency video coding (HEVC) /H. 265. A new generation of video compression standard of versatile video coding (VVC) has been introduced by joint video exploration team (JVET) since 2015. Comparing to the previous generations of standards, VVC adopts a coding unit (CU) coding structure of quad tree (QT) with nested multi-type tree (MTT) coding block structure.

In such a design, a block may be partitioned by a QT structure or an MTT structure, where the MTT structure includes a binary tree (BT) structure and a ternary tree (TT) structure. When a block with size W × H is partitioned by the QT structure, the block may be partitioned into 4 subblocks with a same size W/2 × H/2. When a block with size W × H is partitioned by the BT structure, the block may be partitioned into 2 subblocks with a same size W/2 × H (e.g., partitioned in a vertical direction) , or a same size W × H/2 (e.g., partitioned in a horizontal direction) . When a block with size W × H is partitioned by the TT structure, the block may be partitioned into 3 subblocks with size W/4 × H, W/2 × H and W/4 × H (e.g., partitioned in a vertical direction) , or W × H/4, W × H/2 and W × H/4 (e.g., partitioned in a horizontal direction) .

A plurality of flags may sequentially indicate which structure is used to partition a block and the partition direction/orientation. For example, a CU flag (e.g., split_cu_flag) , a QT flag (e.g., split_qt_flag) , an MTT vertical flag (e.g., mtt_split_vertical_flag) , and an MTT binary flag (e.g., mtt_split_binary_flag) may be sequentially signaled or parsed for partitioning a coding tee unit (CTU) . In this example, at least four bits of flags are indispensable for partitioning a CTU when an MTT structure is used. In other words, at least two bits of flags (e.g., one for indicating the orientation and one for indicating the arity) are indispensable for partitioning a block by an MTT structure.

However, the BT structure may have a higher usage than the TT structure in general, and certain partition direction may have a higher usage than the other partition direction in some cases. Therefore, it would be beneficial to have a new mechanism that takes the possibility into consideration.

SUMMARY

The present disclosure is directed to a device and method for partitioning blocks based on a comparison of width and height of a block.

In a first aspect of the present disclosure, a method of decoding a bitstream and an electronic device for performing the method are provided. The method includes the following steps: receiving the bitstream; determining a block unit from an image frame according to the bitstream; and partitioning a current block according to a plurality of flags, the plurality of flags comprising a first binary flag and a second binary flag. The step of portioning the current block according to the plurality of flags includes the following steps: comparing a width of the block unit and a height of the block unit; in a case that the width is larger than the height, determining that the first binary flag is prior to the second binary flag, and in a case that the width is smaller than the height, determining that the second binary flag is prior to the first binary flag. In the first aspect of the present disclosure, an orientation of the first binary flag is different from an orientation of the second binary flag.

In an implementation of the first aspect, the first binary flag is a binary horizontal flag, and the second binary flag is a binary vertical flag.

In another implementation of the first aspect, the binary horizontal flag indicates whether to partition the current block using a binary horizontal partition, and the binary vertical flag indicates whether to partition the current block using a binary vertical partition.

In another implementation of the first aspect, the plurality of the flags further includes a ternary flag, and the step of partitioning the current block according to the plurality of flags further includes the following steps: in a case that the width is larger than the height and the ternary flag is a ternary horizontal flag, determining that the ternary flag is prior to the second binary flag, the ternary horizontal flag indicating whether to partition the current block using a ternary horizontal partition; and in a case that the height is larger than the width and the ternary flag is a ternary vertical flag, determining that the ternary flag is prior to the first binary flag, the ternary vertical flag indicating whether to partition the current block using a ternary vertical partition.

In another implementation of the first aspect, the step of partitioning the current block according to the plurality of flags further includes the following steps: in the case that the width is larger than the height and the ternary flag is the ternary horizontal flag, determining that the first binary flag is prior to the ternary flag, and in the case that the height is larger than the width and the ternary flag is the ternary vertical flag, determining that the second binary is prior to the ternary flag.

In another implementation of the first aspect, the plurality of the flags further includes a ternary flag, and the method further includes the following steps: in a case that the width is equal to the height, determining that at least one of the first binary flag or the second binary flag is prior to the ternary flag.

In another implementation of the first aspect, the block unit is one of the current block, a parent block of the current block, and a neighboring block of the current block.

In a second aspect of the present disclosure, a method for decoding a bitstream and an electronic device for performing the method are provided. The method includes the following steps: receiving the bitstream; determining a block unit from an image frame according to the bitstream; determining a priority of a horizontal flag and a vertical flag according to a size of the block unit; and partitioning a current block according to a plurality of flags and the determined priority. The plurality of flags includes the horizontal flag and the vertical flag.

In an implementation of the second aspect, the step of determining the priority of the horizontal flag and the vertical flag according to the size of the block unit includes the following steps: comparing a width of the block unit and a height of the block unit to generate a comparison result; and determining the priority according to the comparison result. The step of determining the priority according to the comparison result includes the following steps: in a case that the comparison result shows the width is larger than the height, determining that the horizontal flag is prior to the vertical flag; and in a case that the comparison result shows the height is larger than the width, determining that the vertical flag is prior to the horizontal flag.

In another implementation of the second aspect, the horizontal flag and the vertical flag have the same arity.

In another implementation of the second aspect, the horizontal flag is a binary horizontal flag, and the vertical flag is a binary vertical flag.

In another implementation of the second aspect, the horizonal flag indicates whether to partition the current block using a horizonal partition, the vertical flag indicates whether to partition the current block using a vertical partition; and the step of partitioning the current block according to the plurality of flags and the priority includes the step of determining a first flag of the plurality of flags prior to determining a second flag of the plurality of flags in a case that the first flag has a higher priority than the second flag.

In another implementation of the second aspect, the block unit is one of the current block, a parent block of the current block, and a neighboring block of the current block.

BRIEF DESCRIPTION OF THE DRAWINGS

Aspects of the present disclosure are best understood from the following detailed disclosure and the corresponding figures. Various features are not drawn to scale and dimensions of various features may be arbitrarily increased or reduced for clarity of discussion.

FIG. 1 illustrates a block diagram of a system configured to encode and decode video data according to an implementation of the present disclosure.

FIG. 2 illustrates a block diagram of the decoder module of the second electronic device illustrated in FIG. 1 according to an implementation of the present disclosure.

FIG. 3A illustrates a schematic diagram of a binary horizontal partition indicated by a binary horizontal flag according to an implementation of the present disclosure.

FIG. 3B illustrates a schematic diagram of a binary vertical partition indicated by a binary vertical flag according to an implementation of the present disclosure.

FIG. 3C illustrates a schematic diagram of a ternary horizontal partition indicated by a ternary horizontal flag according to an implementation of the present disclosure.

FIG. 3D illustrates a schematic diagram of a ternary vertical partition indicated. by a ternary vertical flag according to an implementation of the present disclosure.

FIG. 4 illustrates a flowchart of a method for decoding video data by an electronic device according to an implementation of the present disclosure.

FIG. 5 illustrates a schematic diagram of a signaling mechanism of block partition according to an implementation of the present disclosure.

FIG. 6 illustrates a schematic diagram of another signaling mechanism of block partition according to an implementation of the present disclosure.

FIG. 7 illustrates a flowchart of another method for decoding video data by an electronic device according to an implementation of the present disclosure.

FIG. 8 illustrates a block diagram of the encoder module of the first electronic device illustrated in FIG. 1 according to an implementation of the present disclosure.

DESCRIPTION

The following disclosure contains specific information pertaining to implementations in the present disclosure. The figures and the corresponding detailed disclosure are directed to example implementations. However, the present disclosure is not limited to these example implementations. Other variations and implementations of the present disclosure will occur to those skilled in the art.

Unless noted otherwise, like or corresponding elements among the figures may be indicated by like or corresponding reference designators. The figures and illustrations in the present disclosure are generally not to scale and are not intended to correspond to actual relative dimensions.

For the purpose of consistency and ease of understanding, like features are identified (although, in some examples, not illustrated) by reference designators in the exemplary figures. However, the features in different implementations may differ in other respects and shall not be narrowly confined to what is illustrated in the figures.

The disclosure uses the phrases “in one implementation, ” or “in some implementations, ” may refer to one or more of the same or different implementations. The term “coupled” is defined as connected, whether directly or indirectly, through intervening components and is not necessarily limited to physical connections. The term “comprising” means “including, but not necessarily limited to” and specifically indicates open-ended inclusion or membership in the so-described combination, group, series and the equivalent.

For purposes of explanation and non-limitation, specific details such as functional entities, techniques, protocols, and standards are set forth for providing an understanding of the disclosed technology. Detailed disclosure of well-known methods, technologies, systems and architectures are omitted so as not to obscure the present disclosure with unnecessary details.

Persons skilled in the art will recognize that any disclosed coding function (s) or algorithm (s) described in the present disclosure may be implemented by hardware, software or a combination of software and hardware. Disclosed functions may correspond to modules that are software, hardware, firmware, or any combination thereof.

A software implementation may include a program having computer executable instructions stored on computer readable medium such as memory or other type of storage devices. For example, one or more microprocessors or general-purpose computers with communication processing capability may be programmed with executable instructions and perform the disclosed function (s) or algorithm (s) .

The microprocessors or general-purpose computers may be formed of application-specific integrated circuits (ASICs) , programmable logic arrays, and/or using one or more digital signal processors (DSPs) . Although some of the disclosed implementations are oriented to software installed and executing on computer hardware, alternative implementations implemented as firmware or as hardware or combination of hardware and software are well within the scope of the present disclosure. The computer readable medium includes but is not limited to random-access memory (RAM) , read-only memory (ROM) , erasable programmable read-only memory (EPROM) , electrically erasable programmable read-only memory (EEPROM) , flash memory, compact disc read-only memory (CD ROM) , magnetic cassettes, magnetic tape, magnetic disk storage, or any other equivalent medium capable of storing computer-readable instructions.

FIG. 1 illustrates a block diagram of a system 100 configured to encode and decode video data according to an implementation of the present disclosure. The system 100 includes a first electronic device 110, a second electronic device 120, and a communication medium 130.

The first electronic device 110 may be a source device including any device configured to encode video data and transmit encoded video data to the communication medium 130. The second electronic device 120 may be a destination device including any device configured to receive encoded video data via the communication medium 130 and decode encoded video data.

The first electronic device 110 may communicate via wire or wirelessly with the second electronic device 120 via the communication medium 130. The first electronic device 110 may include a source module 112, an encoder module 114, and a first interface 116. The second electronic device 120 may include a display module 122, a decoder module 124, and a second interface 126. The first electronic device 110 may be a video encoder and the second electronic device 120 may be a video decoder.

The first electronic device 110 and/or the second electronic device 120 may be a mobile phone, a tablet, a desktop, a notebook, or other electronic device. FIG. 1 illustrates one example of the first electronic device 110 and the second electronic device 120. The first electronic device 110 and second electronic device 120 may include greater or fewer components than illustrated or have a different configuration of the various illustrated components.

The source module 112 may include a video capture device to capture new video, a video archive to store previously captured video, and/or a video feed interface to receive video from a video content provider. The source module 112 may generate computer graphics-based data as the source video or generate a combination of live video, archived video, and computer-generated video as the source video. The video capture device may be a charge-coupled device (CCD) image sensor, a complementary metal-oxide-semiconductor (CMOS) image sensor, or a camera.

The encoder module 114 and the decoder module 124 may each be implemented as any of a variety of suitable encoder/decoder circuitry such as one or more microprocessors, a central processing unit (CPU) , a graphics processing unit (GPU) , a system-on-a-chip (SoC) , digital signal processors (DSPs) , application-specific integrated circuits (ASICs) , field-programmable gate arrays (FPGAs) , discrete logic, software, hardware, firmware or any combinations thereof. When implemented partially in software, a device may store the program having instructions for the software in a suitable, non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the disclosed methods. Each of the encoder module 114 and the decoder module 124 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder/decoder (CODEC) in a device.

The first interface 116 and the second interface 126 may utilize customized protocols or follow existing standards or de facto standards including, but not limited to, Ethernet, IEEE 802.11 or IEEE 802.15 series, Wireless USB or telecommunication standards including, but not limited to, Global System for Mobile Communications (GSM) , Code-Division Multiple Access 2000 (CDMA2000) , Time Division Synchronous Code Division Multiple Access (TD-SCDMA) , Worldwide Interoperability for Microwave Access (WiMAX) , Third Generation Partnership Project Long-Term Evolution (3GPP-LTE) or Time-Division LTE (TD-LTE) . The first interface 116 and the second interface 126 may each include any device configured to transmit and/or store a compliant video bitstream via the communication medium 130 and to receive the compliant video bitstream via the communication medium130.

The first interface 116 and the second interface 126 may include a computer system interface that enables a compliant video bitstream to be stored on a storage device or to be received from the storage device. For example, the first interface 116 and the second interface 126 may include a chipset supporting Peripheral Component Interconnect (PCI) and Peripheral Component Interconnect Express (PCIe) bus protocols, proprietary bus protocols, Universal Serial Bus (USB) protocols, Inter-Integrated Circuit (I2C) protocols, or any other logical and physical structure that may be used to interconnect peer devices.

The display module 122 may include a display using liquid crystal display (LCD) technology, plasma display technology, organic light emitting diode (OLED) display technology, or light emitting polymer display (LPD) technology, with other display technologies used in other implementations. The display module 122 may include a high-definition display or an ultra-high-definition display.

FIG. 2 illustrates a block diagram of the decoder module 124 of the second electronic device 120 illustrated in FIG. 1 according to an implementation of the present disclosure. The decoder module 124 includes an entropy decoder (e.g., entropy decoding unit 2241) , a prediction processor (e.g., prediction process unit 2242) , an inverse quantization/inverse transform processor (e.g., inverse quantization/inverse transform unit 2243) , a summer (e.g., summer 2244) , a filter (e.g., filtering unit 2245) , and a decoded picture buffer (e.g., decoded picture buffer 2246) . The prediction process unit 2242 further includes an intra prediction processor (e.g., intra prediction unit 22421) and an inter prediction processor (e.g., inter prediction unit 22422) . The decoder module 124 receives a bitstream and decodes the bitstream to output decoded video.

The entropy decoding unit 2241 may receive the bitstream including a plurality of syntax elements from the second interface 126 in FIG. 1 and perform a parsing operation on the bitstream to extract syntax elements from the bitstream. As part of the parsing operation, the entropy decoding unit 2241 may entropy decode the bitstream to generate quantized transform coefficients, quantization parameters, transform data, motion vectors, intra modes, partition information, and other syntax information.

The entropy decoding unit 2241 may perform context adaptive variable length coding (CAVLC) , context adaptive binary arithmetic coding (CABAC) , syntax-based context-adaptive binary arithmetic coding (SBAC) , probability interval partitioning entropy (PIPE) coding or another entropy coding technique to generate the quantized transform coefficients. The entropy decoding unit 2241 may provide the quantized transform coefficients, the quantization parameters, and the transform data to the inverse quantization/inverse transform unit 2243 and provide the motion vectors, the intra modes, the partition information, and other syntax information to the prediction process unit 2242.

The prediction process unit 2242 may receive syntax elements such as motion vectors, intra modes, partition information, and other syntax information from the entropy decoding unit 2241. The prediction process unit 2242 may receive the syntax elements including the partition information and divide image frames according to the partition information.

Each of the image frames may be divided into at least one image block according to the partition information. The at least one image block may include a luminance block for reconstructing a plurality of luminance samples and at least one chrominance block for reconstructing a plurality of chrominance samples. The luminance block and the at least one chrominance block may be further divided to generate macroblocks, coding tree units (CTUs) , coding blocks (CBs) , sub-divisions thereof, and/or another equivalent coding unit.

During the decoding process, the prediction process unit 2242 may receive predicted data including the intra mode or the motion vector for a current image block of a specific one of the image frames. The current image block may be the luminance block or one of the chrominance blocks in the specific image frame.

The intra prediction unit 22421 may perform intra-predictive coding of a current block unit relative to one or more neighboring blocks in the same frame as the current block unit based on syntax elements related to the intra mode in order to generate a predicted block. The intra mode may specify the location of reference samples selected from the neighboring blocks within the current frame. The intra prediction unit 22421 may reconstruct a plurality of chroma components of the current block unit based on a plurality of luma components of the current block unit when the chroma components are reconstructed by the prediction process unit 2242.

The intra prediction unit 22421 may reconstruct a plurality of chroma components of the current block unit based on the plurality of luma components of the current block unit when the luma components of the current block are reconstructed by the prediction process unit 2242.

The inter prediction unit 22422 may perform inter-predictive coding of the current block unit relative to one or more blocks in one or more reference image blocks based on syntax elements related to the motion vector in order to generate the predicted block. The motion vector may indicate a displacement of the current block unit within the current image block relative to a reference block unit within the reference image block. The reference block unit is a block determined to closely match the current block unit. The inter prediction unit 22422 may receive the reference image block stored in the decoded picture buffer 2246 and reconstruct the current block unit based on the received reference image blocks.

The inverse quantization/inverse transform unit 2243 may apply inverse quantization and inverse transformation to reconstruct the residual block in the pixel domain. The inverse quantization/inverse transform unit 2243 may apply inverse quantization to the residual quantized transform coefficient to generate a residual transform coefficient and then apply inverse transformation to the residual transform coefficient to generate the residual block in the pixel domain.

The inverse transformation may be inversely applied by the transformation process such as discrete cosine transform (DCT) , discrete sine transform (DST) , adaptive multiple transform (AMT) , mode-dependent non-separable secondary transform (MDNSST) , Hypercube-Givens transform (HyGT) , signal dependent transform, Karhunen-Loéve transform (KLT) , wavelet transform, integer transform, sub-band transform or a conceptually similar transform. The inverse transformation may convert the residual information from a transform domain, such as a frequency domain, back to the pixel domain. The degree of inverse quantization may be modified by adjusting a quantization parameter.

The summer 2244 adds the reconstructed residual block to the predicted block provided from the prediction process unit 2242 to produce a reconstructed block.

The filtering unit 2245 may include a deblocking filter, a sample adaptive offset (SAO) filter, a bilateral filter, and/or an adaptive loop filter (ALF) to remove blocking artifacts from the reconstructed block. Additional filters (in loop or post loop) may also be used in addition to the deblocking filter, the SAO filter, the bilateral filter and the ALF. Such filters are not explicitly illustrated for brevity but may filter the output of the summer 2244. The filtering unit 2245 may output the decoded video to the display module 122 or other video receiving unit after the filtering unit 2245 performs the filtering process for the reconstructed blocks of the specific image frame.

The decoded picture buffer 2246 may be a reference picture memory that stores the reference block for use by the prediction process unit 2242 in decoding the bitstream (in inter coding modes) . The decoded picture buffer 2246 may be formed by any of a variety of memory devices such as dynamic random-access memory (DRAM) , including synchronous DRAM (SDRAM) , magneto-resistive RAM (MRAM) , resistive RAM (RRAM) , or other types of memory devices. The decoded picture buffer 2246 may be on-chip with other components of the decoder module 124 or off-chip relative to those components.

FIG. 3A illustrates a schematic diagram of a binary horizontal partition indicated by a binary horizontal flag according to an implementation of the present disclosure; FIG. 3B illustrates a schematic diagram of a binary vertical partition indicated by a binary vertical flag according to an implementation of the present disclosure; FIG. 3C illustrates a schematic diagram of a ternary horizontal partition indicated by a ternary horizontal flag according to an implementation of the present disclosure; FIG. 3D illustrates a schematic diagram of a ternary vertical partition indicated. by a ternary vertical flag according to an implementation of the present disclosure.

In some implementations of the present disclosure, a plurality of flags are introduced for partitioning blocks. Referring to FIG. 3A to FIG. 3D, the introduced flags include at least one of a binary horizontal flag BT_HOR, a binary vertical flag BT_VER, a ternary horizontal flag TT_HOR, or a ternary vertical flag TT_VER. It is noted that each of the introduced flags carries both arity information (e.g., binary, ternary, etc. ) and orientation information (e.g., horizontal or vertical) .

Referring to FIG. 3A, the binary horizontal flag BT_HOR indicates whether to partition a block (e.g., current block) by using a binary horizontal partition (e.g., BT_HOR_split) . The binary horizontal partition splits the block with size W × H into two subblocks with size W ×H/2. As such, unlike the case described in the background which needs at least 2 bits of flags, only 1 bit of flag is needed for partitioning a block by using a binary horizontal partition if the binary horizontal flag BT_HOR is adopted.

Referring to FIG. 3B, the binary vertical flag BT_VER indicates whether to partition a block (e.g., current block) by using a binary vertical partition (e.g., BT_VER_split) . The binary vertical partition splits the block with size W × H into two subblocks with size W/2 ×H.As such, unlike the case described in the background which needs at least 2 bits of flags, only 1 bit of flag is needed for partitioning a block by using a binary vertical partition if the binary vertical flag BT_VER is adopted.

Referring to FIG. 3C, the ternary horizontal flag TT_HOR indicates whether to partition a block (e.g., current block) by using a ternary horizontal partition (e.g., TT_HOR_split) . The ternary horizontal partition splits the block with size W × H into three subblocks with size W × H/4, W × H/2, and W × H/4. As such, unlike the case described in the background which needs at least 2 bits of flags, only 1 bit of flag is needed for partitioning a block by using a ternary horizontal partition if the ternary horizontal flag TT_HOR is adopted.

Referring to FIG. 3D, the ternary vertical flag TT_VER indicates whether to partition a block (e.g., current block) by using a ternary vertical partition (e.g., TT_VER_split) . The ternary vertical partition splits the block with size W × H into three subblocks with size W/4 × H, W/2 × H, and W/4 × H. As such, unlike the case described in the background which needs at least 2 bits of flags, only 1 bit of flag is needed for partitioning a block by using a ternary vertical partition if the ternary vertical flag TT_VER is adopted.

In the present disclosure, when mentioning to a binary flag, the binary flag may be at least one of the binary horizontal flag BT_HOR or the binary vertical flag BT_VER; when mentioning to a ternary flag, the ternary flag may be at least one of the ternary horizontal flag TT_HOR or the ternary vertical flag TT_VER; when mentioning to a horizontal flag, the horizontal flag may be at least one of the binary horizontal flag BT_HOR or the ternary horizontal flag TT_HOR; when mentioning to a vertical flag, the vertical flag may be at least one of the binary vertical flag BT_VER or the ternary vertical flag TT_VER.

In some implementations, in order to encode the introduced flags, a first context table (e.g., ctxTable) may be adopted. The first context table may be, for example, Table 1 as shown below.

Table 1

The context index ctxIdx for selecting a context model from the first context table may be calculated by using parameters of ctxInc and ctxIdxOffset. For example, the context index ctxIdx may be calculated by the following formula:

ctxIdx = ctxInc + ctxIdxOffset.

The parameter ctxIdxOffset may be determined by using parameters of sh_slice_type and sh_cabac_init_flag. For example, the parameter ctxIdxOffset may be determined based on the following pseudo code:

The parameter ctxInc may be, for example, calculated by using the following formula:

ctxInc = (condL &&availableL) + (condA &&availableA) + ctxSetIdx *3,

wherein:

condL = CbHeight [chType] [xNbL] [yNbL] > cbHeight;

condA = CbWidth [chType] [xNbA] [yNbA] < cbWidth; and

ctxSetIdx = (allowSplitBtVer + allowSplitBtHor + allowSplitTtVer +allowSplitTtHor + 2 *allowSplitQt -1) /2,

wherein:

a specific block height is selected from CbHeight based on chType, xNbL, and yNbL;

chType is a channel type;

xNbL is an x coordinate (e.g., in luma samples) of a left block neighboring the current block;

yNbL is a y coordinate (e.g., in luma samples) of the left block neighboring the current block;

cbHeight is a height of the current block (e.g., in luma samples) ;

a specific block width is selected from CbWidth based on chType, xNbA, and yNbA;

xNbA is an x coordinate (e.g., in luma samples) of an above block neighboring the current block;

yNbA is a y coordinate (e.g., in luma samples) of the above block neighboring the current block;

cbWidth is a width of the current block (e.g., in luma samples) ;

allowSplitBtVer specifices that whether a binary vertical partition is allowable;

allowSplitBtHor specifies that whether a binary horizontal partition is allowable ;

allowSplitTtVer specifies that whether a ternary vertical partition is allowable ;

allowSplitTtHor specifies that whether a ternary horizontal partition is allowable ; and

allowSplitQt specifies that whether a quaternary partition is allowable.

For example, in a case that the context index of an introduced flag calculated by the above formula is 18, the context model including an initial value initValue of 18 and a shift index shiftIdx of 12 may be used for encoding the introduced flag.

In some implementations, in order to encoding the introduced flags, a second context table (e.g., ctxTable) may be adopted. The second context table may be, for example, Table 2 as shown below.

Table 2

The context index ctxIdx for selecting a context model from the second context table may be calculated by using parameters of ctxInc and ctxIdxOffset. For example, the context index ctxIdx may be calculated by the following formula:

ctxIdx = ctxInc + ctxIdxOffset.

ctxInc = (condL &&availableL) + (condA &&availableA) + ctxSetIdx *3,

wherein:

condL = CqtDepth [chType] [xNbL] [yNbL] > cqtDepth;

condA = CqtDepth [chType] [xNbA] [yNbA] > cqtDepth; and

ctxSetIdx = cqtDepth >= 2,

wherein:

a specific quad tree depth is selected from CqtDepth based on chType, xNbL, and yNbL, or based on chType, xNbA, and yNbA;

chType is a channel type;

cqtDepth is a quad tree depth of the current block;

xNbA is an x coordinate (e.g., in luma samples) of an above block neighboring the current block; and

yNbA is a y coordinate (e.g., in luma samples) of the above block neighboring the current block.

For example, in a case that the context index of an introduced flag calculated by the above formula is 5, the context model including an initial value initValue of 37 and a shift index shiftIdx of 8 may be used for encoding the introduced flag.

FIG. 4 illustrates a flowchart of a method for decoding video data by an electronic device according to an implementation of the present disclosure. The method 400 is an example only, as there are a variety of ways to perform decoding of the video data.

The method 400 may be performed using the configurations illustrated in FIG. 1 and FIG. 2, and various elements of these figures are referenced with regard to the method 400. Each block illustrated in FIG. 4 may represent one or more processes, methods, or subroutines performed. The order of blocks in FIG. 4 is illustrative only and may change. Additional blocks may be added or fewer blocks may be utilized without departing from the present disclosure.

Referring to FIG. 4, at block 410, the decoder module 124 may receive video data. For example, the video data received by the decoder module 124 may be a bitstream.

In some implementations, with reference to FIG. 1 and FIG. 2, the second electronic device 120 may receive the bitstream from an encoder, such as the first electronic device 110, or other video providers via the second interface 126. The second interface 126 may provide the bitstream to the decoder module 124.

The entropy decoding unit 2241 may decode the bitstream to determine a plurality of prediction indications and a plurality of partitioning indications for a plurality of image frames. Then, the decoder module 124 may further reconstruct the plurality of image frames based on the prediction indications and the partitioning indications. The prediction indications and the partitioning indications may include a plurality of flags and a plurality of indices.

At block 420, the decoder module 124 may determine a block unit from an image frame according to the video data. For example, the block unit may be a current block, but which is not limited in the present disclosure.

In some implementations, with reference to FIG. 1 and FIG. 2, the decoder module 124 may determine the image frame based on the bitstream, divide the image frame into a current block according to the partition indications in the bitstream, and determine a block unit according to the current block. For example, the decoder module 124 may divide the image frames to generate a plurality of CTUs. In some cases, the current block may be one of the plurality of CTUs. In some cases, the decoder module 124 may further divide one of the CTUs to determine the current block according to the partition indications based on any video coding standard.

In some implementations, the partition indications include a plurality of flags, and the plurality of flags include the binary horizontal flag BT_HOR and the binary vertical flag BT_VER, as described above with reference to FIG. 3A and FIG. 3B. In some implementations, the plurality of flags further include at least one of the ternary horizontal flag TT_HOR or the ternary vertical flag TT_VER, as described above with reference to FIG. 3C and FIG. 3D.

It is noted that the block unit may not be determined as the current block.

In some implementations, the block unit determined at block 420 may be a parent block of the current block. For example, if the current block is split from another block which is larger than the current block, the another block is the parent block of the current block.

In some implementations, the block unit determined at block 420 may be a neighboring block of the current block. For example, if a block includes the pixel above the top leftmost pixel of the current block, the block may be a neighboring block of the current block. For another example, if a block includes the pixel to the left of the top leftmost pixel of the current block, the block may be a neighboring block of the current block. However, the definition of neighboring block of the current block is not limited in the present disclosure. One of ordinary skill in the art can have their own definition of the neighboring block as their needs.

After determining the block unit at the block 420, the decoder module 124 may partition the current block according to the plurality of flags included in the bitstream. The current block is not limited in the present disclosure. In some implementations, the current block may be the CTU, but which is not limited to the CTU. In some implementations, the current block may be any block (e.g., QT leaf node, MTT node, etc. ) that has been partitioned by at least one of QT partition or MTT partition.

Referring to FIG. 4 again, at block 430, the decoder module 124 may comparing a width of the block unit and a height of the block unit.

Specifically, the block unit may be used for determining a priority of an orientation of the partition. More specifically, if a width of the block unit and a height of the block unit are different, usages of flags with two orientations may be different. For example, in a case that a width of a current block is greater than a height of the current block, a usage of a horizontal flag for partitioning the current block may be higher than that of a vertical flag for partitioning the current block, and vice versa. Therefore, the decoder module 124 may determine the priority of the flags according to the comparison of the width and the height of the block unit, and as such the bit number of the bitstream may be reduced.

In some implementations, in a case that the width of the block unit is greater than the height of the block unit, block 440 is entered; and in a case that the height of the block unit is greater than the width of the block unit, block 450 is entered. At block 440, the decoder module 124 may determine that a first binary flag is prior to a second binary flag; and at block 450, the decoder module 124 may determine that a second binary flag is prior to the first binary flag, where the first binary flag has a different orientation from the second binary flag.

In some implementations, the first binary flag may be a binary horizontal flag BT_HOR which indicates whether to partition the current block using the binary horizontal partition, and the second binary flag may be a binary vertical flag BT_VER which indicates whether to partition the current block using the binary vertical partition.

It is noted that, in general, binary partitions have higher usages than ternary usages. In some implementations, in a case that the width of the block unit is equal to the height of the block unit, the decoder module 124 may determine that at least one of the binary horizontal flag BT_HOR or the binary vertical flag BT_VER is prior to the ternary flags (e.g., ternary horizontal flag TT_HOR and ternary vertical flag TT_VER) .

In some cases, a priority order of the binary vertical flag BT_VER, the binary horizontal flag BT_HOR and one of the ternary flags determined by the decoder module 124 may be the binary vertical flag BT_VER, the binary horizontal flag BT_HOR and the one of the ternary flags, or may be the binary horizontal flag BT_HOR, the binary vertical flag BT_VER and the one of the ternary flags.

In some cases, a priority order of the binary vertical flag BT_VER, the binary horizontal flag BT_HOR and one of the ternary flags determined by the decoder module 124 may be the binary vertical flag BT_VER, the one of the ternary flags and the binary horizontal flag BT_HOR, or may be the binary horizontal flag BT_HOR, the one of the ternary flags and the binary vertical flag BT_VER.

FIG. 5 illustrates a schematic diagram of a signaling mechanism of block partition when a width of a block unit is greater than a height of the block unit according to an implementation of the present disclosure.

Referring to FIG. 5, the current block may be a CTU and the width of a block unit may be greater than (or equal to) the height of the block unit. A priority order of the plurality of flags determined by the decoder module 124 may be a CU flag (e.g., split_cu_flag) , a QT flag (e.g., split_qt_flag) , a binary horizontal flag BT_HOR, a binary vertical flag BT_VER, and a ternary horizontal flag TT_HOR.

At point 501, the decoder module 124 may determine whether the CU flag is true. In a case that the CU flag is false, no split is performed on the current block; and in a case that the CU flag is true, the decoder module 124 may determine whether the QT flag is true at point 503.

At point 503, in a case that the QT flag is true, the decoder module 124 may partition the current block by using a quaternary partition (e.g., QT_split) ; and in a case that the QT flag is false, the decoder module 124 may determine whether the binary horizontal flag BT_HOR is true at point 505.

At point 505, in a case that the binary horizontal flag BT_HOR is true, the decoder module 124 may partition the current block by using a binary horizontal partition (e.g., BT_HOR_split) ; and in a case that the binary horizontal flag BT_HOR is false, the decoder module 124 may determine whether the binary vertical flag BT_VER is true at point 507.

At point 507, in a case that the binary vertical flag BT_VER is true, the decoder module 124 may partition the current block by using a binary vertical partition (e.g., BT_VER_split) ; and in a case that the binary vertical flag BT_VER is false, the decoder module 124 may determine whether the ternary horizontal flag TT_HOR is true at point 509.

At point 509, in a case that the ternary horizontal flag TT_HOR is true, the decoder module 124 may partition the current block by using a ternary horizontal partition (e.g., TT_HOR_split) ; and in a case that the ternary horizontal flag TT_HOR is false, the decoder module 124 may partition the current block by using a ternary vertical partition (e.g., TT_VER_split) .

Accordingly, the current block may be partitioned according to the plurality of flags.

In some implementations, all horizontal flags are determined prior to the vertical flags in a case that the width of the block unit is greater than (or equal to) the height of the block unit. Therefore, the priority of ternary horizontal flag TT_HOR may be higher than that of the binary vertical flag BT_VER.

Specifically, with reference to FIG. 5, the decoder module 124 may determine whether the ternary horizontal flag TT_HOR is true at point 507. At point 507, in a case that the ternary horizontal flag TT_HOR is true, the decoder module 124 may partition the current block by using a ternary horizontal partition (e.g., TT_HOR_split) ; and in a case that the ternary horizontal flag TT_HOR is false, the decoder module 124 may determine whether the binary vertical flag BT_VER is true at point 509. At point 509, in a case that the binary vertical flag BT_VER is true, the decoder module 124 may partition the current block by using a binary vertical partition (e.g., BT_VER_split) ; and in a case that the binary vertical flag BT_VER is false, the decoder module 124 may partition the current block by using a ternary vertical partition (e.g., TT_VER_split) .

In some implementations, the only ternary flag in the plurality of flags is a ternary vertical flag TT_VER instead of the ternary horizontal flag TT_HOR. Based on the above descriptions, one of ordinary skill in the art should know how to replace the ternary horizontal flag TT_HOR by the ternary vertical flag TT_VER, therefore details of which are not repeated herein.

In some implementations, an asymmetric binary tree (ABT) structure and/or an asymmetric ternary tree (ATT) structure may be adopted. In this case, the plurality of flags may further include at least one ABT flag each indicating an asymmetric binary partition, and at least one ATT flag each indicating an asymmetric ternary partition. For example, the at least one ABT flag may be determined after any binary flag (e.g., binary horizontal flag BT_HOR or binary vertical flag BT_VER) is determined true. For example, the at least one ATT flag may be determined after any ternary flag (e.g., ternary horizontal flag TT_HOR or ternary vertical flag TT_VER) is determined true. For example, the at least one ATT flag may be determined after a ternary flag (e.g., ternary horizontal flag TT_HOR or ternary vertical flag TT_VER) with a lowest priority is determined false. However, the implementation of the ABT/ATT structure is not limited in the present disclosure. One of ordinary skill in the art can have their own design according to their needs.

FIG. 6 illustrates a schematic diagram of a signaling mechanism of block partition when the height of the block unit is greater than the width of the block unit according to an implementation of the present disclosure.

Referring to FIG. 6, the current block may be a CTU and the height of a block unit may be greater than (or equal to) the width of the block unit. A priority order of the plurality of flags determined by the decoder module 124 is a CU flag (e.g., split_cu_flag) , a QT flag (e.g., split_qt_flag) , a binary vertical flag BT_VER, a binary horizontal flag BT_HOR, and a ternary vertical flag TT_VER.

At point 601, the decoder module 124 may determine whether the CU flag is true. In a case that the CU flag is false, no split is performed on the current block; and in a case that the CU flag is true, the decoder module 124 may determine whether the QT flag is true at point 603.

At point 603, in a case that the QT flag is true, the decoder module 124 may partition the current block by using a quaternary partition (e.g., QT_split) ; and in a case that the QT flag is false, the decoder module 124 may determine whether the binary vertical flag BT_VER is true at point 605.

At point 605, in a case that the binary vertical flag BT_VER is true, the decoder module 124 may partition the current block by using a binary vertical partition (e.g., BT_VER_split) ; and in a case that the binary vertical flag BT_VER is false, the decoder module 124 may determine whether the binary horizontal flag BT_HOR is true at point 607.

At point 607, in a case that the binary horizontal flag BT_HOR is true, the decoder module 124 may partition the current block by using a binary horizontal partition (e.g., BT_HOR_split) ; and in a case that the binary horizontal flag BT_HOR is false, the decoder module 124 may determine whether the ternary vertical flag TT_VER is true at point 609.

At point 609, in a case that the ternary vertical flag TT_VER is true, the decoder module 124 may partition the current block by using a ternal vertical partition (TT_VER_split) ; and in a case that the ternary vertical flag TT_VER is false, the decoder module 124 may partition the current block by using a ternary horizontal partition (e.g., TT_HOR_split) .

In some implementations, all vertical flags are determined prior to the horizontal flags in a case that the height of the block unit is greater than (or equal to) the width of the block unit. Therefore, the priority of ternary vertical flag TT_VER may be higher than that of the binary horizontal flag BT_HOR.

Specifically, with reference to FIG. 6, the decoder module 124 may determine whether the ternary vertical flag TT_VER is true at point 607. At point 607, in a case that the ternary vertical flag TT_VER is true, the decoder module 124 may partition the current block by using a ternary vertical partition (e.g., TT_VER_split) ; and in a case that the ternary vertical flag TT_VER is false, the decoder module 124 may determine whether the binary horizontal flag BT_HOR is true at point 609. At point 609, in a case that the binary horizontal flag BT_HOR is true, the decoder module 124 may partition the current block by using a binary horizontal partition (e.g., BT_HOR_split) ; and in a case that the binary horizontal flag BT_HOR is false, the decoder module 124 may partition the current block by using a ternary horizontal partition (e.g., TT_HOR_split) .

In some implementations, the only ternary flag in the plurality of flags is a ternary horizontal flag TT_HOR instead of the ternary vertical flag TT_VER. Based on the above descriptions, one of ordinary skill in the art should know how to replace the ternary vertical flag TT_VER by the ternary horizontal flag TT_HOR, therefore details of which are not repeated herein.

In some implementations, an asymmetric binary tree (ABT) and/or an asymmetric ternary tree (ATT) structure may be adopted. In this case, the plurality of flags may further include at least one ABT flag each indicating an asymmetric binary partition, and at least one ATT flag each indicating an asymmetric ternary partition. For example, the at least one ABT flag may be determined in a case that a binary flag (e.g., binary horizontal flag BT_HOR or binary vertical flag BT_VER) is determined true. For example, the at least one ATT flag may be determined in a case that a ternary flag (e.g., ternary horizontal flag TT_HOR or ternary vertical flag TT_VER) is determined true. For example, the at least one ATT flag may be determined after a ternary flag (e.g., ternary horizontal flag TT_HOR or ternary vertical flag TT_VER) with a lowest priority is determined false. However, the implementation of the ABT/ATT structure is not limited in the present disclosure. One of ordinary skill in the art can have their own design according to their needs.

FIG. 7 illustrates a flowchart of another method for decoding video data by an electronic device according to an implementation of the present disclosure. The method 700 is an example only, as there are a variety of ways to perform decoding of the video data.

The method 700 may be performed using the configurations illustrated in FIG. 1 and FIG. 2, and various elements of these figures are referenced with regard to the method 700. Each block illustrated in FIG. 7 may represent one or more processes, methods, or subroutines performed. The order of blocks in FIG. 7 is illustrative only and may change. Additional blocks may be added or fewer blocks may be utilized without departing from the present disclosure.

Referring to FIG. 7, block 710 and block 720 are similar to block 410 and block 420 as described above with reference to FIG. 4, therefore details of which are not repeated herein.

At block 730, the decoder module 124 may determine a priority of a horizontal flag and a vertical flag according to a size of the block unit.

As described above, the block unit may be used for determining a priority of different orientations of the partitions or the flags. If a width of the block unit and a height of the block unit are different, usages of flags with two orientations (e.g., horizontal and vertical) may be different. For example, in a case that a width of a current block is greater than a height of the current block, a usage of a horizontal flag for partitioning the current block may be higher than that of a vertical flag for partitioning the current block, and vice versa. Therefore, the decoder module 124 may determine the priority of the flags according to the comparison of the width and the height of the block unit, and as such the bit number of the bitstream may be reduced.

In some implementations, block 730 further includes block 7301 and block 7303.

At block 7301, the decoder module 124 may compare a width of the block unit and a height of the block unit to generate a comparison result.

At block 7303, the decoder module 124 may determine the priority according to the comparison result.

In some implementations, in a case that the comparison result shows that the width of the block unit is greater than the height of the block unit, the decoder module 124 may determine that the horizontal flag is prior to the vertical flag; and in a case that the comparison result shows that the height of the block unit is greater than the width of the block unit, the decoder module 124 may determine that the vertical flag is prior to the horizontal flag. That is, when the width of the block unit is greater than the height of the block unit, the decoder module 124 may determine whether the horizontal flag is true prior to determining whether the vertical flag is true; when the height of the block unit is greater than the width of the block unit, the decoder module 124 may determine whether the vertical flag is true prior to determining whether the horizontal flag is true.

In some implementations, the horizontal flag and the vertical flag may indicate flags having the same arity. For example, the horizontal flag may be a binary horizontal flag BT_HOR and the vertical flag may be a binary vertical flag BT_VER.

As such, in a case that the comparison result shows that the width of the block unit is greater than the height of the block unit, the decoder module 124 may determine that the binary horizontal flag BT_HOR is prior to the binary vertical flag BT_VER regardless of the priority of any ternary flag. In other words, a priority order may be the binary horizontal flag BT_HOR, the binary vertical flag BT_VER, and one of a ternary horizontal flag TT_HOR and a ternary vertical flag TT_VER (e.g., as shown in FIG. 5) , or may be the binary horizontal flag BT_HOR, one of the ternary horizontal flag TT_HOR and the ternary vertical flag TT_VER, and the binary vertical flag BT_VER.

On the other hand, in a case that the comparison result shows that the height of the block unit is greater than the width of the block unit, the decoder module 124 may determine that the binary vertical flag BT_VER is prior to the binary horizontal flag BT_HOR regardless of the priority of any ternary flag. In other words, a priority order may be the binary vertical flag BT_VER, the binary horizontal flag BT_HOR, and one of a ternary horizontal flag TT_HOR and a ternary vertical flag TT_VER (e.g., as shown in FIG. 6) , or may be the binary vertical flag BT_VER, one of the ternary horizontal flag TT_HOR and the ternary vertical flag TT_VER, and the binary horizontal flag BT_HOR.

In some implementations, the horizontal flag indicates any flag with a horizontal orientation (e.g., any flag indicates whether to partition the current block using a horizontal partition) and the vertical flag indicates any flag with a vertical orientation (e.g., any flag indicates whether to partition the current block using a vertical partition) . Therefore, in a case that the comparison result shows that the width of the block unit is greater than the height of the block unit, the decoder module 124 may determine that all flags with a horizontal orientation are prior to all flags with a vertical orientation; in a case that the comparison result shows that the height of the block unit is greater than the width of the block unit, the decoder module 124 may determine that all flags with a vertical orientation are prior to all flags with a horizontal orientation.

After the priority of the horizontal flag and the vertical flag is determined at block 730, at block 740, the decoder module 124 may partition the current block according to a plurality of flags and the determined priority, where the plurality of flags include the horizontal flag and the vertical flag.

Taking FIG. 5 as an example, the priority determined at block 730 shows that a priority order of a binary horizontal flag BT_HOR, a binary vertical flag BT_VER and a ternary horizontal flag TT_HOR is the binary horizontal flag BT_HOR, the binary vertical flag BT_VER and the ternary horizontal flag TT_HOR. In a case that the current block is a CTU, a priority order of the plurality flags for partitioning the current block may by the CU flag, the QT flag, the binary horizontal flag BT_HOR, the binary vertical flag BT_VER and the ternary horizontal flag TT_HOR.

Taking FIG. 6 as an example, the priority determined at block 730 shows that a priority order of a binary horizontal flag BT_HOR, a binary vertical flag BT_VER and a ternary vertical flag TT_VER is the binary vertical flag BT_VER, the binary horizontal flag BT_HOR and the ternary vertical flag TT_VER. In a case that the current block is a CTU, a priority order of the plurality flags for partitioning the current block may by the CU flag, the QT flag, the binary vertical flag BT_VER, the binary horizontal flag BT_HOR and the ternary vertical flag TT_VER.

Accordingly, the current block may be partitioned according to the plurality of flags and the priority determined at block 730.

FIG. 8 illustrates a block diagram of the encoder module 114 of the first electronic device 110 illustrated in FIG. 1 according to an implementation of the present disclosure. The encoder module 114 may include a prediction processor (e.g., prediction process unit 8141) , at least a first summer (e.g., first summer 8142) and a second summer (e.g., second summer 8145) , a transform/quantization processor (e.g., transform/quantization unit 8143) , an inverse quantization/inverse transform processor (e.g., inverse quantization/inverse transform unit 8144) , a filter (e.g., filtering unit 8146) , a decoded picture buffer (e.g., decoded picture buffer 8147) , and an entropy encoder (e.g., entropy encoding unit 8148) . The prediction process unit 8141 of the encoder module 114 may further include a partition processor (e.g., partition unit 81411) , an intra prediction processor (e.g., intra prediction unit 81412) , and an inter prediction processor (e.e., inter prediction unit 81413) .

The encoder module 114 may receive the source video and encode the source video to output a bitstream. The encoder module 114 may receive source video including a plurality of image frames and then divide the image frames according to a coding structure. Each of the image frames may be divided into at least one image block.

The at least one image block may include a luminance block having a plurality of luminance samples and at least one chrominance block having a plurality of chrominance samples. The luminance block and the at least one chrominance block may be further divided to generate macroblocks, coding tree units (CTUs) , coding blocks (CBs) , sub-divisions thereof, and/or another equivalent coding unit.

The encoder module 114 may perform additional sub-divisions of the source video. It should be noted that the disclosed implementations are generally applicable to video coding regardless of how the source video is partitioned prior to and/or during the encoding.

During the encoding process, the prediction process unit 8141 may receive a current image block of a specific one of the image frames. The current image block may be the luminance block or one of the chrominance blocks in the specific image frame.

The partition unit 81411 may divide the current image block into multiple block units. The intra prediction unit 81412 may perform intra-predictive coding of a current block unit relative to one or more neighboring blocks in the same frame as the current block unit in order to provide spatial prediction. The inter prediction unit 81413 may perform inter-predictive coding of the current block unit relative to one or more blocks in one or more reference image blocks to provide temporal prediction.

The prediction process unit 8141 may select one of the coding results generated by the intra prediction unit 81412 and the inter prediction unit 81413 based on a mode selection method, such as a cost function. The mode selection method may be a rate-distortion optimization (RDO) process.

The prediction process unit 8141 may determine the selected coding result and provide a predicted block corresponding to the selected coding result to the first summer 8142 for generating a residual block and to the second summer 8145 for reconstructing the encoded block unit. The prediction process unit 8141 may further provide syntax elements such as motion vectors, intra mode indicators, partition information, and other syntax information to the entropy encoding unit 8148.

The intra prediction unit 81412 may intra predict the current block unit. The intra prediction unit 81412 may determine an intra prediction mode directed toward a reconstructed sample neighboring the current block unit in order to encode the current block unit.

The intra prediction unit 81412 may encode the current block unit using various intra prediction modes. The intra prediction unit 81412 of the prediction process unit 8141 may select an appropriate intra prediction mode from the selected modes. The intra prediction unit 81412 may encode the current block unit using a cross component prediction mode to predict one of the two chroma components of the current block unit based on the luma components of the current block unit. The intra prediction unit 81412 may predict a first one of the two chroma components of the current block unit based on the second of the two chroma components of the current block unit.

The inter prediction unit 81413 may inter predict the current block unit as an alternative to the intra prediction performed by the intra prediction unit 81412. The inter prediction unit 81413 may perform motion estimation to estimate motion of the current block unit for generating a motion vector.

The motion vector may indicate a displacement of the current block unit within the current image block relative to a reference block unit within a reference image block. The inter prediction unit 81413 may receive at least one reference image block stored in the decoded picture buffer 8147 and estimate the motion based on the received reference image blocks to generate the motion vector.

The first summer 8142 may generate the residual block by subtracting the prediction block determined by the prediction process unit 8141 from the original current block unit. The first summer 8142 may represent the component or components that perform this subtraction.

The transform/quantization unit 8143 may apply a transform to the residual block in order to generate a residual transform coefficient and then quantize the residual transform coefficients to further reduce bit rate. The transform may be one of a DCT, DST, AMT, MDNSST, HyGT, signal dependent transform, KLT, wavelet transform, integer transform, sub-band transform or a conceptually similar transform.

The transform may convert the residual information from a pixel value domain to a transform domain, such as a frequency domain. The degree of quantization may be modified by adjusting a quantization parameter.

The transform/quantization unit 8143 may perform a scan of the matrix including the quantized transform coefficients. Alternatively, the entropy encoding unit 8148 may perform the scan.

The entropy encoding unit 8148 may receive a plurality of syntax elements from the prediction process unit 8141 and the transform/quantization unit 8143 including a quantization parameter, transform data, motion vectors, intra modes, partition information, and other syntax information. The entropy encoding unit 8148 may encode the syntax elements into the bitstream.

The entropy encoding unit 8148 may entropy encode the quantized transform coefficients by performing CAVLC, CABAC, SBAC, PIPE coding or another entropy coding technique to generate an encoded bitstream. The encoded bitstream may be transmitted to another device (i.e., the second electronic device 120 in FIG. 1) or archived for later transmission or retrieval.

The inverse quantization/inverse transform unit 8144 may apply inverse quantization and inverse transformation to reconstruct the residual block in the pixel domain for later use as a reference block. The second summer 8145 may add the reconstructed residual block to the prediction block provided from the prediction process unit 8141 in order to produce a reconstructed block for storage in the decoded picture buffer 8147.

The filtering unit 8146 may include a deblocking filter, a SAO filter, a bilateral filter, and/or an ALF to remove blocking artifacts from the reconstructed block. Additional filters (in loop or post loop) may be used in addition to the deblocking filter, the SAO filter, the bilateral filter and the ALF. Such filters are not illustrated for brevity and may filter the output of the second summer 8145.

The decoded picture buffer 8147 may be a reference picture memory that stores the reference block for use by the encoder module 114 to encode video, such as in intra or inter coding modes. The decoded picture buffer 8147 may include a variety of memory devices such as DRAM, including SDRAM, MRAM, RRAM) , or other types of memory devices. The decoded picture buffer 8147 may be on-chip with other components of the encoder module 114 or off-chip relative to those components.

The encoder module 114 may receive video data and use a plurality of prediction modes to predict a plurality of image frames in the video data. In the implementation, the video data may be a video and the prediction modes may be indicated by a plurality of flags and a plurality of indices.

The encoder module 114 may determine a block unit from an image frame according to the received video data or bitstream, then partition a current block according to a plurality of flags for partitioning including a first binary flag and a second binary flag, where an orientation of the first binary flag and an orientation of the second binary flag are different. When partitioning the current block according to the plurality of flags, the encoder module 114 may compare a width of the block unit and a height of the block unit. In a case that the width is larger than the height, the encoder module 114 may determine that the first binary flag is prior to the second binary flag. In a case that the width is smaller than the height, the encoder module 114 may determine that the second binary flag is prior to the first binary flag.

The encoder module 114 may further determine a block unit from an image frame according to the received video data or bitstream, determine a priority of a horizontal flag and a vertical flag according to a size of the block unit, then partition a current block according to a plurality of flags and the determined priority, the plurality of flags used for partitioning including the horizontal flag and the vertical flag. When determining the priority of the horizontal flag and the vertical flag, the encoder module 114 may compare a width of the block unit and a height of the block unit to generate a comparison result, then determine the priority according to the comparison result. Specifically, in a case that the comparison result shows the width is larger than the height, the encoder module 114 may determine that the horizontal flag is prior to the vertical flag; and in a case that the comparison result shows the height is larger than the width, the encoder module 114 may determine that the vertical flag is prior to the horizontal flag.

That is, the encoder module 114 may performing block partitioning by using the

methods

400 and 700 as illustrated in FIGs. 4 and 7.

The disclosed implementations are to be considered in all respects as illustrative and not restrictive. It should also be understood that the present disclosure is not limited to the specific disclosed implementations but that many rearrangements, modifications, and substitutions are possible without departing from the scope of the present disclosure.

Claims

A method of decoding a bitstream by an electronic device, the method comprising:

receiving the bitstream;

determining a block unit from an image frame according to the bitstream; and

partitioning a current block according to a plurality of flags, the plurality of flags comprising a first binary flag and a second binary flag, and partitioning the current block according to the plurality of flags comprising:

comparing a width of the block unit and a height of the block unit;

in a case that the width is larger than the height, determining that the first binary flag is prior to the second binary flag, and

in a case that the width is smaller than the height, determining that the second binary flag is prior to the first binary flag,

wherein an orientation of the first binary flag is different from an orientation of the second binary flag.
The method of claim 1, wherein the first binary flag is a binary horizontal flag, and the second binary flag is a binary vertical flag.
The method of claim 2, wherein:

the binary horizontal flag indicates whether to partition the current block using a binary horizontal partition, and

the binary vertical flag indicates whether to partition the current block using a binary vertical partition.
The method of claim 2, wherein the plurality of the flags further comprises a ternary flag, and partitioning the current block according to the plurality of flags further comprises:

in a case that the width is larger than the height and the ternary flag is a ternary horizontal flag, determining that the ternary flag is prior to the second binary flag, the ternary horizontal flag indicating whether to partition the current block using a ternary horizontal partition; and

in a case that the height is larger than the width and the ternary flag is a ternary vertical flag, determining that the ternary flag is prior to the first binary flag, the ternary vertical flag indicating whether to partition the current block using a ternary vertical partition.
The method of claim 4, wherein partitioning the current block according to the plurality of flags further comprises:

in the case that the width is larger than the height and the ternary flag is the ternary horizontal flag, determining that the first binary flag is prior to the ternary flag, and

in the case that the height is larger than the width and the ternary flag is the ternary vertical flag, determining that the second binary is prior to the ternary flag.
The method of claim 1, wherein the plurality of the flags further comprises a ternary flag, and the method further comprises:

in a case that the width is equal to the height, determining that at least one of the first binary flag or the second binary flag is prior to the ternary flag.
The method of claim 1, wherein the block unit is one of the current block, a parent block of the current block, and a neighboring block of the current block.
An electronic device for decoding a bitstream, the electronic device comprising:

at least one processor; and

a storage device coupled to the at least one processor and storing at least one instruction which, when executed by the at least one processor, causes the at least one processor to:

receive the bitstream;

determine a block unit from an image frame according to the bitstream; and

partition a current block according to a plurality of flags, the plurality of flags comprising a first binary flag and a second binary flag, and partitioning the current block according to the plurality of flags comprising:

comparing a width of the block unit and a height of the block unit;

in a case that the width is larger than the height, determining that the first binary flag is prior to the second binary flag, and

in a case that the width is smaller than the height, determining that the second binary flag is prior to the first binary flag,

wherein an orientation of the first binary flag is different from an orientation of the second binary flag.
The electronic device of claim 8, wherein the first binary flag is a binary horizontal flag, and the second binary flag is a binary vertical flag.
The electronic device of claim 9, wherein:

the binary horizontal flag indicates whether to partition the current block using a binary horizontal partition, and

the binary vertical flag indicates whether to partition the current block using a binary vertical partition.
The electronic device of claim 9, wherein the plurality of the flags further comprises a ternary flag, and partitioning the current block according to the plurality of flags further comprises:

in a case that the width is larger than the height and the ternary flag is a ternary horizontal flag, determining that the ternary flag is prior to the second binary flag, the ternary horizontal flag indicating whether to partition the current block using a ternary horizontal partition; and

in a case that the height is larger than the width and the ternary flag is a ternary vertical flag, determining that the ternary flag is prior to the first binary flag, the ternary vertical flag indicating whether to partition the current block using a ternary vertical partition.
The electronic device of claim 11, wherein partitioning the current block according to the plurality of flags further comprises:

in the case that the width is larger than the height and the ternary flag is the ternary horizontal flag, determining that the first binary flag is prior to the ternary flag, and

in the case that the height is larger than the width and the ternary flag is the ternary vertical flag, determining that the second binary is prior to the ternary flag.
The electronic device of claim 8, wherein the plurality of the flags further comprises a ternary flag, and when the at least one instruction is executed by the at least one processor, the at least one processor is further caused to:

in a case that the width is equal to the height, determine that at least one of the first binary flag or the second binary flag is prior to the ternary flag.
The electronic device of claim 8, wherein the block unit is one of the current block, a parent block of the current block, and a neighboring block of the current block.
A method of decoding a bitstream by an electronic device, the method comprising:

receiving the bitstream;

determining a block unit from an image frame according to the bitstream;

determining a priority of a horizontal flag and a vertical flag according to a size of the block unit; and

partitioning a current block according to a plurality of flags and the determined priority, wherein the plurality of flags comprises the horizontal flag and the vertical flag.
The method of claim 15, wherein determining the priority of the horizontal flag and the vertical flag according to the size of the block unit comprises:

comparing a width of the block unit and a height of the block unit to generate a comparison result; and

determining the priority according to the comparison result, comprising:

in a case that the comparison result shows the width is larger than the height, determining that the horizontal flag is prior to the vertical flag; and

in a case that the comparison result shows the height is larger than the width, determining that the vertical flag is prior to the horizontal flag.
The method of claim 16, wherein the horizontal flag and the vertical flag have the same arity.
The method of claim 17, wherein the horizontal flag is a binary horizontal flag, and the vertical flag is a binary vertical flag.
The method of claim 15, wherein:

the horizonal flag indicates whether to partition the current block using a horizonal partition,

the vertical flag indicates whether to partition the current block using a vertical partition; and

partitioning the current block according to the plurality of flags and the priority comprises determining a first flag of the plurality of flags prior to determining a second flag of the plurality of flags in a case that the first flag has a higher priority than the second flag.
The method of claim 15, wherein the block unit is one of the current block, a parent block of the current block, and a neighboring block of the current block.