WO2022257131A1 - 一种存储装置及电子设备 - Google Patents

一种存储装置及电子设备 Download PDF

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Publication number
WO2022257131A1
WO2022257131A1 PCT/CN2021/099820 CN2021099820W WO2022257131A1 WO 2022257131 A1 WO2022257131 A1 WO 2022257131A1 CN 2021099820 W CN2021099820 W CN 2021099820W WO 2022257131 A1 WO2022257131 A1 WO 2022257131A1
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Prior art keywords
pin
charging
power supply
surge protection
electrically connected
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PCT/CN2021/099820
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English (en)
French (fr)
Inventor
俞文全
侯建平
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深圳市江波龙电子股份有限公司
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Publication of WO2022257131A1 publication Critical patent/WO2022257131A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/062—Securing storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02—Contact members

Definitions

  • the present application relates to the technical field of data storage, and in particular to a storage device and electronic equipment.
  • the storage device in order to ensure the effective progress of data storage and the corresponding timing requirements, in the process of powering on the storage device, usually before it reaches a stable working state, the storage device, and the specific storage device
  • the capacitor device is pre-charged, so that the storage device can quickly enter the working state when it receives the working power signal.
  • the gold finger corresponding to the interface in the storage device usually adopts the design of long and short metal contact pins, and the long pin is used for It is used to precharge the storage device in advance during the plugging and unplugging process.
  • the current of a single metal pin is too large at the moment of plugging and unplugging to realize the electrical connection, a relatively high current surge will generally occur, which will wear out the storage device if it is mild, or directly damage the storage device if it is severe.
  • the more conventional method is to use a current-limiting switch chip or a fuse to protect the subsequent circuit, so as to prevent damage to the subsequent circuit caused by the plug-in transient current.
  • the cost of the current-limiting switch is usually high and there are many peripheral components, which will occupy more device area; while the fuse can only be used for over-current protection, and the over-current situation will disconnect the front and rear end lines to achieve protection.
  • the function of the back-end circuit cannot achieve the function of anti-surge current under the condition of satisfying the freewheeling (uninterrupted current).
  • the present application provides a storage device to solve the anti-surge current protection adopted by the storage device in the prior art, which has high cost, occupies a large device area, or cannot resist the surge current under the condition of satisfying the freewheeling current The problem.
  • a technical solution adopted by this application is to provide a storage device, wherein the storage device includes: an interface, the interface includes a pre-charging pin and a power supply pin; wherein the pre-charging pin protrudes from the power supply Pin setting; surge protection circuit, electrically connected between the pre-charging pin and the power pin, so that when the interface is plugged into the external terminal, so that when the pre-charging pin is electrically connected to the corresponding interface contact piece of the external terminal, through the pre-charging pin
  • the charging pin receives the pre-charging source signal sent by the external terminal, and limits the current of the pre-charging source signal; the storage function circuit is electrically connected to the power supply pin and the surge protection circuit, and the storage function circuit receives the current limited by the surge protection circuit.
  • the pre-charging source signal for pre-charging when the power pin is electrically connected to the corresponding interface contact piece of the external terminal, the storage function circuit receives the working power signal sent by the external terminal through the power pin.
  • the number of the pre-charging pin, the power pin and the surge protection circuit are the same, and each includes at least one, wherein each surge protection circuit is electrically connected between the corresponding pre-charging pin and the power pin.
  • the power supply pin includes a first power supply pin and a second power supply pin. After the first power supply pin and the second power supply pin are electrically connected, they are electrically connected to one end of the surge protection circuit, and the other end of the surge protection circuit Electrically connected to the precharge pin.
  • the power supply pin includes a first power supply pin and a second power supply pin. After the first power supply pin and the pre-charging pin are electrically connected, they are electrically connected to one end of the surge protection circuit, and the other end of the surge protection circuit is electrically connected to the surge protection circuit. Connect to the second supply pin.
  • the surge protection circuit is one of a resistor, a choke coil, and a low-pass filter.
  • the surge protection circuit is a variable resistor, and the variable resistor is in a high resistance state when an instantaneous large current flows through it, and is in a low resistance state when a small current flows through it.
  • the storage device also includes a power conversion circuit, and the power conversion circuit is electrically connected to the power pin, the surge protection circuit and the storage function circuit, so as to receive the pre-charging source signal sent by the surge protection circuit or the work signal sent by the power pin.
  • the power conversion circuit is electrically connected to the power pin, the surge protection circuit and the storage function circuit, so as to receive the pre-charging source signal sent by the surge protection circuit or the work signal sent by the power pin.
  • the power conversion circuit is electrically connected to the power pin, the surge protection circuit and the storage function circuit, so as to receive the pre-charging source signal sent by the surge protection circuit or the work signal sent by the power pin.
  • the interface also includes a communication pin
  • the storage function circuit includes a control sub-circuit and a storage sub-circuit
  • the communication pin is electrically connected to an external terminal
  • the control sub-circuit is electrically connected to the communication pin
  • the power conversion circuit and the storage sub-circuit and the control sub-circuit passes through
  • the communication pin receives the data information sent by the external intelligent terminal, and sends the data information to the storage sub-circuit for storage.
  • the interface is a SATA interface.
  • another technical solution adopted by the present application is to provide an electronic device, wherein the electronic device includes the storage device as described in any one of the above items.
  • the storage device in the present application includes: an interface, a surge protection circuit, and a storage function circuit; wherein, the interface includes a pre-charging pin and a power supply pin, and the surge protection circuit Connected between the pre-charge pin and the power pin to receive external power through the pre-charge pin when the interface is plugged into the external terminal so that the pre-charge pin is electrically connected to the corresponding interface contact piece of the external terminal.
  • the pre-charging source signal sent by the terminal is sent to the storage function circuit for pre-charging after the surge protection circuit limits the current of the pre-charging source signal, so that the storage device can be effectively protected from being damaged by the pre-charging overcurrent, and the corresponding The implementation cost is also low, so that when the subsequent power pins are electrically connected to the corresponding interface contacts of the external terminals, the working power signals sent by the external terminals can be effectively received through the power pins.
  • FIG. 1 is a schematic structural diagram of a first embodiment of a storage device of the present application
  • FIG. 2 is a schematic structural diagram of a specific embodiment of an interface in the storage device in FIG. 1;
  • FIG. 3 is a schematic structural diagram of a second embodiment of a storage device of the present application.
  • FIG. 4 is a schematic structural diagram of a third embodiment of a storage device of the present application.
  • Fig. 5 is a schematic structural diagram of a specific embodiment of the storage device of the present application.
  • FIG. 6 is a schematic diagram of the function definition corresponding to each pin of the interface in the storage device in FIG. 5 .
  • FIG. 1 is a schematic structural diagram of a first embodiment of a storage device of the present application.
  • the storage device 10 includes: an interface 11 , a surge protection circuit 12 and a storage function circuit 13 .
  • a storage device 10 provided in the present application may specifically be a storage hard disk, or one of any reasonable storage electronic devices such as a USB (universal serial bus, universal serial bus) flash disk, so as to be able to The way of plugging is connected with the external terminal 20 , such as any reasonable intelligent terminal such as a mobile phone or a personal computer, and then the data information is exchanged and stored with the external terminal 20 .
  • the external terminal 20 such as any reasonable intelligent terminal such as a mobile phone or a personal computer, and then the data information is exchanged and stored with the external terminal 20 .
  • the interface 11 in the storage device 10 specifically includes a pre-charging pin 111 and a power supply pin 112, so that the interface 11 can be plugged into the communication interface corresponding to the external terminal 20, and the corresponding interface contact piece can realize electrical charging.
  • the power signal sent by the external terminal 20 can be received through the pre-charge pin 111 and the power pin 112 to perform power-on work.
  • the pre-charging pin 111 protrudes relative to the power pin 112, so that when the interface 11 is plugged into the communication interface corresponding to the external terminal 20, the pre-charging pin 111 contacts the external terminal 112 before the power pin 112.
  • the corresponding interface contact piece of the terminal 20 can receive the corresponding power signal from the external terminal 20 faster, and also can perform pre-charging through the pre-charging pin 111 .
  • the pin length of the pre-charging pin 111 is greater than the pin length of the power pin 112, and further, the minimum distance between the pre-charging pin 111 and the plane where the opening of the interface 11 is located is less than The minimum distance between the power supply pin 112 and the plane where the opening of the interface 11 is located.
  • the pin length of the pre-charging pin 111 is more protruding than other pins, when first contacting the corresponding interface contact piece of the external terminal 20, usually because only one of its metal pins is in contact with the external terminal 20 realizes the electrical connection, so that there will be a surge of higher current at the moment of plugging, that is, an instantaneous high current, which may cause damage to the corresponding electronic devices in the storage device 10, or even cause insulation breakdown. Therefore, it is necessary to avoid the occurrence of the instantaneous large current in the storage device 10 as much as possible.
  • the surge protection circuit 12 is electrically connected between the precharge pin 111 and the power supply pin 112, so that when the interface 11 of the storage device 10 is plugged into the communication interface of the external terminal 20, the precharge pin 111 is electrically connected to the corresponding interface contact piece of the external terminal 20, the storage device 10 can receive the pre-charging source signal sent by the external terminal 20 through the pre-charging pin 111, and the pre-charging source signal will also pass through the surge protection circuit 12 , and then flow to the back-end circuit of the storage device 10 .
  • the surge protection circuit 12 can absorb the pre-charging source signal to a certain extent, so as to prevent the pre-charging source signal from having an instantaneous peak current, that is, it can limit the current of the pre-charging source signal, Furthermore, damage to the back-end circuit of the storage device 10 during the precharging process is prevented.
  • the storage function circuit 13 is the circuit in the storage device 10 that specifically interacts with the external terminal 20 for data information, that is, the circuit that needs to be protected.
  • the storage function circuit 13 is further electrically connected to the power supply pin 112 and the surge protection circuit 12, so as to be able to sequentially receive the pre-charging source signal current-limited by the surge protection circuit 12 for pre-charging.
  • the power pin 112 is electrically connected to the corresponding interface contact piece of the external terminal 20, the storage function circuit 13 can receive the working power signal sent by the external terminal 20 through the power pin 112, so as to enter a stable working state, and communicate with the external The terminal 20 performs data information exchange and storage.
  • the pre-charge pin 111 can also be used as a backup for the power signal, so that when the power pin 112 fails, the pre-charge pin 111 can receive the signal sent by the external terminal 20.
  • the working power supply signal is used for the storage function circuit 13 to work.
  • the surge protection circuit 12 is one of a resistor, a choke coil, a low-pass filter, or any reasonable electronic device including a resistor, a choke coil, a low-pass filter, etc. or sub-circuits formed by multiple combinations, which is not limited in this application.
  • the surge protection circuit 12 is a variable resistor, and the variable resistor is in a high-impedance state when an instantaneous large current flows through, so as to be able to suppress the instantaneous large current; and when a small current flows through, It is in a low-impedance state to be able to receive the working power signal normally.
  • FIG. 2 is a schematic structural diagram of a specific embodiment of an interface in the storage device in FIG. 1 .
  • the interface 11 is specifically a SATA (Serial ATA, serial ATA) interface 11, and the surge protection circuit 12 is in the input end of the interface 11, that is, the long pin (P7, P7, That is, a pre-charged current-limiting resistor (that is, the surge protection circuit 12) is connected between the pre-charge pin 111) and the short pins (P8, P9, that is, the power supply pin 112), so that it can pass through the interface 11 In the process of plugging and unplugging, the function of anti-surge current is realized.
  • SATA Serial ATA, serial ATA
  • the interface 11 can also be any other reasonable communication port suitable for electronic products with hot-swap function or long-short pin design, and the resistance value of the corresponding current-limiting resistor can be determined according to The specification requirement setting of the electronic product is not limited in this application.
  • FIG. 3 is a schematic structural diagram of a second embodiment of a storage device of the present application. This embodiment is based on the first embodiment of the storage device 10 provided in this application, and the storage device 10 further includes a power conversion circuit 14 .
  • each sub-circuit in the storage device 10 because each sub-circuit has a different function, its corresponding required power signal will also be different.
  • each sub-circuit corresponds to a required voltage level It will be different, and it is different from the voltage level of the power signal obtained by the interface 11 from the external terminal 20. Therefore, after the power signal sent by the external terminal 20 is obtained by the interface 11, it is also necessary to perform power conversion on the power signal. sent to the corresponding sub-circuit.
  • the power conversion circuit 14 is electrically connected to the power supply pin 112, the surge protection circuit 12, and the storage function circuit 13, so that when receiving the precharge source signal sent by the surge protection circuit 12, the voltage of the precharge source signal Or after the current is converted into a set value, it is sent to the storage function circuit 13 to precharge it; or, when receiving the working power signal sent by the power supply pin 112, the voltage or current of the working power signal is converted to After one or more set values are sent to the corresponding sub-circuits in the storage function circuit 13.
  • the set value can be any reasonable voltage value such as 3.3V, 5V or 6V, and is specifically determined by the specific working power requirements of the storage function circuit 13, which is not limited in the present application.
  • FIG. 4 is a schematic structural diagram of a third embodiment of a storage device of the present application. This embodiment is based on the second embodiment of the storage device provided in this application.
  • the interface 11 further includes a communication pin 113
  • the storage function circuit 13 further includes a control subcircuit 131 and a storage subcircuit 132 .
  • the communication pin 113 is electrically connected to the external terminal 20
  • the control sub-circuit 131 is electrically connected to the communication pin 113, the power conversion circuit 14 and the storage sub-circuit 132, and the control sub-circuit 131 can receive the external intelligent terminal through the communication pin 113.
  • the received data information is sent to the storage sub-circuit 132 for storage.
  • FIG. 5 is a schematic structural diagram of a specific embodiment of the storage device of the present application
  • FIG. 6 is a schematic diagram of the corresponding function definition of each pin of the interface in the storage device in FIG. 5 .
  • the interface 11 in the storage device 10 includes a plurality of pins, so as to be able to correspondingly receive a plurality of power signals of different voltage levels, and correspondingly implement functions of a plurality of different differential communication signals.
  • each surge protection circuit 12 corresponds to a precharge pin 111 and a power supply pin 112 , to correspondingly constitute an independent circuit capable of receiving the power signal sent by the external terminal 20 , that is, each surge protection circuit 12 is electrically connected between the corresponding pre-charging pin 111 and the power pin 112 .
  • the power signals sent by the external terminal 20 received by different surge protection circuits 12 may be the same or different, which is not limited in this application.
  • precharge pins 111 and power supply pins 112 when there are at least two precharge pins 111 and power supply pins 112, only a part or a group of precharge pins 111 and power supply pins 112 may be correspondingly connected to the surge protection circuit 12 , while other precharge pins 111 and power supply pins 112 can be directly connected to the communication interface of the external terminal 20, that is, the number of precharge pins 111 and power supply pins 112 can be greater than the number of surge protection circuits 12 , which is not limited in this application.
  • the number of the pre-charging pin 111, the power pin 112 and the surge protection circuit 12 are the same, and each includes at least one, and each surge protection circuit 12 is corresponding to a pre-charging pin 111 and a surge protection circuit 12.
  • a power pin 112 is electrically connected between the pre-charge pin 111 and the power pin 112 .
  • the power signals sent by the external terminal 20 received by different surge protection circuits 12 may be the same or different, which is not limited in this application.
  • the power supply pin 112 includes a first power supply pin (not shown in the figure) and a second power supply pin (not shown in the figure), and the first power supply pin is electrically connected to the second power supply pin
  • the connection that is, short circuit, is electrically connected to one end of the surge protection circuit 12 , and the other end of the surge protection circuit 12 is electrically connected to the pre-charging pin 111 .
  • the power supply pin 112 includes a first power supply pin and a second power supply pin, and the first power supply pin can also be electrically connected to the pre-charging pin 111, that is, short-circuited, and One end of the surge protection circuit 12 is electrically connected, and the other end of the surge protection circuit 12 is electrically connected to the second power supply pin.
  • the interface 11 is specifically a SATA interface, and includes S1-S7 signal pins and P1-P15 power pins. Understandably, among them, P7 is the pre-charging pin 111, and P8, P9 correspond to the first power supply pin and the second power supply pin respectively, and the voltage level corresponding to the received power supply signal is 5V; and P13, P14, P15 corresponds to another group of pre-charging pins 111 , the first power pin and the second power pin, and the voltage level of the corresponding received power signal can be 12V.
  • P8 and P9 are short-circuited, they are electrically connected to the surge protection circuit 12, that is, one end of the current limiting resistor Rx, and the other end of the current limiting resistor Rx is electrically connected to P7.
  • P13 and P14 can also be connected to one end of another current-limiting resistor (not shown) after being short-circuited first, and the other end of the current-limiting resistor is connected to P15.
  • another current-limiting resistor is not included in the SATA interface, and P13 , P14 , and P15 are shorted to each other.
  • the present application also provides an electronic device, wherein the electronic device includes the storage device 10 described in any one of the above items.
  • the storage device in this application includes: an interface, a surge protection circuit, and a storage function circuit; wherein, the interface includes a precharge pin and a power supply pin, and the surge protection circuit is electrically connected to the precharge pin and the power supply pin.
  • the pre-charge source signal sent by the external terminal is received through the pre-charge pin , and the surge protection circuit limits the current of the pre-charging source signal, and sends it to the storage function circuit for pre-charging, so that the storage device can be effectively protected from being damaged by the pre-charging overcurrent, and the cost of corresponding implementation is also low.
  • the surge protection circuit limits the current of the pre-charging source signal, and sends it to the storage function circuit for pre-charging, so that the storage device can be effectively protected from being damaged by the pre-charging overcurrent, and the cost of corresponding implementation is also low.

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Abstract

本申请公开了一种存储装置及电子设备，该存储装置包括：接口，接口包括预充电引脚和电源引脚；其中，预充电引脚凸出电源引脚设置；浪涌保护电路，在接口插接至外部终端，使得预充电引脚电连接外部终端的相应接口触片时，通过预充电引脚接收外部终端发送的预充电源信号，并对预充电源信号进行限流；存储功能电路，接收由浪涌保护电路限流后的预充电源信号，以进行预充电；在电源引脚电连接外部终端的相应接口触片时，存储功能电路通过电源引脚接收外部终端发送的工作电源信号。通过上述方式，本申请通过浪涌保护电路吸收接口在与外部终端插拔过程中产生的极大浪涌电流，以能够有效保护存储装置不致被过电流损坏，且实现成本较低。

Description

一种存储装置及电子设备 【技术领域】
本申请涉及数据存储技术领域，尤其涉及一种存储装置及电子设备。
【背景技术】
在存储装置中，为保证数据存储的有效进行及相应时序的要求，在给存储装置上电的过程中，通常会在其达到稳定的工作状态之前，首先对存储装置，且具体存储装置中的电容器件进行预充电，从而能够在存储装置接收到工作电源信号时，迅速进入工作状态。
其中，为保证预充电源信号和工作电源信号输入存储装置中的时序不同，该存储装置中的接口所对应的金手指通常采用的是长、短金属接触引脚设计，且该长引脚用于在插拔过程提前给存储装置预充电。但是由于单根金属引脚在插拔实现电连接的瞬间电流过大，一般会出现比较高电流的浪涌，轻则会磨损存储装置，重则会直接损坏存储装置。在现有的抗浪涌电流(瞬时大电流)保护方式中，较常规的方式是使用限流开关芯片或者保险丝对后级电路进行保护，以防止插拔瞬变电流对后级电路造成损害。
然而，限流开关的成本通常较高并且外围元器件多，会占用较多的装置面积；而保险丝只能用作过流保护，而过流情况会断开前、后端线路，以达到保护后端电路的作用，而并不能在满足续流(电流不间断)的情况下达到抗浪涌电流的作用。
【发明内容】
本申请提供了一种存储装置，以解决现有技术中的存储装置采用的抗浪涌电流保护，实现成本高、占用较多的装置面积，或无法在满足续流的情况下抗浪涌电流的问题。
为解决上述技术问题，本申请采用的一个技术方案是：提供一种存储装置，其中，该存储装置包括：接口，接口包括预充电引脚和电源引脚；其中，预充电引脚凸出电源引脚设置；浪涌保护电路，电连接于预充电引脚和电源引脚之间，以在接口插接至外部终端，使得预充电引脚电连接外部终端的相应接口触 片时，通过预充电引脚接收外部终端发送的预充电源信号，并对预充电源信号进行限流；存储功能电路，电连接电源引脚和浪涌保护电路，存储功能电路接收由浪涌保护电路限流后的预充电源信号，以进行预充电；在电源引脚电连接外部终端的相应接口触片时，存储功能电路通过电源引脚接收外部终端发送的工作电源信号。
其中，预充电引脚、电源引脚以及浪涌保护电路的数量相同，且均包括至少一个，其中，每一浪涌保护电路电连接于相应的预充电引脚和电源引脚之间。
其中，电源引脚包括第一电源引脚和第二电源引脚，第一电源引脚和第二电源引脚电连接后，与浪涌保护电路的一端电连接，浪涌保护电路的另一端电连接于预充电引脚。
其中，电源引脚包括第一电源引脚和第二电源引脚，第一电源引脚和预充电引脚电连接后，与浪涌保护电路的一端电连接，浪涌保护电路的另一端电连接于第二电源引脚。
其中，浪涌保护电路为电阻、扼流线圈、低通滤波器中的一种。
其中，浪涌保护电路为可变电阻，可变电阻在流经瞬时大电流时，呈高阻态，在流经小电流时，呈低阻态。
其中，存储装置还包括电源转换电路，电源转换电路电连接于电源引脚、浪涌保护电路以及存储功能电路，以在接收到浪涌保护电路发送的预充电源信号或电源引脚发送的工作电源信号时，将预充电源信号或工作电源信号的电压或电流转换为设定值后，发送给存储功能电路。
其中，接口还包括通信引脚，存储功能电路包括控制子电路和存储子电路，通信引脚电连接外部终端，控制子电路电连接通信引脚、电源转换电路以及存储子电路，控制子电路通过通信引脚接收外部智能终端发送的数据信息，并将数据信息发送给存储子电路，以进行存储。
其中，接口为SATA接口。
为解决上述技术问题，本申请采用的另一个技术方案是：提供一种电子设备，其中，该电子设备包括如上任一项所述的存储装置。
本申请的有益效果是：区别于现有技术，本申请中的存储装置包括：接口、浪涌保护电路以及存储功能电路；其中，接口包括预充电引脚和电源引脚，浪涌保护电路电连接于预充电引脚和电源引脚之间，以在将接口插接至外部终端上，而使预充电引脚与外部终端的相应接口触片实现电连接时，通过预充电引 脚接收外部终端发送的预充电源信号，并由浪涌保护电路对该预充电源信号进行限流后，发送给存储功能电路进行预充电，从而能够有效保护存储装置不致被预充过电流损坏，且相应实现的成本也较低，以在后续电源引脚电连接至外部终端的相应接口触片时，能够有效地通过电源引脚接收外部终端发送的工作电源信号。
【附图说明】
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。其中：
图1是本申请存储装置第一实施例的结构示意图；
图2是图1中存储装置中的接口一具体实施例的结构示意图；
图3是本申请存储装置第二实施例的结构示意图；
图4是本申请存储装置第三实施例的结构示意图；
图5是本申请存储装置一具体实施例的结构示意图；
图6是图5中存储装置中的接口每一引脚对应功能定义的示意图。
【具体实施方式】
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，均属于本申请保护的范围。
请参见图1，图1是本申请存储装置第一实施例的结构示意图。在本实施例中，该存储装置10包括：接口11、浪涌保护电路12以及存储功能电路13。
其中，本申请中提供的一种存储装置10具体可以是存储硬盘，或USB(universal serial bus，通用串行总线)闪存盘等任一合理的存储电子设备中的一种，以能够通过通信接口插接的方式与外部终端20，比如，手机或个人计算机等任一合理的智能终端实现电连接，进而与该外部终端20进行数据信息的交互和存储。
可理解的是，为使得该存储装置10中的数据存储能够有效进行，通常还需要满足一定的上电时序要求。因此，在正式通过外部终端20给存储装置10进行上电，以向其发送数据信息时，为保证存储装置10后端电路的上电时序的要求，在其进入到稳定的工作状态之前，通常还需要对该存储装置10中的存储功能电路13进行预充电，从而能够在存储装置10接收到工作电源信号时，迅速进入工作状态，以防止数据存储中出现时序误差的情况。
具体地，该存储装置10中的接口11具体包括预充电引脚111和电源引脚112，以能够在将该接口11插接至外部终端20对应的通信接口，而与其相应接口触片实现电连接时，可通过该预充电引脚111和电源引脚112接收外部终端20发送的电源信号，以进行上电工作。
其中，该预充电引脚111相对于电源引脚112凸出设置，以在将接口11插接至外部终端20对应的通信接口时，该预充电引脚111先于电源引脚112接触到外部终端20的相应接口触片，从而能够更快的从外部终端20接收到相应的电源信号，也便能够通过该预充电引脚111进行预充电。
可选地，在一实施例中，预充电引脚111的插针长度大于电源引脚112的插针长度，进一步，该预充电引脚111与接口11的开口所在平面之间的最小间距小于电源引脚112与接口11的开口所在平面之间的最小间距。
然而，由于该预充电引脚111的插针长度比其他引脚更加凸出，在首先接触到外部终端20的相应接口触片的同时，通常又会因为仅其一根金属引脚与外部终端20实现电连接，以致在插接瞬间会出现一个较高电流的浪涌，也即瞬时大电流，进而可能会对存储装置10中的相应电子器件产生损伤，甚至发生绝缘击穿。因此，在该存储装置10中需尽可能的避免该瞬时大电流的出现。
进一步地，浪涌保护电路12电连接于预充电引脚111和电源引脚112之间，以在将存储装置10的接口11插接至外部终端20的通信接口中，而使得预充电引脚111电连接外部终端20的相应接口触片时，该存储装置10能够通过预充电引脚111接收外部终端20发送的预充电源信号，且该预充电源信号还将经过浪涌保护电路12之后，进而流向存储装置10的后端电路。
由此可知，该浪涌保护电路12能够对该预充电源信号进行一定程度的吸收，以防止该预充电源信号出现瞬时尖峰电流的情况，也即能够对该预充电源信号进行限流，进而防止在预充电的过程中，对存储装置10的后端电路造成损伤。
其中，存储功能电路13即为存储装置10中具体与外部终端20进行数据信 息交互的电路，也即需要进行防护的电路。该存储功能电路13进一步电连接于电源引脚112和浪涌保护电路12，以能够依次接收由浪涌保护电路12限流后的预充电源信号，而进行预充电。且在电源引脚112电连接外部终端20的相应接口触片时，该存储功能电路13能够通过电源引脚112接收外部终端20发送的工作电源信号，以进入到稳定的工作状态，而与外部终端20进行数据信息交互和存储。
可理解的，在进入到稳定的工作状态后，该预充电引脚111还可以作为电源信号的备用，以在电源引脚112发生故障时，可通过该预充电引脚111接收外部终端20发送的工作电源信号，以进而给存储功能电路13工作使用。
可选地，该浪涌保护电路12为电阻、扼流线圈、低通滤波器中的一种，或包括有电阻、扼流线圈、低通滤波器等任一合理的电子器件中的一种或多种组合而成的子电路，本申请对此不做限定。
可选地，该浪涌保护电路12为可变电阻，且该可变电阻在流经瞬时大电流时，呈高阻态，以能够对瞬时大电流进行抑制；而在流经小电流时，呈低阻态，以能够正常接收工作电源信号。
在一实施例中，如图2所示，图2是图1中存储装置中的接口一具体实施例的结构示意图。该接口11具体为SATA(Serial ATA，串行ATA)接口11，且浪涌保护电路12在该接口11的输入端内，也即在电源输入的3根引脚中的长引脚(P7，也即预充电引脚111)与短引脚(P8，P9，也即电源引脚112)之间连接有一预充电的限流电阻(也即浪涌保护电路12)，从而能够在通过该接口11进行插拔的过程中，实现抗浪涌电流的作用。
而在其他实施例中，该接口11还可以是其他任一合理的适用于带热插拔功能，或者长短针设计的电子产品中的通信端口，且相应的限流电阻的阻值具体可以根据该电子产品的规格需求设置，本申请对此不做限定。
请继续参阅图3，图3是本申请存储装置第二实施例的结构示意图。本实施例是在本申请提供的存储装置10第一实施例的基础上，存储装置10还包括电源转换电路14。
可理解的，对于存储装置10中的各子电路而言，因每一子电路的实现功能不同，其对应所需的电源信号也会有所不同，比如，各子电路对应所需的电压等级会有所不同，且不同于接口11由外部终端20中获取的电源信号的电压等 级，因而在由接口11获取到外部终端20发送的电源信号后，还需要对该电源信号进行电源转换后，发送给相应的子电路。
具体地，该电源转换电路14电连接于电源引脚112、浪涌保护电路12以及存储功能电路13，以在接收到浪涌保护电路12发送的预充电源信号，将预充电源信号的电压或电流转换为设定值后，发送给存储功能电路13，以对其进行预充电；或，在接收到电源引脚112发送的工作电源信号时，将该工作电源信号的电压或电流转换为一个或多个设定值后，发送给存储功能电路13中的相应子电路。
可理解的，该设定值可以为3.3V、5V或6V等任一合理的电压值，且具体由存储功能电路13的具体工作电源需求确定，本申请对此不做限定。
请继续参阅图4，图4是本申请存储装置第三实施例的结构示意图。本实施例是在本申请提供的存储装置第二实施例的基础上，接口11还包括通信引脚113，存储功能电路13进一步包括控制子电路131和存储子电路132。
其中，通信引脚113电连接外部终端20，而控制子电路131电连接通信引脚113、电源转换电路14以及存储子电路132，该控制子电路131能够通过通信引脚113接收外部智能终端发送的数据信息，以将接收到的数据信息发送给存储子电路132，以进行存储。
请继续参阅图5和图6，其中，图5是本申请存储装置一具体实施例的结构示意图，图6是图5中存储装置中的接口每一引脚对应功能定义的示意图。
具体地，存储装置10中的接口11包括有多个引脚，以能够对应接收多个不同电压等级的电源信号，并对应实现多个不同差分通信信号的功能。
可选地，预充电引脚111、电源引脚112以及浪涌保护电路12的数量为至少一个，而其中的每一浪涌保护电路12对应有一个预充电引脚111和一个电源引脚112，以相应构成能够接收外部终端20发送的电源信号的独立回路，也即每一浪涌保护电路12电连接于相应的预充电引脚111和电源引脚112之间。且不同浪涌保护电路12对应接收的外部终端20发送的电源信号可以相同或不同，本申请对此不做限定。可理解的，在预充电引脚111和电源引脚112分别具有至少两个时，也可以仅有部分或其中的一组预充电引脚111和电源引脚112对应连接有浪涌保护电路12，而其他的预充电引脚111和电源引脚112可直接连接于外部终端20的通信接口中，也即，预充电引脚111和电源引脚112的数量可以大于浪涌保护电路12的数量，本申请对此不做限定。
可选地，预充电引脚111、电源引脚112以及浪涌保护电路12的数量相同，且均包括至少一个，而其中的每一浪涌保护电路12均对应有一个预充电引脚111和一个电源引脚112，且电连接于该预充电引脚111和电源引脚112之间。且不同浪涌保护电路12对应接收的外部终端20发送的电源信号可以相同或不同，本申请对此不做限定。
在一实施例中，电源引脚112包括第一电源引脚(图未示出)和第二电源引脚(图未示出)，而该第一电源引脚在与第二电源引脚电连接，也即短接后，与浪涌保护电路12的一端电连接，而浪涌保护电路12的另一端电连接于预充电引脚111。
在另一实施例中，电源引脚112包括第一电源引脚和第二电源引脚，而该第一电源引脚还可以在与预充电引脚111电连接，也即短接后，与浪涌保护电路12的一端电连接，浪涌保护电路12的另一端电连接于第二电源引脚。
其中，以该接口11具体为SATA接口，而包括S1-S7信号引脚以及P1-P15功率引脚。可理解的，其中，P7为预充电引脚111，而P8、P9分别对应为第一电源引脚和第二电源引脚，且对应接收的电源信号的电压等级为5V；而P13、P14、P15对应为另一组预充电引脚111、第一电源引脚以及第二电源引脚，且对应接收的电源信号的电压等级可为12V。
由此可知，P8和P9短接后，电连接至浪涌保护电路12，也即限流电阻Rx的一端，且该限流电阻Rx的另一端电连接至P7。而P13和P14还可以先短接后，连接至另一限流电阻(图未示出)的一端，且该限流电阻的另一端连接至P15。而在其他实施例中，在SATA接口中并不包括另一限流电阻，且P13、P14以及P15相互短接。
在另一方面，本申请还提供了一种电子设备，其中，该电子设备包括如上任一项所述的存储装置10。
区别于现有技术，本申请中的存储装置包括：接口、浪涌保护电路以及存储功能电路；其中，接口包括预充电引脚和电源引脚，浪涌保护电路电连接于预充电引脚和电源引脚之间，以在将接口插接至外部终端上，而使预充电引脚与外部终端的相应接口触片实现电连接时，通过预充电引脚接收外部终端发送的预充电源信号，并由浪涌保护电路对该预充电源信号进行限流后，发送给存储功能电路进行预充电，从而能够有效保护存储装置不致被预充过电流损坏，且相应实现的成本也较低，以在后续电源引脚电连接至外部终端的相应接口触 片时，能够有效地通过电源引脚接收外部终端发送的工作电源信号。
以上仅为本申请的实施方式，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (11)

  1. 一种存储装置，其特征在于，所述存储装置包括：
    接口，所述接口包括预充电引脚和电源引脚；其中，所述预充电引脚凸出所述电源引脚设置；
    浪涌保护电路，电连接于所述预充电引脚和所述电源引脚之间，以在所述接口插接至外部终端，使得所述预充电引脚电连接所述外部终端的相应接口触片时，通过所述预充电引脚接收所述外部终端发送的预充电源信号，并对所述预充电源信号进行限流；
    存储功能电路，电连接所述电源引脚和所述浪涌保护电路，所述存储功能电路接收由所述浪涌保护电路限流后的所述预充电源信号，以进行预充电；在所述电源引脚电连接所述外部终端的相应接口触片时，所述存储功能电路通过所述电源引脚接收所述外部终端发送的工作电源信号。
  2. 根据权利要求1所述的存储装置，其特征在于，
    所述预充电引脚、所述电源引脚以及所述浪涌保护电路的数量为至少一个，其中，每一所述浪涌保护电路电连接于相应的所述预充电引脚和所述电源引脚之间。
  3. 根据权利要求1所述的存储装置，其特征在于，
    所述预充电引脚、所述电源引脚以及所述浪涌保护电路的数量相同，且均包括至少一个，其中，每一所述浪涌保护电路电连接于相应的所述预充电引脚和所述电源引脚之间。
  4. 根据权利要求1所述的存储装置，其特征在于，
    所述电源引脚包括第一电源引脚和第二电源引脚，所述第一电源引脚和所述第二电源引脚电连接后，与所述浪涌保护电路的一端电连接，所述浪涌保护电路的另一端电连接于所述预充电引脚。
  5. 根据权利要求1所述的存储装置，其特征在于，
    所述电源引脚包括第一电源引脚和第二电源引脚，所述第一电源引脚和所述预充电引脚电连接后，与所述浪涌保护电路的一端电连接，所述浪涌保护电路的另一端电连接于所述第二电源引脚。
  6. 根据权利要求1所述的存储装置，其特征在于，
    所述浪涌保护电路为电阻、扼流线圈、低通滤波器中的一种。
  7. 根据权利要求1所述的存储装置，其特征在于，
    所述浪涌保护电路为可变电阻，所述可变电阻在流经瞬时大电流时，呈高阻态，在流经小电流时，呈低阻态。
  8. 根据权利要求1所述的存储装置，其特征在于，
    所述存储装置还包括电源转换电路，所述电源转换电路电连接于所述电源引脚、所述浪涌保护电路以及所述存储功能电路，以在接收到所述浪涌保护电路发送的所述预充电源信号或所述电源引脚发送的所述工作电源信号时，将所述预充电源信号或所述工作电源信号的电压或电流转换为设定值后，发送给所述存储功能电路。
  9. 根据权利要求8所述的存储装置，其特征在于，
    所述接口还包括通信引脚，所述存储功能电路包括控制子电路和存储子电路，所述通信引脚电连接所述外部终端，所述控制子电路电连接所述通信引脚、所述电源转换电路以及所述存储子电路，所述控制子电路通过所述通信引脚接收所述外部智能终端发送的数据信息，并将所述数据信息发送给所述存储子电路，以进行存储。
  10. 根据权利要求1-9任一项所述的存储装置，其特征在于，
    所述接口为SATA接口。
  11. 一种电子设备，其特征在于，所述电子设备包括如权利要求1-10中任一项所述的存储装置。
PCT/CN2021/099820 2021-06-09 2021-06-11 一种存储装置及电子设备 WO2022257131A1 (zh)

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