WO2022247792A1 - 神经元的膜电位更新方法、类脑神经元器件、处理核 - Google Patents

神经元的膜电位更新方法、类脑神经元器件、处理核 Download PDF

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WO2022247792A1
WO2022247792A1 PCT/CN2022/094477 CN2022094477W WO2022247792A1 WO 2022247792 A1 WO2022247792 A1 WO 2022247792A1 CN 2022094477 W CN2022094477 W CN 2022094477W WO 2022247792 A1 WO2022247792 A1 WO 2022247792A1
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neuron
time
membrane potential
input pulse
current
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PCT/CN2022/094477
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English (en)
French (fr)
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吴臻志
唐超
祝夭龙
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北京灵汐科技有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means

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  • Embodiments of the present disclosure relate to the field of computer technology, and in particular to a method for updating neuron membrane potential, a brain-like neuron device, a processing core, a neuromorphic chip, an electronic device, and a computer-readable medium.
  • Neuromorphic chip intends to use electronic technology to simulate the proven operating rules of the biological brain, so as to build an electronic chip similar to the biological brain.
  • Each core of the neuromorphic chip contains a group of brain-like neuron devices , these brain-like neuron devices realize information processing by simulating the structure and information transmission mode of biological neurons as the basic unit of brain neural network.
  • Embodiments of the present disclosure provide a method for updating the membrane potential of neurons, a brain-like neuron device, a processing core, a neuromorphic chip, an electronic device, and a computer-readable medium, which can effectively reduce the calculation amount in the process of updating the membrane potential.
  • the present disclosure provides a method for updating the membrane potential of a neuron, and the method for updating the membrane potential of a neuron includes:
  • the current moment membrane potential of the neuron is calculated according to the historical membrane potential and the input pulse received by the neuron this time.
  • the present disclosure provides a brain neuron device, and the brain neuron device includes:
  • the time difference acquisition module is configured to, in response to receiving the input pulse, acquire the current input time difference between the time when the brain-like neuron device receives the input pulse this time and the time when the input pulse was last received;
  • the first calculation module is configured to calculate the historical membrane potential of the neuron at the current moment according to the current input time difference and the preset leakage calculation model;
  • the second calculation module is configured to calculate the current moment membrane potential of the neuron according to the historical membrane potential determined by the first calculation module and the input pulse received by the neuron this time.
  • the present disclosure provides a processing core, which includes a plurality of brain-like neuron devices described above.
  • the present disclosure provides a neuromorphic chip, which includes a plurality of the aforementioned processing cores.
  • the present disclosure provides an electronic device, which includes: a plurality of processing cores; and an on-chip network configured to exchange data among the plurality of processing cores and external data; wherein, one or more One or more instructions are stored in each of the processing cores, and one or more of the instructions are executed by one or more of the processing cores, so that one or more of the processing cores can execute the above-mentioned neuron membrane Potential update method.
  • the present disclosure provides a computer-readable medium on which a computer program is stored, wherein the computer program implements the aforementioned method for updating the membrane potential of a neuron when executed by a processing core.
  • the neuron membrane potential update method, brain-inspired neuron device, processing core, neuromorphic chip, electronic device, and computer-readable medium use a preset leakage calculation model to make the brain-inspired neuron device only receive
  • the membrane potential at the current moment is only calculated when the pulse is input, so that the brain-like neuron device can be in a dormant state when it does not receive the input pulse, thereby avoiding the detection and monitoring of the membrane potential of the brain-like neuron device every moment. Computing, thereby reducing the power consumption of the neuron morphology chip.
  • FIG. 1 is a flow chart of a neuron membrane potential update method provided by an embodiment of the present disclosure
  • FIG. 2 is a flowchart of another neuron membrane potential update method provided by an embodiment of the present disclosure
  • FIG. 3 is a flow chart of another neuron membrane potential updating method provided by an embodiment of the present disclosure.
  • FIG. 4 is a flowchart of another neuron membrane potential update method provided by an embodiment of the present disclosure.
  • FIG. 5 is a block diagram of a brain neuron-like device provided by an embodiment of the present disclosure.
  • FIG. 6 is a block diagram of another brain neuron device provided by an embodiment of the present disclosure.
  • FIG. 7 is a block diagram of another brain neuron-like device provided by an embodiment of the present disclosure.
  • Fig. 8 is a composition block diagram of an electronic device provided by an embodiment of the present disclosure.
  • the membrane potential at the current moment is calculated when each time step arrives.
  • the brain-like neuron device receives an input pulse at the current moment , first convert the received input pulse into an integral potential, and then sum the integral potential with the existing membrane potential (also known as the historical membrane potential) to obtain the membrane potential at the current moment.
  • the existing membrane potential also known as the historical membrane potential
  • the brain-like neuron device After calculating the membrane potential at the current moment, detect the current Whether the membrane potential reaches the preset threshold at any time, if not, then calculate the leakage voltage to control the membrane potential at the current time to decrease and update by the amount of the leakage voltage, so as to approach the resting potential; and when the brain-like neuron device is at the current When the input pulse is not received at any time, the brain-like neuron device directly calculates the leakage voltage at the current time according to the law of membrane potential leakage, and then controls the membrane potential at the current time to decrease and update by the amount of the leakage voltage, so as to approach the resting potential.
  • the time step refers to the time interval formed by slicing the time according to the preset time step in advance. In the information processing process of the brain-like neuron device, the time is usually counted by the number of time steps.
  • the brain-like neuron device In the process of updating the membrane potential of the brain-like neuron device in the related art, the brain-like neuron device is in the operation state (calculating the membrane potential, calculating the leakage voltage, etc.) at each time step, which has no input for most of the time For a network with a higher sparsity, the brain-like neuron device has a higher computing frequency, which leads to excessive power consumption of the chip. Aiming at this technical problem, the present disclosure provides a method for updating the membrane potential of neurons. By making the brain-inspired neuron device calculate the membrane potential at the current moment when it receives an input pulse, the brain-inspired neuron device calculates the current moment membrane potential when it does not receive an input pulse. It can be in a dormant state when the pulse is input, thereby avoiding the detection and calculation of the membrane potential of the brain-like neuron device every moment, thereby reducing the power consumption of the neuromorphic chip.
  • Fig. 1 is a flow chart of a method for updating the membrane potential of a neuron provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides a method for updating the membrane potential of a neuron, the method comprising:
  • Step S101 in response to the neuron receiving an input pulse, obtain the current input time difference between the time when the neuron receives the input pulse this time and the time when the neuron received the input pulse last time.
  • a pulse is a kind of information that a neuron generates an action potential and propagates backward along the axon of the neuron, and can usually be expressed in discrete values.
  • the input pulse refers to the pulse sent by each front-end neuron to which the neuron is currently connected.
  • the neuron when the neuron does not receive an input pulse, the neuron is in a dormant state, that is, the neuron does not perform related detection and/or calculation of the membrane potential, for example, detecting whether the membrane potential exceeds a preset threshold and calculating leakage voltage, etc.; in some embodiments, when the neuron does not receive an input pulse for a preset duration, it can be considered that the neuron does not receive an input pulse, and the neuron enters a dormant state.
  • the preset duration is a preset duration threshold, and the preset duration can be set according to the actual scene, for example, the duration corresponding to a time step, etc. The embodiment of this specification does not specifically limit the above preset duration.
  • the current input time difference is the time interval between the neuron receiving the input pulse this time and the last input pulse received
  • the current input time difference can be the time interval between the neuron receiving the input pulse this time and the last time The number of time steps included in the time period when the input pulse is received; in some other embodiments, the current input time difference can also be the difference between the time when the neuron receives the input pulse this time and the time when the input pulse was last received duration.
  • the current input time difference may be obtained through a preset counting module.
  • a counting module is preset in the neuron, and the counting module records the cumulative count value of the preset time step each time the neuron receives an input pulse.
  • step S101 includes: in response to receiving the input pulse, acquiring the first cumulative count value of the preset counting module at the moment when the input pulse was last received for the preset time step, and acquiring the preset The preset counting module determines the difference between the first cumulative count value and the second cumulative count value as the current input time difference for the second cumulative count value at the preset time step at the moment when the input pulse is received this time.
  • the accumulative value of the time step corresponding to the last time the input pulse was received is the 100th step, that is, the first accumulative count value is 100, and the input pulse received this time is obtained
  • the accumulative value of the time step corresponding to the moment of is the 105th step, that is, the second accumulative count value is 105, then it can be determined that the current input time difference is 5.
  • the current input time difference may be obtained by calculating a time difference.
  • each time the neuron receives an input pulse it records the time value of receiving the input pulse this time, for example, in a storage module.
  • step S101 includes: calculating the difference between the moment when the input pulse is received this time and the last time when the input pulse was received, and determining the current input time difference according to the step ratio between the difference and the preset time step.
  • the difference between the time value of the input pulse received this time and the time value of the last input pulse is 0.6ms
  • the step size of the preset time step is 0.1ms
  • the time value recorded in the storage module may be updated after the current input time difference is determined, for example, the time value in the storage module is updated to the time value when the input pulse is received this time. In this way, the current input time difference can be determined with a small storage space, effectively saving storage space.
  • Step S102 calculate the historical membrane potential of the neuron at the current moment according to the current input time difference and the preset leakage calculation model.
  • the historical membrane potential is the membrane potential of the neuron before the input pulse received this time is accumulated and included in the membrane potential of the neuron.
  • the historical membrane potential of a neuron at the current moment refers to the time from the last input pulse received by the neuron to the current input pulse before the input pulse received this time is accumulated into the neuron’s membrane potential In the segment, after the membrane potential leaks according to the membrane potential leakage law, the membrane potential that should be reached at the current moment.
  • a leakage calculation model is pre-established, and the leakage calculation model is used to calculate the historical membrane potential of the neuron at the current moment.
  • the preset leakage calculation model is related to the time when the neuron receives the input pulse. Correlates to the current input time difference between the last time an input pulse was received. Wherein, when the current input time difference is greater than or equal to the target value, the historical membrane potential of the neuron when receiving the input pulse is determined according to the leakage calculation model as the resting potential.
  • the preset leakage calculation model includes a first factor and a second factor, both of which are functions related to the aforementioned current input time difference.
  • the current input time difference is the number of preset time steps included between the time when the neuron receives the input pulse this time and the time when the last input pulse is received
  • the preset leakage calculation model can be Expressed as:
  • n is the cumulative count value of the preset time step corresponding to the last time the input pulse was received
  • m is the preset time included between the time when the input pulse was received this time and the time when the input pulse was last received
  • V(n+m) represents the historical membrane potential of the neuron when it receives the input pulse this time
  • V (n) represents the membrane potential of the neuron when it received an input pulse last time
  • ⁇ (m) represents the second factor, both of which are related to the current input time difference m.
  • the preset leakage calculation model is derived based on the membrane potential leakage calculation principle, as follows:
  • V(t) represents the membrane potential of the neuron at time t
  • VE represents the resting potential of the neuron.
  • the resting potential refers to the membrane potential of the neuron when it does not receive an input pulse.
  • the resting potential can be set to zero
  • c and g are preset constant parameters, preferably, c is the time constant of the membrane potential
  • g is the conductance, wherein,
  • the value of g is determined according to Ohm's law, that is, the membrane leakage current is equal to the product of the potential difference between the inside and outside of the membrane and the membrane leakage conductance.
  • the physical meaning of this formula is: the process of returning the membrane potential of a neuron to the resting potential (that is, the process of leakage) will lead to changes in the membrane potential.
  • V(n+m) ⁇ m V(n)+ ⁇ m-1 ⁇ +...+ ⁇
  • ⁇ t is the step size of the preset time step; represents the first factor, and ⁇ (m) represents the second factor, both of which are related to the current input time difference m; ⁇ and ⁇ are intermediate parameters.
  • step S102 can calculate the historical membrane potential of the neuron at the current moment by means of table lookup.
  • Fig. 2 is a flow chart of another neuron membrane potential updating method provided by an embodiment of the present disclosure.
  • step S102 may include:
  • Step S1021 according to the current input time difference, determine the value of the first factor corresponding to the input time difference from a plurality of preset correspondence tables between input time difference values and first factor values.
  • Step S1022 according to the current input time difference, determine the value of the second factor corresponding to the input time difference from a plurality of preset correspondence tables between input time difference values and second factor values.
  • Step S1023 based on the leakage calculation model, according to the determined value of the first factor, the value of the second factor and the membrane potential of the neuron when it received an input pulse last time, determine the historical membrane potential of the neuron at the current moment .
  • the corresponding relationship table is preset, when calculating the historical membrane potential, the value of the relevant factor in the leakage calculation model can be directly obtained by querying the corresponding relationship table, thereby avoiding the calculation of the relevant factor, thereby reducing the amount of computation.
  • Step S103 calculating the current moment membrane potential of the neuron according to the historical membrane potential and the input pulse received by the neuron this time.
  • the current membrane potential of the neuron can be obtained by counting the input pulse received by the neuron this time into the membrane potential of the neuron.
  • step S103 includes: calculating the integral potential according to the input pulse received this time, and summing the historical membrane potential and the integral potential to obtain the current moment membrane potential of the neuron.
  • the integral potential is obtained by weighting and summing all input pulses received by the neuron this time, and the weight value is determined by the connection strength of the axon corresponding to the front-end neuron connected to the neuron.
  • the method for updating the membrane potential of neurons uses the preset leakage calculation model to trigger the detection and calculation of the neuron’s membrane potential only when the neuron receives an input pulse, thereby avoiding It is in the computing state all the time, which reduces the power consumption of neuromorphic chips.
  • Fig. 3 is a flowchart of another method for updating the membrane potential of a neuron provided by an embodiment of the present disclosure.
  • step S103 further includes:
  • Step S104 according to the membrane potential of the neuron at the current moment, determine whether the neuron needs to emit pulses at the current moment.
  • step S104 includes:
  • Step S1041 judging whether the current membrane potential of the neuron exceeds a preset threshold.
  • step S1042 is correspondingly executed to perform pulse firing; and if it is judged that the neuron's current membrane potential is not If it exceeds the preset threshold, it is determined that the neuron does not need to emit pulses at the current moment. At this time, the neuron does not output pulses. When it waits until the next time it receives an input pulse, return to step S101 to enter the detection and calculation of the neuron again. Flow of membrane potential.
  • Step S1042 determining that the neuron needs to emit pulses at the current moment, and controlling the neuron to emit pulses.
  • the neuron After determining that the neuron needs to fire a pulse, the neuron generates an action potential (pulse) and propagates the action potential backward along the neuron's axon. Low values, eg, resting potential.
  • Fig. 4 is a flow chart of another method for updating the membrane potential of a neuron provided by an embodiment of the present disclosure.
  • a refresh mechanism may be set to control the membrane potential of neurons.
  • the method for updating the membrane potential of neurons further includes:
  • Step S100a detecting whether the neuron receives an input pulse within the preset time interval according to the preset time interval.
  • the setting condition of the preset time interval may be: greater than or equal to the time required for the membrane potential of the neuron to return from the firing threshold to the resting potential according to the law of membrane potential leakage.
  • the firing threshold is the threshold value that the neuron needs to reach when firing pulses;
  • the membrane potential leakage law is a preset membrane potential leakage function.
  • the preset time interval can be a specific duration or the number of preset time steps, that is, the preset time interval can be set to be greater than or equal to the neuron membrane
  • the time required for the potential to return from the firing threshold to the resting potential according to the law of membrane potential leakage for example, 1 second; it can also be set to: greater than or equal to the time required for the membrane potential of neurons to return from the firing threshold to the resting potential according to the law of membrane potential leakage
  • the number of preset time steps required for example, if the preset time interval is 10, it means 10 preset time steps.
  • the preset time of the refresh mechanism is set to be greater than or equal to the longest time required for the membrane potential to return to the resting potential. If it is detected that the neuron does not receive an input pulse within the preset time interval, it means that the neuron’s membrane potential is at the normal time. The membrane potential leakage rule should return to the resting potential. Therefore, the current membrane potential can be set as the resting potential to reduce the subsequent calculation of the neuron’s membrane potential at the current moment when the input pulse is received.
  • step S100a when it is detected that the neuron does not receive an input pulse within a preset time interval, the following step S100b is performed to set the membrane potential of the neuron as a resting potential; If the unit receives an input pulse within the preset time interval, no intervention setting is performed on the membrane potential.
  • Step S100b setting the current membrane potential of the neuron as the resting potential.
  • steps S100a and S100b are performed independently of the membrane potential update process, that is, the steps included in the above refresh mechanism can be performed before the membrane potential update step 1. Execute during the process of updating the membrane potential and after the step of updating the membrane potential.
  • the execution sequence shown in FIG. 4 is only an exemplary representation, which does not limit the present disclosure.
  • step S102 when the neuron has a membrane potential refresh mechanism, before step S102, it also includes:
  • Step S102a detecting whether the membrane potential of the neuron before updating at the current moment has returned to the resting potential.
  • the neuron Since the neuron has a membrane potential refresh mechanism, before the neuron calculates the historical membrane potential at the current moment in response to receiving an input pulse, it needs to detect whether the neuron’s membrane potential has returned to the resting potential before updating at the current moment. If it is detected whether the neuron's membrane potential has returned to the resting potential before the update at the current moment, there is no need to further calculate the historical membrane potential, thereby reducing the amount of calculation.
  • step S102a if it is detected that the membrane potential of the neuron at the current moment has not returned to the resting potential, it means that the membrane potential of the neuron has not been refreshed, that is, the membrane potential of the neuron at the current moment is in accordance with the normal The leakage law has not leaked completely, and at this time, step S102 is correspondingly executed to calculate the historical membrane potential of the neuron at the current moment according to the current input time difference and the preset leakage calculation model; and if it is detected that the membrane potential of the neuron at the current moment has been Returning to the resting potential means that the neuron’s membrane potential has completely leaked according to the normal leakage law at the current moment.
  • step S102b is executed, that is, the resting potential is directly determined as the historical membrane potential of the neuron at the current moment, and directly entered into Step S103, to calculate the membrane potential of the neuron at the current moment, thereby simplifying the calculation process and reducing the amount of calculation.
  • Step S102b determining the resting potential as the historical membrane potential of the neuron at the current moment.
  • the embodiment of the present disclosure further simplifies the update process of the neuron membrane potential through the neuron membrane potential refresh mechanism, thereby reducing the calculation amount of the neuron.
  • Fig. 5 is a block diagram of a brain neuron-like device provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides a brain neuron-like device 500 , which includes: a time difference acquisition module 501 , a first calculation module 502 , and a second calculation module 503 .
  • the time difference acquisition module 501 is configured to, in response to the brain-inspired neuron device receiving an input pulse, acquire the current Input time difference;
  • the first calculation module 502 is configured to calculate the historical membrane potential of the brain-like neuron device at the current moment according to the current input time difference and the preset leakage calculation model;
  • the second calculation module 503 is configured to calculate according to the first calculation module 502 Calculate the current moment membrane potential of the brain neuron device based on the determined historical membrane potential and the input pulse received by the brain neuron device at this time.
  • Fig. 6 is a block diagram of another brain neuron device provided by an embodiment of the present disclosure.
  • the brain neuron-like device 500 further includes: a decision-making module 504 .
  • the decision module 504 is configured to determine whether the brain-inspired neuron device needs to emit pulses at the current time according to the membrane potential of the brain-inspired neuron device at the current time.
  • the brain neuron device 500 further includes: a counting module 505 configured to record the current moment in response to the brain neuron device receiving an input pulse The cumulative count value of the preset time step; correspondingly, the time difference acquisition module 501 is preferably configured to respond to the input pulse received by the brain-like neuron device, and the acquisition count module 505 calculates the preset time at the moment when the input pulse was received last time The first cumulative count value of the step, and the acquisition count module 505 calculates the difference between the first cumulative count value and the second cumulative count value for the second cumulative count value of the preset time step when the input pulse is received this time value, and determine the difference as the current input time difference.
  • a counting module 505 configured to record the current moment in response to the brain neuron device receiving an input pulse The cumulative count value of the preset time step
  • the time difference acquisition module 501 is preferably configured to respond to the input pulse received by the brain-like neuron device, and the acquisition count module 505 calculates the preset time at the moment when the input pulse was received last time The
  • the brain neuron device 500 may further include: a recording module (not shown in the figure), the recording module is configured to record the received pulse in response to the brain neuron device receiving an input pulse. to the time value of the input pulse; correspondingly, the time difference acquisition module 501 is preferably configured to calculate the difference between the time value of this time when the input pulse is received and the time value of the last time the input pulse was received, and according to the difference The ratio of the value to the step size of the preset time step determines the current input time difference.
  • a recording module (not shown in the figure)
  • the recording module is configured to record the received pulse in response to the brain neuron device receiving an input pulse.
  • the time difference acquisition module 501 is preferably configured to calculate the difference between the time value of this time when the input pulse is received and the time value of the last time the input pulse was received, and according to the difference The ratio of the value to the step size of the preset time step determines the current input time difference.
  • Fig. 7 is a block diagram of another brain neuron-like device provided by the example of the present disclosure.
  • the brain-like neuron device 500 further includes: a refresh module 506 configured to detect whether the brain-like neuron device within the preset time interval is An input pulse is received; if it is detected that the brain-inspired neuron device does not receive an input pulse, the current membrane potential of the brain-inspired neuron device is set as a resting potential.
  • a refresh module 506 configured to detect whether the brain-like neuron device within the preset time interval is An input pulse is received; if it is detected that the brain-inspired neuron device does not receive an input pulse, the current membrane potential of the brain-inspired neuron device is set as a resting potential.
  • the brain-inspired neuron device 500 further includes: a detection module 507 and a determination module 508; wherein, the detection module 507 is configured to, in the first calculation module 502, according to the current input time difference and the preset leakage
  • the calculation model calculates the historical membrane potential of the brain-like neuron device at the current moment, and detects whether the membrane potential of the brain-like neuron device has returned to the resting potential before the update at the current moment, and detects that the brain-like neuron device is at the current time.
  • the instruction determination module 508 determines the resting potential as the historical membrane potential of the brain-like neuron device at the current moment.
  • the brain-inspired neuron device provided by the embodiments of the present disclosure is used to implement the neuron membrane potential update method provided by the above-mentioned embodiments of the present disclosure, wherein, the description of the functional modules of the brain-inspired neuron device and the description of each functional module For the interaction process between them, please refer to the description of the corresponding method steps in the method for updating the membrane potential of the neuron in the above embodiment, and details will not be repeated here.
  • Embodiments of the present disclosure also provide a processing core, including a plurality of brain-like neuron devices provided by embodiments of the present disclosure.
  • Embodiments of the present disclosure also provide a neuromorphic chip, including a plurality of processing cores provided by embodiments of the present disclosure.
  • Fig. 8 is a composition block diagram of an electronic device provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides an electronic device, which includes a plurality of processing cores 701 and an on-chip network 702, wherein the plurality of processing cores 701 are all connected to the on-chip network 702, and the on-chip network 702 is configured to interact Multiple processing of inter-core data and external data.
  • one or more instructions are stored in one or more processing cores 701, and one or more instructions are executed by one or more processing cores 701, so that one or more processing cores 701 can execute the above neuron membrane Potential update method.
  • an embodiment of the present disclosure further provides a computer-readable medium on which a computer program is stored, wherein when the computer program is executed by the processing core, the method for updating the membrane potential of a neuron provided by the embodiment of the present disclosure is implemented.
  • the functional modules/units in the system, and the device can be implemented as software, firmware, hardware, and an appropriate combination thereof.
  • the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be composed of several physical components. Components cooperate to execute.
  • Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit .
  • Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).
  • computer storage media includes both volatile and nonvolatile media implemented in any method or technology for storage of information, such as computer readable program instructions, data structures, program modules, or other data. volatile, removable and non-removable media.
  • Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridges, tape, magnetic disk storage or other magnetic storage devices, or can Any other medium used to store desired information and which can be accessed by a computer.
  • communication media typically embodies computer-readable program instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery medium.
  • Computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or downloaded to an external computer or external storage device over a network, such as the Internet, a local area network, a wide area network, and/or a wireless network.
  • the network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and/or edge servers.
  • a network adapter card or a network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in each computing/processing device .
  • Computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or Source or object code written in any combination, including object-oriented programming languages—such as Smalltalk, C++, etc., and conventional procedural programming languages—such as the “C” language or similar programming languages.
  • Computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server implement.
  • the remote computer can be connected to the user computer through any kind of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (such as via the Internet using an Internet service provider). connect).
  • LAN local area network
  • WAN wide area network
  • an electronic circuit such as a programmable logic circuit, field programmable gate array (FPGA), or programmable logic array (PLA)
  • FPGA field programmable gate array
  • PDA programmable logic array
  • the computer program products described here can be specifically realized by means of hardware, software or a combination thereof.
  • the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK) etc. Wait.
  • a software development kit Software Development Kit, SDK
  • These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine such that when executed by the processor of the computer or other programmable data processing apparatus , producing an apparatus for realizing the functions/actions specified in one or more blocks in the flowchart and/or block diagram.
  • These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause computers, programmable data processing devices and/or other devices to work in a specific way, so that the computer-readable medium storing instructions includes An article of manufacture comprising instructions for implementing various aspects of the functions/acts specified in one or more blocks in flowcharts and/or block diagrams.
  • each block in a flowchart or block diagram may represent a module, a portion of a program segment, or an instruction that includes one or more Executable instructions.
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Abstract

本公开提供了一种神经元的膜电位更新方法，包括：响应于神经元接收到输入脉冲，获取所述神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差；根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位；根据所述历史膜电位和所述神经元在本次所接收到的输入脉冲计算所述神经元的当前时刻膜电位。本公开还提供了一种类脑神经元器件、处理核、神经形态芯片、电子设备、计算机可读介质。

Description

神经元的膜电位更新方法、类脑神经元器件、处理核 技术领域
本公开实施例涉及计算机技术领域，特别涉及一种神经元的膜电位更新方法、类脑神经元器件、处理核、神经形态芯片、电子设备、计算机可读介质。
背景技术
神经形态芯片(Neuromorphic chip)拟采用电子技术模拟已经被证明了的生物脑的运作规则，从而构建类似于生物脑的电子芯片，神经形态芯片的每个核内均包含有一组类脑神经元器件，这些类脑神经元器件通过模拟作为脑神经网络基本单元的生物神经元的结构和信息传递方式以实现信息的处理。
发明内容
本公开实施例提供一种神经元的膜电位更新方法、类脑神经元器件、处理核、神经形态芯片、电子设备、计算机可读介质，其可以有效降低膜电位更新过程中的计算量。
第一方面，本公开提供了一种神经元的膜电位更新方法，该神经元的膜电位更新方法包括：
响应于神经元接收到输入脉冲，获取所述神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差；
根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位；
根据所述历史膜电位和所述神经元在本次所接收到的输入脉冲计算所述神经元的当前时刻膜电位。
第二方面，本公开提供了一种类脑神经元器件，该类脑神经元器件包括：
时间差获取模块，被配置为响应于接收到输入脉冲，获取类脑神经元器件在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差；
第一计算模块，被配置为根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位；
第二计算模块，被配置为根据所述第一计算模块所确定的所述历史膜电位和所述神经元在本次所接收到的输入脉冲计算所述神经元的当前时刻膜电位。
第三方面，本公开提供了一种处理核，该处理核包括多个上述类脑神经元器件。
第四方面，本公开提供了一种神经形态芯片，该神经形态芯片包括多个上述处理核。
第五方面，本公开提供了一种电子设备，该电子设备包括：多个处理核；以及，片上网络，被配置为交互所述多个处理核间的数据和外部数据；其中，一个或多个所述处理核中存储有一个或多个指令，一个或多个所述指令被一个或多个所述处理核执行，以使一个或多个所述处理核能够执行上述的神经元的膜电位更新方法。
第六方面，本公开提供了一种计算机可读介质，其上存储有计算机程序，其中，所述计算机程序在被处理核执行时实现上述的神经元的膜电位更新方法。
本公开所提供的神经元的膜电位更新方法、类脑神经元器件、处理核、神经形态芯片、电子设备、计算机可读介质，利用预设的泄漏计算模型使类脑神经元器件仅在接收到输入脉冲时才对当前时刻膜电位进行计算，使得类脑神经元器件在未接收到输入脉冲时能够处于休眠状态，从而避免了类脑神经元器件每时每刻都进行膜电位的检测和计算，进而降低了神经元形态芯片的功耗。
应当理解，本部分所描述的内容并非旨在标识本公开的实施例的关键或重要特征，也不用于限制本公开的范围。本公开的其它特征将通过以下的说明书而变得容易理解。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，而非限制本公开。根据下面参考附图对示例性实施例的详细说明，本公开的其它特征及方面将变得清楚。
附图说明
附图用来提供对本公开的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开，并不构成对本公开的限制。通过参考附图对详细示例实施例进行描述，以上和其他特征和优点对本领域技术人员将变得更加显而易见，在附图中：
图1为本公开实施例提供的一种神经元的膜电位更新方法的流程图；
图2为本公开实施例提供的另一种神经元的膜电位更新方法的流程图；
图3为本公开实施例提供的又一种神经元的膜电位更新方法的流程图；
图4为本公开实施例提供的再一种神经元的膜电位更新方法的流程图；
图5为本公开实施例提供的一种类脑神经元器件的组成框图；
图6为本公开实施例提供的另一种类脑神经元器件的组成框图；
图7为本公开实施例提供的又一种类脑神经元器件的组成框图；
图8为本公开实施例提供的一种电子设备的组成框图。
具体实施方式
为使本领域的技术人员更好地理解本公开的技术方案，以下结合附图对本公开的示范性实施例做出说明，其中包括本公开实施例的各种细节以助于理解，应当将它们认为仅仅是示范性的。因此，本领域普通技术人员应当认识到，可以对这里描述的实施例做出各种改变和修改，而不会背离本公开的范围和精神。同样，为了清楚和简明，以下的描述中省略了对公知功能和结构的描述。
在不冲突的情况下，本公开各实施例及实施例中的各特征可相互组合。
如本文所使用的，术语“和/或”包括一个或多个相关列举条目的任何和所有组合。
本文所使用的术语仅用于描述特定实施例，且不意欲限制本公开。如本文所使用的，单数形式“一个”和“该”也意欲包括复数形式，除非上下文另外清楚指出。还将理解 的是，当本说明书中使用术语“包括”和/或“由……制成”时，指定存在所述特征、整体、步骤、操作、元件和/或组件，但不排除存在或添加一个或多个其它特征、整体、步骤、操作、元件、组件和/或其群组。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
除非另外限定，否则本文所用的所有术语(包括技术和科学术语)的含义与本领域普通技术人员通常理解的含义相同。还将理解，诸如那些在常用字典中限定的那些术语应当被解释为具有与其在相关技术以及本公开的背景下的含义一致的含义，且将不解释为具有理想化或过度形式上的含义，除非本文明确如此限定。
相关技术中，类脑神经元器件在进行膜电位更新的过程中，在每个时间步到达时，都计算当前时刻膜电位，优选的，当类脑神经元器件在当前时刻接收到了输入脉冲时，首先将所接收到输入脉冲转化为积分电位，进而将该积分电位与已有膜电位(又称为历史膜电位)求和得到当前时刻膜电位，在计算出当前时刻膜电位后，检测当前时刻膜电位是否达到预设阈值，若未达到，进而计算泄漏电压，以控制当前时刻膜电位以该泄漏电压的量进行降低更新，从而向静息电位靠近；而当类脑神经元器件在当前时刻未接收到输入脉冲时，类脑神经元器件则直接按照膜电位泄露规律计算当前时刻的泄露电压，进而控制当前时刻膜电位以该泄漏电压的量进行降低更新，以向静息电位靠近。其中，时间步是指预先按照预设时间步长将时间进行切片形成的时间间隔，在类脑神经元器件的信息处理过程中，通常以时间步的数量进行计时。
在相关技术中的这种类脑神经元器件的膜电位更新过程中，类脑神经元器件在每个时间步都处于运算状态(计算膜电位、计算泄漏电压等)，这对于大部分时间没有输入的稀疏度较高的网络而言，类脑神经元器件计算频率较高，从而导致芯片产生过多的功耗。针对这一技术问题，本公开提供一种神经元的膜电位更新方法，通过使类脑神经元器件在接收到输入脉冲时才对当前时刻膜电位进行计算，使得类脑神经元器件在未接收到输入脉冲时能够处于休眠状态，从而避免了类脑神经元器件每时每刻都进行膜电位的检测和计算，进而降低了神经形态芯片的功耗。
图1为本公开实施例提供的一种神经元的膜电位更新方法的流程图。
参照图1，本公开实施例提供一种神经元的膜电位更新方法，该方法包括：
步骤S101、响应于神经元接收到输入脉冲，获取神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差。
脉冲是由神经元产生动作电位并沿神经元的轴突向后传播的一种信息，通常可采用离散数值表达。本公开实施例中，输入脉冲是指由神经元当前所连接的各前端神经元所发出的脉冲。
本公开实施例中，当神经元未接收到输入脉冲时，神经元处于休眠状态，即神经元不对膜电位进行相关的检测和/或计算，例如，检测膜电位是否超过预设阈值以及计算泄漏电压等；在一些实施例中，在神经元未接收到输入脉冲的时长达到预设时长的情况下，可以认为该神经元属于未接收到输入脉冲的情况，则该神经元进入休眠状态。该预设时 长是预设的时长阈值，该预设时长可以根据实际场景进行设置，例如设置为一个时间步对应的时长等，本说明书实施例对上述预设时长不作具体限定。而当神经元接收到输入脉冲时，触发神经元进行膜电位的相关检测和计算。
其中，当前输入时间差为神经元本次接收到输入脉冲与上一次接收到输入脉冲之间的时间间隔，在一些实施例中，该当前输入时间差可以为神经元本次接收到输入脉冲与上一次接收到输入脉冲的时间段内所包含的时间步的数量；在另一些实施例中，该当前输入时间差还可以为神经元本次接收到输入脉冲的时刻与上一次接收到输入脉冲的时刻之间的时长。
为便于理解，下文以当前输入时间差为时间步的数量为例进行说明。
在一些实施例中，作为一种获取当前输入时间差的可选实施方式，可通过预先设置的计数模块获取当前输入时间差。
优选的，在该实施例中，神经元内预设有计数模块，该计数模块在神经元每次接收到输入脉冲时记录预设时间步的累计计数值。
对应的，在该实施例中，步骤S101包括：响应于接收到输入脉冲，获取预设的计数模块在上一次接收到输入脉冲的时刻对预设时间步的第一累积计数值，并获取预设的计数模块在本次接收到输入脉冲的时刻对预设时间步的第二累积计数值，将该第一累积计数值与该第二累积计数值的差值确定为当前输入时间差。例如，当神经元接收到输入脉冲时，获取到上一次接收到输入脉冲的时刻对应的时间步的累计值为第100步，即第一累计计数值为100，获取到本次接收到输入脉冲的时刻对应的时间步的累计值为第105步，即第二累计计数值为105，则可确定出当前输入时间差为5。
在另一些实施例中，作为另一种获取当前输入时间差的可选实施方式，可通过计算时间差的方式获取当前输入时间差。
优选的，在该实施例中，神经元每次接收到输入脉冲时，均记录本次接收到输入脉冲的时刻值，例如，记录在存储模块中。
对应的，步骤S101包括：计算本次接收到输入脉冲的时刻值与上一次接收到输入脉冲的时刻值的差值，根据该差值与预设时间步的步长比值确定出当前输入时间差。例如，本次接收到输入脉冲的时刻值与上一次接收到输入脉冲的时刻值的差值为0.6ms，预设时间步的步长为0.1ms，则确定出该当前输入时间差为0.6/0.1＝6。
其中，可以在确定当前输入时间差之后对存储模块中已记录的时刻值进行更新，例如，将存储模块中的时刻值更新为本次接收到输入脉冲的时刻值。这样，可以以较小的存储空间确定当前输入时间差，有效节省存储空间。
针对上述两种当前输入时间差的获取方式，在实际应用中，本领域技术人员可以基于实际情况选择其中一种方式进行实施。
步骤S102、根据该当前输入时间差和预设泄漏计算模型计算出神经元在当前时刻的历史膜电位。
本公开实施例中，历史膜电位为神经元在将本次接收到的输入脉冲累积计入神经元 的膜电位之前的膜电位。神经元在当前时刻的历史膜电位是指在还未将本次接收到的输入脉冲累计计入神经元的膜电位之前，神经元自上次接收到输入脉冲到本次接收到输入脉冲的时间段内，膜电位按照膜电位泄漏规律进行泄漏后，当前时刻应达到的膜电位。
优选的，本公开实施例中预先建立有泄漏计算模型，该泄漏计算模型用于计算神经元在当前时刻的历史膜电位，该预设泄漏计算模型与神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差相关。其中，在当前输入时间差大于或等于目标数值时，根据泄漏计算模型确定得到神经元在本次接收到输入脉冲时的历史膜电位为静息电位。
优选的，在一些实施例中，预设泄漏计算模型包括第一因子和第二因子，该第一因子和第二因子均是与上述当前输入时间差相关的函数。
在一些实施例中，当前输入时间差为神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间所包含的预设时间步的数量，该预设泄漏计算模型可表示为：
Figure PCTCN2022094477-appb-000001
其中，n为上一次接收到输入脉冲的时刻对应的预设时间步的累计计数值，m为本次接收到输入脉冲的时刻与上一次接收到输入脉冲的时刻之间所包含的预设时间步的数量，n+m为本次接收到输入脉冲的时刻对应的预设时间步的累计计数值，V(n+m)表示神经元在本次接收到输入脉冲时的历史膜电位，V(n)表示神经元在上一次接收到输入脉冲时的膜电位；
Figure PCTCN2022094477-appb-000002
表示第一因子，φ(m)表示第二因子，二者皆与当前输入时间差m相关。
在一些实施例中，该预设泄漏计算模型基于膜电位的泄漏计算原理推导出，如下：
首先，构建膜电位的原始泄漏模型：
Figure PCTCN2022094477-appb-000003
该公式中，V(t)表示神经元在t时刻的膜电位，V E表示神经元的静息电位，需要说明的是，静息电位是指神经元在未接收到输入脉冲时，膜电位趋于靠近的电位，优选的，静息电位可设置为零，
Figure PCTCN2022094477-appb-000004
表示对神经元在t时刻的膜电位求导，即表示神经元的膜电位的变化率，c和g为预设的常量参数，优选的，c为膜电位时间常数，g为电导，其中，g的取值按照欧姆定律确定出，即膜泄漏电流等于膜内外电位差与膜泄漏电导的乘积。该公式的物理意义为：神经元的膜电位在向静息电位回归的过程(也即是泄漏的过程)将导致膜电位的变化。
对上述公式做进一步整理，得到：
Figure PCTCN2022094477-appb-000005
进一步，根据上述公式计算V(t+dt)，可得：
Figure PCTCN2022094477-appb-000006
将上述连续域推导过程映射到离散域中，需要说明的，在该离散域中，连续时间按照预设步长被划分为多个时间步。可得：
Figure PCTCN2022094477-appb-000007
通过归纳总结可推导出：
V(n+m)＝α m·V(n)+α m-1·β+…+β
进一步得到：
Figure PCTCN2022094477-appb-000008
其中，
Figure PCTCN2022094477-appb-000009
Figure PCTCN2022094477-appb-000010
Figure PCTCN2022094477-appb-000011
Figure PCTCN2022094477-appb-000012
其中，Δt为预设时间步的步长；
Figure PCTCN2022094477-appb-000013
表示所述第一因子，φ(m)表示所述第二因子，二者皆与当前输入时间差m相关；α和β为中间参数。
在获取到神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差m后，将该当前输入时间差m输入至上述泄漏计算模型即可计算得到神经元在本次接收到输入脉冲时的历史膜电位V(n+m)。
在一些实施例中，为降低运算量，可预先存储输入时间差m的值与第一因子
Figure PCTCN2022094477-appb-000014
的值的对应关系表，以及输入时间差m的值与第二因子φ(m)的值的对应关系表，对应的，步骤S102可通过查表的方式计算神经元的当前时刻的历史膜电位。图2为本公开实施例提供的另一种神经元的膜电位更新方法的流程图，优选的，参照图2，在该实施例中，步骤S102可包括：
步骤S1021、根据当前输入时间差，从预设的多个输入时间差的值与第一因子的值的对应关系表中确定出输入时间差对应的第一因子的值。
步骤S1022、根据当前输入时间差，从预设的多个输入时间差的值与第二因子的值的对应关系表中确定出输入时间差对应的第二因子的值。
步骤S1023、基于泄漏计算模型，根据所确定出的第一因子的值、第二因子的值和神经元在上一次接收到输入脉冲时的膜电位，确定出神经元在当前时刻的历史膜电位。
本公开实施例中，由于预先设置了对应关系表，因此在计算历史膜电位时可直接通过查询对应关系表来获取泄漏计算模型中相关因子的值，从而避免了进行相关因子的计算，进而降低了运算量。
步骤S103、根据该历史膜电位和神经元在本次所接收到的输入脉冲计算神经元的当前时刻膜电位。
在计算出神经元的当前时刻的历史膜电位后，将神经元本次所接收到的输入脉冲计入神经元的膜电位即可得到神经元的当前时刻膜电位。
优选的，步骤S103包括：根据本次所接收到的输入脉冲计算出积分电位，将历史膜电位和该积分电位进行求和运算得神经元的当前时刻膜电位。其中，积分电位通过将神经元本次所接收到所有输入脉冲进行加权求和得到，权重值由神经元所连接的前端神经元所对应的轴突的连接强度确定。
本公开实施例所提供的神经元的膜电位更新方法，利用预设的泄漏计算模型使神经元仅在接收到输入脉冲时触发对神经元的膜电位进行检测和计算，从而避免了神经元每时每刻都处于运算状态，进而降低了神经形态芯片的功耗。
图3为本公开实施例提供的又一种神经元的膜电位更新方法的流程图。在一些实施例中，参照图3，在步骤S103之后，还包括：
步骤S104、根据神经元的当前时刻膜电位，确定神经元在当前时刻是否需要发放脉冲。
神经元在当前时刻是否达到发放脉冲的条件与当前时刻膜电位息息相关。在一些实施例中，步骤S104包括：
步骤S1041、判断神经元的当前时刻膜电位是否超过预设阈值。
若判断出神经元的当前时刻膜电位超过预设阈值，则说明神经元已满足发放条件，此时对应执行下述步骤S1042，以进行脉冲发放；而若判断出神经元的当前时刻膜电位未超过预设阈值，则确定出神经元在当前时刻不需要发放脉冲，此时神经元不输出脉冲，等待至下次再接收到输入脉冲时，返回执行步骤S101，以再次进入检测并计算神经元膜电位的流程。
步骤S1042、确定出神经元在当前时刻需要发放脉冲，并控制神经元进行脉冲的发放。
在确定出神经元需要发放脉冲后，神经元产生动作电位(脉冲)，并将动作电位沿神经元的轴突向后传播，同时，在神经元发放脉冲后，控制膜电位下降或者归为一个低 值，例如，静息电位。
图4为本公开实施例提供的再一种神经元的膜电位更新方法的流程图。
参照图4，在一些实施例中，为进一步降低运算量，可设置刷新机制来对神经元的膜电位进行控制。在该实施例中，神经元的膜电位更新方法还包括：
步骤S100a、按预设时间间隔检测神经元在该预设时间间隔内是否接收到输入脉冲。
其中，预设时间间隔的设置条件可以为：大于或等于神经元的膜电位按照膜电位泄漏规律从发放阈值回归为静息电位所需的时间。其中，发放阈值为神经元进行脉冲发放所要达到的门限值；膜电位泄漏规律为预设的膜电位泄漏函数。需要说明的是，本公开实施例中，该预设时间间隔既可以为具体的时长也可以为预设时间步的个数，即，预设时间间隔可以设置为：大于或等于神经元的膜电位按照膜电位泄漏规律从发放阈值回归为静息电位所需的时长，例如1秒；也可以设置为：大于或等于神经元的膜电位按照膜电位泄漏规律从发放阈值回归为静息电位所需的预设时间步的个数，例如，该预设时间间隔为10，即表示10个预设时间步。
本公开实施例中，因膜电位按照膜电位泄漏规律从发放阈值回归为静息电位所需的时间为膜电位回归为静息电位所需要的最长时间，因此通过将刷新机制的预设时间间隔设置为大于或等于膜电位回归为静息电位所需要的最长时间，若在该预设时间间隔内检测出神经元未接收到输入脉冲，则说明神经元的膜电位此时按照正常的膜电位泄漏规律应回归为静息电位，因此，可设置当前膜电位为静息电位，以降低后续在接收到输入脉冲时计算神经元当前时刻膜电位的计算量。
优选的，在步骤S100a中，当检测到神经元在预设时间间隔内未接收到输入脉冲时，执行下述步骤S100b，以将神经元的膜电位设置为静息电位；而当检测到神经元在该预设时间间隔内接收到输入脉冲，则不对膜电位进行干预设置。
步骤S100b、将神经元的当前膜电位设置为静息电位。
需要说明的是，本公开实施例中，上述刷新机制所包含的步骤(步骤S100a和S100b)是独立于膜电位更新过程执行的，即，上述刷新机制所包含的步骤可在膜电位更新步骤之前、膜电位更新过程中以及膜电位更新步骤之后执行，图4所示出的执行顺序仅仅为一种示例性表示，其不对本公开起限定作用。
继续参照图4，在本实施例中，当神经元具备膜电位刷新机制时，在步骤S102之前，还包括：
步骤S102a、检测神经元在当前时刻更新前的膜电位是否已回归为静息电位。
由于神经元具备膜电位刷新机制，因而神经元在响应于接收到输入脉冲来对当前时刻的历史膜电位进行计算之前，需检测神经元在当前时刻更新前膜电位是否已回归为静息电位，若检测出神经元在当前时刻更新前膜电位是否已回归为静息电位，则无需进一步计算历史膜电位，从而降低了计算量。
优选的，在步骤S102a中，若检测出神经元在当前时刻的膜电位还未回归为静息电位，则说明神经元的膜电位还未被刷新，即神经元在当前时刻其膜电位按照正常泄漏规 律还未泄漏完全，此时对应执行步骤S102，以根据当前输入时间差和预设泄漏计算模型计算出神经元在当前时刻的历史膜电位；而若检测出神经元在当前时刻的膜电位已回归为静息电位，则说明神经元在当前时刻其膜电位按照正常泄漏规律已泄漏完全，此时对应执行步骤S102b，即将静息电位直接确定为神经元当前时刻的历史膜电位，并直接进入步骤S103，以计算神经元当前时刻膜电位，从而简化计算过程，降低了计算量。
步骤S102b、将静息电位确定为神经元在当前时刻的历史膜电位。
本公开实施例通过神经元的膜电位刷新机制进一步简化了神经元膜电位更新过程，从而降低了神经元的计算量。
图5为本公开实施例提供的一种类脑神经元器件的组成框图。
参照图5，本公开实施例提供一种类脑神经元器件500，该类脑神经元器件500包括：时间差获取模块501、第一计算模块502、第二计算模块503。
其中，时间差获取模块501被配置为响应于类脑神经元器件接收到输入脉冲，获取类脑神经元器件在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差；第一计算模块502被配置为根据该当前输入时间差和预设泄漏计算模型计算出类脑神经元器件在当前时刻的历史膜电位；第二计算模块503被配置为根据第一计算模块502所确定的历史膜电位和该类脑神经元器件在本次所接收到的输入脉冲计算类脑神经元器件的当前时刻膜电位。
图6为本公开实施例提供的另一种类脑神经元器件的组成框图。
参照图6，在一些实施例中，该类脑神经元器件500还包括：决策模块504。该决策模块504被配置为根据类脑神经元器件的当前时刻膜电位，确定类脑神经元器件在当前时刻是否需要发放脉冲。
进一步的，继续参照图6，在一些实施例中，该类脑神经元器件500还包括：计数模块505，该计数模块505被配置为响应于类脑神经元器件接收到输入脉冲，记录当前时刻的预设时间步的累计计数值；对应的，时间差获取模块501优选被配置为响应于类脑神经元器件接收到输入脉冲，获取计数模块505在上一次接收到输入脉冲的时刻对预设时间步的第一累积计数值，以及获取计数模块505在本次接收到输入脉冲的时刻对预设时间步的第二累积计数值，计算该第一累积计数值与该第二累积计数值的差值，并将该差值确定为当前输入时间差。
在另一些实施例中，该类脑神经元器件500还可包括：记录模块(图中未示出)，该记录模块被配置为响应于类脑神经元器件接收到输入脉冲，记录本次接收到输入脉冲的时刻值；对应的，时间差获取模块501优选被配置为计算记录模块所记录的本次接收到输入脉冲的时刻值与上一次接收到输入脉冲的时刻值的差值，根据该差值与预设时间步的步长的比值，确定出当前输入时间差。
图7为本公开实例提供的又一种类脑神经元器件的组成框图。
参照图7，在一些实施例中，该类脑神经元器件500还包括：刷新模块506，该刷新模块506被配置为按预设时间间隔检测类脑神经元器件在该预设时间间隔内是否接收 到输入脉冲；若检测到类脑神经元器件未接收到输入脉冲，将类脑神经元器件的当前膜电位设置为静息电位。
继续参照图7，在一些实施例中，类脑神经元器件500还包括：检测模块507和确定模块508；其中，检测模块507被配置为在第一计算模块502根据当前输入时间差和预设泄漏计算模型计算类脑神经元器件在当前时刻的历史膜电位之前，检测类脑神经元器件在当前时刻更新前的膜电位是否已回归为静息电位，并在检测出类脑神经元器件在当前时刻的膜电位还未回归为静息电位时，指示第一计算模块502根据当前输入时间差和预设泄漏计算模型计算类脑神经元器件在当前时刻的历史膜电位，且在检测出类脑神经元器件在当前时刻的膜电位已回归为静息电位时，指示确定模块508将静息电位确定为类脑神经元器件在当前时刻的历史膜电位。
本公开实施例提供的类脑神经元器件用于实现本公开上述实施例所提供的神经元的膜电位更新方法，其中，该类脑神经元器件所具有的功能模块的描述及各功能模块之间的交互过程请参照上述实施例中神经元的膜电位更新方法中对应的方法步骤的描述，此处不再赘述。
本公开实施例还提供一种处理核，包括多个本公开实施例所提供的类脑神经元器件。
本公开实施例还提供一种神经形态芯片，包括多个本公开实施例所提供的处理核。
图8为本公开实施例提供的一种电子设备的组成框图。
参照图8，本公开实施例提供了一种电子设备，该电子设备包括多个处理核701以及片上网络702，其中，多个处理核701均与片上网络702连接，片上网络702被配置为交互多个处理核间的数据和外部数据。
其中，一个或多个处理核701中存储有一个或多个指令，一个或多个指令被一个或多个处理核701执行，以使一个或多个处理核701能够执行上述的神经元的膜电位更新方法。
此外，本公开实施例还提供一种计算机可读介质，其上存储有计算机程序，其中，计算机程序在被处理核执行时实现本公开实施例所提供的神经元的膜电位更新方法。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分；例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以由若干物理组件合作执行。某些物理组件或所有物理组件可以被实施为由处理器，如中央处理器、数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读程序指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、 数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读程序指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。
这里所描述的计算机可读程序指令可以从计算机可读存储介质下载到各个计算/处理设备，或者通过网络、例如因特网、局域网、广域网和/或无线网下载到外部计算机或外部存储设备。网络可以包括铜传输电缆、光纤传输、无线传输、路由器、防火墙、交换机、网关计算机和/或边缘服务器。每个计算/处理设备中的网络适配卡或者网络接口从网络接收计算机可读程序指令，并转发该计算机可读程序指令，以供存储在各个计算/处理设备中的计算机可读存储介质中。
用于执行本公开操作的计算机程序指令可以是汇编指令、指令集架构(ISA)指令、机器指令、机器相关指令、微代码、固件指令、状态设置数据、或者以一种或多种编程语言的任意组合编写的源代码或目标代码，所述编程语言包括面向对象的编程语言—诸如Smalltalk、C++等，以及常规的过程式编程语言—诸如“C”语言或类似的编程语言。计算机可读程序指令可以完全地在用户计算机上执行、部分地在用户计算机上执行、作为一个独立的软件包执行、部分在用户计算机上部分在远程计算机上执行、或者完全在远程计算机或服务器上执行。在涉及远程计算机的情形中，远程计算机可以通过任意种类的网络—包括局域网(LAN)或广域网(WAN)—连接到用户计算机，或者，可以连接到外部计算机(例如利用因特网服务提供商来通过因特网连接)。在一些实施例中，通过利用计算机可读程序指令的状态信息来个性化定制电子电路，例如可编程逻辑电路、现场可编程门阵列(FPGA)或可编程逻辑阵列(PLA)，该电子电路可以执行计算机可读程序指令，从而实现本公开的各个方面。
这里所描述的计算机程序产品可以具体通过硬件、软件或其结合的方式实现。在一个可选实施例中，所述计算机程序产品具体体现为计算机存储介质，在另一个可选实施例中，计算机程序产品具体体现为软件产品，例如软件开发包(Software Development Kit，SDK)等等。
这里参照根据本公开实施例的方法、装置(系统)和计算机程序产品的流程图和/或框图描述了本公开的各个方面。应当理解，流程图和/或框图的每个方框以及流程图和/或框图中各方框的组合，都可以由计算机可读程序指令实现。
这些计算机可读程序指令可以提供给通用计算机、专用计算机或其它可编程数据处理装置的处理器，从而生产出一种机器，使得这些指令在通过计算机或其它可编程数据处理装置的处理器执行时，产生了实现流程图和/或框图中的一个或多个方框中规定的功能/动作的装置。也可以把这些计算机可读程序指令存储在计算机可读存储介质中，这些指令使得计算机、可编程数据处理装置和/或其他设备以特定方式工作，从而，存储有指令的计算机可读介质则包括一个制造品，其包括实现流程图和/或框图中的一个或多个方 框中规定的功能/动作的各个方面的指令。
也可以把计算机可读程序指令加载到计算机、其它可编程数据处理装置、或其它设备上，使得在计算机、其它可编程数据处理装置或其它设备上执行一系列操作步骤，以产生计算机实现的过程，从而使得在计算机、其它可编程数据处理装置、或其它设备上执行的指令实现流程图和/或框图中的一个或多个方框中规定的功能/动作。
附图中的流程图和框图显示了根据本公开的多个实施例的系统、方法和计算机程序产品的可能实现的体系架构、功能和操作。在这点上，流程图或框图中的每个方框可以代表一个模块、程序段或指令的一部分，所述模块、程序段或指令的一部分包含一个或多个用于实现规定的逻辑功能的可执行指令。在有些作为替换的实现中，方框中所标注的功能也可以以不同于附图中所标注的顺序发生。例如，两个连续的方框实际上可以基本并行地执行，它们有时也可以按相反的顺序执行，这依所涉及的功能而定。也要注意的是，框图和/或流程图中的每个方框、以及框图和/或流程图中的方框的组合，可以用执行规定的功能或动作的专用的基于硬件的系统来实现，或者可以用专用硬件与计算机指令的组合来实现。
本文已经公开了示例实施例，并且虽然采用了具体术语，但它们仅用于并仅应当被解释为一般说明性含义，并且不用于限制的目的。在一些实例中，对本领域技术人员显而易见的是，除非另外明确指出，否则可单独使用与特定实施例相结合描述的特征、特性和/或元素，或可与其他实施例相结合描述的特征、特性和/或元件组合使用。因此，本领域技术人员将理解，在不脱离由所附的权利要求阐明的本公开的范围的情况下，可进行各种形式和细节上的改变。

Claims (17)

  1. 一种神经元的膜电位更新方法，包括：
    响应于神经元接收到输入脉冲，获取所述神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差；
    根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位；
    根据所述历史膜电位和所述神经元在本次所接收到的输入脉冲计算所述神经元的当前时刻膜电位。
  2. 根据权利要求1所述的神经元的膜电位更新方法，其中，所述根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元的当前时刻的历史膜电位包括：
    根据所述当前输入时间差，从预设的输入时间差的值与第一因子的值的对应关系中确定出所述当前输入时间差对应的第一因子的值；
    根据所述当前输入时间差，从预设的输入时间差的值与第二因子的值的对应关系中确定出所述当前输入时间差对应的第二因子的值；
    基于所述预设泄漏计算模型，根据所确定出的所述第一因子的值、所述第二因子的值和所述神经元在上一次接收到输入脉冲时的膜电位，确定出所述神经元在当前时刻的历史膜电位。
  3. 根据权利要求1或2所述的神经元的膜电位更新方法，其中，所述当前输入时间差为所述神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间所包含的预设时间步的数量；
    所述预设泄漏计算模型为：
    Figure PCTCN2022094477-appb-100001
    其中，
    Figure PCTCN2022094477-appb-100002
    表示第一因子，φ(m)表示第二因子；
    所述第一因子为：
    Figure PCTCN2022094477-appb-100003
    所述第二因子为：
    Figure PCTCN2022094477-appb-100004
    其中
    Figure PCTCN2022094477-appb-100005
    Figure PCTCN2022094477-appb-100006
    所述Δt为所述预设时间步的步长；n为上一次接收到输入脉冲的时刻对应的预设时间步的累计计数值，n+m为本次接收到输入脉冲的时刻对应的预设时间步的累计计数值，m为本次接收到输入脉冲的时刻与上一次接收到输入脉冲的时刻之间所包含的预设时间步的数量，V(n+m)表示神经元在本次接收到输入脉冲的时刻的历史膜电位，V(n)表示神经元在上一次接收到输入脉冲的时刻的膜电位，g和c为预设常量参数，V E为静息电位。
  4. 根据权利要求1所述的神经元的膜电位更新方法，其中，所述响应于神经元接收到输入脉冲，获取所述神经元在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差，包括：
    响应于接收到输入脉冲，获取预设的计数模块在上一次接收到输入脉冲的时刻对预设时间步的第一累积计数值；
    获取预设的计数模块在本次接收到输入脉冲的时刻对所述预设时间步的第二累积计数值；
    将所述第一累积计数值与所述第二累积计数值的差值确定为所述当前输入时间差。
  5. 根据权利要求1所述的神经元的膜电位更新方法，其中，所述方法还包括：
    响应于接收到输入脉冲，记录本次接收到输入脉冲的时刻值；
    所述获取本次接收到输入脉冲时刻与上一次接收到输入脉冲时刻的当前输入时间差包括：
    计算所述本次接收到输入脉冲的时刻值与上一次接收到输入脉冲的时刻值的差值；
    根据所述差值与预设时间步的步长的比值，确定出所述当前输入时间差。
  6. 根据权利要求1所述的神经元的膜电位更新方法，其中，所述方法还包括：
    按预设时间间隔检测所述神经元是否在所述预设时间间隔内接收到输入脉冲；
    若检测到所述神经元在所述预设时间间隔内未接收到输入脉冲，将所述神经元的当前膜电位设置为静息电位。
  7. 根据权利要求6所述的神经元的膜电位更新方法，其中，根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位之前，还包括：
    检测所述神经元在当前时刻更新前的膜电位是否已回归为静息电位；
    所述根据所述当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位，包括：
    若检测出所述神经元在当前时刻更新前的膜电位还未回归为静息电位，则根据所述 当前输入时间差和预设泄漏计算模型计算出所述神经元在当前时刻的历史膜电位。
  8. 根据权利要求7所述的神经元的膜电位更新方法，其中，在所述检测所述神经元在当前时刻的膜电位是否已回归为静息电位之后，还包括：
    若检测出所述神经元在当前时刻更新前的膜电位已回归为静息电位，则将所述静息电位确定为所述神经元在当前时刻的历史膜电位，并执行所述根据所述历史膜电位和所述神经元在本次所接收到的输入脉冲计算所述神经元的当前时刻膜电位的步骤。
  9. 根据权利要求1所述的神经元的膜电位更新方法，其中，所述根据所述历史膜电位和本次所接收到的输入脉冲计算神经元的当前时刻膜电位包括：
    根据本次所接收到的输入脉冲计算出积分电位；
    将所述历史膜电位和所述积分电位进行求和运算得所述神经元的当前时刻膜电位。
  10. 根据权利要求1所述的神经元的膜电位更新方法，其中，在所述根据所述神经元的当前时刻膜电位，确定所述神经元在当前时刻是否需要发放脉冲之后，还包括：
    根据所述神经元的当前时刻膜电位，确定所述神经元在当前时刻是否需要发放脉冲。
  11. 根据权利要求10所述的神经元的膜电位更新方法，其中，所述根据所述神经元的当前时刻膜电位，确定所述神经元在当前时刻是否需要发放脉冲包括：
    判断所述神经元的当前时刻膜电位是否超过预设阈值；
    若判断出所述神经元的当前时刻膜电位超过预设阈值，确定出所述神经元在当前时刻需要发放脉冲，并控制所述神经元进行脉冲的发放。
  12. 根据权利要求1所述的神经元的膜电位更新方法，其中，在所述神经元未接收到输入脉冲的时长达到预设时长的情况下，进入休眠状态。
  13. 一种类脑神经元器件，包括：
    第二获取模块时间差获取模块，被配置为响应于接收到输入脉冲，获取类脑神经元器件在本次接收到输入脉冲的时刻与在上一次接收到输入脉冲的时刻之间的当前输入时间差；
    第二获取模块，被配置为根据所述当前输入时间差和预设泄漏计算模型计算出所述类脑神经元器件在当前时刻的历史膜电位；
    第二计算模块，被配置为根据所述第二获取模块所确定的所述历史膜电位和所述类脑神经元器件在本次所接收到的输入脉冲计算所述类脑神经元器件的当前时刻膜电位。
  14. 一种处理核，包括多个如权利要求13所述的类脑神经元器件。
  15. 一种神经形态芯片，包括多个如权利要求14所述的处理核。
  16. 一种电子设备，包括：
    多个处理核；以及
    片上网络，被配置为交互所述多个处理核间的数据和外部数据；
    一个或多个所述处理核中存储有一个或多个指令，一个或多个所述指令被一个或多个所述处理核执行，以使一个或多个所述处理核能够执行权利要求1-12中任一项所述的神经元的膜电位更新方法。
  17. 一种计算机可读存储介质，其上存储有计算机程序，其中，所述计算机程序在被处理核执行时实现如权利要求1-12中任一项所述的神经元的膜电位更新方法。
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